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d7699f87 GFT |
1 | /* |
2 | * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver | |
3 | * | |
4 | * Copyright 2008 JMicron Technology Corporation | |
5 | * http://www.jmicron.com/ | |
d3d584f5 | 6 | * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org> |
d7699f87 | 7 | * |
3bf61c55 GFT |
8 | * Author: Guo-Fu Tseng <cooldavid@cooldavid.org> |
9 | * | |
d7699f87 GFT |
10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | * | |
23 | */ | |
24 | ||
2e582300 | 25 | #include <linux/version.h> |
937ef75a JP |
26 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28) |
27 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
28 | #endif | |
29 | ||
d7699f87 GFT |
30 | #include <linux/module.h> |
31 | #include <linux/kernel.h> | |
32 | #include <linux/pci.h> | |
33 | #include <linux/netdevice.h> | |
34 | #include <linux/etherdevice.h> | |
35 | #include <linux/ethtool.h> | |
36 | #include <linux/mii.h> | |
37 | #include <linux/crc32.h> | |
4330c2f2 | 38 | #include <linux/delay.h> |
29bdd921 | 39 | #include <linux/spinlock.h> |
8c198884 GFT |
40 | #include <linux/in.h> |
41 | #include <linux/ip.h> | |
79ce639c GFT |
42 | #include <linux/ipv6.h> |
43 | #include <linux/tcp.h> | |
44 | #include <linux/udp.h> | |
42b1055e | 45 | #include <linux/if_vlan.h> |
38d1bc09 | 46 | #include <linux/slab.h> |
3b70a6fa | 47 | #include <net/ip6_checksum.h> |
d7699f87 GFT |
48 | #include "jme.h" |
49 | ||
cd0ff491 GFT |
50 | static int force_pseudohp = -1; |
51 | static int no_pseudohp = -1; | |
52 | static int no_extplug = -1; | |
53 | module_param(force_pseudohp, int, 0); | |
54 | MODULE_PARM_DESC(force_pseudohp, | |
55 | "Enable pseudo hot-plug feature manually by driver instead of BIOS."); | |
56 | module_param(no_pseudohp, int, 0); | |
57 | MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); | |
58 | module_param(no_extplug, int, 0); | |
59 | MODULE_PARM_DESC(no_extplug, | |
60 | "Do not use external plug signal for pseudo hot-plug."); | |
4330c2f2 | 61 | |
6d06d88c | 62 | #ifndef JME_NEW_PM_API |
3d12cc1b GFT |
63 | static void |
64 | jme_pci_wakeup_enable(struct jme_adapter *jme, int enable) | |
65 | { | |
66 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27) | |
67 | pci_enable_wake(jme->pdev, PCI_D1, enable); | |
68 | pci_enable_wake(jme->pdev, PCI_D2, enable); | |
69 | pci_enable_wake(jme->pdev, PCI_D3hot, enable); | |
70 | pci_enable_wake(jme->pdev, PCI_D3cold, enable); | |
71 | #else | |
72 | pci_pme_active(jme->pdev, enable); | |
73 | #endif | |
74 | } | |
6d06d88c | 75 | #endif |
3d12cc1b | 76 | |
3bf61c55 GFT |
77 | static int |
78 | jme_mdio_read(struct net_device *netdev, int phy, int reg) | |
d7699f87 GFT |
79 | { |
80 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 81 | int i, val, again = (reg == MII_BMSR) ? 1 : 0; |
d7699f87 | 82 | |
186fc259 | 83 | read_again: |
cd0ff491 | 84 | jwrite32(jme, JME_SMI, SMI_OP_REQ | |
3bf61c55 GFT |
85 | smi_phy_addr(phy) | |
86 | smi_reg_addr(reg)); | |
d7699f87 GFT |
87 | |
88 | wmb(); | |
cd0ff491 | 89 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
cdcdc9eb | 90 | udelay(20); |
b3821cc5 GFT |
91 | val = jread32(jme, JME_SMI); |
92 | if ((val & SMI_OP_REQ) == 0) | |
3bf61c55 | 93 | break; |
cd0ff491 | 94 | } |
d7699f87 | 95 | |
cd0ff491 | 96 | if (i == 0) { |
937ef75a | 97 | pr_err("phy(%d) read timeout : %d\n", phy, reg); |
3bf61c55 | 98 | return 0; |
cd0ff491 | 99 | } |
d7699f87 | 100 | |
cd0ff491 | 101 | if (again--) |
186fc259 GFT |
102 | goto read_again; |
103 | ||
cd0ff491 | 104 | return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT; |
d7699f87 GFT |
105 | } |
106 | ||
3bf61c55 GFT |
107 | static void |
108 | jme_mdio_write(struct net_device *netdev, | |
109 | int phy, int reg, int val) | |
d7699f87 GFT |
110 | { |
111 | struct jme_adapter *jme = netdev_priv(netdev); | |
112 | int i; | |
113 | ||
3bf61c55 GFT |
114 | jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ | |
115 | ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | | |
116 | smi_phy_addr(phy) | smi_reg_addr(reg)); | |
d7699f87 GFT |
117 | |
118 | wmb(); | |
cdcdc9eb GFT |
119 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
120 | udelay(20); | |
8d27293f | 121 | if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0) |
3bf61c55 GFT |
122 | break; |
123 | } | |
d7699f87 | 124 | |
3bf61c55 | 125 | if (i == 0) |
937ef75a | 126 | pr_err("phy(%d) write timeout : %d\n", phy, reg); |
d7699f87 GFT |
127 | } |
128 | ||
cd0ff491 | 129 | static inline void |
3bf61c55 | 130 | jme_reset_phy_processor(struct jme_adapter *jme) |
d7699f87 | 131 | { |
cd0ff491 | 132 | u32 val; |
3bf61c55 GFT |
133 | |
134 | jme_mdio_write(jme->dev, | |
135 | jme->mii_if.phy_id, | |
8c198884 GFT |
136 | MII_ADVERTISE, ADVERTISE_ALL | |
137 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
3bf61c55 | 138 | |
cd0ff491 | 139 | if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
140 | jme_mdio_write(jme->dev, |
141 | jme->mii_if.phy_id, | |
142 | MII_CTRL1000, | |
143 | ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
3bf61c55 | 144 | |
fcf45b4c GFT |
145 | val = jme_mdio_read(jme->dev, |
146 | jme->mii_if.phy_id, | |
147 | MII_BMCR); | |
148 | ||
149 | jme_mdio_write(jme->dev, | |
150 | jme->mii_if.phy_id, | |
151 | MII_BMCR, val | BMCR_RESET); | |
3bf61c55 GFT |
152 | } |
153 | ||
b3821cc5 GFT |
154 | static void |
155 | jme_setup_wakeup_frame(struct jme_adapter *jme, | |
a4181cd4 | 156 | const u32 *mask, u32 crc, int fnr) |
b3821cc5 GFT |
157 | { |
158 | int i; | |
159 | ||
160 | /* | |
161 | * Setup CRC pattern | |
162 | */ | |
163 | jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL)); | |
164 | wmb(); | |
165 | jwrite32(jme, JME_WFODP, crc); | |
166 | wmb(); | |
167 | ||
168 | /* | |
169 | * Setup Mask | |
170 | */ | |
cd0ff491 | 171 | for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { |
b3821cc5 GFT |
172 | jwrite32(jme, JME_WFOI, |
173 | ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) | | |
174 | (fnr & WFOI_FRAME_SEL)); | |
175 | wmb(); | |
176 | jwrite32(jme, JME_WFODP, mask[i]); | |
177 | wmb(); | |
178 | } | |
179 | } | |
3bf61c55 | 180 | |
dc4185bd GFT |
181 | static inline void |
182 | jme_mac_rxclk_off(struct jme_adapter *jme) | |
183 | { | |
184 | jme->reg_gpreg1 |= GPREG1_RXCLKOFF; | |
185 | jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); | |
186 | } | |
187 | ||
188 | static inline void | |
189 | jme_mac_rxclk_on(struct jme_adapter *jme) | |
190 | { | |
191 | jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF; | |
192 | jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); | |
193 | } | |
194 | ||
195 | static inline void | |
196 | jme_mac_txclk_off(struct jme_adapter *jme) | |
197 | { | |
198 | jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC); | |
199 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
200 | } | |
201 | ||
202 | static inline void | |
203 | jme_mac_txclk_on(struct jme_adapter *jme) | |
204 | { | |
205 | u32 speed = jme->reg_ghc & GHC_SPEED; | |
206 | if (speed == GHC_SPEED_1000M) | |
207 | jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY; | |
208 | else | |
209 | jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; | |
210 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
211 | } | |
212 | ||
213 | static inline void | |
214 | jme_reset_ghc_speed(struct jme_adapter *jme) | |
215 | { | |
216 | jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX); | |
217 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
218 | } | |
219 | ||
220 | static inline void | |
221 | jme_reset_250A2_workaround(struct jme_adapter *jme) | |
222 | { | |
223 | jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | | |
224 | GPREG1_RSSPATCH); | |
225 | jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); | |
226 | } | |
227 | ||
228 | static inline void | |
229 | jme_assert_ghc_reset(struct jme_adapter *jme) | |
230 | { | |
231 | jme->reg_ghc |= GHC_SWRST; | |
232 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
233 | } | |
234 | ||
235 | static inline void | |
236 | jme_clear_ghc_reset(struct jme_adapter *jme) | |
237 | { | |
238 | jme->reg_ghc &= ~GHC_SWRST; | |
239 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
240 | } | |
241 | ||
cd0ff491 | 242 | static inline void |
3bf61c55 GFT |
243 | jme_reset_mac_processor(struct jme_adapter *jme) |
244 | { | |
a4181cd4 | 245 | static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; |
cd0ff491 GFT |
246 | u32 crc = 0xCDCDCDCD; |
247 | u32 gpreg0; | |
b3821cc5 GFT |
248 | int i; |
249 | ||
dc4185bd GFT |
250 | jme_reset_ghc_speed(jme); |
251 | jme_reset_250A2_workaround(jme); | |
252 | ||
253 | jme_mac_rxclk_on(jme); | |
254 | jme_mac_txclk_on(jme); | |
255 | udelay(1); | |
256 | jme_assert_ghc_reset(jme); | |
257 | udelay(1); | |
258 | jme_mac_rxclk_off(jme); | |
259 | jme_mac_txclk_off(jme); | |
260 | udelay(1); | |
261 | jme_clear_ghc_reset(jme); | |
262 | udelay(1); | |
263 | jme_mac_rxclk_on(jme); | |
264 | jme_mac_txclk_on(jme); | |
265 | udelay(1); | |
266 | jme_mac_rxclk_off(jme); | |
267 | jme_mac_txclk_off(jme); | |
cd0ff491 GFT |
268 | |
269 | jwrite32(jme, JME_RXDBA_LO, 0x00000000); | |
270 | jwrite32(jme, JME_RXDBA_HI, 0x00000000); | |
271 | jwrite32(jme, JME_RXQDC, 0x00000000); | |
272 | jwrite32(jme, JME_RXNDA, 0x00000000); | |
273 | jwrite32(jme, JME_TXDBA_LO, 0x00000000); | |
274 | jwrite32(jme, JME_TXDBA_HI, 0x00000000); | |
275 | jwrite32(jme, JME_TXQDC, 0x00000000); | |
276 | jwrite32(jme, JME_TXNDA, 0x00000000); | |
277 | ||
4330c2f2 GFT |
278 | jwrite32(jme, JME_RXMCHT_LO, 0x00000000); |
279 | jwrite32(jme, JME_RXMCHT_HI, 0x00000000); | |
cd0ff491 | 280 | for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i) |
b3821cc5 | 281 | jme_setup_wakeup_frame(jme, mask, crc, i); |
cd0ff491 | 282 | if (jme->fpgaver) |
cdcdc9eb GFT |
283 | gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL; |
284 | else | |
285 | gpreg0 = GPREG0_DEFAULT; | |
286 | jwrite32(jme, JME_GPREG0, gpreg0); | |
cd0ff491 GFT |
287 | } |
288 | ||
289 | static inline void | |
3bf61c55 | 290 | jme_clear_pm(struct jme_adapter *jme) |
d7699f87 | 291 | { |
3d12cc1b | 292 | jwrite32(jme, JME_PMCS, PMCS_STMASK | jme->reg_pmcs); |
d7699f87 GFT |
293 | } |
294 | ||
3bf61c55 GFT |
295 | static int |
296 | jme_reload_eeprom(struct jme_adapter *jme) | |
d7699f87 | 297 | { |
cd0ff491 | 298 | u32 val; |
d7699f87 GFT |
299 | int i; |
300 | ||
301 | val = jread32(jme, JME_SMBCSR); | |
302 | ||
cd0ff491 | 303 | if (val & SMBCSR_EEPROMD) { |
d7699f87 GFT |
304 | val |= SMBCSR_CNACK; |
305 | jwrite32(jme, JME_SMBCSR, val); | |
306 | val |= SMBCSR_RELOAD; | |
307 | jwrite32(jme, JME_SMBCSR, val); | |
308 | mdelay(12); | |
309 | ||
cd0ff491 | 310 | for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) { |
d7699f87 GFT |
311 | mdelay(1); |
312 | if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0) | |
313 | break; | |
314 | } | |
315 | ||
cd0ff491 | 316 | if (i == 0) { |
937ef75a | 317 | pr_err("eeprom reload timeout\n"); |
d7699f87 GFT |
318 | return -EIO; |
319 | } | |
320 | } | |
3bf61c55 | 321 | |
d7699f87 GFT |
322 | return 0; |
323 | } | |
324 | ||
3bf61c55 GFT |
325 | static void |
326 | jme_load_macaddr(struct net_device *netdev) | |
d7699f87 GFT |
327 | { |
328 | struct jme_adapter *jme = netdev_priv(netdev); | |
329 | unsigned char macaddr[6]; | |
cd0ff491 | 330 | u32 val; |
d7699f87 | 331 | |
cd0ff491 | 332 | spin_lock_bh(&jme->macaddr_lock); |
4330c2f2 | 333 | val = jread32(jme, JME_RXUMA_LO); |
d7699f87 GFT |
334 | macaddr[0] = (val >> 0) & 0xFF; |
335 | macaddr[1] = (val >> 8) & 0xFF; | |
336 | macaddr[2] = (val >> 16) & 0xFF; | |
337 | macaddr[3] = (val >> 24) & 0xFF; | |
4330c2f2 | 338 | val = jread32(jme, JME_RXUMA_HI); |
d7699f87 GFT |
339 | macaddr[4] = (val >> 0) & 0xFF; |
340 | macaddr[5] = (val >> 8) & 0xFF; | |
cd0ff491 GFT |
341 | memcpy(netdev->dev_addr, macaddr, 6); |
342 | spin_unlock_bh(&jme->macaddr_lock); | |
3bf61c55 GFT |
343 | } |
344 | ||
cd0ff491 | 345 | static inline void |
3bf61c55 GFT |
346 | jme_set_rx_pcc(struct jme_adapter *jme, int p) |
347 | { | |
cd0ff491 | 348 | switch (p) { |
192570e0 GFT |
349 | case PCC_OFF: |
350 | jwrite32(jme, JME_PCCRX0, | |
351 | ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
352 | ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
353 | break; | |
3bf61c55 GFT |
354 | case PCC_P1: |
355 | jwrite32(jme, JME_PCCRX0, | |
356 | ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
357 | ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
358 | break; | |
359 | case PCC_P2: | |
360 | jwrite32(jme, JME_PCCRX0, | |
361 | ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
362 | ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
363 | break; | |
364 | case PCC_P3: | |
365 | jwrite32(jme, JME_PCCRX0, | |
366 | ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
367 | ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
368 | break; | |
369 | default: | |
370 | break; | |
371 | } | |
192570e0 | 372 | wmb(); |
3bf61c55 | 373 | |
cd0ff491 | 374 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
7ca9ebee | 375 | netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p); |
d7699f87 GFT |
376 | } |
377 | ||
fcf45b4c | 378 | static void |
3bf61c55 | 379 | jme_start_irq(struct jme_adapter *jme) |
d7699f87 | 380 | { |
3bf61c55 GFT |
381 | register struct dynpcc_info *dpi = &(jme->dpi); |
382 | ||
383 | jme_set_rx_pcc(jme, PCC_P1); | |
3bf61c55 GFT |
384 | dpi->cur = PCC_P1; |
385 | dpi->attempt = PCC_P1; | |
386 | dpi->cnt = 0; | |
387 | ||
388 | jwrite32(jme, JME_PCCTX, | |
8c198884 GFT |
389 | ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) | |
390 | ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) | | |
3bf61c55 GFT |
391 | PCCTXQ0_EN |
392 | ); | |
393 | ||
d7699f87 GFT |
394 | /* |
395 | * Enable Interrupts | |
396 | */ | |
397 | jwrite32(jme, JME_IENS, INTR_ENABLE); | |
398 | } | |
399 | ||
cd0ff491 | 400 | static inline void |
3bf61c55 | 401 | jme_stop_irq(struct jme_adapter *jme) |
d7699f87 GFT |
402 | { |
403 | /* | |
404 | * Disable Interrupts | |
405 | */ | |
cd0ff491 | 406 | jwrite32f(jme, JME_IENC, INTR_ENABLE); |
d7699f87 GFT |
407 | } |
408 | ||
cd0ff491 | 409 | static u32 |
cdcdc9eb GFT |
410 | jme_linkstat_from_phy(struct jme_adapter *jme) |
411 | { | |
cd0ff491 | 412 | u32 phylink, bmsr; |
cdcdc9eb GFT |
413 | |
414 | phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17); | |
415 | bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR); | |
cd0ff491 | 416 | if (bmsr & BMSR_ANCOMP) |
cdcdc9eb GFT |
417 | phylink |= PHY_LINK_AUTONEG_COMPLETE; |
418 | ||
419 | return phylink; | |
420 | } | |
421 | ||
cd0ff491 | 422 | static inline void |
55d19799 | 423 | jme_set_phyfifo_5level(struct jme_adapter *jme) |
cd0ff491 GFT |
424 | { |
425 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); | |
426 | } | |
427 | ||
428 | static inline void | |
55d19799 | 429 | jme_set_phyfifo_8level(struct jme_adapter *jme) |
cd0ff491 GFT |
430 | { |
431 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); | |
432 | } | |
433 | ||
fcf45b4c GFT |
434 | static int |
435 | jme_check_link(struct net_device *netdev, int testonly) | |
d7699f87 GFT |
436 | { |
437 | struct jme_adapter *jme = netdev_priv(netdev); | |
dc4185bd | 438 | u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr; |
79ce639c | 439 | char linkmsg[64]; |
fcf45b4c | 440 | int rc = 0; |
d7699f87 | 441 | |
b3821cc5 | 442 | linkmsg[0] = '\0'; |
cdcdc9eb | 443 | |
cd0ff491 | 444 | if (jme->fpgaver) |
cdcdc9eb GFT |
445 | phylink = jme_linkstat_from_phy(jme); |
446 | else | |
447 | phylink = jread32(jme, JME_PHY_LINK); | |
d7699f87 | 448 | |
cd0ff491 GFT |
449 | if (phylink & PHY_LINK_UP) { |
450 | if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { | |
8c198884 GFT |
451 | /* |
452 | * If we did not enable AN | |
453 | * Speed/Duplex Info should be obtained from SMI | |
454 | */ | |
455 | phylink = PHY_LINK_UP; | |
456 | ||
457 | bmcr = jme_mdio_read(jme->dev, | |
458 | jme->mii_if.phy_id, | |
459 | MII_BMCR); | |
460 | ||
461 | phylink |= ((bmcr & BMCR_SPEED1000) && | |
462 | (bmcr & BMCR_SPEED100) == 0) ? | |
463 | PHY_LINK_SPEED_1000M : | |
464 | (bmcr & BMCR_SPEED100) ? | |
465 | PHY_LINK_SPEED_100M : | |
466 | PHY_LINK_SPEED_10M; | |
467 | ||
468 | phylink |= (bmcr & BMCR_FULLDPLX) ? | |
469 | PHY_LINK_DUPLEX : 0; | |
79ce639c | 470 | |
b3821cc5 | 471 | strcat(linkmsg, "Forced: "); |
cd0ff491 | 472 | } else { |
8c198884 GFT |
473 | /* |
474 | * Keep polling for speed/duplex resolve complete | |
475 | */ | |
cd0ff491 | 476 | while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && |
8c198884 GFT |
477 | --cnt) { |
478 | ||
479 | udelay(1); | |
8c198884 | 480 | |
cd0ff491 | 481 | if (jme->fpgaver) |
cdcdc9eb GFT |
482 | phylink = jme_linkstat_from_phy(jme); |
483 | else | |
484 | phylink = jread32(jme, JME_PHY_LINK); | |
8c198884 | 485 | } |
cd0ff491 | 486 | if (!cnt) |
937ef75a | 487 | pr_err("Waiting speed resolve timeout\n"); |
79ce639c | 488 | |
b3821cc5 | 489 | strcat(linkmsg, "ANed: "); |
d7699f87 GFT |
490 | } |
491 | ||
cd0ff491 | 492 | if (jme->phylink == phylink) { |
fcf45b4c GFT |
493 | rc = 1; |
494 | goto out; | |
495 | } | |
cd0ff491 | 496 | if (testonly) |
fcf45b4c GFT |
497 | goto out; |
498 | ||
499 | jme->phylink = phylink; | |
500 | ||
dc4185bd GFT |
501 | /* |
502 | * The speed/duplex setting of jme->reg_ghc already cleared | |
503 | * by jme_reset_mac_processor() | |
504 | */ | |
cd0ff491 GFT |
505 | switch (phylink & PHY_LINK_SPEED_MASK) { |
506 | case PHY_LINK_SPEED_10M: | |
dc4185bd | 507 | jme->reg_ghc |= GHC_SPEED_10M; |
cd0ff491 | 508 | strcat(linkmsg, "10 Mbps, "); |
cd0ff491 GFT |
509 | break; |
510 | case PHY_LINK_SPEED_100M: | |
dc4185bd | 511 | jme->reg_ghc |= GHC_SPEED_100M; |
cd0ff491 | 512 | strcat(linkmsg, "100 Mbps, "); |
cd0ff491 GFT |
513 | break; |
514 | case PHY_LINK_SPEED_1000M: | |
dc4185bd | 515 | jme->reg_ghc |= GHC_SPEED_1000M; |
cd0ff491 | 516 | strcat(linkmsg, "1000 Mbps, "); |
cd0ff491 GFT |
517 | break; |
518 | default: | |
519 | break; | |
d7699f87 | 520 | } |
d7699f87 | 521 | |
cd0ff491 | 522 | if (phylink & PHY_LINK_DUPLEX) { |
d7699f87 | 523 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); |
809b2798 | 524 | jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX); |
dc4185bd | 525 | jme->reg_ghc |= GHC_DPX; |
cd0ff491 | 526 | } else { |
d7699f87 | 527 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | |
3bf61c55 GFT |
528 | TXMCS_BACKOFF | |
529 | TXMCS_CARRIERSENSE | | |
530 | TXMCS_COLLISION); | |
809b2798 | 531 | jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX); |
8c198884 | 532 | } |
7ee473a3 | 533 | |
dc4185bd GFT |
534 | jwrite32(jme, JME_GHC, jme->reg_ghc); |
535 | ||
7ee473a3 | 536 | if (is_buggy250(jme->pdev->device, jme->chiprev)) { |
dc4185bd GFT |
537 | jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | |
538 | GPREG1_RSSPATCH); | |
7ee473a3 | 539 | if (!(phylink & PHY_LINK_DUPLEX)) |
dc4185bd | 540 | jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH; |
7ee473a3 GFT |
541 | switch (phylink & PHY_LINK_SPEED_MASK) { |
542 | case PHY_LINK_SPEED_10M: | |
55d19799 | 543 | jme_set_phyfifo_8level(jme); |
dc4185bd | 544 | jme->reg_gpreg1 |= GPREG1_RSSPATCH; |
7ee473a3 GFT |
545 | break; |
546 | case PHY_LINK_SPEED_100M: | |
55d19799 | 547 | jme_set_phyfifo_5level(jme); |
dc4185bd | 548 | jme->reg_gpreg1 |= GPREG1_RSSPATCH; |
7ee473a3 GFT |
549 | break; |
550 | case PHY_LINK_SPEED_1000M: | |
55d19799 | 551 | jme_set_phyfifo_8level(jme); |
7ee473a3 GFT |
552 | break; |
553 | default: | |
554 | break; | |
555 | } | |
556 | } | |
dc4185bd | 557 | jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); |
fcf45b4c | 558 | |
3b70a6fa GFT |
559 | strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? |
560 | "Full-Duplex, " : | |
561 | "Half-Duplex, "); | |
562 | strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ? | |
563 | "MDI-X" : | |
564 | "MDI"); | |
937ef75a | 565 | netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg); |
cd0ff491 GFT |
566 | netif_carrier_on(netdev); |
567 | } else { | |
568 | if (testonly) | |
fcf45b4c GFT |
569 | goto out; |
570 | ||
937ef75a | 571 | netif_info(jme, link, jme->dev, "Link is down\n"); |
fcf45b4c | 572 | jme->phylink = 0; |
cd0ff491 | 573 | netif_carrier_off(netdev); |
d7699f87 | 574 | } |
fcf45b4c GFT |
575 | |
576 | out: | |
577 | return rc; | |
d7699f87 GFT |
578 | } |
579 | ||
3bf61c55 GFT |
580 | static int |
581 | jme_setup_tx_resources(struct jme_adapter *jme) | |
d7699f87 | 582 | { |
d7699f87 GFT |
583 | struct jme_ring *txring = &(jme->txring[0]); |
584 | ||
585 | txring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
586 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
587 | &(txring->dmaalloc), | |
588 | GFP_ATOMIC); | |
fcf45b4c | 589 | |
0ede469c GFT |
590 | if (!txring->alloc) |
591 | goto err_set_null; | |
d7699f87 GFT |
592 | |
593 | /* | |
594 | * 16 Bytes align | |
595 | */ | |
cd0ff491 | 596 | txring->desc = (void *)ALIGN((unsigned long)(txring->alloc), |
3bf61c55 | 597 | RING_DESC_ALIGN); |
4330c2f2 | 598 | txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 599 | txring->next_to_use = 0; |
cdcdc9eb | 600 | atomic_set(&txring->next_to_clean, 0); |
b3821cc5 | 601 | atomic_set(&txring->nr_free, jme->tx_ring_size); |
d7699f87 | 602 | |
0ede469c GFT |
603 | txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
604 | jme->tx_ring_size, GFP_ATOMIC); | |
605 | if (unlikely(!(txring->bufinf))) | |
606 | goto err_free_txring; | |
607 | ||
d7699f87 | 608 | /* |
b3821cc5 | 609 | * Initialize Transmit Descriptors |
d7699f87 | 610 | */ |
b3821cc5 | 611 | memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size)); |
3bf61c55 | 612 | memset(txring->bufinf, 0, |
b3821cc5 | 613 | sizeof(struct jme_buffer_info) * jme->tx_ring_size); |
d7699f87 GFT |
614 | |
615 | return 0; | |
0ede469c GFT |
616 | |
617 | err_free_txring: | |
618 | dma_free_coherent(&(jme->pdev->dev), | |
619 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), | |
620 | txring->alloc, | |
621 | txring->dmaalloc); | |
622 | ||
623 | err_set_null: | |
624 | txring->desc = NULL; | |
625 | txring->dmaalloc = 0; | |
626 | txring->dma = 0; | |
627 | txring->bufinf = NULL; | |
628 | ||
629 | return -ENOMEM; | |
d7699f87 GFT |
630 | } |
631 | ||
3bf61c55 GFT |
632 | static void |
633 | jme_free_tx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
634 | { |
635 | int i; | |
636 | struct jme_ring *txring = &(jme->txring[0]); | |
0ede469c | 637 | struct jme_buffer_info *txbi; |
d7699f87 | 638 | |
cd0ff491 | 639 | if (txring->alloc) { |
0ede469c GFT |
640 | if (txring->bufinf) { |
641 | for (i = 0 ; i < jme->tx_ring_size ; ++i) { | |
642 | txbi = txring->bufinf + i; | |
643 | if (txbi->skb) { | |
644 | dev_kfree_skb(txbi->skb); | |
645 | txbi->skb = NULL; | |
646 | } | |
647 | txbi->mapping = 0; | |
648 | txbi->len = 0; | |
649 | txbi->nr_desc = 0; | |
650 | txbi->start_xmit = 0; | |
d7699f87 | 651 | } |
0ede469c | 652 | kfree(txring->bufinf); |
d7699f87 GFT |
653 | } |
654 | ||
655 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 656 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
d7699f87 GFT |
657 | txring->alloc, |
658 | txring->dmaalloc); | |
3bf61c55 GFT |
659 | |
660 | txring->alloc = NULL; | |
661 | txring->desc = NULL; | |
662 | txring->dmaalloc = 0; | |
663 | txring->dma = 0; | |
0ede469c | 664 | txring->bufinf = NULL; |
d7699f87 | 665 | } |
3bf61c55 | 666 | txring->next_to_use = 0; |
cdcdc9eb | 667 | atomic_set(&txring->next_to_clean, 0); |
79ce639c | 668 | atomic_set(&txring->nr_free, 0); |
d7699f87 GFT |
669 | } |
670 | ||
cd0ff491 | 671 | static inline void |
3bf61c55 | 672 | jme_enable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
673 | { |
674 | /* | |
675 | * Select Queue 0 | |
676 | */ | |
677 | jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0); | |
cd0ff491 | 678 | wmb(); |
d7699f87 GFT |
679 | |
680 | /* | |
681 | * Setup TX Queue 0 DMA Bass Address | |
682 | */ | |
fcf45b4c | 683 | jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
3bf61c55 | 684 | jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32); |
fcf45b4c | 685 | jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
d7699f87 GFT |
686 | |
687 | /* | |
688 | * Setup TX Descptor Count | |
689 | */ | |
b3821cc5 | 690 | jwrite32(jme, JME_TXQDC, jme->tx_ring_size); |
d7699f87 GFT |
691 | |
692 | /* | |
693 | * Enable TX Engine | |
694 | */ | |
695 | wmb(); | |
dc4185bd | 696 | jwrite32f(jme, JME_TXCS, jme->reg_txcs | |
4330c2f2 GFT |
697 | TXCS_SELECT_QUEUE0 | |
698 | TXCS_ENABLE); | |
d7699f87 | 699 | |
dc4185bd GFT |
700 | /* |
701 | * Start clock for TX MAC Processor | |
702 | */ | |
703 | jme_mac_txclk_on(jme); | |
d7699f87 GFT |
704 | } |
705 | ||
cd0ff491 | 706 | static inline void |
29bdd921 GFT |
707 | jme_restart_tx_engine(struct jme_adapter *jme) |
708 | { | |
709 | /* | |
710 | * Restart TX Engine | |
711 | */ | |
712 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | |
713 | TXCS_SELECT_QUEUE0 | | |
714 | TXCS_ENABLE); | |
715 | } | |
716 | ||
cd0ff491 | 717 | static inline void |
3bf61c55 | 718 | jme_disable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
719 | { |
720 | int i; | |
cd0ff491 | 721 | u32 val; |
d7699f87 GFT |
722 | |
723 | /* | |
724 | * Disable TX Engine | |
725 | */ | |
fcf45b4c | 726 | jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0); |
cd0ff491 | 727 | wmb(); |
d7699f87 GFT |
728 | |
729 | val = jread32(jme, JME_TXCS); | |
cd0ff491 | 730 | for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) { |
fcf45b4c | 731 | mdelay(1); |
d7699f87 | 732 | val = jread32(jme, JME_TXCS); |
cd0ff491 | 733 | rmb(); |
d7699f87 GFT |
734 | } |
735 | ||
cd0ff491 | 736 | if (!i) |
937ef75a | 737 | pr_err("Disable TX engine timeout\n"); |
dc4185bd GFT |
738 | |
739 | /* | |
740 | * Stop clock for TX MAC Processor | |
741 | */ | |
742 | jme_mac_txclk_off(jme); | |
d7699f87 GFT |
743 | } |
744 | ||
3bf61c55 GFT |
745 | static void |
746 | jme_set_clean_rxdesc(struct jme_adapter *jme, int i) | |
d7699f87 | 747 | { |
0ede469c | 748 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 749 | register struct rxdesc *rxdesc = rxring->desc; |
4330c2f2 GFT |
750 | struct jme_buffer_info *rxbi = rxring->bufinf; |
751 | rxdesc += i; | |
752 | rxbi += i; | |
753 | ||
754 | rxdesc->dw[0] = 0; | |
755 | rxdesc->dw[1] = 0; | |
3bf61c55 | 756 | rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32); |
fcf45b4c GFT |
757 | rxdesc->desc1.bufaddrl = cpu_to_le32( |
758 | (__u64)rxbi->mapping & 0xFFFFFFFFUL); | |
3bf61c55 | 759 | rxdesc->desc1.datalen = cpu_to_le16(rxbi->len); |
cd0ff491 | 760 | if (jme->dev->features & NETIF_F_HIGHDMA) |
3bf61c55 | 761 | rxdesc->desc1.flags = RXFLAG_64BIT; |
d7699f87 | 762 | wmb(); |
3bf61c55 | 763 | rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT; |
d7699f87 GFT |
764 | } |
765 | ||
3bf61c55 GFT |
766 | static int |
767 | jme_make_new_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
768 | { |
769 | struct jme_ring *rxring = &(jme->rxring[0]); | |
b3821cc5 | 770 | struct jme_buffer_info *rxbi = rxring->bufinf + i; |
cd0ff491 | 771 | struct sk_buff *skb; |
1eef180c | 772 | dma_addr_t mapping; |
4330c2f2 | 773 | |
79ce639c GFT |
774 | skb = netdev_alloc_skb(jme->dev, |
775 | jme->dev->mtu + RX_EXTRA_LEN); | |
cd0ff491 | 776 | if (unlikely(!skb)) |
4330c2f2 | 777 | return -ENOMEM; |
3b70a6fa GFT |
778 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) |
779 | skb->dev = jme->dev; | |
780 | #endif | |
3bf61c55 | 781 | |
1eef180c GFT |
782 | mapping = pci_map_page(jme->pdev, virt_to_page(skb->data), |
783 | offset_in_page(skb->data), skb_tailroom(skb), | |
784 | PCI_DMA_FROMDEVICE); | |
6c20aa97 GFT |
785 | #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26) |
786 | if (unlikely(pci_dma_mapping_error(jme->pdev, mapping))) | |
787 | #else | |
788 | if (unlikely(pci_dma_mapping_error(mapping))) | |
789 | #endif | |
790 | { | |
1eef180c GFT |
791 | dev_kfree_skb(skb); |
792 | return -ENOMEM; | |
793 | } | |
794 | ||
795 | if (likely(rxbi->mapping)) | |
796 | pci_unmap_page(jme->pdev, rxbi->mapping, | |
797 | rxbi->len, PCI_DMA_FROMDEVICE); | |
798 | ||
4330c2f2 | 799 | rxbi->skb = skb; |
3bf61c55 | 800 | rxbi->len = skb_tailroom(skb); |
1eef180c | 801 | rxbi->mapping = mapping; |
4330c2f2 GFT |
802 | return 0; |
803 | } | |
804 | ||
3bf61c55 GFT |
805 | static void |
806 | jme_free_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
807 | { |
808 | struct jme_ring *rxring = &(jme->rxring[0]); | |
809 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
810 | rxbi += i; | |
811 | ||
cd0ff491 | 812 | if (rxbi->skb) { |
b3821cc5 | 813 | pci_unmap_page(jme->pdev, |
4330c2f2 | 814 | rxbi->mapping, |
3bf61c55 | 815 | rxbi->len, |
4330c2f2 GFT |
816 | PCI_DMA_FROMDEVICE); |
817 | dev_kfree_skb(rxbi->skb); | |
818 | rxbi->skb = NULL; | |
819 | rxbi->mapping = 0; | |
3bf61c55 | 820 | rxbi->len = 0; |
4330c2f2 GFT |
821 | } |
822 | } | |
823 | ||
3bf61c55 GFT |
824 | static void |
825 | jme_free_rx_resources(struct jme_adapter *jme) | |
826 | { | |
827 | int i; | |
828 | struct jme_ring *rxring = &(jme->rxring[0]); | |
829 | ||
cd0ff491 | 830 | if (rxring->alloc) { |
0ede469c GFT |
831 | if (rxring->bufinf) { |
832 | for (i = 0 ; i < jme->rx_ring_size ; ++i) | |
833 | jme_free_rx_buf(jme, i); | |
834 | kfree(rxring->bufinf); | |
835 | } | |
3bf61c55 GFT |
836 | |
837 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 838 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
3bf61c55 GFT |
839 | rxring->alloc, |
840 | rxring->dmaalloc); | |
841 | rxring->alloc = NULL; | |
842 | rxring->desc = NULL; | |
843 | rxring->dmaalloc = 0; | |
844 | rxring->dma = 0; | |
0ede469c | 845 | rxring->bufinf = NULL; |
3bf61c55 GFT |
846 | } |
847 | rxring->next_to_use = 0; | |
cdcdc9eb | 848 | atomic_set(&rxring->next_to_clean, 0); |
3bf61c55 GFT |
849 | } |
850 | ||
851 | static int | |
852 | jme_setup_rx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
853 | { |
854 | int i; | |
855 | struct jme_ring *rxring = &(jme->rxring[0]); | |
856 | ||
857 | rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
858 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
859 | &(rxring->dmaalloc), | |
860 | GFP_ATOMIC); | |
0ede469c GFT |
861 | if (!rxring->alloc) |
862 | goto err_set_null; | |
d7699f87 GFT |
863 | |
864 | /* | |
865 | * 16 Bytes align | |
866 | */ | |
cd0ff491 | 867 | rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc), |
3bf61c55 | 868 | RING_DESC_ALIGN); |
4330c2f2 | 869 | rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 870 | rxring->next_to_use = 0; |
cdcdc9eb | 871 | atomic_set(&rxring->next_to_clean, 0); |
d7699f87 | 872 | |
0ede469c GFT |
873 | rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
874 | jme->rx_ring_size, GFP_ATOMIC); | |
875 | if (unlikely(!(rxring->bufinf))) | |
876 | goto err_free_rxring; | |
877 | ||
d7699f87 GFT |
878 | /* |
879 | * Initiallize Receive Descriptors | |
880 | */ | |
0ede469c GFT |
881 | memset(rxring->bufinf, 0, |
882 | sizeof(struct jme_buffer_info) * jme->rx_ring_size); | |
cd0ff491 GFT |
883 | for (i = 0 ; i < jme->rx_ring_size ; ++i) { |
884 | if (unlikely(jme_make_new_rx_buf(jme, i))) { | |
3bf61c55 GFT |
885 | jme_free_rx_resources(jme); |
886 | return -ENOMEM; | |
887 | } | |
d7699f87 GFT |
888 | |
889 | jme_set_clean_rxdesc(jme, i); | |
890 | } | |
891 | ||
d7699f87 | 892 | return 0; |
0ede469c GFT |
893 | |
894 | err_free_rxring: | |
895 | dma_free_coherent(&(jme->pdev->dev), | |
896 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), | |
897 | rxring->alloc, | |
898 | rxring->dmaalloc); | |
899 | err_set_null: | |
900 | rxring->desc = NULL; | |
901 | rxring->dmaalloc = 0; | |
902 | rxring->dma = 0; | |
903 | rxring->bufinf = NULL; | |
904 | ||
905 | return -ENOMEM; | |
d7699f87 GFT |
906 | } |
907 | ||
cd0ff491 | 908 | static inline void |
3bf61c55 | 909 | jme_enable_rx_engine(struct jme_adapter *jme) |
d7699f87 | 910 | { |
cd0ff491 GFT |
911 | /* |
912 | * Select Queue 0 | |
913 | */ | |
914 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | | |
915 | RXCS_QUEUESEL_Q0); | |
916 | wmb(); | |
917 | ||
d7699f87 GFT |
918 | /* |
919 | * Setup RX DMA Bass Address | |
920 | */ | |
0ede469c | 921 | jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
3bf61c55 | 922 | jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32); |
0ede469c | 923 | jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
d7699f87 GFT |
924 | |
925 | /* | |
b3821cc5 | 926 | * Setup RX Descriptor Count |
d7699f87 | 927 | */ |
b3821cc5 | 928 | jwrite32(jme, JME_RXQDC, jme->rx_ring_size); |
d7699f87 | 929 | |
3bf61c55 | 930 | /* |
d7699f87 GFT |
931 | * Setup Unicast Filter |
932 | */ | |
e523cd89 | 933 | jme_set_unicastaddr(jme->dev); |
d7699f87 GFT |
934 | jme_set_multi(jme->dev); |
935 | ||
936 | /* | |
937 | * Enable RX Engine | |
938 | */ | |
939 | wmb(); | |
dc4185bd | 940 | jwrite32f(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
941 | RXCS_QUEUESEL_Q0 | |
942 | RXCS_ENABLE | | |
943 | RXCS_QST); | |
dc4185bd GFT |
944 | |
945 | /* | |
946 | * Start clock for RX MAC Processor | |
947 | */ | |
948 | jme_mac_rxclk_on(jme); | |
d7699f87 GFT |
949 | } |
950 | ||
cd0ff491 | 951 | static inline void |
3bf61c55 | 952 | jme_restart_rx_engine(struct jme_adapter *jme) |
4330c2f2 GFT |
953 | { |
954 | /* | |
3bf61c55 | 955 | * Start RX Engine |
4330c2f2 | 956 | */ |
79ce639c | 957 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
958 | RXCS_QUEUESEL_Q0 | |
959 | RXCS_ENABLE | | |
960 | RXCS_QST); | |
961 | } | |
962 | ||
cd0ff491 | 963 | static inline void |
3bf61c55 | 964 | jme_disable_rx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
965 | { |
966 | int i; | |
cd0ff491 | 967 | u32 val; |
d7699f87 GFT |
968 | |
969 | /* | |
970 | * Disable RX Engine | |
971 | */ | |
29bdd921 | 972 | jwrite32(jme, JME_RXCS, jme->reg_rxcs); |
cd0ff491 | 973 | wmb(); |
d7699f87 GFT |
974 | |
975 | val = jread32(jme, JME_RXCS); | |
cd0ff491 | 976 | for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) { |
29bdd921 | 977 | mdelay(1); |
d7699f87 | 978 | val = jread32(jme, JME_RXCS); |
cd0ff491 | 979 | rmb(); |
d7699f87 GFT |
980 | } |
981 | ||
cd0ff491 | 982 | if (!i) |
937ef75a | 983 | pr_err("Disable RX engine timeout\n"); |
d7699f87 | 984 | |
dc4185bd GFT |
985 | /* |
986 | * Stop clock for RX MAC Processor | |
987 | */ | |
988 | jme_mac_rxclk_off(jme); | |
d7699f87 GFT |
989 | } |
990 | ||
93f698ca GFT |
991 | static u16 |
992 | jme_udpsum(struct sk_buff *skb) | |
993 | { | |
994 | u16 csum = 0xFFFFu; | |
65ff9ddf GFT |
995 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
996 | struct iphdr *iph; | |
997 | int iphlen; | |
998 | struct udphdr *udph; | |
999 | #endif | |
93f698ca GFT |
1000 | |
1001 | if (skb->len < (ETH_HLEN + sizeof(struct iphdr))) | |
1002 | return csum; | |
1003 | if (skb->protocol != htons(ETH_P_IP)) | |
1004 | return csum; | |
65ff9ddf GFT |
1005 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
1006 | iph = (struct iphdr *)skb_pull(skb, ETH_HLEN); | |
1007 | iphlen = (iph->ihl << 2); | |
1008 | if ((iph->protocol != IPPROTO_UDP) || | |
1009 | (skb->len < (iphlen + sizeof(struct udphdr)))) { | |
1010 | skb_push(skb, ETH_HLEN); | |
1011 | return csum; | |
1012 | } | |
1013 | udph = (struct udphdr *)skb_pull(skb, iphlen); | |
1014 | csum = udph->check; | |
1015 | skb_push(skb, iphlen); | |
1016 | skb_push(skb, ETH_HLEN); | |
1017 | #else | |
93f698ca GFT |
1018 | skb_set_network_header(skb, ETH_HLEN); |
1019 | if ((ip_hdr(skb)->protocol != IPPROTO_UDP) || | |
1020 | (skb->len < (ETH_HLEN + | |
1021 | (ip_hdr(skb)->ihl << 2) + | |
1022 | sizeof(struct udphdr)))) { | |
1023 | skb_reset_network_header(skb); | |
1024 | return csum; | |
1025 | } | |
1026 | skb_set_transport_header(skb, | |
1027 | ETH_HLEN + (ip_hdr(skb)->ihl << 2)); | |
1028 | csum = udp_hdr(skb)->check; | |
1029 | skb_reset_transport_header(skb); | |
1030 | skb_reset_network_header(skb); | |
65ff9ddf | 1031 | #endif |
93f698ca GFT |
1032 | |
1033 | return csum; | |
1034 | } | |
1035 | ||
192570e0 | 1036 | static int |
93f698ca | 1037 | jme_rxsum_ok(struct jme_adapter *jme, u16 flags, struct sk_buff *skb) |
192570e0 | 1038 | { |
cd0ff491 | 1039 | if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) |
192570e0 GFT |
1040 | return false; |
1041 | ||
0ede469c GFT |
1042 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS)) |
1043 | == RXWBFLAG_TCPON)) { | |
1044 | if (flags & RXWBFLAG_IPV4) | |
7ca9ebee | 1045 | netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n"); |
0ede469c | 1046 | return false; |
192570e0 GFT |
1047 | } |
1048 | ||
0ede469c | 1049 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS)) |
93f698ca | 1050 | == RXWBFLAG_UDPON) && jme_udpsum(skb)) { |
0ede469c | 1051 | if (flags & RXWBFLAG_IPV4) |
937ef75a | 1052 | netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n"); |
0ede469c | 1053 | return false; |
192570e0 GFT |
1054 | } |
1055 | ||
0ede469c GFT |
1056 | if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS)) |
1057 | == RXWBFLAG_IPV4)) { | |
937ef75a | 1058 | netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n"); |
0ede469c | 1059 | return false; |
192570e0 GFT |
1060 | } |
1061 | ||
1062 | return true; | |
1063 | } | |
1064 | ||
3bf61c55 | 1065 | static void |
42b1055e | 1066 | jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) |
d7699f87 | 1067 | { |
d7699f87 | 1068 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 1069 | struct rxdesc *rxdesc = rxring->desc; |
3bf61c55 | 1070 | struct jme_buffer_info *rxbi = rxring->bufinf; |
d7699f87 | 1071 | struct sk_buff *skb; |
3bf61c55 | 1072 | int framesize; |
d7699f87 | 1073 | |
3bf61c55 GFT |
1074 | rxdesc += idx; |
1075 | rxbi += idx; | |
d7699f87 | 1076 | |
3bf61c55 GFT |
1077 | skb = rxbi->skb; |
1078 | pci_dma_sync_single_for_cpu(jme->pdev, | |
1079 | rxbi->mapping, | |
1080 | rxbi->len, | |
1081 | PCI_DMA_FROMDEVICE); | |
1082 | ||
cd0ff491 | 1083 | if (unlikely(jme_make_new_rx_buf(jme, idx))) { |
3bf61c55 GFT |
1084 | pci_dma_sync_single_for_device(jme->pdev, |
1085 | rxbi->mapping, | |
1086 | rxbi->len, | |
1087 | PCI_DMA_FROMDEVICE); | |
1088 | ||
1089 | ++(NET_STAT(jme).rx_dropped); | |
cd0ff491 | 1090 | } else { |
3bf61c55 GFT |
1091 | framesize = le16_to_cpu(rxdesc->descwb.framesize) |
1092 | - RX_PREPAD_SIZE; | |
1093 | ||
1094 | skb_reserve(skb, RX_PREPAD_SIZE); | |
1095 | skb_put(skb, framesize); | |
1096 | skb->protocol = eth_type_trans(skb, jme->dev); | |
1097 | ||
93f698ca | 1098 | if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags), skb)) |
8c198884 | 1099 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
29bdd921 | 1100 | else |
614c0bfd | 1101 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,36) |
29bdd921 | 1102 | skb->ip_summed = CHECKSUM_NONE; |
08f5fcfa ED |
1103 | #else |
1104 | skb_checksum_none_assert(skb); | |
1105 | #endif | |
8c198884 | 1106 | |
5141719b | 1107 | #ifndef __UNIFY_VLAN_RX_PATH__ |
3b70a6fa | 1108 | if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) { |
cd0ff491 | 1109 | if (jme->vlgrp) { |
cdcdc9eb | 1110 | jme->jme_vlan_rx(skb, jme->vlgrp, |
3b70a6fa | 1111 | le16_to_cpu(rxdesc->descwb.vlan)); |
b3821cc5 | 1112 | NET_STAT(jme).rx_bytes += 4; |
7ca9ebee | 1113 | } else { |
7ca9ebee | 1114 | dev_kfree_skb(skb); |
b3821cc5 | 1115 | } |
cd0ff491 | 1116 | } else { |
cdcdc9eb | 1117 | jme->jme_rx(skb); |
b3821cc5 | 1118 | } |
5141719b JP |
1119 | #else |
1120 | if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) { | |
1121 | u16 vid = le16_to_cpu(rxdesc->descwb.vlan); | |
1122 | ||
1123 | __vlan_hwaccel_put_tag(skb, vid); | |
1124 | NET_STAT(jme).rx_bytes += 4; | |
1125 | } | |
1126 | jme->jme_rx(skb); | |
1127 | #endif | |
3bf61c55 | 1128 | |
3b70a6fa GFT |
1129 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) == |
1130 | cpu_to_le16(RXWBFLAG_DEST_MUL)) | |
3bf61c55 GFT |
1131 | ++(NET_STAT(jme).multicast); |
1132 | ||
3bf61c55 GFT |
1133 | NET_STAT(jme).rx_bytes += framesize; |
1134 | ++(NET_STAT(jme).rx_packets); | |
1135 | } | |
1136 | ||
1137 | jme_set_clean_rxdesc(jme, idx); | |
1138 | ||
1139 | } | |
1140 | ||
1141 | static int | |
1142 | jme_process_receive(struct jme_adapter *jme, int limit) | |
1143 | { | |
1144 | struct jme_ring *rxring = &(jme->rxring[0]); | |
cd0ff491 | 1145 | struct rxdesc *rxdesc = rxring->desc; |
b3821cc5 | 1146 | int i, j, ccnt, desccnt, mask = jme->rx_ring_mask; |
3bf61c55 | 1147 | |
cd0ff491 | 1148 | if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) |
192570e0 GFT |
1149 | goto out_inc; |
1150 | ||
cd0ff491 | 1151 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
192570e0 GFT |
1152 | goto out_inc; |
1153 | ||
cd0ff491 | 1154 | if (unlikely(!netif_carrier_ok(jme->dev))) |
192570e0 GFT |
1155 | goto out_inc; |
1156 | ||
cdcdc9eb | 1157 | i = atomic_read(&rxring->next_to_clean); |
0ede469c | 1158 | while (limit > 0) { |
3bf61c55 GFT |
1159 | rxdesc = rxring->desc; |
1160 | rxdesc += i; | |
1161 | ||
3b70a6fa | 1162 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) || |
3bf61c55 GFT |
1163 | !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL)) |
1164 | goto out; | |
0ede469c | 1165 | --limit; |
d7699f87 | 1166 | |
9134abda | 1167 | rmb(); |
4330c2f2 GFT |
1168 | desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; |
1169 | ||
cd0ff491 | 1170 | if (unlikely(desccnt > 1 || |
192570e0 | 1171 | rxdesc->descwb.errstat & RXWBERR_ALLERR)) { |
d7699f87 | 1172 | |
cd0ff491 | 1173 | if (rxdesc->descwb.errstat & RXWBERR_CRCERR) |
3bf61c55 | 1174 | ++(NET_STAT(jme).rx_crc_errors); |
cd0ff491 | 1175 | else if (rxdesc->descwb.errstat & RXWBERR_OVERUN) |
3bf61c55 GFT |
1176 | ++(NET_STAT(jme).rx_fifo_errors); |
1177 | else | |
1178 | ++(NET_STAT(jme).rx_errors); | |
4330c2f2 | 1179 | |
cd0ff491 | 1180 | if (desccnt > 1) |
3bf61c55 | 1181 | limit -= desccnt - 1; |
4330c2f2 | 1182 | |
cd0ff491 | 1183 | for (j = i, ccnt = desccnt ; ccnt-- ; ) { |
4330c2f2 | 1184 | jme_set_clean_rxdesc(jme, j); |
b3821cc5 | 1185 | j = (j + 1) & (mask); |
4330c2f2 | 1186 | } |
3bf61c55 | 1187 | |
cd0ff491 | 1188 | } else { |
42b1055e | 1189 | jme_alloc_and_feed_skb(jme, i); |
3bf61c55 | 1190 | } |
4330c2f2 | 1191 | |
b3821cc5 | 1192 | i = (i + desccnt) & (mask); |
3bf61c55 | 1193 | } |
4330c2f2 | 1194 | |
3bf61c55 | 1195 | out: |
cdcdc9eb | 1196 | atomic_set(&rxring->next_to_clean, i); |
4330c2f2 | 1197 | |
192570e0 GFT |
1198 | out_inc: |
1199 | atomic_inc(&jme->rx_cleaning); | |
1200 | ||
3bf61c55 | 1201 | return limit > 0 ? limit : 0; |
4330c2f2 | 1202 | |
3bf61c55 | 1203 | } |
d7699f87 | 1204 | |
79ce639c GFT |
1205 | static void |
1206 | jme_attempt_pcc(struct dynpcc_info *dpi, int atmp) | |
1207 | { | |
cd0ff491 | 1208 | if (likely(atmp == dpi->cur)) { |
192570e0 | 1209 | dpi->cnt = 0; |
79ce639c | 1210 | return; |
192570e0 | 1211 | } |
79ce639c | 1212 | |
cd0ff491 | 1213 | if (dpi->attempt == atmp) { |
79ce639c | 1214 | ++(dpi->cnt); |
cd0ff491 | 1215 | } else { |
79ce639c GFT |
1216 | dpi->attempt = atmp; |
1217 | dpi->cnt = 0; | |
1218 | } | |
1219 | ||
1220 | } | |
1221 | ||
1222 | static void | |
1223 | jme_dynamic_pcc(struct jme_adapter *jme) | |
1224 | { | |
1225 | register struct dynpcc_info *dpi = &(jme->dpi); | |
1226 | ||
cd0ff491 | 1227 | if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) |
79ce639c | 1228 | jme_attempt_pcc(dpi, PCC_P3); |
7ca9ebee GFT |
1229 | else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD || |
1230 | dpi->intr_cnt > PCC_INTR_THRESHOLD) | |
79ce639c GFT |
1231 | jme_attempt_pcc(dpi, PCC_P2); |
1232 | else | |
1233 | jme_attempt_pcc(dpi, PCC_P1); | |
1234 | ||
cd0ff491 GFT |
1235 | if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { |
1236 | if (dpi->attempt < dpi->cur) | |
1237 | tasklet_schedule(&jme->rxclean_task); | |
79ce639c GFT |
1238 | jme_set_rx_pcc(jme, dpi->attempt); |
1239 | dpi->cur = dpi->attempt; | |
1240 | dpi->cnt = 0; | |
1241 | } | |
1242 | } | |
1243 | ||
1244 | static void | |
1245 | jme_start_pcc_timer(struct jme_adapter *jme) | |
1246 | { | |
1247 | struct dynpcc_info *dpi = &(jme->dpi); | |
1248 | dpi->last_bytes = NET_STAT(jme).rx_bytes; | |
1249 | dpi->last_pkts = NET_STAT(jme).rx_packets; | |
1250 | dpi->intr_cnt = 0; | |
1251 | jwrite32(jme, JME_TMCSR, | |
1252 | TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT)); | |
1253 | } | |
1254 | ||
cd0ff491 | 1255 | static inline void |
29bdd921 GFT |
1256 | jme_stop_pcc_timer(struct jme_adapter *jme) |
1257 | { | |
1258 | jwrite32(jme, JME_TMCSR, 0); | |
1259 | } | |
1260 | ||
cd0ff491 GFT |
1261 | static void |
1262 | jme_shutdown_nic(struct jme_adapter *jme) | |
1263 | { | |
1264 | u32 phylink; | |
1265 | ||
1266 | phylink = jme_linkstat_from_phy(jme); | |
1267 | ||
1268 | if (!(phylink & PHY_LINK_UP)) { | |
1269 | /* | |
1270 | * Disable all interrupt before issue timer | |
1271 | */ | |
1272 | jme_stop_irq(jme); | |
1273 | jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE); | |
1274 | } | |
1275 | } | |
1276 | ||
79ce639c GFT |
1277 | static void |
1278 | jme_pcc_tasklet(unsigned long arg) | |
1279 | { | |
cd0ff491 | 1280 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c GFT |
1281 | struct net_device *netdev = jme->dev; |
1282 | ||
cd0ff491 GFT |
1283 | if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) { |
1284 | jme_shutdown_nic(jme); | |
1285 | return; | |
1286 | } | |
29bdd921 | 1287 | |
cd0ff491 | 1288 | if (unlikely(!netif_carrier_ok(netdev) || |
29bdd921 GFT |
1289 | (atomic_read(&jme->link_changing) != 1) |
1290 | )) { | |
1291 | jme_stop_pcc_timer(jme); | |
79ce639c GFT |
1292 | return; |
1293 | } | |
29bdd921 | 1294 | |
cd0ff491 | 1295 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
192570e0 GFT |
1296 | jme_dynamic_pcc(jme); |
1297 | ||
79ce639c GFT |
1298 | jme_start_pcc_timer(jme); |
1299 | } | |
1300 | ||
cd0ff491 | 1301 | static inline void |
192570e0 GFT |
1302 | jme_polling_mode(struct jme_adapter *jme) |
1303 | { | |
1304 | jme_set_rx_pcc(jme, PCC_OFF); | |
1305 | } | |
1306 | ||
cd0ff491 | 1307 | static inline void |
192570e0 GFT |
1308 | jme_interrupt_mode(struct jme_adapter *jme) |
1309 | { | |
1310 | jme_set_rx_pcc(jme, PCC_P1); | |
1311 | } | |
1312 | ||
cd0ff491 GFT |
1313 | static inline int |
1314 | jme_pseudo_hotplug_enabled(struct jme_adapter *jme) | |
1315 | { | |
1316 | u32 apmc; | |
1317 | apmc = jread32(jme, JME_APMC); | |
1318 | return apmc & JME_APMC_PSEUDO_HP_EN; | |
1319 | } | |
1320 | ||
1321 | static void | |
1322 | jme_start_shutdown_timer(struct jme_adapter *jme) | |
1323 | { | |
1324 | u32 apmc; | |
1325 | ||
1326 | apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN; | |
1327 | apmc &= ~JME_APMC_EPIEN_CTRL; | |
1328 | if (!no_extplug) { | |
1329 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN); | |
1330 | wmb(); | |
1331 | } | |
1332 | jwrite32f(jme, JME_APMC, apmc); | |
1333 | ||
1334 | jwrite32f(jme, JME_TIMER2, 0); | |
1335 | set_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1336 | jwrite32(jme, JME_TMCSR, | |
1337 | TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT)); | |
1338 | } | |
1339 | ||
1340 | static void | |
1341 | jme_stop_shutdown_timer(struct jme_adapter *jme) | |
1342 | { | |
1343 | u32 apmc; | |
1344 | ||
1345 | jwrite32f(jme, JME_TMCSR, 0); | |
1346 | jwrite32f(jme, JME_TIMER2, 0); | |
1347 | clear_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1348 | ||
1349 | apmc = jread32(jme, JME_APMC); | |
1350 | apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL); | |
1351 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS); | |
1352 | wmb(); | |
1353 | jwrite32f(jme, JME_APMC, apmc); | |
1354 | } | |
1355 | ||
3bf61c55 GFT |
1356 | static void |
1357 | jme_link_change_tasklet(unsigned long arg) | |
1358 | { | |
cd0ff491 | 1359 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1360 | struct net_device *netdev = jme->dev; |
fcf45b4c GFT |
1361 | int rc; |
1362 | ||
cd0ff491 GFT |
1363 | while (!atomic_dec_and_test(&jme->link_changing)) { |
1364 | atomic_inc(&jme->link_changing); | |
937ef75a | 1365 | netif_info(jme, intr, jme->dev, "Get link change lock failed\n"); |
58c92f28 | 1366 | while (atomic_read(&jme->link_changing) != 1) |
937ef75a | 1367 | netif_info(jme, intr, jme->dev, "Waiting link change lock\n"); |
cd0ff491 | 1368 | } |
fcf45b4c | 1369 | |
cd0ff491 | 1370 | if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) |
fcf45b4c GFT |
1371 | goto out; |
1372 | ||
29bdd921 | 1373 | jme->old_mtu = netdev->mtu; |
fcf45b4c | 1374 | netif_stop_queue(netdev); |
cd0ff491 GFT |
1375 | if (jme_pseudo_hotplug_enabled(jme)) |
1376 | jme_stop_shutdown_timer(jme); | |
1377 | ||
1378 | jme_stop_pcc_timer(jme); | |
1379 | tasklet_disable(&jme->txclean_task); | |
1380 | tasklet_disable(&jme->rxclean_task); | |
1381 | tasklet_disable(&jme->rxempty_task); | |
1382 | ||
1383 | if (netif_carrier_ok(netdev)) { | |
cd0ff491 GFT |
1384 | jme_disable_rx_engine(jme); |
1385 | jme_disable_tx_engine(jme); | |
fcf45b4c GFT |
1386 | jme_reset_mac_processor(jme); |
1387 | jme_free_rx_resources(jme); | |
1388 | jme_free_tx_resources(jme); | |
192570e0 | 1389 | |
cd0ff491 | 1390 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1391 | jme_polling_mode(jme); |
cd0ff491 GFT |
1392 | |
1393 | netif_carrier_off(netdev); | |
fcf45b4c GFT |
1394 | } |
1395 | ||
1396 | jme_check_link(netdev, 0); | |
cd0ff491 | 1397 | if (netif_carrier_ok(netdev)) { |
fcf45b4c | 1398 | rc = jme_setup_rx_resources(jme); |
cd0ff491 | 1399 | if (rc) { |
937ef75a | 1400 | pr_err("Allocating resources for RX error, Device STOPPED!\n"); |
cd0ff491 | 1401 | goto out_enable_tasklet; |
fcf45b4c GFT |
1402 | } |
1403 | ||
fcf45b4c | 1404 | rc = jme_setup_tx_resources(jme); |
cd0ff491 | 1405 | if (rc) { |
937ef75a | 1406 | pr_err("Allocating resources for TX error, Device STOPPED!\n"); |
fcf45b4c GFT |
1407 | goto err_out_free_rx_resources; |
1408 | } | |
1409 | ||
1410 | jme_enable_rx_engine(jme); | |
1411 | jme_enable_tx_engine(jme); | |
1412 | ||
1413 | netif_start_queue(netdev); | |
192570e0 | 1414 | |
cd0ff491 | 1415 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1416 | jme_interrupt_mode(jme); |
192570e0 | 1417 | |
79ce639c | 1418 | jme_start_pcc_timer(jme); |
cd0ff491 GFT |
1419 | } else if (jme_pseudo_hotplug_enabled(jme)) { |
1420 | jme_start_shutdown_timer(jme); | |
fcf45b4c GFT |
1421 | } |
1422 | ||
cd0ff491 | 1423 | goto out_enable_tasklet; |
fcf45b4c GFT |
1424 | |
1425 | err_out_free_rx_resources: | |
1426 | jme_free_rx_resources(jme); | |
cd0ff491 GFT |
1427 | out_enable_tasklet: |
1428 | tasklet_enable(&jme->txclean_task); | |
1429 | tasklet_hi_enable(&jme->rxclean_task); | |
1430 | tasklet_hi_enable(&jme->rxempty_task); | |
fcf45b4c GFT |
1431 | out: |
1432 | atomic_inc(&jme->link_changing); | |
3bf61c55 | 1433 | } |
d7699f87 | 1434 | |
3bf61c55 GFT |
1435 | static void |
1436 | jme_rx_clean_tasklet(unsigned long arg) | |
1437 | { | |
cd0ff491 | 1438 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c | 1439 | struct dynpcc_info *dpi = &(jme->dpi); |
d7699f87 | 1440 | |
192570e0 GFT |
1441 | jme_process_receive(jme, jme->rx_ring_size); |
1442 | ++(dpi->intr_cnt); | |
42b1055e | 1443 | |
192570e0 | 1444 | } |
fcf45b4c | 1445 | |
192570e0 | 1446 | static int |
cdcdc9eb | 1447 | jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) |
192570e0 | 1448 | { |
cdcdc9eb | 1449 | struct jme_adapter *jme = jme_napi_priv(holder); |
3b70a6fa | 1450 | DECLARE_NETDEV |
192570e0 | 1451 | int rest; |
fcf45b4c | 1452 | |
cdcdc9eb | 1453 | rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget)); |
fcf45b4c | 1454 | |
cd0ff491 | 1455 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb | 1456 | atomic_dec(&jme->rx_empty); |
192570e0 GFT |
1457 | ++(NET_STAT(jme).rx_dropped); |
1458 | jme_restart_rx_engine(jme); | |
1459 | } | |
1460 | atomic_inc(&jme->rx_empty); | |
1461 | ||
cd0ff491 | 1462 | if (rest) { |
cdcdc9eb | 1463 | JME_RX_COMPLETE(netdev, holder); |
192570e0 GFT |
1464 | jme_interrupt_mode(jme); |
1465 | } | |
1466 | ||
cdcdc9eb GFT |
1467 | JME_NAPI_WEIGHT_SET(budget, rest); |
1468 | return JME_NAPI_WEIGHT_VAL(budget) - rest; | |
fcf45b4c GFT |
1469 | } |
1470 | ||
1471 | static void | |
1472 | jme_rx_empty_tasklet(unsigned long arg) | |
1473 | { | |
cd0ff491 | 1474 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1475 | |
cd0ff491 | 1476 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1477 | return; |
1478 | ||
cd0ff491 | 1479 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1480 | return; |
1481 | ||
7ca9ebee | 1482 | netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n"); |
29bdd921 | 1483 | |
fcf45b4c | 1484 | jme_rx_clean_tasklet(arg); |
cdcdc9eb | 1485 | |
cd0ff491 | 1486 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb GFT |
1487 | atomic_dec(&jme->rx_empty); |
1488 | ++(NET_STAT(jme).rx_dropped); | |
1489 | jme_restart_rx_engine(jme); | |
1490 | } | |
1491 | atomic_inc(&jme->rx_empty); | |
4330c2f2 GFT |
1492 | } |
1493 | ||
b3821cc5 GFT |
1494 | static void |
1495 | jme_wake_queue_if_stopped(struct jme_adapter *jme) | |
1496 | { | |
0ede469c | 1497 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1498 | |
1499 | smp_wmb(); | |
cd0ff491 | 1500 | if (unlikely(netif_queue_stopped(jme->dev) && |
b3821cc5 | 1501 | atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) { |
937ef75a | 1502 | netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n"); |
b3821cc5 | 1503 | netif_wake_queue(jme->dev); |
b3821cc5 GFT |
1504 | } |
1505 | ||
1506 | } | |
1507 | ||
3bf61c55 GFT |
1508 | static void |
1509 | jme_tx_clean_tasklet(unsigned long arg) | |
4330c2f2 | 1510 | { |
cd0ff491 | 1511 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
3bf61c55 | 1512 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1513 | struct txdesc *txdesc = txring->desc; |
3bf61c55 | 1514 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi; |
b3821cc5 | 1515 | int i, j, cnt = 0, max, err, mask; |
3bf61c55 | 1516 | |
937ef75a | 1517 | tx_dbg(jme, "Into txclean\n"); |
cd0ff491 GFT |
1518 | |
1519 | if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) | |
fcf45b4c GFT |
1520 | goto out; |
1521 | ||
cd0ff491 | 1522 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1523 | goto out; |
1524 | ||
cd0ff491 | 1525 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1526 | goto out; |
1527 | ||
b3821cc5 GFT |
1528 | max = jme->tx_ring_size - atomic_read(&txring->nr_free); |
1529 | mask = jme->tx_ring_mask; | |
3bf61c55 | 1530 | |
cd0ff491 | 1531 | for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { |
3bf61c55 GFT |
1532 | |
1533 | ctxbi = txbi + i; | |
1534 | ||
cd0ff491 | 1535 | if (likely(ctxbi->skb && |
b3821cc5 | 1536 | !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) { |
8c198884 | 1537 | |
cd0ff491 | 1538 | tx_dbg(jme, "txclean: %d+%d@%lu\n", |
937ef75a | 1539 | i, ctxbi->nr_desc, jiffies); |
3bf61c55 | 1540 | |
cd0ff491 | 1541 | err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; |
3bf61c55 | 1542 | |
cd0ff491 | 1543 | for (j = 1 ; j < ctxbi->nr_desc ; ++j) { |
b3821cc5 GFT |
1544 | ttxbi = txbi + ((i + j) & (mask)); |
1545 | txdesc[(i + j) & (mask)].dw[0] = 0; | |
3bf61c55 | 1546 | |
b3821cc5 | 1547 | pci_unmap_page(jme->pdev, |
3bf61c55 GFT |
1548 | ttxbi->mapping, |
1549 | ttxbi->len, | |
1550 | PCI_DMA_TODEVICE); | |
1551 | ||
3bf61c55 GFT |
1552 | ttxbi->mapping = 0; |
1553 | ttxbi->len = 0; | |
1554 | } | |
1555 | ||
1556 | dev_kfree_skb(ctxbi->skb); | |
3bf61c55 GFT |
1557 | |
1558 | cnt += ctxbi->nr_desc; | |
1559 | ||
cd0ff491 | 1560 | if (unlikely(err)) { |
8c198884 | 1561 | ++(NET_STAT(jme).tx_carrier_errors); |
cd0ff491 | 1562 | } else { |
8c198884 | 1563 | ++(NET_STAT(jme).tx_packets); |
b3821cc5 GFT |
1564 | NET_STAT(jme).tx_bytes += ctxbi->len; |
1565 | } | |
1566 | ||
1567 | ctxbi->skb = NULL; | |
1568 | ctxbi->len = 0; | |
cdcdc9eb | 1569 | ctxbi->start_xmit = 0; |
cd0ff491 GFT |
1570 | |
1571 | } else { | |
3bf61c55 GFT |
1572 | break; |
1573 | } | |
1574 | ||
b3821cc5 | 1575 | i = (i + ctxbi->nr_desc) & mask; |
3bf61c55 GFT |
1576 | |
1577 | ctxbi->nr_desc = 0; | |
d7699f87 GFT |
1578 | } |
1579 | ||
937ef75a | 1580 | tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies); |
cdcdc9eb | 1581 | atomic_set(&txring->next_to_clean, i); |
79ce639c | 1582 | atomic_add(cnt, &txring->nr_free); |
3bf61c55 | 1583 | |
b3821cc5 GFT |
1584 | jme_wake_queue_if_stopped(jme); |
1585 | ||
fcf45b4c GFT |
1586 | out: |
1587 | atomic_inc(&jme->tx_cleaning); | |
d7699f87 GFT |
1588 | } |
1589 | ||
79ce639c | 1590 | static void |
cd0ff491 | 1591 | jme_intr_msi(struct jme_adapter *jme, u32 intrstat) |
d7699f87 | 1592 | { |
3bf61c55 GFT |
1593 | /* |
1594 | * Disable interrupt | |
1595 | */ | |
1596 | jwrite32f(jme, JME_IENC, INTR_ENABLE); | |
d7699f87 | 1597 | |
cd0ff491 | 1598 | if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { |
47220951 GFT |
1599 | /* |
1600 | * Link change event is critical | |
1601 | * all other events are ignored | |
1602 | */ | |
1603 | jwrite32(jme, JME_IEVE, intrstat); | |
3bf61c55 | 1604 | tasklet_schedule(&jme->linkch_task); |
29bdd921 | 1605 | goto out_reenable; |
fcf45b4c | 1606 | } |
d7699f87 | 1607 | |
cd0ff491 | 1608 | if (intrstat & INTR_TMINTR) { |
47220951 | 1609 | jwrite32(jme, JME_IEVE, INTR_TMINTR); |
79ce639c | 1610 | tasklet_schedule(&jme->pcc_task); |
47220951 | 1611 | } |
79ce639c | 1612 | |
cd0ff491 | 1613 | if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { |
47220951 | 1614 | jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0); |
4330c2f2 | 1615 | tasklet_schedule(&jme->txclean_task); |
47220951 GFT |
1616 | } |
1617 | ||
cd0ff491 | 1618 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
47220951 GFT |
1619 | jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO | |
1620 | INTR_PCCRX0 | | |
1621 | INTR_RX0EMP)) | | |
1622 | INTR_RX0); | |
1623 | } | |
d7699f87 | 1624 | |
cd0ff491 GFT |
1625 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
1626 | if (intrstat & INTR_RX0EMP) | |
192570e0 GFT |
1627 | atomic_inc(&jme->rx_empty); |
1628 | ||
cd0ff491 GFT |
1629 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
1630 | if (likely(JME_RX_SCHEDULE_PREP(jme))) { | |
192570e0 | 1631 | jme_polling_mode(jme); |
cdcdc9eb | 1632 | JME_RX_SCHEDULE(jme); |
192570e0 GFT |
1633 | } |
1634 | } | |
cd0ff491 GFT |
1635 | } else { |
1636 | if (intrstat & INTR_RX0EMP) { | |
cdcdc9eb | 1637 | atomic_inc(&jme->rx_empty); |
cd0ff491 GFT |
1638 | tasklet_hi_schedule(&jme->rxempty_task); |
1639 | } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) { | |
1640 | tasklet_hi_schedule(&jme->rxclean_task); | |
cdcdc9eb | 1641 | } |
4330c2f2 | 1642 | } |
d7699f87 | 1643 | |
29bdd921 | 1644 | out_reenable: |
3bf61c55 | 1645 | /* |
fcf45b4c | 1646 | * Re-enable interrupt |
3bf61c55 | 1647 | */ |
fcf45b4c | 1648 | jwrite32f(jme, JME_IENS, INTR_ENABLE); |
79ce639c GFT |
1649 | } |
1650 | ||
3b70a6fa GFT |
1651 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
1652 | static irqreturn_t | |
1653 | jme_intr(int irq, void *dev_id, struct pt_regs *regs) | |
1654 | #else | |
79ce639c GFT |
1655 | static irqreturn_t |
1656 | jme_intr(int irq, void *dev_id) | |
3b70a6fa | 1657 | #endif |
79ce639c | 1658 | { |
cd0ff491 GFT |
1659 | struct net_device *netdev = dev_id; |
1660 | struct jme_adapter *jme = netdev_priv(netdev); | |
1661 | u32 intrstat; | |
79ce639c GFT |
1662 | |
1663 | intrstat = jread32(jme, JME_IEVE); | |
1664 | ||
1665 | /* | |
1666 | * Check if it's really an interrupt for us | |
1667 | */ | |
7ee473a3 | 1668 | if (unlikely((intrstat & INTR_ENABLE) == 0)) |
29bdd921 | 1669 | return IRQ_NONE; |
79ce639c GFT |
1670 | |
1671 | /* | |
1672 | * Check if the device still exist | |
1673 | */ | |
cd0ff491 GFT |
1674 | if (unlikely(intrstat == ~((typeof(intrstat))0))) |
1675 | return IRQ_NONE; | |
79ce639c GFT |
1676 | |
1677 | jme_intr_msi(jme, intrstat); | |
1678 | ||
cd0ff491 | 1679 | return IRQ_HANDLED; |
d7699f87 GFT |
1680 | } |
1681 | ||
3b70a6fa GFT |
1682 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
1683 | static irqreturn_t | |
1684 | jme_msi(int irq, void *dev_id, struct pt_regs *regs) | |
1685 | #else | |
79ce639c GFT |
1686 | static irqreturn_t |
1687 | jme_msi(int irq, void *dev_id) | |
3b70a6fa | 1688 | #endif |
79ce639c | 1689 | { |
cd0ff491 GFT |
1690 | struct net_device *netdev = dev_id; |
1691 | struct jme_adapter *jme = netdev_priv(netdev); | |
1692 | u32 intrstat; | |
79ce639c | 1693 | |
0ede469c | 1694 | intrstat = jread32(jme, JME_IEVE); |
79ce639c GFT |
1695 | |
1696 | jme_intr_msi(jme, intrstat); | |
1697 | ||
cd0ff491 | 1698 | return IRQ_HANDLED; |
79ce639c GFT |
1699 | } |
1700 | ||
79ce639c GFT |
1701 | static void |
1702 | jme_reset_link(struct jme_adapter *jme) | |
1703 | { | |
1704 | jwrite32(jme, JME_TMCSR, TMCSR_SWIT); | |
1705 | } | |
1706 | ||
fcf45b4c GFT |
1707 | static void |
1708 | jme_restart_an(struct jme_adapter *jme) | |
1709 | { | |
cd0ff491 | 1710 | u32 bmcr; |
fcf45b4c | 1711 | |
cd0ff491 | 1712 | spin_lock_bh(&jme->phy_lock); |
fcf45b4c GFT |
1713 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1714 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
1715 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
cd0ff491 | 1716 | spin_unlock_bh(&jme->phy_lock); |
79ce639c GFT |
1717 | } |
1718 | ||
1719 | static int | |
1720 | jme_request_irq(struct jme_adapter *jme) | |
1721 | { | |
1722 | int rc; | |
cd0ff491 | 1723 | struct net_device *netdev = jme->dev; |
3b70a6fa GFT |
1724 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
1725 | irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr; | |
1726 | int irq_flags = SA_SHIRQ; | |
1727 | #else | |
cd0ff491 GFT |
1728 | irq_handler_t handler = jme_intr; |
1729 | int irq_flags = IRQF_SHARED; | |
3b70a6fa | 1730 | #endif |
cd0ff491 GFT |
1731 | |
1732 | if (!pci_enable_msi(jme->pdev)) { | |
1733 | set_bit(JME_FLAG_MSI, &jme->flags); | |
1734 | handler = jme_msi; | |
1735 | irq_flags = 0; | |
1736 | } | |
1737 | ||
1738 | rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, | |
1739 | netdev); | |
1740 | if (rc) { | |
937ef75a JP |
1741 | netdev_err(netdev, |
1742 | "Unable to request %s interrupt (return: %d)\n", | |
1743 | test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx", | |
1744 | rc); | |
79ce639c | 1745 | |
cd0ff491 GFT |
1746 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { |
1747 | pci_disable_msi(jme->pdev); | |
1748 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1749 | } |
cd0ff491 | 1750 | } else { |
79ce639c GFT |
1751 | netdev->irq = jme->pdev->irq; |
1752 | } | |
1753 | ||
cd0ff491 | 1754 | return rc; |
79ce639c GFT |
1755 | } |
1756 | ||
1757 | static void | |
1758 | jme_free_irq(struct jme_adapter *jme) | |
1759 | { | |
cd0ff491 GFT |
1760 | free_irq(jme->pdev->irq, jme->dev); |
1761 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { | |
1762 | pci_disable_msi(jme->pdev); | |
1763 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1764 | jme->dev->irq = jme->pdev->irq; |
cd0ff491 | 1765 | } |
fcf45b4c GFT |
1766 | } |
1767 | ||
ed457bcc GFT |
1768 | static inline void |
1769 | jme_new_phy_on(struct jme_adapter *jme) | |
1770 | { | |
1771 | u32 reg; | |
1772 | ||
1773 | reg = jread32(jme, JME_PHY_PWR); | |
1774 | reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | | |
1775 | PHY_PWR_DWN2 | PHY_PWR_CLKSEL); | |
1776 | jwrite32(jme, JME_PHY_PWR, reg); | |
1777 | ||
1778 | pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); | |
1779 | reg &= ~PE1_GPREG0_PBG; | |
1780 | reg |= PE1_GPREG0_ENBG; | |
1781 | pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); | |
1782 | } | |
1783 | ||
1784 | static inline void | |
1785 | jme_new_phy_off(struct jme_adapter *jme) | |
1786 | { | |
1787 | u32 reg; | |
1788 | ||
1789 | reg = jread32(jme, JME_PHY_PWR); | |
1790 | reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | | |
1791 | PHY_PWR_DWN2 | PHY_PWR_CLKSEL; | |
1792 | jwrite32(jme, JME_PHY_PWR, reg); | |
1793 | ||
1794 | pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); | |
1795 | reg &= ~PE1_GPREG0_PBG; | |
1796 | reg |= PE1_GPREG0_PDD3COLD; | |
1797 | pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); | |
1798 | } | |
1799 | ||
e58b908e GFT |
1800 | static inline void |
1801 | jme_phy_on(struct jme_adapter *jme) | |
1802 | { | |
1803 | u32 bmcr; | |
1804 | ||
1805 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1806 | bmcr &= ~BMCR_PDOWN; | |
1807 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
ed457bcc GFT |
1808 | |
1809 | if (new_phy_power_ctrl(jme->chip_main_rev)) | |
1810 | jme_new_phy_on(jme); | |
1811 | } | |
1812 | ||
1813 | static inline void | |
1814 | jme_phy_off(struct jme_adapter *jme) | |
1815 | { | |
1816 | u32 bmcr; | |
1817 | ||
1818 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1819 | bmcr |= BMCR_PDOWN; | |
1820 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
1821 | ||
1822 | if (new_phy_power_ctrl(jme->chip_main_rev)) | |
1823 | jme_new_phy_off(jme); | |
e58b908e GFT |
1824 | } |
1825 | ||
3bf61c55 GFT |
1826 | static int |
1827 | jme_open(struct net_device *netdev) | |
d7699f87 GFT |
1828 | { |
1829 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 1830 | int rc; |
79ce639c | 1831 | |
42b1055e | 1832 | jme_clear_pm(jme); |
cdcdc9eb | 1833 | JME_NAPI_ENABLE(jme); |
d7699f87 | 1834 | |
0ede469c | 1835 | tasklet_enable(&jme->linkch_task); |
cd0ff491 GFT |
1836 | tasklet_enable(&jme->txclean_task); |
1837 | tasklet_hi_enable(&jme->rxclean_task); | |
1838 | tasklet_hi_enable(&jme->rxempty_task); | |
1839 | ||
79ce639c | 1840 | rc = jme_request_irq(jme); |
cd0ff491 | 1841 | if (rc) |
4330c2f2 | 1842 | goto err_out; |
79ce639c | 1843 | |
d7699f87 | 1844 | jme_start_irq(jme); |
42b1055e | 1845 | |
ed457bcc GFT |
1846 | jme_phy_on(jme); |
1847 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
42b1055e | 1848 | jme_set_settings(netdev, &jme->old_ecmd); |
ed457bcc | 1849 | else |
42b1055e GFT |
1850 | jme_reset_phy_processor(jme); |
1851 | ||
29bdd921 | 1852 | jme_reset_link(jme); |
d7699f87 GFT |
1853 | |
1854 | return 0; | |
1855 | ||
d7699f87 GFT |
1856 | err_out: |
1857 | netif_stop_queue(netdev); | |
1858 | netif_carrier_off(netdev); | |
4330c2f2 | 1859 | return rc; |
d7699f87 GFT |
1860 | } |
1861 | ||
42b1055e GFT |
1862 | static void |
1863 | jme_set_100m_half(struct jme_adapter *jme) | |
1864 | { | |
cd0ff491 | 1865 | u32 bmcr, tmp; |
42b1055e | 1866 | |
a82e368c | 1867 | jme_phy_on(jme); |
42b1055e GFT |
1868 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1869 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | | |
1870 | BMCR_SPEED1000 | BMCR_FULLDPLX); | |
1871 | tmp |= BMCR_SPEED100; | |
1872 | ||
1873 | if (bmcr != tmp) | |
1874 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp); | |
1875 | ||
cd0ff491 | 1876 | if (jme->fpgaver) |
cdcdc9eb GFT |
1877 | jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL); |
1878 | else | |
1879 | jwrite32(jme, JME_GHC, GHC_SPEED_100M); | |
42b1055e GFT |
1880 | } |
1881 | ||
47220951 GFT |
1882 | #define JME_WAIT_LINK_TIME 2000 /* 2000ms */ |
1883 | static void | |
1884 | jme_wait_link(struct jme_adapter *jme) | |
1885 | { | |
cd0ff491 | 1886 | u32 phylink, to = JME_WAIT_LINK_TIME; |
47220951 GFT |
1887 | |
1888 | mdelay(1000); | |
1889 | phylink = jme_linkstat_from_phy(jme); | |
cd0ff491 | 1890 | while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { |
47220951 GFT |
1891 | mdelay(10); |
1892 | phylink = jme_linkstat_from_phy(jme); | |
1893 | } | |
1894 | } | |
1895 | ||
a82e368c GFT |
1896 | static void |
1897 | jme_powersave_phy(struct jme_adapter *jme) | |
1898 | { | |
1899 | if (jme->reg_pmcs) { | |
1900 | jme_set_100m_half(jme); | |
a82e368c GFT |
1901 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
1902 | jme_wait_link(jme); | |
61891ee4 | 1903 | jme_clear_pm(jme); |
a82e368c GFT |
1904 | } else { |
1905 | jme_phy_off(jme); | |
1906 | } | |
1907 | } | |
1908 | ||
3bf61c55 GFT |
1909 | static int |
1910 | jme_close(struct net_device *netdev) | |
d7699f87 GFT |
1911 | { |
1912 | struct jme_adapter *jme = netdev_priv(netdev); | |
1913 | ||
1914 | netif_stop_queue(netdev); | |
1915 | netif_carrier_off(netdev); | |
1916 | ||
1917 | jme_stop_irq(jme); | |
79ce639c | 1918 | jme_free_irq(jme); |
d7699f87 | 1919 | |
cdcdc9eb | 1920 | JME_NAPI_DISABLE(jme); |
192570e0 | 1921 | |
0ede469c GFT |
1922 | tasklet_disable(&jme->linkch_task); |
1923 | tasklet_disable(&jme->txclean_task); | |
1924 | tasklet_disable(&jme->rxclean_task); | |
1925 | tasklet_disable(&jme->rxempty_task); | |
8c198884 | 1926 | |
cd0ff491 GFT |
1927 | jme_disable_rx_engine(jme); |
1928 | jme_disable_tx_engine(jme); | |
8c198884 | 1929 | jme_reset_mac_processor(jme); |
d7699f87 GFT |
1930 | jme_free_rx_resources(jme); |
1931 | jme_free_tx_resources(jme); | |
42b1055e | 1932 | jme->phylink = 0; |
b3821cc5 GFT |
1933 | jme_phy_off(jme); |
1934 | ||
1935 | return 0; | |
1936 | } | |
1937 | ||
1938 | static int | |
1939 | jme_alloc_txdesc(struct jme_adapter *jme, | |
1940 | struct sk_buff *skb) | |
1941 | { | |
0ede469c | 1942 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1943 | int idx, nr_alloc, mask = jme->tx_ring_mask; |
1944 | ||
1945 | idx = txring->next_to_use; | |
1946 | nr_alloc = skb_shinfo(skb)->nr_frags + 2; | |
1947 | ||
cd0ff491 | 1948 | if (unlikely(atomic_read(&txring->nr_free) < nr_alloc)) |
b3821cc5 GFT |
1949 | return -1; |
1950 | ||
1951 | atomic_sub(nr_alloc, &txring->nr_free); | |
42b1055e | 1952 | |
b3821cc5 GFT |
1953 | txring->next_to_use = (txring->next_to_use + nr_alloc) & mask; |
1954 | ||
1955 | return idx; | |
1956 | } | |
1957 | ||
1958 | static void | |
1959 | jme_fill_tx_map(struct pci_dev *pdev, | |
cd0ff491 | 1960 | struct txdesc *txdesc, |
b3821cc5 GFT |
1961 | struct jme_buffer_info *txbi, |
1962 | struct page *page, | |
cd0ff491 GFT |
1963 | u32 page_offset, |
1964 | u32 len, | |
1965 | u8 hidma) | |
b3821cc5 GFT |
1966 | { |
1967 | dma_addr_t dmaaddr; | |
1968 | ||
1969 | dmaaddr = pci_map_page(pdev, | |
1970 | page, | |
1971 | page_offset, | |
1972 | len, | |
1973 | PCI_DMA_TODEVICE); | |
1974 | ||
1975 | pci_dma_sync_single_for_device(pdev, | |
1976 | dmaaddr, | |
1977 | len, | |
1978 | PCI_DMA_TODEVICE); | |
1979 | ||
1980 | txdesc->dw[0] = 0; | |
1981 | txdesc->dw[1] = 0; | |
1982 | txdesc->desc2.flags = TXFLAG_OWN; | |
cd0ff491 | 1983 | txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0; |
b3821cc5 GFT |
1984 | txdesc->desc2.datalen = cpu_to_le16(len); |
1985 | txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32); | |
1986 | txdesc->desc2.bufaddrl = cpu_to_le32( | |
1987 | (__u64)dmaaddr & 0xFFFFFFFFUL); | |
1988 | ||
1989 | txbi->mapping = dmaaddr; | |
1990 | txbi->len = len; | |
1991 | } | |
1992 | ||
1993 | static void | |
1994 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
1995 | { | |
0ede469c | 1996 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1997 | struct txdesc *txdesc = txring->desc, *ctxdesc; |
b3821cc5 | 1998 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; |
e0ae0351 | 1999 | u8 hidma = !!(jme->dev->features & NETIF_F_HIGHDMA); |
b3821cc5 GFT |
2000 | int i, nr_frags = skb_shinfo(skb)->nr_frags; |
2001 | int mask = jme->tx_ring_mask; | |
a2f95d81 | 2002 | const struct skb_frag_struct *frag; |
cd0ff491 | 2003 | u32 len; |
b3821cc5 | 2004 | |
cd0ff491 GFT |
2005 | for (i = 0 ; i < nr_frags ; ++i) { |
2006 | frag = &skb_shinfo(skb)->frags[i]; | |
b3821cc5 GFT |
2007 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); |
2008 | ctxbi = txbi + ((idx + i + 2) & (mask)); | |
2009 | ||
c6324444 | 2010 | #ifndef __USE_SKB_FRAG_API__ |
b3821cc5 GFT |
2011 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page, |
2012 | frag->page_offset, frag->size, hidma); | |
c6324444 IC |
2013 | #else |
2014 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, | |
2015 | skb_frag_page(frag), | |
a2f95d81 | 2016 | frag->page_offset, skb_frag_size(frag), hidma); |
c6324444 | 2017 | #endif |
42b1055e | 2018 | } |
b3821cc5 | 2019 | |
cd0ff491 | 2020 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
b3821cc5 GFT |
2021 | ctxdesc = txdesc + ((idx + 1) & (mask)); |
2022 | ctxbi = txbi + ((idx + 1) & (mask)); | |
2023 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
2024 | offset_in_page(skb->data), len, hidma); | |
2025 | ||
2026 | } | |
2027 | ||
2028 | static int | |
2029 | jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) | |
2030 | { | |
3b70a6fa | 2031 | if (unlikely( |
0ede469c | 2032 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17) |
3b70a6fa GFT |
2033 | skb_shinfo(skb)->tso_size |
2034 | #else | |
2035 | skb_shinfo(skb)->gso_size | |
2036 | #endif | |
2037 | && skb_header_cloned(skb) && | |
b3821cc5 GFT |
2038 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) { |
2039 | dev_kfree_skb(skb); | |
2040 | return -1; | |
2041 | } | |
2042 | ||
2043 | return 0; | |
2044 | } | |
2045 | ||
2046 | static int | |
3b70a6fa | 2047 | jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags) |
b3821cc5 | 2048 | { |
0ede469c | 2049 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17) |
3b70a6fa GFT |
2050 | *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT); |
2051 | #else | |
2052 | *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT); | |
2053 | #endif | |
cd0ff491 | 2054 | if (*mss) { |
b3821cc5 GFT |
2055 | *flags |= TXFLAG_LSEN; |
2056 | ||
cd0ff491 | 2057 | if (skb->protocol == htons(ETH_P_IP)) { |
b3821cc5 GFT |
2058 | struct iphdr *iph = ip_hdr(skb); |
2059 | ||
2060 | iph->check = 0; | |
cd0ff491 | 2061 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
b3821cc5 GFT |
2062 | iph->daddr, 0, |
2063 | IPPROTO_TCP, | |
2064 | 0); | |
cd0ff491 | 2065 | } else { |
b3821cc5 GFT |
2066 | struct ipv6hdr *ip6h = ipv6_hdr(skb); |
2067 | ||
cd0ff491 | 2068 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, |
b3821cc5 GFT |
2069 | &ip6h->daddr, 0, |
2070 | IPPROTO_TCP, | |
2071 | 0); | |
2072 | } | |
2073 | ||
2074 | return 0; | |
2075 | } | |
2076 | ||
2077 | return 1; | |
2078 | } | |
2079 | ||
2080 | static void | |
cd0ff491 | 2081 | jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags) |
b3821cc5 | 2082 | { |
3b70a6fa GFT |
2083 | #ifdef CHECKSUM_PARTIAL |
2084 | if (skb->ip_summed == CHECKSUM_PARTIAL) | |
2085 | #else | |
2086 | if (skb->ip_summed == CHECKSUM_HW) | |
2087 | #endif | |
2088 | { | |
cd0ff491 | 2089 | u8 ip_proto; |
b3821cc5 | 2090 | |
3b70a6fa GFT |
2091 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
2092 | if (skb->protocol == htons(ETH_P_IP)) | |
2093 | ip_proto = ip_hdr(skb)->protocol; | |
2094 | else if (skb->protocol == htons(ETH_P_IPV6)) | |
2095 | ip_proto = ipv6_hdr(skb)->nexthdr; | |
2096 | else | |
2097 | ip_proto = 0; | |
2098 | #else | |
b3821cc5 | 2099 | switch (skb->protocol) { |
cd0ff491 | 2100 | case htons(ETH_P_IP): |
b3821cc5 GFT |
2101 | ip_proto = ip_hdr(skb)->protocol; |
2102 | break; | |
cd0ff491 | 2103 | case htons(ETH_P_IPV6): |
b3821cc5 GFT |
2104 | ip_proto = ipv6_hdr(skb)->nexthdr; |
2105 | break; | |
2106 | default: | |
2107 | ip_proto = 0; | |
2108 | break; | |
2109 | } | |
3b70a6fa | 2110 | #endif |
b3821cc5 | 2111 | |
cd0ff491 | 2112 | switch (ip_proto) { |
b3821cc5 GFT |
2113 | case IPPROTO_TCP: |
2114 | *flags |= TXFLAG_TCPCS; | |
2115 | break; | |
2116 | case IPPROTO_UDP: | |
2117 | *flags |= TXFLAG_UDPCS; | |
2118 | break; | |
2119 | default: | |
937ef75a | 2120 | netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n"); |
b3821cc5 GFT |
2121 | break; |
2122 | } | |
2123 | } | |
2124 | } | |
2125 | ||
cd0ff491 | 2126 | static inline void |
3b70a6fa | 2127 | jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags) |
b3821cc5 | 2128 | { |
cd0ff491 | 2129 | if (vlan_tx_tag_present(skb)) { |
b3821cc5 | 2130 | *flags |= TXFLAG_TAGON; |
3b70a6fa | 2131 | *vlan = cpu_to_le16(vlan_tx_tag_get(skb)); |
42b1055e | 2132 | } |
b3821cc5 GFT |
2133 | } |
2134 | ||
2135 | static int | |
3b70a6fa | 2136 | jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) |
b3821cc5 | 2137 | { |
0ede469c | 2138 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 2139 | struct txdesc *txdesc; |
b3821cc5 | 2140 | struct jme_buffer_info *txbi; |
cd0ff491 | 2141 | u8 flags; |
b3821cc5 | 2142 | |
cd0ff491 | 2143 | txdesc = (struct txdesc *)txring->desc + idx; |
b3821cc5 GFT |
2144 | txbi = txring->bufinf + idx; |
2145 | ||
2146 | txdesc->dw[0] = 0; | |
2147 | txdesc->dw[1] = 0; | |
2148 | txdesc->dw[2] = 0; | |
2149 | txdesc->dw[3] = 0; | |
2150 | txdesc->desc1.pktsize = cpu_to_le16(skb->len); | |
2151 | /* | |
2152 | * Set OWN bit at final. | |
2153 | * When kernel transmit faster than NIC. | |
2154 | * And NIC trying to send this descriptor before we tell | |
2155 | * it to start sending this TX queue. | |
2156 | * Other fields are already filled correctly. | |
2157 | */ | |
2158 | wmb(); | |
2159 | flags = TXFLAG_OWN | TXFLAG_INT; | |
cd0ff491 GFT |
2160 | /* |
2161 | * Set checksum flags while not tso | |
2162 | */ | |
2163 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) | |
2164 | jme_tx_csum(jme, skb, &flags); | |
b3821cc5 | 2165 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); |
3b70a6fa | 2166 | jme_map_tx_skb(jme, skb, idx); |
b3821cc5 GFT |
2167 | txdesc->desc1.flags = flags; |
2168 | /* | |
2169 | * Set tx buffer info after telling NIC to send | |
2170 | * For better tx_clean timing | |
2171 | */ | |
2172 | wmb(); | |
2173 | txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2; | |
2174 | txbi->skb = skb; | |
2175 | txbi->len = skb->len; | |
cd0ff491 GFT |
2176 | txbi->start_xmit = jiffies; |
2177 | if (!txbi->start_xmit) | |
8d27293f | 2178 | txbi->start_xmit = (0UL-1); |
d7699f87 GFT |
2179 | |
2180 | return 0; | |
2181 | } | |
2182 | ||
b3821cc5 GFT |
2183 | static void |
2184 | jme_stop_queue_if_full(struct jme_adapter *jme) | |
2185 | { | |
0ede469c | 2186 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 GFT |
2187 | struct jme_buffer_info *txbi = txring->bufinf; |
2188 | int idx = atomic_read(&txring->next_to_clean); | |
cdcdc9eb | 2189 | |
cd0ff491 | 2190 | txbi += idx; |
b3821cc5 GFT |
2191 | |
2192 | smp_wmb(); | |
cd0ff491 | 2193 | if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { |
b3821cc5 | 2194 | netif_stop_queue(jme->dev); |
937ef75a | 2195 | netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n"); |
b3821cc5 | 2196 | smp_wmb(); |
cd0ff491 GFT |
2197 | if (atomic_read(&txring->nr_free) |
2198 | >= (jme->tx_wake_threshold)) { | |
b3821cc5 | 2199 | netif_wake_queue(jme->dev); |
937ef75a | 2200 | netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n"); |
b3821cc5 GFT |
2201 | } |
2202 | } | |
2203 | ||
cd0ff491 | 2204 | if (unlikely(txbi->start_xmit && |
cdcdc9eb GFT |
2205 | (jiffies - txbi->start_xmit) >= TX_TIMEOUT && |
2206 | txbi->skb)) { | |
2207 | netif_stop_queue(jme->dev); | |
e3b96dc9 GFT |
2208 | netif_info(jme, tx_queued, jme->dev, |
2209 | "TX Queue Stopped %d@%lu\n", idx, jiffies); | |
cdcdc9eb | 2210 | } |
b3821cc5 GFT |
2211 | } |
2212 | ||
3bf61c55 GFT |
2213 | /* |
2214 | * This function is already protected by netif_tx_lock() | |
2215 | */ | |
cd0ff491 | 2216 | |
7ca9ebee | 2217 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31) |
3bf61c55 | 2218 | static int |
7ca9ebee GFT |
2219 | #else |
2220 | static netdev_tx_t | |
2221 | #endif | |
3bf61c55 | 2222 | jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) |
d7699f87 | 2223 | { |
cd0ff491 | 2224 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2225 | int idx; |
d7699f87 | 2226 | |
cd0ff491 | 2227 | if (unlikely(jme_expand_header(jme, skb))) { |
b3821cc5 GFT |
2228 | ++(NET_STAT(jme).tx_dropped); |
2229 | return NETDEV_TX_OK; | |
2230 | } | |
2231 | ||
2232 | idx = jme_alloc_txdesc(jme, skb); | |
79ce639c | 2233 | |
cd0ff491 | 2234 | if (unlikely(idx < 0)) { |
b3821cc5 | 2235 | netif_stop_queue(netdev); |
937ef75a JP |
2236 | netif_err(jme, tx_err, jme->dev, |
2237 | "BUG! Tx ring full when queue awake!\n"); | |
d7699f87 | 2238 | |
cd0ff491 | 2239 | return NETDEV_TX_BUSY; |
b3821cc5 GFT |
2240 | } |
2241 | ||
3b70a6fa | 2242 | jme_fill_tx_desc(jme, skb, idx); |
b3821cc5 | 2243 | |
4330c2f2 GFT |
2244 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
2245 | TXCS_SELECT_QUEUE0 | | |
2246 | TXCS_QUEUE0S | | |
2247 | TXCS_ENABLE); | |
0ede469c | 2248 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29) |
d7699f87 | 2249 | netdev->trans_start = jiffies; |
0ede469c | 2250 | #endif |
d7699f87 | 2251 | |
937ef75a JP |
2252 | tx_dbg(jme, "xmit: %d+%d@%lu\n", |
2253 | idx, skb_shinfo(skb)->nr_frags + 2, jiffies); | |
b3821cc5 GFT |
2254 | jme_stop_queue_if_full(jme); |
2255 | ||
cd0ff491 | 2256 | return NETDEV_TX_OK; |
d7699f87 GFT |
2257 | } |
2258 | ||
e523cd89 GFT |
2259 | static void |
2260 | jme_set_unicastaddr(struct net_device *netdev) | |
2261 | { | |
2262 | struct jme_adapter *jme = netdev_priv(netdev); | |
2263 | u32 val; | |
2264 | ||
2265 | val = (netdev->dev_addr[3] & 0xff) << 24 | | |
2266 | (netdev->dev_addr[2] & 0xff) << 16 | | |
2267 | (netdev->dev_addr[1] & 0xff) << 8 | | |
2268 | (netdev->dev_addr[0] & 0xff); | |
2269 | jwrite32(jme, JME_RXUMA_LO, val); | |
2270 | val = (netdev->dev_addr[5] & 0xff) << 8 | | |
2271 | (netdev->dev_addr[4] & 0xff); | |
2272 | jwrite32(jme, JME_RXUMA_HI, val); | |
2273 | } | |
2274 | ||
3bf61c55 GFT |
2275 | static int |
2276 | jme_set_macaddr(struct net_device *netdev, void *p) | |
d7699f87 | 2277 | { |
cd0ff491 | 2278 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2279 | struct sockaddr *addr = p; |
d7699f87 | 2280 | |
cd0ff491 | 2281 | if (netif_running(netdev)) |
d7699f87 GFT |
2282 | return -EBUSY; |
2283 | ||
cd0ff491 | 2284 | spin_lock_bh(&jme->macaddr_lock); |
d7699f87 | 2285 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
e523cd89 | 2286 | jme_set_unicastaddr(netdev); |
cd0ff491 | 2287 | spin_unlock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
2288 | |
2289 | return 0; | |
2290 | } | |
2291 | ||
3bf61c55 GFT |
2292 | static void |
2293 | jme_set_multi(struct net_device *netdev) | |
d7699f87 | 2294 | { |
3bf61c55 | 2295 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2296 | u32 mc_hash[2] = {}; |
7ca9ebee | 2297 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33) |
d7699f87 | 2298 | int i; |
7ca9ebee | 2299 | #endif |
d7699f87 | 2300 | |
cd0ff491 | 2301 | spin_lock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2302 | |
2303 | jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME; | |
d7699f87 | 2304 | |
cd0ff491 | 2305 | if (netdev->flags & IFF_PROMISC) { |
8c198884 | 2306 | jme->reg_rxmcs |= RXMCS_ALLFRAME; |
cd0ff491 | 2307 | } else if (netdev->flags & IFF_ALLMULTI) { |
8c198884 | 2308 | jme->reg_rxmcs |= RXMCS_ALLMULFRAME; |
cd0ff491 | 2309 | } else if (netdev->flags & IFF_MULTICAST) { |
8e14c278 | 2310 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34) |
3bf61c55 | 2311 | struct dev_mc_list *mclist; |
8e14c278 JP |
2312 | #else |
2313 | struct netdev_hw_addr *ha; | |
2314 | #endif | |
3bf61c55 | 2315 | int bit_nr; |
d7699f87 | 2316 | |
8c198884 | 2317 | jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED; |
7ca9ebee | 2318 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33) |
3bf61c55 GFT |
2319 | for (i = 0, mclist = netdev->mc_list; |
2320 | mclist && i < netdev->mc_count; | |
2321 | ++i, mclist = mclist->next) { | |
8e14c278 | 2322 | #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34) |
7ca9ebee | 2323 | netdev_for_each_mc_addr(mclist, netdev) { |
8e14c278 JP |
2324 | #else |
2325 | netdev_for_each_mc_addr(ha, netdev) { | |
7ca9ebee | 2326 | #endif |
8e14c278 | 2327 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34) |
cd0ff491 | 2328 | bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F; |
8e14c278 JP |
2329 | #else |
2330 | bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F; | |
2331 | #endif | |
cd0ff491 GFT |
2332 | mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); |
2333 | } | |
d7699f87 | 2334 | |
4330c2f2 GFT |
2335 | jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]); |
2336 | jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]); | |
d7699f87 GFT |
2337 | } |
2338 | ||
d7699f87 | 2339 | wmb(); |
8c198884 GFT |
2340 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); |
2341 | ||
cd0ff491 | 2342 | spin_unlock_bh(&jme->rxmcs_lock); |
d7699f87 GFT |
2343 | } |
2344 | ||
3bf61c55 | 2345 | static int |
8c198884 | 2346 | jme_change_mtu(struct net_device *netdev, int new_mtu) |
d7699f87 | 2347 | { |
cd0ff491 | 2348 | struct jme_adapter *jme = netdev_priv(netdev); |
79ce639c | 2349 | |
cd0ff491 | 2350 | if (new_mtu == jme->old_mtu) |
29bdd921 GFT |
2351 | return 0; |
2352 | ||
cd0ff491 GFT |
2353 | if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || |
2354 | ((new_mtu) < IPV6_MIN_MTU)) | |
2355 | return -EINVAL; | |
79ce639c | 2356 | |
cd0ff491 | 2357 | if (new_mtu > 4000) { |
79ce639c GFT |
2358 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2359 | jme->reg_rxcs |= RXCS_FIFOTHNP_64QW; | |
2360 | jme_restart_rx_engine(jme); | |
cd0ff491 | 2361 | } else { |
79ce639c GFT |
2362 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2363 | jme->reg_rxcs |= RXCS_FIFOTHNP_128QW; | |
2364 | jme_restart_rx_engine(jme); | |
2365 | } | |
2366 | ||
767e5b98 | 2367 | #ifndef __USE_NDO_FIX_FEATURES__ |
cd0ff491 | 2368 | if (new_mtu > 1900) { |
1a0b42f4 MM |
2369 | netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | |
2370 | NETIF_F_TSO | NETIF_F_TSO6); | |
cd0ff491 GFT |
2371 | } else { |
2372 | if (test_bit(JME_FLAG_TXCSUM, &jme->flags)) | |
1a0b42f4 | 2373 | netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
cd0ff491 | 2374 | if (test_bit(JME_FLAG_TSO, &jme->flags)) |
1a0b42f4 | 2375 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
79ce639c | 2376 | } |
767e5b98 | 2377 | #endif |
79ce639c | 2378 | |
cd0ff491 | 2379 | netdev->mtu = new_mtu; |
767e5b98 MM |
2380 | #ifdef __USE_NDO_FIX_FEATURES__ |
2381 | netdev_update_features(netdev); | |
2382 | #endif | |
cd0ff491 | 2383 | jme_reset_link(jme); |
79ce639c GFT |
2384 | |
2385 | return 0; | |
d7699f87 GFT |
2386 | } |
2387 | ||
8c198884 GFT |
2388 | static void |
2389 | jme_tx_timeout(struct net_device *netdev) | |
2390 | { | |
cd0ff491 | 2391 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 | 2392 | |
cdcdc9eb GFT |
2393 | jme->phylink = 0; |
2394 | jme_reset_phy_processor(jme); | |
cd0ff491 | 2395 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
cdcdc9eb GFT |
2396 | jme_set_settings(netdev, &jme->old_ecmd); |
2397 | ||
8c198884 | 2398 | /* |
cdcdc9eb | 2399 | * Force to Reset the link again |
8c198884 | 2400 | */ |
29bdd921 | 2401 | jme_reset_link(jme); |
8c198884 GFT |
2402 | } |
2403 | ||
1e5ebebc GFT |
2404 | static inline void jme_pause_rx(struct jme_adapter *jme) |
2405 | { | |
2406 | atomic_dec(&jme->link_changing); | |
2407 | ||
2408 | jme_set_rx_pcc(jme, PCC_OFF); | |
2409 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2410 | JME_NAPI_DISABLE(jme); | |
2411 | } else { | |
2412 | tasklet_disable(&jme->rxclean_task); | |
2413 | tasklet_disable(&jme->rxempty_task); | |
2414 | } | |
2415 | } | |
2416 | ||
2417 | static inline void jme_resume_rx(struct jme_adapter *jme) | |
2418 | { | |
2419 | struct dynpcc_info *dpi = &(jme->dpi); | |
2420 | ||
2421 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2422 | JME_NAPI_ENABLE(jme); | |
2423 | } else { | |
2424 | tasklet_hi_enable(&jme->rxclean_task); | |
2425 | tasklet_hi_enable(&jme->rxempty_task); | |
2426 | } | |
2427 | dpi->cur = PCC_P1; | |
2428 | dpi->attempt = PCC_P1; | |
2429 | dpi->cnt = 0; | |
2430 | jme_set_rx_pcc(jme, PCC_P1); | |
2431 | ||
2432 | atomic_inc(&jme->link_changing); | |
2433 | } | |
2434 | ||
5141719b | 2435 | #ifndef __UNIFY_VLAN_RX_PATH__ |
42b1055e GFT |
2436 | static void |
2437 | jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
2438 | { | |
2439 | struct jme_adapter *jme = netdev_priv(netdev); | |
2440 | ||
1e5ebebc | 2441 | jme_pause_rx(jme); |
42b1055e | 2442 | jme->vlgrp = grp; |
1e5ebebc | 2443 | jme_resume_rx(jme); |
42b1055e | 2444 | } |
5141719b | 2445 | #endif |
42b1055e | 2446 | |
7ca9ebee GFT |
2447 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
2448 | static void | |
2449 | jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid) | |
2450 | { | |
2451 | struct jme_adapter *jme = netdev_priv(netdev); | |
2452 | ||
7ca9ebee | 2453 | if(jme->vlgrp) { |
1e5ebebc | 2454 | jme_pause_rx(jme); |
7ca9ebee GFT |
2455 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20) |
2456 | jme->vlgrp->vlan_devices[vid] = NULL; | |
2457 | #else | |
2458 | vlan_group_set_device(jme->vlgrp, vid, NULL); | |
2459 | #endif | |
1e5ebebc | 2460 | jme_resume_rx(jme); |
7ca9ebee | 2461 | } |
7ca9ebee GFT |
2462 | } |
2463 | #endif | |
2464 | ||
3bf61c55 GFT |
2465 | static void |
2466 | jme_get_drvinfo(struct net_device *netdev, | |
2467 | struct ethtool_drvinfo *info) | |
d7699f87 | 2468 | { |
cd0ff491 | 2469 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2470 | |
c0e78193 RJ |
2471 | strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); |
2472 | strlcpy(info->version, DRV_VERSION, sizeof(info->version)); | |
2473 | strlcpy(info->bus_info, pci_name(jme->pdev), sizeof(info->bus_info)); | |
d7699f87 GFT |
2474 | } |
2475 | ||
8c198884 GFT |
2476 | static int |
2477 | jme_get_regs_len(struct net_device *netdev) | |
2478 | { | |
cd0ff491 | 2479 | return JME_REG_LEN; |
8c198884 GFT |
2480 | } |
2481 | ||
2482 | static void | |
cd0ff491 | 2483 | mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len) |
8c198884 GFT |
2484 | { |
2485 | int i; | |
2486 | ||
cd0ff491 | 2487 | for (i = 0 ; i < len ; i += 4) |
79ce639c | 2488 | p[i >> 2] = jread32(jme, reg + i); |
186fc259 | 2489 | } |
8c198884 | 2490 | |
186fc259 | 2491 | static void |
cd0ff491 | 2492 | mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) |
186fc259 GFT |
2493 | { |
2494 | int i; | |
cd0ff491 | 2495 | u16 *p16 = (u16 *)p; |
186fc259 | 2496 | |
cd0ff491 | 2497 | for (i = 0 ; i < reg_nr ; ++i) |
186fc259 | 2498 | p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i); |
8c198884 GFT |
2499 | } |
2500 | ||
2501 | static void | |
2502 | jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) | |
2503 | { | |
cd0ff491 GFT |
2504 | struct jme_adapter *jme = netdev_priv(netdev); |
2505 | u32 *p32 = (u32 *)p; | |
8c198884 | 2506 | |
186fc259 | 2507 | memset(p, 0xFF, JME_REG_LEN); |
8c198884 GFT |
2508 | |
2509 | regs->version = 1; | |
2510 | mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN); | |
2511 | ||
2512 | p32 += 0x100 >> 2; | |
2513 | mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN); | |
2514 | ||
2515 | p32 += 0x100 >> 2; | |
2516 | mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN); | |
2517 | ||
2518 | p32 += 0x100 >> 2; | |
2519 | mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN); | |
2520 | ||
186fc259 GFT |
2521 | p32 += 0x100 >> 2; |
2522 | mdio_memcpy(jme, p32, JME_PHY_REG_NR); | |
8c198884 GFT |
2523 | } |
2524 | ||
2525 | static int | |
2526 | jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2527 | { | |
2528 | struct jme_adapter *jme = netdev_priv(netdev); | |
2529 | ||
8c198884 GFT |
2530 | ecmd->tx_coalesce_usecs = PCC_TX_TO; |
2531 | ecmd->tx_max_coalesced_frames = PCC_TX_CNT; | |
2532 | ||
cd0ff491 | 2533 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
cdcdc9eb GFT |
2534 | ecmd->use_adaptive_rx_coalesce = false; |
2535 | ecmd->rx_coalesce_usecs = 0; | |
2536 | ecmd->rx_max_coalesced_frames = 0; | |
2537 | return 0; | |
2538 | } | |
2539 | ||
2540 | ecmd->use_adaptive_rx_coalesce = true; | |
2541 | ||
cd0ff491 | 2542 | switch (jme->dpi.cur) { |
8c198884 GFT |
2543 | case PCC_P1: |
2544 | ecmd->rx_coalesce_usecs = PCC_P1_TO; | |
2545 | ecmd->rx_max_coalesced_frames = PCC_P1_CNT; | |
2546 | break; | |
2547 | case PCC_P2: | |
2548 | ecmd->rx_coalesce_usecs = PCC_P2_TO; | |
2549 | ecmd->rx_max_coalesced_frames = PCC_P2_CNT; | |
2550 | break; | |
2551 | case PCC_P3: | |
2552 | ecmd->rx_coalesce_usecs = PCC_P3_TO; | |
2553 | ecmd->rx_max_coalesced_frames = PCC_P3_CNT; | |
2554 | break; | |
2555 | default: | |
2556 | break; | |
2557 | } | |
2558 | ||
2559 | return 0; | |
2560 | } | |
2561 | ||
192570e0 GFT |
2562 | static int |
2563 | jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2564 | { | |
2565 | struct jme_adapter *jme = netdev_priv(netdev); | |
2566 | struct dynpcc_info *dpi = &(jme->dpi); | |
2567 | ||
cd0ff491 | 2568 | if (netif_running(netdev)) |
cdcdc9eb GFT |
2569 | return -EBUSY; |
2570 | ||
7ca9ebee GFT |
2571 | if (ecmd->use_adaptive_rx_coalesce && |
2572 | test_bit(JME_FLAG_POLL, &jme->flags)) { | |
cd0ff491 | 2573 | clear_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb | 2574 | jme->jme_rx = netif_rx; |
5141719b | 2575 | #ifndef __UNIFY_VLAN_RX_PATH__ |
cdcdc9eb | 2576 | jme->jme_vlan_rx = vlan_hwaccel_rx; |
5141719b | 2577 | #endif |
192570e0 GFT |
2578 | dpi->cur = PCC_P1; |
2579 | dpi->attempt = PCC_P1; | |
2580 | dpi->cnt = 0; | |
2581 | jme_set_rx_pcc(jme, PCC_P1); | |
2582 | jme_interrupt_mode(jme); | |
7ca9ebee GFT |
2583 | } else if (!(ecmd->use_adaptive_rx_coalesce) && |
2584 | !(test_bit(JME_FLAG_POLL, &jme->flags))) { | |
cd0ff491 | 2585 | set_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb | 2586 | jme->jme_rx = netif_receive_skb; |
5141719b | 2587 | #ifndef __UNIFY_VLAN_RX_PATH__ |
cdcdc9eb | 2588 | jme->jme_vlan_rx = vlan_hwaccel_receive_skb; |
5141719b | 2589 | #endif |
192570e0 GFT |
2590 | jme_interrupt_mode(jme); |
2591 | } | |
2592 | ||
2593 | return 0; | |
2594 | } | |
2595 | ||
8c198884 GFT |
2596 | static void |
2597 | jme_get_pauseparam(struct net_device *netdev, | |
2598 | struct ethtool_pauseparam *ecmd) | |
2599 | { | |
2600 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2601 | u32 val; |
8c198884 GFT |
2602 | |
2603 | ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0; | |
2604 | ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0; | |
2605 | ||
cd0ff491 GFT |
2606 | spin_lock_bh(&jme->phy_lock); |
2607 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2608 | spin_unlock_bh(&jme->phy_lock); | |
b3821cc5 GFT |
2609 | |
2610 | ecmd->autoneg = | |
2611 | (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0; | |
8c198884 GFT |
2612 | } |
2613 | ||
2614 | static int | |
2615 | jme_set_pauseparam(struct net_device *netdev, | |
2616 | struct ethtool_pauseparam *ecmd) | |
2617 | { | |
2618 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2619 | u32 val; |
8c198884 | 2620 | |
cd0ff491 | 2621 | if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^ |
8c198884 GFT |
2622 | (ecmd->tx_pause != 0)) { |
2623 | ||
cd0ff491 | 2624 | if (ecmd->tx_pause) |
8c198884 GFT |
2625 | jme->reg_txpfc |= TXPFC_PF_EN; |
2626 | else | |
2627 | jme->reg_txpfc &= ~TXPFC_PF_EN; | |
2628 | ||
2629 | jwrite32(jme, JME_TXPFC, jme->reg_txpfc); | |
2630 | } | |
2631 | ||
cd0ff491 GFT |
2632 | spin_lock_bh(&jme->rxmcs_lock); |
2633 | if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^ | |
8c198884 GFT |
2634 | (ecmd->rx_pause != 0)) { |
2635 | ||
cd0ff491 | 2636 | if (ecmd->rx_pause) |
8c198884 GFT |
2637 | jme->reg_rxmcs |= RXMCS_FLOWCTRL; |
2638 | else | |
2639 | jme->reg_rxmcs &= ~RXMCS_FLOWCTRL; | |
2640 | ||
2641 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2642 | } | |
cd0ff491 | 2643 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 | 2644 | |
cd0ff491 GFT |
2645 | spin_lock_bh(&jme->phy_lock); |
2646 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2647 | if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^ | |
8c198884 GFT |
2648 | (ecmd->autoneg != 0)) { |
2649 | ||
cd0ff491 | 2650 | if (ecmd->autoneg) |
8c198884 GFT |
2651 | val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
2652 | else | |
2653 | val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
2654 | ||
b3821cc5 GFT |
2655 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, |
2656 | MII_ADVERTISE, val); | |
8c198884 | 2657 | } |
cd0ff491 | 2658 | spin_unlock_bh(&jme->phy_lock); |
8c198884 GFT |
2659 | |
2660 | return 0; | |
2661 | } | |
2662 | ||
29bdd921 GFT |
2663 | static void |
2664 | jme_get_wol(struct net_device *netdev, | |
2665 | struct ethtool_wolinfo *wol) | |
2666 | { | |
2667 | struct jme_adapter *jme = netdev_priv(netdev); | |
2668 | ||
2669 | wol->supported = WAKE_MAGIC | WAKE_PHY; | |
2670 | ||
2671 | wol->wolopts = 0; | |
2672 | ||
cd0ff491 | 2673 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
29bdd921 GFT |
2674 | wol->wolopts |= WAKE_PHY; |
2675 | ||
cd0ff491 | 2676 | if (jme->reg_pmcs & PMCS_MFEN) |
29bdd921 GFT |
2677 | wol->wolopts |= WAKE_MAGIC; |
2678 | ||
2679 | } | |
2680 | ||
2681 | static int | |
2682 | jme_set_wol(struct net_device *netdev, | |
2683 | struct ethtool_wolinfo *wol) | |
2684 | { | |
2685 | struct jme_adapter *jme = netdev_priv(netdev); | |
2686 | ||
cd0ff491 | 2687 | if (wol->wolopts & (WAKE_MAGICSECURE | |
29bdd921 GFT |
2688 | WAKE_UCAST | |
2689 | WAKE_MCAST | | |
2690 | WAKE_BCAST | | |
2691 | WAKE_ARP)) | |
2692 | return -EOPNOTSUPP; | |
2693 | ||
2694 | jme->reg_pmcs = 0; | |
2695 | ||
cd0ff491 | 2696 | if (wol->wolopts & WAKE_PHY) |
29bdd921 GFT |
2697 | jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN; |
2698 | ||
cd0ff491 | 2699 | if (wol->wolopts & WAKE_MAGIC) |
29bdd921 GFT |
2700 | jme->reg_pmcs |= PMCS_MFEN; |
2701 | ||
cd0ff491 | 2702 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
3d12cc1b GFT |
2703 | #ifndef JME_NEW_PM_API |
2704 | jme_pci_wakeup_enable(jme, !!(jme->reg_pmcs)); | |
2705 | #endif | |
7370b85a | 2706 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) |
3d12cc1b | 2707 | device_set_wakeup_enable(&jme->pdev->dev, !!(jme->reg_pmcs)); |
7370b85a | 2708 | #endif |
e3b96dc9 | 2709 | |
29bdd921 GFT |
2710 | return 0; |
2711 | } | |
b3821cc5 | 2712 | |
3bf61c55 GFT |
2713 | static int |
2714 | jme_get_settings(struct net_device *netdev, | |
2715 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2716 | { |
2717 | struct jme_adapter *jme = netdev_priv(netdev); | |
2718 | int rc; | |
8c198884 | 2719 | |
cd0ff491 | 2720 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2721 | rc = mii_ethtool_gset(&(jme->mii_if), ecmd); |
cd0ff491 | 2722 | spin_unlock_bh(&jme->phy_lock); |
d7699f87 GFT |
2723 | return rc; |
2724 | } | |
2725 | ||
3bf61c55 GFT |
2726 | static int |
2727 | jme_set_settings(struct net_device *netdev, | |
2728 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2729 | { |
2730 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2731 | int rc, fdc = 0; |
fcf45b4c | 2732 | |
8588b84b DD |
2733 | if (ethtool_cmd_speed(ecmd) == SPEED_1000 |
2734 | && ecmd->autoneg != AUTONEG_ENABLE) | |
8c198884 GFT |
2735 | return -EINVAL; |
2736 | ||
e6b41b51 GFT |
2737 | /* |
2738 | * Check If user changed duplex only while force_media. | |
2739 | * Hardware would not generate link change interrupt. | |
2740 | */ | |
cd0ff491 | 2741 | if (jme->mii_if.force_media && |
79ce639c GFT |
2742 | ecmd->autoneg != AUTONEG_ENABLE && |
2743 | (jme->mii_if.full_duplex != ecmd->duplex)) | |
2744 | fdc = 1; | |
2745 | ||
cd0ff491 | 2746 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2747 | rc = mii_ethtool_sset(&(jme->mii_if), ecmd); |
cd0ff491 | 2748 | spin_unlock_bh(&jme->phy_lock); |
fcf45b4c | 2749 | |
cd0ff491 | 2750 | if (!rc) { |
e6b41b51 GFT |
2751 | if (fdc) |
2752 | jme_reset_link(jme); | |
29bdd921 | 2753 | jme->old_ecmd = *ecmd; |
aa1e7189 GFT |
2754 | set_bit(JME_FLAG_SSET, &jme->flags); |
2755 | } | |
2756 | ||
2757 | return rc; | |
2758 | } | |
2759 | ||
2760 | static int | |
2761 | jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
2762 | { | |
2763 | int rc; | |
2764 | struct jme_adapter *jme = netdev_priv(netdev); | |
2765 | struct mii_ioctl_data *mii_data = if_mii(rq); | |
2766 | unsigned int duplex_chg; | |
2767 | ||
2768 | if (cmd == SIOCSMIIREG) { | |
2769 | u16 val = mii_data->val_in; | |
2770 | if (!(val & (BMCR_RESET|BMCR_ANENABLE)) && | |
2771 | (val & BMCR_SPEED1000)) | |
2772 | return -EINVAL; | |
2773 | } | |
2774 | ||
2775 | spin_lock_bh(&jme->phy_lock); | |
2776 | rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg); | |
2777 | spin_unlock_bh(&jme->phy_lock); | |
2778 | ||
2779 | if (!rc && (cmd == SIOCSMIIREG)) { | |
2780 | if (duplex_chg) | |
2781 | jme_reset_link(jme); | |
2782 | jme_get_settings(netdev, &jme->old_ecmd); | |
2783 | set_bit(JME_FLAG_SSET, &jme->flags); | |
29bdd921 GFT |
2784 | } |
2785 | ||
d7699f87 GFT |
2786 | return rc; |
2787 | } | |
2788 | ||
cd0ff491 | 2789 | static u32 |
3bf61c55 GFT |
2790 | jme_get_link(struct net_device *netdev) |
2791 | { | |
d7699f87 GFT |
2792 | struct jme_adapter *jme = netdev_priv(netdev); |
2793 | return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP; | |
2794 | } | |
2795 | ||
8c198884 | 2796 | static u32 |
cd0ff491 GFT |
2797 | jme_get_msglevel(struct net_device *netdev) |
2798 | { | |
2799 | struct jme_adapter *jme = netdev_priv(netdev); | |
2800 | return jme->msg_enable; | |
2801 | } | |
2802 | ||
2803 | static void | |
2804 | jme_set_msglevel(struct net_device *netdev, u32 value) | |
8c198884 | 2805 | { |
cd0ff491 GFT |
2806 | struct jme_adapter *jme = netdev_priv(netdev); |
2807 | jme->msg_enable = value; | |
2808 | } | |
8c198884 | 2809 | |
767e5b98 | 2810 | #ifndef __USE_NDO_FIX_FEATURES__ |
cd0ff491 GFT |
2811 | static u32 |
2812 | jme_get_rx_csum(struct net_device *netdev) | |
2813 | { | |
2814 | struct jme_adapter *jme = netdev_priv(netdev); | |
8c198884 GFT |
2815 | return jme->reg_rxmcs & RXMCS_CHECKSUM; |
2816 | } | |
2817 | ||
2818 | static int | |
2819 | jme_set_rx_csum(struct net_device *netdev, u32 on) | |
2820 | { | |
cd0ff491 | 2821 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2822 | |
cd0ff491 GFT |
2823 | spin_lock_bh(&jme->rxmcs_lock); |
2824 | if (on) | |
8c198884 GFT |
2825 | jme->reg_rxmcs |= RXMCS_CHECKSUM; |
2826 | else | |
2827 | jme->reg_rxmcs &= ~RXMCS_CHECKSUM; | |
2828 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
cd0ff491 | 2829 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2830 | |
2831 | return 0; | |
2832 | } | |
2833 | ||
2834 | static int | |
2835 | jme_set_tx_csum(struct net_device *netdev, u32 on) | |
2836 | { | |
cd0ff491 | 2837 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2838 | |
cd0ff491 GFT |
2839 | if (on) { |
2840 | set_bit(JME_FLAG_TXCSUM, &jme->flags); | |
2841 | if (netdev->mtu <= 1900) | |
1a0b42f4 MM |
2842 | netdev->features |= |
2843 | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; | |
cd0ff491 GFT |
2844 | } else { |
2845 | clear_bit(JME_FLAG_TXCSUM, &jme->flags); | |
1a0b42f4 MM |
2846 | netdev->features &= |
2847 | ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); | |
b3821cc5 | 2848 | } |
8c198884 GFT |
2849 | |
2850 | return 0; | |
2851 | } | |
2852 | ||
b3821cc5 GFT |
2853 | static int |
2854 | jme_set_tso(struct net_device *netdev, u32 on) | |
2855 | { | |
cd0ff491 | 2856 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2857 | |
cd0ff491 GFT |
2858 | if (on) { |
2859 | set_bit(JME_FLAG_TSO, &jme->flags); | |
2860 | if (netdev->mtu <= 1900) | |
1a0b42f4 | 2861 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
cd0ff491 GFT |
2862 | } else { |
2863 | clear_bit(JME_FLAG_TSO, &jme->flags); | |
1a0b42f4 | 2864 | netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); |
b3821cc5 GFT |
2865 | } |
2866 | ||
cd0ff491 | 2867 | return 0; |
b3821cc5 | 2868 | } |
767e5b98 | 2869 | #else |
e0ae0351 | 2870 | #ifndef __NEW_FIX_FEATURES_TYPE__ |
767e5b98 MM |
2871 | static u32 |
2872 | jme_fix_features(struct net_device *netdev, u32 features) | |
e0ae0351 MM |
2873 | #else |
2874 | static netdev_features_t | |
2875 | jme_fix_features(struct net_device *netdev, netdev_features_t features) | |
2876 | #endif | |
767e5b98 MM |
2877 | { |
2878 | if (netdev->mtu > 1900) | |
2879 | features &= ~(NETIF_F_ALL_TSO | NETIF_F_ALL_CSUM); | |
2880 | return features; | |
2881 | } | |
2882 | ||
2883 | static int | |
e0ae0351 | 2884 | #ifndef __NEW_FIX_FEATURES_TYPE__ |
767e5b98 | 2885 | jme_set_features(struct net_device *netdev, u32 features) |
e0ae0351 MM |
2886 | #else |
2887 | jme_set_features(struct net_device *netdev, netdev_features_t features) | |
2888 | #endif | |
767e5b98 MM |
2889 | { |
2890 | struct jme_adapter *jme = netdev_priv(netdev); | |
2891 | ||
2892 | spin_lock_bh(&jme->rxmcs_lock); | |
2893 | if (features & NETIF_F_RXCSUM) | |
2894 | jme->reg_rxmcs |= RXMCS_CHECKSUM; | |
2895 | else | |
2896 | jme->reg_rxmcs &= ~RXMCS_CHECKSUM; | |
2897 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2898 | spin_unlock_bh(&jme->rxmcs_lock); | |
2899 | ||
2900 | return 0; | |
2901 | } | |
2902 | #endif | |
b3821cc5 | 2903 | |
8c198884 GFT |
2904 | static int |
2905 | jme_nway_reset(struct net_device *netdev) | |
2906 | { | |
cd0ff491 | 2907 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 GFT |
2908 | jme_restart_an(jme); |
2909 | return 0; | |
2910 | } | |
2911 | ||
cd0ff491 | 2912 | static u8 |
186fc259 GFT |
2913 | jme_smb_read(struct jme_adapter *jme, unsigned int addr) |
2914 | { | |
cd0ff491 | 2915 | u32 val; |
186fc259 GFT |
2916 | int to; |
2917 | ||
2918 | val = jread32(jme, JME_SMBCSR); | |
2919 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2920 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2921 | msleep(1); |
2922 | val = jread32(jme, JME_SMBCSR); | |
2923 | } | |
cd0ff491 | 2924 | if (!to) { |
937ef75a | 2925 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2926 | return 0xFF; |
2927 | } | |
2928 | ||
2929 | jwrite32(jme, JME_SMBINTF, | |
2930 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2931 | SMBINTF_HWRWN_READ | | |
2932 | SMBINTF_HWCMD); | |
2933 | ||
2934 | val = jread32(jme, JME_SMBINTF); | |
2935 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2936 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2937 | msleep(1); |
2938 | val = jread32(jme, JME_SMBINTF); | |
2939 | } | |
cd0ff491 | 2940 | if (!to) { |
937ef75a | 2941 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2942 | return 0xFF; |
2943 | } | |
2944 | ||
2945 | return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT; | |
2946 | } | |
2947 | ||
2948 | static void | |
cd0ff491 | 2949 | jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data) |
186fc259 | 2950 | { |
cd0ff491 | 2951 | u32 val; |
186fc259 GFT |
2952 | int to; |
2953 | ||
2954 | val = jread32(jme, JME_SMBCSR); | |
2955 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2956 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2957 | msleep(1); |
2958 | val = jread32(jme, JME_SMBCSR); | |
2959 | } | |
cd0ff491 | 2960 | if (!to) { |
937ef75a | 2961 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2962 | return; |
2963 | } | |
2964 | ||
2965 | jwrite32(jme, JME_SMBINTF, | |
2966 | ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) | | |
2967 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2968 | SMBINTF_HWRWN_WRITE | | |
2969 | SMBINTF_HWCMD); | |
2970 | ||
2971 | val = jread32(jme, JME_SMBINTF); | |
2972 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2973 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2974 | msleep(1); |
2975 | val = jread32(jme, JME_SMBINTF); | |
2976 | } | |
cd0ff491 | 2977 | if (!to) { |
937ef75a | 2978 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2979 | return; |
2980 | } | |
2981 | ||
2982 | mdelay(2); | |
2983 | } | |
2984 | ||
2985 | static int | |
2986 | jme_get_eeprom_len(struct net_device *netdev) | |
2987 | { | |
cd0ff491 GFT |
2988 | struct jme_adapter *jme = netdev_priv(netdev); |
2989 | u32 val; | |
186fc259 | 2990 | val = jread32(jme, JME_SMBCSR); |
cd0ff491 | 2991 | return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0; |
186fc259 GFT |
2992 | } |
2993 | ||
2994 | static int | |
2995 | jme_get_eeprom(struct net_device *netdev, | |
2996 | struct ethtool_eeprom *eeprom, u8 *data) | |
2997 | { | |
cd0ff491 | 2998 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2999 | int i, offset = eeprom->offset, len = eeprom->len; |
3000 | ||
3001 | /* | |
8d27293f | 3002 | * ethtool will check the boundary for us |
186fc259 GFT |
3003 | */ |
3004 | eeprom->magic = JME_EEPROM_MAGIC; | |
cd0ff491 | 3005 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
3006 | data[i] = jme_smb_read(jme, i + offset); |
3007 | ||
3008 | return 0; | |
3009 | } | |
3010 | ||
3011 | static int | |
3012 | jme_set_eeprom(struct net_device *netdev, | |
3013 | struct ethtool_eeprom *eeprom, u8 *data) | |
3014 | { | |
cd0ff491 | 3015 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
3016 | int i, offset = eeprom->offset, len = eeprom->len; |
3017 | ||
3018 | if (eeprom->magic != JME_EEPROM_MAGIC) | |
3019 | return -EINVAL; | |
3020 | ||
3021 | /* | |
8d27293f | 3022 | * ethtool will check the boundary for us |
186fc259 | 3023 | */ |
cd0ff491 | 3024 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
3025 | jme_smb_write(jme, i + offset, data[i]); |
3026 | ||
3027 | return 0; | |
3028 | } | |
3029 | ||
3b70a6fa GFT |
3030 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
3031 | static struct ethtool_ops jme_ethtool_ops = { | |
3032 | #else | |
d7699f87 | 3033 | static const struct ethtool_ops jme_ethtool_ops = { |
3b70a6fa | 3034 | #endif |
cd0ff491 | 3035 | .get_drvinfo = jme_get_drvinfo, |
8c198884 GFT |
3036 | .get_regs_len = jme_get_regs_len, |
3037 | .get_regs = jme_get_regs, | |
3038 | .get_coalesce = jme_get_coalesce, | |
192570e0 | 3039 | .set_coalesce = jme_set_coalesce, |
cd0ff491 GFT |
3040 | .get_pauseparam = jme_get_pauseparam, |
3041 | .set_pauseparam = jme_set_pauseparam, | |
29bdd921 GFT |
3042 | .get_wol = jme_get_wol, |
3043 | .set_wol = jme_set_wol, | |
d7699f87 GFT |
3044 | .get_settings = jme_get_settings, |
3045 | .set_settings = jme_set_settings, | |
3046 | .get_link = jme_get_link, | |
cd0ff491 GFT |
3047 | .get_msglevel = jme_get_msglevel, |
3048 | .set_msglevel = jme_set_msglevel, | |
767e5b98 | 3049 | #ifndef __USE_NDO_FIX_FEATURES__ |
8c198884 GFT |
3050 | .get_rx_csum = jme_get_rx_csum, |
3051 | .set_rx_csum = jme_set_rx_csum, | |
3052 | .set_tx_csum = jme_set_tx_csum, | |
b3821cc5 GFT |
3053 | .set_tso = jme_set_tso, |
3054 | .set_sg = ethtool_op_set_sg, | |
767e5b98 | 3055 | #endif |
8c198884 | 3056 | .nway_reset = jme_nway_reset, |
186fc259 GFT |
3057 | .get_eeprom_len = jme_get_eeprom_len, |
3058 | .get_eeprom = jme_get_eeprom, | |
3059 | .set_eeprom = jme_set_eeprom, | |
d7699f87 GFT |
3060 | }; |
3061 | ||
3bf61c55 GFT |
3062 | static int |
3063 | jme_pci_dma64(struct pci_dev *pdev) | |
d7699f87 | 3064 | { |
3b70a6fa | 3065 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
0ede469c GFT |
3066 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
3067 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) | |
3068 | #else | |
3069 | !pci_set_dma_mask(pdev, DMA_64BIT_MASK) | |
3070 | #endif | |
3071 | ) | |
3072 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) | |
3073 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) | |
3074 | #else | |
cd0ff491 | 3075 | if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) |
0ede469c | 3076 | #endif |
3bf61c55 GFT |
3077 | return 1; |
3078 | ||
3b70a6fa | 3079 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
0ede469c GFT |
3080 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
3081 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(40)) | |
3082 | #else | |
3083 | !pci_set_dma_mask(pdev, DMA_40BIT_MASK) | |
3084 | #endif | |
3085 | ) | |
3086 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) | |
3087 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40))) | |
3088 | #else | |
cd0ff491 | 3089 | if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK)) |
0ede469c | 3090 | #endif |
8c198884 GFT |
3091 | return 1; |
3092 | ||
0ede469c GFT |
3093 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
3094 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) | |
3095 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) | |
3096 | #else | |
cd0ff491 GFT |
3097 | if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) |
3098 | if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) | |
0ede469c | 3099 | #endif |
3bf61c55 GFT |
3100 | return 0; |
3101 | ||
3102 | return -1; | |
3103 | } | |
3104 | ||
cd0ff491 | 3105 | static inline void |
cdcdc9eb GFT |
3106 | jme_phy_init(struct jme_adapter *jme) |
3107 | { | |
cd0ff491 | 3108 | u16 reg26; |
cdcdc9eb GFT |
3109 | |
3110 | reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26); | |
3111 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000); | |
3112 | } | |
3113 | ||
cd0ff491 | 3114 | static inline void |
cdcdc9eb | 3115 | jme_check_hw_ver(struct jme_adapter *jme) |
42b1055e | 3116 | { |
cd0ff491 | 3117 | u32 chipmode; |
cdcdc9eb GFT |
3118 | |
3119 | chipmode = jread32(jme, JME_CHIPMODE); | |
3120 | ||
3121 | jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT; | |
58c92f28 | 3122 | jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT; |
98ef18f1 GFT |
3123 | jme->chip_main_rev = jme->chiprev & 0xF; |
3124 | jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF; | |
42b1055e GFT |
3125 | } |
3126 | ||
3b70a6fa GFT |
3127 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
3128 | static const struct net_device_ops jme_netdev_ops = { | |
3129 | .ndo_open = jme_open, | |
3130 | .ndo_stop = jme_close, | |
3131 | .ndo_validate_addr = eth_validate_addr, | |
aa1e7189 | 3132 | .ndo_do_ioctl = jme_ioctl, |
3b70a6fa GFT |
3133 | .ndo_start_xmit = jme_start_xmit, |
3134 | .ndo_set_mac_address = jme_set_macaddr, | |
1ec30a25 | 3135 | #ifndef __USE_NDO_SET_RX_MODE__ |
3b70a6fa | 3136 | .ndo_set_multicast_list = jme_set_multi, |
1ec30a25 JP |
3137 | #else |
3138 | .ndo_set_rx_mode = jme_set_multi, | |
3139 | #endif | |
3b70a6fa GFT |
3140 | .ndo_change_mtu = jme_change_mtu, |
3141 | .ndo_tx_timeout = jme_tx_timeout, | |
5141719b | 3142 | #ifndef __UNIFY_VLAN_RX_PATH__ |
3b70a6fa | 3143 | .ndo_vlan_rx_register = jme_vlan_rx_register, |
5141719b | 3144 | #endif |
767e5b98 MM |
3145 | #ifdef __USE_NDO_FIX_FEATURES__ |
3146 | .ndo_fix_features = jme_fix_features, | |
3147 | .ndo_set_features = jme_set_features, | |
3148 | #endif | |
3b70a6fa GFT |
3149 | }; |
3150 | #endif | |
3151 | ||
3bf61c55 GFT |
3152 | static int __devinit |
3153 | jme_init_one(struct pci_dev *pdev, | |
3154 | const struct pci_device_id *ent) | |
3155 | { | |
cdcdc9eb | 3156 | int rc = 0, using_dac, i; |
d7699f87 GFT |
3157 | struct net_device *netdev; |
3158 | struct jme_adapter *jme; | |
cd0ff491 GFT |
3159 | u16 bmcr, bmsr; |
3160 | u32 apmc; | |
d7699f87 GFT |
3161 | |
3162 | /* | |
3163 | * set up PCI device basics | |
3164 | */ | |
4330c2f2 | 3165 | rc = pci_enable_device(pdev); |
cd0ff491 | 3166 | if (rc) { |
937ef75a | 3167 | pr_err("Cannot enable PCI device\n"); |
4330c2f2 GFT |
3168 | goto err_out; |
3169 | } | |
d7699f87 | 3170 | |
3bf61c55 | 3171 | using_dac = jme_pci_dma64(pdev); |
cd0ff491 | 3172 | if (using_dac < 0) { |
937ef75a | 3173 | pr_err("Cannot set PCI DMA Mask\n"); |
3bf61c55 GFT |
3174 | rc = -EIO; |
3175 | goto err_out_disable_pdev; | |
3176 | } | |
3177 | ||
cd0ff491 | 3178 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
937ef75a | 3179 | pr_err("No PCI resource region found\n"); |
4330c2f2 GFT |
3180 | rc = -ENOMEM; |
3181 | goto err_out_disable_pdev; | |
3182 | } | |
d7699f87 | 3183 | |
4330c2f2 | 3184 | rc = pci_request_regions(pdev, DRV_NAME); |
cd0ff491 | 3185 | if (rc) { |
937ef75a | 3186 | pr_err("Cannot obtain PCI resource region\n"); |
4330c2f2 GFT |
3187 | goto err_out_disable_pdev; |
3188 | } | |
d7699f87 GFT |
3189 | |
3190 | pci_set_master(pdev); | |
3191 | ||
3192 | /* | |
3193 | * alloc and init net device | |
3194 | */ | |
3bf61c55 | 3195 | netdev = alloc_etherdev(sizeof(*jme)); |
cd0ff491 | 3196 | if (!netdev) { |
937ef75a | 3197 | pr_err("Cannot allocate netdev structure\n"); |
4330c2f2 GFT |
3198 | rc = -ENOMEM; |
3199 | goto err_out_release_regions; | |
d7699f87 | 3200 | } |
3b70a6fa GFT |
3201 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
3202 | netdev->netdev_ops = &jme_netdev_ops; | |
3203 | #else | |
d7699f87 GFT |
3204 | netdev->open = jme_open; |
3205 | netdev->stop = jme_close; | |
aa1e7189 | 3206 | netdev->do_ioctl = jme_ioctl; |
d7699f87 | 3207 | netdev->hard_start_xmit = jme_start_xmit; |
d7699f87 GFT |
3208 | netdev->set_mac_address = jme_set_macaddr; |
3209 | netdev->set_multicast_list = jme_set_multi; | |
3210 | netdev->change_mtu = jme_change_mtu; | |
8c198884 | 3211 | netdev->tx_timeout = jme_tx_timeout; |
42b1055e | 3212 | netdev->vlan_rx_register = jme_vlan_rx_register; |
7ca9ebee GFT |
3213 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
3214 | netdev->vlan_rx_kill_vid = jme_vlan_rx_kill_vid; | |
3215 | #endif | |
3bf61c55 | 3216 | NETDEV_GET_STATS(netdev, &jme_get_stats); |
3b70a6fa GFT |
3217 | #endif |
3218 | netdev->ethtool_ops = &jme_ethtool_ops; | |
3219 | netdev->watchdog_timeo = TX_TIMEOUT; | |
767e5b98 MM |
3220 | #ifdef __USE_NDO_FIX_FEATURES__ |
3221 | netdev->hw_features = NETIF_F_IP_CSUM | | |
3222 | NETIF_F_IPV6_CSUM | | |
3223 | NETIF_F_SG | | |
3224 | NETIF_F_TSO | | |
3225 | NETIF_F_TSO6 | | |
3226 | NETIF_F_RXCSUM; | |
3227 | #endif | |
1a0b42f4 MM |
3228 | netdev->features = NETIF_F_IP_CSUM | |
3229 | NETIF_F_IPV6_CSUM | | |
b3821cc5 GFT |
3230 | NETIF_F_SG | |
3231 | NETIF_F_TSO | | |
3232 | NETIF_F_TSO6 | | |
42b1055e GFT |
3233 | NETIF_F_HW_VLAN_TX | |
3234 | NETIF_F_HW_VLAN_RX; | |
cd0ff491 | 3235 | if (using_dac) |
8c198884 | 3236 | netdev->features |= NETIF_F_HIGHDMA; |
d7699f87 GFT |
3237 | |
3238 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
3239 | pci_set_drvdata(pdev, netdev); | |
3240 | ||
3241 | /* | |
3242 | * init adapter info | |
3243 | */ | |
3244 | jme = netdev_priv(netdev); | |
3245 | jme->pdev = pdev; | |
3246 | jme->dev = netdev; | |
cdcdc9eb | 3247 | jme->jme_rx = netif_rx; |
5141719b | 3248 | #ifndef __UNIFY_VLAN_RX_PATH__ |
cdcdc9eb | 3249 | jme->jme_vlan_rx = vlan_hwaccel_rx; |
5141719b | 3250 | #endif |
29bdd921 | 3251 | jme->old_mtu = netdev->mtu = 1500; |
fcf45b4c | 3252 | jme->phylink = 0; |
b3821cc5 | 3253 | jme->tx_ring_size = 1 << 10; |
0ede469c | 3254 | jme->tx_ring_mask = jme->tx_ring_size - 1; |
b3821cc5 GFT |
3255 | jme->tx_wake_threshold = 1 << 9; |
3256 | jme->rx_ring_size = 1 << 9; | |
3257 | jme->rx_ring_mask = jme->rx_ring_size - 1; | |
cd0ff491 | 3258 | jme->msg_enable = JME_DEF_MSG_ENABLE; |
d7699f87 GFT |
3259 | jme->regs = ioremap(pci_resource_start(pdev, 0), |
3260 | pci_resource_len(pdev, 0)); | |
4330c2f2 | 3261 | if (!(jme->regs)) { |
937ef75a | 3262 | pr_err("Mapping PCI resource region error\n"); |
d7699f87 GFT |
3263 | rc = -ENOMEM; |
3264 | goto err_out_free_netdev; | |
3265 | } | |
4330c2f2 | 3266 | |
cd0ff491 GFT |
3267 | if (no_pseudohp) { |
3268 | apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN; | |
3269 | jwrite32(jme, JME_APMC, apmc); | |
3270 | } else if (force_pseudohp) { | |
3271 | apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN; | |
3272 | jwrite32(jme, JME_APMC, apmc); | |
3273 | } | |
3274 | ||
cdcdc9eb | 3275 | NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2) |
192570e0 | 3276 | |
d7699f87 | 3277 | spin_lock_init(&jme->phy_lock); |
fcf45b4c | 3278 | spin_lock_init(&jme->macaddr_lock); |
8c198884 | 3279 | spin_lock_init(&jme->rxmcs_lock); |
fcf45b4c | 3280 | |
fcf45b4c GFT |
3281 | atomic_set(&jme->link_changing, 1); |
3282 | atomic_set(&jme->rx_cleaning, 1); | |
3283 | atomic_set(&jme->tx_cleaning, 1); | |
192570e0 | 3284 | atomic_set(&jme->rx_empty, 1); |
fcf45b4c | 3285 | |
79ce639c | 3286 | tasklet_init(&jme->pcc_task, |
7ca9ebee | 3287 | jme_pcc_tasklet, |
79ce639c | 3288 | (unsigned long) jme); |
4330c2f2 | 3289 | tasklet_init(&jme->linkch_task, |
7ca9ebee | 3290 | jme_link_change_tasklet, |
4330c2f2 GFT |
3291 | (unsigned long) jme); |
3292 | tasklet_init(&jme->txclean_task, | |
7ca9ebee | 3293 | jme_tx_clean_tasklet, |
4330c2f2 GFT |
3294 | (unsigned long) jme); |
3295 | tasklet_init(&jme->rxclean_task, | |
7ca9ebee | 3296 | jme_rx_clean_tasklet, |
4330c2f2 | 3297 | (unsigned long) jme); |
fcf45b4c | 3298 | tasklet_init(&jme->rxempty_task, |
7ca9ebee | 3299 | jme_rx_empty_tasklet, |
fcf45b4c | 3300 | (unsigned long) jme); |
0ede469c | 3301 | tasklet_disable_nosync(&jme->linkch_task); |
cd0ff491 GFT |
3302 | tasklet_disable_nosync(&jme->txclean_task); |
3303 | tasklet_disable_nosync(&jme->rxclean_task); | |
3304 | tasklet_disable_nosync(&jme->rxempty_task); | |
8c198884 GFT |
3305 | jme->dpi.cur = PCC_P1; |
3306 | ||
cd0ff491 | 3307 | jme->reg_ghc = 0; |
79ce639c | 3308 | jme->reg_rxcs = RXCS_DEFAULT; |
8c198884 GFT |
3309 | jme->reg_rxmcs = RXMCS_DEFAULT; |
3310 | jme->reg_txpfc = 0; | |
47220951 | 3311 | jme->reg_pmcs = PMCS_MFEN; |
dc4185bd | 3312 | jme->reg_gpreg1 = GPREG1_DEFAULT; |
767e5b98 | 3313 | #ifndef __USE_NDO_FIX_FEATURES__ |
cd0ff491 GFT |
3314 | set_bit(JME_FLAG_TXCSUM, &jme->flags); |
3315 | set_bit(JME_FLAG_TSO, &jme->flags); | |
767e5b98 MM |
3316 | #else |
3317 | ||
3318 | if (jme->reg_rxmcs & RXMCS_CHECKSUM) | |
3319 | netdev->features |= NETIF_F_RXCSUM; | |
3320 | #endif | |
192570e0 | 3321 | |
fcf45b4c GFT |
3322 | /* |
3323 | * Get Max Read Req Size from PCI Config Space | |
3324 | */ | |
cd0ff491 GFT |
3325 | pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs); |
3326 | jme->mrrs &= PCI_DCSR_MRRS_MASK; | |
3327 | switch (jme->mrrs) { | |
3328 | case MRRS_128B: | |
3329 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; | |
3330 | break; | |
3331 | case MRRS_256B: | |
3332 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; | |
3333 | break; | |
3334 | default: | |
3335 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; | |
3336 | break; | |
cd54cf32 | 3337 | } |
fcf45b4c | 3338 | |
d7699f87 | 3339 | /* |
cdcdc9eb | 3340 | * Must check before reset_mac_processor |
d7699f87 | 3341 | */ |
cdcdc9eb GFT |
3342 | jme_check_hw_ver(jme); |
3343 | jme->mii_if.dev = netdev; | |
cd0ff491 | 3344 | if (jme->fpgaver) { |
cdcdc9eb | 3345 | jme->mii_if.phy_id = 0; |
cd0ff491 | 3346 | for (i = 1 ; i < 32 ; ++i) { |
cdcdc9eb GFT |
3347 | bmcr = jme_mdio_read(netdev, i, MII_BMCR); |
3348 | bmsr = jme_mdio_read(netdev, i, MII_BMSR); | |
cd0ff491 | 3349 | if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { |
cdcdc9eb GFT |
3350 | jme->mii_if.phy_id = i; |
3351 | break; | |
3352 | } | |
3353 | } | |
3354 | ||
cd0ff491 | 3355 | if (!jme->mii_if.phy_id) { |
cdcdc9eb | 3356 | rc = -EIO; |
937ef75a JP |
3357 | pr_err("Can not find phy_id\n"); |
3358 | goto err_out_unmap; | |
cdcdc9eb GFT |
3359 | } |
3360 | ||
3361 | jme->reg_ghc |= GHC_LINK_POLL; | |
cd0ff491 | 3362 | } else { |
cdcdc9eb GFT |
3363 | jme->mii_if.phy_id = 1; |
3364 | } | |
cd0ff491 | 3365 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
3366 | jme->mii_if.supports_gmii = true; |
3367 | else | |
3368 | jme->mii_if.supports_gmii = false; | |
aa1e7189 GFT |
3369 | jme->mii_if.phy_id_mask = 0x1F; |
3370 | jme->mii_if.reg_num_mask = 0x1F; | |
cdcdc9eb GFT |
3371 | jme->mii_if.mdio_read = jme_mdio_read; |
3372 | jme->mii_if.mdio_write = jme_mdio_write; | |
3373 | ||
61891ee4 GFT |
3374 | jme_clear_pm(jme); |
3375 | pci_set_power_state(jme->pdev, PCI_D0); | |
3376 | #ifndef JME_NEW_PM_API | |
3377 | jme_pci_wakeup_enable(jme, true); | |
3378 | #endif | |
3379 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) | |
e3b96dc9 | 3380 | device_set_wakeup_enable(&pdev->dev, true); |
61891ee4 GFT |
3381 | #endif |
3382 | ||
55d19799 | 3383 | jme_set_phyfifo_5level(jme); |
711edd99 | 3384 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,22) |
98ef18f1 | 3385 | pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev); |
711edd99 SS |
3386 | #else |
3387 | jme->pcirev = pdev->revision; | |
3388 | #endif | |
cd0ff491 | 3389 | if (!jme->fpgaver) |
cdcdc9eb | 3390 | jme_phy_init(jme); |
42b1055e | 3391 | jme_phy_off(jme); |
cdcdc9eb GFT |
3392 | |
3393 | /* | |
3394 | * Reset MAC processor and reload EEPROM for MAC Address | |
3395 | */ | |
d7699f87 | 3396 | jme_reset_mac_processor(jme); |
4330c2f2 | 3397 | rc = jme_reload_eeprom(jme); |
cd0ff491 | 3398 | if (rc) { |
937ef75a | 3399 | pr_err("Reload eeprom for reading MAC Address error\n"); |
0ede469c | 3400 | goto err_out_unmap; |
4330c2f2 | 3401 | } |
d7699f87 GFT |
3402 | jme_load_macaddr(netdev); |
3403 | ||
d7699f87 GFT |
3404 | /* |
3405 | * Tell stack that we are not ready to work until open() | |
3406 | */ | |
3407 | netif_carrier_off(netdev); | |
d7699f87 | 3408 | |
4330c2f2 | 3409 | rc = register_netdev(netdev); |
cd0ff491 | 3410 | if (rc) { |
937ef75a | 3411 | pr_err("Cannot register net device\n"); |
0ede469c | 3412 | goto err_out_unmap; |
4330c2f2 | 3413 | } |
d7699f87 | 3414 | |
98ef18f1 | 3415 | netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x " |
937ef75a | 3416 | "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n", |
7ca9ebee GFT |
3417 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ? |
3418 | "JMC250 Gigabit Ethernet" : | |
3419 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ? | |
3420 | "JMC260 Fast Ethernet" : "Unknown", | |
3421 | (jme->fpgaver != 0) ? " (FPGA)" : "", | |
3422 | (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev, | |
98ef18f1 | 3423 | jme->pcirev, |
937ef75a JP |
3424 | netdev->dev_addr[0], |
3425 | netdev->dev_addr[1], | |
3426 | netdev->dev_addr[2], | |
3427 | netdev->dev_addr[3], | |
3428 | netdev->dev_addr[4], | |
3429 | netdev->dev_addr[5]); | |
d7699f87 GFT |
3430 | |
3431 | return 0; | |
3432 | ||
3433 | err_out_unmap: | |
3434 | iounmap(jme->regs); | |
3435 | err_out_free_netdev: | |
3436 | pci_set_drvdata(pdev, NULL); | |
3437 | free_netdev(netdev); | |
4330c2f2 GFT |
3438 | err_out_release_regions: |
3439 | pci_release_regions(pdev); | |
d7699f87 | 3440 | err_out_disable_pdev: |
cd0ff491 | 3441 | pci_disable_device(pdev); |
d7699f87 | 3442 | err_out: |
4330c2f2 | 3443 | return rc; |
d7699f87 GFT |
3444 | } |
3445 | ||
3bf61c55 GFT |
3446 | static void __devexit |
3447 | jme_remove_one(struct pci_dev *pdev) | |
3448 | { | |
d7699f87 GFT |
3449 | struct net_device *netdev = pci_get_drvdata(pdev); |
3450 | struct jme_adapter *jme = netdev_priv(netdev); | |
3451 | ||
3452 | unregister_netdev(netdev); | |
3453 | iounmap(jme->regs); | |
3454 | pci_set_drvdata(pdev, NULL); | |
3455 | free_netdev(netdev); | |
3456 | pci_release_regions(pdev); | |
3457 | pci_disable_device(pdev); | |
3458 | ||
3459 | } | |
3460 | ||
a82e368c GFT |
3461 | static void |
3462 | jme_shutdown(struct pci_dev *pdev) | |
3463 | { | |
3464 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3465 | struct jme_adapter *jme = netdev_priv(netdev); | |
3466 | ||
61891ee4 GFT |
3467 | jme_powersave_phy(jme); |
3468 | #ifndef JME_NEW_PM_API | |
3469 | jme_pci_wakeup_enable(jme, !!(jme->reg_pmcs)); | |
3470 | #endif | |
3d12cc1b | 3471 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) |
61891ee4 | 3472 | device_set_wakeup_enable(&jme->pdev->dev, !!(jme->reg_pmcs)); |
a82e368c GFT |
3473 | #endif |
3474 | } | |
3475 | ||
fda5634a GFT |
3476 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25) |
3477 | #ifdef CONFIG_PM | |
3478 | #define JME_HAVE_PM | |
3479 | #endif | |
3480 | #else | |
3481 | #ifdef CONFIG_PM_SLEEP | |
3482 | #define JME_HAVE_PM | |
3483 | #endif | |
3484 | #endif | |
3485 | ||
3486 | #ifdef JME_HAVE_PM | |
29bdd921 | 3487 | static int |
3d12cc1b | 3488 | #ifdef JME_NEW_PM_API |
7370b85a | 3489 | jme_suspend(struct device *dev) |
3d12cc1b GFT |
3490 | #else |
3491 | jme_suspend(struct pci_dev *pdev, pm_message_t state) | |
7370b85a | 3492 | #endif |
29bdd921 | 3493 | { |
3d12cc1b | 3494 | #ifdef JME_NEW_PM_API |
7370b85a RW |
3495 | struct pci_dev *pdev = to_pci_dev(dev); |
3496 | #endif | |
29bdd921 GFT |
3497 | struct net_device *netdev = pci_get_drvdata(pdev); |
3498 | struct jme_adapter *jme = netdev_priv(netdev); | |
29bdd921 GFT |
3499 | |
3500 | atomic_dec(&jme->link_changing); | |
3501 | ||
3502 | netif_device_detach(netdev); | |
3503 | netif_stop_queue(netdev); | |
3504 | jme_stop_irq(jme); | |
29bdd921 | 3505 | |
cd0ff491 GFT |
3506 | tasklet_disable(&jme->txclean_task); |
3507 | tasklet_disable(&jme->rxclean_task); | |
3508 | tasklet_disable(&jme->rxempty_task); | |
3509 | ||
cd0ff491 GFT |
3510 | if (netif_carrier_ok(netdev)) { |
3511 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
47220951 GFT |
3512 | jme_polling_mode(jme); |
3513 | ||
29bdd921 | 3514 | jme_stop_pcc_timer(jme); |
cd0ff491 GFT |
3515 | jme_disable_rx_engine(jme); |
3516 | jme_disable_tx_engine(jme); | |
29bdd921 GFT |
3517 | jme_reset_mac_processor(jme); |
3518 | jme_free_rx_resources(jme); | |
3519 | jme_free_tx_resources(jme); | |
3520 | netif_carrier_off(netdev); | |
3521 | jme->phylink = 0; | |
3522 | } | |
3523 | ||
cd0ff491 GFT |
3524 | tasklet_enable(&jme->txclean_task); |
3525 | tasklet_hi_enable(&jme->rxclean_task); | |
3526 | tasklet_hi_enable(&jme->rxempty_task); | |
29bdd921 | 3527 | |
a82e368c | 3528 | jme_powersave_phy(jme); |
3d12cc1b | 3529 | #ifndef JME_NEW_PM_API |
7370b85a | 3530 | pci_save_state(pdev); |
61891ee4 | 3531 | jme_pci_wakeup_enable(jme, !!(jme->reg_pmcs)); |
a82e368c | 3532 | pci_set_power_state(pdev, PCI_D3hot); |
7370b85a | 3533 | #endif |
29bdd921 GFT |
3534 | |
3535 | return 0; | |
3536 | } | |
3537 | ||
3538 | static int | |
3d12cc1b | 3539 | #ifdef JME_NEW_PM_API |
7370b85a | 3540 | jme_resume(struct device *dev) |
3d12cc1b GFT |
3541 | #else |
3542 | jme_resume(struct pci_dev *pdev) | |
7370b85a | 3543 | #endif |
29bdd921 | 3544 | { |
3d12cc1b | 3545 | #ifdef JME_NEW_PM_API |
7370b85a RW |
3546 | struct pci_dev *pdev = to_pci_dev(dev); |
3547 | #endif | |
29bdd921 GFT |
3548 | struct net_device *netdev = pci_get_drvdata(pdev); |
3549 | struct jme_adapter *jme = netdev_priv(netdev); | |
3550 | ||
3551 | jme_clear_pm(jme); | |
3d12cc1b GFT |
3552 | #ifndef JME_NEW_PM_API |
3553 | pci_set_power_state(pdev, PCI_D0); | |
29bdd921 | 3554 | pci_restore_state(pdev); |
7370b85a | 3555 | #endif |
29bdd921 | 3556 | |
ed457bcc GFT |
3557 | jme_phy_on(jme); |
3558 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
29bdd921 | 3559 | jme_set_settings(netdev, &jme->old_ecmd); |
ed457bcc | 3560 | else |
29bdd921 GFT |
3561 | jme_reset_phy_processor(jme); |
3562 | ||
29bdd921 GFT |
3563 | jme_start_irq(jme); |
3564 | netif_device_attach(netdev); | |
3565 | ||
3566 | atomic_inc(&jme->link_changing); | |
3567 | ||
3568 | jme_reset_link(jme); | |
3569 | ||
3570 | return 0; | |
3571 | } | |
7370b85a | 3572 | |
e3b96dc9 | 3573 | #ifdef JME_NEW_PM_API |
7370b85a RW |
3574 | static SIMPLE_DEV_PM_OPS(jme_pm_ops, jme_suspend, jme_resume); |
3575 | #define JME_PM_OPS (&jme_pm_ops) | |
3576 | #endif | |
3577 | ||
3578 | #else | |
3579 | ||
e3b96dc9 | 3580 | #ifdef JME_NEW_PM_API |
7370b85a RW |
3581 | #define JME_PM_OPS NULL |
3582 | #endif | |
7ee473a3 | 3583 | #endif |
29bdd921 | 3584 | |
7ca9ebee | 3585 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24) |
d7699f87 | 3586 | static struct pci_device_id jme_pci_tbl[] = { |
7ca9ebee GFT |
3587 | #else |
3588 | static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = { | |
3589 | #endif | |
cd0ff491 GFT |
3590 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) }, |
3591 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) }, | |
d7699f87 GFT |
3592 | { } |
3593 | }; | |
3594 | ||
3595 | static struct pci_driver jme_driver = { | |
cd0ff491 GFT |
3596 | .name = DRV_NAME, |
3597 | .id_table = jme_pci_tbl, | |
3598 | .probe = jme_init_one, | |
3599 | .remove = __devexit_p(jme_remove_one), | |
a82e368c | 3600 | .shutdown = jme_shutdown, |
e3b96dc9 | 3601 | #ifndef JME_NEW_PM_API |
7370b85a RW |
3602 | .suspend = jme_suspend, |
3603 | .resume = jme_resume | |
3604 | #else | |
3605 | .driver.pm = JME_PM_OPS, | |
3606 | #endif | |
d7699f87 GFT |
3607 | }; |
3608 | ||
3bf61c55 GFT |
3609 | static int __init |
3610 | jme_init_module(void) | |
d7699f87 | 3611 | { |
937ef75a | 3612 | pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION); |
d7699f87 GFT |
3613 | return pci_register_driver(&jme_driver); |
3614 | } | |
3615 | ||
3bf61c55 GFT |
3616 | static void __exit |
3617 | jme_cleanup_module(void) | |
d7699f87 GFT |
3618 | { |
3619 | pci_unregister_driver(&jme_driver); | |
3620 | } | |
3621 | ||
3622 | module_init(jme_init_module); | |
3623 | module_exit(jme_cleanup_module); | |
3624 | ||
3bf61c55 | 3625 | MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>"); |
d7699f87 GFT |
3626 | MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver"); |
3627 | MODULE_LICENSE("GPL"); | |
3628 | MODULE_VERSION(DRV_VERSION); | |
3629 | MODULE_DEVICE_TABLE(pci, jme_pci_tbl); | |
3630 |