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d7699f87 GFT |
1 | /* |
2 | * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver | |
3 | * | |
4 | * Copyright 2008 JMicron Technology Corporation | |
5 | * http://www.jmicron.com/ | |
d3d584f5 | 6 | * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org> |
d7699f87 | 7 | * |
3bf61c55 GFT |
8 | * Author: Guo-Fu Tseng <cooldavid@cooldavid.org> |
9 | * | |
d7699f87 GFT |
10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | * | |
23 | */ | |
24 | ||
2e582300 | 25 | #include <linux/version.h> |
937ef75a JP |
26 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28) |
27 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
28 | #endif | |
29 | ||
d7699f87 GFT |
30 | #include <linux/module.h> |
31 | #include <linux/kernel.h> | |
32 | #include <linux/pci.h> | |
33 | #include <linux/netdevice.h> | |
34 | #include <linux/etherdevice.h> | |
35 | #include <linux/ethtool.h> | |
36 | #include <linux/mii.h> | |
37 | #include <linux/crc32.h> | |
4330c2f2 | 38 | #include <linux/delay.h> |
29bdd921 | 39 | #include <linux/spinlock.h> |
8c198884 GFT |
40 | #include <linux/in.h> |
41 | #include <linux/ip.h> | |
79ce639c GFT |
42 | #include <linux/ipv6.h> |
43 | #include <linux/tcp.h> | |
44 | #include <linux/udp.h> | |
42b1055e | 45 | #include <linux/if_vlan.h> |
38d1bc09 | 46 | #include <linux/slab.h> |
3b70a6fa | 47 | #include <net/ip6_checksum.h> |
d7699f87 GFT |
48 | #include "jme.h" |
49 | ||
cd0ff491 GFT |
50 | static int force_pseudohp = -1; |
51 | static int no_pseudohp = -1; | |
52 | static int no_extplug = -1; | |
53 | module_param(force_pseudohp, int, 0); | |
54 | MODULE_PARM_DESC(force_pseudohp, | |
55 | "Enable pseudo hot-plug feature manually by driver instead of BIOS."); | |
56 | module_param(no_pseudohp, int, 0); | |
57 | MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); | |
58 | module_param(no_extplug, int, 0); | |
59 | MODULE_PARM_DESC(no_extplug, | |
60 | "Do not use external plug signal for pseudo hot-plug."); | |
4330c2f2 | 61 | |
3bf61c55 GFT |
62 | static int |
63 | jme_mdio_read(struct net_device *netdev, int phy, int reg) | |
d7699f87 GFT |
64 | { |
65 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 66 | int i, val, again = (reg == MII_BMSR) ? 1 : 0; |
d7699f87 | 67 | |
186fc259 | 68 | read_again: |
cd0ff491 | 69 | jwrite32(jme, JME_SMI, SMI_OP_REQ | |
3bf61c55 GFT |
70 | smi_phy_addr(phy) | |
71 | smi_reg_addr(reg)); | |
d7699f87 GFT |
72 | |
73 | wmb(); | |
cd0ff491 | 74 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
cdcdc9eb | 75 | udelay(20); |
b3821cc5 GFT |
76 | val = jread32(jme, JME_SMI); |
77 | if ((val & SMI_OP_REQ) == 0) | |
3bf61c55 | 78 | break; |
cd0ff491 | 79 | } |
d7699f87 | 80 | |
cd0ff491 | 81 | if (i == 0) { |
937ef75a | 82 | pr_err("phy(%d) read timeout : %d\n", phy, reg); |
3bf61c55 | 83 | return 0; |
cd0ff491 | 84 | } |
d7699f87 | 85 | |
cd0ff491 | 86 | if (again--) |
186fc259 GFT |
87 | goto read_again; |
88 | ||
cd0ff491 | 89 | return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT; |
d7699f87 GFT |
90 | } |
91 | ||
3bf61c55 GFT |
92 | static void |
93 | jme_mdio_write(struct net_device *netdev, | |
94 | int phy, int reg, int val) | |
d7699f87 GFT |
95 | { |
96 | struct jme_adapter *jme = netdev_priv(netdev); | |
97 | int i; | |
98 | ||
3bf61c55 GFT |
99 | jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ | |
100 | ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | | |
101 | smi_phy_addr(phy) | smi_reg_addr(reg)); | |
d7699f87 GFT |
102 | |
103 | wmb(); | |
cdcdc9eb GFT |
104 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
105 | udelay(20); | |
8d27293f | 106 | if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0) |
3bf61c55 GFT |
107 | break; |
108 | } | |
d7699f87 | 109 | |
3bf61c55 | 110 | if (i == 0) |
937ef75a | 111 | pr_err("phy(%d) write timeout : %d\n", phy, reg); |
d7699f87 GFT |
112 | } |
113 | ||
cd0ff491 | 114 | static inline void |
3bf61c55 | 115 | jme_reset_phy_processor(struct jme_adapter *jme) |
d7699f87 | 116 | { |
cd0ff491 | 117 | u32 val; |
3bf61c55 GFT |
118 | |
119 | jme_mdio_write(jme->dev, | |
120 | jme->mii_if.phy_id, | |
8c198884 GFT |
121 | MII_ADVERTISE, ADVERTISE_ALL | |
122 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
3bf61c55 | 123 | |
cd0ff491 | 124 | if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
125 | jme_mdio_write(jme->dev, |
126 | jme->mii_if.phy_id, | |
127 | MII_CTRL1000, | |
128 | ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
3bf61c55 | 129 | |
fcf45b4c GFT |
130 | val = jme_mdio_read(jme->dev, |
131 | jme->mii_if.phy_id, | |
132 | MII_BMCR); | |
133 | ||
134 | jme_mdio_write(jme->dev, | |
135 | jme->mii_if.phy_id, | |
136 | MII_BMCR, val | BMCR_RESET); | |
3bf61c55 GFT |
137 | } |
138 | ||
b3821cc5 GFT |
139 | static void |
140 | jme_setup_wakeup_frame(struct jme_adapter *jme, | |
a4181cd4 | 141 | const u32 *mask, u32 crc, int fnr) |
b3821cc5 GFT |
142 | { |
143 | int i; | |
144 | ||
145 | /* | |
146 | * Setup CRC pattern | |
147 | */ | |
148 | jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL)); | |
149 | wmb(); | |
150 | jwrite32(jme, JME_WFODP, crc); | |
151 | wmb(); | |
152 | ||
153 | /* | |
154 | * Setup Mask | |
155 | */ | |
cd0ff491 | 156 | for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { |
b3821cc5 GFT |
157 | jwrite32(jme, JME_WFOI, |
158 | ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) | | |
159 | (fnr & WFOI_FRAME_SEL)); | |
160 | wmb(); | |
161 | jwrite32(jme, JME_WFODP, mask[i]); | |
162 | wmb(); | |
163 | } | |
164 | } | |
3bf61c55 | 165 | |
dc4185bd GFT |
166 | static inline void |
167 | jme_mac_rxclk_off(struct jme_adapter *jme) | |
168 | { | |
169 | jme->reg_gpreg1 |= GPREG1_RXCLKOFF; | |
170 | jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); | |
171 | } | |
172 | ||
173 | static inline void | |
174 | jme_mac_rxclk_on(struct jme_adapter *jme) | |
175 | { | |
176 | jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF; | |
177 | jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); | |
178 | } | |
179 | ||
180 | static inline void | |
181 | jme_mac_txclk_off(struct jme_adapter *jme) | |
182 | { | |
183 | jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC); | |
184 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
185 | } | |
186 | ||
187 | static inline void | |
188 | jme_mac_txclk_on(struct jme_adapter *jme) | |
189 | { | |
190 | u32 speed = jme->reg_ghc & GHC_SPEED; | |
191 | if (speed == GHC_SPEED_1000M) | |
192 | jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY; | |
193 | else | |
194 | jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; | |
195 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
196 | } | |
197 | ||
198 | static inline void | |
199 | jme_reset_ghc_speed(struct jme_adapter *jme) | |
200 | { | |
201 | jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX); | |
202 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
203 | } | |
204 | ||
205 | static inline void | |
206 | jme_reset_250A2_workaround(struct jme_adapter *jme) | |
207 | { | |
208 | jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | | |
209 | GPREG1_RSSPATCH); | |
210 | jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); | |
211 | } | |
212 | ||
213 | static inline void | |
214 | jme_assert_ghc_reset(struct jme_adapter *jme) | |
215 | { | |
216 | jme->reg_ghc |= GHC_SWRST; | |
217 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
218 | } | |
219 | ||
220 | static inline void | |
221 | jme_clear_ghc_reset(struct jme_adapter *jme) | |
222 | { | |
223 | jme->reg_ghc &= ~GHC_SWRST; | |
224 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
225 | } | |
226 | ||
cd0ff491 | 227 | static inline void |
3bf61c55 GFT |
228 | jme_reset_mac_processor(struct jme_adapter *jme) |
229 | { | |
a4181cd4 | 230 | static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; |
cd0ff491 GFT |
231 | u32 crc = 0xCDCDCDCD; |
232 | u32 gpreg0; | |
b3821cc5 GFT |
233 | int i; |
234 | ||
dc4185bd GFT |
235 | jme_reset_ghc_speed(jme); |
236 | jme_reset_250A2_workaround(jme); | |
237 | ||
238 | jme_mac_rxclk_on(jme); | |
239 | jme_mac_txclk_on(jme); | |
240 | udelay(1); | |
241 | jme_assert_ghc_reset(jme); | |
242 | udelay(1); | |
243 | jme_mac_rxclk_off(jme); | |
244 | jme_mac_txclk_off(jme); | |
245 | udelay(1); | |
246 | jme_clear_ghc_reset(jme); | |
247 | udelay(1); | |
248 | jme_mac_rxclk_on(jme); | |
249 | jme_mac_txclk_on(jme); | |
250 | udelay(1); | |
251 | jme_mac_rxclk_off(jme); | |
252 | jme_mac_txclk_off(jme); | |
cd0ff491 GFT |
253 | |
254 | jwrite32(jme, JME_RXDBA_LO, 0x00000000); | |
255 | jwrite32(jme, JME_RXDBA_HI, 0x00000000); | |
256 | jwrite32(jme, JME_RXQDC, 0x00000000); | |
257 | jwrite32(jme, JME_RXNDA, 0x00000000); | |
258 | jwrite32(jme, JME_TXDBA_LO, 0x00000000); | |
259 | jwrite32(jme, JME_TXDBA_HI, 0x00000000); | |
260 | jwrite32(jme, JME_TXQDC, 0x00000000); | |
261 | jwrite32(jme, JME_TXNDA, 0x00000000); | |
262 | ||
4330c2f2 GFT |
263 | jwrite32(jme, JME_RXMCHT_LO, 0x00000000); |
264 | jwrite32(jme, JME_RXMCHT_HI, 0x00000000); | |
cd0ff491 | 265 | for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i) |
b3821cc5 | 266 | jme_setup_wakeup_frame(jme, mask, crc, i); |
cd0ff491 | 267 | if (jme->fpgaver) |
cdcdc9eb GFT |
268 | gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL; |
269 | else | |
270 | gpreg0 = GPREG0_DEFAULT; | |
271 | jwrite32(jme, JME_GPREG0, gpreg0); | |
cd0ff491 GFT |
272 | } |
273 | ||
274 | static inline void | |
3bf61c55 | 275 | jme_clear_pm(struct jme_adapter *jme) |
d7699f87 | 276 | { |
29bdd921 | 277 | jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs); |
4330c2f2 | 278 | pci_set_power_state(jme->pdev, PCI_D0); |
42b1055e | 279 | pci_enable_wake(jme->pdev, PCI_D0, false); |
d7699f87 GFT |
280 | } |
281 | ||
3bf61c55 GFT |
282 | static int |
283 | jme_reload_eeprom(struct jme_adapter *jme) | |
d7699f87 | 284 | { |
cd0ff491 | 285 | u32 val; |
d7699f87 GFT |
286 | int i; |
287 | ||
288 | val = jread32(jme, JME_SMBCSR); | |
289 | ||
cd0ff491 | 290 | if (val & SMBCSR_EEPROMD) { |
d7699f87 GFT |
291 | val |= SMBCSR_CNACK; |
292 | jwrite32(jme, JME_SMBCSR, val); | |
293 | val |= SMBCSR_RELOAD; | |
294 | jwrite32(jme, JME_SMBCSR, val); | |
295 | mdelay(12); | |
296 | ||
cd0ff491 | 297 | for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) { |
d7699f87 GFT |
298 | mdelay(1); |
299 | if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0) | |
300 | break; | |
301 | } | |
302 | ||
cd0ff491 | 303 | if (i == 0) { |
937ef75a | 304 | pr_err("eeprom reload timeout\n"); |
d7699f87 GFT |
305 | return -EIO; |
306 | } | |
307 | } | |
3bf61c55 | 308 | |
d7699f87 GFT |
309 | return 0; |
310 | } | |
311 | ||
3bf61c55 GFT |
312 | static void |
313 | jme_load_macaddr(struct net_device *netdev) | |
d7699f87 GFT |
314 | { |
315 | struct jme_adapter *jme = netdev_priv(netdev); | |
316 | unsigned char macaddr[6]; | |
cd0ff491 | 317 | u32 val; |
d7699f87 | 318 | |
cd0ff491 | 319 | spin_lock_bh(&jme->macaddr_lock); |
4330c2f2 | 320 | val = jread32(jme, JME_RXUMA_LO); |
d7699f87 GFT |
321 | macaddr[0] = (val >> 0) & 0xFF; |
322 | macaddr[1] = (val >> 8) & 0xFF; | |
323 | macaddr[2] = (val >> 16) & 0xFF; | |
324 | macaddr[3] = (val >> 24) & 0xFF; | |
4330c2f2 | 325 | val = jread32(jme, JME_RXUMA_HI); |
d7699f87 GFT |
326 | macaddr[4] = (val >> 0) & 0xFF; |
327 | macaddr[5] = (val >> 8) & 0xFF; | |
cd0ff491 GFT |
328 | memcpy(netdev->dev_addr, macaddr, 6); |
329 | spin_unlock_bh(&jme->macaddr_lock); | |
3bf61c55 GFT |
330 | } |
331 | ||
cd0ff491 | 332 | static inline void |
3bf61c55 GFT |
333 | jme_set_rx_pcc(struct jme_adapter *jme, int p) |
334 | { | |
cd0ff491 | 335 | switch (p) { |
192570e0 GFT |
336 | case PCC_OFF: |
337 | jwrite32(jme, JME_PCCRX0, | |
338 | ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
339 | ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
340 | break; | |
3bf61c55 GFT |
341 | case PCC_P1: |
342 | jwrite32(jme, JME_PCCRX0, | |
343 | ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
344 | ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
345 | break; | |
346 | case PCC_P2: | |
347 | jwrite32(jme, JME_PCCRX0, | |
348 | ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
349 | ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
350 | break; | |
351 | case PCC_P3: | |
352 | jwrite32(jme, JME_PCCRX0, | |
353 | ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
354 | ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
355 | break; | |
356 | default: | |
357 | break; | |
358 | } | |
192570e0 | 359 | wmb(); |
3bf61c55 | 360 | |
cd0ff491 | 361 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
7ca9ebee | 362 | netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p); |
d7699f87 GFT |
363 | } |
364 | ||
fcf45b4c | 365 | static void |
3bf61c55 | 366 | jme_start_irq(struct jme_adapter *jme) |
d7699f87 | 367 | { |
3bf61c55 GFT |
368 | register struct dynpcc_info *dpi = &(jme->dpi); |
369 | ||
370 | jme_set_rx_pcc(jme, PCC_P1); | |
3bf61c55 GFT |
371 | dpi->cur = PCC_P1; |
372 | dpi->attempt = PCC_P1; | |
373 | dpi->cnt = 0; | |
374 | ||
375 | jwrite32(jme, JME_PCCTX, | |
8c198884 GFT |
376 | ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) | |
377 | ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) | | |
3bf61c55 GFT |
378 | PCCTXQ0_EN |
379 | ); | |
380 | ||
d7699f87 GFT |
381 | /* |
382 | * Enable Interrupts | |
383 | */ | |
384 | jwrite32(jme, JME_IENS, INTR_ENABLE); | |
385 | } | |
386 | ||
cd0ff491 | 387 | static inline void |
3bf61c55 | 388 | jme_stop_irq(struct jme_adapter *jme) |
d7699f87 GFT |
389 | { |
390 | /* | |
391 | * Disable Interrupts | |
392 | */ | |
cd0ff491 | 393 | jwrite32f(jme, JME_IENC, INTR_ENABLE); |
d7699f87 GFT |
394 | } |
395 | ||
cd0ff491 | 396 | static u32 |
cdcdc9eb GFT |
397 | jme_linkstat_from_phy(struct jme_adapter *jme) |
398 | { | |
cd0ff491 | 399 | u32 phylink, bmsr; |
cdcdc9eb GFT |
400 | |
401 | phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17); | |
402 | bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR); | |
cd0ff491 | 403 | if (bmsr & BMSR_ANCOMP) |
cdcdc9eb GFT |
404 | phylink |= PHY_LINK_AUTONEG_COMPLETE; |
405 | ||
406 | return phylink; | |
407 | } | |
408 | ||
cd0ff491 | 409 | static inline void |
55d19799 | 410 | jme_set_phyfifo_5level(struct jme_adapter *jme) |
cd0ff491 GFT |
411 | { |
412 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); | |
413 | } | |
414 | ||
415 | static inline void | |
55d19799 | 416 | jme_set_phyfifo_8level(struct jme_adapter *jme) |
cd0ff491 GFT |
417 | { |
418 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); | |
419 | } | |
420 | ||
fcf45b4c GFT |
421 | static int |
422 | jme_check_link(struct net_device *netdev, int testonly) | |
d7699f87 GFT |
423 | { |
424 | struct jme_adapter *jme = netdev_priv(netdev); | |
dc4185bd | 425 | u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr; |
79ce639c | 426 | char linkmsg[64]; |
fcf45b4c | 427 | int rc = 0; |
d7699f87 | 428 | |
b3821cc5 | 429 | linkmsg[0] = '\0'; |
cdcdc9eb | 430 | |
cd0ff491 | 431 | if (jme->fpgaver) |
cdcdc9eb GFT |
432 | phylink = jme_linkstat_from_phy(jme); |
433 | else | |
434 | phylink = jread32(jme, JME_PHY_LINK); | |
d7699f87 | 435 | |
cd0ff491 GFT |
436 | if (phylink & PHY_LINK_UP) { |
437 | if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { | |
8c198884 GFT |
438 | /* |
439 | * If we did not enable AN | |
440 | * Speed/Duplex Info should be obtained from SMI | |
441 | */ | |
442 | phylink = PHY_LINK_UP; | |
443 | ||
444 | bmcr = jme_mdio_read(jme->dev, | |
445 | jme->mii_if.phy_id, | |
446 | MII_BMCR); | |
447 | ||
448 | phylink |= ((bmcr & BMCR_SPEED1000) && | |
449 | (bmcr & BMCR_SPEED100) == 0) ? | |
450 | PHY_LINK_SPEED_1000M : | |
451 | (bmcr & BMCR_SPEED100) ? | |
452 | PHY_LINK_SPEED_100M : | |
453 | PHY_LINK_SPEED_10M; | |
454 | ||
455 | phylink |= (bmcr & BMCR_FULLDPLX) ? | |
456 | PHY_LINK_DUPLEX : 0; | |
79ce639c | 457 | |
b3821cc5 | 458 | strcat(linkmsg, "Forced: "); |
cd0ff491 | 459 | } else { |
8c198884 GFT |
460 | /* |
461 | * Keep polling for speed/duplex resolve complete | |
462 | */ | |
cd0ff491 | 463 | while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && |
8c198884 GFT |
464 | --cnt) { |
465 | ||
466 | udelay(1); | |
8c198884 | 467 | |
cd0ff491 | 468 | if (jme->fpgaver) |
cdcdc9eb GFT |
469 | phylink = jme_linkstat_from_phy(jme); |
470 | else | |
471 | phylink = jread32(jme, JME_PHY_LINK); | |
8c198884 | 472 | } |
cd0ff491 | 473 | if (!cnt) |
937ef75a | 474 | pr_err("Waiting speed resolve timeout\n"); |
79ce639c | 475 | |
b3821cc5 | 476 | strcat(linkmsg, "ANed: "); |
d7699f87 GFT |
477 | } |
478 | ||
cd0ff491 | 479 | if (jme->phylink == phylink) { |
fcf45b4c GFT |
480 | rc = 1; |
481 | goto out; | |
482 | } | |
cd0ff491 | 483 | if (testonly) |
fcf45b4c GFT |
484 | goto out; |
485 | ||
486 | jme->phylink = phylink; | |
487 | ||
dc4185bd GFT |
488 | /* |
489 | * The speed/duplex setting of jme->reg_ghc already cleared | |
490 | * by jme_reset_mac_processor() | |
491 | */ | |
cd0ff491 GFT |
492 | switch (phylink & PHY_LINK_SPEED_MASK) { |
493 | case PHY_LINK_SPEED_10M: | |
dc4185bd | 494 | jme->reg_ghc |= GHC_SPEED_10M; |
cd0ff491 | 495 | strcat(linkmsg, "10 Mbps, "); |
cd0ff491 GFT |
496 | break; |
497 | case PHY_LINK_SPEED_100M: | |
dc4185bd | 498 | jme->reg_ghc |= GHC_SPEED_100M; |
cd0ff491 | 499 | strcat(linkmsg, "100 Mbps, "); |
cd0ff491 GFT |
500 | break; |
501 | case PHY_LINK_SPEED_1000M: | |
dc4185bd | 502 | jme->reg_ghc |= GHC_SPEED_1000M; |
cd0ff491 | 503 | strcat(linkmsg, "1000 Mbps, "); |
cd0ff491 GFT |
504 | break; |
505 | default: | |
506 | break; | |
d7699f87 | 507 | } |
d7699f87 | 508 | |
cd0ff491 | 509 | if (phylink & PHY_LINK_DUPLEX) { |
d7699f87 | 510 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); |
809b2798 | 511 | jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX); |
dc4185bd | 512 | jme->reg_ghc |= GHC_DPX; |
cd0ff491 | 513 | } else { |
d7699f87 | 514 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | |
3bf61c55 GFT |
515 | TXMCS_BACKOFF | |
516 | TXMCS_CARRIERSENSE | | |
517 | TXMCS_COLLISION); | |
809b2798 | 518 | jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX); |
8c198884 | 519 | } |
7ee473a3 | 520 | |
dc4185bd GFT |
521 | jwrite32(jme, JME_GHC, jme->reg_ghc); |
522 | ||
7ee473a3 | 523 | if (is_buggy250(jme->pdev->device, jme->chiprev)) { |
dc4185bd GFT |
524 | jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | |
525 | GPREG1_RSSPATCH); | |
7ee473a3 | 526 | if (!(phylink & PHY_LINK_DUPLEX)) |
dc4185bd | 527 | jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH; |
7ee473a3 GFT |
528 | switch (phylink & PHY_LINK_SPEED_MASK) { |
529 | case PHY_LINK_SPEED_10M: | |
55d19799 | 530 | jme_set_phyfifo_8level(jme); |
dc4185bd | 531 | jme->reg_gpreg1 |= GPREG1_RSSPATCH; |
7ee473a3 GFT |
532 | break; |
533 | case PHY_LINK_SPEED_100M: | |
55d19799 | 534 | jme_set_phyfifo_5level(jme); |
dc4185bd | 535 | jme->reg_gpreg1 |= GPREG1_RSSPATCH; |
7ee473a3 GFT |
536 | break; |
537 | case PHY_LINK_SPEED_1000M: | |
55d19799 | 538 | jme_set_phyfifo_8level(jme); |
7ee473a3 GFT |
539 | break; |
540 | default: | |
541 | break; | |
542 | } | |
543 | } | |
dc4185bd | 544 | jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); |
fcf45b4c | 545 | |
3b70a6fa GFT |
546 | strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? |
547 | "Full-Duplex, " : | |
548 | "Half-Duplex, "); | |
549 | strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ? | |
550 | "MDI-X" : | |
551 | "MDI"); | |
937ef75a | 552 | netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg); |
cd0ff491 GFT |
553 | netif_carrier_on(netdev); |
554 | } else { | |
555 | if (testonly) | |
fcf45b4c GFT |
556 | goto out; |
557 | ||
937ef75a | 558 | netif_info(jme, link, jme->dev, "Link is down\n"); |
fcf45b4c | 559 | jme->phylink = 0; |
cd0ff491 | 560 | netif_carrier_off(netdev); |
d7699f87 | 561 | } |
fcf45b4c GFT |
562 | |
563 | out: | |
564 | return rc; | |
d7699f87 GFT |
565 | } |
566 | ||
3bf61c55 GFT |
567 | static int |
568 | jme_setup_tx_resources(struct jme_adapter *jme) | |
d7699f87 | 569 | { |
d7699f87 GFT |
570 | struct jme_ring *txring = &(jme->txring[0]); |
571 | ||
572 | txring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
573 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
574 | &(txring->dmaalloc), | |
575 | GFP_ATOMIC); | |
fcf45b4c | 576 | |
0ede469c GFT |
577 | if (!txring->alloc) |
578 | goto err_set_null; | |
d7699f87 GFT |
579 | |
580 | /* | |
581 | * 16 Bytes align | |
582 | */ | |
cd0ff491 | 583 | txring->desc = (void *)ALIGN((unsigned long)(txring->alloc), |
3bf61c55 | 584 | RING_DESC_ALIGN); |
4330c2f2 | 585 | txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 586 | txring->next_to_use = 0; |
cdcdc9eb | 587 | atomic_set(&txring->next_to_clean, 0); |
b3821cc5 | 588 | atomic_set(&txring->nr_free, jme->tx_ring_size); |
d7699f87 | 589 | |
0ede469c GFT |
590 | txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
591 | jme->tx_ring_size, GFP_ATOMIC); | |
592 | if (unlikely(!(txring->bufinf))) | |
593 | goto err_free_txring; | |
594 | ||
d7699f87 | 595 | /* |
b3821cc5 | 596 | * Initialize Transmit Descriptors |
d7699f87 | 597 | */ |
b3821cc5 | 598 | memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size)); |
3bf61c55 | 599 | memset(txring->bufinf, 0, |
b3821cc5 | 600 | sizeof(struct jme_buffer_info) * jme->tx_ring_size); |
d7699f87 GFT |
601 | |
602 | return 0; | |
0ede469c GFT |
603 | |
604 | err_free_txring: | |
605 | dma_free_coherent(&(jme->pdev->dev), | |
606 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), | |
607 | txring->alloc, | |
608 | txring->dmaalloc); | |
609 | ||
610 | err_set_null: | |
611 | txring->desc = NULL; | |
612 | txring->dmaalloc = 0; | |
613 | txring->dma = 0; | |
614 | txring->bufinf = NULL; | |
615 | ||
616 | return -ENOMEM; | |
d7699f87 GFT |
617 | } |
618 | ||
3bf61c55 GFT |
619 | static void |
620 | jme_free_tx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
621 | { |
622 | int i; | |
623 | struct jme_ring *txring = &(jme->txring[0]); | |
0ede469c | 624 | struct jme_buffer_info *txbi; |
d7699f87 | 625 | |
cd0ff491 | 626 | if (txring->alloc) { |
0ede469c GFT |
627 | if (txring->bufinf) { |
628 | for (i = 0 ; i < jme->tx_ring_size ; ++i) { | |
629 | txbi = txring->bufinf + i; | |
630 | if (txbi->skb) { | |
631 | dev_kfree_skb(txbi->skb); | |
632 | txbi->skb = NULL; | |
633 | } | |
634 | txbi->mapping = 0; | |
635 | txbi->len = 0; | |
636 | txbi->nr_desc = 0; | |
637 | txbi->start_xmit = 0; | |
d7699f87 | 638 | } |
0ede469c | 639 | kfree(txring->bufinf); |
d7699f87 GFT |
640 | } |
641 | ||
642 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 643 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
d7699f87 GFT |
644 | txring->alloc, |
645 | txring->dmaalloc); | |
3bf61c55 GFT |
646 | |
647 | txring->alloc = NULL; | |
648 | txring->desc = NULL; | |
649 | txring->dmaalloc = 0; | |
650 | txring->dma = 0; | |
0ede469c | 651 | txring->bufinf = NULL; |
d7699f87 | 652 | } |
3bf61c55 | 653 | txring->next_to_use = 0; |
cdcdc9eb | 654 | atomic_set(&txring->next_to_clean, 0); |
79ce639c | 655 | atomic_set(&txring->nr_free, 0); |
d7699f87 GFT |
656 | } |
657 | ||
cd0ff491 | 658 | static inline void |
3bf61c55 | 659 | jme_enable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
660 | { |
661 | /* | |
662 | * Select Queue 0 | |
663 | */ | |
664 | jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0); | |
cd0ff491 | 665 | wmb(); |
d7699f87 GFT |
666 | |
667 | /* | |
668 | * Setup TX Queue 0 DMA Bass Address | |
669 | */ | |
fcf45b4c | 670 | jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
3bf61c55 | 671 | jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32); |
fcf45b4c | 672 | jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
d7699f87 GFT |
673 | |
674 | /* | |
675 | * Setup TX Descptor Count | |
676 | */ | |
b3821cc5 | 677 | jwrite32(jme, JME_TXQDC, jme->tx_ring_size); |
d7699f87 GFT |
678 | |
679 | /* | |
680 | * Enable TX Engine | |
681 | */ | |
682 | wmb(); | |
dc4185bd | 683 | jwrite32f(jme, JME_TXCS, jme->reg_txcs | |
4330c2f2 GFT |
684 | TXCS_SELECT_QUEUE0 | |
685 | TXCS_ENABLE); | |
d7699f87 | 686 | |
dc4185bd GFT |
687 | /* |
688 | * Start clock for TX MAC Processor | |
689 | */ | |
690 | jme_mac_txclk_on(jme); | |
d7699f87 GFT |
691 | } |
692 | ||
cd0ff491 | 693 | static inline void |
29bdd921 GFT |
694 | jme_restart_tx_engine(struct jme_adapter *jme) |
695 | { | |
696 | /* | |
697 | * Restart TX Engine | |
698 | */ | |
699 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | |
700 | TXCS_SELECT_QUEUE0 | | |
701 | TXCS_ENABLE); | |
702 | } | |
703 | ||
cd0ff491 | 704 | static inline void |
3bf61c55 | 705 | jme_disable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
706 | { |
707 | int i; | |
cd0ff491 | 708 | u32 val; |
d7699f87 GFT |
709 | |
710 | /* | |
711 | * Disable TX Engine | |
712 | */ | |
fcf45b4c | 713 | jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0); |
cd0ff491 | 714 | wmb(); |
d7699f87 GFT |
715 | |
716 | val = jread32(jme, JME_TXCS); | |
cd0ff491 | 717 | for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) { |
fcf45b4c | 718 | mdelay(1); |
d7699f87 | 719 | val = jread32(jme, JME_TXCS); |
cd0ff491 | 720 | rmb(); |
d7699f87 GFT |
721 | } |
722 | ||
cd0ff491 | 723 | if (!i) |
937ef75a | 724 | pr_err("Disable TX engine timeout\n"); |
dc4185bd GFT |
725 | |
726 | /* | |
727 | * Stop clock for TX MAC Processor | |
728 | */ | |
729 | jme_mac_txclk_off(jme); | |
d7699f87 GFT |
730 | } |
731 | ||
3bf61c55 GFT |
732 | static void |
733 | jme_set_clean_rxdesc(struct jme_adapter *jme, int i) | |
d7699f87 | 734 | { |
0ede469c | 735 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 736 | register struct rxdesc *rxdesc = rxring->desc; |
4330c2f2 GFT |
737 | struct jme_buffer_info *rxbi = rxring->bufinf; |
738 | rxdesc += i; | |
739 | rxbi += i; | |
740 | ||
741 | rxdesc->dw[0] = 0; | |
742 | rxdesc->dw[1] = 0; | |
3bf61c55 | 743 | rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32); |
fcf45b4c GFT |
744 | rxdesc->desc1.bufaddrl = cpu_to_le32( |
745 | (__u64)rxbi->mapping & 0xFFFFFFFFUL); | |
3bf61c55 | 746 | rxdesc->desc1.datalen = cpu_to_le16(rxbi->len); |
cd0ff491 | 747 | if (jme->dev->features & NETIF_F_HIGHDMA) |
3bf61c55 | 748 | rxdesc->desc1.flags = RXFLAG_64BIT; |
d7699f87 | 749 | wmb(); |
3bf61c55 | 750 | rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT; |
d7699f87 GFT |
751 | } |
752 | ||
3bf61c55 GFT |
753 | static int |
754 | jme_make_new_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
755 | { |
756 | struct jme_ring *rxring = &(jme->rxring[0]); | |
b3821cc5 | 757 | struct jme_buffer_info *rxbi = rxring->bufinf + i; |
cd0ff491 | 758 | struct sk_buff *skb; |
4330c2f2 | 759 | |
79ce639c GFT |
760 | skb = netdev_alloc_skb(jme->dev, |
761 | jme->dev->mtu + RX_EXTRA_LEN); | |
cd0ff491 | 762 | if (unlikely(!skb)) |
4330c2f2 | 763 | return -ENOMEM; |
3b70a6fa GFT |
764 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) |
765 | skb->dev = jme->dev; | |
766 | #endif | |
3bf61c55 | 767 | |
4330c2f2 | 768 | rxbi->skb = skb; |
3bf61c55 | 769 | rxbi->len = skb_tailroom(skb); |
b3821cc5 GFT |
770 | rxbi->mapping = pci_map_page(jme->pdev, |
771 | virt_to_page(skb->data), | |
772 | offset_in_page(skb->data), | |
773 | rxbi->len, | |
774 | PCI_DMA_FROMDEVICE); | |
4330c2f2 GFT |
775 | |
776 | return 0; | |
777 | } | |
778 | ||
3bf61c55 GFT |
779 | static void |
780 | jme_free_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
781 | { |
782 | struct jme_ring *rxring = &(jme->rxring[0]); | |
783 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
784 | rxbi += i; | |
785 | ||
cd0ff491 | 786 | if (rxbi->skb) { |
b3821cc5 | 787 | pci_unmap_page(jme->pdev, |
4330c2f2 | 788 | rxbi->mapping, |
3bf61c55 | 789 | rxbi->len, |
4330c2f2 GFT |
790 | PCI_DMA_FROMDEVICE); |
791 | dev_kfree_skb(rxbi->skb); | |
792 | rxbi->skb = NULL; | |
793 | rxbi->mapping = 0; | |
3bf61c55 | 794 | rxbi->len = 0; |
4330c2f2 GFT |
795 | } |
796 | } | |
797 | ||
3bf61c55 GFT |
798 | static void |
799 | jme_free_rx_resources(struct jme_adapter *jme) | |
800 | { | |
801 | int i; | |
802 | struct jme_ring *rxring = &(jme->rxring[0]); | |
803 | ||
cd0ff491 | 804 | if (rxring->alloc) { |
0ede469c GFT |
805 | if (rxring->bufinf) { |
806 | for (i = 0 ; i < jme->rx_ring_size ; ++i) | |
807 | jme_free_rx_buf(jme, i); | |
808 | kfree(rxring->bufinf); | |
809 | } | |
3bf61c55 GFT |
810 | |
811 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 812 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
3bf61c55 GFT |
813 | rxring->alloc, |
814 | rxring->dmaalloc); | |
815 | rxring->alloc = NULL; | |
816 | rxring->desc = NULL; | |
817 | rxring->dmaalloc = 0; | |
818 | rxring->dma = 0; | |
0ede469c | 819 | rxring->bufinf = NULL; |
3bf61c55 GFT |
820 | } |
821 | rxring->next_to_use = 0; | |
cdcdc9eb | 822 | atomic_set(&rxring->next_to_clean, 0); |
3bf61c55 GFT |
823 | } |
824 | ||
825 | static int | |
826 | jme_setup_rx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
827 | { |
828 | int i; | |
829 | struct jme_ring *rxring = &(jme->rxring[0]); | |
830 | ||
831 | rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
832 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
833 | &(rxring->dmaalloc), | |
834 | GFP_ATOMIC); | |
0ede469c GFT |
835 | if (!rxring->alloc) |
836 | goto err_set_null; | |
d7699f87 GFT |
837 | |
838 | /* | |
839 | * 16 Bytes align | |
840 | */ | |
cd0ff491 | 841 | rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc), |
3bf61c55 | 842 | RING_DESC_ALIGN); |
4330c2f2 | 843 | rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 844 | rxring->next_to_use = 0; |
cdcdc9eb | 845 | atomic_set(&rxring->next_to_clean, 0); |
d7699f87 | 846 | |
0ede469c GFT |
847 | rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
848 | jme->rx_ring_size, GFP_ATOMIC); | |
849 | if (unlikely(!(rxring->bufinf))) | |
850 | goto err_free_rxring; | |
851 | ||
d7699f87 GFT |
852 | /* |
853 | * Initiallize Receive Descriptors | |
854 | */ | |
0ede469c GFT |
855 | memset(rxring->bufinf, 0, |
856 | sizeof(struct jme_buffer_info) * jme->rx_ring_size); | |
cd0ff491 GFT |
857 | for (i = 0 ; i < jme->rx_ring_size ; ++i) { |
858 | if (unlikely(jme_make_new_rx_buf(jme, i))) { | |
3bf61c55 GFT |
859 | jme_free_rx_resources(jme); |
860 | return -ENOMEM; | |
861 | } | |
d7699f87 GFT |
862 | |
863 | jme_set_clean_rxdesc(jme, i); | |
864 | } | |
865 | ||
d7699f87 | 866 | return 0; |
0ede469c GFT |
867 | |
868 | err_free_rxring: | |
869 | dma_free_coherent(&(jme->pdev->dev), | |
870 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), | |
871 | rxring->alloc, | |
872 | rxring->dmaalloc); | |
873 | err_set_null: | |
874 | rxring->desc = NULL; | |
875 | rxring->dmaalloc = 0; | |
876 | rxring->dma = 0; | |
877 | rxring->bufinf = NULL; | |
878 | ||
879 | return -ENOMEM; | |
d7699f87 GFT |
880 | } |
881 | ||
cd0ff491 | 882 | static inline void |
3bf61c55 | 883 | jme_enable_rx_engine(struct jme_adapter *jme) |
d7699f87 | 884 | { |
cd0ff491 GFT |
885 | /* |
886 | * Select Queue 0 | |
887 | */ | |
888 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | | |
889 | RXCS_QUEUESEL_Q0); | |
890 | wmb(); | |
891 | ||
d7699f87 GFT |
892 | /* |
893 | * Setup RX DMA Bass Address | |
894 | */ | |
0ede469c | 895 | jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
3bf61c55 | 896 | jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32); |
0ede469c | 897 | jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
d7699f87 GFT |
898 | |
899 | /* | |
b3821cc5 | 900 | * Setup RX Descriptor Count |
d7699f87 | 901 | */ |
b3821cc5 | 902 | jwrite32(jme, JME_RXQDC, jme->rx_ring_size); |
d7699f87 | 903 | |
3bf61c55 | 904 | /* |
d7699f87 GFT |
905 | * Setup Unicast Filter |
906 | */ | |
e523cd89 | 907 | jme_set_unicastaddr(jme->dev); |
d7699f87 GFT |
908 | jme_set_multi(jme->dev); |
909 | ||
910 | /* | |
911 | * Enable RX Engine | |
912 | */ | |
913 | wmb(); | |
dc4185bd | 914 | jwrite32f(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
915 | RXCS_QUEUESEL_Q0 | |
916 | RXCS_ENABLE | | |
917 | RXCS_QST); | |
dc4185bd GFT |
918 | |
919 | /* | |
920 | * Start clock for RX MAC Processor | |
921 | */ | |
922 | jme_mac_rxclk_on(jme); | |
d7699f87 GFT |
923 | } |
924 | ||
cd0ff491 | 925 | static inline void |
3bf61c55 | 926 | jme_restart_rx_engine(struct jme_adapter *jme) |
4330c2f2 GFT |
927 | { |
928 | /* | |
3bf61c55 | 929 | * Start RX Engine |
4330c2f2 | 930 | */ |
79ce639c | 931 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
932 | RXCS_QUEUESEL_Q0 | |
933 | RXCS_ENABLE | | |
934 | RXCS_QST); | |
935 | } | |
936 | ||
cd0ff491 | 937 | static inline void |
3bf61c55 | 938 | jme_disable_rx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
939 | { |
940 | int i; | |
cd0ff491 | 941 | u32 val; |
d7699f87 GFT |
942 | |
943 | /* | |
944 | * Disable RX Engine | |
945 | */ | |
29bdd921 | 946 | jwrite32(jme, JME_RXCS, jme->reg_rxcs); |
cd0ff491 | 947 | wmb(); |
d7699f87 GFT |
948 | |
949 | val = jread32(jme, JME_RXCS); | |
cd0ff491 | 950 | for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) { |
29bdd921 | 951 | mdelay(1); |
d7699f87 | 952 | val = jread32(jme, JME_RXCS); |
cd0ff491 | 953 | rmb(); |
d7699f87 GFT |
954 | } |
955 | ||
cd0ff491 | 956 | if (!i) |
937ef75a | 957 | pr_err("Disable RX engine timeout\n"); |
d7699f87 | 958 | |
dc4185bd GFT |
959 | /* |
960 | * Stop clock for RX MAC Processor | |
961 | */ | |
962 | jme_mac_rxclk_off(jme); | |
d7699f87 GFT |
963 | } |
964 | ||
93f698ca GFT |
965 | static u16 |
966 | jme_udpsum(struct sk_buff *skb) | |
967 | { | |
968 | u16 csum = 0xFFFFu; | |
969 | ||
970 | if (skb->len < (ETH_HLEN + sizeof(struct iphdr))) | |
971 | return csum; | |
972 | if (skb->protocol != htons(ETH_P_IP)) | |
973 | return csum; | |
974 | skb_set_network_header(skb, ETH_HLEN); | |
975 | if ((ip_hdr(skb)->protocol != IPPROTO_UDP) || | |
976 | (skb->len < (ETH_HLEN + | |
977 | (ip_hdr(skb)->ihl << 2) + | |
978 | sizeof(struct udphdr)))) { | |
979 | skb_reset_network_header(skb); | |
980 | return csum; | |
981 | } | |
982 | skb_set_transport_header(skb, | |
983 | ETH_HLEN + (ip_hdr(skb)->ihl << 2)); | |
984 | csum = udp_hdr(skb)->check; | |
985 | skb_reset_transport_header(skb); | |
986 | skb_reset_network_header(skb); | |
987 | ||
988 | return csum; | |
989 | } | |
990 | ||
192570e0 | 991 | static int |
93f698ca | 992 | jme_rxsum_ok(struct jme_adapter *jme, u16 flags, struct sk_buff *skb) |
192570e0 | 993 | { |
cd0ff491 | 994 | if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) |
192570e0 GFT |
995 | return false; |
996 | ||
0ede469c GFT |
997 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS)) |
998 | == RXWBFLAG_TCPON)) { | |
999 | if (flags & RXWBFLAG_IPV4) | |
7ca9ebee | 1000 | netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n"); |
0ede469c | 1001 | return false; |
192570e0 GFT |
1002 | } |
1003 | ||
0ede469c | 1004 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS)) |
93f698ca | 1005 | == RXWBFLAG_UDPON) && jme_udpsum(skb)) { |
0ede469c | 1006 | if (flags & RXWBFLAG_IPV4) |
937ef75a | 1007 | netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n"); |
0ede469c | 1008 | return false; |
192570e0 GFT |
1009 | } |
1010 | ||
0ede469c GFT |
1011 | if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS)) |
1012 | == RXWBFLAG_IPV4)) { | |
937ef75a | 1013 | netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n"); |
0ede469c | 1014 | return false; |
192570e0 GFT |
1015 | } |
1016 | ||
1017 | return true; | |
1018 | } | |
1019 | ||
3bf61c55 | 1020 | static void |
42b1055e | 1021 | jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) |
d7699f87 | 1022 | { |
d7699f87 | 1023 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 1024 | struct rxdesc *rxdesc = rxring->desc; |
3bf61c55 | 1025 | struct jme_buffer_info *rxbi = rxring->bufinf; |
d7699f87 | 1026 | struct sk_buff *skb; |
3bf61c55 | 1027 | int framesize; |
d7699f87 | 1028 | |
3bf61c55 GFT |
1029 | rxdesc += idx; |
1030 | rxbi += idx; | |
d7699f87 | 1031 | |
3bf61c55 GFT |
1032 | skb = rxbi->skb; |
1033 | pci_dma_sync_single_for_cpu(jme->pdev, | |
1034 | rxbi->mapping, | |
1035 | rxbi->len, | |
1036 | PCI_DMA_FROMDEVICE); | |
1037 | ||
cd0ff491 | 1038 | if (unlikely(jme_make_new_rx_buf(jme, idx))) { |
3bf61c55 GFT |
1039 | pci_dma_sync_single_for_device(jme->pdev, |
1040 | rxbi->mapping, | |
1041 | rxbi->len, | |
1042 | PCI_DMA_FROMDEVICE); | |
1043 | ||
1044 | ++(NET_STAT(jme).rx_dropped); | |
cd0ff491 | 1045 | } else { |
3bf61c55 GFT |
1046 | framesize = le16_to_cpu(rxdesc->descwb.framesize) |
1047 | - RX_PREPAD_SIZE; | |
1048 | ||
1049 | skb_reserve(skb, RX_PREPAD_SIZE); | |
1050 | skb_put(skb, framesize); | |
1051 | skb->protocol = eth_type_trans(skb, jme->dev); | |
1052 | ||
93f698ca | 1053 | if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags), skb)) |
8c198884 | 1054 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
29bdd921 | 1055 | else |
08f5fcfa | 1056 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35) |
29bdd921 | 1057 | skb->ip_summed = CHECKSUM_NONE; |
08f5fcfa ED |
1058 | #else |
1059 | skb_checksum_none_assert(skb); | |
1060 | #endif | |
8c198884 | 1061 | |
3b70a6fa | 1062 | if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) { |
cd0ff491 | 1063 | if (jme->vlgrp) { |
cdcdc9eb | 1064 | jme->jme_vlan_rx(skb, jme->vlgrp, |
3b70a6fa | 1065 | le16_to_cpu(rxdesc->descwb.vlan)); |
b3821cc5 | 1066 | NET_STAT(jme).rx_bytes += 4; |
7ca9ebee | 1067 | } else { |
7ca9ebee | 1068 | dev_kfree_skb(skb); |
b3821cc5 | 1069 | } |
cd0ff491 | 1070 | } else { |
cdcdc9eb | 1071 | jme->jme_rx(skb); |
b3821cc5 | 1072 | } |
3bf61c55 | 1073 | |
3b70a6fa GFT |
1074 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) == |
1075 | cpu_to_le16(RXWBFLAG_DEST_MUL)) | |
3bf61c55 GFT |
1076 | ++(NET_STAT(jme).multicast); |
1077 | ||
3bf61c55 GFT |
1078 | NET_STAT(jme).rx_bytes += framesize; |
1079 | ++(NET_STAT(jme).rx_packets); | |
1080 | } | |
1081 | ||
1082 | jme_set_clean_rxdesc(jme, idx); | |
1083 | ||
1084 | } | |
1085 | ||
1086 | static int | |
1087 | jme_process_receive(struct jme_adapter *jme, int limit) | |
1088 | { | |
1089 | struct jme_ring *rxring = &(jme->rxring[0]); | |
cd0ff491 | 1090 | struct rxdesc *rxdesc = rxring->desc; |
b3821cc5 | 1091 | int i, j, ccnt, desccnt, mask = jme->rx_ring_mask; |
3bf61c55 | 1092 | |
cd0ff491 | 1093 | if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) |
192570e0 GFT |
1094 | goto out_inc; |
1095 | ||
cd0ff491 | 1096 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
192570e0 GFT |
1097 | goto out_inc; |
1098 | ||
cd0ff491 | 1099 | if (unlikely(!netif_carrier_ok(jme->dev))) |
192570e0 GFT |
1100 | goto out_inc; |
1101 | ||
cdcdc9eb | 1102 | i = atomic_read(&rxring->next_to_clean); |
0ede469c | 1103 | while (limit > 0) { |
3bf61c55 GFT |
1104 | rxdesc = rxring->desc; |
1105 | rxdesc += i; | |
1106 | ||
3b70a6fa | 1107 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) || |
3bf61c55 GFT |
1108 | !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL)) |
1109 | goto out; | |
0ede469c | 1110 | --limit; |
d7699f87 | 1111 | |
9134abda | 1112 | rmb(); |
4330c2f2 GFT |
1113 | desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; |
1114 | ||
cd0ff491 | 1115 | if (unlikely(desccnt > 1 || |
192570e0 | 1116 | rxdesc->descwb.errstat & RXWBERR_ALLERR)) { |
d7699f87 | 1117 | |
cd0ff491 | 1118 | if (rxdesc->descwb.errstat & RXWBERR_CRCERR) |
3bf61c55 | 1119 | ++(NET_STAT(jme).rx_crc_errors); |
cd0ff491 | 1120 | else if (rxdesc->descwb.errstat & RXWBERR_OVERUN) |
3bf61c55 GFT |
1121 | ++(NET_STAT(jme).rx_fifo_errors); |
1122 | else | |
1123 | ++(NET_STAT(jme).rx_errors); | |
4330c2f2 | 1124 | |
cd0ff491 | 1125 | if (desccnt > 1) |
3bf61c55 | 1126 | limit -= desccnt - 1; |
4330c2f2 | 1127 | |
cd0ff491 | 1128 | for (j = i, ccnt = desccnt ; ccnt-- ; ) { |
4330c2f2 | 1129 | jme_set_clean_rxdesc(jme, j); |
b3821cc5 | 1130 | j = (j + 1) & (mask); |
4330c2f2 | 1131 | } |
3bf61c55 | 1132 | |
cd0ff491 | 1133 | } else { |
42b1055e | 1134 | jme_alloc_and_feed_skb(jme, i); |
3bf61c55 | 1135 | } |
4330c2f2 | 1136 | |
b3821cc5 | 1137 | i = (i + desccnt) & (mask); |
3bf61c55 | 1138 | } |
4330c2f2 | 1139 | |
3bf61c55 | 1140 | out: |
cdcdc9eb | 1141 | atomic_set(&rxring->next_to_clean, i); |
4330c2f2 | 1142 | |
192570e0 GFT |
1143 | out_inc: |
1144 | atomic_inc(&jme->rx_cleaning); | |
1145 | ||
3bf61c55 | 1146 | return limit > 0 ? limit : 0; |
4330c2f2 | 1147 | |
3bf61c55 | 1148 | } |
d7699f87 | 1149 | |
79ce639c GFT |
1150 | static void |
1151 | jme_attempt_pcc(struct dynpcc_info *dpi, int atmp) | |
1152 | { | |
cd0ff491 | 1153 | if (likely(atmp == dpi->cur)) { |
192570e0 | 1154 | dpi->cnt = 0; |
79ce639c | 1155 | return; |
192570e0 | 1156 | } |
79ce639c | 1157 | |
cd0ff491 | 1158 | if (dpi->attempt == atmp) { |
79ce639c | 1159 | ++(dpi->cnt); |
cd0ff491 | 1160 | } else { |
79ce639c GFT |
1161 | dpi->attempt = atmp; |
1162 | dpi->cnt = 0; | |
1163 | } | |
1164 | ||
1165 | } | |
1166 | ||
1167 | static void | |
1168 | jme_dynamic_pcc(struct jme_adapter *jme) | |
1169 | { | |
1170 | register struct dynpcc_info *dpi = &(jme->dpi); | |
1171 | ||
cd0ff491 | 1172 | if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) |
79ce639c | 1173 | jme_attempt_pcc(dpi, PCC_P3); |
7ca9ebee GFT |
1174 | else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD || |
1175 | dpi->intr_cnt > PCC_INTR_THRESHOLD) | |
79ce639c GFT |
1176 | jme_attempt_pcc(dpi, PCC_P2); |
1177 | else | |
1178 | jme_attempt_pcc(dpi, PCC_P1); | |
1179 | ||
cd0ff491 GFT |
1180 | if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { |
1181 | if (dpi->attempt < dpi->cur) | |
1182 | tasklet_schedule(&jme->rxclean_task); | |
79ce639c GFT |
1183 | jme_set_rx_pcc(jme, dpi->attempt); |
1184 | dpi->cur = dpi->attempt; | |
1185 | dpi->cnt = 0; | |
1186 | } | |
1187 | } | |
1188 | ||
1189 | static void | |
1190 | jme_start_pcc_timer(struct jme_adapter *jme) | |
1191 | { | |
1192 | struct dynpcc_info *dpi = &(jme->dpi); | |
1193 | dpi->last_bytes = NET_STAT(jme).rx_bytes; | |
1194 | dpi->last_pkts = NET_STAT(jme).rx_packets; | |
1195 | dpi->intr_cnt = 0; | |
1196 | jwrite32(jme, JME_TMCSR, | |
1197 | TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT)); | |
1198 | } | |
1199 | ||
cd0ff491 | 1200 | static inline void |
29bdd921 GFT |
1201 | jme_stop_pcc_timer(struct jme_adapter *jme) |
1202 | { | |
1203 | jwrite32(jme, JME_TMCSR, 0); | |
1204 | } | |
1205 | ||
cd0ff491 GFT |
1206 | static void |
1207 | jme_shutdown_nic(struct jme_adapter *jme) | |
1208 | { | |
1209 | u32 phylink; | |
1210 | ||
1211 | phylink = jme_linkstat_from_phy(jme); | |
1212 | ||
1213 | if (!(phylink & PHY_LINK_UP)) { | |
1214 | /* | |
1215 | * Disable all interrupt before issue timer | |
1216 | */ | |
1217 | jme_stop_irq(jme); | |
1218 | jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE); | |
1219 | } | |
1220 | } | |
1221 | ||
79ce639c GFT |
1222 | static void |
1223 | jme_pcc_tasklet(unsigned long arg) | |
1224 | { | |
cd0ff491 | 1225 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c GFT |
1226 | struct net_device *netdev = jme->dev; |
1227 | ||
cd0ff491 GFT |
1228 | if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) { |
1229 | jme_shutdown_nic(jme); | |
1230 | return; | |
1231 | } | |
29bdd921 | 1232 | |
cd0ff491 | 1233 | if (unlikely(!netif_carrier_ok(netdev) || |
29bdd921 GFT |
1234 | (atomic_read(&jme->link_changing) != 1) |
1235 | )) { | |
1236 | jme_stop_pcc_timer(jme); | |
79ce639c GFT |
1237 | return; |
1238 | } | |
29bdd921 | 1239 | |
cd0ff491 | 1240 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
192570e0 GFT |
1241 | jme_dynamic_pcc(jme); |
1242 | ||
79ce639c GFT |
1243 | jme_start_pcc_timer(jme); |
1244 | } | |
1245 | ||
cd0ff491 | 1246 | static inline void |
192570e0 GFT |
1247 | jme_polling_mode(struct jme_adapter *jme) |
1248 | { | |
1249 | jme_set_rx_pcc(jme, PCC_OFF); | |
1250 | } | |
1251 | ||
cd0ff491 | 1252 | static inline void |
192570e0 GFT |
1253 | jme_interrupt_mode(struct jme_adapter *jme) |
1254 | { | |
1255 | jme_set_rx_pcc(jme, PCC_P1); | |
1256 | } | |
1257 | ||
cd0ff491 GFT |
1258 | static inline int |
1259 | jme_pseudo_hotplug_enabled(struct jme_adapter *jme) | |
1260 | { | |
1261 | u32 apmc; | |
1262 | apmc = jread32(jme, JME_APMC); | |
1263 | return apmc & JME_APMC_PSEUDO_HP_EN; | |
1264 | } | |
1265 | ||
1266 | static void | |
1267 | jme_start_shutdown_timer(struct jme_adapter *jme) | |
1268 | { | |
1269 | u32 apmc; | |
1270 | ||
1271 | apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN; | |
1272 | apmc &= ~JME_APMC_EPIEN_CTRL; | |
1273 | if (!no_extplug) { | |
1274 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN); | |
1275 | wmb(); | |
1276 | } | |
1277 | jwrite32f(jme, JME_APMC, apmc); | |
1278 | ||
1279 | jwrite32f(jme, JME_TIMER2, 0); | |
1280 | set_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1281 | jwrite32(jme, JME_TMCSR, | |
1282 | TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT)); | |
1283 | } | |
1284 | ||
1285 | static void | |
1286 | jme_stop_shutdown_timer(struct jme_adapter *jme) | |
1287 | { | |
1288 | u32 apmc; | |
1289 | ||
1290 | jwrite32f(jme, JME_TMCSR, 0); | |
1291 | jwrite32f(jme, JME_TIMER2, 0); | |
1292 | clear_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1293 | ||
1294 | apmc = jread32(jme, JME_APMC); | |
1295 | apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL); | |
1296 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS); | |
1297 | wmb(); | |
1298 | jwrite32f(jme, JME_APMC, apmc); | |
1299 | } | |
1300 | ||
3bf61c55 GFT |
1301 | static void |
1302 | jme_link_change_tasklet(unsigned long arg) | |
1303 | { | |
cd0ff491 | 1304 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1305 | struct net_device *netdev = jme->dev; |
fcf45b4c GFT |
1306 | int rc; |
1307 | ||
cd0ff491 GFT |
1308 | while (!atomic_dec_and_test(&jme->link_changing)) { |
1309 | atomic_inc(&jme->link_changing); | |
937ef75a | 1310 | netif_info(jme, intr, jme->dev, "Get link change lock failed\n"); |
58c92f28 | 1311 | while (atomic_read(&jme->link_changing) != 1) |
937ef75a | 1312 | netif_info(jme, intr, jme->dev, "Waiting link change lock\n"); |
cd0ff491 | 1313 | } |
fcf45b4c | 1314 | |
cd0ff491 | 1315 | if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) |
fcf45b4c GFT |
1316 | goto out; |
1317 | ||
29bdd921 | 1318 | jme->old_mtu = netdev->mtu; |
fcf45b4c | 1319 | netif_stop_queue(netdev); |
cd0ff491 GFT |
1320 | if (jme_pseudo_hotplug_enabled(jme)) |
1321 | jme_stop_shutdown_timer(jme); | |
1322 | ||
1323 | jme_stop_pcc_timer(jme); | |
1324 | tasklet_disable(&jme->txclean_task); | |
1325 | tasklet_disable(&jme->rxclean_task); | |
1326 | tasklet_disable(&jme->rxempty_task); | |
1327 | ||
1328 | if (netif_carrier_ok(netdev)) { | |
cd0ff491 GFT |
1329 | jme_disable_rx_engine(jme); |
1330 | jme_disable_tx_engine(jme); | |
fcf45b4c GFT |
1331 | jme_reset_mac_processor(jme); |
1332 | jme_free_rx_resources(jme); | |
1333 | jme_free_tx_resources(jme); | |
192570e0 | 1334 | |
cd0ff491 | 1335 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1336 | jme_polling_mode(jme); |
cd0ff491 GFT |
1337 | |
1338 | netif_carrier_off(netdev); | |
fcf45b4c GFT |
1339 | } |
1340 | ||
1341 | jme_check_link(netdev, 0); | |
cd0ff491 | 1342 | if (netif_carrier_ok(netdev)) { |
fcf45b4c | 1343 | rc = jme_setup_rx_resources(jme); |
cd0ff491 | 1344 | if (rc) { |
937ef75a | 1345 | pr_err("Allocating resources for RX error, Device STOPPED!\n"); |
cd0ff491 | 1346 | goto out_enable_tasklet; |
fcf45b4c GFT |
1347 | } |
1348 | ||
fcf45b4c | 1349 | rc = jme_setup_tx_resources(jme); |
cd0ff491 | 1350 | if (rc) { |
937ef75a | 1351 | pr_err("Allocating resources for TX error, Device STOPPED!\n"); |
fcf45b4c GFT |
1352 | goto err_out_free_rx_resources; |
1353 | } | |
1354 | ||
1355 | jme_enable_rx_engine(jme); | |
1356 | jme_enable_tx_engine(jme); | |
1357 | ||
1358 | netif_start_queue(netdev); | |
192570e0 | 1359 | |
cd0ff491 | 1360 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1361 | jme_interrupt_mode(jme); |
192570e0 | 1362 | |
79ce639c | 1363 | jme_start_pcc_timer(jme); |
cd0ff491 GFT |
1364 | } else if (jme_pseudo_hotplug_enabled(jme)) { |
1365 | jme_start_shutdown_timer(jme); | |
fcf45b4c GFT |
1366 | } |
1367 | ||
cd0ff491 | 1368 | goto out_enable_tasklet; |
fcf45b4c GFT |
1369 | |
1370 | err_out_free_rx_resources: | |
1371 | jme_free_rx_resources(jme); | |
cd0ff491 GFT |
1372 | out_enable_tasklet: |
1373 | tasklet_enable(&jme->txclean_task); | |
1374 | tasklet_hi_enable(&jme->rxclean_task); | |
1375 | tasklet_hi_enable(&jme->rxempty_task); | |
fcf45b4c GFT |
1376 | out: |
1377 | atomic_inc(&jme->link_changing); | |
3bf61c55 | 1378 | } |
d7699f87 | 1379 | |
3bf61c55 GFT |
1380 | static void |
1381 | jme_rx_clean_tasklet(unsigned long arg) | |
1382 | { | |
cd0ff491 | 1383 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c | 1384 | struct dynpcc_info *dpi = &(jme->dpi); |
d7699f87 | 1385 | |
192570e0 GFT |
1386 | jme_process_receive(jme, jme->rx_ring_size); |
1387 | ++(dpi->intr_cnt); | |
42b1055e | 1388 | |
192570e0 | 1389 | } |
fcf45b4c | 1390 | |
192570e0 | 1391 | static int |
cdcdc9eb | 1392 | jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) |
192570e0 | 1393 | { |
cdcdc9eb | 1394 | struct jme_adapter *jme = jme_napi_priv(holder); |
3b70a6fa | 1395 | DECLARE_NETDEV |
192570e0 | 1396 | int rest; |
fcf45b4c | 1397 | |
cdcdc9eb | 1398 | rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget)); |
fcf45b4c | 1399 | |
cd0ff491 | 1400 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb | 1401 | atomic_dec(&jme->rx_empty); |
192570e0 GFT |
1402 | ++(NET_STAT(jme).rx_dropped); |
1403 | jme_restart_rx_engine(jme); | |
1404 | } | |
1405 | atomic_inc(&jme->rx_empty); | |
1406 | ||
cd0ff491 | 1407 | if (rest) { |
cdcdc9eb | 1408 | JME_RX_COMPLETE(netdev, holder); |
192570e0 GFT |
1409 | jme_interrupt_mode(jme); |
1410 | } | |
1411 | ||
cdcdc9eb GFT |
1412 | JME_NAPI_WEIGHT_SET(budget, rest); |
1413 | return JME_NAPI_WEIGHT_VAL(budget) - rest; | |
fcf45b4c GFT |
1414 | } |
1415 | ||
1416 | static void | |
1417 | jme_rx_empty_tasklet(unsigned long arg) | |
1418 | { | |
cd0ff491 | 1419 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1420 | |
cd0ff491 | 1421 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1422 | return; |
1423 | ||
cd0ff491 | 1424 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1425 | return; |
1426 | ||
7ca9ebee | 1427 | netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n"); |
29bdd921 | 1428 | |
fcf45b4c | 1429 | jme_rx_clean_tasklet(arg); |
cdcdc9eb | 1430 | |
cd0ff491 | 1431 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb GFT |
1432 | atomic_dec(&jme->rx_empty); |
1433 | ++(NET_STAT(jme).rx_dropped); | |
1434 | jme_restart_rx_engine(jme); | |
1435 | } | |
1436 | atomic_inc(&jme->rx_empty); | |
4330c2f2 GFT |
1437 | } |
1438 | ||
b3821cc5 GFT |
1439 | static void |
1440 | jme_wake_queue_if_stopped(struct jme_adapter *jme) | |
1441 | { | |
0ede469c | 1442 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1443 | |
1444 | smp_wmb(); | |
cd0ff491 | 1445 | if (unlikely(netif_queue_stopped(jme->dev) && |
b3821cc5 | 1446 | atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) { |
937ef75a | 1447 | netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n"); |
b3821cc5 | 1448 | netif_wake_queue(jme->dev); |
b3821cc5 GFT |
1449 | } |
1450 | ||
1451 | } | |
1452 | ||
3bf61c55 GFT |
1453 | static void |
1454 | jme_tx_clean_tasklet(unsigned long arg) | |
4330c2f2 | 1455 | { |
cd0ff491 | 1456 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
3bf61c55 | 1457 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1458 | struct txdesc *txdesc = txring->desc; |
3bf61c55 | 1459 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi; |
b3821cc5 | 1460 | int i, j, cnt = 0, max, err, mask; |
3bf61c55 | 1461 | |
937ef75a | 1462 | tx_dbg(jme, "Into txclean\n"); |
cd0ff491 GFT |
1463 | |
1464 | if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) | |
fcf45b4c GFT |
1465 | goto out; |
1466 | ||
cd0ff491 | 1467 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1468 | goto out; |
1469 | ||
cd0ff491 | 1470 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1471 | goto out; |
1472 | ||
b3821cc5 GFT |
1473 | max = jme->tx_ring_size - atomic_read(&txring->nr_free); |
1474 | mask = jme->tx_ring_mask; | |
3bf61c55 | 1475 | |
cd0ff491 | 1476 | for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { |
3bf61c55 GFT |
1477 | |
1478 | ctxbi = txbi + i; | |
1479 | ||
cd0ff491 | 1480 | if (likely(ctxbi->skb && |
b3821cc5 | 1481 | !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) { |
8c198884 | 1482 | |
cd0ff491 | 1483 | tx_dbg(jme, "txclean: %d+%d@%lu\n", |
937ef75a | 1484 | i, ctxbi->nr_desc, jiffies); |
3bf61c55 | 1485 | |
cd0ff491 | 1486 | err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; |
3bf61c55 | 1487 | |
cd0ff491 | 1488 | for (j = 1 ; j < ctxbi->nr_desc ; ++j) { |
b3821cc5 GFT |
1489 | ttxbi = txbi + ((i + j) & (mask)); |
1490 | txdesc[(i + j) & (mask)].dw[0] = 0; | |
3bf61c55 | 1491 | |
b3821cc5 | 1492 | pci_unmap_page(jme->pdev, |
3bf61c55 GFT |
1493 | ttxbi->mapping, |
1494 | ttxbi->len, | |
1495 | PCI_DMA_TODEVICE); | |
1496 | ||
3bf61c55 GFT |
1497 | ttxbi->mapping = 0; |
1498 | ttxbi->len = 0; | |
1499 | } | |
1500 | ||
1501 | dev_kfree_skb(ctxbi->skb); | |
3bf61c55 GFT |
1502 | |
1503 | cnt += ctxbi->nr_desc; | |
1504 | ||
cd0ff491 | 1505 | if (unlikely(err)) { |
8c198884 | 1506 | ++(NET_STAT(jme).tx_carrier_errors); |
cd0ff491 | 1507 | } else { |
8c198884 | 1508 | ++(NET_STAT(jme).tx_packets); |
b3821cc5 GFT |
1509 | NET_STAT(jme).tx_bytes += ctxbi->len; |
1510 | } | |
1511 | ||
1512 | ctxbi->skb = NULL; | |
1513 | ctxbi->len = 0; | |
cdcdc9eb | 1514 | ctxbi->start_xmit = 0; |
cd0ff491 GFT |
1515 | |
1516 | } else { | |
3bf61c55 GFT |
1517 | break; |
1518 | } | |
1519 | ||
b3821cc5 | 1520 | i = (i + ctxbi->nr_desc) & mask; |
3bf61c55 GFT |
1521 | |
1522 | ctxbi->nr_desc = 0; | |
d7699f87 GFT |
1523 | } |
1524 | ||
937ef75a | 1525 | tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies); |
cdcdc9eb | 1526 | atomic_set(&txring->next_to_clean, i); |
79ce639c | 1527 | atomic_add(cnt, &txring->nr_free); |
3bf61c55 | 1528 | |
b3821cc5 GFT |
1529 | jme_wake_queue_if_stopped(jme); |
1530 | ||
fcf45b4c GFT |
1531 | out: |
1532 | atomic_inc(&jme->tx_cleaning); | |
d7699f87 GFT |
1533 | } |
1534 | ||
79ce639c | 1535 | static void |
cd0ff491 | 1536 | jme_intr_msi(struct jme_adapter *jme, u32 intrstat) |
d7699f87 | 1537 | { |
3bf61c55 GFT |
1538 | /* |
1539 | * Disable interrupt | |
1540 | */ | |
1541 | jwrite32f(jme, JME_IENC, INTR_ENABLE); | |
d7699f87 | 1542 | |
cd0ff491 | 1543 | if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { |
47220951 GFT |
1544 | /* |
1545 | * Link change event is critical | |
1546 | * all other events are ignored | |
1547 | */ | |
1548 | jwrite32(jme, JME_IEVE, intrstat); | |
3bf61c55 | 1549 | tasklet_schedule(&jme->linkch_task); |
29bdd921 | 1550 | goto out_reenable; |
fcf45b4c | 1551 | } |
d7699f87 | 1552 | |
cd0ff491 | 1553 | if (intrstat & INTR_TMINTR) { |
47220951 | 1554 | jwrite32(jme, JME_IEVE, INTR_TMINTR); |
79ce639c | 1555 | tasklet_schedule(&jme->pcc_task); |
47220951 | 1556 | } |
79ce639c | 1557 | |
cd0ff491 | 1558 | if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { |
47220951 | 1559 | jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0); |
4330c2f2 | 1560 | tasklet_schedule(&jme->txclean_task); |
47220951 GFT |
1561 | } |
1562 | ||
cd0ff491 | 1563 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
47220951 GFT |
1564 | jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO | |
1565 | INTR_PCCRX0 | | |
1566 | INTR_RX0EMP)) | | |
1567 | INTR_RX0); | |
1568 | } | |
d7699f87 | 1569 | |
cd0ff491 GFT |
1570 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
1571 | if (intrstat & INTR_RX0EMP) | |
192570e0 GFT |
1572 | atomic_inc(&jme->rx_empty); |
1573 | ||
cd0ff491 GFT |
1574 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
1575 | if (likely(JME_RX_SCHEDULE_PREP(jme))) { | |
192570e0 | 1576 | jme_polling_mode(jme); |
cdcdc9eb | 1577 | JME_RX_SCHEDULE(jme); |
192570e0 GFT |
1578 | } |
1579 | } | |
cd0ff491 GFT |
1580 | } else { |
1581 | if (intrstat & INTR_RX0EMP) { | |
cdcdc9eb | 1582 | atomic_inc(&jme->rx_empty); |
cd0ff491 GFT |
1583 | tasklet_hi_schedule(&jme->rxempty_task); |
1584 | } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) { | |
1585 | tasklet_hi_schedule(&jme->rxclean_task); | |
cdcdc9eb | 1586 | } |
4330c2f2 | 1587 | } |
d7699f87 | 1588 | |
29bdd921 | 1589 | out_reenable: |
3bf61c55 | 1590 | /* |
fcf45b4c | 1591 | * Re-enable interrupt |
3bf61c55 | 1592 | */ |
fcf45b4c | 1593 | jwrite32f(jme, JME_IENS, INTR_ENABLE); |
79ce639c GFT |
1594 | } |
1595 | ||
3b70a6fa GFT |
1596 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
1597 | static irqreturn_t | |
1598 | jme_intr(int irq, void *dev_id, struct pt_regs *regs) | |
1599 | #else | |
79ce639c GFT |
1600 | static irqreturn_t |
1601 | jme_intr(int irq, void *dev_id) | |
3b70a6fa | 1602 | #endif |
79ce639c | 1603 | { |
cd0ff491 GFT |
1604 | struct net_device *netdev = dev_id; |
1605 | struct jme_adapter *jme = netdev_priv(netdev); | |
1606 | u32 intrstat; | |
79ce639c GFT |
1607 | |
1608 | intrstat = jread32(jme, JME_IEVE); | |
1609 | ||
1610 | /* | |
1611 | * Check if it's really an interrupt for us | |
1612 | */ | |
7ee473a3 | 1613 | if (unlikely((intrstat & INTR_ENABLE) == 0)) |
29bdd921 | 1614 | return IRQ_NONE; |
79ce639c GFT |
1615 | |
1616 | /* | |
1617 | * Check if the device still exist | |
1618 | */ | |
cd0ff491 GFT |
1619 | if (unlikely(intrstat == ~((typeof(intrstat))0))) |
1620 | return IRQ_NONE; | |
79ce639c GFT |
1621 | |
1622 | jme_intr_msi(jme, intrstat); | |
1623 | ||
cd0ff491 | 1624 | return IRQ_HANDLED; |
d7699f87 GFT |
1625 | } |
1626 | ||
3b70a6fa GFT |
1627 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
1628 | static irqreturn_t | |
1629 | jme_msi(int irq, void *dev_id, struct pt_regs *regs) | |
1630 | #else | |
79ce639c GFT |
1631 | static irqreturn_t |
1632 | jme_msi(int irq, void *dev_id) | |
3b70a6fa | 1633 | #endif |
79ce639c | 1634 | { |
cd0ff491 GFT |
1635 | struct net_device *netdev = dev_id; |
1636 | struct jme_adapter *jme = netdev_priv(netdev); | |
1637 | u32 intrstat; | |
79ce639c | 1638 | |
0ede469c | 1639 | intrstat = jread32(jme, JME_IEVE); |
79ce639c GFT |
1640 | |
1641 | jme_intr_msi(jme, intrstat); | |
1642 | ||
cd0ff491 | 1643 | return IRQ_HANDLED; |
79ce639c GFT |
1644 | } |
1645 | ||
79ce639c GFT |
1646 | static void |
1647 | jme_reset_link(struct jme_adapter *jme) | |
1648 | { | |
1649 | jwrite32(jme, JME_TMCSR, TMCSR_SWIT); | |
1650 | } | |
1651 | ||
fcf45b4c GFT |
1652 | static void |
1653 | jme_restart_an(struct jme_adapter *jme) | |
1654 | { | |
cd0ff491 | 1655 | u32 bmcr; |
fcf45b4c | 1656 | |
cd0ff491 | 1657 | spin_lock_bh(&jme->phy_lock); |
fcf45b4c GFT |
1658 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1659 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
1660 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
cd0ff491 | 1661 | spin_unlock_bh(&jme->phy_lock); |
79ce639c GFT |
1662 | } |
1663 | ||
1664 | static int | |
1665 | jme_request_irq(struct jme_adapter *jme) | |
1666 | { | |
1667 | int rc; | |
cd0ff491 | 1668 | struct net_device *netdev = jme->dev; |
3b70a6fa GFT |
1669 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
1670 | irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr; | |
1671 | int irq_flags = SA_SHIRQ; | |
1672 | #else | |
cd0ff491 GFT |
1673 | irq_handler_t handler = jme_intr; |
1674 | int irq_flags = IRQF_SHARED; | |
3b70a6fa | 1675 | #endif |
cd0ff491 GFT |
1676 | |
1677 | if (!pci_enable_msi(jme->pdev)) { | |
1678 | set_bit(JME_FLAG_MSI, &jme->flags); | |
1679 | handler = jme_msi; | |
1680 | irq_flags = 0; | |
1681 | } | |
1682 | ||
1683 | rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, | |
1684 | netdev); | |
1685 | if (rc) { | |
937ef75a JP |
1686 | netdev_err(netdev, |
1687 | "Unable to request %s interrupt (return: %d)\n", | |
1688 | test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx", | |
1689 | rc); | |
79ce639c | 1690 | |
cd0ff491 GFT |
1691 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { |
1692 | pci_disable_msi(jme->pdev); | |
1693 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1694 | } |
cd0ff491 | 1695 | } else { |
79ce639c GFT |
1696 | netdev->irq = jme->pdev->irq; |
1697 | } | |
1698 | ||
cd0ff491 | 1699 | return rc; |
79ce639c GFT |
1700 | } |
1701 | ||
1702 | static void | |
1703 | jme_free_irq(struct jme_adapter *jme) | |
1704 | { | |
cd0ff491 GFT |
1705 | free_irq(jme->pdev->irq, jme->dev); |
1706 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { | |
1707 | pci_disable_msi(jme->pdev); | |
1708 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1709 | jme->dev->irq = jme->pdev->irq; |
cd0ff491 | 1710 | } |
fcf45b4c GFT |
1711 | } |
1712 | ||
ed457bcc GFT |
1713 | static inline void |
1714 | jme_new_phy_on(struct jme_adapter *jme) | |
1715 | { | |
1716 | u32 reg; | |
1717 | ||
1718 | reg = jread32(jme, JME_PHY_PWR); | |
1719 | reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | | |
1720 | PHY_PWR_DWN2 | PHY_PWR_CLKSEL); | |
1721 | jwrite32(jme, JME_PHY_PWR, reg); | |
1722 | ||
1723 | pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); | |
1724 | reg &= ~PE1_GPREG0_PBG; | |
1725 | reg |= PE1_GPREG0_ENBG; | |
1726 | pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); | |
1727 | } | |
1728 | ||
1729 | static inline void | |
1730 | jme_new_phy_off(struct jme_adapter *jme) | |
1731 | { | |
1732 | u32 reg; | |
1733 | ||
1734 | reg = jread32(jme, JME_PHY_PWR); | |
1735 | reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | | |
1736 | PHY_PWR_DWN2 | PHY_PWR_CLKSEL; | |
1737 | jwrite32(jme, JME_PHY_PWR, reg); | |
1738 | ||
1739 | pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); | |
1740 | reg &= ~PE1_GPREG0_PBG; | |
1741 | reg |= PE1_GPREG0_PDD3COLD; | |
1742 | pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); | |
1743 | } | |
1744 | ||
e58b908e GFT |
1745 | static inline void |
1746 | jme_phy_on(struct jme_adapter *jme) | |
1747 | { | |
1748 | u32 bmcr; | |
1749 | ||
1750 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1751 | bmcr &= ~BMCR_PDOWN; | |
1752 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
ed457bcc GFT |
1753 | |
1754 | if (new_phy_power_ctrl(jme->chip_main_rev)) | |
1755 | jme_new_phy_on(jme); | |
1756 | } | |
1757 | ||
1758 | static inline void | |
1759 | jme_phy_off(struct jme_adapter *jme) | |
1760 | { | |
1761 | u32 bmcr; | |
1762 | ||
1763 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1764 | bmcr |= BMCR_PDOWN; | |
1765 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
1766 | ||
1767 | if (new_phy_power_ctrl(jme->chip_main_rev)) | |
1768 | jme_new_phy_off(jme); | |
e58b908e GFT |
1769 | } |
1770 | ||
3bf61c55 GFT |
1771 | static int |
1772 | jme_open(struct net_device *netdev) | |
d7699f87 GFT |
1773 | { |
1774 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 1775 | int rc; |
79ce639c | 1776 | |
42b1055e | 1777 | jme_clear_pm(jme); |
cdcdc9eb | 1778 | JME_NAPI_ENABLE(jme); |
d7699f87 | 1779 | |
0ede469c | 1780 | tasklet_enable(&jme->linkch_task); |
cd0ff491 GFT |
1781 | tasklet_enable(&jme->txclean_task); |
1782 | tasklet_hi_enable(&jme->rxclean_task); | |
1783 | tasklet_hi_enable(&jme->rxempty_task); | |
1784 | ||
79ce639c | 1785 | rc = jme_request_irq(jme); |
cd0ff491 | 1786 | if (rc) |
4330c2f2 | 1787 | goto err_out; |
79ce639c | 1788 | |
d7699f87 | 1789 | jme_start_irq(jme); |
42b1055e | 1790 | |
ed457bcc GFT |
1791 | jme_phy_on(jme); |
1792 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
42b1055e | 1793 | jme_set_settings(netdev, &jme->old_ecmd); |
ed457bcc | 1794 | else |
42b1055e GFT |
1795 | jme_reset_phy_processor(jme); |
1796 | ||
29bdd921 | 1797 | jme_reset_link(jme); |
d7699f87 GFT |
1798 | |
1799 | return 0; | |
1800 | ||
d7699f87 GFT |
1801 | err_out: |
1802 | netif_stop_queue(netdev); | |
1803 | netif_carrier_off(netdev); | |
4330c2f2 | 1804 | return rc; |
d7699f87 GFT |
1805 | } |
1806 | ||
42b1055e GFT |
1807 | static void |
1808 | jme_set_100m_half(struct jme_adapter *jme) | |
1809 | { | |
cd0ff491 | 1810 | u32 bmcr, tmp; |
42b1055e | 1811 | |
a82e368c | 1812 | jme_phy_on(jme); |
42b1055e GFT |
1813 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1814 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | | |
1815 | BMCR_SPEED1000 | BMCR_FULLDPLX); | |
1816 | tmp |= BMCR_SPEED100; | |
1817 | ||
1818 | if (bmcr != tmp) | |
1819 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp); | |
1820 | ||
cd0ff491 | 1821 | if (jme->fpgaver) |
cdcdc9eb GFT |
1822 | jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL); |
1823 | else | |
1824 | jwrite32(jme, JME_GHC, GHC_SPEED_100M); | |
42b1055e GFT |
1825 | } |
1826 | ||
47220951 GFT |
1827 | #define JME_WAIT_LINK_TIME 2000 /* 2000ms */ |
1828 | static void | |
1829 | jme_wait_link(struct jme_adapter *jme) | |
1830 | { | |
cd0ff491 | 1831 | u32 phylink, to = JME_WAIT_LINK_TIME; |
47220951 GFT |
1832 | |
1833 | mdelay(1000); | |
1834 | phylink = jme_linkstat_from_phy(jme); | |
cd0ff491 | 1835 | while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { |
47220951 GFT |
1836 | mdelay(10); |
1837 | phylink = jme_linkstat_from_phy(jme); | |
1838 | } | |
1839 | } | |
1840 | ||
a82e368c GFT |
1841 | static void |
1842 | jme_powersave_phy(struct jme_adapter *jme) | |
1843 | { | |
1844 | if (jme->reg_pmcs) { | |
1845 | jme_set_100m_half(jme); | |
1846 | ||
1847 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) | |
1848 | jme_wait_link(jme); | |
1849 | ||
1850 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); | |
1851 | } else { | |
1852 | jme_phy_off(jme); | |
1853 | } | |
1854 | } | |
1855 | ||
3bf61c55 GFT |
1856 | static int |
1857 | jme_close(struct net_device *netdev) | |
d7699f87 GFT |
1858 | { |
1859 | struct jme_adapter *jme = netdev_priv(netdev); | |
1860 | ||
1861 | netif_stop_queue(netdev); | |
1862 | netif_carrier_off(netdev); | |
1863 | ||
1864 | jme_stop_irq(jme); | |
79ce639c | 1865 | jme_free_irq(jme); |
d7699f87 | 1866 | |
cdcdc9eb | 1867 | JME_NAPI_DISABLE(jme); |
192570e0 | 1868 | |
0ede469c GFT |
1869 | tasklet_disable(&jme->linkch_task); |
1870 | tasklet_disable(&jme->txclean_task); | |
1871 | tasklet_disable(&jme->rxclean_task); | |
1872 | tasklet_disable(&jme->rxempty_task); | |
8c198884 | 1873 | |
cd0ff491 GFT |
1874 | jme_disable_rx_engine(jme); |
1875 | jme_disable_tx_engine(jme); | |
8c198884 | 1876 | jme_reset_mac_processor(jme); |
d7699f87 GFT |
1877 | jme_free_rx_resources(jme); |
1878 | jme_free_tx_resources(jme); | |
42b1055e | 1879 | jme->phylink = 0; |
b3821cc5 GFT |
1880 | jme_phy_off(jme); |
1881 | ||
1882 | return 0; | |
1883 | } | |
1884 | ||
1885 | static int | |
1886 | jme_alloc_txdesc(struct jme_adapter *jme, | |
1887 | struct sk_buff *skb) | |
1888 | { | |
0ede469c | 1889 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1890 | int idx, nr_alloc, mask = jme->tx_ring_mask; |
1891 | ||
1892 | idx = txring->next_to_use; | |
1893 | nr_alloc = skb_shinfo(skb)->nr_frags + 2; | |
1894 | ||
cd0ff491 | 1895 | if (unlikely(atomic_read(&txring->nr_free) < nr_alloc)) |
b3821cc5 GFT |
1896 | return -1; |
1897 | ||
1898 | atomic_sub(nr_alloc, &txring->nr_free); | |
42b1055e | 1899 | |
b3821cc5 GFT |
1900 | txring->next_to_use = (txring->next_to_use + nr_alloc) & mask; |
1901 | ||
1902 | return idx; | |
1903 | } | |
1904 | ||
1905 | static void | |
1906 | jme_fill_tx_map(struct pci_dev *pdev, | |
cd0ff491 | 1907 | struct txdesc *txdesc, |
b3821cc5 GFT |
1908 | struct jme_buffer_info *txbi, |
1909 | struct page *page, | |
cd0ff491 GFT |
1910 | u32 page_offset, |
1911 | u32 len, | |
1912 | u8 hidma) | |
b3821cc5 GFT |
1913 | { |
1914 | dma_addr_t dmaaddr; | |
1915 | ||
1916 | dmaaddr = pci_map_page(pdev, | |
1917 | page, | |
1918 | page_offset, | |
1919 | len, | |
1920 | PCI_DMA_TODEVICE); | |
1921 | ||
1922 | pci_dma_sync_single_for_device(pdev, | |
1923 | dmaaddr, | |
1924 | len, | |
1925 | PCI_DMA_TODEVICE); | |
1926 | ||
1927 | txdesc->dw[0] = 0; | |
1928 | txdesc->dw[1] = 0; | |
1929 | txdesc->desc2.flags = TXFLAG_OWN; | |
cd0ff491 | 1930 | txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0; |
b3821cc5 GFT |
1931 | txdesc->desc2.datalen = cpu_to_le16(len); |
1932 | txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32); | |
1933 | txdesc->desc2.bufaddrl = cpu_to_le32( | |
1934 | (__u64)dmaaddr & 0xFFFFFFFFUL); | |
1935 | ||
1936 | txbi->mapping = dmaaddr; | |
1937 | txbi->len = len; | |
1938 | } | |
1939 | ||
1940 | static void | |
1941 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
1942 | { | |
0ede469c | 1943 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1944 | struct txdesc *txdesc = txring->desc, *ctxdesc; |
b3821cc5 | 1945 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; |
cd0ff491 | 1946 | u8 hidma = jme->dev->features & NETIF_F_HIGHDMA; |
b3821cc5 GFT |
1947 | int i, nr_frags = skb_shinfo(skb)->nr_frags; |
1948 | int mask = jme->tx_ring_mask; | |
1949 | struct skb_frag_struct *frag; | |
cd0ff491 | 1950 | u32 len; |
b3821cc5 | 1951 | |
cd0ff491 GFT |
1952 | for (i = 0 ; i < nr_frags ; ++i) { |
1953 | frag = &skb_shinfo(skb)->frags[i]; | |
b3821cc5 GFT |
1954 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); |
1955 | ctxbi = txbi + ((idx + i + 2) & (mask)); | |
1956 | ||
1957 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page, | |
1958 | frag->page_offset, frag->size, hidma); | |
42b1055e | 1959 | } |
b3821cc5 | 1960 | |
cd0ff491 | 1961 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
b3821cc5 GFT |
1962 | ctxdesc = txdesc + ((idx + 1) & (mask)); |
1963 | ctxbi = txbi + ((idx + 1) & (mask)); | |
1964 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
1965 | offset_in_page(skb->data), len, hidma); | |
1966 | ||
1967 | } | |
1968 | ||
1969 | static int | |
1970 | jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) | |
1971 | { | |
3b70a6fa | 1972 | if (unlikely( |
0ede469c | 1973 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17) |
3b70a6fa GFT |
1974 | skb_shinfo(skb)->tso_size |
1975 | #else | |
1976 | skb_shinfo(skb)->gso_size | |
1977 | #endif | |
1978 | && skb_header_cloned(skb) && | |
b3821cc5 GFT |
1979 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) { |
1980 | dev_kfree_skb(skb); | |
1981 | return -1; | |
1982 | } | |
1983 | ||
1984 | return 0; | |
1985 | } | |
1986 | ||
1987 | static int | |
3b70a6fa | 1988 | jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags) |
b3821cc5 | 1989 | { |
0ede469c | 1990 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17) |
3b70a6fa GFT |
1991 | *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT); |
1992 | #else | |
1993 | *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT); | |
1994 | #endif | |
cd0ff491 | 1995 | if (*mss) { |
b3821cc5 GFT |
1996 | *flags |= TXFLAG_LSEN; |
1997 | ||
cd0ff491 | 1998 | if (skb->protocol == htons(ETH_P_IP)) { |
b3821cc5 GFT |
1999 | struct iphdr *iph = ip_hdr(skb); |
2000 | ||
2001 | iph->check = 0; | |
cd0ff491 | 2002 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
b3821cc5 GFT |
2003 | iph->daddr, 0, |
2004 | IPPROTO_TCP, | |
2005 | 0); | |
cd0ff491 | 2006 | } else { |
b3821cc5 GFT |
2007 | struct ipv6hdr *ip6h = ipv6_hdr(skb); |
2008 | ||
cd0ff491 | 2009 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, |
b3821cc5 GFT |
2010 | &ip6h->daddr, 0, |
2011 | IPPROTO_TCP, | |
2012 | 0); | |
2013 | } | |
2014 | ||
2015 | return 0; | |
2016 | } | |
2017 | ||
2018 | return 1; | |
2019 | } | |
2020 | ||
2021 | static void | |
cd0ff491 | 2022 | jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags) |
b3821cc5 | 2023 | { |
3b70a6fa GFT |
2024 | #ifdef CHECKSUM_PARTIAL |
2025 | if (skb->ip_summed == CHECKSUM_PARTIAL) | |
2026 | #else | |
2027 | if (skb->ip_summed == CHECKSUM_HW) | |
2028 | #endif | |
2029 | { | |
cd0ff491 | 2030 | u8 ip_proto; |
b3821cc5 | 2031 | |
3b70a6fa GFT |
2032 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
2033 | if (skb->protocol == htons(ETH_P_IP)) | |
2034 | ip_proto = ip_hdr(skb)->protocol; | |
2035 | else if (skb->protocol == htons(ETH_P_IPV6)) | |
2036 | ip_proto = ipv6_hdr(skb)->nexthdr; | |
2037 | else | |
2038 | ip_proto = 0; | |
2039 | #else | |
b3821cc5 | 2040 | switch (skb->protocol) { |
cd0ff491 | 2041 | case htons(ETH_P_IP): |
b3821cc5 GFT |
2042 | ip_proto = ip_hdr(skb)->protocol; |
2043 | break; | |
cd0ff491 | 2044 | case htons(ETH_P_IPV6): |
b3821cc5 GFT |
2045 | ip_proto = ipv6_hdr(skb)->nexthdr; |
2046 | break; | |
2047 | default: | |
2048 | ip_proto = 0; | |
2049 | break; | |
2050 | } | |
3b70a6fa | 2051 | #endif |
b3821cc5 | 2052 | |
cd0ff491 | 2053 | switch (ip_proto) { |
b3821cc5 GFT |
2054 | case IPPROTO_TCP: |
2055 | *flags |= TXFLAG_TCPCS; | |
2056 | break; | |
2057 | case IPPROTO_UDP: | |
2058 | *flags |= TXFLAG_UDPCS; | |
2059 | break; | |
2060 | default: | |
937ef75a | 2061 | netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n"); |
b3821cc5 GFT |
2062 | break; |
2063 | } | |
2064 | } | |
2065 | } | |
2066 | ||
cd0ff491 | 2067 | static inline void |
3b70a6fa | 2068 | jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags) |
b3821cc5 | 2069 | { |
cd0ff491 | 2070 | if (vlan_tx_tag_present(skb)) { |
b3821cc5 | 2071 | *flags |= TXFLAG_TAGON; |
3b70a6fa | 2072 | *vlan = cpu_to_le16(vlan_tx_tag_get(skb)); |
42b1055e | 2073 | } |
b3821cc5 GFT |
2074 | } |
2075 | ||
2076 | static int | |
3b70a6fa | 2077 | jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) |
b3821cc5 | 2078 | { |
0ede469c | 2079 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 2080 | struct txdesc *txdesc; |
b3821cc5 | 2081 | struct jme_buffer_info *txbi; |
cd0ff491 | 2082 | u8 flags; |
b3821cc5 | 2083 | |
cd0ff491 | 2084 | txdesc = (struct txdesc *)txring->desc + idx; |
b3821cc5 GFT |
2085 | txbi = txring->bufinf + idx; |
2086 | ||
2087 | txdesc->dw[0] = 0; | |
2088 | txdesc->dw[1] = 0; | |
2089 | txdesc->dw[2] = 0; | |
2090 | txdesc->dw[3] = 0; | |
2091 | txdesc->desc1.pktsize = cpu_to_le16(skb->len); | |
2092 | /* | |
2093 | * Set OWN bit at final. | |
2094 | * When kernel transmit faster than NIC. | |
2095 | * And NIC trying to send this descriptor before we tell | |
2096 | * it to start sending this TX queue. | |
2097 | * Other fields are already filled correctly. | |
2098 | */ | |
2099 | wmb(); | |
2100 | flags = TXFLAG_OWN | TXFLAG_INT; | |
cd0ff491 GFT |
2101 | /* |
2102 | * Set checksum flags while not tso | |
2103 | */ | |
2104 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) | |
2105 | jme_tx_csum(jme, skb, &flags); | |
b3821cc5 | 2106 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); |
3b70a6fa | 2107 | jme_map_tx_skb(jme, skb, idx); |
b3821cc5 GFT |
2108 | txdesc->desc1.flags = flags; |
2109 | /* | |
2110 | * Set tx buffer info after telling NIC to send | |
2111 | * For better tx_clean timing | |
2112 | */ | |
2113 | wmb(); | |
2114 | txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2; | |
2115 | txbi->skb = skb; | |
2116 | txbi->len = skb->len; | |
cd0ff491 GFT |
2117 | txbi->start_xmit = jiffies; |
2118 | if (!txbi->start_xmit) | |
8d27293f | 2119 | txbi->start_xmit = (0UL-1); |
d7699f87 GFT |
2120 | |
2121 | return 0; | |
2122 | } | |
2123 | ||
b3821cc5 GFT |
2124 | static void |
2125 | jme_stop_queue_if_full(struct jme_adapter *jme) | |
2126 | { | |
0ede469c | 2127 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 GFT |
2128 | struct jme_buffer_info *txbi = txring->bufinf; |
2129 | int idx = atomic_read(&txring->next_to_clean); | |
cdcdc9eb | 2130 | |
cd0ff491 | 2131 | txbi += idx; |
b3821cc5 GFT |
2132 | |
2133 | smp_wmb(); | |
cd0ff491 | 2134 | if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { |
b3821cc5 | 2135 | netif_stop_queue(jme->dev); |
937ef75a | 2136 | netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n"); |
b3821cc5 | 2137 | smp_wmb(); |
cd0ff491 GFT |
2138 | if (atomic_read(&txring->nr_free) |
2139 | >= (jme->tx_wake_threshold)) { | |
b3821cc5 | 2140 | netif_wake_queue(jme->dev); |
937ef75a | 2141 | netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n"); |
b3821cc5 GFT |
2142 | } |
2143 | } | |
2144 | ||
cd0ff491 | 2145 | if (unlikely(txbi->start_xmit && |
cdcdc9eb GFT |
2146 | (jiffies - txbi->start_xmit) >= TX_TIMEOUT && |
2147 | txbi->skb)) { | |
2148 | netif_stop_queue(jme->dev); | |
937ef75a | 2149 | netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu\n", idx, jiffies); |
cdcdc9eb | 2150 | } |
b3821cc5 GFT |
2151 | } |
2152 | ||
3bf61c55 GFT |
2153 | /* |
2154 | * This function is already protected by netif_tx_lock() | |
2155 | */ | |
cd0ff491 | 2156 | |
7ca9ebee | 2157 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31) |
3bf61c55 | 2158 | static int |
7ca9ebee GFT |
2159 | #else |
2160 | static netdev_tx_t | |
2161 | #endif | |
3bf61c55 | 2162 | jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) |
d7699f87 | 2163 | { |
cd0ff491 | 2164 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2165 | int idx; |
d7699f87 | 2166 | |
cd0ff491 | 2167 | if (unlikely(jme_expand_header(jme, skb))) { |
b3821cc5 GFT |
2168 | ++(NET_STAT(jme).tx_dropped); |
2169 | return NETDEV_TX_OK; | |
2170 | } | |
2171 | ||
2172 | idx = jme_alloc_txdesc(jme, skb); | |
79ce639c | 2173 | |
cd0ff491 | 2174 | if (unlikely(idx < 0)) { |
b3821cc5 | 2175 | netif_stop_queue(netdev); |
937ef75a JP |
2176 | netif_err(jme, tx_err, jme->dev, |
2177 | "BUG! Tx ring full when queue awake!\n"); | |
d7699f87 | 2178 | |
cd0ff491 | 2179 | return NETDEV_TX_BUSY; |
b3821cc5 GFT |
2180 | } |
2181 | ||
3b70a6fa | 2182 | jme_fill_tx_desc(jme, skb, idx); |
b3821cc5 | 2183 | |
4330c2f2 GFT |
2184 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
2185 | TXCS_SELECT_QUEUE0 | | |
2186 | TXCS_QUEUE0S | | |
2187 | TXCS_ENABLE); | |
0ede469c | 2188 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29) |
d7699f87 | 2189 | netdev->trans_start = jiffies; |
0ede469c | 2190 | #endif |
d7699f87 | 2191 | |
937ef75a JP |
2192 | tx_dbg(jme, "xmit: %d+%d@%lu\n", |
2193 | idx, skb_shinfo(skb)->nr_frags + 2, jiffies); | |
b3821cc5 GFT |
2194 | jme_stop_queue_if_full(jme); |
2195 | ||
cd0ff491 | 2196 | return NETDEV_TX_OK; |
d7699f87 GFT |
2197 | } |
2198 | ||
e523cd89 GFT |
2199 | static void |
2200 | jme_set_unicastaddr(struct net_device *netdev) | |
2201 | { | |
2202 | struct jme_adapter *jme = netdev_priv(netdev); | |
2203 | u32 val; | |
2204 | ||
2205 | val = (netdev->dev_addr[3] & 0xff) << 24 | | |
2206 | (netdev->dev_addr[2] & 0xff) << 16 | | |
2207 | (netdev->dev_addr[1] & 0xff) << 8 | | |
2208 | (netdev->dev_addr[0] & 0xff); | |
2209 | jwrite32(jme, JME_RXUMA_LO, val); | |
2210 | val = (netdev->dev_addr[5] & 0xff) << 8 | | |
2211 | (netdev->dev_addr[4] & 0xff); | |
2212 | jwrite32(jme, JME_RXUMA_HI, val); | |
2213 | } | |
2214 | ||
3bf61c55 GFT |
2215 | static int |
2216 | jme_set_macaddr(struct net_device *netdev, void *p) | |
d7699f87 | 2217 | { |
cd0ff491 | 2218 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2219 | struct sockaddr *addr = p; |
d7699f87 | 2220 | |
cd0ff491 | 2221 | if (netif_running(netdev)) |
d7699f87 GFT |
2222 | return -EBUSY; |
2223 | ||
cd0ff491 | 2224 | spin_lock_bh(&jme->macaddr_lock); |
d7699f87 | 2225 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
e523cd89 | 2226 | jme_set_unicastaddr(netdev); |
cd0ff491 | 2227 | spin_unlock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
2228 | |
2229 | return 0; | |
2230 | } | |
2231 | ||
3bf61c55 GFT |
2232 | static void |
2233 | jme_set_multi(struct net_device *netdev) | |
d7699f87 | 2234 | { |
3bf61c55 | 2235 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2236 | u32 mc_hash[2] = {}; |
7ca9ebee | 2237 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33) |
d7699f87 | 2238 | int i; |
7ca9ebee | 2239 | #endif |
d7699f87 | 2240 | |
cd0ff491 | 2241 | spin_lock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2242 | |
2243 | jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME; | |
d7699f87 | 2244 | |
cd0ff491 | 2245 | if (netdev->flags & IFF_PROMISC) { |
8c198884 | 2246 | jme->reg_rxmcs |= RXMCS_ALLFRAME; |
cd0ff491 | 2247 | } else if (netdev->flags & IFF_ALLMULTI) { |
8c198884 | 2248 | jme->reg_rxmcs |= RXMCS_ALLMULFRAME; |
cd0ff491 | 2249 | } else if (netdev->flags & IFF_MULTICAST) { |
8e14c278 | 2250 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34) |
3bf61c55 | 2251 | struct dev_mc_list *mclist; |
8e14c278 JP |
2252 | #else |
2253 | struct netdev_hw_addr *ha; | |
2254 | #endif | |
3bf61c55 | 2255 | int bit_nr; |
d7699f87 | 2256 | |
8c198884 | 2257 | jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED; |
7ca9ebee | 2258 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33) |
3bf61c55 GFT |
2259 | for (i = 0, mclist = netdev->mc_list; |
2260 | mclist && i < netdev->mc_count; | |
2261 | ++i, mclist = mclist->next) { | |
8e14c278 | 2262 | #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34) |
7ca9ebee | 2263 | netdev_for_each_mc_addr(mclist, netdev) { |
8e14c278 JP |
2264 | #else |
2265 | netdev_for_each_mc_addr(ha, netdev) { | |
7ca9ebee | 2266 | #endif |
8e14c278 | 2267 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34) |
cd0ff491 | 2268 | bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F; |
8e14c278 JP |
2269 | #else |
2270 | bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F; | |
2271 | #endif | |
cd0ff491 GFT |
2272 | mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); |
2273 | } | |
d7699f87 | 2274 | |
4330c2f2 GFT |
2275 | jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]); |
2276 | jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]); | |
d7699f87 GFT |
2277 | } |
2278 | ||
d7699f87 | 2279 | wmb(); |
8c198884 GFT |
2280 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); |
2281 | ||
cd0ff491 | 2282 | spin_unlock_bh(&jme->rxmcs_lock); |
d7699f87 GFT |
2283 | } |
2284 | ||
3bf61c55 | 2285 | static int |
8c198884 | 2286 | jme_change_mtu(struct net_device *netdev, int new_mtu) |
d7699f87 | 2287 | { |
cd0ff491 | 2288 | struct jme_adapter *jme = netdev_priv(netdev); |
79ce639c | 2289 | |
cd0ff491 | 2290 | if (new_mtu == jme->old_mtu) |
29bdd921 GFT |
2291 | return 0; |
2292 | ||
cd0ff491 GFT |
2293 | if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || |
2294 | ((new_mtu) < IPV6_MIN_MTU)) | |
2295 | return -EINVAL; | |
79ce639c | 2296 | |
cd0ff491 | 2297 | if (new_mtu > 4000) { |
79ce639c GFT |
2298 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2299 | jme->reg_rxcs |= RXCS_FIFOTHNP_64QW; | |
2300 | jme_restart_rx_engine(jme); | |
cd0ff491 | 2301 | } else { |
79ce639c GFT |
2302 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2303 | jme->reg_rxcs |= RXCS_FIFOTHNP_128QW; | |
2304 | jme_restart_rx_engine(jme); | |
2305 | } | |
2306 | ||
cd0ff491 | 2307 | if (new_mtu > 1900) { |
1a0b42f4 MM |
2308 | netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | |
2309 | NETIF_F_TSO | NETIF_F_TSO6); | |
cd0ff491 GFT |
2310 | } else { |
2311 | if (test_bit(JME_FLAG_TXCSUM, &jme->flags)) | |
1a0b42f4 | 2312 | netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
cd0ff491 | 2313 | if (test_bit(JME_FLAG_TSO, &jme->flags)) |
1a0b42f4 | 2314 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
79ce639c GFT |
2315 | } |
2316 | ||
cd0ff491 GFT |
2317 | netdev->mtu = new_mtu; |
2318 | jme_reset_link(jme); | |
79ce639c GFT |
2319 | |
2320 | return 0; | |
d7699f87 GFT |
2321 | } |
2322 | ||
8c198884 GFT |
2323 | static void |
2324 | jme_tx_timeout(struct net_device *netdev) | |
2325 | { | |
cd0ff491 | 2326 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 | 2327 | |
cdcdc9eb GFT |
2328 | jme->phylink = 0; |
2329 | jme_reset_phy_processor(jme); | |
cd0ff491 | 2330 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
cdcdc9eb GFT |
2331 | jme_set_settings(netdev, &jme->old_ecmd); |
2332 | ||
8c198884 | 2333 | /* |
cdcdc9eb | 2334 | * Force to Reset the link again |
8c198884 | 2335 | */ |
29bdd921 | 2336 | jme_reset_link(jme); |
8c198884 GFT |
2337 | } |
2338 | ||
1e5ebebc GFT |
2339 | static inline void jme_pause_rx(struct jme_adapter *jme) |
2340 | { | |
2341 | atomic_dec(&jme->link_changing); | |
2342 | ||
2343 | jme_set_rx_pcc(jme, PCC_OFF); | |
2344 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2345 | JME_NAPI_DISABLE(jme); | |
2346 | } else { | |
2347 | tasklet_disable(&jme->rxclean_task); | |
2348 | tasklet_disable(&jme->rxempty_task); | |
2349 | } | |
2350 | } | |
2351 | ||
2352 | static inline void jme_resume_rx(struct jme_adapter *jme) | |
2353 | { | |
2354 | struct dynpcc_info *dpi = &(jme->dpi); | |
2355 | ||
2356 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2357 | JME_NAPI_ENABLE(jme); | |
2358 | } else { | |
2359 | tasklet_hi_enable(&jme->rxclean_task); | |
2360 | tasklet_hi_enable(&jme->rxempty_task); | |
2361 | } | |
2362 | dpi->cur = PCC_P1; | |
2363 | dpi->attempt = PCC_P1; | |
2364 | dpi->cnt = 0; | |
2365 | jme_set_rx_pcc(jme, PCC_P1); | |
2366 | ||
2367 | atomic_inc(&jme->link_changing); | |
2368 | } | |
2369 | ||
42b1055e GFT |
2370 | static void |
2371 | jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
2372 | { | |
2373 | struct jme_adapter *jme = netdev_priv(netdev); | |
2374 | ||
1e5ebebc | 2375 | jme_pause_rx(jme); |
42b1055e | 2376 | jme->vlgrp = grp; |
1e5ebebc | 2377 | jme_resume_rx(jme); |
42b1055e GFT |
2378 | } |
2379 | ||
7ca9ebee GFT |
2380 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
2381 | static void | |
2382 | jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid) | |
2383 | { | |
2384 | struct jme_adapter *jme = netdev_priv(netdev); | |
2385 | ||
7ca9ebee | 2386 | if(jme->vlgrp) { |
1e5ebebc | 2387 | jme_pause_rx(jme); |
7ca9ebee GFT |
2388 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20) |
2389 | jme->vlgrp->vlan_devices[vid] = NULL; | |
2390 | #else | |
2391 | vlan_group_set_device(jme->vlgrp, vid, NULL); | |
2392 | #endif | |
1e5ebebc | 2393 | jme_resume_rx(jme); |
7ca9ebee | 2394 | } |
7ca9ebee GFT |
2395 | } |
2396 | #endif | |
2397 | ||
3bf61c55 GFT |
2398 | static void |
2399 | jme_get_drvinfo(struct net_device *netdev, | |
2400 | struct ethtool_drvinfo *info) | |
d7699f87 | 2401 | { |
cd0ff491 | 2402 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2403 | |
cd0ff491 GFT |
2404 | strcpy(info->driver, DRV_NAME); |
2405 | strcpy(info->version, DRV_VERSION); | |
2406 | strcpy(info->bus_info, pci_name(jme->pdev)); | |
d7699f87 GFT |
2407 | } |
2408 | ||
8c198884 GFT |
2409 | static int |
2410 | jme_get_regs_len(struct net_device *netdev) | |
2411 | { | |
cd0ff491 | 2412 | return JME_REG_LEN; |
8c198884 GFT |
2413 | } |
2414 | ||
2415 | static void | |
cd0ff491 | 2416 | mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len) |
8c198884 GFT |
2417 | { |
2418 | int i; | |
2419 | ||
cd0ff491 | 2420 | for (i = 0 ; i < len ; i += 4) |
79ce639c | 2421 | p[i >> 2] = jread32(jme, reg + i); |
186fc259 | 2422 | } |
8c198884 | 2423 | |
186fc259 | 2424 | static void |
cd0ff491 | 2425 | mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) |
186fc259 GFT |
2426 | { |
2427 | int i; | |
cd0ff491 | 2428 | u16 *p16 = (u16 *)p; |
186fc259 | 2429 | |
cd0ff491 | 2430 | for (i = 0 ; i < reg_nr ; ++i) |
186fc259 | 2431 | p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i); |
8c198884 GFT |
2432 | } |
2433 | ||
2434 | static void | |
2435 | jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) | |
2436 | { | |
cd0ff491 GFT |
2437 | struct jme_adapter *jme = netdev_priv(netdev); |
2438 | u32 *p32 = (u32 *)p; | |
8c198884 | 2439 | |
186fc259 | 2440 | memset(p, 0xFF, JME_REG_LEN); |
8c198884 GFT |
2441 | |
2442 | regs->version = 1; | |
2443 | mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN); | |
2444 | ||
2445 | p32 += 0x100 >> 2; | |
2446 | mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN); | |
2447 | ||
2448 | p32 += 0x100 >> 2; | |
2449 | mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN); | |
2450 | ||
2451 | p32 += 0x100 >> 2; | |
2452 | mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN); | |
2453 | ||
186fc259 GFT |
2454 | p32 += 0x100 >> 2; |
2455 | mdio_memcpy(jme, p32, JME_PHY_REG_NR); | |
8c198884 GFT |
2456 | } |
2457 | ||
2458 | static int | |
2459 | jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2460 | { | |
2461 | struct jme_adapter *jme = netdev_priv(netdev); | |
2462 | ||
8c198884 GFT |
2463 | ecmd->tx_coalesce_usecs = PCC_TX_TO; |
2464 | ecmd->tx_max_coalesced_frames = PCC_TX_CNT; | |
2465 | ||
cd0ff491 | 2466 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
cdcdc9eb GFT |
2467 | ecmd->use_adaptive_rx_coalesce = false; |
2468 | ecmd->rx_coalesce_usecs = 0; | |
2469 | ecmd->rx_max_coalesced_frames = 0; | |
2470 | return 0; | |
2471 | } | |
2472 | ||
2473 | ecmd->use_adaptive_rx_coalesce = true; | |
2474 | ||
cd0ff491 | 2475 | switch (jme->dpi.cur) { |
8c198884 GFT |
2476 | case PCC_P1: |
2477 | ecmd->rx_coalesce_usecs = PCC_P1_TO; | |
2478 | ecmd->rx_max_coalesced_frames = PCC_P1_CNT; | |
2479 | break; | |
2480 | case PCC_P2: | |
2481 | ecmd->rx_coalesce_usecs = PCC_P2_TO; | |
2482 | ecmd->rx_max_coalesced_frames = PCC_P2_CNT; | |
2483 | break; | |
2484 | case PCC_P3: | |
2485 | ecmd->rx_coalesce_usecs = PCC_P3_TO; | |
2486 | ecmd->rx_max_coalesced_frames = PCC_P3_CNT; | |
2487 | break; | |
2488 | default: | |
2489 | break; | |
2490 | } | |
2491 | ||
2492 | return 0; | |
2493 | } | |
2494 | ||
192570e0 GFT |
2495 | static int |
2496 | jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2497 | { | |
2498 | struct jme_adapter *jme = netdev_priv(netdev); | |
2499 | struct dynpcc_info *dpi = &(jme->dpi); | |
2500 | ||
cd0ff491 | 2501 | if (netif_running(netdev)) |
cdcdc9eb GFT |
2502 | return -EBUSY; |
2503 | ||
7ca9ebee GFT |
2504 | if (ecmd->use_adaptive_rx_coalesce && |
2505 | test_bit(JME_FLAG_POLL, &jme->flags)) { | |
cd0ff491 | 2506 | clear_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb GFT |
2507 | jme->jme_rx = netif_rx; |
2508 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
192570e0 GFT |
2509 | dpi->cur = PCC_P1; |
2510 | dpi->attempt = PCC_P1; | |
2511 | dpi->cnt = 0; | |
2512 | jme_set_rx_pcc(jme, PCC_P1); | |
2513 | jme_interrupt_mode(jme); | |
7ca9ebee GFT |
2514 | } else if (!(ecmd->use_adaptive_rx_coalesce) && |
2515 | !(test_bit(JME_FLAG_POLL, &jme->flags))) { | |
cd0ff491 | 2516 | set_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb GFT |
2517 | jme->jme_rx = netif_receive_skb; |
2518 | jme->jme_vlan_rx = vlan_hwaccel_receive_skb; | |
192570e0 GFT |
2519 | jme_interrupt_mode(jme); |
2520 | } | |
2521 | ||
2522 | return 0; | |
2523 | } | |
2524 | ||
8c198884 GFT |
2525 | static void |
2526 | jme_get_pauseparam(struct net_device *netdev, | |
2527 | struct ethtool_pauseparam *ecmd) | |
2528 | { | |
2529 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2530 | u32 val; |
8c198884 GFT |
2531 | |
2532 | ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0; | |
2533 | ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0; | |
2534 | ||
cd0ff491 GFT |
2535 | spin_lock_bh(&jme->phy_lock); |
2536 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2537 | spin_unlock_bh(&jme->phy_lock); | |
b3821cc5 GFT |
2538 | |
2539 | ecmd->autoneg = | |
2540 | (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0; | |
8c198884 GFT |
2541 | } |
2542 | ||
2543 | static int | |
2544 | jme_set_pauseparam(struct net_device *netdev, | |
2545 | struct ethtool_pauseparam *ecmd) | |
2546 | { | |
2547 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2548 | u32 val; |
8c198884 | 2549 | |
cd0ff491 | 2550 | if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^ |
8c198884 GFT |
2551 | (ecmd->tx_pause != 0)) { |
2552 | ||
cd0ff491 | 2553 | if (ecmd->tx_pause) |
8c198884 GFT |
2554 | jme->reg_txpfc |= TXPFC_PF_EN; |
2555 | else | |
2556 | jme->reg_txpfc &= ~TXPFC_PF_EN; | |
2557 | ||
2558 | jwrite32(jme, JME_TXPFC, jme->reg_txpfc); | |
2559 | } | |
2560 | ||
cd0ff491 GFT |
2561 | spin_lock_bh(&jme->rxmcs_lock); |
2562 | if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^ | |
8c198884 GFT |
2563 | (ecmd->rx_pause != 0)) { |
2564 | ||
cd0ff491 | 2565 | if (ecmd->rx_pause) |
8c198884 GFT |
2566 | jme->reg_rxmcs |= RXMCS_FLOWCTRL; |
2567 | else | |
2568 | jme->reg_rxmcs &= ~RXMCS_FLOWCTRL; | |
2569 | ||
2570 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2571 | } | |
cd0ff491 | 2572 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 | 2573 | |
cd0ff491 GFT |
2574 | spin_lock_bh(&jme->phy_lock); |
2575 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2576 | if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^ | |
8c198884 GFT |
2577 | (ecmd->autoneg != 0)) { |
2578 | ||
cd0ff491 | 2579 | if (ecmd->autoneg) |
8c198884 GFT |
2580 | val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
2581 | else | |
2582 | val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
2583 | ||
b3821cc5 GFT |
2584 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, |
2585 | MII_ADVERTISE, val); | |
8c198884 | 2586 | } |
cd0ff491 | 2587 | spin_unlock_bh(&jme->phy_lock); |
8c198884 GFT |
2588 | |
2589 | return 0; | |
2590 | } | |
2591 | ||
29bdd921 GFT |
2592 | static void |
2593 | jme_get_wol(struct net_device *netdev, | |
2594 | struct ethtool_wolinfo *wol) | |
2595 | { | |
2596 | struct jme_adapter *jme = netdev_priv(netdev); | |
2597 | ||
2598 | wol->supported = WAKE_MAGIC | WAKE_PHY; | |
2599 | ||
2600 | wol->wolopts = 0; | |
2601 | ||
cd0ff491 | 2602 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
29bdd921 GFT |
2603 | wol->wolopts |= WAKE_PHY; |
2604 | ||
cd0ff491 | 2605 | if (jme->reg_pmcs & PMCS_MFEN) |
29bdd921 GFT |
2606 | wol->wolopts |= WAKE_MAGIC; |
2607 | ||
2608 | } | |
2609 | ||
2610 | static int | |
2611 | jme_set_wol(struct net_device *netdev, | |
2612 | struct ethtool_wolinfo *wol) | |
2613 | { | |
2614 | struct jme_adapter *jme = netdev_priv(netdev); | |
2615 | ||
cd0ff491 | 2616 | if (wol->wolopts & (WAKE_MAGICSECURE | |
29bdd921 GFT |
2617 | WAKE_UCAST | |
2618 | WAKE_MCAST | | |
2619 | WAKE_BCAST | | |
2620 | WAKE_ARP)) | |
2621 | return -EOPNOTSUPP; | |
2622 | ||
2623 | jme->reg_pmcs = 0; | |
2624 | ||
cd0ff491 | 2625 | if (wol->wolopts & WAKE_PHY) |
29bdd921 GFT |
2626 | jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN; |
2627 | ||
cd0ff491 | 2628 | if (wol->wolopts & WAKE_MAGIC) |
29bdd921 GFT |
2629 | jme->reg_pmcs |= PMCS_MFEN; |
2630 | ||
cd0ff491 | 2631 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
42b1055e | 2632 | |
29bdd921 GFT |
2633 | return 0; |
2634 | } | |
b3821cc5 | 2635 | |
3bf61c55 GFT |
2636 | static int |
2637 | jme_get_settings(struct net_device *netdev, | |
2638 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2639 | { |
2640 | struct jme_adapter *jme = netdev_priv(netdev); | |
2641 | int rc; | |
8c198884 | 2642 | |
cd0ff491 | 2643 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2644 | rc = mii_ethtool_gset(&(jme->mii_if), ecmd); |
cd0ff491 | 2645 | spin_unlock_bh(&jme->phy_lock); |
d7699f87 GFT |
2646 | return rc; |
2647 | } | |
2648 | ||
3bf61c55 GFT |
2649 | static int |
2650 | jme_set_settings(struct net_device *netdev, | |
2651 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2652 | { |
2653 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2654 | int rc, fdc = 0; |
fcf45b4c | 2655 | |
cd0ff491 | 2656 | if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE) |
8c198884 GFT |
2657 | return -EINVAL; |
2658 | ||
e6b41b51 GFT |
2659 | /* |
2660 | * Check If user changed duplex only while force_media. | |
2661 | * Hardware would not generate link change interrupt. | |
2662 | */ | |
cd0ff491 | 2663 | if (jme->mii_if.force_media && |
79ce639c GFT |
2664 | ecmd->autoneg != AUTONEG_ENABLE && |
2665 | (jme->mii_if.full_duplex != ecmd->duplex)) | |
2666 | fdc = 1; | |
2667 | ||
cd0ff491 | 2668 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2669 | rc = mii_ethtool_sset(&(jme->mii_if), ecmd); |
cd0ff491 | 2670 | spin_unlock_bh(&jme->phy_lock); |
fcf45b4c | 2671 | |
cd0ff491 | 2672 | if (!rc) { |
e6b41b51 GFT |
2673 | if (fdc) |
2674 | jme_reset_link(jme); | |
29bdd921 | 2675 | jme->old_ecmd = *ecmd; |
aa1e7189 GFT |
2676 | set_bit(JME_FLAG_SSET, &jme->flags); |
2677 | } | |
2678 | ||
2679 | return rc; | |
2680 | } | |
2681 | ||
2682 | static int | |
2683 | jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
2684 | { | |
2685 | int rc; | |
2686 | struct jme_adapter *jme = netdev_priv(netdev); | |
2687 | struct mii_ioctl_data *mii_data = if_mii(rq); | |
2688 | unsigned int duplex_chg; | |
2689 | ||
2690 | if (cmd == SIOCSMIIREG) { | |
2691 | u16 val = mii_data->val_in; | |
2692 | if (!(val & (BMCR_RESET|BMCR_ANENABLE)) && | |
2693 | (val & BMCR_SPEED1000)) | |
2694 | return -EINVAL; | |
2695 | } | |
2696 | ||
2697 | spin_lock_bh(&jme->phy_lock); | |
2698 | rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg); | |
2699 | spin_unlock_bh(&jme->phy_lock); | |
2700 | ||
2701 | if (!rc && (cmd == SIOCSMIIREG)) { | |
2702 | if (duplex_chg) | |
2703 | jme_reset_link(jme); | |
2704 | jme_get_settings(netdev, &jme->old_ecmd); | |
2705 | set_bit(JME_FLAG_SSET, &jme->flags); | |
29bdd921 GFT |
2706 | } |
2707 | ||
d7699f87 GFT |
2708 | return rc; |
2709 | } | |
2710 | ||
cd0ff491 | 2711 | static u32 |
3bf61c55 GFT |
2712 | jme_get_link(struct net_device *netdev) |
2713 | { | |
d7699f87 GFT |
2714 | struct jme_adapter *jme = netdev_priv(netdev); |
2715 | return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP; | |
2716 | } | |
2717 | ||
8c198884 | 2718 | static u32 |
cd0ff491 GFT |
2719 | jme_get_msglevel(struct net_device *netdev) |
2720 | { | |
2721 | struct jme_adapter *jme = netdev_priv(netdev); | |
2722 | return jme->msg_enable; | |
2723 | } | |
2724 | ||
2725 | static void | |
2726 | jme_set_msglevel(struct net_device *netdev, u32 value) | |
8c198884 | 2727 | { |
cd0ff491 GFT |
2728 | struct jme_adapter *jme = netdev_priv(netdev); |
2729 | jme->msg_enable = value; | |
2730 | } | |
8c198884 | 2731 | |
cd0ff491 GFT |
2732 | static u32 |
2733 | jme_get_rx_csum(struct net_device *netdev) | |
2734 | { | |
2735 | struct jme_adapter *jme = netdev_priv(netdev); | |
8c198884 GFT |
2736 | return jme->reg_rxmcs & RXMCS_CHECKSUM; |
2737 | } | |
2738 | ||
2739 | static int | |
2740 | jme_set_rx_csum(struct net_device *netdev, u32 on) | |
2741 | { | |
cd0ff491 | 2742 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2743 | |
cd0ff491 GFT |
2744 | spin_lock_bh(&jme->rxmcs_lock); |
2745 | if (on) | |
8c198884 GFT |
2746 | jme->reg_rxmcs |= RXMCS_CHECKSUM; |
2747 | else | |
2748 | jme->reg_rxmcs &= ~RXMCS_CHECKSUM; | |
2749 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
cd0ff491 | 2750 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2751 | |
2752 | return 0; | |
2753 | } | |
2754 | ||
2755 | static int | |
2756 | jme_set_tx_csum(struct net_device *netdev, u32 on) | |
2757 | { | |
cd0ff491 | 2758 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2759 | |
cd0ff491 GFT |
2760 | if (on) { |
2761 | set_bit(JME_FLAG_TXCSUM, &jme->flags); | |
2762 | if (netdev->mtu <= 1900) | |
1a0b42f4 MM |
2763 | netdev->features |= |
2764 | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; | |
cd0ff491 GFT |
2765 | } else { |
2766 | clear_bit(JME_FLAG_TXCSUM, &jme->flags); | |
1a0b42f4 MM |
2767 | netdev->features &= |
2768 | ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); | |
b3821cc5 | 2769 | } |
8c198884 GFT |
2770 | |
2771 | return 0; | |
2772 | } | |
2773 | ||
b3821cc5 GFT |
2774 | static int |
2775 | jme_set_tso(struct net_device *netdev, u32 on) | |
2776 | { | |
cd0ff491 | 2777 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2778 | |
cd0ff491 GFT |
2779 | if (on) { |
2780 | set_bit(JME_FLAG_TSO, &jme->flags); | |
2781 | if (netdev->mtu <= 1900) | |
1a0b42f4 | 2782 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
cd0ff491 GFT |
2783 | } else { |
2784 | clear_bit(JME_FLAG_TSO, &jme->flags); | |
1a0b42f4 | 2785 | netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); |
b3821cc5 GFT |
2786 | } |
2787 | ||
cd0ff491 | 2788 | return 0; |
b3821cc5 GFT |
2789 | } |
2790 | ||
8c198884 GFT |
2791 | static int |
2792 | jme_nway_reset(struct net_device *netdev) | |
2793 | { | |
cd0ff491 | 2794 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 GFT |
2795 | jme_restart_an(jme); |
2796 | return 0; | |
2797 | } | |
2798 | ||
cd0ff491 | 2799 | static u8 |
186fc259 GFT |
2800 | jme_smb_read(struct jme_adapter *jme, unsigned int addr) |
2801 | { | |
cd0ff491 | 2802 | u32 val; |
186fc259 GFT |
2803 | int to; |
2804 | ||
2805 | val = jread32(jme, JME_SMBCSR); | |
2806 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2807 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2808 | msleep(1); |
2809 | val = jread32(jme, JME_SMBCSR); | |
2810 | } | |
cd0ff491 | 2811 | if (!to) { |
937ef75a | 2812 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2813 | return 0xFF; |
2814 | } | |
2815 | ||
2816 | jwrite32(jme, JME_SMBINTF, | |
2817 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2818 | SMBINTF_HWRWN_READ | | |
2819 | SMBINTF_HWCMD); | |
2820 | ||
2821 | val = jread32(jme, JME_SMBINTF); | |
2822 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2823 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2824 | msleep(1); |
2825 | val = jread32(jme, JME_SMBINTF); | |
2826 | } | |
cd0ff491 | 2827 | if (!to) { |
937ef75a | 2828 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2829 | return 0xFF; |
2830 | } | |
2831 | ||
2832 | return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT; | |
2833 | } | |
2834 | ||
2835 | static void | |
cd0ff491 | 2836 | jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data) |
186fc259 | 2837 | { |
cd0ff491 | 2838 | u32 val; |
186fc259 GFT |
2839 | int to; |
2840 | ||
2841 | val = jread32(jme, JME_SMBCSR); | |
2842 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2843 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2844 | msleep(1); |
2845 | val = jread32(jme, JME_SMBCSR); | |
2846 | } | |
cd0ff491 | 2847 | if (!to) { |
937ef75a | 2848 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2849 | return; |
2850 | } | |
2851 | ||
2852 | jwrite32(jme, JME_SMBINTF, | |
2853 | ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) | | |
2854 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2855 | SMBINTF_HWRWN_WRITE | | |
2856 | SMBINTF_HWCMD); | |
2857 | ||
2858 | val = jread32(jme, JME_SMBINTF); | |
2859 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2860 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2861 | msleep(1); |
2862 | val = jread32(jme, JME_SMBINTF); | |
2863 | } | |
cd0ff491 | 2864 | if (!to) { |
937ef75a | 2865 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2866 | return; |
2867 | } | |
2868 | ||
2869 | mdelay(2); | |
2870 | } | |
2871 | ||
2872 | static int | |
2873 | jme_get_eeprom_len(struct net_device *netdev) | |
2874 | { | |
cd0ff491 GFT |
2875 | struct jme_adapter *jme = netdev_priv(netdev); |
2876 | u32 val; | |
186fc259 | 2877 | val = jread32(jme, JME_SMBCSR); |
cd0ff491 | 2878 | return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0; |
186fc259 GFT |
2879 | } |
2880 | ||
2881 | static int | |
2882 | jme_get_eeprom(struct net_device *netdev, | |
2883 | struct ethtool_eeprom *eeprom, u8 *data) | |
2884 | { | |
cd0ff491 | 2885 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2886 | int i, offset = eeprom->offset, len = eeprom->len; |
2887 | ||
2888 | /* | |
8d27293f | 2889 | * ethtool will check the boundary for us |
186fc259 GFT |
2890 | */ |
2891 | eeprom->magic = JME_EEPROM_MAGIC; | |
cd0ff491 | 2892 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2893 | data[i] = jme_smb_read(jme, i + offset); |
2894 | ||
2895 | return 0; | |
2896 | } | |
2897 | ||
2898 | static int | |
2899 | jme_set_eeprom(struct net_device *netdev, | |
2900 | struct ethtool_eeprom *eeprom, u8 *data) | |
2901 | { | |
cd0ff491 | 2902 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2903 | int i, offset = eeprom->offset, len = eeprom->len; |
2904 | ||
2905 | if (eeprom->magic != JME_EEPROM_MAGIC) | |
2906 | return -EINVAL; | |
2907 | ||
2908 | /* | |
8d27293f | 2909 | * ethtool will check the boundary for us |
186fc259 | 2910 | */ |
cd0ff491 | 2911 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2912 | jme_smb_write(jme, i + offset, data[i]); |
2913 | ||
2914 | return 0; | |
2915 | } | |
2916 | ||
3b70a6fa GFT |
2917 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
2918 | static struct ethtool_ops jme_ethtool_ops = { | |
2919 | #else | |
d7699f87 | 2920 | static const struct ethtool_ops jme_ethtool_ops = { |
3b70a6fa | 2921 | #endif |
cd0ff491 | 2922 | .get_drvinfo = jme_get_drvinfo, |
8c198884 GFT |
2923 | .get_regs_len = jme_get_regs_len, |
2924 | .get_regs = jme_get_regs, | |
2925 | .get_coalesce = jme_get_coalesce, | |
192570e0 | 2926 | .set_coalesce = jme_set_coalesce, |
cd0ff491 GFT |
2927 | .get_pauseparam = jme_get_pauseparam, |
2928 | .set_pauseparam = jme_set_pauseparam, | |
29bdd921 GFT |
2929 | .get_wol = jme_get_wol, |
2930 | .set_wol = jme_set_wol, | |
d7699f87 GFT |
2931 | .get_settings = jme_get_settings, |
2932 | .set_settings = jme_set_settings, | |
2933 | .get_link = jme_get_link, | |
cd0ff491 GFT |
2934 | .get_msglevel = jme_get_msglevel, |
2935 | .set_msglevel = jme_set_msglevel, | |
8c198884 GFT |
2936 | .get_rx_csum = jme_get_rx_csum, |
2937 | .set_rx_csum = jme_set_rx_csum, | |
2938 | .set_tx_csum = jme_set_tx_csum, | |
b3821cc5 GFT |
2939 | .set_tso = jme_set_tso, |
2940 | .set_sg = ethtool_op_set_sg, | |
8c198884 | 2941 | .nway_reset = jme_nway_reset, |
186fc259 GFT |
2942 | .get_eeprom_len = jme_get_eeprom_len, |
2943 | .get_eeprom = jme_get_eeprom, | |
2944 | .set_eeprom = jme_set_eeprom, | |
d7699f87 GFT |
2945 | }; |
2946 | ||
3bf61c55 GFT |
2947 | static int |
2948 | jme_pci_dma64(struct pci_dev *pdev) | |
d7699f87 | 2949 | { |
3b70a6fa | 2950 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
0ede469c GFT |
2951 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
2952 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) | |
2953 | #else | |
2954 | !pci_set_dma_mask(pdev, DMA_64BIT_MASK) | |
2955 | #endif | |
2956 | ) | |
2957 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) | |
2958 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) | |
2959 | #else | |
cd0ff491 | 2960 | if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) |
0ede469c | 2961 | #endif |
3bf61c55 GFT |
2962 | return 1; |
2963 | ||
3b70a6fa | 2964 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
0ede469c GFT |
2965 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
2966 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(40)) | |
2967 | #else | |
2968 | !pci_set_dma_mask(pdev, DMA_40BIT_MASK) | |
2969 | #endif | |
2970 | ) | |
2971 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) | |
2972 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40))) | |
2973 | #else | |
cd0ff491 | 2974 | if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK)) |
0ede469c | 2975 | #endif |
8c198884 GFT |
2976 | return 1; |
2977 | ||
0ede469c GFT |
2978 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
2979 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) | |
2980 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) | |
2981 | #else | |
cd0ff491 GFT |
2982 | if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) |
2983 | if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) | |
0ede469c | 2984 | #endif |
3bf61c55 GFT |
2985 | return 0; |
2986 | ||
2987 | return -1; | |
2988 | } | |
2989 | ||
cd0ff491 | 2990 | static inline void |
cdcdc9eb GFT |
2991 | jme_phy_init(struct jme_adapter *jme) |
2992 | { | |
cd0ff491 | 2993 | u16 reg26; |
cdcdc9eb GFT |
2994 | |
2995 | reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26); | |
2996 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000); | |
2997 | } | |
2998 | ||
cd0ff491 | 2999 | static inline void |
cdcdc9eb | 3000 | jme_check_hw_ver(struct jme_adapter *jme) |
42b1055e | 3001 | { |
cd0ff491 | 3002 | u32 chipmode; |
cdcdc9eb GFT |
3003 | |
3004 | chipmode = jread32(jme, JME_CHIPMODE); | |
3005 | ||
3006 | jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT; | |
58c92f28 | 3007 | jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT; |
98ef18f1 GFT |
3008 | jme->chip_main_rev = jme->chiprev & 0xF; |
3009 | jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF; | |
42b1055e GFT |
3010 | } |
3011 | ||
3b70a6fa GFT |
3012 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
3013 | static const struct net_device_ops jme_netdev_ops = { | |
3014 | .ndo_open = jme_open, | |
3015 | .ndo_stop = jme_close, | |
3016 | .ndo_validate_addr = eth_validate_addr, | |
aa1e7189 | 3017 | .ndo_do_ioctl = jme_ioctl, |
3b70a6fa GFT |
3018 | .ndo_start_xmit = jme_start_xmit, |
3019 | .ndo_set_mac_address = jme_set_macaddr, | |
3020 | .ndo_set_multicast_list = jme_set_multi, | |
3021 | .ndo_change_mtu = jme_change_mtu, | |
3022 | .ndo_tx_timeout = jme_tx_timeout, | |
3023 | .ndo_vlan_rx_register = jme_vlan_rx_register, | |
3024 | }; | |
3025 | #endif | |
3026 | ||
3bf61c55 GFT |
3027 | static int __devinit |
3028 | jme_init_one(struct pci_dev *pdev, | |
3029 | const struct pci_device_id *ent) | |
3030 | { | |
cdcdc9eb | 3031 | int rc = 0, using_dac, i; |
d7699f87 GFT |
3032 | struct net_device *netdev; |
3033 | struct jme_adapter *jme; | |
cd0ff491 GFT |
3034 | u16 bmcr, bmsr; |
3035 | u32 apmc; | |
d7699f87 GFT |
3036 | |
3037 | /* | |
3038 | * set up PCI device basics | |
3039 | */ | |
4330c2f2 | 3040 | rc = pci_enable_device(pdev); |
cd0ff491 | 3041 | if (rc) { |
937ef75a | 3042 | pr_err("Cannot enable PCI device\n"); |
4330c2f2 GFT |
3043 | goto err_out; |
3044 | } | |
d7699f87 | 3045 | |
3bf61c55 | 3046 | using_dac = jme_pci_dma64(pdev); |
cd0ff491 | 3047 | if (using_dac < 0) { |
937ef75a | 3048 | pr_err("Cannot set PCI DMA Mask\n"); |
3bf61c55 GFT |
3049 | rc = -EIO; |
3050 | goto err_out_disable_pdev; | |
3051 | } | |
3052 | ||
cd0ff491 | 3053 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
937ef75a | 3054 | pr_err("No PCI resource region found\n"); |
4330c2f2 GFT |
3055 | rc = -ENOMEM; |
3056 | goto err_out_disable_pdev; | |
3057 | } | |
d7699f87 | 3058 | |
4330c2f2 | 3059 | rc = pci_request_regions(pdev, DRV_NAME); |
cd0ff491 | 3060 | if (rc) { |
937ef75a | 3061 | pr_err("Cannot obtain PCI resource region\n"); |
4330c2f2 GFT |
3062 | goto err_out_disable_pdev; |
3063 | } | |
d7699f87 GFT |
3064 | |
3065 | pci_set_master(pdev); | |
3066 | ||
3067 | /* | |
3068 | * alloc and init net device | |
3069 | */ | |
3bf61c55 | 3070 | netdev = alloc_etherdev(sizeof(*jme)); |
cd0ff491 | 3071 | if (!netdev) { |
937ef75a | 3072 | pr_err("Cannot allocate netdev structure\n"); |
4330c2f2 GFT |
3073 | rc = -ENOMEM; |
3074 | goto err_out_release_regions; | |
d7699f87 | 3075 | } |
3b70a6fa GFT |
3076 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
3077 | netdev->netdev_ops = &jme_netdev_ops; | |
3078 | #else | |
d7699f87 GFT |
3079 | netdev->open = jme_open; |
3080 | netdev->stop = jme_close; | |
aa1e7189 | 3081 | netdev->do_ioctl = jme_ioctl; |
d7699f87 | 3082 | netdev->hard_start_xmit = jme_start_xmit; |
d7699f87 GFT |
3083 | netdev->set_mac_address = jme_set_macaddr; |
3084 | netdev->set_multicast_list = jme_set_multi; | |
3085 | netdev->change_mtu = jme_change_mtu; | |
8c198884 | 3086 | netdev->tx_timeout = jme_tx_timeout; |
42b1055e | 3087 | netdev->vlan_rx_register = jme_vlan_rx_register; |
7ca9ebee GFT |
3088 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
3089 | netdev->vlan_rx_kill_vid = jme_vlan_rx_kill_vid; | |
3090 | #endif | |
3bf61c55 | 3091 | NETDEV_GET_STATS(netdev, &jme_get_stats); |
3b70a6fa GFT |
3092 | #endif |
3093 | netdev->ethtool_ops = &jme_ethtool_ops; | |
3094 | netdev->watchdog_timeo = TX_TIMEOUT; | |
1a0b42f4 MM |
3095 | netdev->features = NETIF_F_IP_CSUM | |
3096 | NETIF_F_IPV6_CSUM | | |
b3821cc5 GFT |
3097 | NETIF_F_SG | |
3098 | NETIF_F_TSO | | |
3099 | NETIF_F_TSO6 | | |
42b1055e GFT |
3100 | NETIF_F_HW_VLAN_TX | |
3101 | NETIF_F_HW_VLAN_RX; | |
cd0ff491 | 3102 | if (using_dac) |
8c198884 | 3103 | netdev->features |= NETIF_F_HIGHDMA; |
d7699f87 GFT |
3104 | |
3105 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
3106 | pci_set_drvdata(pdev, netdev); | |
3107 | ||
3108 | /* | |
3109 | * init adapter info | |
3110 | */ | |
3111 | jme = netdev_priv(netdev); | |
3112 | jme->pdev = pdev; | |
3113 | jme->dev = netdev; | |
cdcdc9eb GFT |
3114 | jme->jme_rx = netif_rx; |
3115 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
29bdd921 | 3116 | jme->old_mtu = netdev->mtu = 1500; |
fcf45b4c | 3117 | jme->phylink = 0; |
b3821cc5 | 3118 | jme->tx_ring_size = 1 << 10; |
0ede469c | 3119 | jme->tx_ring_mask = jme->tx_ring_size - 1; |
b3821cc5 GFT |
3120 | jme->tx_wake_threshold = 1 << 9; |
3121 | jme->rx_ring_size = 1 << 9; | |
3122 | jme->rx_ring_mask = jme->rx_ring_size - 1; | |
cd0ff491 | 3123 | jme->msg_enable = JME_DEF_MSG_ENABLE; |
d7699f87 GFT |
3124 | jme->regs = ioremap(pci_resource_start(pdev, 0), |
3125 | pci_resource_len(pdev, 0)); | |
4330c2f2 | 3126 | if (!(jme->regs)) { |
937ef75a | 3127 | pr_err("Mapping PCI resource region error\n"); |
d7699f87 GFT |
3128 | rc = -ENOMEM; |
3129 | goto err_out_free_netdev; | |
3130 | } | |
4330c2f2 | 3131 | |
cd0ff491 GFT |
3132 | if (no_pseudohp) { |
3133 | apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN; | |
3134 | jwrite32(jme, JME_APMC, apmc); | |
3135 | } else if (force_pseudohp) { | |
3136 | apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN; | |
3137 | jwrite32(jme, JME_APMC, apmc); | |
3138 | } | |
3139 | ||
cdcdc9eb | 3140 | NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2) |
192570e0 | 3141 | |
d7699f87 | 3142 | spin_lock_init(&jme->phy_lock); |
fcf45b4c | 3143 | spin_lock_init(&jme->macaddr_lock); |
8c198884 | 3144 | spin_lock_init(&jme->rxmcs_lock); |
fcf45b4c | 3145 | |
fcf45b4c GFT |
3146 | atomic_set(&jme->link_changing, 1); |
3147 | atomic_set(&jme->rx_cleaning, 1); | |
3148 | atomic_set(&jme->tx_cleaning, 1); | |
192570e0 | 3149 | atomic_set(&jme->rx_empty, 1); |
fcf45b4c | 3150 | |
79ce639c | 3151 | tasklet_init(&jme->pcc_task, |
7ca9ebee | 3152 | jme_pcc_tasklet, |
79ce639c | 3153 | (unsigned long) jme); |
4330c2f2 | 3154 | tasklet_init(&jme->linkch_task, |
7ca9ebee | 3155 | jme_link_change_tasklet, |
4330c2f2 GFT |
3156 | (unsigned long) jme); |
3157 | tasklet_init(&jme->txclean_task, | |
7ca9ebee | 3158 | jme_tx_clean_tasklet, |
4330c2f2 GFT |
3159 | (unsigned long) jme); |
3160 | tasklet_init(&jme->rxclean_task, | |
7ca9ebee | 3161 | jme_rx_clean_tasklet, |
4330c2f2 | 3162 | (unsigned long) jme); |
fcf45b4c | 3163 | tasklet_init(&jme->rxempty_task, |
7ca9ebee | 3164 | jme_rx_empty_tasklet, |
fcf45b4c | 3165 | (unsigned long) jme); |
0ede469c | 3166 | tasklet_disable_nosync(&jme->linkch_task); |
cd0ff491 GFT |
3167 | tasklet_disable_nosync(&jme->txclean_task); |
3168 | tasklet_disable_nosync(&jme->rxclean_task); | |
3169 | tasklet_disable_nosync(&jme->rxempty_task); | |
8c198884 GFT |
3170 | jme->dpi.cur = PCC_P1; |
3171 | ||
cd0ff491 | 3172 | jme->reg_ghc = 0; |
79ce639c | 3173 | jme->reg_rxcs = RXCS_DEFAULT; |
8c198884 GFT |
3174 | jme->reg_rxmcs = RXMCS_DEFAULT; |
3175 | jme->reg_txpfc = 0; | |
47220951 | 3176 | jme->reg_pmcs = PMCS_MFEN; |
dc4185bd | 3177 | jme->reg_gpreg1 = GPREG1_DEFAULT; |
cd0ff491 GFT |
3178 | set_bit(JME_FLAG_TXCSUM, &jme->flags); |
3179 | set_bit(JME_FLAG_TSO, &jme->flags); | |
192570e0 | 3180 | |
fcf45b4c GFT |
3181 | /* |
3182 | * Get Max Read Req Size from PCI Config Space | |
3183 | */ | |
cd0ff491 GFT |
3184 | pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs); |
3185 | jme->mrrs &= PCI_DCSR_MRRS_MASK; | |
3186 | switch (jme->mrrs) { | |
3187 | case MRRS_128B: | |
3188 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; | |
3189 | break; | |
3190 | case MRRS_256B: | |
3191 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; | |
3192 | break; | |
3193 | default: | |
3194 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; | |
3195 | break; | |
cd54cf32 | 3196 | } |
fcf45b4c | 3197 | |
d7699f87 | 3198 | /* |
cdcdc9eb | 3199 | * Must check before reset_mac_processor |
d7699f87 | 3200 | */ |
cdcdc9eb GFT |
3201 | jme_check_hw_ver(jme); |
3202 | jme->mii_if.dev = netdev; | |
cd0ff491 | 3203 | if (jme->fpgaver) { |
cdcdc9eb | 3204 | jme->mii_if.phy_id = 0; |
cd0ff491 | 3205 | for (i = 1 ; i < 32 ; ++i) { |
cdcdc9eb GFT |
3206 | bmcr = jme_mdio_read(netdev, i, MII_BMCR); |
3207 | bmsr = jme_mdio_read(netdev, i, MII_BMSR); | |
cd0ff491 | 3208 | if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { |
cdcdc9eb GFT |
3209 | jme->mii_if.phy_id = i; |
3210 | break; | |
3211 | } | |
3212 | } | |
3213 | ||
cd0ff491 | 3214 | if (!jme->mii_if.phy_id) { |
cdcdc9eb | 3215 | rc = -EIO; |
937ef75a JP |
3216 | pr_err("Can not find phy_id\n"); |
3217 | goto err_out_unmap; | |
cdcdc9eb GFT |
3218 | } |
3219 | ||
3220 | jme->reg_ghc |= GHC_LINK_POLL; | |
cd0ff491 | 3221 | } else { |
cdcdc9eb GFT |
3222 | jme->mii_if.phy_id = 1; |
3223 | } | |
cd0ff491 | 3224 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
3225 | jme->mii_if.supports_gmii = true; |
3226 | else | |
3227 | jme->mii_if.supports_gmii = false; | |
aa1e7189 GFT |
3228 | jme->mii_if.phy_id_mask = 0x1F; |
3229 | jme->mii_if.reg_num_mask = 0x1F; | |
cdcdc9eb GFT |
3230 | jme->mii_if.mdio_read = jme_mdio_read; |
3231 | jme->mii_if.mdio_write = jme_mdio_write; | |
3232 | ||
d7699f87 | 3233 | jme_clear_pm(jme); |
55d19799 | 3234 | jme_set_phyfifo_5level(jme); |
98ef18f1 | 3235 | pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev); |
cd0ff491 | 3236 | if (!jme->fpgaver) |
cdcdc9eb | 3237 | jme_phy_init(jme); |
42b1055e | 3238 | jme_phy_off(jme); |
cdcdc9eb GFT |
3239 | |
3240 | /* | |
3241 | * Reset MAC processor and reload EEPROM for MAC Address | |
3242 | */ | |
d7699f87 | 3243 | jme_reset_mac_processor(jme); |
4330c2f2 | 3244 | rc = jme_reload_eeprom(jme); |
cd0ff491 | 3245 | if (rc) { |
937ef75a | 3246 | pr_err("Reload eeprom for reading MAC Address error\n"); |
0ede469c | 3247 | goto err_out_unmap; |
4330c2f2 | 3248 | } |
d7699f87 GFT |
3249 | jme_load_macaddr(netdev); |
3250 | ||
d7699f87 GFT |
3251 | /* |
3252 | * Tell stack that we are not ready to work until open() | |
3253 | */ | |
3254 | netif_carrier_off(netdev); | |
d7699f87 | 3255 | |
4330c2f2 | 3256 | rc = register_netdev(netdev); |
cd0ff491 | 3257 | if (rc) { |
937ef75a | 3258 | pr_err("Cannot register net device\n"); |
0ede469c | 3259 | goto err_out_unmap; |
4330c2f2 | 3260 | } |
d7699f87 | 3261 | |
98ef18f1 | 3262 | netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x " |
937ef75a | 3263 | "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n", |
7ca9ebee GFT |
3264 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ? |
3265 | "JMC250 Gigabit Ethernet" : | |
3266 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ? | |
3267 | "JMC260 Fast Ethernet" : "Unknown", | |
3268 | (jme->fpgaver != 0) ? " (FPGA)" : "", | |
3269 | (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev, | |
98ef18f1 | 3270 | jme->pcirev, |
937ef75a JP |
3271 | netdev->dev_addr[0], |
3272 | netdev->dev_addr[1], | |
3273 | netdev->dev_addr[2], | |
3274 | netdev->dev_addr[3], | |
3275 | netdev->dev_addr[4], | |
3276 | netdev->dev_addr[5]); | |
d7699f87 GFT |
3277 | |
3278 | return 0; | |
3279 | ||
3280 | err_out_unmap: | |
3281 | iounmap(jme->regs); | |
3282 | err_out_free_netdev: | |
3283 | pci_set_drvdata(pdev, NULL); | |
3284 | free_netdev(netdev); | |
4330c2f2 GFT |
3285 | err_out_release_regions: |
3286 | pci_release_regions(pdev); | |
d7699f87 | 3287 | err_out_disable_pdev: |
cd0ff491 | 3288 | pci_disable_device(pdev); |
d7699f87 | 3289 | err_out: |
4330c2f2 | 3290 | return rc; |
d7699f87 GFT |
3291 | } |
3292 | ||
3bf61c55 GFT |
3293 | static void __devexit |
3294 | jme_remove_one(struct pci_dev *pdev) | |
3295 | { | |
d7699f87 GFT |
3296 | struct net_device *netdev = pci_get_drvdata(pdev); |
3297 | struct jme_adapter *jme = netdev_priv(netdev); | |
3298 | ||
3299 | unregister_netdev(netdev); | |
3300 | iounmap(jme->regs); | |
3301 | pci_set_drvdata(pdev, NULL); | |
3302 | free_netdev(netdev); | |
3303 | pci_release_regions(pdev); | |
3304 | pci_disable_device(pdev); | |
3305 | ||
3306 | } | |
3307 | ||
a82e368c GFT |
3308 | static void |
3309 | jme_shutdown(struct pci_dev *pdev) | |
3310 | { | |
3311 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3312 | struct jme_adapter *jme = netdev_priv(netdev); | |
3313 | ||
3314 | jme_powersave_phy(jme); | |
3315 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27) | |
3316 | pci_enable_wake(pdev, PCI_D3hot, true); | |
3317 | #else | |
3318 | pci_pme_active(pdev, true); | |
3319 | #endif | |
3320 | } | |
3321 | ||
7ee473a3 | 3322 | #ifdef CONFIG_PM |
29bdd921 GFT |
3323 | static int |
3324 | jme_suspend(struct pci_dev *pdev, pm_message_t state) | |
3325 | { | |
3326 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3327 | struct jme_adapter *jme = netdev_priv(netdev); | |
29bdd921 GFT |
3328 | |
3329 | atomic_dec(&jme->link_changing); | |
3330 | ||
3331 | netif_device_detach(netdev); | |
3332 | netif_stop_queue(netdev); | |
3333 | jme_stop_irq(jme); | |
29bdd921 | 3334 | |
cd0ff491 GFT |
3335 | tasklet_disable(&jme->txclean_task); |
3336 | tasklet_disable(&jme->rxclean_task); | |
3337 | tasklet_disable(&jme->rxempty_task); | |
3338 | ||
cd0ff491 GFT |
3339 | if (netif_carrier_ok(netdev)) { |
3340 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
47220951 GFT |
3341 | jme_polling_mode(jme); |
3342 | ||
29bdd921 | 3343 | jme_stop_pcc_timer(jme); |
cd0ff491 GFT |
3344 | jme_disable_rx_engine(jme); |
3345 | jme_disable_tx_engine(jme); | |
29bdd921 GFT |
3346 | jme_reset_mac_processor(jme); |
3347 | jme_free_rx_resources(jme); | |
3348 | jme_free_tx_resources(jme); | |
3349 | netif_carrier_off(netdev); | |
3350 | jme->phylink = 0; | |
3351 | } | |
3352 | ||
cd0ff491 GFT |
3353 | tasklet_enable(&jme->txclean_task); |
3354 | tasklet_hi_enable(&jme->rxclean_task); | |
3355 | tasklet_hi_enable(&jme->rxempty_task); | |
29bdd921 GFT |
3356 | |
3357 | pci_save_state(pdev); | |
a82e368c | 3358 | jme_powersave_phy(jme); |
44d44589 | 3359 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27) |
a82e368c | 3360 | pci_enable_wake(pdev, PCI_D3hot, true); |
44d44589 AL |
3361 | #else |
3362 | pci_pme_active(pdev, true); | |
3363 | #endif | |
a82e368c | 3364 | pci_set_power_state(pdev, PCI_D3hot); |
29bdd921 GFT |
3365 | |
3366 | return 0; | |
3367 | } | |
3368 | ||
3369 | static int | |
3370 | jme_resume(struct pci_dev *pdev) | |
3371 | { | |
3372 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3373 | struct jme_adapter *jme = netdev_priv(netdev); | |
3374 | ||
3375 | jme_clear_pm(jme); | |
3376 | pci_restore_state(pdev); | |
3377 | ||
ed457bcc GFT |
3378 | jme_phy_on(jme); |
3379 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
29bdd921 | 3380 | jme_set_settings(netdev, &jme->old_ecmd); |
ed457bcc | 3381 | else |
29bdd921 GFT |
3382 | jme_reset_phy_processor(jme); |
3383 | ||
29bdd921 GFT |
3384 | jme_start_irq(jme); |
3385 | netif_device_attach(netdev); | |
3386 | ||
3387 | atomic_inc(&jme->link_changing); | |
3388 | ||
3389 | jme_reset_link(jme); | |
3390 | ||
3391 | return 0; | |
3392 | } | |
7ee473a3 | 3393 | #endif |
29bdd921 | 3394 | |
7ca9ebee | 3395 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24) |
d7699f87 | 3396 | static struct pci_device_id jme_pci_tbl[] = { |
7ca9ebee GFT |
3397 | #else |
3398 | static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = { | |
3399 | #endif | |
cd0ff491 GFT |
3400 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) }, |
3401 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) }, | |
d7699f87 GFT |
3402 | { } |
3403 | }; | |
3404 | ||
3405 | static struct pci_driver jme_driver = { | |
cd0ff491 GFT |
3406 | .name = DRV_NAME, |
3407 | .id_table = jme_pci_tbl, | |
3408 | .probe = jme_init_one, | |
3409 | .remove = __devexit_p(jme_remove_one), | |
d7699f87 | 3410 | #ifdef CONFIG_PM |
cd0ff491 GFT |
3411 | .suspend = jme_suspend, |
3412 | .resume = jme_resume, | |
d7699f87 | 3413 | #endif /* CONFIG_PM */ |
a82e368c | 3414 | .shutdown = jme_shutdown, |
d7699f87 GFT |
3415 | }; |
3416 | ||
3bf61c55 GFT |
3417 | static int __init |
3418 | jme_init_module(void) | |
d7699f87 | 3419 | { |
937ef75a | 3420 | pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION); |
d7699f87 GFT |
3421 | return pci_register_driver(&jme_driver); |
3422 | } | |
3423 | ||
3bf61c55 GFT |
3424 | static void __exit |
3425 | jme_cleanup_module(void) | |
d7699f87 GFT |
3426 | { |
3427 | pci_unregister_driver(&jme_driver); | |
3428 | } | |
3429 | ||
3430 | module_init(jme_init_module); | |
3431 | module_exit(jme_cleanup_module); | |
3432 | ||
3bf61c55 | 3433 | MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>"); |
d7699f87 GFT |
3434 | MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver"); |
3435 | MODULE_LICENSE("GPL"); | |
3436 | MODULE_VERSION(DRV_VERSION); | |
3437 | MODULE_DEVICE_TABLE(pci, jme_pci_tbl); | |
3438 |