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be2net: Adding PCI SRIOV support
[net-next-2.6.git] / drivers / net / benet / be_main.c
CommitLineData
6b7c5b94 1/*
294aedcf 2 * Copyright (C) 2005 - 2010 ServerEngines
6b7c5b94
SP		 3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#include "be.h"
8788fdc2 19#include "be_cmds.h"
65f71b8b 20#include <asm/div64.h>
6b7c5b94
SP		 21
22MODULE_VERSION(DRV_VER);
23MODULE_DEVICE_TABLE(pci, be_dev_ids);
24MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25MODULE_AUTHOR("ServerEngines Corporation");
26MODULE_LICENSE("GPL");
27
28static unsigned int rx_frag_size = 2048;
ba343c77 29static unsigned int num_vfs;
6b7c5b94 30module_param(rx_frag_size, uint, S_IRUGO);
ba343c77 31module_param(num_vfs, uint, S_IRUGO);
6b7c5b94 32MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
ba343c77 33MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
6b7c5b94 34
6b7c5b94 35static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
c4ca2374 36 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
59fd5d87 37 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
c4ca2374
AK		 38 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
39 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
6b7c5b94
SP		 40 { 0 }
41};
42MODULE_DEVICE_TABLE(pci, be_dev_ids);
43
44static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
45{
46 struct be_dma_mem *mem = &q->dma_mem;
47 if (mem->va)
48 pci_free_consistent(adapter->pdev, mem->size,
49 mem->va, mem->dma);
50}
51
52static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
53 u16 len, u16 entry_size)
54{
55 struct be_dma_mem *mem = &q->dma_mem;
56
57 memset(q, 0, sizeof(*q));
58 q->len = len;
59 q->entry_size = entry_size;
60 mem->size = len * entry_size;
61 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
62 if (!mem->va)
63 return -1;
64 memset(mem->va, 0, mem->size);
65 return 0;
66}
67
8788fdc2 68static void be_intr_set(struct be_adapter *adapter, bool enable)
6b7c5b94 69{
8788fdc2 70 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
6b7c5b94
SP		 71 u32 reg = ioread32(addr);
72 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 73
cf588477
SP		 74 if (adapter->eeh_err)
75 return;
76
5f0b849e 77 if (!enabled && enable)
6b7c5b94 78 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 79 else if (enabled && !enable)
6b7c5b94 80 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 81 else
6b7c5b94 82 return;
5f0b849e 83
6b7c5b94
SP		 84 iowrite32(reg, addr);
85}
86
8788fdc2 87static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 88{
89 u32 val = 0;
90 val |= qid & DB_RQ_RING_ID_MASK;
91 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
8788fdc2 92 iowrite32(val, adapter->db + DB_RQ_OFFSET);
6b7c5b94
SP		 93}
94
8788fdc2 95static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 96{
97 u32 val = 0;
98 val |= qid & DB_TXULP_RING_ID_MASK;
99 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
8788fdc2 100 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
6b7c5b94
SP		 101}
102
8788fdc2 103static void be_eq_notify(struct be_adapter *adapter, u16 qid,
6b7c5b94
SP		 104 bool arm, bool clear_int, u16 num_popped)
105{
106 u32 val = 0;
107 val |= qid & DB_EQ_RING_ID_MASK;
cf588477
SP		 108
109 if (adapter->eeh_err)
110 return;
111
6b7c5b94
SP		 112 if (arm)
113 val |= 1 << DB_EQ_REARM_SHIFT;
114 if (clear_int)
115 val |= 1 << DB_EQ_CLR_SHIFT;
116 val |= 1 << DB_EQ_EVNT_SHIFT;
117 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
8788fdc2 118 iowrite32(val, adapter->db + DB_EQ_OFFSET);
6b7c5b94
SP		 119}
120
8788fdc2 121void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
6b7c5b94
SP		 122{
123 u32 val = 0;
124 val |= qid & DB_CQ_RING_ID_MASK;
cf588477
SP		 125
126 if (adapter->eeh_err)
127 return;
128
6b7c5b94
SP		 129 if (arm)
130 val |= 1 << DB_CQ_REARM_SHIFT;
131 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
8788fdc2 132 iowrite32(val, adapter->db + DB_CQ_OFFSET);
6b7c5b94
SP		 133}
134
6b7c5b94
SP		 135static int be_mac_addr_set(struct net_device *netdev, void *p)
136{
137 struct be_adapter *adapter = netdev_priv(netdev);
138 struct sockaddr *addr = p;
139 int status = 0;
140
ca9e4988
AK		 141 if (!is_valid_ether_addr(addr->sa_data))
142 return -EADDRNOTAVAIL;
143
ba343c77
SB		 144 /* MAC addr configuration will be done in hardware for VFs
145 * by their corresponding PFs. Just copy to netdev addr here
146 */
147 if (!be_physfn(adapter))
148 goto netdev_addr;
149
a65027e4
SP		 150 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
151 if (status)
152 return status;
6b7c5b94 153
a65027e4
SP		 154 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
155 adapter->if_handle, &adapter->pmac_id);
ba343c77 156netdev_addr:
6b7c5b94
SP		 157 if (!status)
158 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
159
160 return status;
161}
162
b31c50a7 163void netdev_stats_update(struct be_adapter *adapter)
6b7c5b94
SP		 164{
165 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
166 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
167 struct be_port_rxf_stats *port_stats =
168 &rxf_stats->port[adapter->port_num];
78122a52 169 struct net_device_stats *dev_stats = &adapter->netdev->stats;
68110868 170 struct be_erx_stats *erx_stats = &hw_stats->erx;
6b7c5b94 171
91992e44
AK		 172 dev_stats->rx_packets = drvr_stats(adapter)->be_rx_pkts;
173 dev_stats->tx_packets = drvr_stats(adapter)->be_tx_pkts;
174 dev_stats->rx_bytes = drvr_stats(adapter)->be_rx_bytes;
175 dev_stats->tx_bytes = drvr_stats(adapter)->be_tx_bytes;
6b7c5b94
SP		 176
177 /* bad pkts received */
178 dev_stats->rx_errors = port_stats->rx_crc_errors +
179 port_stats->rx_alignment_symbol_errors +
180 port_stats->rx_in_range_errors +
68110868
SP		 181 port_stats->rx_out_range_errors +
182 port_stats->rx_frame_too_long +
183 port_stats->rx_dropped_too_small +
184 port_stats->rx_dropped_too_short +
185 port_stats->rx_dropped_header_too_small +
186 port_stats->rx_dropped_tcp_length +
187 port_stats->rx_dropped_runt +
188 port_stats->rx_tcp_checksum_errs +
189 port_stats->rx_ip_checksum_errs +
190 port_stats->rx_udp_checksum_errs;
191
192 /* no space in linux buffers: best possible approximation */
01ed30da
SP		 193 dev_stats->rx_dropped =
194 erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
6b7c5b94
SP		 195
196 /* detailed rx errors */
197 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
68110868
SP		 198 port_stats->rx_out_range_errors +
199 port_stats->rx_frame_too_long;
200
6b7c5b94
SP		 201 /* receive ring buffer overflow */
202 dev_stats->rx_over_errors = 0;
68110868 203
6b7c5b94
SP		 204 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
205
206 /* frame alignment errors */
207 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
68110868 208
6b7c5b94
SP		 209 /* receiver fifo overrun */
210 /* drops_no_pbuf is no per i/f, it's per BE card */
211 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
212 port_stats->rx_input_fifo_overflow +
213 rxf_stats->rx_drops_no_pbuf;
214 /* receiver missed packetd */
215 dev_stats->rx_missed_errors = 0;
68110868
SP		 216
217 /* packet transmit problems */
218 dev_stats->tx_errors = 0;
219
220 /* no space available in linux */
221 dev_stats->tx_dropped = 0;
222
c5b9b92e 223 dev_stats->multicast = port_stats->rx_multicast_frames;
68110868
SP		 224 dev_stats->collisions = 0;
225
6b7c5b94
SP		 226 /* detailed tx_errors */
227 dev_stats->tx_aborted_errors = 0;
228 dev_stats->tx_carrier_errors = 0;
229 dev_stats->tx_fifo_errors = 0;
230 dev_stats->tx_heartbeat_errors = 0;
231 dev_stats->tx_window_errors = 0;
232}
233
8788fdc2 234void be_link_status_update(struct be_adapter *adapter, bool link_up)
6b7c5b94 235{
6b7c5b94
SP		 236 struct net_device *netdev = adapter->netdev;
237
6b7c5b94 238 /* If link came up or went down */
a8f447bd 239 if (adapter->link_up != link_up) {
0dffc83e 240 adapter->link_speed = -1;
a8f447bd 241 if (link_up) {
6b7c5b94
SP		 242 netif_start_queue(netdev);
243 netif_carrier_on(netdev);
244 printk(KERN_INFO "%s: Link up\n", netdev->name);
a8f447bd
SP		 245 } else {
246 netif_stop_queue(netdev);
247 netif_carrier_off(netdev);
248 printk(KERN_INFO "%s: Link down\n", netdev->name);
6b7c5b94 249 }
a8f447bd 250 adapter->link_up = link_up;
6b7c5b94 251 }
6b7c5b94
SP		 252}
253
254/* Update the EQ delay n BE based on the RX frags consumed / sec */
255static void be_rx_eqd_update(struct be_adapter *adapter)
256{
6b7c5b94
SP		 257 struct be_eq_obj *rx_eq = &adapter->rx_eq;
258 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
4097f663
SP		 259 ulong now = jiffies;
260 u32 eqd;
261
262 if (!rx_eq->enable_aic)
263 return;
264
265 /* Wrapped around */
266 if (time_before(now, stats->rx_fps_jiffies)) {
267 stats->rx_fps_jiffies = now;
268 return;
269 }
6b7c5b94
SP		 270
271 /* Update once a second */
4097f663 272 if ((now - stats->rx_fps_jiffies) < HZ)
6b7c5b94
SP		 273 return;
274
275 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
4097f663 276 ((now - stats->rx_fps_jiffies) / HZ);
6b7c5b94 277
4097f663 278 stats->rx_fps_jiffies = now;
6b7c5b94
SP		 279 stats->be_prev_rx_frags = stats->be_rx_frags;
280 eqd = stats->be_rx_fps / 110000;
281 eqd = eqd << 3;
282 if (eqd > rx_eq->max_eqd)
283 eqd = rx_eq->max_eqd;
284 if (eqd < rx_eq->min_eqd)
285 eqd = rx_eq->min_eqd;
286 if (eqd < 10)
287 eqd = 0;
288 if (eqd != rx_eq->cur_eqd)
8788fdc2 289 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
6b7c5b94
SP		 290
291 rx_eq->cur_eqd = eqd;
292}
293
6b7c5b94
SP		 294static struct net_device_stats *be_get_stats(struct net_device *dev)
295{
78122a52 296 return &dev->stats;
6b7c5b94
SP		 297}
298
65f71b8b
SH		 299static u32 be_calc_rate(u64 bytes, unsigned long ticks)
300{
301 u64 rate = bytes;
302
303 do_div(rate, ticks / HZ);
304 rate <<= 3; /* bytes/sec -> bits/sec */
305 do_div(rate, 1000000ul); /* MB/Sec */
306
307 return rate;
308}
309
4097f663
SP		 310static void be_tx_rate_update(struct be_adapter *adapter)
311{
312 struct be_drvr_stats *stats = drvr_stats(adapter);
313 ulong now = jiffies;
314
315 /* Wrapped around? */
316 if (time_before(now, stats->be_tx_jiffies)) {
317 stats->be_tx_jiffies = now;
318 return;
319 }
320
321 /* Update tx rate once in two seconds */
322 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
65f71b8b
SH		 323 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
324 - stats->be_tx_bytes_prev,
325 now - stats->be_tx_jiffies);
4097f663
SP		 326 stats->be_tx_jiffies = now;
327 stats->be_tx_bytes_prev = stats->be_tx_bytes;
328 }
329}
330
6b7c5b94 331static void be_tx_stats_update(struct be_adapter *adapter,
91992e44 332 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
6b7c5b94 333{
4097f663 334 struct be_drvr_stats *stats = drvr_stats(adapter);
6b7c5b94
SP		 335 stats->be_tx_reqs++;
336 stats->be_tx_wrbs += wrb_cnt;
337 stats->be_tx_bytes += copied;
91992e44 338 stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
6b7c5b94
SP		 339 if (stopped)
340 stats->be_tx_stops++;
6b7c5b94
SP		 341}
342
343/* Determine number of WRB entries needed to xmit data in an skb */
344static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
345{
ebc8d2ab
DM		 346 int cnt = (skb->len > skb->data_len);
347
348 cnt += skb_shinfo(skb)->nr_frags;
349
6b7c5b94
SP		 350 /* to account for hdr wrb */
351 cnt++;
352 if (cnt & 1) {
353 /* add a dummy to make it an even num */
354 cnt++;
355 *dummy = true;
356 } else
357 *dummy = false;
358 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
359 return cnt;
360}
361
362static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
363{
364 wrb->frag_pa_hi = upper_32_bits(addr);
365 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
366 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
367}
368
369static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
370 bool vlan, u32 wrb_cnt, u32 len)
371{
372 memset(hdr, 0, sizeof(*hdr));
373
374 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
375
376 if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
377 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
378 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
379 hdr, skb_shinfo(skb)->gso_size);
380 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
381 if (is_tcp_pkt(skb))
382 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
383 else if (is_udp_pkt(skb))
384 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
385 }
386
387 if (vlan && vlan_tx_tag_present(skb)) {
388 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
389 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
390 hdr, vlan_tx_tag_get(skb));
391 }
392
393 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
394 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
395 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
396 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
397}
398
7101e111
SP		 399static void unmap_tx_frag(struct pci_dev *pdev, struct be_eth_wrb *wrb,
400 bool unmap_single)
401{
402 dma_addr_t dma;
403
404 be_dws_le_to_cpu(wrb, sizeof(*wrb));
405
406 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
407 if (dma != 0) {
408 if (unmap_single)
409 pci_unmap_single(pdev, dma, wrb->frag_len,
410 PCI_DMA_TODEVICE);
411 else
412 pci_unmap_page(pdev, dma, wrb->frag_len,
413 PCI_DMA_TODEVICE);
414 }
415}
6b7c5b94
SP		 416
417static int make_tx_wrbs(struct be_adapter *adapter,
418 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
419{
7101e111
SP		 420 dma_addr_t busaddr;
421 int i, copied = 0;
6b7c5b94
SP		 422 struct pci_dev *pdev = adapter->pdev;
423 struct sk_buff *first_skb = skb;
424 struct be_queue_info *txq = &adapter->tx_obj.q;
425 struct be_eth_wrb *wrb;
426 struct be_eth_hdr_wrb *hdr;
7101e111
SP		 427 bool map_single = false;
428 u16 map_head;
6b7c5b94 429
6b7c5b94
SP		 430 hdr = queue_head_node(txq);
431 queue_head_inc(txq);
7101e111 432 map_head = txq->head;
6b7c5b94 433
ebc8d2ab
DM		 434 if (skb->len > skb->data_len) {
435 int len = skb->len - skb->data_len;
a73b796e
AD		 436 busaddr = pci_map_single(pdev, skb->data, len,
437 PCI_DMA_TODEVICE);
7101e111
SP		 438 if (pci_dma_mapping_error(pdev, busaddr))
439 goto dma_err;
440 map_single = true;
ebc8d2ab
DM		 441 wrb = queue_head_node(txq);
442 wrb_fill(wrb, busaddr, len);
443 be_dws_cpu_to_le(wrb, sizeof(*wrb));
444 queue_head_inc(txq);
445 copied += len;
446 }
6b7c5b94 447
ebc8d2ab
DM		 448 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
449 struct skb_frag_struct *frag =
450 &skb_shinfo(skb)->frags[i];
a73b796e
AD		 451 busaddr = pci_map_page(pdev, frag->page,
452 frag->page_offset,
453 frag->size, PCI_DMA_TODEVICE);
7101e111
SP		 454 if (pci_dma_mapping_error(pdev, busaddr))
455 goto dma_err;
ebc8d2ab
DM		 456 wrb = queue_head_node(txq);
457 wrb_fill(wrb, busaddr, frag->size);
458 be_dws_cpu_to_le(wrb, sizeof(*wrb));
459 queue_head_inc(txq);
460 copied += frag->size;
6b7c5b94
SP		 461 }
462
463 if (dummy_wrb) {
464 wrb = queue_head_node(txq);
465 wrb_fill(wrb, 0, 0);
466 be_dws_cpu_to_le(wrb, sizeof(*wrb));
467 queue_head_inc(txq);
468 }
469
470 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
471 wrb_cnt, copied);
472 be_dws_cpu_to_le(hdr, sizeof(*hdr));
473
474 return copied;
7101e111
SP		 475dma_err:
476 txq->head = map_head;
477 while (copied) {
478 wrb = queue_head_node(txq);
479 unmap_tx_frag(pdev, wrb, map_single);
480 map_single = false;
481 copied -= wrb->frag_len;
482 queue_head_inc(txq);
483 }
484 return 0;
6b7c5b94
SP		 485}
486
61357325 487static netdev_tx_t be_xmit(struct sk_buff *skb,
b31c50a7 488 struct net_device *netdev)
6b7c5b94
SP		 489{
490 struct be_adapter *adapter = netdev_priv(netdev);
491 struct be_tx_obj *tx_obj = &adapter->tx_obj;
492 struct be_queue_info *txq = &tx_obj->q;
493 u32 wrb_cnt = 0, copied = 0;
494 u32 start = txq->head;
495 bool dummy_wrb, stopped = false;
496
497 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
498
499 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
c190e3c8
AK		 500 if (copied) {
501 /* record the sent skb in the sent_skb table */
502 BUG_ON(tx_obj->sent_skb_list[start]);
503 tx_obj->sent_skb_list[start] = skb;
504
505 /* Ensure txq has space for the next skb; Else stop the queue
506 * *BEFORE* ringing the tx doorbell, so that we serialze the
507 * tx compls of the current transmit which'll wake up the queue
508 */
7101e111 509 atomic_add(wrb_cnt, &txq->used);
c190e3c8
AK		 510 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
511 txq->len) {
512 netif_stop_queue(netdev);
513 stopped = true;
514 }
6b7c5b94 515
c190e3c8 516 be_txq_notify(adapter, txq->id, wrb_cnt);
6b7c5b94 517
91992e44
AK		 518 be_tx_stats_update(adapter, wrb_cnt, copied,
519 skb_shinfo(skb)->gso_segs, stopped);
c190e3c8
AK		 520 } else {
521 txq->head = start;
522 dev_kfree_skb_any(skb);
6b7c5b94 523 }
6b7c5b94
SP		 524 return NETDEV_TX_OK;
525}
526
527static int be_change_mtu(struct net_device *netdev, int new_mtu)
528{
529 struct be_adapter *adapter = netdev_priv(netdev);
530 if (new_mtu < BE_MIN_MTU ||
34a89b8c
AK		 531 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
532 (ETH_HLEN + ETH_FCS_LEN))) {
6b7c5b94
SP		 533 dev_info(&adapter->pdev->dev,
534 "MTU must be between %d and %d bytes\n",
34a89b8c
AK		 535 BE_MIN_MTU,
536 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
6b7c5b94
SP		 537 return -EINVAL;
538 }
539 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
540 netdev->mtu, new_mtu);
541 netdev->mtu = new_mtu;
542 return 0;
543}
544
545/*
82903e4b
AK		 546 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
547 * If the user configures more, place BE in vlan promiscuous mode.
6b7c5b94 548 */
b31c50a7 549static int be_vid_config(struct be_adapter *adapter)
6b7c5b94 550{
6b7c5b94
SP		 551 u16 vtag[BE_NUM_VLANS_SUPPORTED];
552 u16 ntags = 0, i;
82903e4b 553 int status = 0;
6b7c5b94 554
82903e4b 555 if (adapter->vlans_added <= adapter->max_vlans) {
6b7c5b94
SP		 556 /* Construct VLAN Table to give to HW */
557 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
558 if (adapter->vlan_tag[i]) {
559 vtag[ntags] = cpu_to_le16(i);
560 ntags++;
561 }
562 }
b31c50a7
SP		 563 status = be_cmd_vlan_config(adapter, adapter->if_handle,
564 vtag, ntags, 1, 0);
6b7c5b94 565 } else {
b31c50a7
SP		 566 status = be_cmd_vlan_config(adapter, adapter->if_handle,
567 NULL, 0, 1, 1);
6b7c5b94 568 }
b31c50a7 569 return status;
6b7c5b94
SP		 570}
571
572static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
573{
574 struct be_adapter *adapter = netdev_priv(netdev);
575 struct be_eq_obj *rx_eq = &adapter->rx_eq;
576 struct be_eq_obj *tx_eq = &adapter->tx_eq;
6b7c5b94 577
8788fdc2
SP		 578 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
579 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
6b7c5b94 580 adapter->vlan_grp = grp;
8788fdc2
SP		 581 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
582 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
6b7c5b94
SP		 583}
584
585static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
586{
587 struct be_adapter *adapter = netdev_priv(netdev);
588
ba343c77
SB		 589 if (!be_physfn(adapter))
590 return;
591
6b7c5b94 592 adapter->vlan_tag[vid] = 1;
82903e4b
AK		 593 adapter->vlans_added++;
594 if (adapter->vlans_added <= (adapter->max_vlans + 1))
595 be_vid_config(adapter);
6b7c5b94
SP		 596}
597
598static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
599{
600 struct be_adapter *adapter = netdev_priv(netdev);
601
ba343c77
SB		 602 if (!be_physfn(adapter))
603 return;
604
6b7c5b94 605 adapter->vlan_tag[vid] = 0;
6b7c5b94 606 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
82903e4b
AK		 607 adapter->vlans_added--;
608 if (adapter->vlans_added <= adapter->max_vlans)
609 be_vid_config(adapter);
6b7c5b94
SP		 610}
611
24307eef 612static void be_set_multicast_list(struct net_device *netdev)
6b7c5b94
SP		 613{
614 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94 615
24307eef 616 if (netdev->flags & IFF_PROMISC) {
8788fdc2 617 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
24307eef
SP		 618 adapter->promiscuous = true;
619 goto done;
6b7c5b94
SP		 620 }
621
24307eef
SP		 622 /* BE was previously in promiscous mode; disable it */
623 if (adapter->promiscuous) {
624 adapter->promiscuous = false;
8788fdc2 625 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
6b7c5b94
SP		 626 }
627
e7b909a6 628 /* Enable multicast promisc if num configured exceeds what we support */
4cd24eaf
JP		 629 if (netdev->flags & IFF_ALLMULTI ||
630 netdev_mc_count(netdev) > BE_MAX_MC) {
0ddf477b 631 be_cmd_multicast_set(adapter, adapter->if_handle, NULL,
e7b909a6 632 &adapter->mc_cmd_mem);
24307eef 633 goto done;
6b7c5b94 634 }
6b7c5b94 635
0ddf477b 636 be_cmd_multicast_set(adapter, adapter->if_handle, netdev,
f31e50a8 637 &adapter->mc_cmd_mem);
24307eef
SP		 638done:
639 return;
6b7c5b94
SP		 640}
641
ba343c77
SB		 642static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
643{
644 struct be_adapter *adapter = netdev_priv(netdev);
645 int status;
646
647 if (!adapter->sriov_enabled)
648 return -EPERM;
649
650 if (!is_valid_ether_addr(mac) || (vf >= num_vfs))
651 return -EINVAL;
652
653 status = be_cmd_pmac_del(adapter, adapter->vf_if_handle[vf],
654 adapter->vf_pmac_id[vf]);
655
656 status = be_cmd_pmac_add(adapter, mac, adapter->vf_if_handle[vf],
657 &adapter->vf_pmac_id[vf]);
658 if (!status)
659 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
660 mac, vf);
661 return status;
662}
663
4097f663 664static void be_rx_rate_update(struct be_adapter *adapter)
6b7c5b94 665{
4097f663
SP		 666 struct be_drvr_stats *stats = drvr_stats(adapter);
667 ulong now = jiffies;
6b7c5b94 668
4097f663
SP		 669 /* Wrapped around */
670 if (time_before(now, stats->be_rx_jiffies)) {
671 stats->be_rx_jiffies = now;
672 return;
673 }
6b7c5b94
SP		 674
675 /* Update the rate once in two seconds */
4097f663 676 if ((now - stats->be_rx_jiffies) < 2 * HZ)
6b7c5b94
SP		 677 return;
678
65f71b8b
SH		 679 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
680 - stats->be_rx_bytes_prev,
681 now - stats->be_rx_jiffies);
4097f663 682 stats->be_rx_jiffies = now;
6b7c5b94
SP		 683 stats->be_rx_bytes_prev = stats->be_rx_bytes;
684}
685
4097f663
SP		 686static void be_rx_stats_update(struct be_adapter *adapter,
687 u32 pktsize, u16 numfrags)
688{
689 struct be_drvr_stats *stats = drvr_stats(adapter);
690
691 stats->be_rx_compl++;
692 stats->be_rx_frags += numfrags;
693 stats->be_rx_bytes += pktsize;
91992e44 694 stats->be_rx_pkts++;
4097f663
SP		 695}
696
728a9972
AK		 697static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
698{
699 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
700
701 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
702 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
703 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
704 if (ip_version) {
705 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
706 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
707 }
708 ipv6_chk = (ip_version && (tcpf || udpf));
709
710 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
711}
712
6b7c5b94
SP		 713static struct be_rx_page_info *
714get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
715{
716 struct be_rx_page_info *rx_page_info;
717 struct be_queue_info *rxq = &adapter->rx_obj.q;
718
719 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
720 BUG_ON(!rx_page_info->page);
721
205859a2 722 if (rx_page_info->last_page_user) {
6b7c5b94
SP		 723 pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
724 adapter->big_page_size, PCI_DMA_FROMDEVICE);
205859a2
AK		 725 rx_page_info->last_page_user = false;
726 }
6b7c5b94
SP		 727
728 atomic_dec(&rxq->used);
729 return rx_page_info;
730}
731
732/* Throwaway the data in the Rx completion */
733static void be_rx_compl_discard(struct be_adapter *adapter,
734 struct be_eth_rx_compl *rxcp)
735{
736 struct be_queue_info *rxq = &adapter->rx_obj.q;
737 struct be_rx_page_info *page_info;
738 u16 rxq_idx, i, num_rcvd;
739
740 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
741 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
742
743 for (i = 0; i < num_rcvd; i++) {
744 page_info = get_rx_page_info(adapter, rxq_idx);
745 put_page(page_info->page);
746 memset(page_info, 0, sizeof(*page_info));
747 index_inc(&rxq_idx, rxq->len);
748 }
749}
750
751/*
752 * skb_fill_rx_data forms a complete skb for an ether frame
753 * indicated by rxcp.
754 */
755static void skb_fill_rx_data(struct be_adapter *adapter,
89420424
SP		 756 struct sk_buff *skb, struct be_eth_rx_compl *rxcp,
757 u16 num_rcvd)
6b7c5b94
SP		 758{
759 struct be_queue_info *rxq = &adapter->rx_obj.q;
760 struct be_rx_page_info *page_info;
89420424 761 u16 rxq_idx, i, j;
fa77406a 762 u32 pktsize, hdr_len, curr_frag_len, size;
6b7c5b94
SP		 763 u8 *start;
764
765 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
766 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
6b7c5b94
SP		 767
768 page_info = get_rx_page_info(adapter, rxq_idx);
769
770 start = page_address(page_info->page) + page_info->page_offset;
771 prefetch(start);
772
773 /* Copy data in the first descriptor of this completion */
774 curr_frag_len = min(pktsize, rx_frag_size);
775
776 /* Copy the header portion into skb_data */
777 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
778 memcpy(skb->data, start, hdr_len);
779 skb->len = curr_frag_len;
780 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
781 /* Complete packet has now been moved to data */
782 put_page(page_info->page);
783 skb->data_len = 0;
784 skb->tail += curr_frag_len;
785 } else {
786 skb_shinfo(skb)->nr_frags = 1;
787 skb_shinfo(skb)->frags[0].page = page_info->page;
788 skb_shinfo(skb)->frags[0].page_offset =
789 page_info->page_offset + hdr_len;
790 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
791 skb->data_len = curr_frag_len - hdr_len;
792 skb->tail += hdr_len;
793 }
205859a2 794 page_info->page = NULL;
6b7c5b94
SP		 795
796 if (pktsize <= rx_frag_size) {
797 BUG_ON(num_rcvd != 1);
76fbb429 798 goto done;
6b7c5b94
SP		 799 }
800
801 /* More frags present for this completion */
fa77406a 802 size = pktsize;
bd46cb6c 803 for (i = 1, j = 0; i < num_rcvd; i++) {
fa77406a 804 size -= curr_frag_len;
6b7c5b94
SP		 805 index_inc(&rxq_idx, rxq->len);
806 page_info = get_rx_page_info(adapter, rxq_idx);
807
fa77406a 808 curr_frag_len = min(size, rx_frag_size);
6b7c5b94 809
bd46cb6c
AK		 810 /* Coalesce all frags from the same physical page in one slot */
811 if (page_info->page_offset == 0) {
812 /* Fresh page */
813 j++;
814 skb_shinfo(skb)->frags[j].page = page_info->page;
815 skb_shinfo(skb)->frags[j].page_offset =
816 page_info->page_offset;
817 skb_shinfo(skb)->frags[j].size = 0;
818 skb_shinfo(skb)->nr_frags++;
819 } else {
820 put_page(page_info->page);
821 }
822
823 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94
SP		 824 skb->len += curr_frag_len;
825 skb->data_len += curr_frag_len;
6b7c5b94 826
205859a2 827 page_info->page = NULL;
6b7c5b94 828 }
bd46cb6c 829 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 830
76fbb429 831done:
4097f663 832 be_rx_stats_update(adapter, pktsize, num_rcvd);
6b7c5b94
SP		 833 return;
834}
835
5be93b9a 836/* Process the RX completion indicated by rxcp when GRO is disabled */
6b7c5b94
SP		 837static void be_rx_compl_process(struct be_adapter *adapter,
838 struct be_eth_rx_compl *rxcp)
839{
840 struct sk_buff *skb;
dcb9b564 841 u32 vlanf, vid;
89420424 842 u16 num_rcvd;
dcb9b564 843 u8 vtm;
6b7c5b94 844
89420424
SP		 845 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
846 /* Is it a flush compl that has no data */
847 if (unlikely(num_rcvd == 0))
848 return;
849
89d71a66 850 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
a058a632 851 if (unlikely(!skb)) {
6b7c5b94
SP		 852 if (net_ratelimit())
853 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
854 be_rx_compl_discard(adapter, rxcp);
855 return;
856 }
857
89420424 858 skb_fill_rx_data(adapter, skb, rxcp, num_rcvd);
6b7c5b94 859
728a9972 860 if (do_pkt_csum(rxcp, adapter->rx_csum))
6b7c5b94 861 skb->ip_summed = CHECKSUM_NONE;
728a9972
AK		 862 else
863 skb->ip_summed = CHECKSUM_UNNECESSARY;
6b7c5b94
SP		 864
865 skb->truesize = skb->len + sizeof(struct sk_buff);
866 skb->protocol = eth_type_trans(skb, adapter->netdev);
6b7c5b94 867
a058a632
SP		 868 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
869 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
870
871 /* vlanf could be wrongly set in some cards.
872 * ignore if vtm is not set */
873 if ((adapter->cap & 0x400) && !vtm)
874 vlanf = 0;
875
876 if (unlikely(vlanf)) {
82903e4b 877 if (!adapter->vlan_grp || adapter->vlans_added == 0) {
6b7c5b94
SP		 878 kfree_skb(skb);
879 return;
880 }
881 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
882 vid = be16_to_cpu(vid);
883 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
884 } else {
885 netif_receive_skb(skb);
886 }
887
6b7c5b94
SP		 888 return;
889}
890
5be93b9a
AK		 891/* Process the RX completion indicated by rxcp when GRO is enabled */
892static void be_rx_compl_process_gro(struct be_adapter *adapter,
6b7c5b94
SP		 893 struct be_eth_rx_compl *rxcp)
894{
895 struct be_rx_page_info *page_info;
5be93b9a 896 struct sk_buff *skb = NULL;
6b7c5b94 897 struct be_queue_info *rxq = &adapter->rx_obj.q;
5be93b9a 898 struct be_eq_obj *eq_obj = &adapter->rx_eq;
6b7c5b94 899 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
bd46cb6c 900 u16 i, rxq_idx = 0, vid, j;
dcb9b564 901 u8 vtm;
6b7c5b94
SP		 902
903 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
89420424
SP		 904 /* Is it a flush compl that has no data */
905 if (unlikely(num_rcvd == 0))
906 return;
907
6b7c5b94
SP		 908 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
909 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
910 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
dcb9b564
AK		 911 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
912
913 /* vlanf could be wrongly set in some cards.
914 * ignore if vtm is not set */
e1187b3b 915 if ((adapter->cap & 0x400) && !vtm)
dcb9b564 916 vlanf = 0;
6b7c5b94 917
5be93b9a
AK		 918 skb = napi_get_frags(&eq_obj->napi);
919 if (!skb) {
920 be_rx_compl_discard(adapter, rxcp);
921 return;
922 }
923
6b7c5b94 924 remaining = pkt_size;
bd46cb6c 925 for (i = 0, j = -1; i < num_rcvd; i++) {
6b7c5b94
SP		 926 page_info = get_rx_page_info(adapter, rxq_idx);
927
928 curr_frag_len = min(remaining, rx_frag_size);
929
bd46cb6c
AK		 930 /* Coalesce all frags from the same physical page in one slot */
931 if (i == 0 || page_info->page_offset == 0) {
932 /* First frag or Fresh page */
933 j++;
5be93b9a
AK		 934 skb_shinfo(skb)->frags[j].page = page_info->page;
935 skb_shinfo(skb)->frags[j].page_offset =
936 page_info->page_offset;
937 skb_shinfo(skb)->frags[j].size = 0;
bd46cb6c
AK		 938 } else {
939 put_page(page_info->page);
940 }
5be93b9a 941 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94 942
bd46cb6c 943 remaining -= curr_frag_len;
6b7c5b94 944 index_inc(&rxq_idx, rxq->len);
6b7c5b94
SP		 945 memset(page_info, 0, sizeof(*page_info));
946 }
bd46cb6c 947 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 948
5be93b9a
AK		 949 skb_shinfo(skb)->nr_frags = j + 1;
950 skb->len = pkt_size;
951 skb->data_len = pkt_size;
952 skb->truesize += pkt_size;
953 skb->ip_summed = CHECKSUM_UNNECESSARY;
954
6b7c5b94 955 if (likely(!vlanf)) {
5be93b9a 956 napi_gro_frags(&eq_obj->napi);
6b7c5b94
SP		 957 } else {
958 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
959 vid = be16_to_cpu(vid);
960
82903e4b 961 if (!adapter->vlan_grp || adapter->vlans_added == 0)
6b7c5b94
SP		 962 return;
963
5be93b9a 964 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
6b7c5b94
SP		 965 }
966
4097f663 967 be_rx_stats_update(adapter, pkt_size, num_rcvd);
6b7c5b94
SP		 968 return;
969}
970
971static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
972{
973 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
974
975 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
976 return NULL;
977
978 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
979
6b7c5b94
SP		 980 queue_tail_inc(&adapter->rx_obj.cq);
981 return rxcp;
982}
983
a7a0ef31
SP		 984/* To reset the valid bit, we need to reset the whole word as
985 * when walking the queue the valid entries are little-endian
986 * and invalid entries are host endian
987 */
988static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
989{
990 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
991}
992
6b7c5b94
SP		 993static inline struct page *be_alloc_pages(u32 size)
994{
995 gfp_t alloc_flags = GFP_ATOMIC;
996 u32 order = get_order(size);
997 if (order > 0)
998 alloc_flags |= __GFP_COMP;
999 return alloc_pages(alloc_flags, order);
1000}
1001
1002/*
1003 * Allocate a page, split it to fragments of size rx_frag_size and post as
1004 * receive buffers to BE
1005 */
1006static void be_post_rx_frags(struct be_adapter *adapter)
1007{
1008 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
26d92f92 1009 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
6b7c5b94
SP		 1010 struct be_queue_info *rxq = &adapter->rx_obj.q;
1011 struct page *pagep = NULL;
1012 struct be_eth_rx_d *rxd;
1013 u64 page_dmaaddr = 0, frag_dmaaddr;
1014 u32 posted, page_offset = 0;
1015
6b7c5b94
SP		 1016 page_info = &page_info_tbl[rxq->head];
1017 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1018 if (!pagep) {
1019 pagep = be_alloc_pages(adapter->big_page_size);
1020 if (unlikely(!pagep)) {
1021 drvr_stats(adapter)->be_ethrx_post_fail++;
1022 break;
1023 }
1024 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
1025 adapter->big_page_size,
1026 PCI_DMA_FROMDEVICE);
1027 page_info->page_offset = 0;
1028 } else {
1029 get_page(pagep);
1030 page_info->page_offset = page_offset + rx_frag_size;
1031 }
1032 page_offset = page_info->page_offset;
1033 page_info->page = pagep;
1034 pci_unmap_addr_set(page_info, bus, page_dmaaddr);
1035 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1036
1037 rxd = queue_head_node(rxq);
1038 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1039 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
6b7c5b94
SP		 1040
1041 /* Any space left in the current big page for another frag? */
1042 if ((page_offset + rx_frag_size + rx_frag_size) >
1043 adapter->big_page_size) {
1044 pagep = NULL;
1045 page_info->last_page_user = true;
1046 }
26d92f92
SP		 1047
1048 prev_page_info = page_info;
1049 queue_head_inc(rxq);
6b7c5b94
SP		 1050 page_info = &page_info_tbl[rxq->head];
1051 }
1052 if (pagep)
26d92f92 1053 prev_page_info->last_page_user = true;
6b7c5b94
SP		 1054
1055 if (posted) {
6b7c5b94 1056 atomic_add(posted, &rxq->used);
8788fdc2 1057 be_rxq_notify(adapter, rxq->id, posted);
ea1dae11
SP		 1058 } else if (atomic_read(&rxq->used) == 0) {
1059 /* Let be_worker replenish when memory is available */
1060 adapter->rx_post_starved = true;
6b7c5b94
SP		 1061 }
1062
1063 return;
1064}
1065
5fb379ee 1066static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
6b7c5b94 1067{
6b7c5b94
SP		 1068 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1069
1070 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1071 return NULL;
1072
1073 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1074
1075 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1076
1077 queue_tail_inc(tx_cq);
1078 return txcp;
1079}
1080
1081static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
1082{
1083 struct be_queue_info *txq = &adapter->tx_obj.q;
a73b796e 1084 struct be_eth_wrb *wrb;
6b7c5b94
SP		 1085 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1086 struct sk_buff *sent_skb;
ec43b1a6
SP		 1087 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1088 bool unmap_skb_hdr = true;
6b7c5b94 1089
ec43b1a6 1090 sent_skb = sent_skbs[txq->tail];
6b7c5b94 1091 BUG_ON(!sent_skb);
ec43b1a6
SP		 1092 sent_skbs[txq->tail] = NULL;
1093
1094 /* skip header wrb */
a73b796e 1095 queue_tail_inc(txq);
6b7c5b94 1096
ec43b1a6 1097 do {
6b7c5b94 1098 cur_index = txq->tail;
a73b796e 1099 wrb = queue_tail_node(txq);
ec43b1a6
SP		 1100 unmap_tx_frag(adapter->pdev, wrb, (unmap_skb_hdr &&
1101 sent_skb->len > sent_skb->data_len));
1102 unmap_skb_hdr = false;
1103
6b7c5b94
SP		 1104 num_wrbs++;
1105 queue_tail_inc(txq);
ec43b1a6 1106 } while (cur_index != last_index);
6b7c5b94
SP		 1107
1108 atomic_sub(num_wrbs, &txq->used);
a73b796e 1109
6b7c5b94
SP		 1110 kfree_skb(sent_skb);
1111}
1112
859b1e4e
SP		 1113static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1114{
1115 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1116
1117 if (!eqe->evt)
1118 return NULL;
1119
1120 eqe->evt = le32_to_cpu(eqe->evt);
1121 queue_tail_inc(&eq_obj->q);
1122 return eqe;
1123}
1124
1125static int event_handle(struct be_adapter *adapter,
1126 struct be_eq_obj *eq_obj)
1127{
1128 struct be_eq_entry *eqe;
1129 u16 num = 0;
1130
1131 while ((eqe = event_get(eq_obj)) != NULL) {
1132 eqe->evt = 0;
1133 num++;
1134 }
1135
1136 /* Deal with any spurious interrupts that come
1137 * without events
1138 */
1139 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1140 if (num)
1141 napi_schedule(&eq_obj->napi);
1142
1143 return num;
1144}
1145
1146/* Just read and notify events without processing them.
1147 * Used at the time of destroying event queues */
1148static void be_eq_clean(struct be_adapter *adapter,
1149 struct be_eq_obj *eq_obj)
1150{
1151 struct be_eq_entry *eqe;
1152 u16 num = 0;
1153
1154 while ((eqe = event_get(eq_obj)) != NULL) {
1155 eqe->evt = 0;
1156 num++;
1157 }
1158
1159 if (num)
1160 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1161}
1162
6b7c5b94
SP		 1163static void be_rx_q_clean(struct be_adapter *adapter)
1164{
1165 struct be_rx_page_info *page_info;
1166 struct be_queue_info *rxq = &adapter->rx_obj.q;
1167 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1168 struct be_eth_rx_compl *rxcp;
1169 u16 tail;
1170
1171 /* First cleanup pending rx completions */
1172 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1173 be_rx_compl_discard(adapter, rxcp);
a7a0ef31 1174 be_rx_compl_reset(rxcp);
8788fdc2 1175 be_cq_notify(adapter, rx_cq->id, true, 1);
6b7c5b94
SP		 1176 }
1177
1178 /* Then free posted rx buffer that were not used */
1179 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
cdab23b7 1180 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
6b7c5b94
SP		 1181 page_info = get_rx_page_info(adapter, tail);
1182 put_page(page_info->page);
1183 memset(page_info, 0, sizeof(*page_info));
1184 }
1185 BUG_ON(atomic_read(&rxq->used));
1186}
1187
a8e9179a 1188static void be_tx_compl_clean(struct be_adapter *adapter)
6b7c5b94 1189{
a8e9179a 1190 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94 1191 struct be_queue_info *txq = &adapter->tx_obj.q;
a8e9179a
SP		 1192 struct be_eth_tx_compl *txcp;
1193 u16 end_idx, cmpl = 0, timeo = 0;
b03388d6
SP		 1194 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1195 struct sk_buff *sent_skb;
1196 bool dummy_wrb;
a8e9179a
SP		 1197
1198 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1199 do {
1200 while ((txcp = be_tx_compl_get(tx_cq))) {
1201 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1202 wrb_index, txcp);
1203 be_tx_compl_process(adapter, end_idx);
1204 cmpl++;
1205 }
1206 if (cmpl) {
1207 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1208 cmpl = 0;
1209 }
1210
1211 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1212 break;
1213
1214 mdelay(1);
1215 } while (true);
1216
1217 if (atomic_read(&txq->used))
1218 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1219 atomic_read(&txq->used));
b03388d6
SP		 1220
1221 /* free posted tx for which compls will never arrive */
1222 while (atomic_read(&txq->used)) {
1223 sent_skb = sent_skbs[txq->tail];
1224 end_idx = txq->tail;
1225 index_adv(&end_idx,
1226 wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
1227 be_tx_compl_process(adapter, end_idx);
1228 }
6b7c5b94
SP		 1229}
1230
5fb379ee
SP		 1231static void be_mcc_queues_destroy(struct be_adapter *adapter)
1232{
1233 struct be_queue_info *q;
5fb379ee 1234
8788fdc2 1235 q = &adapter->mcc_obj.q;
5fb379ee 1236 if (q->created)
8788fdc2 1237 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
5fb379ee
SP		 1238 be_queue_free(adapter, q);
1239
8788fdc2 1240 q = &adapter->mcc_obj.cq;
5fb379ee 1241 if (q->created)
8788fdc2 1242 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
5fb379ee
SP		 1243 be_queue_free(adapter, q);
1244}
1245
1246/* Must be called only after TX qs are created as MCC shares TX EQ */
1247static int be_mcc_queues_create(struct be_adapter *adapter)
1248{
1249 struct be_queue_info *q, *cq;
5fb379ee
SP		 1250
1251 /* Alloc MCC compl queue */
8788fdc2 1252 cq = &adapter->mcc_obj.cq;
5fb379ee 1253 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
efd2e40a 1254 sizeof(struct be_mcc_compl)))
5fb379ee
SP		 1255 goto err;
1256
1257 /* Ask BE to create MCC compl queue; share TX's eq */
8788fdc2 1258 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
5fb379ee
SP		 1259 goto mcc_cq_free;
1260
1261 /* Alloc MCC queue */
8788fdc2 1262 q = &adapter->mcc_obj.q;
5fb379ee
SP		 1263 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1264 goto mcc_cq_destroy;
1265
1266 /* Ask BE to create MCC queue */
8788fdc2 1267 if (be_cmd_mccq_create(adapter, q, cq))
5fb379ee
SP		 1268 goto mcc_q_free;
1269
1270 return 0;
1271
1272mcc_q_free:
1273 be_queue_free(adapter, q);
1274mcc_cq_destroy:
8788fdc2 1275 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
5fb379ee
SP		 1276mcc_cq_free:
1277 be_queue_free(adapter, cq);
1278err:
1279 return -1;
1280}
1281
6b7c5b94
SP		 1282static void be_tx_queues_destroy(struct be_adapter *adapter)
1283{
1284 struct be_queue_info *q;
1285
1286 q = &adapter->tx_obj.q;
a8e9179a 1287 if (q->created)
8788fdc2 1288 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
6b7c5b94
SP		 1289 be_queue_free(adapter, q);
1290
1291 q = &adapter->tx_obj.cq;
1292 if (q->created)
8788fdc2 1293 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1294 be_queue_free(adapter, q);
1295
859b1e4e
SP		 1296 /* Clear any residual events */
1297 be_eq_clean(adapter, &adapter->tx_eq);
1298
6b7c5b94
SP		 1299 q = &adapter->tx_eq.q;
1300 if (q->created)
8788fdc2 1301 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1302 be_queue_free(adapter, q);
1303}
1304
1305static int be_tx_queues_create(struct be_adapter *adapter)
1306{
1307 struct be_queue_info *eq, *q, *cq;
1308
1309 adapter->tx_eq.max_eqd = 0;
1310 adapter->tx_eq.min_eqd = 0;
1311 adapter->tx_eq.cur_eqd = 96;
1312 adapter->tx_eq.enable_aic = false;
1313 /* Alloc Tx Event queue */
1314 eq = &adapter->tx_eq.q;
1315 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1316 return -1;
1317
1318 /* Ask BE to create Tx Event queue */
8788fdc2 1319 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
6b7c5b94 1320 goto tx_eq_free;
ba343c77
SB		 1321 adapter->base_eq_id = adapter->tx_eq.q.id;
1322
6b7c5b94
SP		 1323 /* Alloc TX eth compl queue */
1324 cq = &adapter->tx_obj.cq;
1325 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1326 sizeof(struct be_eth_tx_compl)))
1327 goto tx_eq_destroy;
1328
1329 /* Ask BE to create Tx eth compl queue */
8788fdc2 1330 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
6b7c5b94
SP		 1331 goto tx_cq_free;
1332
1333 /* Alloc TX eth queue */
1334 q = &adapter->tx_obj.q;
1335 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1336 goto tx_cq_destroy;
1337
1338 /* Ask BE to create Tx eth queue */
8788fdc2 1339 if (be_cmd_txq_create(adapter, q, cq))
6b7c5b94
SP		 1340 goto tx_q_free;
1341 return 0;
1342
1343tx_q_free:
1344 be_queue_free(adapter, q);
1345tx_cq_destroy:
8788fdc2 1346 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1347tx_cq_free:
1348 be_queue_free(adapter, cq);
1349tx_eq_destroy:
8788fdc2 1350 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1351tx_eq_free:
1352 be_queue_free(adapter, eq);
1353 return -1;
1354}
1355
1356static void be_rx_queues_destroy(struct be_adapter *adapter)
1357{
1358 struct be_queue_info *q;
1359
1360 q = &adapter->rx_obj.q;
1361 if (q->created) {
8788fdc2 1362 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
89420424
SP		 1363
1364 /* After the rxq is invalidated, wait for a grace time
1365 * of 1ms for all dma to end and the flush compl to arrive
1366 */
1367 mdelay(1);
6b7c5b94
SP		 1368 be_rx_q_clean(adapter);
1369 }
1370 be_queue_free(adapter, q);
1371
1372 q = &adapter->rx_obj.cq;
1373 if (q->created)
8788fdc2 1374 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1375 be_queue_free(adapter, q);
1376
859b1e4e
SP		 1377 /* Clear any residual events */
1378 be_eq_clean(adapter, &adapter->rx_eq);
1379
6b7c5b94
SP		 1380 q = &adapter->rx_eq.q;
1381 if (q->created)
8788fdc2 1382 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1383 be_queue_free(adapter, q);
1384}
1385
1386static int be_rx_queues_create(struct be_adapter *adapter)
1387{
1388 struct be_queue_info *eq, *q, *cq;
1389 int rc;
1390
6b7c5b94
SP		 1391 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1392 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1393 adapter->rx_eq.min_eqd = 0;
1394 adapter->rx_eq.cur_eqd = 0;
1395 adapter->rx_eq.enable_aic = true;
1396
1397 /* Alloc Rx Event queue */
1398 eq = &adapter->rx_eq.q;
1399 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1400 sizeof(struct be_eq_entry));
1401 if (rc)
1402 return rc;
1403
1404 /* Ask BE to create Rx Event queue */
8788fdc2 1405 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
6b7c5b94
SP		 1406 if (rc)
1407 goto rx_eq_free;
1408
1409 /* Alloc RX eth compl queue */
1410 cq = &adapter->rx_obj.cq;
1411 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1412 sizeof(struct be_eth_rx_compl));
1413 if (rc)
1414 goto rx_eq_destroy;
1415
1416 /* Ask BE to create Rx eth compl queue */
8788fdc2 1417 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
6b7c5b94
SP		 1418 if (rc)
1419 goto rx_cq_free;
1420
1421 /* Alloc RX eth queue */
1422 q = &adapter->rx_obj.q;
1423 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1424 if (rc)
1425 goto rx_cq_destroy;
1426
1427 /* Ask BE to create Rx eth queue */
8788fdc2 1428 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
6b7c5b94
SP		 1429 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1430 if (rc)
1431 goto rx_q_free;
1432
1433 return 0;
1434rx_q_free:
1435 be_queue_free(adapter, q);
1436rx_cq_destroy:
8788fdc2 1437 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1438rx_cq_free:
1439 be_queue_free(adapter, cq);
1440rx_eq_destroy:
8788fdc2 1441 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1442rx_eq_free:
1443 be_queue_free(adapter, eq);
1444 return rc;
1445}
6b7c5b94 1446
b628bde2
SP		 1447/* There are 8 evt ids per func. Retruns the evt id's bit number */
1448static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1449{
ba343c77 1450 return eq_id - adapter->base_eq_id;
b628bde2
SP		 1451}
1452
6b7c5b94
SP		 1453static irqreturn_t be_intx(int irq, void *dev)
1454{
1455 struct be_adapter *adapter = dev;
8788fdc2 1456 int isr;
6b7c5b94 1457
8788fdc2 1458 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
55bdeed9 1459 (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
c001c213 1460 if (!isr)
8788fdc2 1461 return IRQ_NONE;
6b7c5b94 1462
8788fdc2
SP		 1463 event_handle(adapter, &adapter->tx_eq);
1464 event_handle(adapter, &adapter->rx_eq);
c001c213 1465
8788fdc2 1466 return IRQ_HANDLED;
6b7c5b94
SP		 1467}
1468
1469static irqreturn_t be_msix_rx(int irq, void *dev)
1470{
1471 struct be_adapter *adapter = dev;
1472
8788fdc2 1473 event_handle(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1474
1475 return IRQ_HANDLED;
1476}
1477
5fb379ee 1478static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
6b7c5b94
SP		 1479{
1480 struct be_adapter *adapter = dev;
1481
8788fdc2 1482 event_handle(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1483
1484 return IRQ_HANDLED;
1485}
1486
5be93b9a 1487static inline bool do_gro(struct be_adapter *adapter,
6b7c5b94
SP		 1488 struct be_eth_rx_compl *rxcp)
1489{
1490 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1491 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1492
1493 if (err)
1494 drvr_stats(adapter)->be_rxcp_err++;
1495
5be93b9a 1496 return (tcp_frame && !err) ? true : false;
6b7c5b94
SP		 1497}
1498
1499int be_poll_rx(struct napi_struct *napi, int budget)
1500{
1501 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1502 struct be_adapter *adapter =
1503 container_of(rx_eq, struct be_adapter, rx_eq);
1504 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1505 struct be_eth_rx_compl *rxcp;
1506 u32 work_done;
1507
b7b83ac3 1508 adapter->stats.drvr_stats.be_rx_polls++;
6b7c5b94
SP		 1509 for (work_done = 0; work_done < budget; work_done++) {
1510 rxcp = be_rx_compl_get(adapter);
1511 if (!rxcp)
1512 break;
1513
5be93b9a
AK		 1514 if (do_gro(adapter, rxcp))
1515 be_rx_compl_process_gro(adapter, rxcp);
6b7c5b94
SP		 1516 else
1517 be_rx_compl_process(adapter, rxcp);
a7a0ef31
SP		 1518
1519 be_rx_compl_reset(rxcp);
6b7c5b94
SP		 1520 }
1521
6b7c5b94
SP		 1522 /* Refill the queue */
1523 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1524 be_post_rx_frags(adapter);
1525
1526 /* All consumed */
1527 if (work_done < budget) {
1528 napi_complete(napi);
8788fdc2 1529 be_cq_notify(adapter, rx_cq->id, true, work_done);
6b7c5b94
SP		 1530 } else {
1531 /* More to be consumed; continue with interrupts disabled */
8788fdc2 1532 be_cq_notify(adapter, rx_cq->id, false, work_done);
6b7c5b94
SP		 1533 }
1534 return work_done;
1535}
1536
f31e50a8
SP		 1537/* As TX and MCC share the same EQ check for both TX and MCC completions.
1538 * For TX/MCC we don't honour budget; consume everything
1539 */
1540static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
6b7c5b94 1541{
f31e50a8
SP		 1542 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1543 struct be_adapter *adapter =
1544 container_of(tx_eq, struct be_adapter, tx_eq);
5fb379ee
SP		 1545 struct be_queue_info *txq = &adapter->tx_obj.q;
1546 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94 1547 struct be_eth_tx_compl *txcp;
f31e50a8 1548 int tx_compl = 0, mcc_compl, status = 0;
6b7c5b94
SP		 1549 u16 end_idx;
1550
5fb379ee 1551 while ((txcp = be_tx_compl_get(tx_cq))) {
6b7c5b94 1552 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
f31e50a8 1553 wrb_index, txcp);
6b7c5b94 1554 be_tx_compl_process(adapter, end_idx);
f31e50a8 1555 tx_compl++;
6b7c5b94
SP		 1556 }
1557
f31e50a8
SP		 1558 mcc_compl = be_process_mcc(adapter, &status);
1559
1560 napi_complete(napi);
1561
1562 if (mcc_compl) {
1563 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
1564 be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
1565 }
1566
1567 if (tx_compl) {
1568 be_cq_notify(adapter, adapter->tx_obj.cq.id, true, tx_compl);
5fb379ee
SP		 1569
1570 /* As Tx wrbs have been freed up, wake up netdev queue if
1571 * it was stopped due to lack of tx wrbs.
1572 */
1573 if (netif_queue_stopped(adapter->netdev) &&
6b7c5b94 1574 atomic_read(&txq->used) < txq->len / 2) {
5fb379ee
SP		 1575 netif_wake_queue(adapter->netdev);
1576 }
1577
1578 drvr_stats(adapter)->be_tx_events++;
f31e50a8 1579 drvr_stats(adapter)->be_tx_compl += tx_compl;
6b7c5b94 1580 }
6b7c5b94
SP		 1581
1582 return 1;
1583}
1584
ea1dae11
SP		 1585static void be_worker(struct work_struct *work)
1586{
1587 struct be_adapter *adapter =
1588 container_of(work, struct be_adapter, work.work);
ea1dae11 1589
b31c50a7 1590 be_cmd_get_stats(adapter, &adapter->stats.cmd);
ea1dae11
SP		 1591
1592 /* Set EQ delay */
1593 be_rx_eqd_update(adapter);
1594
4097f663
SP		 1595 be_tx_rate_update(adapter);
1596 be_rx_rate_update(adapter);
1597
ea1dae11
SP		 1598 if (adapter->rx_post_starved) {
1599 adapter->rx_post_starved = false;
1600 be_post_rx_frags(adapter);
1601 }
1602
1603 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1604}
1605
8d56ff11
SP		 1606static void be_msix_disable(struct be_adapter *adapter)
1607{
1608 if (adapter->msix_enabled) {
1609 pci_disable_msix(adapter->pdev);
1610 adapter->msix_enabled = false;
1611 }
1612}
1613
6b7c5b94
SP		 1614static void be_msix_enable(struct be_adapter *adapter)
1615{
1616 int i, status;
1617
1618 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1619 adapter->msix_entries[i].entry = i;
1620
1621 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1622 BE_NUM_MSIX_VECTORS);
1623 if (status == 0)
1624 adapter->msix_enabled = true;
1625 return;
1626}
1627
ba343c77
SB		 1628static void be_sriov_enable(struct be_adapter *adapter)
1629{
1630#ifdef CONFIG_PCI_IOV
1631 int status;
1632 if (be_physfn(adapter) && num_vfs) {
1633 status = pci_enable_sriov(adapter->pdev, num_vfs);
1634 adapter->sriov_enabled = status ? false : true;
1635 }
1636#endif
1637 return;
1638}
1639
1640static void be_sriov_disable(struct be_adapter *adapter)
1641{
1642#ifdef CONFIG_PCI_IOV
1643 if (adapter->sriov_enabled) {
1644 pci_disable_sriov(adapter->pdev);
1645 adapter->sriov_enabled = false;
1646 }
1647#endif
1648}
1649
6b7c5b94
SP		 1650static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1651{
b628bde2
SP		 1652 return adapter->msix_entries[
1653 be_evt_bit_get(adapter, eq_id)].vector;
6b7c5b94
SP		 1654}
1655
b628bde2
SP		 1656static int be_request_irq(struct be_adapter *adapter,
1657 struct be_eq_obj *eq_obj,
1658 void *handler, char *desc)
6b7c5b94
SP		 1659{
1660 struct net_device *netdev = adapter->netdev;
b628bde2
SP		 1661 int vec;
1662
1663 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1664 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1665 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1666}
1667
1668static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1669{
1670 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1671 free_irq(vec, adapter);
1672}
6b7c5b94 1673
b628bde2
SP		 1674static int be_msix_register(struct be_adapter *adapter)
1675{
1676 int status;
1677
1678 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
6b7c5b94
SP		 1679 if (status)
1680 goto err;
1681
b628bde2
SP		 1682 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1683 if (status)
1684 goto free_tx_irq;
1685
6b7c5b94 1686 return 0;
b628bde2
SP		 1687
1688free_tx_irq:
1689 be_free_irq(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1690err:
1691 dev_warn(&adapter->pdev->dev,
1692 "MSIX Request IRQ failed - err %d\n", status);
1693 pci_disable_msix(adapter->pdev);
1694 adapter->msix_enabled = false;
1695 return status;
1696}
1697
1698static int be_irq_register(struct be_adapter *adapter)
1699{
1700 struct net_device *netdev = adapter->netdev;
1701 int status;
1702
1703 if (adapter->msix_enabled) {
1704 status = be_msix_register(adapter);
1705 if (status == 0)
1706 goto done;
ba343c77
SB		 1707 /* INTx is not supported for VF */
1708 if (!be_physfn(adapter))
1709 return status;
6b7c5b94
SP		 1710 }
1711
1712 /* INTx */
1713 netdev->irq = adapter->pdev->irq;
1714 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1715 adapter);
1716 if (status) {
1717 dev_err(&adapter->pdev->dev,
1718 "INTx request IRQ failed - err %d\n", status);
1719 return status;
1720 }
1721done:
1722 adapter->isr_registered = true;
1723 return 0;
1724}
1725
1726static void be_irq_unregister(struct be_adapter *adapter)
1727{
1728 struct net_device *netdev = adapter->netdev;
6b7c5b94
SP		 1729
1730 if (!adapter->isr_registered)
1731 return;
1732
1733 /* INTx */
1734 if (!adapter->msix_enabled) {
1735 free_irq(netdev->irq, adapter);
1736 goto done;
1737 }
1738
1739 /* MSIx */
b628bde2
SP		 1740 be_free_irq(adapter, &adapter->tx_eq);
1741 be_free_irq(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1742done:
1743 adapter->isr_registered = false;
1744 return;
1745}
1746
1747static int be_open(struct net_device *netdev)
1748{
1749 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1750 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1751 struct be_eq_obj *tx_eq = &adapter->tx_eq;
a8f447bd
SP		 1752 bool link_up;
1753 int status;
0388f251
SB		 1754 u8 mac_speed;
1755 u16 link_speed;
5fb379ee
SP		 1756
1757 /* First time posting */
1758 be_post_rx_frags(adapter);
1759
1760 napi_enable(&rx_eq->napi);
1761 napi_enable(&tx_eq->napi);
1762
1763 be_irq_register(adapter);
1764
8788fdc2 1765 be_intr_set(adapter, true);
5fb379ee
SP		 1766
1767 /* The evt queues are created in unarmed state; arm them */
8788fdc2
SP		 1768 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
1769 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
5fb379ee
SP		 1770
1771 /* Rx compl queue may be in unarmed state; rearm it */
8788fdc2 1772 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
5fb379ee 1773
7a1e9b20
SP		 1774 /* Now that interrupts are on we can process async mcc */
1775 be_async_mcc_enable(adapter);
1776
0388f251
SB		 1777 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
1778 &link_speed);
a8f447bd 1779 if (status)
4f2aa89c 1780 goto ret_sts;
a8f447bd 1781 be_link_status_update(adapter, link_up);
5fb379ee 1782
ba343c77
SB		 1783 if (be_physfn(adapter))
1784 status = be_vid_config(adapter);
4f2aa89c
AK		 1785 if (status)
1786 goto ret_sts;
1787
ba343c77
SB		 1788 if (be_physfn(adapter)) {
1789 status = be_cmd_set_flow_control(adapter,
1790 adapter->tx_fc, adapter->rx_fc);
1791 if (status)
1792 goto ret_sts;
1793 }
4f2aa89c 1794
5fb379ee 1795 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
4f2aa89c
AK		 1796ret_sts:
1797 return status;
5fb379ee
SP		 1798}
1799
71d8d1b5
AK		 1800static int be_setup_wol(struct be_adapter *adapter, bool enable)
1801{
1802 struct be_dma_mem cmd;
1803 int status = 0;
1804 u8 mac[ETH_ALEN];
1805
1806 memset(mac, 0, ETH_ALEN);
1807
1808 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
1809 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
1810 if (cmd.va == NULL)
1811 return -1;
1812 memset(cmd.va, 0, cmd.size);
1813
1814 if (enable) {
1815 status = pci_write_config_dword(adapter->pdev,
1816 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
1817 if (status) {
1818 dev_err(&adapter->pdev->dev,
2381a55c 1819 "Could not enable Wake-on-lan\n");
71d8d1b5
AK		 1820 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
1821 cmd.dma);
1822 return status;
1823 }
1824 status = be_cmd_enable_magic_wol(adapter,
1825 adapter->netdev->dev_addr, &cmd);
1826 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
1827 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
1828 } else {
1829 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
1830 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
1831 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
1832 }
1833
1834 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
1835 return status;
1836}
1837
5fb379ee
SP		 1838static int be_setup(struct be_adapter *adapter)
1839{
5fb379ee 1840 struct net_device *netdev = adapter->netdev;
ba343c77 1841 u32 cap_flags, en_flags, vf = 0;
6b7c5b94 1842 int status;
ba343c77
SB		 1843 u8 mac[ETH_ALEN];
1844
1845 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST;
6b7c5b94 1846
ba343c77
SB		 1847 if (be_physfn(adapter)) {
1848 cap_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS |
1849 BE_IF_FLAGS_PROMISCUOUS |
1850 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1851 en_flags |= BE_IF_FLAGS_PASS_L3L4_ERRORS;
1852 }
73d540f2
SP		 1853
1854 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1855 netdev->dev_addr, false/* pmac_invalid */,
ba343c77 1856 &adapter->if_handle, &adapter->pmac_id, 0);
6b7c5b94
SP		 1857 if (status != 0)
1858 goto do_none;
1859
ba343c77
SB		 1860 if (be_physfn(adapter)) {
1861 while (vf < num_vfs) {
1862 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED
1863 | BE_IF_FLAGS_BROADCAST;
1864 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1865 mac, true, &adapter->vf_if_handle[vf],
1866 NULL, vf+1);
1867 if (status) {
1868 dev_err(&adapter->pdev->dev,
1869 "Interface Create failed for VF %d\n", vf);
1870 goto if_destroy;
1871 }
1872 vf++;
1873 } while (vf < num_vfs);
1874 } else if (!be_physfn(adapter)) {
1875 status = be_cmd_mac_addr_query(adapter, mac,
1876 MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
1877 if (!status) {
1878 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
1879 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
1880 }
1881 }
1882
6b7c5b94
SP		 1883 status = be_tx_queues_create(adapter);
1884 if (status != 0)
1885 goto if_destroy;
1886
1887 status = be_rx_queues_create(adapter);
1888 if (status != 0)
1889 goto tx_qs_destroy;
1890
5fb379ee
SP		 1891 status = be_mcc_queues_create(adapter);
1892 if (status != 0)
1893 goto rx_qs_destroy;
6b7c5b94 1894
0dffc83e
AK		 1895 adapter->link_speed = -1;
1896
6b7c5b94
SP		 1897 return 0;
1898
5fb379ee
SP		 1899rx_qs_destroy:
1900 be_rx_queues_destroy(adapter);
6b7c5b94
SP		 1901tx_qs_destroy:
1902 be_tx_queues_destroy(adapter);
1903if_destroy:
ba343c77
SB		 1904 for (vf = 0; vf < num_vfs; vf++)
1905 if (adapter->vf_if_handle[vf])
1906 be_cmd_if_destroy(adapter, adapter->vf_if_handle[vf]);
8788fdc2 1907 be_cmd_if_destroy(adapter, adapter->if_handle);
6b7c5b94
SP		 1908do_none:
1909 return status;
1910}
1911
5fb379ee
SP		 1912static int be_clear(struct be_adapter *adapter)
1913{
1a8887d8 1914 be_mcc_queues_destroy(adapter);
5fb379ee
SP		 1915 be_rx_queues_destroy(adapter);
1916 be_tx_queues_destroy(adapter);
1917
8788fdc2 1918 be_cmd_if_destroy(adapter, adapter->if_handle);
5fb379ee 1919
2243e2e9
SP		 1920 /* tell fw we're done with firing cmds */
1921 be_cmd_fw_clean(adapter);
5fb379ee
SP		 1922 return 0;
1923}
1924
6b7c5b94
SP		 1925static int be_close(struct net_device *netdev)
1926{
1927 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1928 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1929 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1930 int vec;
1931
b305be78 1932 cancel_delayed_work_sync(&adapter->work);
6b7c5b94 1933
7a1e9b20
SP		 1934 be_async_mcc_disable(adapter);
1935
6b7c5b94
SP		 1936 netif_stop_queue(netdev);
1937 netif_carrier_off(netdev);
a8f447bd 1938 adapter->link_up = false;
6b7c5b94 1939
8788fdc2 1940 be_intr_set(adapter, false);
6b7c5b94
SP		 1941
1942 if (adapter->msix_enabled) {
1943 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1944 synchronize_irq(vec);
1945 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1946 synchronize_irq(vec);
1947 } else {
1948 synchronize_irq(netdev->irq);
1949 }
1950 be_irq_unregister(adapter);
1951
1952 napi_disable(&rx_eq->napi);
1953 napi_disable(&tx_eq->napi);
1954
a8e9179a
SP		 1955 /* Wait for all pending tx completions to arrive so that
1956 * all tx skbs are freed.
1957 */
1958 be_tx_compl_clean(adapter);
1959
6b7c5b94
SP		 1960 return 0;
1961}
1962
84517482
AK		 1963#define FW_FILE_HDR_SIGN "ServerEngines Corp. "
1964char flash_cookie[2][16] = {"*** SE FLAS",
1965 "H DIRECTORY *** "};
fa9a6fed
SB		 1966
1967static bool be_flash_redboot(struct be_adapter *adapter,
3f0d4560
AK		 1968 const u8 *p, u32 img_start, int image_size,
1969 int hdr_size)
fa9a6fed
SB		 1970{
1971 u32 crc_offset;
1972 u8 flashed_crc[4];
1973 int status;
3f0d4560
AK		 1974
1975 crc_offset = hdr_size + img_start + image_size - 4;
1976
fa9a6fed 1977 p += crc_offset;
3f0d4560
AK		 1978
1979 status = be_cmd_get_flash_crc(adapter, flashed_crc,
1980 (img_start + image_size - 4));
fa9a6fed
SB		 1981 if (status) {
1982 dev_err(&adapter->pdev->dev,
1983 "could not get crc from flash, not flashing redboot\n");
1984 return false;
1985 }
1986
1987 /*update redboot only if crc does not match*/
1988 if (!memcmp(flashed_crc, p, 4))
1989 return false;
1990 else
1991 return true;
fa9a6fed
SB		 1992}
1993
3f0d4560 1994static int be_flash_data(struct be_adapter *adapter,
84517482 1995 const struct firmware *fw,
3f0d4560
AK		 1996 struct be_dma_mem *flash_cmd, int num_of_images)
1997
84517482 1998{
3f0d4560
AK		 1999 int status = 0, i, filehdr_size = 0;
2000 u32 total_bytes = 0, flash_op;
84517482
AK		 2001 int num_bytes;
2002 const u8 *p = fw->data;
2003 struct be_cmd_write_flashrom *req = flash_cmd->va;
3f0d4560 2004 struct flash_comp *pflashcomp;
9fe96934 2005 int num_comp;
3f0d4560 2006
9fe96934 2007 struct flash_comp gen3_flash_types[9] = {
3f0d4560
AK		 2008 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
2009 FLASH_IMAGE_MAX_SIZE_g3},
2010 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
2011 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
2012 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
2013 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2014 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
2015 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2016 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
2017 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2018 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
2019 FLASH_IMAGE_MAX_SIZE_g3},
2020 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
2021 FLASH_IMAGE_MAX_SIZE_g3},
2022 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
9fe96934
SB		 2023 FLASH_IMAGE_MAX_SIZE_g3},
2024 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
2025 FLASH_NCSI_IMAGE_MAX_SIZE_g3}
3f0d4560
AK		 2026 };
2027 struct flash_comp gen2_flash_types[8] = {
2028 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
2029 FLASH_IMAGE_MAX_SIZE_g2},
2030 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
2031 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
2032 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
2033 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2034 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
2035 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2036 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
2037 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2038 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
2039 FLASH_IMAGE_MAX_SIZE_g2},
2040 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
2041 FLASH_IMAGE_MAX_SIZE_g2},
2042 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
2043 FLASH_IMAGE_MAX_SIZE_g2}
2044 };
2045
2046 if (adapter->generation == BE_GEN3) {
2047 pflashcomp = gen3_flash_types;
2048 filehdr_size = sizeof(struct flash_file_hdr_g3);
9fe96934 2049 num_comp = 9;
3f0d4560
AK		 2050 } else {
2051 pflashcomp = gen2_flash_types;
2052 filehdr_size = sizeof(struct flash_file_hdr_g2);
9fe96934 2053 num_comp = 8;
84517482 2054 }
9fe96934
SB		 2055 for (i = 0; i < num_comp; i++) {
2056 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
2057 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
2058 continue;
3f0d4560
AK		 2059 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
2060 (!be_flash_redboot(adapter, fw->data,
2061 pflashcomp[i].offset, pflashcomp[i].size,
2062 filehdr_size)))
2063 continue;
2064 p = fw->data;
2065 p += filehdr_size + pflashcomp[i].offset
2066 + (num_of_images * sizeof(struct image_hdr));
2067 if (p + pflashcomp[i].size > fw->data + fw->size)
84517482 2068 return -1;
3f0d4560
AK		 2069 total_bytes = pflashcomp[i].size;
2070 while (total_bytes) {
2071 if (total_bytes > 32*1024)
2072 num_bytes = 32*1024;
2073 else
2074 num_bytes = total_bytes;
2075 total_bytes -= num_bytes;
2076
2077 if (!total_bytes)
2078 flash_op = FLASHROM_OPER_FLASH;
2079 else
2080 flash_op = FLASHROM_OPER_SAVE;
2081 memcpy(req->params.data_buf, p, num_bytes);
2082 p += num_bytes;
2083 status = be_cmd_write_flashrom(adapter, flash_cmd,
2084 pflashcomp[i].optype, flash_op, num_bytes);
2085 if (status) {
2086 dev_err(&adapter->pdev->dev,
2087 "cmd to write to flash rom failed.\n");
2088 return -1;
2089 }
2090 yield();
84517482 2091 }
84517482 2092 }
84517482
AK		 2093 return 0;
2094}
2095
3f0d4560
AK		 2096static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
2097{
2098 if (fhdr == NULL)
2099 return 0;
2100 if (fhdr->build[0] == '3')
2101 return BE_GEN3;
2102 else if (fhdr->build[0] == '2')
2103 return BE_GEN2;
2104 else
2105 return 0;
2106}
2107
84517482
AK		 2108int be_load_fw(struct be_adapter *adapter, u8 *func)
2109{
2110 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
2111 const struct firmware *fw;
3f0d4560
AK		 2112 struct flash_file_hdr_g2 *fhdr;
2113 struct flash_file_hdr_g3 *fhdr3;
2114 struct image_hdr *img_hdr_ptr = NULL;
84517482 2115 struct be_dma_mem flash_cmd;
3f0d4560 2116 int status, i = 0;
84517482 2117 const u8 *p;
84517482 2118
84517482
AK		 2119 strcpy(fw_file, func);
2120
2121 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
2122 if (status)
2123 goto fw_exit;
2124
2125 p = fw->data;
3f0d4560 2126 fhdr = (struct flash_file_hdr_g2 *) p;
84517482
AK		 2127 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
2128
84517482
AK		 2129 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
2130 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
2131 &flash_cmd.dma);
2132 if (!flash_cmd.va) {
2133 status = -ENOMEM;
2134 dev_err(&adapter->pdev->dev,
2135 "Memory allocation failure while flashing\n");
2136 goto fw_exit;
2137 }
2138
3f0d4560
AK		 2139 if ((adapter->generation == BE_GEN3) &&
2140 (get_ufigen_type(fhdr) == BE_GEN3)) {
2141 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
2142 for (i = 0; i < fhdr3->num_imgs; i++) {
2143 img_hdr_ptr = (struct image_hdr *) (fw->data +
2144 (sizeof(struct flash_file_hdr_g3) +
2145 i * sizeof(struct image_hdr)));
2146 if (img_hdr_ptr->imageid == 1) {
2147 status = be_flash_data(adapter, fw,
2148 &flash_cmd, fhdr3->num_imgs);
2149 }
2150
2151 }
2152 } else if ((adapter->generation == BE_GEN2) &&
2153 (get_ufigen_type(fhdr) == BE_GEN2)) {
2154 status = be_flash_data(adapter, fw, &flash_cmd, 0);
2155 } else {
2156 dev_err(&adapter->pdev->dev,
2157 "UFI and Interface are not compatible for flashing\n");
2158 status = -1;
84517482
AK		 2159 }
2160
2161 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
2162 flash_cmd.dma);
2163 if (status) {
2164 dev_err(&adapter->pdev->dev, "Firmware load error\n");
2165 goto fw_exit;
2166 }
2167
af901ca1 2168 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
84517482
AK		 2169
2170fw_exit:
2171 release_firmware(fw);
2172 return status;
2173}
2174
6b7c5b94
SP		 2175static struct net_device_ops be_netdev_ops = {
2176 .ndo_open = be_open,
2177 .ndo_stop = be_close,
2178 .ndo_start_xmit = be_xmit,
2179 .ndo_get_stats = be_get_stats,
2180 .ndo_set_rx_mode = be_set_multicast_list,
2181 .ndo_set_mac_address = be_mac_addr_set,
2182 .ndo_change_mtu = be_change_mtu,
2183 .ndo_validate_addr = eth_validate_addr,
2184 .ndo_vlan_rx_register = be_vlan_register,
2185 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2186 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
ba343c77 2187 .ndo_set_vf_mac = be_set_vf_mac
6b7c5b94
SP		 2188};
2189
2190static void be_netdev_init(struct net_device *netdev)
2191{
2192 struct be_adapter *adapter = netdev_priv(netdev);
2193
2194 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
583e3f34
AK		 2195 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
2196 NETIF_F_GRO;
6b7c5b94 2197
51c59870
AK		 2198 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2199
6b7c5b94
SP		 2200 netdev->flags |= IFF_MULTICAST;
2201
728a9972
AK		 2202 adapter->rx_csum = true;
2203
9e90c961
AK		 2204 /* Default settings for Rx and Tx flow control */
2205 adapter->rx_fc = true;
2206 adapter->tx_fc = true;
2207
c190e3c8
AK		 2208 netif_set_gso_max_size(netdev, 65535);
2209
6b7c5b94
SP		 2210 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2211
2212 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2213
6b7c5b94
SP		 2214 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
2215 BE_NAPI_WEIGHT);
5fb379ee 2216 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
6b7c5b94
SP		 2217 BE_NAPI_WEIGHT);
2218
2219 netif_carrier_off(netdev);
2220 netif_stop_queue(netdev);
2221}
2222
2223static void be_unmap_pci_bars(struct be_adapter *adapter)
2224{
8788fdc2
SP		 2225 if (adapter->csr)
2226 iounmap(adapter->csr);
2227 if (adapter->db)
2228 iounmap(adapter->db);
ba343c77 2229 if (adapter->pcicfg && be_physfn(adapter))
8788fdc2 2230 iounmap(adapter->pcicfg);
6b7c5b94
SP		 2231}
2232
2233static int be_map_pci_bars(struct be_adapter *adapter)
2234{
2235 u8 __iomem *addr;
ba343c77 2236 int pcicfg_reg, db_reg;
6b7c5b94 2237
ba343c77
SB		 2238 if (be_physfn(adapter)) {
2239 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2240 pci_resource_len(adapter->pdev, 2));
2241 if (addr == NULL)
2242 return -ENOMEM;
2243 adapter->csr = addr;
2244 }
6b7c5b94 2245
ba343c77 2246 if (adapter->generation == BE_GEN2) {
7b139c83 2247 pcicfg_reg = 1;
ba343c77
SB		 2248 db_reg = 4;
2249 } else {
7b139c83 2250 pcicfg_reg = 0;
ba343c77
SB		 2251 if (be_physfn(adapter))
2252 db_reg = 4;
2253 else
2254 db_reg = 0;
2255 }
2256 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
2257 pci_resource_len(adapter->pdev, db_reg));
6b7c5b94
SP		 2258 if (addr == NULL)
2259 goto pci_map_err;
ba343c77
SB		 2260 adapter->db = addr;
2261
2262 if (be_physfn(adapter)) {
2263 addr = ioremap_nocache(
2264 pci_resource_start(adapter->pdev, pcicfg_reg),
2265 pci_resource_len(adapter->pdev, pcicfg_reg));
2266 if (addr == NULL)
2267 goto pci_map_err;
2268 adapter->pcicfg = addr;
2269 } else
2270 adapter->pcicfg = adapter->db + SRIOV_VF_PCICFG_OFFSET;
6b7c5b94
SP		 2271
2272 return 0;
2273pci_map_err:
2274 be_unmap_pci_bars(adapter);
2275 return -ENOMEM;
2276}
2277
2278
2279static void be_ctrl_cleanup(struct be_adapter *adapter)
2280{
8788fdc2 2281 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
6b7c5b94
SP		 2282
2283 be_unmap_pci_bars(adapter);
2284
2285 if (mem->va)
2286 pci_free_consistent(adapter->pdev, mem->size,
2287 mem->va, mem->dma);
e7b909a6
SP		 2288
2289 mem = &adapter->mc_cmd_mem;
2290 if (mem->va)
2291 pci_free_consistent(adapter->pdev, mem->size,
2292 mem->va, mem->dma);
6b7c5b94
SP		 2293}
2294
6b7c5b94
SP		 2295static int be_ctrl_init(struct be_adapter *adapter)
2296{
8788fdc2
SP		 2297 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2298 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
e7b909a6 2299 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
6b7c5b94 2300 int status;
6b7c5b94
SP		 2301
2302 status = be_map_pci_bars(adapter);
2303 if (status)
e7b909a6 2304 goto done;
6b7c5b94
SP		 2305
2306 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2307 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2308 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2309 if (!mbox_mem_alloc->va) {
e7b909a6
SP		 2310 status = -ENOMEM;
2311 goto unmap_pci_bars;
6b7c5b94 2312 }
e7b909a6 2313
6b7c5b94
SP		 2314 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2315 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2316 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2317 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
e7b909a6
SP		 2318
2319 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2320 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2321 &mc_cmd_mem->dma);
2322 if (mc_cmd_mem->va == NULL) {
2323 status = -ENOMEM;
2324 goto free_mbox;
2325 }
2326 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2327
8788fdc2
SP		 2328 spin_lock_init(&adapter->mbox_lock);
2329 spin_lock_init(&adapter->mcc_lock);
2330 spin_lock_init(&adapter->mcc_cq_lock);
a8f447bd 2331
cf588477 2332 pci_save_state(adapter->pdev);
6b7c5b94 2333 return 0;
e7b909a6
SP		 2334
2335free_mbox:
2336 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2337 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2338
2339unmap_pci_bars:
2340 be_unmap_pci_bars(adapter);
2341
2342done:
2343 return status;
6b7c5b94
SP		 2344}
2345
2346static void be_stats_cleanup(struct be_adapter *adapter)
2347{
2348 struct be_stats_obj *stats = &adapter->stats;
2349 struct be_dma_mem *cmd = &stats->cmd;
2350
2351 if (cmd->va)
2352 pci_free_consistent(adapter->pdev, cmd->size,
2353 cmd->va, cmd->dma);
2354}
2355
2356static int be_stats_init(struct be_adapter *adapter)
2357{
2358 struct be_stats_obj *stats = &adapter->stats;
2359 struct be_dma_mem *cmd = &stats->cmd;
2360
2361 cmd->size = sizeof(struct be_cmd_req_get_stats);
2362 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2363 if (cmd->va == NULL)
2364 return -1;
d291b9af 2365 memset(cmd->va, 0, cmd->size);
6b7c5b94
SP		 2366 return 0;
2367}
2368
2369static void __devexit be_remove(struct pci_dev *pdev)
2370{
2371 struct be_adapter *adapter = pci_get_drvdata(pdev);
8d56ff11 2372
6b7c5b94
SP		 2373 if (!adapter)
2374 return;
2375
2376 unregister_netdev(adapter->netdev);
2377
5fb379ee
SP		 2378 be_clear(adapter);
2379
6b7c5b94
SP		 2380 be_stats_cleanup(adapter);
2381
2382 be_ctrl_cleanup(adapter);
2383
ba343c77
SB		 2384 be_sriov_disable(adapter);
2385
8d56ff11 2386 be_msix_disable(adapter);
6b7c5b94
SP		 2387
2388 pci_set_drvdata(pdev, NULL);
2389 pci_release_regions(pdev);
2390 pci_disable_device(pdev);
2391
2392 free_netdev(adapter->netdev);
2393}
2394
2243e2e9 2395static int be_get_config(struct be_adapter *adapter)
6b7c5b94 2396{
6b7c5b94 2397 int status;
2243e2e9 2398 u8 mac[ETH_ALEN];
6b7c5b94 2399
2243e2e9 2400 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
6b7c5b94
SP		 2401 if (status)
2402 return status;
2403
2243e2e9
SP		 2404 status = be_cmd_query_fw_cfg(adapter,
2405 &adapter->port_num, &adapter->cap);
43a04fdc
SP		 2406 if (status)
2407 return status;
2408
2243e2e9 2409 memset(mac, 0, ETH_ALEN);
ba343c77
SB		 2410
2411 if (be_physfn(adapter)) {
2412 status = be_cmd_mac_addr_query(adapter, mac,
2243e2e9 2413 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
ca9e4988 2414
ba343c77
SB		 2415 if (status)
2416 return status;
ca9e4988 2417
ba343c77
SB		 2418 if (!is_valid_ether_addr(mac))
2419 return -EADDRNOTAVAIL;
2420
2421 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2422 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2423 }
6b7c5b94 2424
82903e4b
AK		 2425 if (adapter->cap & 0x400)
2426 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
2427 else
2428 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
2429
2243e2e9 2430 return 0;
6b7c5b94
SP		 2431}
2432
2433static int __devinit be_probe(struct pci_dev *pdev,
2434 const struct pci_device_id *pdev_id)
2435{
2436 int status = 0;
2437 struct be_adapter *adapter;
2438 struct net_device *netdev;
6b7c5b94 2439
ba343c77 2440
6b7c5b94
SP		 2441 status = pci_enable_device(pdev);
2442 if (status)
2443 goto do_none;
2444
2445 status = pci_request_regions(pdev, DRV_NAME);
2446 if (status)
2447 goto disable_dev;
2448 pci_set_master(pdev);
2449
2450 netdev = alloc_etherdev(sizeof(struct be_adapter));
2451 if (netdev == NULL) {
2452 status = -ENOMEM;
2453 goto rel_reg;
2454 }
2455 adapter = netdev_priv(netdev);
7b139c83
AK		 2456
2457 switch (pdev->device) {
2458 case BE_DEVICE_ID1:
2459 case OC_DEVICE_ID1:
2460 adapter->generation = BE_GEN2;
2461 break;
2462 case BE_DEVICE_ID2:
2463 case OC_DEVICE_ID2:
2464 adapter->generation = BE_GEN3;
2465 break;
2466 default:
2467 adapter->generation = 0;
2468 }
2469
6b7c5b94
SP		 2470 adapter->pdev = pdev;
2471 pci_set_drvdata(pdev, adapter);
2472 adapter->netdev = netdev;
2243e2e9
SP		 2473 be_netdev_init(netdev);
2474 SET_NETDEV_DEV(netdev, &pdev->dev);
6b7c5b94
SP		 2475
2476 be_msix_enable(adapter);
2477
e930438c 2478 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
6b7c5b94
SP		 2479 if (!status) {
2480 netdev->features |= NETIF_F_HIGHDMA;
2481 } else {
e930438c 2482 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6b7c5b94
SP		 2483 if (status) {
2484 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2485 goto free_netdev;
2486 }
2487 }
2488
ba343c77
SB		 2489 be_sriov_enable(adapter);
2490
6b7c5b94
SP		 2491 status = be_ctrl_init(adapter);
2492 if (status)
2493 goto free_netdev;
2494
2243e2e9 2495 /* sync up with fw's ready state */
ba343c77
SB		 2496 if (be_physfn(adapter)) {
2497 status = be_cmd_POST(adapter);
2498 if (status)
2499 goto ctrl_clean;
2500
2501 status = be_cmd_reset_function(adapter);
2502 if (status)
2503 goto ctrl_clean;
2504 }
6b7c5b94 2505
2243e2e9
SP		 2506 /* tell fw we're ready to fire cmds */
2507 status = be_cmd_fw_init(adapter);
6b7c5b94 2508 if (status)
2243e2e9
SP		 2509 goto ctrl_clean;
2510
2243e2e9
SP		 2511 status = be_stats_init(adapter);
2512 if (status)
2513 goto ctrl_clean;
2514
2515 status = be_get_config(adapter);
6b7c5b94
SP		 2516 if (status)
2517 goto stats_clean;
6b7c5b94
SP		 2518
2519 INIT_DELAYED_WORK(&adapter->work, be_worker);
6b7c5b94 2520
5fb379ee
SP		 2521 status = be_setup(adapter);
2522 if (status)
2523 goto stats_clean;
2243e2e9 2524
6b7c5b94
SP		 2525 status = register_netdev(netdev);
2526 if (status != 0)
5fb379ee 2527 goto unsetup;
6b7c5b94 2528
c4ca2374 2529 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
6b7c5b94
SP		 2530 return 0;
2531
5fb379ee
SP		 2532unsetup:
2533 be_clear(adapter);
6b7c5b94
SP		 2534stats_clean:
2535 be_stats_cleanup(adapter);
2536ctrl_clean:
2537 be_ctrl_cleanup(adapter);
2538free_netdev:
8d56ff11 2539 be_msix_disable(adapter);
ba343c77 2540 be_sriov_disable(adapter);
6b7c5b94 2541 free_netdev(adapter->netdev);
8d56ff11 2542 pci_set_drvdata(pdev, NULL);
6b7c5b94
SP		 2543rel_reg:
2544 pci_release_regions(pdev);
2545disable_dev:
2546 pci_disable_device(pdev);
2547do_none:
c4ca2374 2548 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
6b7c5b94
SP		 2549 return status;
2550}
2551
2552static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2553{
2554 struct be_adapter *adapter = pci_get_drvdata(pdev);
2555 struct net_device *netdev = adapter->netdev;
2556
71d8d1b5
AK		 2557 if (adapter->wol)
2558 be_setup_wol(adapter, true);
2559
6b7c5b94
SP		 2560 netif_device_detach(netdev);
2561 if (netif_running(netdev)) {
2562 rtnl_lock();
2563 be_close(netdev);
2564 rtnl_unlock();
2565 }
9e90c961 2566 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
9b0365f1 2567 be_clear(adapter);
6b7c5b94
SP		 2568
2569 pci_save_state(pdev);
2570 pci_disable_device(pdev);
2571 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2572 return 0;
2573}
2574
2575static int be_resume(struct pci_dev *pdev)
2576{
2577 int status = 0;
2578 struct be_adapter *adapter = pci_get_drvdata(pdev);
2579 struct net_device *netdev = adapter->netdev;
2580
2581 netif_device_detach(netdev);
2582
2583 status = pci_enable_device(pdev);
2584 if (status)
2585 return status;
2586
2587 pci_set_power_state(pdev, 0);
2588 pci_restore_state(pdev);
2589
2243e2e9
SP		 2590 /* tell fw we're ready to fire cmds */
2591 status = be_cmd_fw_init(adapter);
2592 if (status)
2593 return status;
2594
9b0365f1 2595 be_setup(adapter);
6b7c5b94
SP		 2596 if (netif_running(netdev)) {
2597 rtnl_lock();
2598 be_open(netdev);
2599 rtnl_unlock();
2600 }
2601 netif_device_attach(netdev);
71d8d1b5
AK		 2602
2603 if (adapter->wol)
2604 be_setup_wol(adapter, false);
6b7c5b94
SP		 2605 return 0;
2606}
2607
82456b03
SP		 2608/*
2609 * An FLR will stop BE from DMAing any data.
2610 */
2611static void be_shutdown(struct pci_dev *pdev)
2612{
2613 struct be_adapter *adapter = pci_get_drvdata(pdev);
2614 struct net_device *netdev = adapter->netdev;
2615
2616 netif_device_detach(netdev);
2617
2618 be_cmd_reset_function(adapter);
2619
2620 if (adapter->wol)
2621 be_setup_wol(adapter, true);
2622
2623 pci_disable_device(pdev);
2624
2625 return;
2626}
2627
cf588477
SP		 2628static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
2629 pci_channel_state_t state)
2630{
2631 struct be_adapter *adapter = pci_get_drvdata(pdev);
2632 struct net_device *netdev = adapter->netdev;
2633
2634 dev_err(&adapter->pdev->dev, "EEH error detected\n");
2635
2636 adapter->eeh_err = true;
2637
2638 netif_device_detach(netdev);
2639
2640 if (netif_running(netdev)) {
2641 rtnl_lock();
2642 be_close(netdev);
2643 rtnl_unlock();
2644 }
2645 be_clear(adapter);
2646
2647 if (state == pci_channel_io_perm_failure)
2648 return PCI_ERS_RESULT_DISCONNECT;
2649
2650 pci_disable_device(pdev);
2651
2652 return PCI_ERS_RESULT_NEED_RESET;
2653}
2654
2655static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
2656{
2657 struct be_adapter *adapter = pci_get_drvdata(pdev);
2658 int status;
2659
2660 dev_info(&adapter->pdev->dev, "EEH reset\n");
2661 adapter->eeh_err = false;
2662
2663 status = pci_enable_device(pdev);
2664 if (status)
2665 return PCI_ERS_RESULT_DISCONNECT;
2666
2667 pci_set_master(pdev);
2668 pci_set_power_state(pdev, 0);
2669 pci_restore_state(pdev);
2670
2671 /* Check if card is ok and fw is ready */
2672 status = be_cmd_POST(adapter);
2673 if (status)
2674 return PCI_ERS_RESULT_DISCONNECT;
2675
2676 return PCI_ERS_RESULT_RECOVERED;
2677}
2678
2679static void be_eeh_resume(struct pci_dev *pdev)
2680{
2681 int status = 0;
2682 struct be_adapter *adapter = pci_get_drvdata(pdev);
2683 struct net_device *netdev = adapter->netdev;
2684
2685 dev_info(&adapter->pdev->dev, "EEH resume\n");
2686
2687 pci_save_state(pdev);
2688
2689 /* tell fw we're ready to fire cmds */
2690 status = be_cmd_fw_init(adapter);
2691 if (status)
2692 goto err;
2693
2694 status = be_setup(adapter);
2695 if (status)
2696 goto err;
2697
2698 if (netif_running(netdev)) {
2699 status = be_open(netdev);
2700 if (status)
2701 goto err;
2702 }
2703 netif_device_attach(netdev);
2704 return;
2705err:
2706 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
2707 return;
2708}
2709
2710static struct pci_error_handlers be_eeh_handlers = {
2711 .error_detected = be_eeh_err_detected,
2712 .slot_reset = be_eeh_reset,
2713 .resume = be_eeh_resume,
2714};
2715
6b7c5b94
SP		 2716static struct pci_driver be_driver = {
2717 .name = DRV_NAME,
2718 .id_table = be_dev_ids,
2719 .probe = be_probe,
2720 .remove = be_remove,
2721 .suspend = be_suspend,
cf588477 2722 .resume = be_resume,
82456b03 2723 .shutdown = be_shutdown,
cf588477 2724 .err_handler = &be_eeh_handlers
6b7c5b94
SP		 2725};
2726
2727static int __init be_init_module(void)
2728{
8e95a202
JP		 2729 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
2730 rx_frag_size != 2048) {
6b7c5b94
SP		 2731 printk(KERN_WARNING DRV_NAME
2732 " : Module param rx_frag_size must be 2048/4096/8192."
2733 " Using 2048\n");
2734 rx_frag_size = 2048;
2735 }
6b7c5b94 2736
ba343c77
SB		 2737 if (num_vfs > 32) {
2738 printk(KERN_WARNING DRV_NAME
2739 " : Module param num_vfs must not be greater than 32."
2740 "Using 32\n");
2741 num_vfs = 32;
2742 }
2743
6b7c5b94
SP		 2744 return pci_register_driver(&be_driver);
2745}
2746module_init(be_init_module);
2747
2748static void __exit be_exit_module(void)
2749{
2750 pci_unregister_driver(&be_driver);
2751}
2752module_exit(be_exit_module);
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