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e1000e: enhance frame fragment detection
[net-next-2.6.git] / drivers / net / benet / be_main.c
CommitLineData
6b7c5b94
SP		 1/*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#include "be.h"
8788fdc2 19#include "be_cmds.h"
65f71b8b 20#include <asm/div64.h>
6b7c5b94
SP		 21
22MODULE_VERSION(DRV_VER);
23MODULE_DEVICE_TABLE(pci, be_dev_ids);
24MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25MODULE_AUTHOR("ServerEngines Corporation");
26MODULE_LICENSE("GPL");
27
28static unsigned int rx_frag_size = 2048;
29module_param(rx_frag_size, uint, S_IRUGO);
30MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
31
6b7c5b94 32static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
c4ca2374 33 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
59fd5d87 34 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
c4ca2374
AK		 35 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
36 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
59fd5d87 37 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
6b7c5b94
SP		 38 { 0 }
39};
40MODULE_DEVICE_TABLE(pci, be_dev_ids);
41
42static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
43{
44 struct be_dma_mem *mem = &q->dma_mem;
45 if (mem->va)
46 pci_free_consistent(adapter->pdev, mem->size,
47 mem->va, mem->dma);
48}
49
50static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
51 u16 len, u16 entry_size)
52{
53 struct be_dma_mem *mem = &q->dma_mem;
54
55 memset(q, 0, sizeof(*q));
56 q->len = len;
57 q->entry_size = entry_size;
58 mem->size = len * entry_size;
59 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
60 if (!mem->va)
61 return -1;
62 memset(mem->va, 0, mem->size);
63 return 0;
64}
65
8788fdc2 66static void be_intr_set(struct be_adapter *adapter, bool enable)
6b7c5b94 67{
8788fdc2 68 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
6b7c5b94
SP		 69 u32 reg = ioread32(addr);
70 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e
SP		 71
72 if (!enabled && enable)
6b7c5b94 73 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 74 else if (enabled && !enable)
6b7c5b94 75 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 76 else
6b7c5b94 77 return;
5f0b849e 78
6b7c5b94
SP		 79 iowrite32(reg, addr);
80}
81
8788fdc2 82static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 83{
84 u32 val = 0;
85 val |= qid & DB_RQ_RING_ID_MASK;
86 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
8788fdc2 87 iowrite32(val, adapter->db + DB_RQ_OFFSET);
6b7c5b94
SP		 88}
89
8788fdc2 90static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 91{
92 u32 val = 0;
93 val |= qid & DB_TXULP_RING_ID_MASK;
94 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
8788fdc2 95 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
6b7c5b94
SP		 96}
97
8788fdc2 98static void be_eq_notify(struct be_adapter *adapter, u16 qid,
6b7c5b94
SP		 99 bool arm, bool clear_int, u16 num_popped)
100{
101 u32 val = 0;
102 val |= qid & DB_EQ_RING_ID_MASK;
103 if (arm)
104 val |= 1 << DB_EQ_REARM_SHIFT;
105 if (clear_int)
106 val |= 1 << DB_EQ_CLR_SHIFT;
107 val |= 1 << DB_EQ_EVNT_SHIFT;
108 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
8788fdc2 109 iowrite32(val, adapter->db + DB_EQ_OFFSET);
6b7c5b94
SP		 110}
111
8788fdc2 112void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
6b7c5b94
SP		 113{
114 u32 val = 0;
115 val |= qid & DB_CQ_RING_ID_MASK;
116 if (arm)
117 val |= 1 << DB_CQ_REARM_SHIFT;
118 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
8788fdc2 119 iowrite32(val, adapter->db + DB_CQ_OFFSET);
6b7c5b94
SP		 120}
121
6b7c5b94
SP		 122static int be_mac_addr_set(struct net_device *netdev, void *p)
123{
124 struct be_adapter *adapter = netdev_priv(netdev);
125 struct sockaddr *addr = p;
126 int status = 0;
127
ca9e4988
AK		 128 if (!is_valid_ether_addr(addr->sa_data))
129 return -EADDRNOTAVAIL;
130
a65027e4
SP		 131 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
132 if (status)
133 return status;
6b7c5b94 134
a65027e4
SP		 135 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
136 adapter->if_handle, &adapter->pmac_id);
6b7c5b94
SP		 137 if (!status)
138 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
139
140 return status;
141}
142
b31c50a7 143void netdev_stats_update(struct be_adapter *adapter)
6b7c5b94
SP		 144{
145 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
146 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
147 struct be_port_rxf_stats *port_stats =
148 &rxf_stats->port[adapter->port_num];
78122a52 149 struct net_device_stats *dev_stats = &adapter->netdev->stats;
68110868 150 struct be_erx_stats *erx_stats = &hw_stats->erx;
6b7c5b94
SP		 151
152 dev_stats->rx_packets = port_stats->rx_total_frames;
153 dev_stats->tx_packets = port_stats->tx_unicastframes +
154 port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
155 dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
156 (u64) port_stats->rx_bytes_lsd;
157 dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
158 (u64) port_stats->tx_bytes_lsd;
159
160 /* bad pkts received */
161 dev_stats->rx_errors = port_stats->rx_crc_errors +
162 port_stats->rx_alignment_symbol_errors +
163 port_stats->rx_in_range_errors +
68110868
SP		 164 port_stats->rx_out_range_errors +
165 port_stats->rx_frame_too_long +
166 port_stats->rx_dropped_too_small +
167 port_stats->rx_dropped_too_short +
168 port_stats->rx_dropped_header_too_small +
169 port_stats->rx_dropped_tcp_length +
170 port_stats->rx_dropped_runt +
171 port_stats->rx_tcp_checksum_errs +
172 port_stats->rx_ip_checksum_errs +
173 port_stats->rx_udp_checksum_errs;
174
175 /* no space in linux buffers: best possible approximation */
01ed30da
SP		 176 dev_stats->rx_dropped =
177 erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
6b7c5b94
SP		 178
179 /* detailed rx errors */
180 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
68110868
SP		 181 port_stats->rx_out_range_errors +
182 port_stats->rx_frame_too_long;
183
6b7c5b94
SP		 184 /* receive ring buffer overflow */
185 dev_stats->rx_over_errors = 0;
68110868 186
6b7c5b94
SP		 187 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
188
189 /* frame alignment errors */
190 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
68110868 191
6b7c5b94
SP		 192 /* receiver fifo overrun */
193 /* drops_no_pbuf is no per i/f, it's per BE card */
194 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
195 port_stats->rx_input_fifo_overflow +
196 rxf_stats->rx_drops_no_pbuf;
197 /* receiver missed packetd */
198 dev_stats->rx_missed_errors = 0;
68110868
SP		 199
200 /* packet transmit problems */
201 dev_stats->tx_errors = 0;
202
203 /* no space available in linux */
204 dev_stats->tx_dropped = 0;
205
c5b9b92e 206 dev_stats->multicast = port_stats->rx_multicast_frames;
68110868
SP		 207 dev_stats->collisions = 0;
208
6b7c5b94
SP		 209 /* detailed tx_errors */
210 dev_stats->tx_aborted_errors = 0;
211 dev_stats->tx_carrier_errors = 0;
212 dev_stats->tx_fifo_errors = 0;
213 dev_stats->tx_heartbeat_errors = 0;
214 dev_stats->tx_window_errors = 0;
215}
216
8788fdc2 217void be_link_status_update(struct be_adapter *adapter, bool link_up)
6b7c5b94 218{
6b7c5b94
SP		 219 struct net_device *netdev = adapter->netdev;
220
6b7c5b94 221 /* If link came up or went down */
a8f447bd 222 if (adapter->link_up != link_up) {
0dffc83e 223 adapter->link_speed = -1;
a8f447bd 224 if (link_up) {
6b7c5b94
SP		 225 netif_start_queue(netdev);
226 netif_carrier_on(netdev);
227 printk(KERN_INFO "%s: Link up\n", netdev->name);
a8f447bd
SP		 228 } else {
229 netif_stop_queue(netdev);
230 netif_carrier_off(netdev);
231 printk(KERN_INFO "%s: Link down\n", netdev->name);
6b7c5b94 232 }
a8f447bd 233 adapter->link_up = link_up;
6b7c5b94 234 }
6b7c5b94
SP		 235}
236
237/* Update the EQ delay n BE based on the RX frags consumed / sec */
238static void be_rx_eqd_update(struct be_adapter *adapter)
239{
6b7c5b94
SP		 240 struct be_eq_obj *rx_eq = &adapter->rx_eq;
241 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
4097f663
SP		 242 ulong now = jiffies;
243 u32 eqd;
244
245 if (!rx_eq->enable_aic)
246 return;
247
248 /* Wrapped around */
249 if (time_before(now, stats->rx_fps_jiffies)) {
250 stats->rx_fps_jiffies = now;
251 return;
252 }
6b7c5b94
SP		 253
254 /* Update once a second */
4097f663 255 if ((now - stats->rx_fps_jiffies) < HZ)
6b7c5b94
SP		 256 return;
257
258 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
4097f663 259 ((now - stats->rx_fps_jiffies) / HZ);
6b7c5b94 260
4097f663 261 stats->rx_fps_jiffies = now;
6b7c5b94
SP		 262 stats->be_prev_rx_frags = stats->be_rx_frags;
263 eqd = stats->be_rx_fps / 110000;
264 eqd = eqd << 3;
265 if (eqd > rx_eq->max_eqd)
266 eqd = rx_eq->max_eqd;
267 if (eqd < rx_eq->min_eqd)
268 eqd = rx_eq->min_eqd;
269 if (eqd < 10)
270 eqd = 0;
271 if (eqd != rx_eq->cur_eqd)
8788fdc2 272 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
6b7c5b94
SP		 273
274 rx_eq->cur_eqd = eqd;
275}
276
6b7c5b94
SP		 277static struct net_device_stats *be_get_stats(struct net_device *dev)
278{
78122a52 279 return &dev->stats;
6b7c5b94
SP		 280}
281
65f71b8b
SH		 282static u32 be_calc_rate(u64 bytes, unsigned long ticks)
283{
284 u64 rate = bytes;
285
286 do_div(rate, ticks / HZ);
287 rate <<= 3; /* bytes/sec -> bits/sec */
288 do_div(rate, 1000000ul); /* MB/Sec */
289
290 return rate;
291}
292
4097f663
SP		 293static void be_tx_rate_update(struct be_adapter *adapter)
294{
295 struct be_drvr_stats *stats = drvr_stats(adapter);
296 ulong now = jiffies;
297
298 /* Wrapped around? */
299 if (time_before(now, stats->be_tx_jiffies)) {
300 stats->be_tx_jiffies = now;
301 return;
302 }
303
304 /* Update tx rate once in two seconds */
305 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
65f71b8b
SH		 306 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
307 - stats->be_tx_bytes_prev,
308 now - stats->be_tx_jiffies);
4097f663
SP		 309 stats->be_tx_jiffies = now;
310 stats->be_tx_bytes_prev = stats->be_tx_bytes;
311 }
312}
313
6b7c5b94
SP		 314static void be_tx_stats_update(struct be_adapter *adapter,
315 u32 wrb_cnt, u32 copied, bool stopped)
316{
4097f663 317 struct be_drvr_stats *stats = drvr_stats(adapter);
6b7c5b94
SP		 318 stats->be_tx_reqs++;
319 stats->be_tx_wrbs += wrb_cnt;
320 stats->be_tx_bytes += copied;
321 if (stopped)
322 stats->be_tx_stops++;
6b7c5b94
SP		 323}
324
325/* Determine number of WRB entries needed to xmit data in an skb */
326static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
327{
ebc8d2ab
DM		 328 int cnt = (skb->len > skb->data_len);
329
330 cnt += skb_shinfo(skb)->nr_frags;
331
6b7c5b94
SP		 332 /* to account for hdr wrb */
333 cnt++;
334 if (cnt & 1) {
335 /* add a dummy to make it an even num */
336 cnt++;
337 *dummy = true;
338 } else
339 *dummy = false;
340 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
341 return cnt;
342}
343
344static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
345{
346 wrb->frag_pa_hi = upper_32_bits(addr);
347 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
348 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
349}
350
351static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
352 bool vlan, u32 wrb_cnt, u32 len)
353{
354 memset(hdr, 0, sizeof(*hdr));
355
356 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
357
358 if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
359 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
360 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
361 hdr, skb_shinfo(skb)->gso_size);
362 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
363 if (is_tcp_pkt(skb))
364 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
365 else if (is_udp_pkt(skb))
366 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
367 }
368
369 if (vlan && vlan_tx_tag_present(skb)) {
370 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
371 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
372 hdr, vlan_tx_tag_get(skb));
373 }
374
375 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
376 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
377 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
378 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
379}
380
381
382static int make_tx_wrbs(struct be_adapter *adapter,
383 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
384{
385 u64 busaddr;
386 u32 i, copied = 0;
387 struct pci_dev *pdev = adapter->pdev;
388 struct sk_buff *first_skb = skb;
389 struct be_queue_info *txq = &adapter->tx_obj.q;
390 struct be_eth_wrb *wrb;
391 struct be_eth_hdr_wrb *hdr;
392
6b7c5b94 393 hdr = queue_head_node(txq);
c190e3c8 394 atomic_add(wrb_cnt, &txq->used);
6b7c5b94
SP		 395 queue_head_inc(txq);
396
ebc8d2ab
DM		 397 if (skb->len > skb->data_len) {
398 int len = skb->len - skb->data_len;
a73b796e
AD		 399 busaddr = pci_map_single(pdev, skb->data, len,
400 PCI_DMA_TODEVICE);
ebc8d2ab
DM		 401 wrb = queue_head_node(txq);
402 wrb_fill(wrb, busaddr, len);
403 be_dws_cpu_to_le(wrb, sizeof(*wrb));
404 queue_head_inc(txq);
405 copied += len;
406 }
6b7c5b94 407
ebc8d2ab
DM		 408 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
409 struct skb_frag_struct *frag =
410 &skb_shinfo(skb)->frags[i];
a73b796e
AD		 411 busaddr = pci_map_page(pdev, frag->page,
412 frag->page_offset,
413 frag->size, PCI_DMA_TODEVICE);
ebc8d2ab
DM		 414 wrb = queue_head_node(txq);
415 wrb_fill(wrb, busaddr, frag->size);
416 be_dws_cpu_to_le(wrb, sizeof(*wrb));
417 queue_head_inc(txq);
418 copied += frag->size;
6b7c5b94
SP		 419 }
420
421 if (dummy_wrb) {
422 wrb = queue_head_node(txq);
423 wrb_fill(wrb, 0, 0);
424 be_dws_cpu_to_le(wrb, sizeof(*wrb));
425 queue_head_inc(txq);
426 }
427
428 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
429 wrb_cnt, copied);
430 be_dws_cpu_to_le(hdr, sizeof(*hdr));
431
432 return copied;
433}
434
61357325 435static netdev_tx_t be_xmit(struct sk_buff *skb,
b31c50a7 436 struct net_device *netdev)
6b7c5b94
SP		 437{
438 struct be_adapter *adapter = netdev_priv(netdev);
439 struct be_tx_obj *tx_obj = &adapter->tx_obj;
440 struct be_queue_info *txq = &tx_obj->q;
441 u32 wrb_cnt = 0, copied = 0;
442 u32 start = txq->head;
443 bool dummy_wrb, stopped = false;
444
445 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
446
447 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
c190e3c8
AK		 448 if (copied) {
449 /* record the sent skb in the sent_skb table */
450 BUG_ON(tx_obj->sent_skb_list[start]);
451 tx_obj->sent_skb_list[start] = skb;
452
453 /* Ensure txq has space for the next skb; Else stop the queue
454 * *BEFORE* ringing the tx doorbell, so that we serialze the
455 * tx compls of the current transmit which'll wake up the queue
456 */
457 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
458 txq->len) {
459 netif_stop_queue(netdev);
460 stopped = true;
461 }
6b7c5b94 462
c190e3c8 463 be_txq_notify(adapter, txq->id, wrb_cnt);
6b7c5b94 464
c190e3c8
AK		 465 be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
466 } else {
467 txq->head = start;
468 dev_kfree_skb_any(skb);
6b7c5b94 469 }
6b7c5b94
SP		 470 return NETDEV_TX_OK;
471}
472
473static int be_change_mtu(struct net_device *netdev, int new_mtu)
474{
475 struct be_adapter *adapter = netdev_priv(netdev);
476 if (new_mtu < BE_MIN_MTU ||
477 new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
478 dev_info(&adapter->pdev->dev,
479 "MTU must be between %d and %d bytes\n",
480 BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
481 return -EINVAL;
482 }
483 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
484 netdev->mtu, new_mtu);
485 netdev->mtu = new_mtu;
486 return 0;
487}
488
489/*
490 * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
491 * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
492 * set the BE in promiscuous VLAN mode.
493 */
b31c50a7 494static int be_vid_config(struct be_adapter *adapter)
6b7c5b94 495{
6b7c5b94
SP		 496 u16 vtag[BE_NUM_VLANS_SUPPORTED];
497 u16 ntags = 0, i;
b31c50a7 498 int status;
6b7c5b94
SP		 499
500 if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
501 /* Construct VLAN Table to give to HW */
502 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
503 if (adapter->vlan_tag[i]) {
504 vtag[ntags] = cpu_to_le16(i);
505 ntags++;
506 }
507 }
b31c50a7
SP		 508 status = be_cmd_vlan_config(adapter, adapter->if_handle,
509 vtag, ntags, 1, 0);
6b7c5b94 510 } else {
b31c50a7
SP		 511 status = be_cmd_vlan_config(adapter, adapter->if_handle,
512 NULL, 0, 1, 1);
6b7c5b94 513 }
b31c50a7 514 return status;
6b7c5b94
SP		 515}
516
517static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
518{
519 struct be_adapter *adapter = netdev_priv(netdev);
520 struct be_eq_obj *rx_eq = &adapter->rx_eq;
521 struct be_eq_obj *tx_eq = &adapter->tx_eq;
6b7c5b94 522
8788fdc2
SP		 523 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
524 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
6b7c5b94 525 adapter->vlan_grp = grp;
8788fdc2
SP		 526 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
527 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
6b7c5b94
SP		 528}
529
530static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
531{
532 struct be_adapter *adapter = netdev_priv(netdev);
533
534 adapter->num_vlans++;
535 adapter->vlan_tag[vid] = 1;
536
b31c50a7 537 be_vid_config(adapter);
6b7c5b94
SP		 538}
539
540static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
541{
542 struct be_adapter *adapter = netdev_priv(netdev);
543
544 adapter->num_vlans--;
545 adapter->vlan_tag[vid] = 0;
546
547 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
b31c50a7 548 be_vid_config(adapter);
6b7c5b94
SP		 549}
550
24307eef 551static void be_set_multicast_list(struct net_device *netdev)
6b7c5b94
SP		 552{
553 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94 554
24307eef 555 if (netdev->flags & IFF_PROMISC) {
8788fdc2 556 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
24307eef
SP		 557 adapter->promiscuous = true;
558 goto done;
6b7c5b94
SP		 559 }
560
24307eef
SP		 561 /* BE was previously in promiscous mode; disable it */
562 if (adapter->promiscuous) {
563 adapter->promiscuous = false;
8788fdc2 564 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
6b7c5b94
SP		 565 }
566
e7b909a6
SP		 567 /* Enable multicast promisc if num configured exceeds what we support */
568 if (netdev->flags & IFF_ALLMULTI || netdev->mc_count > BE_MAX_MC) {
569 be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
570 &adapter->mc_cmd_mem);
24307eef 571 goto done;
6b7c5b94 572 }
6b7c5b94 573
8788fdc2 574 be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
e7b909a6 575 netdev->mc_count, &adapter->mc_cmd_mem);
24307eef
SP		 576done:
577 return;
6b7c5b94
SP		 578}
579
4097f663 580static void be_rx_rate_update(struct be_adapter *adapter)
6b7c5b94 581{
4097f663
SP		 582 struct be_drvr_stats *stats = drvr_stats(adapter);
583 ulong now = jiffies;
6b7c5b94 584
4097f663
SP		 585 /* Wrapped around */
586 if (time_before(now, stats->be_rx_jiffies)) {
587 stats->be_rx_jiffies = now;
588 return;
589 }
6b7c5b94
SP		 590
591 /* Update the rate once in two seconds */
4097f663 592 if ((now - stats->be_rx_jiffies) < 2 * HZ)
6b7c5b94
SP		 593 return;
594
65f71b8b
SH		 595 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
596 - stats->be_rx_bytes_prev,
597 now - stats->be_rx_jiffies);
4097f663 598 stats->be_rx_jiffies = now;
6b7c5b94
SP		 599 stats->be_rx_bytes_prev = stats->be_rx_bytes;
600}
601
4097f663
SP		 602static void be_rx_stats_update(struct be_adapter *adapter,
603 u32 pktsize, u16 numfrags)
604{
605 struct be_drvr_stats *stats = drvr_stats(adapter);
606
607 stats->be_rx_compl++;
608 stats->be_rx_frags += numfrags;
609 stats->be_rx_bytes += pktsize;
610}
611
728a9972
AK		 612static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
613{
614 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
615
616 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
617 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
618 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
619 if (ip_version) {
620 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
621 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
622 }
623 ipv6_chk = (ip_version && (tcpf || udpf));
624
625 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
626}
627
6b7c5b94
SP		 628static struct be_rx_page_info *
629get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
630{
631 struct be_rx_page_info *rx_page_info;
632 struct be_queue_info *rxq = &adapter->rx_obj.q;
633
634 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
635 BUG_ON(!rx_page_info->page);
636
637 if (rx_page_info->last_page_user)
638 pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
639 adapter->big_page_size, PCI_DMA_FROMDEVICE);
640
641 atomic_dec(&rxq->used);
642 return rx_page_info;
643}
644
645/* Throwaway the data in the Rx completion */
646static void be_rx_compl_discard(struct be_adapter *adapter,
647 struct be_eth_rx_compl *rxcp)
648{
649 struct be_queue_info *rxq = &adapter->rx_obj.q;
650 struct be_rx_page_info *page_info;
651 u16 rxq_idx, i, num_rcvd;
652
653 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
654 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
655
656 for (i = 0; i < num_rcvd; i++) {
657 page_info = get_rx_page_info(adapter, rxq_idx);
658 put_page(page_info->page);
659 memset(page_info, 0, sizeof(*page_info));
660 index_inc(&rxq_idx, rxq->len);
661 }
662}
663
664/*
665 * skb_fill_rx_data forms a complete skb for an ether frame
666 * indicated by rxcp.
667 */
668static void skb_fill_rx_data(struct be_adapter *adapter,
669 struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
670{
671 struct be_queue_info *rxq = &adapter->rx_obj.q;
672 struct be_rx_page_info *page_info;
bd46cb6c 673 u16 rxq_idx, i, num_rcvd, j;
fa77406a 674 u32 pktsize, hdr_len, curr_frag_len, size;
6b7c5b94
SP		 675 u8 *start;
676
677 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
678 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
679 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
680
681 page_info = get_rx_page_info(adapter, rxq_idx);
682
683 start = page_address(page_info->page) + page_info->page_offset;
684 prefetch(start);
685
686 /* Copy data in the first descriptor of this completion */
687 curr_frag_len = min(pktsize, rx_frag_size);
688
689 /* Copy the header portion into skb_data */
690 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
691 memcpy(skb->data, start, hdr_len);
692 skb->len = curr_frag_len;
693 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
694 /* Complete packet has now been moved to data */
695 put_page(page_info->page);
696 skb->data_len = 0;
697 skb->tail += curr_frag_len;
698 } else {
699 skb_shinfo(skb)->nr_frags = 1;
700 skb_shinfo(skb)->frags[0].page = page_info->page;
701 skb_shinfo(skb)->frags[0].page_offset =
702 page_info->page_offset + hdr_len;
703 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
704 skb->data_len = curr_frag_len - hdr_len;
705 skb->tail += hdr_len;
706 }
707 memset(page_info, 0, sizeof(*page_info));
708
709 if (pktsize <= rx_frag_size) {
710 BUG_ON(num_rcvd != 1);
76fbb429 711 goto done;
6b7c5b94
SP		 712 }
713
714 /* More frags present for this completion */
fa77406a 715 size = pktsize;
bd46cb6c 716 for (i = 1, j = 0; i < num_rcvd; i++) {
fa77406a 717 size -= curr_frag_len;
6b7c5b94
SP		 718 index_inc(&rxq_idx, rxq->len);
719 page_info = get_rx_page_info(adapter, rxq_idx);
720
fa77406a 721 curr_frag_len = min(size, rx_frag_size);
6b7c5b94 722
bd46cb6c
AK		 723 /* Coalesce all frags from the same physical page in one slot */
724 if (page_info->page_offset == 0) {
725 /* Fresh page */
726 j++;
727 skb_shinfo(skb)->frags[j].page = page_info->page;
728 skb_shinfo(skb)->frags[j].page_offset =
729 page_info->page_offset;
730 skb_shinfo(skb)->frags[j].size = 0;
731 skb_shinfo(skb)->nr_frags++;
732 } else {
733 put_page(page_info->page);
734 }
735
736 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94
SP		 737 skb->len += curr_frag_len;
738 skb->data_len += curr_frag_len;
6b7c5b94
SP		 739
740 memset(page_info, 0, sizeof(*page_info));
741 }
bd46cb6c 742 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 743
76fbb429 744done:
4097f663 745 be_rx_stats_update(adapter, pktsize, num_rcvd);
6b7c5b94
SP		 746 return;
747}
748
5be93b9a 749/* Process the RX completion indicated by rxcp when GRO is disabled */
6b7c5b94
SP		 750static void be_rx_compl_process(struct be_adapter *adapter,
751 struct be_eth_rx_compl *rxcp)
752{
753 struct sk_buff *skb;
dcb9b564
AK		 754 u32 vlanf, vid;
755 u8 vtm;
6b7c5b94 756
dcb9b564
AK		 757 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
758 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
759
760 /* vlanf could be wrongly set in some cards.
761 * ignore if vtm is not set */
e1187b3b 762 if ((adapter->cap & 0x400) && !vtm)
dcb9b564 763 vlanf = 0;
6b7c5b94 764
89d71a66 765 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
6b7c5b94
SP		 766 if (!skb) {
767 if (net_ratelimit())
768 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
769 be_rx_compl_discard(adapter, rxcp);
770 return;
771 }
772
6b7c5b94
SP		 773 skb_fill_rx_data(adapter, skb, rxcp);
774
728a9972 775 if (do_pkt_csum(rxcp, adapter->rx_csum))
6b7c5b94 776 skb->ip_summed = CHECKSUM_NONE;
728a9972
AK		 777 else
778 skb->ip_summed = CHECKSUM_UNNECESSARY;
6b7c5b94
SP		 779
780 skb->truesize = skb->len + sizeof(struct sk_buff);
781 skb->protocol = eth_type_trans(skb, adapter->netdev);
782 skb->dev = adapter->netdev;
783
dcb9b564 784 if (vlanf) {
6b7c5b94
SP		 785 if (!adapter->vlan_grp || adapter->num_vlans == 0) {
786 kfree_skb(skb);
787 return;
788 }
789 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
790 vid = be16_to_cpu(vid);
791 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
792 } else {
793 netif_receive_skb(skb);
794 }
795
6b7c5b94
SP		 796 return;
797}
798
5be93b9a
AK		 799/* Process the RX completion indicated by rxcp when GRO is enabled */
800static void be_rx_compl_process_gro(struct be_adapter *adapter,
6b7c5b94
SP		 801 struct be_eth_rx_compl *rxcp)
802{
803 struct be_rx_page_info *page_info;
5be93b9a 804 struct sk_buff *skb = NULL;
6b7c5b94 805 struct be_queue_info *rxq = &adapter->rx_obj.q;
5be93b9a 806 struct be_eq_obj *eq_obj = &adapter->rx_eq;
6b7c5b94 807 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
bd46cb6c 808 u16 i, rxq_idx = 0, vid, j;
dcb9b564 809 u8 vtm;
6b7c5b94
SP		 810
811 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
812 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
813 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
814 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
dcb9b564
AK		 815 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
816
817 /* vlanf could be wrongly set in some cards.
818 * ignore if vtm is not set */
e1187b3b 819 if ((adapter->cap & 0x400) && !vtm)
dcb9b564 820 vlanf = 0;
6b7c5b94 821
5be93b9a
AK		 822 skb = napi_get_frags(&eq_obj->napi);
823 if (!skb) {
824 be_rx_compl_discard(adapter, rxcp);
825 return;
826 }
827
6b7c5b94 828 remaining = pkt_size;
bd46cb6c 829 for (i = 0, j = -1; i < num_rcvd; i++) {
6b7c5b94
SP		 830 page_info = get_rx_page_info(adapter, rxq_idx);
831
832 curr_frag_len = min(remaining, rx_frag_size);
833
bd46cb6c
AK		 834 /* Coalesce all frags from the same physical page in one slot */
835 if (i == 0 || page_info->page_offset == 0) {
836 /* First frag or Fresh page */
837 j++;
5be93b9a
AK		 838 skb_shinfo(skb)->frags[j].page = page_info->page;
839 skb_shinfo(skb)->frags[j].page_offset =
840 page_info->page_offset;
841 skb_shinfo(skb)->frags[j].size = 0;
bd46cb6c
AK		 842 } else {
843 put_page(page_info->page);
844 }
5be93b9a 845 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94 846
bd46cb6c 847 remaining -= curr_frag_len;
6b7c5b94 848 index_inc(&rxq_idx, rxq->len);
6b7c5b94
SP		 849 memset(page_info, 0, sizeof(*page_info));
850 }
bd46cb6c 851 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 852
5be93b9a
AK		 853 skb_shinfo(skb)->nr_frags = j + 1;
854 skb->len = pkt_size;
855 skb->data_len = pkt_size;
856 skb->truesize += pkt_size;
857 skb->ip_summed = CHECKSUM_UNNECESSARY;
858
6b7c5b94 859 if (likely(!vlanf)) {
5be93b9a 860 napi_gro_frags(&eq_obj->napi);
6b7c5b94
SP		 861 } else {
862 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
863 vid = be16_to_cpu(vid);
864
865 if (!adapter->vlan_grp || adapter->num_vlans == 0)
866 return;
867
5be93b9a 868 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
6b7c5b94
SP		 869 }
870
4097f663 871 be_rx_stats_update(adapter, pkt_size, num_rcvd);
6b7c5b94
SP		 872 return;
873}
874
875static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
876{
877 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
878
879 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
880 return NULL;
881
882 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
883
6b7c5b94
SP		 884 queue_tail_inc(&adapter->rx_obj.cq);
885 return rxcp;
886}
887
a7a0ef31
SP		 888/* To reset the valid bit, we need to reset the whole word as
889 * when walking the queue the valid entries are little-endian
890 * and invalid entries are host endian
891 */
892static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
893{
894 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
895}
896
6b7c5b94
SP		 897static inline struct page *be_alloc_pages(u32 size)
898{
899 gfp_t alloc_flags = GFP_ATOMIC;
900 u32 order = get_order(size);
901 if (order > 0)
902 alloc_flags |= __GFP_COMP;
903 return alloc_pages(alloc_flags, order);
904}
905
906/*
907 * Allocate a page, split it to fragments of size rx_frag_size and post as
908 * receive buffers to BE
909 */
910static void be_post_rx_frags(struct be_adapter *adapter)
911{
912 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
913 struct be_rx_page_info *page_info = NULL;
914 struct be_queue_info *rxq = &adapter->rx_obj.q;
915 struct page *pagep = NULL;
916 struct be_eth_rx_d *rxd;
917 u64 page_dmaaddr = 0, frag_dmaaddr;
918 u32 posted, page_offset = 0;
919
6b7c5b94
SP		 920 page_info = &page_info_tbl[rxq->head];
921 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
922 if (!pagep) {
923 pagep = be_alloc_pages(adapter->big_page_size);
924 if (unlikely(!pagep)) {
925 drvr_stats(adapter)->be_ethrx_post_fail++;
926 break;
927 }
928 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
929 adapter->big_page_size,
930 PCI_DMA_FROMDEVICE);
931 page_info->page_offset = 0;
932 } else {
933 get_page(pagep);
934 page_info->page_offset = page_offset + rx_frag_size;
935 }
936 page_offset = page_info->page_offset;
937 page_info->page = pagep;
938 pci_unmap_addr_set(page_info, bus, page_dmaaddr);
939 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
940
941 rxd = queue_head_node(rxq);
942 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
943 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
944 queue_head_inc(rxq);
945
946 /* Any space left in the current big page for another frag? */
947 if ((page_offset + rx_frag_size + rx_frag_size) >
948 adapter->big_page_size) {
949 pagep = NULL;
950 page_info->last_page_user = true;
951 }
952 page_info = &page_info_tbl[rxq->head];
953 }
954 if (pagep)
955 page_info->last_page_user = true;
956
957 if (posted) {
6b7c5b94 958 atomic_add(posted, &rxq->used);
8788fdc2 959 be_rxq_notify(adapter, rxq->id, posted);
ea1dae11
SP		 960 } else if (atomic_read(&rxq->used) == 0) {
961 /* Let be_worker replenish when memory is available */
962 adapter->rx_post_starved = true;
6b7c5b94
SP		 963 }
964
965 return;
966}
967
5fb379ee 968static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
6b7c5b94 969{
6b7c5b94
SP		 970 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
971
972 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
973 return NULL;
974
975 be_dws_le_to_cpu(txcp, sizeof(*txcp));
976
977 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
978
979 queue_tail_inc(tx_cq);
980 return txcp;
981}
982
983static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
984{
985 struct be_queue_info *txq = &adapter->tx_obj.q;
a73b796e 986 struct be_eth_wrb *wrb;
6b7c5b94
SP		 987 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
988 struct sk_buff *sent_skb;
a73b796e 989 u64 busaddr;
6b7c5b94
SP		 990 u16 cur_index, num_wrbs = 0;
991
992 cur_index = txq->tail;
993 sent_skb = sent_skbs[cur_index];
994 BUG_ON(!sent_skb);
995 sent_skbs[cur_index] = NULL;
a73b796e
AD		 996 wrb = queue_tail_node(txq);
997 be_dws_le_to_cpu(wrb, sizeof(*wrb));
998 busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
999 if (busaddr != 0) {
1000 pci_unmap_single(adapter->pdev, busaddr,
1001 wrb->frag_len, PCI_DMA_TODEVICE);
1002 }
1003 num_wrbs++;
1004 queue_tail_inc(txq);
6b7c5b94 1005
a73b796e 1006 while (cur_index != last_index) {
6b7c5b94 1007 cur_index = txq->tail;
a73b796e
AD		 1008 wrb = queue_tail_node(txq);
1009 be_dws_le_to_cpu(wrb, sizeof(*wrb));
1010 busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
1011 if (busaddr != 0) {
1012 pci_unmap_page(adapter->pdev, busaddr,
1013 wrb->frag_len, PCI_DMA_TODEVICE);
1014 }
6b7c5b94
SP		 1015 num_wrbs++;
1016 queue_tail_inc(txq);
a73b796e 1017 }
6b7c5b94
SP		 1018
1019 atomic_sub(num_wrbs, &txq->used);
a73b796e 1020
6b7c5b94
SP		 1021 kfree_skb(sent_skb);
1022}
1023
859b1e4e
SP		 1024static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1025{
1026 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1027
1028 if (!eqe->evt)
1029 return NULL;
1030
1031 eqe->evt = le32_to_cpu(eqe->evt);
1032 queue_tail_inc(&eq_obj->q);
1033 return eqe;
1034}
1035
1036static int event_handle(struct be_adapter *adapter,
1037 struct be_eq_obj *eq_obj)
1038{
1039 struct be_eq_entry *eqe;
1040 u16 num = 0;
1041
1042 while ((eqe = event_get(eq_obj)) != NULL) {
1043 eqe->evt = 0;
1044 num++;
1045 }
1046
1047 /* Deal with any spurious interrupts that come
1048 * without events
1049 */
1050 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1051 if (num)
1052 napi_schedule(&eq_obj->napi);
1053
1054 return num;
1055}
1056
1057/* Just read and notify events without processing them.
1058 * Used at the time of destroying event queues */
1059static void be_eq_clean(struct be_adapter *adapter,
1060 struct be_eq_obj *eq_obj)
1061{
1062 struct be_eq_entry *eqe;
1063 u16 num = 0;
1064
1065 while ((eqe = event_get(eq_obj)) != NULL) {
1066 eqe->evt = 0;
1067 num++;
1068 }
1069
1070 if (num)
1071 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1072}
1073
6b7c5b94
SP		 1074static void be_rx_q_clean(struct be_adapter *adapter)
1075{
1076 struct be_rx_page_info *page_info;
1077 struct be_queue_info *rxq = &adapter->rx_obj.q;
1078 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1079 struct be_eth_rx_compl *rxcp;
1080 u16 tail;
1081
1082 /* First cleanup pending rx completions */
1083 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1084 be_rx_compl_discard(adapter, rxcp);
a7a0ef31 1085 be_rx_compl_reset(rxcp);
8788fdc2 1086 be_cq_notify(adapter, rx_cq->id, true, 1);
6b7c5b94
SP		 1087 }
1088
1089 /* Then free posted rx buffer that were not used */
1090 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
cdab23b7 1091 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
6b7c5b94
SP		 1092 page_info = get_rx_page_info(adapter, tail);
1093 put_page(page_info->page);
1094 memset(page_info, 0, sizeof(*page_info));
1095 }
1096 BUG_ON(atomic_read(&rxq->used));
1097}
1098
a8e9179a 1099static void be_tx_compl_clean(struct be_adapter *adapter)
6b7c5b94 1100{
a8e9179a 1101 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94 1102 struct be_queue_info *txq = &adapter->tx_obj.q;
a8e9179a
SP		 1103 struct be_eth_tx_compl *txcp;
1104 u16 end_idx, cmpl = 0, timeo = 0;
1105
1106 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1107 do {
1108 while ((txcp = be_tx_compl_get(tx_cq))) {
1109 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1110 wrb_index, txcp);
1111 be_tx_compl_process(adapter, end_idx);
1112 cmpl++;
1113 }
1114 if (cmpl) {
1115 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1116 cmpl = 0;
1117 }
1118
1119 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1120 break;
1121
1122 mdelay(1);
1123 } while (true);
1124
1125 if (atomic_read(&txq->used))
1126 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1127 atomic_read(&txq->used));
6b7c5b94
SP		 1128}
1129
5fb379ee
SP		 1130static void be_mcc_queues_destroy(struct be_adapter *adapter)
1131{
1132 struct be_queue_info *q;
5fb379ee 1133
8788fdc2 1134 q = &adapter->mcc_obj.q;
5fb379ee 1135 if (q->created)
8788fdc2 1136 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
5fb379ee
SP		 1137 be_queue_free(adapter, q);
1138
8788fdc2 1139 q = &adapter->mcc_obj.cq;
5fb379ee 1140 if (q->created)
8788fdc2 1141 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
5fb379ee
SP		 1142 be_queue_free(adapter, q);
1143}
1144
1145/* Must be called only after TX qs are created as MCC shares TX EQ */
1146static int be_mcc_queues_create(struct be_adapter *adapter)
1147{
1148 struct be_queue_info *q, *cq;
5fb379ee
SP		 1149
1150 /* Alloc MCC compl queue */
8788fdc2 1151 cq = &adapter->mcc_obj.cq;
5fb379ee 1152 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
efd2e40a 1153 sizeof(struct be_mcc_compl)))
5fb379ee
SP		 1154 goto err;
1155
1156 /* Ask BE to create MCC compl queue; share TX's eq */
8788fdc2 1157 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
5fb379ee
SP		 1158 goto mcc_cq_free;
1159
1160 /* Alloc MCC queue */
8788fdc2 1161 q = &adapter->mcc_obj.q;
5fb379ee
SP		 1162 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1163 goto mcc_cq_destroy;
1164
1165 /* Ask BE to create MCC queue */
8788fdc2 1166 if (be_cmd_mccq_create(adapter, q, cq))
5fb379ee
SP		 1167 goto mcc_q_free;
1168
1169 return 0;
1170
1171mcc_q_free:
1172 be_queue_free(adapter, q);
1173mcc_cq_destroy:
8788fdc2 1174 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
5fb379ee
SP		 1175mcc_cq_free:
1176 be_queue_free(adapter, cq);
1177err:
1178 return -1;
1179}
1180
6b7c5b94
SP		 1181static void be_tx_queues_destroy(struct be_adapter *adapter)
1182{
1183 struct be_queue_info *q;
1184
1185 q = &adapter->tx_obj.q;
a8e9179a 1186 if (q->created)
8788fdc2 1187 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
6b7c5b94
SP		 1188 be_queue_free(adapter, q);
1189
1190 q = &adapter->tx_obj.cq;
1191 if (q->created)
8788fdc2 1192 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1193 be_queue_free(adapter, q);
1194
859b1e4e
SP		 1195 /* Clear any residual events */
1196 be_eq_clean(adapter, &adapter->tx_eq);
1197
6b7c5b94
SP		 1198 q = &adapter->tx_eq.q;
1199 if (q->created)
8788fdc2 1200 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1201 be_queue_free(adapter, q);
1202}
1203
1204static int be_tx_queues_create(struct be_adapter *adapter)
1205{
1206 struct be_queue_info *eq, *q, *cq;
1207
1208 adapter->tx_eq.max_eqd = 0;
1209 adapter->tx_eq.min_eqd = 0;
1210 adapter->tx_eq.cur_eqd = 96;
1211 adapter->tx_eq.enable_aic = false;
1212 /* Alloc Tx Event queue */
1213 eq = &adapter->tx_eq.q;
1214 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1215 return -1;
1216
1217 /* Ask BE to create Tx Event queue */
8788fdc2 1218 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
6b7c5b94
SP		 1219 goto tx_eq_free;
1220 /* Alloc TX eth compl queue */
1221 cq = &adapter->tx_obj.cq;
1222 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1223 sizeof(struct be_eth_tx_compl)))
1224 goto tx_eq_destroy;
1225
1226 /* Ask BE to create Tx eth compl queue */
8788fdc2 1227 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
6b7c5b94
SP		 1228 goto tx_cq_free;
1229
1230 /* Alloc TX eth queue */
1231 q = &adapter->tx_obj.q;
1232 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1233 goto tx_cq_destroy;
1234
1235 /* Ask BE to create Tx eth queue */
8788fdc2 1236 if (be_cmd_txq_create(adapter, q, cq))
6b7c5b94
SP		 1237 goto tx_q_free;
1238 return 0;
1239
1240tx_q_free:
1241 be_queue_free(adapter, q);
1242tx_cq_destroy:
8788fdc2 1243 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1244tx_cq_free:
1245 be_queue_free(adapter, cq);
1246tx_eq_destroy:
8788fdc2 1247 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1248tx_eq_free:
1249 be_queue_free(adapter, eq);
1250 return -1;
1251}
1252
1253static void be_rx_queues_destroy(struct be_adapter *adapter)
1254{
1255 struct be_queue_info *q;
1256
1257 q = &adapter->rx_obj.q;
1258 if (q->created) {
8788fdc2 1259 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
6b7c5b94
SP		 1260 be_rx_q_clean(adapter);
1261 }
1262 be_queue_free(adapter, q);
1263
1264 q = &adapter->rx_obj.cq;
1265 if (q->created)
8788fdc2 1266 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1267 be_queue_free(adapter, q);
1268
859b1e4e
SP		 1269 /* Clear any residual events */
1270 be_eq_clean(adapter, &adapter->rx_eq);
1271
6b7c5b94
SP		 1272 q = &adapter->rx_eq.q;
1273 if (q->created)
8788fdc2 1274 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1275 be_queue_free(adapter, q);
1276}
1277
1278static int be_rx_queues_create(struct be_adapter *adapter)
1279{
1280 struct be_queue_info *eq, *q, *cq;
1281 int rc;
1282
6b7c5b94
SP		 1283 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1284 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1285 adapter->rx_eq.min_eqd = 0;
1286 adapter->rx_eq.cur_eqd = 0;
1287 adapter->rx_eq.enable_aic = true;
1288
1289 /* Alloc Rx Event queue */
1290 eq = &adapter->rx_eq.q;
1291 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1292 sizeof(struct be_eq_entry));
1293 if (rc)
1294 return rc;
1295
1296 /* Ask BE to create Rx Event queue */
8788fdc2 1297 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
6b7c5b94
SP		 1298 if (rc)
1299 goto rx_eq_free;
1300
1301 /* Alloc RX eth compl queue */
1302 cq = &adapter->rx_obj.cq;
1303 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1304 sizeof(struct be_eth_rx_compl));
1305 if (rc)
1306 goto rx_eq_destroy;
1307
1308 /* Ask BE to create Rx eth compl queue */
8788fdc2 1309 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
6b7c5b94
SP		 1310 if (rc)
1311 goto rx_cq_free;
1312
1313 /* Alloc RX eth queue */
1314 q = &adapter->rx_obj.q;
1315 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1316 if (rc)
1317 goto rx_cq_destroy;
1318
1319 /* Ask BE to create Rx eth queue */
8788fdc2 1320 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
6b7c5b94
SP		 1321 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1322 if (rc)
1323 goto rx_q_free;
1324
1325 return 0;
1326rx_q_free:
1327 be_queue_free(adapter, q);
1328rx_cq_destroy:
8788fdc2 1329 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1330rx_cq_free:
1331 be_queue_free(adapter, cq);
1332rx_eq_destroy:
8788fdc2 1333 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1334rx_eq_free:
1335 be_queue_free(adapter, eq);
1336 return rc;
1337}
6b7c5b94 1338
b628bde2
SP		 1339/* There are 8 evt ids per func. Retruns the evt id's bit number */
1340static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1341{
1342 return eq_id - 8 * be_pci_func(adapter);
1343}
1344
6b7c5b94
SP		 1345static irqreturn_t be_intx(int irq, void *dev)
1346{
1347 struct be_adapter *adapter = dev;
8788fdc2 1348 int isr;
6b7c5b94 1349
8788fdc2 1350 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
eec368fb 1351 be_pci_func(adapter) * CEV_ISR_SIZE);
c001c213 1352 if (!isr)
8788fdc2 1353 return IRQ_NONE;
6b7c5b94 1354
8788fdc2
SP		 1355 event_handle(adapter, &adapter->tx_eq);
1356 event_handle(adapter, &adapter->rx_eq);
c001c213 1357
8788fdc2 1358 return IRQ_HANDLED;
6b7c5b94
SP		 1359}
1360
1361static irqreturn_t be_msix_rx(int irq, void *dev)
1362{
1363 struct be_adapter *adapter = dev;
1364
8788fdc2 1365 event_handle(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1366
1367 return IRQ_HANDLED;
1368}
1369
5fb379ee 1370static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
6b7c5b94
SP		 1371{
1372 struct be_adapter *adapter = dev;
1373
8788fdc2 1374 event_handle(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1375
1376 return IRQ_HANDLED;
1377}
1378
5be93b9a 1379static inline bool do_gro(struct be_adapter *adapter,
6b7c5b94
SP		 1380 struct be_eth_rx_compl *rxcp)
1381{
1382 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1383 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1384
1385 if (err)
1386 drvr_stats(adapter)->be_rxcp_err++;
1387
5be93b9a 1388 return (tcp_frame && !err) ? true : false;
6b7c5b94
SP		 1389}
1390
1391int be_poll_rx(struct napi_struct *napi, int budget)
1392{
1393 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1394 struct be_adapter *adapter =
1395 container_of(rx_eq, struct be_adapter, rx_eq);
1396 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1397 struct be_eth_rx_compl *rxcp;
1398 u32 work_done;
1399
b7b83ac3 1400 adapter->stats.drvr_stats.be_rx_polls++;
6b7c5b94
SP		 1401 for (work_done = 0; work_done < budget; work_done++) {
1402 rxcp = be_rx_compl_get(adapter);
1403 if (!rxcp)
1404 break;
1405
5be93b9a
AK		 1406 if (do_gro(adapter, rxcp))
1407 be_rx_compl_process_gro(adapter, rxcp);
6b7c5b94
SP		 1408 else
1409 be_rx_compl_process(adapter, rxcp);
a7a0ef31
SP		 1410
1411 be_rx_compl_reset(rxcp);
6b7c5b94
SP		 1412 }
1413
6b7c5b94
SP		 1414 /* Refill the queue */
1415 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1416 be_post_rx_frags(adapter);
1417
1418 /* All consumed */
1419 if (work_done < budget) {
1420 napi_complete(napi);
8788fdc2 1421 be_cq_notify(adapter, rx_cq->id, true, work_done);
6b7c5b94
SP		 1422 } else {
1423 /* More to be consumed; continue with interrupts disabled */
8788fdc2 1424 be_cq_notify(adapter, rx_cq->id, false, work_done);
6b7c5b94
SP		 1425 }
1426 return work_done;
1427}
1428
5fb379ee 1429void be_process_tx(struct be_adapter *adapter)
6b7c5b94 1430{
5fb379ee
SP		 1431 struct be_queue_info *txq = &adapter->tx_obj.q;
1432 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94
SP		 1433 struct be_eth_tx_compl *txcp;
1434 u32 num_cmpl = 0;
1435 u16 end_idx;
1436
5fb379ee 1437 while ((txcp = be_tx_compl_get(tx_cq))) {
6b7c5b94
SP		 1438 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1439 wrb_index, txcp);
1440 be_tx_compl_process(adapter, end_idx);
1441 num_cmpl++;
1442 }
1443
5fb379ee 1444 if (num_cmpl) {
8788fdc2 1445 be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
5fb379ee
SP		 1446
1447 /* As Tx wrbs have been freed up, wake up netdev queue if
1448 * it was stopped due to lack of tx wrbs.
1449 */
1450 if (netif_queue_stopped(adapter->netdev) &&
6b7c5b94 1451 atomic_read(&txq->used) < txq->len / 2) {
5fb379ee
SP		 1452 netif_wake_queue(adapter->netdev);
1453 }
1454
1455 drvr_stats(adapter)->be_tx_events++;
1456 drvr_stats(adapter)->be_tx_compl += num_cmpl;
6b7c5b94 1457 }
5fb379ee
SP		 1458}
1459
1460/* As TX and MCC share the same EQ check for both TX and MCC completions.
1461 * For TX/MCC we don't honour budget; consume everything
1462 */
1463static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1464{
1465 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1466 struct be_adapter *adapter =
1467 container_of(tx_eq, struct be_adapter, tx_eq);
6b7c5b94
SP		 1468
1469 napi_complete(napi);
1470
5fb379ee 1471 be_process_tx(adapter);
6b7c5b94 1472
8788fdc2 1473 be_process_mcc(adapter);
6b7c5b94
SP		 1474
1475 return 1;
1476}
1477
ea1dae11
SP		 1478static void be_worker(struct work_struct *work)
1479{
1480 struct be_adapter *adapter =
1481 container_of(work, struct be_adapter, work.work);
ea1dae11 1482
b31c50a7 1483 be_cmd_get_stats(adapter, &adapter->stats.cmd);
ea1dae11
SP		 1484
1485 /* Set EQ delay */
1486 be_rx_eqd_update(adapter);
1487
4097f663
SP		 1488 be_tx_rate_update(adapter);
1489 be_rx_rate_update(adapter);
1490
ea1dae11
SP		 1491 if (adapter->rx_post_starved) {
1492 adapter->rx_post_starved = false;
1493 be_post_rx_frags(adapter);
1494 }
1495
1496 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1497}
1498
8d56ff11
SP		 1499static void be_msix_disable(struct be_adapter *adapter)
1500{
1501 if (adapter->msix_enabled) {
1502 pci_disable_msix(adapter->pdev);
1503 adapter->msix_enabled = false;
1504 }
1505}
1506
6b7c5b94
SP		 1507static void be_msix_enable(struct be_adapter *adapter)
1508{
1509 int i, status;
1510
1511 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1512 adapter->msix_entries[i].entry = i;
1513
1514 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1515 BE_NUM_MSIX_VECTORS);
1516 if (status == 0)
1517 adapter->msix_enabled = true;
1518 return;
1519}
1520
1521static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1522{
b628bde2
SP		 1523 return adapter->msix_entries[
1524 be_evt_bit_get(adapter, eq_id)].vector;
6b7c5b94
SP		 1525}
1526
b628bde2
SP		 1527static int be_request_irq(struct be_adapter *adapter,
1528 struct be_eq_obj *eq_obj,
1529 void *handler, char *desc)
6b7c5b94
SP		 1530{
1531 struct net_device *netdev = adapter->netdev;
b628bde2
SP		 1532 int vec;
1533
1534 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1535 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1536 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1537}
1538
1539static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1540{
1541 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1542 free_irq(vec, adapter);
1543}
6b7c5b94 1544
b628bde2
SP		 1545static int be_msix_register(struct be_adapter *adapter)
1546{
1547 int status;
1548
1549 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
6b7c5b94
SP		 1550 if (status)
1551 goto err;
1552
b628bde2
SP		 1553 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1554 if (status)
1555 goto free_tx_irq;
1556
6b7c5b94 1557 return 0;
b628bde2
SP		 1558
1559free_tx_irq:
1560 be_free_irq(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1561err:
1562 dev_warn(&adapter->pdev->dev,
1563 "MSIX Request IRQ failed - err %d\n", status);
1564 pci_disable_msix(adapter->pdev);
1565 adapter->msix_enabled = false;
1566 return status;
1567}
1568
1569static int be_irq_register(struct be_adapter *adapter)
1570{
1571 struct net_device *netdev = adapter->netdev;
1572 int status;
1573
1574 if (adapter->msix_enabled) {
1575 status = be_msix_register(adapter);
1576 if (status == 0)
1577 goto done;
1578 }
1579
1580 /* INTx */
1581 netdev->irq = adapter->pdev->irq;
1582 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1583 adapter);
1584 if (status) {
1585 dev_err(&adapter->pdev->dev,
1586 "INTx request IRQ failed - err %d\n", status);
1587 return status;
1588 }
1589done:
1590 adapter->isr_registered = true;
1591 return 0;
1592}
1593
1594static void be_irq_unregister(struct be_adapter *adapter)
1595{
1596 struct net_device *netdev = adapter->netdev;
6b7c5b94
SP		 1597
1598 if (!adapter->isr_registered)
1599 return;
1600
1601 /* INTx */
1602 if (!adapter->msix_enabled) {
1603 free_irq(netdev->irq, adapter);
1604 goto done;
1605 }
1606
1607 /* MSIx */
b628bde2
SP		 1608 be_free_irq(adapter, &adapter->tx_eq);
1609 be_free_irq(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1610done:
1611 adapter->isr_registered = false;
1612 return;
1613}
1614
1615static int be_open(struct net_device *netdev)
1616{
1617 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1618 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1619 struct be_eq_obj *tx_eq = &adapter->tx_eq;
a8f447bd
SP		 1620 bool link_up;
1621 int status;
0388f251
SB		 1622 u8 mac_speed;
1623 u16 link_speed;
5fb379ee
SP		 1624
1625 /* First time posting */
1626 be_post_rx_frags(adapter);
1627
1628 napi_enable(&rx_eq->napi);
1629 napi_enable(&tx_eq->napi);
1630
1631 be_irq_register(adapter);
1632
8788fdc2 1633 be_intr_set(adapter, true);
5fb379ee
SP		 1634
1635 /* The evt queues are created in unarmed state; arm them */
8788fdc2
SP		 1636 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
1637 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
5fb379ee
SP		 1638
1639 /* Rx compl queue may be in unarmed state; rearm it */
8788fdc2 1640 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
5fb379ee 1641
0388f251
SB		 1642 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
1643 &link_speed);
a8f447bd 1644 if (status)
4f2aa89c 1645 goto ret_sts;
a8f447bd 1646 be_link_status_update(adapter, link_up);
5fb379ee 1647
4f2aa89c
AK		 1648 status = be_vid_config(adapter);
1649 if (status)
1650 goto ret_sts;
1651
1652 status = be_cmd_set_flow_control(adapter,
1653 adapter->tx_fc, adapter->rx_fc);
1654 if (status)
1655 goto ret_sts;
1656
5fb379ee 1657 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
4f2aa89c
AK		 1658ret_sts:
1659 return status;
5fb379ee
SP		 1660}
1661
71d8d1b5
AK		 1662static int be_setup_wol(struct be_adapter *adapter, bool enable)
1663{
1664 struct be_dma_mem cmd;
1665 int status = 0;
1666 u8 mac[ETH_ALEN];
1667
1668 memset(mac, 0, ETH_ALEN);
1669
1670 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
1671 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
1672 if (cmd.va == NULL)
1673 return -1;
1674 memset(cmd.va, 0, cmd.size);
1675
1676 if (enable) {
1677 status = pci_write_config_dword(adapter->pdev,
1678 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
1679 if (status) {
1680 dev_err(&adapter->pdev->dev,
1681 "Could not enable Wake-on-lan \n");
1682 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
1683 cmd.dma);
1684 return status;
1685 }
1686 status = be_cmd_enable_magic_wol(adapter,
1687 adapter->netdev->dev_addr, &cmd);
1688 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
1689 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
1690 } else {
1691 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
1692 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
1693 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
1694 }
1695
1696 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
1697 return status;
1698}
1699
5fb379ee
SP		 1700static int be_setup(struct be_adapter *adapter)
1701{
5fb379ee 1702 struct net_device *netdev = adapter->netdev;
73d540f2 1703 u32 cap_flags, en_flags;
6b7c5b94
SP		 1704 int status;
1705
73d540f2
SP		 1706 cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1707 BE_IF_FLAGS_MCAST_PROMISCUOUS |
1708 BE_IF_FLAGS_PROMISCUOUS |
1709 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1710 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1711 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1712
1713 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1714 netdev->dev_addr, false/* pmac_invalid */,
1715 &adapter->if_handle, &adapter->pmac_id);
6b7c5b94
SP		 1716 if (status != 0)
1717 goto do_none;
1718
6b7c5b94
SP		 1719 status = be_tx_queues_create(adapter);
1720 if (status != 0)
1721 goto if_destroy;
1722
1723 status = be_rx_queues_create(adapter);
1724 if (status != 0)
1725 goto tx_qs_destroy;
1726
5fb379ee
SP		 1727 status = be_mcc_queues_create(adapter);
1728 if (status != 0)
1729 goto rx_qs_destroy;
6b7c5b94 1730
0dffc83e
AK		 1731 adapter->link_speed = -1;
1732
6b7c5b94
SP		 1733 return 0;
1734
5fb379ee
SP		 1735rx_qs_destroy:
1736 be_rx_queues_destroy(adapter);
6b7c5b94
SP		 1737tx_qs_destroy:
1738 be_tx_queues_destroy(adapter);
1739if_destroy:
8788fdc2 1740 be_cmd_if_destroy(adapter, adapter->if_handle);
6b7c5b94
SP		 1741do_none:
1742 return status;
1743}
1744
5fb379ee
SP		 1745static int be_clear(struct be_adapter *adapter)
1746{
1a8887d8 1747 be_mcc_queues_destroy(adapter);
5fb379ee
SP		 1748 be_rx_queues_destroy(adapter);
1749 be_tx_queues_destroy(adapter);
1750
8788fdc2 1751 be_cmd_if_destroy(adapter, adapter->if_handle);
5fb379ee 1752
2243e2e9
SP		 1753 /* tell fw we're done with firing cmds */
1754 be_cmd_fw_clean(adapter);
5fb379ee
SP		 1755 return 0;
1756}
1757
6b7c5b94
SP		 1758static int be_close(struct net_device *netdev)
1759{
1760 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1761 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1762 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1763 int vec;
1764
b305be78 1765 cancel_delayed_work_sync(&adapter->work);
6b7c5b94
SP		 1766
1767 netif_stop_queue(netdev);
1768 netif_carrier_off(netdev);
a8f447bd 1769 adapter->link_up = false;
6b7c5b94 1770
8788fdc2 1771 be_intr_set(adapter, false);
6b7c5b94
SP		 1772
1773 if (adapter->msix_enabled) {
1774 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1775 synchronize_irq(vec);
1776 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1777 synchronize_irq(vec);
1778 } else {
1779 synchronize_irq(netdev->irq);
1780 }
1781 be_irq_unregister(adapter);
1782
1783 napi_disable(&rx_eq->napi);
1784 napi_disable(&tx_eq->napi);
1785
a8e9179a
SP		 1786 /* Wait for all pending tx completions to arrive so that
1787 * all tx skbs are freed.
1788 */
1789 be_tx_compl_clean(adapter);
1790
6b7c5b94
SP		 1791 return 0;
1792}
1793
84517482
AK		 1794#define FW_FILE_HDR_SIGN "ServerEngines Corp. "
1795char flash_cookie[2][16] = {"*** SE FLAS",
1796 "H DIRECTORY *** "};
fa9a6fed
SB		 1797
1798static bool be_flash_redboot(struct be_adapter *adapter,
1799 const u8 *p)
1800{
1801 u32 crc_offset;
1802 u8 flashed_crc[4];
1803 int status;
1804 crc_offset = FLASH_REDBOOT_START + FLASH_REDBOOT_IMAGE_MAX_SIZE - 4
1805 + sizeof(struct flash_file_hdr) - 32*1024;
1806 p += crc_offset;
1807 status = be_cmd_get_flash_crc(adapter, flashed_crc);
1808 if (status) {
1809 dev_err(&adapter->pdev->dev,
1810 "could not get crc from flash, not flashing redboot\n");
1811 return false;
1812 }
1813
1814 /*update redboot only if crc does not match*/
1815 if (!memcmp(flashed_crc, p, 4))
1816 return false;
1817 else
1818 return true;
1819
1820}
1821
84517482
AK		 1822static int be_flash_image(struct be_adapter *adapter,
1823 const struct firmware *fw,
1824 struct be_dma_mem *flash_cmd, u32 flash_type)
1825{
1826 int status;
1827 u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
1828 int num_bytes;
1829 const u8 *p = fw->data;
1830 struct be_cmd_write_flashrom *req = flash_cmd->va;
1831
1832 switch (flash_type) {
1833 case FLASHROM_TYPE_ISCSI_ACTIVE:
1834 image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
1835 image_size = FLASH_IMAGE_MAX_SIZE;
1836 break;
1837 case FLASHROM_TYPE_ISCSI_BACKUP:
1838 image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
1839 image_size = FLASH_IMAGE_MAX_SIZE;
1840 break;
1841 case FLASHROM_TYPE_FCOE_FW_ACTIVE:
1842 image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
1843 image_size = FLASH_IMAGE_MAX_SIZE;
1844 break;
1845 case FLASHROM_TYPE_FCOE_FW_BACKUP:
1846 image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
1847 image_size = FLASH_IMAGE_MAX_SIZE;
1848 break;
1849 case FLASHROM_TYPE_BIOS:
1850 image_offset = FLASH_iSCSI_BIOS_START;
1851 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1852 break;
1853 case FLASHROM_TYPE_FCOE_BIOS:
1854 image_offset = FLASH_FCoE_BIOS_START;
1855 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1856 break;
1857 case FLASHROM_TYPE_PXE_BIOS:
1858 image_offset = FLASH_PXE_BIOS_START;
1859 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1860 break;
fa9a6fed
SB		 1861 case FLASHROM_TYPE_REDBOOT:
1862 if (!be_flash_redboot(adapter, fw->data))
1863 return 0;
1864 image_offset = FLASH_REDBOOT_ISM_START;
1865 image_size = FLASH_REDBOOT_IMAGE_MAX_SIZE;
1866 break;
84517482
AK		 1867 default:
1868 return 0;
1869 }
1870
1871 p += sizeof(struct flash_file_hdr) + image_offset;
1872 if (p + image_size > fw->data + fw->size)
1873 return -1;
1874
1875 total_bytes = image_size;
1876
1877 while (total_bytes) {
1878 if (total_bytes > 32*1024)
1879 num_bytes = 32*1024;
1880 else
1881 num_bytes = total_bytes;
1882 total_bytes -= num_bytes;
1883
1884 if (!total_bytes)
1885 flash_op = FLASHROM_OPER_FLASH;
1886 else
1887 flash_op = FLASHROM_OPER_SAVE;
1888 memcpy(req->params.data_buf, p, num_bytes);
1889 p += num_bytes;
1890 status = be_cmd_write_flashrom(adapter, flash_cmd,
1891 flash_type, flash_op, num_bytes);
1892 if (status) {
1893 dev_err(&adapter->pdev->dev,
1894 "cmd to write to flash rom failed. type/op %d/%d\n",
1895 flash_type, flash_op);
1896 return -1;
1897 }
1898 yield();
1899 }
1900
1901 return 0;
1902}
1903
1904int be_load_fw(struct be_adapter *adapter, u8 *func)
1905{
1906 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
1907 const struct firmware *fw;
1908 struct flash_file_hdr *fhdr;
1909 struct flash_section_info *fsec = NULL;
1910 struct be_dma_mem flash_cmd;
1911 int status;
1912 const u8 *p;
1913 bool entry_found = false;
1914 int flash_type;
1915 char fw_ver[FW_VER_LEN];
1916 char fw_cfg;
1917
1918 status = be_cmd_get_fw_ver(adapter, fw_ver);
1919 if (status)
1920 return status;
1921
1922 fw_cfg = *(fw_ver + 2);
1923 if (fw_cfg == '0')
1924 fw_cfg = '1';
1925 strcpy(fw_file, func);
1926
1927 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
1928 if (status)
1929 goto fw_exit;
1930
1931 p = fw->data;
1932 fhdr = (struct flash_file_hdr *) p;
1933 if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
1934 dev_err(&adapter->pdev->dev,
1935 "Firmware(%s) load error (signature did not match)\n",
1936 fw_file);
1937 status = -1;
1938 goto fw_exit;
1939 }
1940
1941 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
1942
1943 p += sizeof(struct flash_file_hdr);
1944 while (p < (fw->data + fw->size)) {
1945 fsec = (struct flash_section_info *)p;
1946 if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
1947 entry_found = true;
1948 break;
1949 }
1950 p += 32;
1951 }
1952
1953 if (!entry_found) {
1954 status = -1;
1955 dev_err(&adapter->pdev->dev,
1956 "Flash cookie not found in firmware image\n");
1957 goto fw_exit;
1958 }
1959
1960 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
1961 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
1962 &flash_cmd.dma);
1963 if (!flash_cmd.va) {
1964 status = -ENOMEM;
1965 dev_err(&adapter->pdev->dev,
1966 "Memory allocation failure while flashing\n");
1967 goto fw_exit;
1968 }
1969
1970 for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
1971 flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
1972 status = be_flash_image(adapter, fw, &flash_cmd,
1973 flash_type);
1974 if (status)
1975 break;
1976 }
1977
1978 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
1979 flash_cmd.dma);
1980 if (status) {
1981 dev_err(&adapter->pdev->dev, "Firmware load error\n");
1982 goto fw_exit;
1983 }
1984
af901ca1 1985 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
84517482
AK		 1986
1987fw_exit:
1988 release_firmware(fw);
1989 return status;
1990}
1991
6b7c5b94
SP		 1992static struct net_device_ops be_netdev_ops = {
1993 .ndo_open = be_open,
1994 .ndo_stop = be_close,
1995 .ndo_start_xmit = be_xmit,
1996 .ndo_get_stats = be_get_stats,
1997 .ndo_set_rx_mode = be_set_multicast_list,
1998 .ndo_set_mac_address = be_mac_addr_set,
1999 .ndo_change_mtu = be_change_mtu,
2000 .ndo_validate_addr = eth_validate_addr,
2001 .ndo_vlan_rx_register = be_vlan_register,
2002 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2003 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2004};
2005
2006static void be_netdev_init(struct net_device *netdev)
2007{
2008 struct be_adapter *adapter = netdev_priv(netdev);
2009
2010 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
583e3f34
AK		 2011 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
2012 NETIF_F_GRO;
6b7c5b94 2013
51c59870
AK		 2014 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2015
6b7c5b94
SP		 2016 netdev->flags |= IFF_MULTICAST;
2017
728a9972
AK		 2018 adapter->rx_csum = true;
2019
9e90c961
AK		 2020 /* Default settings for Rx and Tx flow control */
2021 adapter->rx_fc = true;
2022 adapter->tx_fc = true;
2023
c190e3c8
AK		 2024 netif_set_gso_max_size(netdev, 65535);
2025
6b7c5b94
SP		 2026 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2027
2028 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2029
6b7c5b94
SP		 2030 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
2031 BE_NAPI_WEIGHT);
5fb379ee 2032 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
6b7c5b94
SP		 2033 BE_NAPI_WEIGHT);
2034
2035 netif_carrier_off(netdev);
2036 netif_stop_queue(netdev);
2037}
2038
2039static void be_unmap_pci_bars(struct be_adapter *adapter)
2040{
8788fdc2
SP		 2041 if (adapter->csr)
2042 iounmap(adapter->csr);
2043 if (adapter->db)
2044 iounmap(adapter->db);
2045 if (adapter->pcicfg)
2046 iounmap(adapter->pcicfg);
6b7c5b94
SP		 2047}
2048
2049static int be_map_pci_bars(struct be_adapter *adapter)
2050{
2051 u8 __iomem *addr;
2052
2053 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2054 pci_resource_len(adapter->pdev, 2));
2055 if (addr == NULL)
2056 return -ENOMEM;
8788fdc2 2057 adapter->csr = addr;
6b7c5b94
SP		 2058
2059 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
2060 128 * 1024);
2061 if (addr == NULL)
2062 goto pci_map_err;
8788fdc2 2063 adapter->db = addr;
6b7c5b94
SP		 2064
2065 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
2066 pci_resource_len(adapter->pdev, 1));
2067 if (addr == NULL)
2068 goto pci_map_err;
8788fdc2 2069 adapter->pcicfg = addr;
6b7c5b94
SP		 2070
2071 return 0;
2072pci_map_err:
2073 be_unmap_pci_bars(adapter);
2074 return -ENOMEM;
2075}
2076
2077
2078static void be_ctrl_cleanup(struct be_adapter *adapter)
2079{
8788fdc2 2080 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
6b7c5b94
SP		 2081
2082 be_unmap_pci_bars(adapter);
2083
2084 if (mem->va)
2085 pci_free_consistent(adapter->pdev, mem->size,
2086 mem->va, mem->dma);
e7b909a6
SP		 2087
2088 mem = &adapter->mc_cmd_mem;
2089 if (mem->va)
2090 pci_free_consistent(adapter->pdev, mem->size,
2091 mem->va, mem->dma);
6b7c5b94
SP		 2092}
2093
6b7c5b94
SP		 2094static int be_ctrl_init(struct be_adapter *adapter)
2095{
8788fdc2
SP		 2096 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2097 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
e7b909a6 2098 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
6b7c5b94 2099 int status;
6b7c5b94
SP		 2100
2101 status = be_map_pci_bars(adapter);
2102 if (status)
e7b909a6 2103 goto done;
6b7c5b94
SP		 2104
2105 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2106 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2107 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2108 if (!mbox_mem_alloc->va) {
e7b909a6
SP		 2109 status = -ENOMEM;
2110 goto unmap_pci_bars;
6b7c5b94 2111 }
e7b909a6 2112
6b7c5b94
SP		 2113 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2114 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2115 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2116 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
e7b909a6
SP		 2117
2118 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2119 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2120 &mc_cmd_mem->dma);
2121 if (mc_cmd_mem->va == NULL) {
2122 status = -ENOMEM;
2123 goto free_mbox;
2124 }
2125 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2126
8788fdc2
SP		 2127 spin_lock_init(&adapter->mbox_lock);
2128 spin_lock_init(&adapter->mcc_lock);
2129 spin_lock_init(&adapter->mcc_cq_lock);
a8f447bd 2130
6b7c5b94 2131 return 0;
e7b909a6
SP		 2132
2133free_mbox:
2134 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2135 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2136
2137unmap_pci_bars:
2138 be_unmap_pci_bars(adapter);
2139
2140done:
2141 return status;
6b7c5b94
SP		 2142}
2143
2144static void be_stats_cleanup(struct be_adapter *adapter)
2145{
2146 struct be_stats_obj *stats = &adapter->stats;
2147 struct be_dma_mem *cmd = &stats->cmd;
2148
2149 if (cmd->va)
2150 pci_free_consistent(adapter->pdev, cmd->size,
2151 cmd->va, cmd->dma);
2152}
2153
2154static int be_stats_init(struct be_adapter *adapter)
2155{
2156 struct be_stats_obj *stats = &adapter->stats;
2157 struct be_dma_mem *cmd = &stats->cmd;
2158
2159 cmd->size = sizeof(struct be_cmd_req_get_stats);
2160 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2161 if (cmd->va == NULL)
2162 return -1;
2163 return 0;
2164}
2165
2166static void __devexit be_remove(struct pci_dev *pdev)
2167{
2168 struct be_adapter *adapter = pci_get_drvdata(pdev);
8d56ff11 2169
6b7c5b94
SP		 2170 if (!adapter)
2171 return;
2172
2173 unregister_netdev(adapter->netdev);
2174
5fb379ee
SP		 2175 be_clear(adapter);
2176
6b7c5b94
SP		 2177 be_stats_cleanup(adapter);
2178
2179 be_ctrl_cleanup(adapter);
2180
8d56ff11 2181 be_msix_disable(adapter);
6b7c5b94
SP		 2182
2183 pci_set_drvdata(pdev, NULL);
2184 pci_release_regions(pdev);
2185 pci_disable_device(pdev);
2186
2187 free_netdev(adapter->netdev);
2188}
2189
2243e2e9 2190static int be_get_config(struct be_adapter *adapter)
6b7c5b94 2191{
6b7c5b94 2192 int status;
2243e2e9 2193 u8 mac[ETH_ALEN];
6b7c5b94 2194
2243e2e9 2195 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
6b7c5b94
SP		 2196 if (status)
2197 return status;
2198
2243e2e9
SP		 2199 status = be_cmd_query_fw_cfg(adapter,
2200 &adapter->port_num, &adapter->cap);
43a04fdc
SP		 2201 if (status)
2202 return status;
2203
2243e2e9
SP		 2204 memset(mac, 0, ETH_ALEN);
2205 status = be_cmd_mac_addr_query(adapter, mac,
2206 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
6b7c5b94
SP		 2207 if (status)
2208 return status;
ca9e4988
AK		 2209
2210 if (!is_valid_ether_addr(mac))
2211 return -EADDRNOTAVAIL;
2212
2243e2e9 2213 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
35a65285 2214 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
6b7c5b94 2215
2243e2e9 2216 return 0;
6b7c5b94
SP		 2217}
2218
2219static int __devinit be_probe(struct pci_dev *pdev,
2220 const struct pci_device_id *pdev_id)
2221{
2222 int status = 0;
2223 struct be_adapter *adapter;
2224 struct net_device *netdev;
6b7c5b94
SP		 2225
2226 status = pci_enable_device(pdev);
2227 if (status)
2228 goto do_none;
2229
2230 status = pci_request_regions(pdev, DRV_NAME);
2231 if (status)
2232 goto disable_dev;
2233 pci_set_master(pdev);
2234
2235 netdev = alloc_etherdev(sizeof(struct be_adapter));
2236 if (netdev == NULL) {
2237 status = -ENOMEM;
2238 goto rel_reg;
2239 }
2240 adapter = netdev_priv(netdev);
2241 adapter->pdev = pdev;
2242 pci_set_drvdata(pdev, adapter);
2243 adapter->netdev = netdev;
2243e2e9
SP		 2244 be_netdev_init(netdev);
2245 SET_NETDEV_DEV(netdev, &pdev->dev);
6b7c5b94
SP		 2246
2247 be_msix_enable(adapter);
2248
e930438c 2249 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
6b7c5b94
SP		 2250 if (!status) {
2251 netdev->features |= NETIF_F_HIGHDMA;
2252 } else {
e930438c 2253 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6b7c5b94
SP		 2254 if (status) {
2255 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2256 goto free_netdev;
2257 }
2258 }
2259
6b7c5b94
SP		 2260 status = be_ctrl_init(adapter);
2261 if (status)
2262 goto free_netdev;
2263
2243e2e9
SP		 2264 /* sync up with fw's ready state */
2265 status = be_cmd_POST(adapter);
6b7c5b94
SP		 2266 if (status)
2267 goto ctrl_clean;
2268
2243e2e9
SP		 2269 /* tell fw we're ready to fire cmds */
2270 status = be_cmd_fw_init(adapter);
6b7c5b94 2271 if (status)
2243e2e9
SP		 2272 goto ctrl_clean;
2273
2274 status = be_cmd_reset_function(adapter);
2275 if (status)
2276 goto ctrl_clean;
6b7c5b94 2277
2243e2e9
SP		 2278 status = be_stats_init(adapter);
2279 if (status)
2280 goto ctrl_clean;
2281
2282 status = be_get_config(adapter);
6b7c5b94
SP		 2283 if (status)
2284 goto stats_clean;
6b7c5b94
SP		 2285
2286 INIT_DELAYED_WORK(&adapter->work, be_worker);
6b7c5b94 2287
5fb379ee
SP		 2288 status = be_setup(adapter);
2289 if (status)
2290 goto stats_clean;
2243e2e9 2291
6b7c5b94
SP		 2292 status = register_netdev(netdev);
2293 if (status != 0)
5fb379ee 2294 goto unsetup;
6b7c5b94 2295
c4ca2374 2296 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
6b7c5b94
SP		 2297 return 0;
2298
5fb379ee
SP		 2299unsetup:
2300 be_clear(adapter);
6b7c5b94
SP		 2301stats_clean:
2302 be_stats_cleanup(adapter);
2303ctrl_clean:
2304 be_ctrl_cleanup(adapter);
2305free_netdev:
8d56ff11 2306 be_msix_disable(adapter);
6b7c5b94 2307 free_netdev(adapter->netdev);
8d56ff11 2308 pci_set_drvdata(pdev, NULL);
6b7c5b94
SP		 2309rel_reg:
2310 pci_release_regions(pdev);
2311disable_dev:
2312 pci_disable_device(pdev);
2313do_none:
c4ca2374 2314 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
6b7c5b94
SP		 2315 return status;
2316}
2317
2318static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2319{
2320 struct be_adapter *adapter = pci_get_drvdata(pdev);
2321 struct net_device *netdev = adapter->netdev;
2322
71d8d1b5
AK		 2323 if (adapter->wol)
2324 be_setup_wol(adapter, true);
2325
6b7c5b94
SP		 2326 netif_device_detach(netdev);
2327 if (netif_running(netdev)) {
2328 rtnl_lock();
2329 be_close(netdev);
2330 rtnl_unlock();
2331 }
9e90c961 2332 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
9b0365f1 2333 be_clear(adapter);
6b7c5b94
SP		 2334
2335 pci_save_state(pdev);
2336 pci_disable_device(pdev);
2337 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2338 return 0;
2339}
2340
2341static int be_resume(struct pci_dev *pdev)
2342{
2343 int status = 0;
2344 struct be_adapter *adapter = pci_get_drvdata(pdev);
2345 struct net_device *netdev = adapter->netdev;
2346
2347 netif_device_detach(netdev);
2348
2349 status = pci_enable_device(pdev);
2350 if (status)
2351 return status;
2352
2353 pci_set_power_state(pdev, 0);
2354 pci_restore_state(pdev);
2355
2243e2e9
SP		 2356 /* tell fw we're ready to fire cmds */
2357 status = be_cmd_fw_init(adapter);
2358 if (status)
2359 return status;
2360
9b0365f1 2361 be_setup(adapter);
6b7c5b94
SP		 2362 if (netif_running(netdev)) {
2363 rtnl_lock();
2364 be_open(netdev);
2365 rtnl_unlock();
2366 }
2367 netif_device_attach(netdev);
71d8d1b5
AK		 2368
2369 if (adapter->wol)
2370 be_setup_wol(adapter, false);
6b7c5b94
SP		 2371 return 0;
2372}
2373
2374static struct pci_driver be_driver = {
2375 .name = DRV_NAME,
2376 .id_table = be_dev_ids,
2377 .probe = be_probe,
2378 .remove = be_remove,
2379 .suspend = be_suspend,
2380 .resume = be_resume
2381};
2382
2383static int __init be_init_module(void)
2384{
8e95a202
JP		 2385 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
2386 rx_frag_size != 2048) {
6b7c5b94
SP		 2387 printk(KERN_WARNING DRV_NAME
2388 " : Module param rx_frag_size must be 2048/4096/8192."
2389 " Using 2048\n");
2390 rx_frag_size = 2048;
2391 }
6b7c5b94
SP		 2392
2393 return pci_register_driver(&be_driver);
2394}
2395module_init(be_init_module);
2396
2397static void __exit be_exit_module(void)
2398{
2399 pci_unregister_driver(&be_driver);
2400}
2401module_exit(be_exit_module);
Clone of davem's net-next-2.6 tree