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be2net: bug fix for flashing the BladeEngine3 ASIC
[net-next-2.6.git] / drivers / net / benet / be_main.c
CommitLineData
6b7c5b94
SP		 1/*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#include "be.h"
8788fdc2 19#include "be_cmds.h"
65f71b8b 20#include <asm/div64.h>
6b7c5b94
SP		 21
22MODULE_VERSION(DRV_VER);
23MODULE_DEVICE_TABLE(pci, be_dev_ids);
24MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25MODULE_AUTHOR("ServerEngines Corporation");
26MODULE_LICENSE("GPL");
27
28static unsigned int rx_frag_size = 2048;
29module_param(rx_frag_size, uint, S_IRUGO);
30MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
31
6b7c5b94 32static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
c4ca2374 33 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
59fd5d87 34 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
c4ca2374
AK		 35 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
36 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
6b7c5b94
SP		 37 { 0 }
38};
39MODULE_DEVICE_TABLE(pci, be_dev_ids);
40
41static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
42{
43 struct be_dma_mem *mem = &q->dma_mem;
44 if (mem->va)
45 pci_free_consistent(adapter->pdev, mem->size,
46 mem->va, mem->dma);
47}
48
49static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
50 u16 len, u16 entry_size)
51{
52 struct be_dma_mem *mem = &q->dma_mem;
53
54 memset(q, 0, sizeof(*q));
55 q->len = len;
56 q->entry_size = entry_size;
57 mem->size = len * entry_size;
58 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
59 if (!mem->va)
60 return -1;
61 memset(mem->va, 0, mem->size);
62 return 0;
63}
64
8788fdc2 65static void be_intr_set(struct be_adapter *adapter, bool enable)
6b7c5b94 66{
8788fdc2 67 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
6b7c5b94
SP		 68 u32 reg = ioread32(addr);
69 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e
SP		 70
71 if (!enabled && enable)
6b7c5b94 72 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 73 else if (enabled && !enable)
6b7c5b94 74 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 75 else
6b7c5b94 76 return;
5f0b849e 77
6b7c5b94
SP		 78 iowrite32(reg, addr);
79}
80
8788fdc2 81static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 82{
83 u32 val = 0;
84 val |= qid & DB_RQ_RING_ID_MASK;
85 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
8788fdc2 86 iowrite32(val, adapter->db + DB_RQ_OFFSET);
6b7c5b94
SP		 87}
88
8788fdc2 89static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 90{
91 u32 val = 0;
92 val |= qid & DB_TXULP_RING_ID_MASK;
93 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
8788fdc2 94 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
6b7c5b94
SP		 95}
96
8788fdc2 97static void be_eq_notify(struct be_adapter *adapter, u16 qid,
6b7c5b94
SP		 98 bool arm, bool clear_int, u16 num_popped)
99{
100 u32 val = 0;
101 val |= qid & DB_EQ_RING_ID_MASK;
102 if (arm)
103 val |= 1 << DB_EQ_REARM_SHIFT;
104 if (clear_int)
105 val |= 1 << DB_EQ_CLR_SHIFT;
106 val |= 1 << DB_EQ_EVNT_SHIFT;
107 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
8788fdc2 108 iowrite32(val, adapter->db + DB_EQ_OFFSET);
6b7c5b94
SP		 109}
110
8788fdc2 111void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
6b7c5b94
SP		 112{
113 u32 val = 0;
114 val |= qid & DB_CQ_RING_ID_MASK;
115 if (arm)
116 val |= 1 << DB_CQ_REARM_SHIFT;
117 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
8788fdc2 118 iowrite32(val, adapter->db + DB_CQ_OFFSET);
6b7c5b94
SP		 119}
120
6b7c5b94
SP		 121static int be_mac_addr_set(struct net_device *netdev, void *p)
122{
123 struct be_adapter *adapter = netdev_priv(netdev);
124 struct sockaddr *addr = p;
125 int status = 0;
126
ca9e4988
AK		 127 if (!is_valid_ether_addr(addr->sa_data))
128 return -EADDRNOTAVAIL;
129
a65027e4
SP		 130 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
131 if (status)
132 return status;
6b7c5b94 133
a65027e4
SP		 134 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
135 adapter->if_handle, &adapter->pmac_id);
6b7c5b94
SP		 136 if (!status)
137 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
138
139 return status;
140}
141
b31c50a7 142void netdev_stats_update(struct be_adapter *adapter)
6b7c5b94
SP		 143{
144 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
145 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
146 struct be_port_rxf_stats *port_stats =
147 &rxf_stats->port[adapter->port_num];
78122a52 148 struct net_device_stats *dev_stats = &adapter->netdev->stats;
68110868 149 struct be_erx_stats *erx_stats = &hw_stats->erx;
6b7c5b94
SP		 150
151 dev_stats->rx_packets = port_stats->rx_total_frames;
152 dev_stats->tx_packets = port_stats->tx_unicastframes +
153 port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
154 dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
155 (u64) port_stats->rx_bytes_lsd;
156 dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
157 (u64) port_stats->tx_bytes_lsd;
158
159 /* bad pkts received */
160 dev_stats->rx_errors = port_stats->rx_crc_errors +
161 port_stats->rx_alignment_symbol_errors +
162 port_stats->rx_in_range_errors +
68110868
SP		 163 port_stats->rx_out_range_errors +
164 port_stats->rx_frame_too_long +
165 port_stats->rx_dropped_too_small +
166 port_stats->rx_dropped_too_short +
167 port_stats->rx_dropped_header_too_small +
168 port_stats->rx_dropped_tcp_length +
169 port_stats->rx_dropped_runt +
170 port_stats->rx_tcp_checksum_errs +
171 port_stats->rx_ip_checksum_errs +
172 port_stats->rx_udp_checksum_errs;
173
174 /* no space in linux buffers: best possible approximation */
01ed30da
SP		 175 dev_stats->rx_dropped =
176 erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
6b7c5b94
SP		 177
178 /* detailed rx errors */
179 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
68110868
SP		 180 port_stats->rx_out_range_errors +
181 port_stats->rx_frame_too_long;
182
6b7c5b94
SP		 183 /* receive ring buffer overflow */
184 dev_stats->rx_over_errors = 0;
68110868 185
6b7c5b94
SP		 186 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
187
188 /* frame alignment errors */
189 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
68110868 190
6b7c5b94
SP		 191 /* receiver fifo overrun */
192 /* drops_no_pbuf is no per i/f, it's per BE card */
193 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
194 port_stats->rx_input_fifo_overflow +
195 rxf_stats->rx_drops_no_pbuf;
196 /* receiver missed packetd */
197 dev_stats->rx_missed_errors = 0;
68110868
SP		 198
199 /* packet transmit problems */
200 dev_stats->tx_errors = 0;
201
202 /* no space available in linux */
203 dev_stats->tx_dropped = 0;
204
c5b9b92e 205 dev_stats->multicast = port_stats->rx_multicast_frames;
68110868
SP		 206 dev_stats->collisions = 0;
207
6b7c5b94
SP		 208 /* detailed tx_errors */
209 dev_stats->tx_aborted_errors = 0;
210 dev_stats->tx_carrier_errors = 0;
211 dev_stats->tx_fifo_errors = 0;
212 dev_stats->tx_heartbeat_errors = 0;
213 dev_stats->tx_window_errors = 0;
214}
215
8788fdc2 216void be_link_status_update(struct be_adapter *adapter, bool link_up)
6b7c5b94 217{
6b7c5b94
SP		 218 struct net_device *netdev = adapter->netdev;
219
6b7c5b94 220 /* If link came up or went down */
a8f447bd 221 if (adapter->link_up != link_up) {
0dffc83e 222 adapter->link_speed = -1;
a8f447bd 223 if (link_up) {
6b7c5b94
SP		 224 netif_start_queue(netdev);
225 netif_carrier_on(netdev);
226 printk(KERN_INFO "%s: Link up\n", netdev->name);
a8f447bd
SP		 227 } else {
228 netif_stop_queue(netdev);
229 netif_carrier_off(netdev);
230 printk(KERN_INFO "%s: Link down\n", netdev->name);
6b7c5b94 231 }
a8f447bd 232 adapter->link_up = link_up;
6b7c5b94 233 }
6b7c5b94
SP		 234}
235
236/* Update the EQ delay n BE based on the RX frags consumed / sec */
237static void be_rx_eqd_update(struct be_adapter *adapter)
238{
6b7c5b94
SP		 239 struct be_eq_obj *rx_eq = &adapter->rx_eq;
240 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
4097f663
SP		 241 ulong now = jiffies;
242 u32 eqd;
243
244 if (!rx_eq->enable_aic)
245 return;
246
247 /* Wrapped around */
248 if (time_before(now, stats->rx_fps_jiffies)) {
249 stats->rx_fps_jiffies = now;
250 return;
251 }
6b7c5b94
SP		 252
253 /* Update once a second */
4097f663 254 if ((now - stats->rx_fps_jiffies) < HZ)
6b7c5b94
SP		 255 return;
256
257 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
4097f663 258 ((now - stats->rx_fps_jiffies) / HZ);
6b7c5b94 259
4097f663 260 stats->rx_fps_jiffies = now;
6b7c5b94
SP		 261 stats->be_prev_rx_frags = stats->be_rx_frags;
262 eqd = stats->be_rx_fps / 110000;
263 eqd = eqd << 3;
264 if (eqd > rx_eq->max_eqd)
265 eqd = rx_eq->max_eqd;
266 if (eqd < rx_eq->min_eqd)
267 eqd = rx_eq->min_eqd;
268 if (eqd < 10)
269 eqd = 0;
270 if (eqd != rx_eq->cur_eqd)
8788fdc2 271 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
6b7c5b94
SP		 272
273 rx_eq->cur_eqd = eqd;
274}
275
6b7c5b94
SP		 276static struct net_device_stats *be_get_stats(struct net_device *dev)
277{
78122a52 278 return &dev->stats;
6b7c5b94
SP		 279}
280
65f71b8b
SH		 281static u32 be_calc_rate(u64 bytes, unsigned long ticks)
282{
283 u64 rate = bytes;
284
285 do_div(rate, ticks / HZ);
286 rate <<= 3; /* bytes/sec -> bits/sec */
287 do_div(rate, 1000000ul); /* MB/Sec */
288
289 return rate;
290}
291
4097f663
SP		 292static void be_tx_rate_update(struct be_adapter *adapter)
293{
294 struct be_drvr_stats *stats = drvr_stats(adapter);
295 ulong now = jiffies;
296
297 /* Wrapped around? */
298 if (time_before(now, stats->be_tx_jiffies)) {
299 stats->be_tx_jiffies = now;
300 return;
301 }
302
303 /* Update tx rate once in two seconds */
304 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
65f71b8b
SH		 305 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
306 - stats->be_tx_bytes_prev,
307 now - stats->be_tx_jiffies);
4097f663
SP		 308 stats->be_tx_jiffies = now;
309 stats->be_tx_bytes_prev = stats->be_tx_bytes;
310 }
311}
312
6b7c5b94
SP		 313static void be_tx_stats_update(struct be_adapter *adapter,
314 u32 wrb_cnt, u32 copied, bool stopped)
315{
4097f663 316 struct be_drvr_stats *stats = drvr_stats(adapter);
6b7c5b94
SP		 317 stats->be_tx_reqs++;
318 stats->be_tx_wrbs += wrb_cnt;
319 stats->be_tx_bytes += copied;
320 if (stopped)
321 stats->be_tx_stops++;
6b7c5b94
SP		 322}
323
324/* Determine number of WRB entries needed to xmit data in an skb */
325static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
326{
ebc8d2ab
DM		 327 int cnt = (skb->len > skb->data_len);
328
329 cnt += skb_shinfo(skb)->nr_frags;
330
6b7c5b94
SP		 331 /* to account for hdr wrb */
332 cnt++;
333 if (cnt & 1) {
334 /* add a dummy to make it an even num */
335 cnt++;
336 *dummy = true;
337 } else
338 *dummy = false;
339 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
340 return cnt;
341}
342
343static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
344{
345 wrb->frag_pa_hi = upper_32_bits(addr);
346 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
347 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
348}
349
350static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
351 bool vlan, u32 wrb_cnt, u32 len)
352{
353 memset(hdr, 0, sizeof(*hdr));
354
355 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
356
357 if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
358 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
359 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
360 hdr, skb_shinfo(skb)->gso_size);
361 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
362 if (is_tcp_pkt(skb))
363 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
364 else if (is_udp_pkt(skb))
365 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
366 }
367
368 if (vlan && vlan_tx_tag_present(skb)) {
369 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
370 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
371 hdr, vlan_tx_tag_get(skb));
372 }
373
374 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
375 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
376 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
377 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
378}
379
380
381static int make_tx_wrbs(struct be_adapter *adapter,
382 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
383{
384 u64 busaddr;
385 u32 i, copied = 0;
386 struct pci_dev *pdev = adapter->pdev;
387 struct sk_buff *first_skb = skb;
388 struct be_queue_info *txq = &adapter->tx_obj.q;
389 struct be_eth_wrb *wrb;
390 struct be_eth_hdr_wrb *hdr;
391
6b7c5b94 392 hdr = queue_head_node(txq);
c190e3c8 393 atomic_add(wrb_cnt, &txq->used);
6b7c5b94
SP		 394 queue_head_inc(txq);
395
ebc8d2ab
DM		 396 if (skb->len > skb->data_len) {
397 int len = skb->len - skb->data_len;
a73b796e
AD		 398 busaddr = pci_map_single(pdev, skb->data, len,
399 PCI_DMA_TODEVICE);
ebc8d2ab
DM		 400 wrb = queue_head_node(txq);
401 wrb_fill(wrb, busaddr, len);
402 be_dws_cpu_to_le(wrb, sizeof(*wrb));
403 queue_head_inc(txq);
404 copied += len;
405 }
6b7c5b94 406
ebc8d2ab
DM		 407 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
408 struct skb_frag_struct *frag =
409 &skb_shinfo(skb)->frags[i];
a73b796e
AD		 410 busaddr = pci_map_page(pdev, frag->page,
411 frag->page_offset,
412 frag->size, PCI_DMA_TODEVICE);
ebc8d2ab
DM		 413 wrb = queue_head_node(txq);
414 wrb_fill(wrb, busaddr, frag->size);
415 be_dws_cpu_to_le(wrb, sizeof(*wrb));
416 queue_head_inc(txq);
417 copied += frag->size;
6b7c5b94
SP		 418 }
419
420 if (dummy_wrb) {
421 wrb = queue_head_node(txq);
422 wrb_fill(wrb, 0, 0);
423 be_dws_cpu_to_le(wrb, sizeof(*wrb));
424 queue_head_inc(txq);
425 }
426
427 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
428 wrb_cnt, copied);
429 be_dws_cpu_to_le(hdr, sizeof(*hdr));
430
431 return copied;
432}
433
61357325 434static netdev_tx_t be_xmit(struct sk_buff *skb,
b31c50a7 435 struct net_device *netdev)
6b7c5b94
SP		 436{
437 struct be_adapter *adapter = netdev_priv(netdev);
438 struct be_tx_obj *tx_obj = &adapter->tx_obj;
439 struct be_queue_info *txq = &tx_obj->q;
440 u32 wrb_cnt = 0, copied = 0;
441 u32 start = txq->head;
442 bool dummy_wrb, stopped = false;
443
444 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
445
446 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
c190e3c8
AK		 447 if (copied) {
448 /* record the sent skb in the sent_skb table */
449 BUG_ON(tx_obj->sent_skb_list[start]);
450 tx_obj->sent_skb_list[start] = skb;
451
452 /* Ensure txq has space for the next skb; Else stop the queue
453 * *BEFORE* ringing the tx doorbell, so that we serialze the
454 * tx compls of the current transmit which'll wake up the queue
455 */
456 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
457 txq->len) {
458 netif_stop_queue(netdev);
459 stopped = true;
460 }
6b7c5b94 461
c190e3c8 462 be_txq_notify(adapter, txq->id, wrb_cnt);
6b7c5b94 463
c190e3c8
AK		 464 be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
465 } else {
466 txq->head = start;
467 dev_kfree_skb_any(skb);
6b7c5b94 468 }
6b7c5b94
SP		 469 return NETDEV_TX_OK;
470}
471
472static int be_change_mtu(struct net_device *netdev, int new_mtu)
473{
474 struct be_adapter *adapter = netdev_priv(netdev);
475 if (new_mtu < BE_MIN_MTU ||
476 new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
477 dev_info(&adapter->pdev->dev,
478 "MTU must be between %d and %d bytes\n",
479 BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
480 return -EINVAL;
481 }
482 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
483 netdev->mtu, new_mtu);
484 netdev->mtu = new_mtu;
485 return 0;
486}
487
488/*
489 * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
490 * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
491 * set the BE in promiscuous VLAN mode.
492 */
b31c50a7 493static int be_vid_config(struct be_adapter *adapter)
6b7c5b94 494{
6b7c5b94
SP		 495 u16 vtag[BE_NUM_VLANS_SUPPORTED];
496 u16 ntags = 0, i;
b31c50a7 497 int status;
6b7c5b94
SP		 498
499 if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
500 /* Construct VLAN Table to give to HW */
501 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
502 if (adapter->vlan_tag[i]) {
503 vtag[ntags] = cpu_to_le16(i);
504 ntags++;
505 }
506 }
b31c50a7
SP		 507 status = be_cmd_vlan_config(adapter, adapter->if_handle,
508 vtag, ntags, 1, 0);
6b7c5b94 509 } else {
b31c50a7
SP		 510 status = be_cmd_vlan_config(adapter, adapter->if_handle,
511 NULL, 0, 1, 1);
6b7c5b94 512 }
b31c50a7 513 return status;
6b7c5b94
SP		 514}
515
516static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
517{
518 struct be_adapter *adapter = netdev_priv(netdev);
519 struct be_eq_obj *rx_eq = &adapter->rx_eq;
520 struct be_eq_obj *tx_eq = &adapter->tx_eq;
6b7c5b94 521
8788fdc2
SP		 522 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
523 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
6b7c5b94 524 adapter->vlan_grp = grp;
8788fdc2
SP		 525 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
526 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
6b7c5b94
SP		 527}
528
529static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
530{
531 struct be_adapter *adapter = netdev_priv(netdev);
532
533 adapter->num_vlans++;
534 adapter->vlan_tag[vid] = 1;
535
b31c50a7 536 be_vid_config(adapter);
6b7c5b94
SP		 537}
538
539static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
540{
541 struct be_adapter *adapter = netdev_priv(netdev);
542
543 adapter->num_vlans--;
544 adapter->vlan_tag[vid] = 0;
545
546 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
b31c50a7 547 be_vid_config(adapter);
6b7c5b94
SP		 548}
549
24307eef 550static void be_set_multicast_list(struct net_device *netdev)
6b7c5b94
SP		 551{
552 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94 553
24307eef 554 if (netdev->flags & IFF_PROMISC) {
8788fdc2 555 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
24307eef
SP		 556 adapter->promiscuous = true;
557 goto done;
6b7c5b94
SP		 558 }
559
24307eef
SP		 560 /* BE was previously in promiscous mode; disable it */
561 if (adapter->promiscuous) {
562 adapter->promiscuous = false;
8788fdc2 563 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
6b7c5b94
SP		 564 }
565
e7b909a6 566 /* Enable multicast promisc if num configured exceeds what we support */
4cd24eaf
JP		 567 if (netdev->flags & IFF_ALLMULTI ||
568 netdev_mc_count(netdev) > BE_MAX_MC) {
e7b909a6
SP		 569 be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
570 &adapter->mc_cmd_mem);
24307eef 571 goto done;
6b7c5b94 572 }
6b7c5b94 573
8788fdc2 574 be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
4cd24eaf 575 netdev_mc_count(netdev), &adapter->mc_cmd_mem);
24307eef
SP		 576done:
577 return;
6b7c5b94
SP		 578}
579
4097f663 580static void be_rx_rate_update(struct be_adapter *adapter)
6b7c5b94 581{
4097f663
SP		 582 struct be_drvr_stats *stats = drvr_stats(adapter);
583 ulong now = jiffies;
6b7c5b94 584
4097f663
SP		 585 /* Wrapped around */
586 if (time_before(now, stats->be_rx_jiffies)) {
587 stats->be_rx_jiffies = now;
588 return;
589 }
6b7c5b94
SP		 590
591 /* Update the rate once in two seconds */
4097f663 592 if ((now - stats->be_rx_jiffies) < 2 * HZ)
6b7c5b94
SP		 593 return;
594
65f71b8b
SH		 595 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
596 - stats->be_rx_bytes_prev,
597 now - stats->be_rx_jiffies);
4097f663 598 stats->be_rx_jiffies = now;
6b7c5b94
SP		 599 stats->be_rx_bytes_prev = stats->be_rx_bytes;
600}
601
4097f663
SP		 602static void be_rx_stats_update(struct be_adapter *adapter,
603 u32 pktsize, u16 numfrags)
604{
605 struct be_drvr_stats *stats = drvr_stats(adapter);
606
607 stats->be_rx_compl++;
608 stats->be_rx_frags += numfrags;
609 stats->be_rx_bytes += pktsize;
610}
611
728a9972
AK		 612static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
613{
614 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
615
616 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
617 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
618 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
619 if (ip_version) {
620 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
621 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
622 }
623 ipv6_chk = (ip_version && (tcpf || udpf));
624
625 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
626}
627
6b7c5b94
SP		 628static struct be_rx_page_info *
629get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
630{
631 struct be_rx_page_info *rx_page_info;
632 struct be_queue_info *rxq = &adapter->rx_obj.q;
633
634 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
635 BUG_ON(!rx_page_info->page);
636
637 if (rx_page_info->last_page_user)
638 pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
639 adapter->big_page_size, PCI_DMA_FROMDEVICE);
640
641 atomic_dec(&rxq->used);
642 return rx_page_info;
643}
644
645/* Throwaway the data in the Rx completion */
646static void be_rx_compl_discard(struct be_adapter *adapter,
647 struct be_eth_rx_compl *rxcp)
648{
649 struct be_queue_info *rxq = &adapter->rx_obj.q;
650 struct be_rx_page_info *page_info;
651 u16 rxq_idx, i, num_rcvd;
652
653 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
654 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
655
656 for (i = 0; i < num_rcvd; i++) {
657 page_info = get_rx_page_info(adapter, rxq_idx);
658 put_page(page_info->page);
659 memset(page_info, 0, sizeof(*page_info));
660 index_inc(&rxq_idx, rxq->len);
661 }
662}
663
664/*
665 * skb_fill_rx_data forms a complete skb for an ether frame
666 * indicated by rxcp.
667 */
668static void skb_fill_rx_data(struct be_adapter *adapter,
669 struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
670{
671 struct be_queue_info *rxq = &adapter->rx_obj.q;
672 struct be_rx_page_info *page_info;
bd46cb6c 673 u16 rxq_idx, i, num_rcvd, j;
fa77406a 674 u32 pktsize, hdr_len, curr_frag_len, size;
6b7c5b94
SP		 675 u8 *start;
676
677 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
678 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
679 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
680
681 page_info = get_rx_page_info(adapter, rxq_idx);
682
683 start = page_address(page_info->page) + page_info->page_offset;
684 prefetch(start);
685
686 /* Copy data in the first descriptor of this completion */
687 curr_frag_len = min(pktsize, rx_frag_size);
688
689 /* Copy the header portion into skb_data */
690 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
691 memcpy(skb->data, start, hdr_len);
692 skb->len = curr_frag_len;
693 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
694 /* Complete packet has now been moved to data */
695 put_page(page_info->page);
696 skb->data_len = 0;
697 skb->tail += curr_frag_len;
698 } else {
699 skb_shinfo(skb)->nr_frags = 1;
700 skb_shinfo(skb)->frags[0].page = page_info->page;
701 skb_shinfo(skb)->frags[0].page_offset =
702 page_info->page_offset + hdr_len;
703 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
704 skb->data_len = curr_frag_len - hdr_len;
705 skb->tail += hdr_len;
706 }
707 memset(page_info, 0, sizeof(*page_info));
708
709 if (pktsize <= rx_frag_size) {
710 BUG_ON(num_rcvd != 1);
76fbb429 711 goto done;
6b7c5b94
SP		 712 }
713
714 /* More frags present for this completion */
fa77406a 715 size = pktsize;
bd46cb6c 716 for (i = 1, j = 0; i < num_rcvd; i++) {
fa77406a 717 size -= curr_frag_len;
6b7c5b94
SP		 718 index_inc(&rxq_idx, rxq->len);
719 page_info = get_rx_page_info(adapter, rxq_idx);
720
fa77406a 721 curr_frag_len = min(size, rx_frag_size);
6b7c5b94 722
bd46cb6c
AK		 723 /* Coalesce all frags from the same physical page in one slot */
724 if (page_info->page_offset == 0) {
725 /* Fresh page */
726 j++;
727 skb_shinfo(skb)->frags[j].page = page_info->page;
728 skb_shinfo(skb)->frags[j].page_offset =
729 page_info->page_offset;
730 skb_shinfo(skb)->frags[j].size = 0;
731 skb_shinfo(skb)->nr_frags++;
732 } else {
733 put_page(page_info->page);
734 }
735
736 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94
SP		 737 skb->len += curr_frag_len;
738 skb->data_len += curr_frag_len;
6b7c5b94
SP		 739
740 memset(page_info, 0, sizeof(*page_info));
741 }
bd46cb6c 742 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 743
76fbb429 744done:
4097f663 745 be_rx_stats_update(adapter, pktsize, num_rcvd);
6b7c5b94
SP		 746 return;
747}
748
5be93b9a 749/* Process the RX completion indicated by rxcp when GRO is disabled */
6b7c5b94
SP		 750static void be_rx_compl_process(struct be_adapter *adapter,
751 struct be_eth_rx_compl *rxcp)
752{
753 struct sk_buff *skb;
dcb9b564
AK		 754 u32 vlanf, vid;
755 u8 vtm;
6b7c5b94 756
dcb9b564
AK		 757 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
758 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
759
760 /* vlanf could be wrongly set in some cards.
761 * ignore if vtm is not set */
e1187b3b 762 if ((adapter->cap & 0x400) && !vtm)
dcb9b564 763 vlanf = 0;
6b7c5b94 764
89d71a66 765 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
6b7c5b94
SP		 766 if (!skb) {
767 if (net_ratelimit())
768 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
769 be_rx_compl_discard(adapter, rxcp);
770 return;
771 }
772
6b7c5b94
SP		 773 skb_fill_rx_data(adapter, skb, rxcp);
774
728a9972 775 if (do_pkt_csum(rxcp, adapter->rx_csum))
6b7c5b94 776 skb->ip_summed = CHECKSUM_NONE;
728a9972
AK		 777 else
778 skb->ip_summed = CHECKSUM_UNNECESSARY;
6b7c5b94
SP		 779
780 skb->truesize = skb->len + sizeof(struct sk_buff);
781 skb->protocol = eth_type_trans(skb, adapter->netdev);
782 skb->dev = adapter->netdev;
783
dcb9b564 784 if (vlanf) {
6b7c5b94
SP		 785 if (!adapter->vlan_grp || adapter->num_vlans == 0) {
786 kfree_skb(skb);
787 return;
788 }
789 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
790 vid = be16_to_cpu(vid);
791 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
792 } else {
793 netif_receive_skb(skb);
794 }
795
6b7c5b94
SP		 796 return;
797}
798
5be93b9a
AK		 799/* Process the RX completion indicated by rxcp when GRO is enabled */
800static void be_rx_compl_process_gro(struct be_adapter *adapter,
6b7c5b94
SP		 801 struct be_eth_rx_compl *rxcp)
802{
803 struct be_rx_page_info *page_info;
5be93b9a 804 struct sk_buff *skb = NULL;
6b7c5b94 805 struct be_queue_info *rxq = &adapter->rx_obj.q;
5be93b9a 806 struct be_eq_obj *eq_obj = &adapter->rx_eq;
6b7c5b94 807 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
bd46cb6c 808 u16 i, rxq_idx = 0, vid, j;
dcb9b564 809 u8 vtm;
6b7c5b94
SP		 810
811 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
812 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
813 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
814 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
dcb9b564
AK		 815 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
816
817 /* vlanf could be wrongly set in some cards.
818 * ignore if vtm is not set */
e1187b3b 819 if ((adapter->cap & 0x400) && !vtm)
dcb9b564 820 vlanf = 0;
6b7c5b94 821
5be93b9a
AK		 822 skb = napi_get_frags(&eq_obj->napi);
823 if (!skb) {
824 be_rx_compl_discard(adapter, rxcp);
825 return;
826 }
827
6b7c5b94 828 remaining = pkt_size;
bd46cb6c 829 for (i = 0, j = -1; i < num_rcvd; i++) {
6b7c5b94
SP		 830 page_info = get_rx_page_info(adapter, rxq_idx);
831
832 curr_frag_len = min(remaining, rx_frag_size);
833
bd46cb6c
AK		 834 /* Coalesce all frags from the same physical page in one slot */
835 if (i == 0 || page_info->page_offset == 0) {
836 /* First frag or Fresh page */
837 j++;
5be93b9a
AK		 838 skb_shinfo(skb)->frags[j].page = page_info->page;
839 skb_shinfo(skb)->frags[j].page_offset =
840 page_info->page_offset;
841 skb_shinfo(skb)->frags[j].size = 0;
bd46cb6c
AK		 842 } else {
843 put_page(page_info->page);
844 }
5be93b9a 845 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94 846
bd46cb6c 847 remaining -= curr_frag_len;
6b7c5b94 848 index_inc(&rxq_idx, rxq->len);
6b7c5b94
SP		 849 memset(page_info, 0, sizeof(*page_info));
850 }
bd46cb6c 851 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 852
5be93b9a
AK		 853 skb_shinfo(skb)->nr_frags = j + 1;
854 skb->len = pkt_size;
855 skb->data_len = pkt_size;
856 skb->truesize += pkt_size;
857 skb->ip_summed = CHECKSUM_UNNECESSARY;
858
6b7c5b94 859 if (likely(!vlanf)) {
5be93b9a 860 napi_gro_frags(&eq_obj->napi);
6b7c5b94
SP		 861 } else {
862 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
863 vid = be16_to_cpu(vid);
864
865 if (!adapter->vlan_grp || adapter->num_vlans == 0)
866 return;
867
5be93b9a 868 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
6b7c5b94
SP		 869 }
870
4097f663 871 be_rx_stats_update(adapter, pkt_size, num_rcvd);
6b7c5b94
SP		 872 return;
873}
874
875static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
876{
877 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
878
879 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
880 return NULL;
881
882 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
883
6b7c5b94
SP		 884 queue_tail_inc(&adapter->rx_obj.cq);
885 return rxcp;
886}
887
a7a0ef31
SP		 888/* To reset the valid bit, we need to reset the whole word as
889 * when walking the queue the valid entries are little-endian
890 * and invalid entries are host endian
891 */
892static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
893{
894 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
895}
896
6b7c5b94
SP		 897static inline struct page *be_alloc_pages(u32 size)
898{
899 gfp_t alloc_flags = GFP_ATOMIC;
900 u32 order = get_order(size);
901 if (order > 0)
902 alloc_flags |= __GFP_COMP;
903 return alloc_pages(alloc_flags, order);
904}
905
906/*
907 * Allocate a page, split it to fragments of size rx_frag_size and post as
908 * receive buffers to BE
909 */
910static void be_post_rx_frags(struct be_adapter *adapter)
911{
912 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
26d92f92 913 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
6b7c5b94
SP		 914 struct be_queue_info *rxq = &adapter->rx_obj.q;
915 struct page *pagep = NULL;
916 struct be_eth_rx_d *rxd;
917 u64 page_dmaaddr = 0, frag_dmaaddr;
918 u32 posted, page_offset = 0;
919
6b7c5b94
SP		 920 page_info = &page_info_tbl[rxq->head];
921 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
922 if (!pagep) {
923 pagep = be_alloc_pages(adapter->big_page_size);
924 if (unlikely(!pagep)) {
925 drvr_stats(adapter)->be_ethrx_post_fail++;
926 break;
927 }
928 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
929 adapter->big_page_size,
930 PCI_DMA_FROMDEVICE);
931 page_info->page_offset = 0;
932 } else {
933 get_page(pagep);
934 page_info->page_offset = page_offset + rx_frag_size;
935 }
936 page_offset = page_info->page_offset;
937 page_info->page = pagep;
938 pci_unmap_addr_set(page_info, bus, page_dmaaddr);
939 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
940
941 rxd = queue_head_node(rxq);
942 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
943 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
6b7c5b94
SP		 944
945 /* Any space left in the current big page for another frag? */
946 if ((page_offset + rx_frag_size + rx_frag_size) >
947 adapter->big_page_size) {
948 pagep = NULL;
949 page_info->last_page_user = true;
950 }
26d92f92
SP		 951
952 prev_page_info = page_info;
953 queue_head_inc(rxq);
6b7c5b94
SP		 954 page_info = &page_info_tbl[rxq->head];
955 }
956 if (pagep)
26d92f92 957 prev_page_info->last_page_user = true;
6b7c5b94
SP		 958
959 if (posted) {
6b7c5b94 960 atomic_add(posted, &rxq->used);
8788fdc2 961 be_rxq_notify(adapter, rxq->id, posted);
ea1dae11
SP		 962 } else if (atomic_read(&rxq->used) == 0) {
963 /* Let be_worker replenish when memory is available */
964 adapter->rx_post_starved = true;
6b7c5b94
SP		 965 }
966
967 return;
968}
969
5fb379ee 970static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
6b7c5b94 971{
6b7c5b94
SP		 972 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
973
974 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
975 return NULL;
976
977 be_dws_le_to_cpu(txcp, sizeof(*txcp));
978
979 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
980
981 queue_tail_inc(tx_cq);
982 return txcp;
983}
984
985static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
986{
987 struct be_queue_info *txq = &adapter->tx_obj.q;
a73b796e 988 struct be_eth_wrb *wrb;
6b7c5b94
SP		 989 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
990 struct sk_buff *sent_skb;
a73b796e 991 u64 busaddr;
6b7c5b94
SP		 992 u16 cur_index, num_wrbs = 0;
993
994 cur_index = txq->tail;
995 sent_skb = sent_skbs[cur_index];
996 BUG_ON(!sent_skb);
997 sent_skbs[cur_index] = NULL;
a73b796e
AD		 998 wrb = queue_tail_node(txq);
999 be_dws_le_to_cpu(wrb, sizeof(*wrb));
1000 busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
1001 if (busaddr != 0) {
1002 pci_unmap_single(adapter->pdev, busaddr,
1003 wrb->frag_len, PCI_DMA_TODEVICE);
1004 }
1005 num_wrbs++;
1006 queue_tail_inc(txq);
6b7c5b94 1007
a73b796e 1008 while (cur_index != last_index) {
6b7c5b94 1009 cur_index = txq->tail;
a73b796e
AD		 1010 wrb = queue_tail_node(txq);
1011 be_dws_le_to_cpu(wrb, sizeof(*wrb));
1012 busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
1013 if (busaddr != 0) {
1014 pci_unmap_page(adapter->pdev, busaddr,
1015 wrb->frag_len, PCI_DMA_TODEVICE);
1016 }
6b7c5b94
SP		 1017 num_wrbs++;
1018 queue_tail_inc(txq);
a73b796e 1019 }
6b7c5b94
SP		 1020
1021 atomic_sub(num_wrbs, &txq->used);
a73b796e 1022
6b7c5b94
SP		 1023 kfree_skb(sent_skb);
1024}
1025
859b1e4e
SP		 1026static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1027{
1028 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1029
1030 if (!eqe->evt)
1031 return NULL;
1032
1033 eqe->evt = le32_to_cpu(eqe->evt);
1034 queue_tail_inc(&eq_obj->q);
1035 return eqe;
1036}
1037
1038static int event_handle(struct be_adapter *adapter,
1039 struct be_eq_obj *eq_obj)
1040{
1041 struct be_eq_entry *eqe;
1042 u16 num = 0;
1043
1044 while ((eqe = event_get(eq_obj)) != NULL) {
1045 eqe->evt = 0;
1046 num++;
1047 }
1048
1049 /* Deal with any spurious interrupts that come
1050 * without events
1051 */
1052 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1053 if (num)
1054 napi_schedule(&eq_obj->napi);
1055
1056 return num;
1057}
1058
1059/* Just read and notify events without processing them.
1060 * Used at the time of destroying event queues */
1061static void be_eq_clean(struct be_adapter *adapter,
1062 struct be_eq_obj *eq_obj)
1063{
1064 struct be_eq_entry *eqe;
1065 u16 num = 0;
1066
1067 while ((eqe = event_get(eq_obj)) != NULL) {
1068 eqe->evt = 0;
1069 num++;
1070 }
1071
1072 if (num)
1073 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1074}
1075
6b7c5b94
SP		 1076static void be_rx_q_clean(struct be_adapter *adapter)
1077{
1078 struct be_rx_page_info *page_info;
1079 struct be_queue_info *rxq = &adapter->rx_obj.q;
1080 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1081 struct be_eth_rx_compl *rxcp;
1082 u16 tail;
1083
1084 /* First cleanup pending rx completions */
1085 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1086 be_rx_compl_discard(adapter, rxcp);
a7a0ef31 1087 be_rx_compl_reset(rxcp);
8788fdc2 1088 be_cq_notify(adapter, rx_cq->id, true, 1);
6b7c5b94
SP		 1089 }
1090
1091 /* Then free posted rx buffer that were not used */
1092 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
cdab23b7 1093 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
6b7c5b94
SP		 1094 page_info = get_rx_page_info(adapter, tail);
1095 put_page(page_info->page);
1096 memset(page_info, 0, sizeof(*page_info));
1097 }
1098 BUG_ON(atomic_read(&rxq->used));
1099}
1100
a8e9179a 1101static void be_tx_compl_clean(struct be_adapter *adapter)
6b7c5b94 1102{
a8e9179a 1103 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94 1104 struct be_queue_info *txq = &adapter->tx_obj.q;
a8e9179a
SP		 1105 struct be_eth_tx_compl *txcp;
1106 u16 end_idx, cmpl = 0, timeo = 0;
1107
1108 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1109 do {
1110 while ((txcp = be_tx_compl_get(tx_cq))) {
1111 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1112 wrb_index, txcp);
1113 be_tx_compl_process(adapter, end_idx);
1114 cmpl++;
1115 }
1116 if (cmpl) {
1117 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1118 cmpl = 0;
1119 }
1120
1121 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1122 break;
1123
1124 mdelay(1);
1125 } while (true);
1126
1127 if (atomic_read(&txq->used))
1128 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1129 atomic_read(&txq->used));
6b7c5b94
SP		 1130}
1131
5fb379ee
SP		 1132static void be_mcc_queues_destroy(struct be_adapter *adapter)
1133{
1134 struct be_queue_info *q;
5fb379ee 1135
8788fdc2 1136 q = &adapter->mcc_obj.q;
5fb379ee 1137 if (q->created)
8788fdc2 1138 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
5fb379ee
SP		 1139 be_queue_free(adapter, q);
1140
8788fdc2 1141 q = &adapter->mcc_obj.cq;
5fb379ee 1142 if (q->created)
8788fdc2 1143 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
5fb379ee
SP		 1144 be_queue_free(adapter, q);
1145}
1146
1147/* Must be called only after TX qs are created as MCC shares TX EQ */
1148static int be_mcc_queues_create(struct be_adapter *adapter)
1149{
1150 struct be_queue_info *q, *cq;
5fb379ee
SP		 1151
1152 /* Alloc MCC compl queue */
8788fdc2 1153 cq = &adapter->mcc_obj.cq;
5fb379ee 1154 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
efd2e40a 1155 sizeof(struct be_mcc_compl)))
5fb379ee
SP		 1156 goto err;
1157
1158 /* Ask BE to create MCC compl queue; share TX's eq */
8788fdc2 1159 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
5fb379ee
SP		 1160 goto mcc_cq_free;
1161
1162 /* Alloc MCC queue */
8788fdc2 1163 q = &adapter->mcc_obj.q;
5fb379ee
SP		 1164 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1165 goto mcc_cq_destroy;
1166
1167 /* Ask BE to create MCC queue */
8788fdc2 1168 if (be_cmd_mccq_create(adapter, q, cq))
5fb379ee
SP		 1169 goto mcc_q_free;
1170
1171 return 0;
1172
1173mcc_q_free:
1174 be_queue_free(adapter, q);
1175mcc_cq_destroy:
8788fdc2 1176 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
5fb379ee
SP		 1177mcc_cq_free:
1178 be_queue_free(adapter, cq);
1179err:
1180 return -1;
1181}
1182
6b7c5b94
SP		 1183static void be_tx_queues_destroy(struct be_adapter *adapter)
1184{
1185 struct be_queue_info *q;
1186
1187 q = &adapter->tx_obj.q;
a8e9179a 1188 if (q->created)
8788fdc2 1189 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
6b7c5b94
SP		 1190 be_queue_free(adapter, q);
1191
1192 q = &adapter->tx_obj.cq;
1193 if (q->created)
8788fdc2 1194 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1195 be_queue_free(adapter, q);
1196
859b1e4e
SP		 1197 /* Clear any residual events */
1198 be_eq_clean(adapter, &adapter->tx_eq);
1199
6b7c5b94
SP		 1200 q = &adapter->tx_eq.q;
1201 if (q->created)
8788fdc2 1202 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1203 be_queue_free(adapter, q);
1204}
1205
1206static int be_tx_queues_create(struct be_adapter *adapter)
1207{
1208 struct be_queue_info *eq, *q, *cq;
1209
1210 adapter->tx_eq.max_eqd = 0;
1211 adapter->tx_eq.min_eqd = 0;
1212 adapter->tx_eq.cur_eqd = 96;
1213 adapter->tx_eq.enable_aic = false;
1214 /* Alloc Tx Event queue */
1215 eq = &adapter->tx_eq.q;
1216 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1217 return -1;
1218
1219 /* Ask BE to create Tx Event queue */
8788fdc2 1220 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
6b7c5b94
SP		 1221 goto tx_eq_free;
1222 /* Alloc TX eth compl queue */
1223 cq = &adapter->tx_obj.cq;
1224 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1225 sizeof(struct be_eth_tx_compl)))
1226 goto tx_eq_destroy;
1227
1228 /* Ask BE to create Tx eth compl queue */
8788fdc2 1229 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
6b7c5b94
SP		 1230 goto tx_cq_free;
1231
1232 /* Alloc TX eth queue */
1233 q = &adapter->tx_obj.q;
1234 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1235 goto tx_cq_destroy;
1236
1237 /* Ask BE to create Tx eth queue */
8788fdc2 1238 if (be_cmd_txq_create(adapter, q, cq))
6b7c5b94
SP		 1239 goto tx_q_free;
1240 return 0;
1241
1242tx_q_free:
1243 be_queue_free(adapter, q);
1244tx_cq_destroy:
8788fdc2 1245 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1246tx_cq_free:
1247 be_queue_free(adapter, cq);
1248tx_eq_destroy:
8788fdc2 1249 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1250tx_eq_free:
1251 be_queue_free(adapter, eq);
1252 return -1;
1253}
1254
1255static void be_rx_queues_destroy(struct be_adapter *adapter)
1256{
1257 struct be_queue_info *q;
1258
1259 q = &adapter->rx_obj.q;
1260 if (q->created) {
8788fdc2 1261 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
6b7c5b94
SP		 1262 be_rx_q_clean(adapter);
1263 }
1264 be_queue_free(adapter, q);
1265
1266 q = &adapter->rx_obj.cq;
1267 if (q->created)
8788fdc2 1268 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1269 be_queue_free(adapter, q);
1270
859b1e4e
SP		 1271 /* Clear any residual events */
1272 be_eq_clean(adapter, &adapter->rx_eq);
1273
6b7c5b94
SP		 1274 q = &adapter->rx_eq.q;
1275 if (q->created)
8788fdc2 1276 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1277 be_queue_free(adapter, q);
1278}
1279
1280static int be_rx_queues_create(struct be_adapter *adapter)
1281{
1282 struct be_queue_info *eq, *q, *cq;
1283 int rc;
1284
6b7c5b94
SP		 1285 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1286 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1287 adapter->rx_eq.min_eqd = 0;
1288 adapter->rx_eq.cur_eqd = 0;
1289 adapter->rx_eq.enable_aic = true;
1290
1291 /* Alloc Rx Event queue */
1292 eq = &adapter->rx_eq.q;
1293 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1294 sizeof(struct be_eq_entry));
1295 if (rc)
1296 return rc;
1297
1298 /* Ask BE to create Rx Event queue */
8788fdc2 1299 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
6b7c5b94
SP		 1300 if (rc)
1301 goto rx_eq_free;
1302
1303 /* Alloc RX eth compl queue */
1304 cq = &adapter->rx_obj.cq;
1305 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1306 sizeof(struct be_eth_rx_compl));
1307 if (rc)
1308 goto rx_eq_destroy;
1309
1310 /* Ask BE to create Rx eth compl queue */
8788fdc2 1311 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
6b7c5b94
SP		 1312 if (rc)
1313 goto rx_cq_free;
1314
1315 /* Alloc RX eth queue */
1316 q = &adapter->rx_obj.q;
1317 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1318 if (rc)
1319 goto rx_cq_destroy;
1320
1321 /* Ask BE to create Rx eth queue */
8788fdc2 1322 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
6b7c5b94
SP		 1323 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1324 if (rc)
1325 goto rx_q_free;
1326
1327 return 0;
1328rx_q_free:
1329 be_queue_free(adapter, q);
1330rx_cq_destroy:
8788fdc2 1331 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1332rx_cq_free:
1333 be_queue_free(adapter, cq);
1334rx_eq_destroy:
8788fdc2 1335 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1336rx_eq_free:
1337 be_queue_free(adapter, eq);
1338 return rc;
1339}
6b7c5b94 1340
b628bde2
SP		 1341/* There are 8 evt ids per func. Retruns the evt id's bit number */
1342static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1343{
1344 return eq_id - 8 * be_pci_func(adapter);
1345}
1346
6b7c5b94
SP		 1347static irqreturn_t be_intx(int irq, void *dev)
1348{
1349 struct be_adapter *adapter = dev;
8788fdc2 1350 int isr;
6b7c5b94 1351
8788fdc2 1352 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
55bdeed9 1353 (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
c001c213 1354 if (!isr)
8788fdc2 1355 return IRQ_NONE;
6b7c5b94 1356
8788fdc2
SP		 1357 event_handle(adapter, &adapter->tx_eq);
1358 event_handle(adapter, &adapter->rx_eq);
c001c213 1359
8788fdc2 1360 return IRQ_HANDLED;
6b7c5b94
SP		 1361}
1362
1363static irqreturn_t be_msix_rx(int irq, void *dev)
1364{
1365 struct be_adapter *adapter = dev;
1366
8788fdc2 1367 event_handle(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1368
1369 return IRQ_HANDLED;
1370}
1371
5fb379ee 1372static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
6b7c5b94
SP		 1373{
1374 struct be_adapter *adapter = dev;
1375
8788fdc2 1376 event_handle(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1377
1378 return IRQ_HANDLED;
1379}
1380
5be93b9a 1381static inline bool do_gro(struct be_adapter *adapter,
6b7c5b94
SP		 1382 struct be_eth_rx_compl *rxcp)
1383{
1384 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1385 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1386
1387 if (err)
1388 drvr_stats(adapter)->be_rxcp_err++;
1389
5be93b9a 1390 return (tcp_frame && !err) ? true : false;
6b7c5b94
SP		 1391}
1392
1393int be_poll_rx(struct napi_struct *napi, int budget)
1394{
1395 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1396 struct be_adapter *adapter =
1397 container_of(rx_eq, struct be_adapter, rx_eq);
1398 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1399 struct be_eth_rx_compl *rxcp;
1400 u32 work_done;
1401
b7b83ac3 1402 adapter->stats.drvr_stats.be_rx_polls++;
6b7c5b94
SP		 1403 for (work_done = 0; work_done < budget; work_done++) {
1404 rxcp = be_rx_compl_get(adapter);
1405 if (!rxcp)
1406 break;
1407
5be93b9a
AK		 1408 if (do_gro(adapter, rxcp))
1409 be_rx_compl_process_gro(adapter, rxcp);
6b7c5b94
SP		 1410 else
1411 be_rx_compl_process(adapter, rxcp);
a7a0ef31
SP		 1412
1413 be_rx_compl_reset(rxcp);
6b7c5b94
SP		 1414 }
1415
6b7c5b94
SP		 1416 /* Refill the queue */
1417 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1418 be_post_rx_frags(adapter);
1419
1420 /* All consumed */
1421 if (work_done < budget) {
1422 napi_complete(napi);
8788fdc2 1423 be_cq_notify(adapter, rx_cq->id, true, work_done);
6b7c5b94
SP		 1424 } else {
1425 /* More to be consumed; continue with interrupts disabled */
8788fdc2 1426 be_cq_notify(adapter, rx_cq->id, false, work_done);
6b7c5b94
SP		 1427 }
1428 return work_done;
1429}
1430
5fb379ee 1431void be_process_tx(struct be_adapter *adapter)
6b7c5b94 1432{
5fb379ee
SP		 1433 struct be_queue_info *txq = &adapter->tx_obj.q;
1434 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94
SP		 1435 struct be_eth_tx_compl *txcp;
1436 u32 num_cmpl = 0;
1437 u16 end_idx;
1438
5fb379ee 1439 while ((txcp = be_tx_compl_get(tx_cq))) {
6b7c5b94
SP		 1440 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1441 wrb_index, txcp);
1442 be_tx_compl_process(adapter, end_idx);
1443 num_cmpl++;
1444 }
1445
5fb379ee 1446 if (num_cmpl) {
8788fdc2 1447 be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
5fb379ee
SP		 1448
1449 /* As Tx wrbs have been freed up, wake up netdev queue if
1450 * it was stopped due to lack of tx wrbs.
1451 */
1452 if (netif_queue_stopped(adapter->netdev) &&
6b7c5b94 1453 atomic_read(&txq->used) < txq->len / 2) {
5fb379ee
SP		 1454 netif_wake_queue(adapter->netdev);
1455 }
1456
1457 drvr_stats(adapter)->be_tx_events++;
1458 drvr_stats(adapter)->be_tx_compl += num_cmpl;
6b7c5b94 1459 }
5fb379ee
SP		 1460}
1461
1462/* As TX and MCC share the same EQ check for both TX and MCC completions.
1463 * For TX/MCC we don't honour budget; consume everything
1464 */
1465static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1466{
1467 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1468 struct be_adapter *adapter =
1469 container_of(tx_eq, struct be_adapter, tx_eq);
6b7c5b94
SP		 1470
1471 napi_complete(napi);
1472
5fb379ee 1473 be_process_tx(adapter);
6b7c5b94 1474
8788fdc2 1475 be_process_mcc(adapter);
6b7c5b94
SP		 1476
1477 return 1;
1478}
1479
ea1dae11
SP		 1480static void be_worker(struct work_struct *work)
1481{
1482 struct be_adapter *adapter =
1483 container_of(work, struct be_adapter, work.work);
ea1dae11 1484
b31c50a7 1485 be_cmd_get_stats(adapter, &adapter->stats.cmd);
ea1dae11
SP		 1486
1487 /* Set EQ delay */
1488 be_rx_eqd_update(adapter);
1489
4097f663
SP		 1490 be_tx_rate_update(adapter);
1491 be_rx_rate_update(adapter);
1492
ea1dae11
SP		 1493 if (adapter->rx_post_starved) {
1494 adapter->rx_post_starved = false;
1495 be_post_rx_frags(adapter);
1496 }
1497
1498 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1499}
1500
8d56ff11
SP		 1501static void be_msix_disable(struct be_adapter *adapter)
1502{
1503 if (adapter->msix_enabled) {
1504 pci_disable_msix(adapter->pdev);
1505 adapter->msix_enabled = false;
1506 }
1507}
1508
6b7c5b94
SP		 1509static void be_msix_enable(struct be_adapter *adapter)
1510{
1511 int i, status;
1512
1513 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1514 adapter->msix_entries[i].entry = i;
1515
1516 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1517 BE_NUM_MSIX_VECTORS);
1518 if (status == 0)
1519 adapter->msix_enabled = true;
1520 return;
1521}
1522
1523static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1524{
b628bde2
SP		 1525 return adapter->msix_entries[
1526 be_evt_bit_get(adapter, eq_id)].vector;
6b7c5b94
SP		 1527}
1528
b628bde2
SP		 1529static int be_request_irq(struct be_adapter *adapter,
1530 struct be_eq_obj *eq_obj,
1531 void *handler, char *desc)
6b7c5b94
SP		 1532{
1533 struct net_device *netdev = adapter->netdev;
b628bde2
SP		 1534 int vec;
1535
1536 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1537 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1538 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1539}
1540
1541static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1542{
1543 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1544 free_irq(vec, adapter);
1545}
6b7c5b94 1546
b628bde2
SP		 1547static int be_msix_register(struct be_adapter *adapter)
1548{
1549 int status;
1550
1551 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
6b7c5b94
SP		 1552 if (status)
1553 goto err;
1554
b628bde2
SP		 1555 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1556 if (status)
1557 goto free_tx_irq;
1558
6b7c5b94 1559 return 0;
b628bde2
SP		 1560
1561free_tx_irq:
1562 be_free_irq(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1563err:
1564 dev_warn(&adapter->pdev->dev,
1565 "MSIX Request IRQ failed - err %d\n", status);
1566 pci_disable_msix(adapter->pdev);
1567 adapter->msix_enabled = false;
1568 return status;
1569}
1570
1571static int be_irq_register(struct be_adapter *adapter)
1572{
1573 struct net_device *netdev = adapter->netdev;
1574 int status;
1575
1576 if (adapter->msix_enabled) {
1577 status = be_msix_register(adapter);
1578 if (status == 0)
1579 goto done;
1580 }
1581
1582 /* INTx */
1583 netdev->irq = adapter->pdev->irq;
1584 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1585 adapter);
1586 if (status) {
1587 dev_err(&adapter->pdev->dev,
1588 "INTx request IRQ failed - err %d\n", status);
1589 return status;
1590 }
1591done:
1592 adapter->isr_registered = true;
1593 return 0;
1594}
1595
1596static void be_irq_unregister(struct be_adapter *adapter)
1597{
1598 struct net_device *netdev = adapter->netdev;
6b7c5b94
SP		 1599
1600 if (!adapter->isr_registered)
1601 return;
1602
1603 /* INTx */
1604 if (!adapter->msix_enabled) {
1605 free_irq(netdev->irq, adapter);
1606 goto done;
1607 }
1608
1609 /* MSIx */
b628bde2
SP		 1610 be_free_irq(adapter, &adapter->tx_eq);
1611 be_free_irq(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1612done:
1613 adapter->isr_registered = false;
1614 return;
1615}
1616
1617static int be_open(struct net_device *netdev)
1618{
1619 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1620 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1621 struct be_eq_obj *tx_eq = &adapter->tx_eq;
a8f447bd
SP		 1622 bool link_up;
1623 int status;
0388f251
SB		 1624 u8 mac_speed;
1625 u16 link_speed;
5fb379ee
SP		 1626
1627 /* First time posting */
1628 be_post_rx_frags(adapter);
1629
1630 napi_enable(&rx_eq->napi);
1631 napi_enable(&tx_eq->napi);
1632
1633 be_irq_register(adapter);
1634
8788fdc2 1635 be_intr_set(adapter, true);
5fb379ee
SP		 1636
1637 /* The evt queues are created in unarmed state; arm them */
8788fdc2
SP		 1638 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
1639 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
5fb379ee
SP		 1640
1641 /* Rx compl queue may be in unarmed state; rearm it */
8788fdc2 1642 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
5fb379ee 1643
0388f251
SB		 1644 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
1645 &link_speed);
a8f447bd 1646 if (status)
4f2aa89c 1647 goto ret_sts;
a8f447bd 1648 be_link_status_update(adapter, link_up);
5fb379ee 1649
4f2aa89c
AK		 1650 status = be_vid_config(adapter);
1651 if (status)
1652 goto ret_sts;
1653
1654 status = be_cmd_set_flow_control(adapter,
1655 adapter->tx_fc, adapter->rx_fc);
1656 if (status)
1657 goto ret_sts;
1658
5fb379ee 1659 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
4f2aa89c
AK		 1660ret_sts:
1661 return status;
5fb379ee
SP		 1662}
1663
71d8d1b5
AK		 1664static int be_setup_wol(struct be_adapter *adapter, bool enable)
1665{
1666 struct be_dma_mem cmd;
1667 int status = 0;
1668 u8 mac[ETH_ALEN];
1669
1670 memset(mac, 0, ETH_ALEN);
1671
1672 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
1673 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
1674 if (cmd.va == NULL)
1675 return -1;
1676 memset(cmd.va, 0, cmd.size);
1677
1678 if (enable) {
1679 status = pci_write_config_dword(adapter->pdev,
1680 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
1681 if (status) {
1682 dev_err(&adapter->pdev->dev,
1683 "Could not enable Wake-on-lan \n");
1684 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
1685 cmd.dma);
1686 return status;
1687 }
1688 status = be_cmd_enable_magic_wol(adapter,
1689 adapter->netdev->dev_addr, &cmd);
1690 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
1691 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
1692 } else {
1693 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
1694 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
1695 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
1696 }
1697
1698 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
1699 return status;
1700}
1701
5fb379ee
SP		 1702static int be_setup(struct be_adapter *adapter)
1703{
5fb379ee 1704 struct net_device *netdev = adapter->netdev;
73d540f2 1705 u32 cap_flags, en_flags;
6b7c5b94
SP		 1706 int status;
1707
73d540f2
SP		 1708 cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1709 BE_IF_FLAGS_MCAST_PROMISCUOUS |
1710 BE_IF_FLAGS_PROMISCUOUS |
1711 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1712 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1713 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1714
1715 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1716 netdev->dev_addr, false/* pmac_invalid */,
1717 &adapter->if_handle, &adapter->pmac_id);
6b7c5b94
SP		 1718 if (status != 0)
1719 goto do_none;
1720
6b7c5b94
SP		 1721 status = be_tx_queues_create(adapter);
1722 if (status != 0)
1723 goto if_destroy;
1724
1725 status = be_rx_queues_create(adapter);
1726 if (status != 0)
1727 goto tx_qs_destroy;
1728
5fb379ee
SP		 1729 status = be_mcc_queues_create(adapter);
1730 if (status != 0)
1731 goto rx_qs_destroy;
6b7c5b94 1732
0dffc83e
AK		 1733 adapter->link_speed = -1;
1734
6b7c5b94
SP		 1735 return 0;
1736
5fb379ee
SP		 1737rx_qs_destroy:
1738 be_rx_queues_destroy(adapter);
6b7c5b94
SP		 1739tx_qs_destroy:
1740 be_tx_queues_destroy(adapter);
1741if_destroy:
8788fdc2 1742 be_cmd_if_destroy(adapter, adapter->if_handle);
6b7c5b94
SP		 1743do_none:
1744 return status;
1745}
1746
5fb379ee
SP		 1747static int be_clear(struct be_adapter *adapter)
1748{
1a8887d8 1749 be_mcc_queues_destroy(adapter);
5fb379ee
SP		 1750 be_rx_queues_destroy(adapter);
1751 be_tx_queues_destroy(adapter);
1752
8788fdc2 1753 be_cmd_if_destroy(adapter, adapter->if_handle);
5fb379ee 1754
2243e2e9
SP		 1755 /* tell fw we're done with firing cmds */
1756 be_cmd_fw_clean(adapter);
5fb379ee
SP		 1757 return 0;
1758}
1759
6b7c5b94
SP		 1760static int be_close(struct net_device *netdev)
1761{
1762 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1763 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1764 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1765 int vec;
1766
b305be78 1767 cancel_delayed_work_sync(&adapter->work);
6b7c5b94
SP		 1768
1769 netif_stop_queue(netdev);
1770 netif_carrier_off(netdev);
a8f447bd 1771 adapter->link_up = false;
6b7c5b94 1772
8788fdc2 1773 be_intr_set(adapter, false);
6b7c5b94
SP		 1774
1775 if (adapter->msix_enabled) {
1776 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1777 synchronize_irq(vec);
1778 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1779 synchronize_irq(vec);
1780 } else {
1781 synchronize_irq(netdev->irq);
1782 }
1783 be_irq_unregister(adapter);
1784
1785 napi_disable(&rx_eq->napi);
1786 napi_disable(&tx_eq->napi);
1787
a8e9179a
SP		 1788 /* Wait for all pending tx completions to arrive so that
1789 * all tx skbs are freed.
1790 */
1791 be_tx_compl_clean(adapter);
1792
6b7c5b94
SP		 1793 return 0;
1794}
1795
84517482
AK		 1796#define FW_FILE_HDR_SIGN "ServerEngines Corp. "
1797char flash_cookie[2][16] = {"*** SE FLAS",
1798 "H DIRECTORY *** "};
fa9a6fed
SB		 1799
1800static bool be_flash_redboot(struct be_adapter *adapter,
3f0d4560
AK		 1801 const u8 *p, u32 img_start, int image_size,
1802 int hdr_size)
fa9a6fed
SB		 1803{
1804 u32 crc_offset;
1805 u8 flashed_crc[4];
1806 int status;
3f0d4560
AK		 1807
1808 crc_offset = hdr_size + img_start + image_size - 4;
1809
fa9a6fed 1810 p += crc_offset;
3f0d4560
AK		 1811
1812 status = be_cmd_get_flash_crc(adapter, flashed_crc,
1813 (img_start + image_size - 4));
fa9a6fed
SB		 1814 if (status) {
1815 dev_err(&adapter->pdev->dev,
1816 "could not get crc from flash, not flashing redboot\n");
1817 return false;
1818 }
1819
1820 /*update redboot only if crc does not match*/
1821 if (!memcmp(flashed_crc, p, 4))
1822 return false;
1823 else
1824 return true;
fa9a6fed
SB		 1825}
1826
3f0d4560 1827static int be_flash_data(struct be_adapter *adapter,
84517482 1828 const struct firmware *fw,
3f0d4560
AK		 1829 struct be_dma_mem *flash_cmd, int num_of_images)
1830
84517482 1831{
3f0d4560
AK		 1832 int status = 0, i, filehdr_size = 0;
1833 u32 total_bytes = 0, flash_op;
84517482
AK		 1834 int num_bytes;
1835 const u8 *p = fw->data;
1836 struct be_cmd_write_flashrom *req = flash_cmd->va;
3f0d4560
AK		 1837 struct flash_comp *pflashcomp;
1838
1839 struct flash_comp gen3_flash_types[8] = {
1840 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
1841 FLASH_IMAGE_MAX_SIZE_g3},
1842 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
1843 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
1844 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
1845 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
1846 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
1847 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
1848 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
1849 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
1850 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
1851 FLASH_IMAGE_MAX_SIZE_g3},
1852 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
1853 FLASH_IMAGE_MAX_SIZE_g3},
1854 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
1855 FLASH_IMAGE_MAX_SIZE_g3}
1856 };
1857 struct flash_comp gen2_flash_types[8] = {
1858 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
1859 FLASH_IMAGE_MAX_SIZE_g2},
1860 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
1861 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
1862 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
1863 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
1864 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
1865 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
1866 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
1867 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
1868 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
1869 FLASH_IMAGE_MAX_SIZE_g2},
1870 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
1871 FLASH_IMAGE_MAX_SIZE_g2},
1872 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
1873 FLASH_IMAGE_MAX_SIZE_g2}
1874 };
1875
1876 if (adapter->generation == BE_GEN3) {
1877 pflashcomp = gen3_flash_types;
1878 filehdr_size = sizeof(struct flash_file_hdr_g3);
1879 } else {
1880 pflashcomp = gen2_flash_types;
1881 filehdr_size = sizeof(struct flash_file_hdr_g2);
84517482 1882 }
3f0d4560
AK		 1883 for (i = 0; i < 8; i++) {
1884 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
1885 (!be_flash_redboot(adapter, fw->data,
1886 pflashcomp[i].offset, pflashcomp[i].size,
1887 filehdr_size)))
1888 continue;
1889 p = fw->data;
1890 p += filehdr_size + pflashcomp[i].offset
1891 + (num_of_images * sizeof(struct image_hdr));
1892 if (p + pflashcomp[i].size > fw->data + fw->size)
84517482 1893 return -1;
3f0d4560
AK		 1894 total_bytes = pflashcomp[i].size;
1895 while (total_bytes) {
1896 if (total_bytes > 32*1024)
1897 num_bytes = 32*1024;
1898 else
1899 num_bytes = total_bytes;
1900 total_bytes -= num_bytes;
1901
1902 if (!total_bytes)
1903 flash_op = FLASHROM_OPER_FLASH;
1904 else
1905 flash_op = FLASHROM_OPER_SAVE;
1906 memcpy(req->params.data_buf, p, num_bytes);
1907 p += num_bytes;
1908 status = be_cmd_write_flashrom(adapter, flash_cmd,
1909 pflashcomp[i].optype, flash_op, num_bytes);
1910 if (status) {
1911 dev_err(&adapter->pdev->dev,
1912 "cmd to write to flash rom failed.\n");
1913 return -1;
1914 }
1915 yield();
84517482 1916 }
84517482 1917 }
84517482
AK		 1918 return 0;
1919}
1920
3f0d4560
AK		 1921static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
1922{
1923 if (fhdr == NULL)
1924 return 0;
1925 if (fhdr->build[0] == '3')
1926 return BE_GEN3;
1927 else if (fhdr->build[0] == '2')
1928 return BE_GEN2;
1929 else
1930 return 0;
1931}
1932
84517482
AK		 1933int be_load_fw(struct be_adapter *adapter, u8 *func)
1934{
1935 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
1936 const struct firmware *fw;
3f0d4560
AK		 1937 struct flash_file_hdr_g2 *fhdr;
1938 struct flash_file_hdr_g3 *fhdr3;
1939 struct image_hdr *img_hdr_ptr = NULL;
84517482 1940 struct be_dma_mem flash_cmd;
3f0d4560 1941 int status, i = 0;
84517482 1942 const u8 *p;
84517482
AK		 1943 char fw_ver[FW_VER_LEN];
1944 char fw_cfg;
1945
1946 status = be_cmd_get_fw_ver(adapter, fw_ver);
1947 if (status)
1948 return status;
1949
1950 fw_cfg = *(fw_ver + 2);
1951 if (fw_cfg == '0')
1952 fw_cfg = '1';
1953 strcpy(fw_file, func);
1954
1955 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
1956 if (status)
1957 goto fw_exit;
1958
1959 p = fw->data;
3f0d4560 1960 fhdr = (struct flash_file_hdr_g2 *) p;
84517482
AK		 1961 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
1962
84517482
AK		 1963 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
1964 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
1965 &flash_cmd.dma);
1966 if (!flash_cmd.va) {
1967 status = -ENOMEM;
1968 dev_err(&adapter->pdev->dev,
1969 "Memory allocation failure while flashing\n");
1970 goto fw_exit;
1971 }
1972
3f0d4560
AK		 1973 if ((adapter->generation == BE_GEN3) &&
1974 (get_ufigen_type(fhdr) == BE_GEN3)) {
1975 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
1976 for (i = 0; i < fhdr3->num_imgs; i++) {
1977 img_hdr_ptr = (struct image_hdr *) (fw->data +
1978 (sizeof(struct flash_file_hdr_g3) +
1979 i * sizeof(struct image_hdr)));
1980 if (img_hdr_ptr->imageid == 1) {
1981 status = be_flash_data(adapter, fw,
1982 &flash_cmd, fhdr3->num_imgs);
1983 }
1984
1985 }
1986 } else if ((adapter->generation == BE_GEN2) &&
1987 (get_ufigen_type(fhdr) == BE_GEN2)) {
1988 status = be_flash_data(adapter, fw, &flash_cmd, 0);
1989 } else {
1990 dev_err(&adapter->pdev->dev,
1991 "UFI and Interface are not compatible for flashing\n");
1992 status = -1;
84517482
AK		 1993 }
1994
1995 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
1996 flash_cmd.dma);
1997 if (status) {
1998 dev_err(&adapter->pdev->dev, "Firmware load error\n");
1999 goto fw_exit;
2000 }
2001
af901ca1 2002 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
84517482
AK		 2003
2004fw_exit:
2005 release_firmware(fw);
2006 return status;
2007}
2008
6b7c5b94
SP		 2009static struct net_device_ops be_netdev_ops = {
2010 .ndo_open = be_open,
2011 .ndo_stop = be_close,
2012 .ndo_start_xmit = be_xmit,
2013 .ndo_get_stats = be_get_stats,
2014 .ndo_set_rx_mode = be_set_multicast_list,
2015 .ndo_set_mac_address = be_mac_addr_set,
2016 .ndo_change_mtu = be_change_mtu,
2017 .ndo_validate_addr = eth_validate_addr,
2018 .ndo_vlan_rx_register = be_vlan_register,
2019 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2020 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2021};
2022
2023static void be_netdev_init(struct net_device *netdev)
2024{
2025 struct be_adapter *adapter = netdev_priv(netdev);
2026
2027 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
583e3f34
AK		 2028 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
2029 NETIF_F_GRO;
6b7c5b94 2030
51c59870
AK		 2031 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2032
6b7c5b94
SP		 2033 netdev->flags |= IFF_MULTICAST;
2034
728a9972
AK		 2035 adapter->rx_csum = true;
2036
9e90c961
AK		 2037 /* Default settings for Rx and Tx flow control */
2038 adapter->rx_fc = true;
2039 adapter->tx_fc = true;
2040
c190e3c8
AK		 2041 netif_set_gso_max_size(netdev, 65535);
2042
6b7c5b94
SP		 2043 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2044
2045 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2046
6b7c5b94
SP		 2047 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
2048 BE_NAPI_WEIGHT);
5fb379ee 2049 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
6b7c5b94
SP		 2050 BE_NAPI_WEIGHT);
2051
2052 netif_carrier_off(netdev);
2053 netif_stop_queue(netdev);
2054}
2055
2056static void be_unmap_pci_bars(struct be_adapter *adapter)
2057{
8788fdc2
SP		 2058 if (adapter->csr)
2059 iounmap(adapter->csr);
2060 if (adapter->db)
2061 iounmap(adapter->db);
2062 if (adapter->pcicfg)
2063 iounmap(adapter->pcicfg);
6b7c5b94
SP		 2064}
2065
2066static int be_map_pci_bars(struct be_adapter *adapter)
2067{
2068 u8 __iomem *addr;
7b139c83 2069 int pcicfg_reg;
6b7c5b94
SP		 2070
2071 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2072 pci_resource_len(adapter->pdev, 2));
2073 if (addr == NULL)
2074 return -ENOMEM;
8788fdc2 2075 adapter->csr = addr;
6b7c5b94
SP		 2076
2077 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
2078 128 * 1024);
2079 if (addr == NULL)
2080 goto pci_map_err;
8788fdc2 2081 adapter->db = addr;
6b7c5b94 2082
7b139c83
AK		 2083 if (adapter->generation == BE_GEN2)
2084 pcicfg_reg = 1;
2085 else
2086 pcicfg_reg = 0;
2087
2088 addr = ioremap_nocache(pci_resource_start(adapter->pdev, pcicfg_reg),
2089 pci_resource_len(adapter->pdev, pcicfg_reg));
6b7c5b94
SP		 2090 if (addr == NULL)
2091 goto pci_map_err;
8788fdc2 2092 adapter->pcicfg = addr;
6b7c5b94
SP		 2093
2094 return 0;
2095pci_map_err:
2096 be_unmap_pci_bars(adapter);
2097 return -ENOMEM;
2098}
2099
2100
2101static void be_ctrl_cleanup(struct be_adapter *adapter)
2102{
8788fdc2 2103 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
6b7c5b94
SP		 2104
2105 be_unmap_pci_bars(adapter);
2106
2107 if (mem->va)
2108 pci_free_consistent(adapter->pdev, mem->size,
2109 mem->va, mem->dma);
e7b909a6
SP		 2110
2111 mem = &adapter->mc_cmd_mem;
2112 if (mem->va)
2113 pci_free_consistent(adapter->pdev, mem->size,
2114 mem->va, mem->dma);
6b7c5b94
SP		 2115}
2116
6b7c5b94
SP		 2117static int be_ctrl_init(struct be_adapter *adapter)
2118{
8788fdc2
SP		 2119 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2120 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
e7b909a6 2121 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
6b7c5b94 2122 int status;
6b7c5b94
SP		 2123
2124 status = be_map_pci_bars(adapter);
2125 if (status)
e7b909a6 2126 goto done;
6b7c5b94
SP		 2127
2128 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2129 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2130 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2131 if (!mbox_mem_alloc->va) {
e7b909a6
SP		 2132 status = -ENOMEM;
2133 goto unmap_pci_bars;
6b7c5b94 2134 }
e7b909a6 2135
6b7c5b94
SP		 2136 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2137 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2138 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2139 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
e7b909a6
SP		 2140
2141 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2142 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2143 &mc_cmd_mem->dma);
2144 if (mc_cmd_mem->va == NULL) {
2145 status = -ENOMEM;
2146 goto free_mbox;
2147 }
2148 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2149
8788fdc2
SP		 2150 spin_lock_init(&adapter->mbox_lock);
2151 spin_lock_init(&adapter->mcc_lock);
2152 spin_lock_init(&adapter->mcc_cq_lock);
a8f447bd 2153
6b7c5b94 2154 return 0;
e7b909a6
SP		 2155
2156free_mbox:
2157 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2158 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2159
2160unmap_pci_bars:
2161 be_unmap_pci_bars(adapter);
2162
2163done:
2164 return status;
6b7c5b94
SP		 2165}
2166
2167static void be_stats_cleanup(struct be_adapter *adapter)
2168{
2169 struct be_stats_obj *stats = &adapter->stats;
2170 struct be_dma_mem *cmd = &stats->cmd;
2171
2172 if (cmd->va)
2173 pci_free_consistent(adapter->pdev, cmd->size,
2174 cmd->va, cmd->dma);
2175}
2176
2177static int be_stats_init(struct be_adapter *adapter)
2178{
2179 struct be_stats_obj *stats = &adapter->stats;
2180 struct be_dma_mem *cmd = &stats->cmd;
2181
2182 cmd->size = sizeof(struct be_cmd_req_get_stats);
2183 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2184 if (cmd->va == NULL)
2185 return -1;
d291b9af 2186 memset(cmd->va, 0, cmd->size);
6b7c5b94
SP		 2187 return 0;
2188}
2189
2190static void __devexit be_remove(struct pci_dev *pdev)
2191{
2192 struct be_adapter *adapter = pci_get_drvdata(pdev);
8d56ff11 2193
6b7c5b94
SP		 2194 if (!adapter)
2195 return;
2196
2197 unregister_netdev(adapter->netdev);
2198
5fb379ee
SP		 2199 be_clear(adapter);
2200
6b7c5b94
SP		 2201 be_stats_cleanup(adapter);
2202
2203 be_ctrl_cleanup(adapter);
2204
8d56ff11 2205 be_msix_disable(adapter);
6b7c5b94
SP		 2206
2207 pci_set_drvdata(pdev, NULL);
2208 pci_release_regions(pdev);
2209 pci_disable_device(pdev);
2210
2211 free_netdev(adapter->netdev);
2212}
2213
2243e2e9 2214static int be_get_config(struct be_adapter *adapter)
6b7c5b94 2215{
6b7c5b94 2216 int status;
2243e2e9 2217 u8 mac[ETH_ALEN];
6b7c5b94 2218
2243e2e9 2219 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
6b7c5b94
SP		 2220 if (status)
2221 return status;
2222
2243e2e9
SP		 2223 status = be_cmd_query_fw_cfg(adapter,
2224 &adapter->port_num, &adapter->cap);
43a04fdc
SP		 2225 if (status)
2226 return status;
2227
2243e2e9
SP		 2228 memset(mac, 0, ETH_ALEN);
2229 status = be_cmd_mac_addr_query(adapter, mac,
2230 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
6b7c5b94
SP		 2231 if (status)
2232 return status;
ca9e4988
AK		 2233
2234 if (!is_valid_ether_addr(mac))
2235 return -EADDRNOTAVAIL;
2236
2243e2e9 2237 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
35a65285 2238 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
6b7c5b94 2239
2243e2e9 2240 return 0;
6b7c5b94
SP		 2241}
2242
2243static int __devinit be_probe(struct pci_dev *pdev,
2244 const struct pci_device_id *pdev_id)
2245{
2246 int status = 0;
2247 struct be_adapter *adapter;
2248 struct net_device *netdev;
6b7c5b94
SP		 2249
2250 status = pci_enable_device(pdev);
2251 if (status)
2252 goto do_none;
2253
2254 status = pci_request_regions(pdev, DRV_NAME);
2255 if (status)
2256 goto disable_dev;
2257 pci_set_master(pdev);
2258
2259 netdev = alloc_etherdev(sizeof(struct be_adapter));
2260 if (netdev == NULL) {
2261 status = -ENOMEM;
2262 goto rel_reg;
2263 }
2264 adapter = netdev_priv(netdev);
7b139c83
AK		 2265
2266 switch (pdev->device) {
2267 case BE_DEVICE_ID1:
2268 case OC_DEVICE_ID1:
2269 adapter->generation = BE_GEN2;
2270 break;
2271 case BE_DEVICE_ID2:
2272 case OC_DEVICE_ID2:
2273 adapter->generation = BE_GEN3;
2274 break;
2275 default:
2276 adapter->generation = 0;
2277 }
2278
6b7c5b94
SP		 2279 adapter->pdev = pdev;
2280 pci_set_drvdata(pdev, adapter);
2281 adapter->netdev = netdev;
2243e2e9
SP		 2282 be_netdev_init(netdev);
2283 SET_NETDEV_DEV(netdev, &pdev->dev);
6b7c5b94
SP		 2284
2285 be_msix_enable(adapter);
2286
e930438c 2287 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
6b7c5b94
SP		 2288 if (!status) {
2289 netdev->features |= NETIF_F_HIGHDMA;
2290 } else {
e930438c 2291 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6b7c5b94
SP		 2292 if (status) {
2293 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2294 goto free_netdev;
2295 }
2296 }
2297
6b7c5b94
SP		 2298 status = be_ctrl_init(adapter);
2299 if (status)
2300 goto free_netdev;
2301
2243e2e9
SP		 2302 /* sync up with fw's ready state */
2303 status = be_cmd_POST(adapter);
6b7c5b94
SP		 2304 if (status)
2305 goto ctrl_clean;
2306
2243e2e9
SP		 2307 /* tell fw we're ready to fire cmds */
2308 status = be_cmd_fw_init(adapter);
6b7c5b94 2309 if (status)
2243e2e9
SP		 2310 goto ctrl_clean;
2311
2312 status = be_cmd_reset_function(adapter);
2313 if (status)
2314 goto ctrl_clean;
6b7c5b94 2315
2243e2e9
SP		 2316 status = be_stats_init(adapter);
2317 if (status)
2318 goto ctrl_clean;
2319
2320 status = be_get_config(adapter);
6b7c5b94
SP		 2321 if (status)
2322 goto stats_clean;
6b7c5b94
SP		 2323
2324 INIT_DELAYED_WORK(&adapter->work, be_worker);
6b7c5b94 2325
5fb379ee
SP		 2326 status = be_setup(adapter);
2327 if (status)
2328 goto stats_clean;
2243e2e9 2329
6b7c5b94
SP		 2330 status = register_netdev(netdev);
2331 if (status != 0)
5fb379ee 2332 goto unsetup;
6b7c5b94 2333
c4ca2374 2334 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
6b7c5b94
SP		 2335 return 0;
2336
5fb379ee
SP		 2337unsetup:
2338 be_clear(adapter);
6b7c5b94
SP		 2339stats_clean:
2340 be_stats_cleanup(adapter);
2341ctrl_clean:
2342 be_ctrl_cleanup(adapter);
2343free_netdev:
8d56ff11 2344 be_msix_disable(adapter);
6b7c5b94 2345 free_netdev(adapter->netdev);
8d56ff11 2346 pci_set_drvdata(pdev, NULL);
6b7c5b94
SP		 2347rel_reg:
2348 pci_release_regions(pdev);
2349disable_dev:
2350 pci_disable_device(pdev);
2351do_none:
c4ca2374 2352 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
6b7c5b94
SP		 2353 return status;
2354}
2355
2356static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2357{
2358 struct be_adapter *adapter = pci_get_drvdata(pdev);
2359 struct net_device *netdev = adapter->netdev;
2360
71d8d1b5
AK		 2361 if (adapter->wol)
2362 be_setup_wol(adapter, true);
2363
6b7c5b94
SP		 2364 netif_device_detach(netdev);
2365 if (netif_running(netdev)) {
2366 rtnl_lock();
2367 be_close(netdev);
2368 rtnl_unlock();
2369 }
9e90c961 2370 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
9b0365f1 2371 be_clear(adapter);
6b7c5b94
SP		 2372
2373 pci_save_state(pdev);
2374 pci_disable_device(pdev);
2375 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2376 return 0;
2377}
2378
2379static int be_resume(struct pci_dev *pdev)
2380{
2381 int status = 0;
2382 struct be_adapter *adapter = pci_get_drvdata(pdev);
2383 struct net_device *netdev = adapter->netdev;
2384
2385 netif_device_detach(netdev);
2386
2387 status = pci_enable_device(pdev);
2388 if (status)
2389 return status;
2390
2391 pci_set_power_state(pdev, 0);
2392 pci_restore_state(pdev);
2393
2243e2e9
SP		 2394 /* tell fw we're ready to fire cmds */
2395 status = be_cmd_fw_init(adapter);
2396 if (status)
2397 return status;
2398
9b0365f1 2399 be_setup(adapter);
6b7c5b94
SP		 2400 if (netif_running(netdev)) {
2401 rtnl_lock();
2402 be_open(netdev);
2403 rtnl_unlock();
2404 }
2405 netif_device_attach(netdev);
71d8d1b5
AK		 2406
2407 if (adapter->wol)
2408 be_setup_wol(adapter, false);
6b7c5b94
SP		 2409 return 0;
2410}
2411
2412static struct pci_driver be_driver = {
2413 .name = DRV_NAME,
2414 .id_table = be_dev_ids,
2415 .probe = be_probe,
2416 .remove = be_remove,
2417 .suspend = be_suspend,
2418 .resume = be_resume
2419};
2420
2421static int __init be_init_module(void)
2422{
8e95a202
JP		 2423 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
2424 rx_frag_size != 2048) {
6b7c5b94
SP		 2425 printk(KERN_WARNING DRV_NAME
2426 " : Module param rx_frag_size must be 2048/4096/8192."
2427 " Using 2048\n");
2428 rx_frag_size = 2048;
2429 }
6b7c5b94
SP		 2430
2431 return pci_register_driver(&be_driver);
2432}
2433module_init(be_init_module);
2434
2435static void __exit be_exit_module(void)
2436{
2437 pci_unregister_driver(&be_driver);
2438}
2439module_exit(be_exit_module);
Clone of davem's net-next-2.6 tree