Adding eeprom info bash script
[jme.git] / jme.c
CommitLineData
d7699f87
GFT
1/*
2 * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
3 *
4 * Copyright 2008 JMicron Technology Corporation
5 * http://www.jmicron.com/
6 *
3bf61c55
GFT
7 * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
8 *
d7699f87
GFT
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 */
23
d7699f87
GFT
24#include <linux/module.h>
25#include <linux/kernel.h>
26#include <linux/pci.h>
27#include <linux/netdevice.h>
28#include <linux/etherdevice.h>
29#include <linux/ethtool.h>
30#include <linux/mii.h>
31#include <linux/crc32.h>
4330c2f2 32#include <linux/delay.h>
29bdd921 33#include <linux/spinlock.h>
8c198884
GFT
34#include <linux/in.h>
35#include <linux/ip.h>
79ce639c
GFT
36#include <linux/ipv6.h>
37#include <linux/tcp.h>
38#include <linux/udp.h>
42b1055e 39#include <linux/if_vlan.h>
38d1bc09 40#include <linux/slab.h>
3b70a6fa 41#include <net/ip6_checksum.h>
d7699f87
GFT
42#include "jme.h"
43
cd0ff491
GFT
44static int force_pseudohp = -1;
45static int no_pseudohp = -1;
46static int no_extplug = -1;
47module_param(force_pseudohp, int, 0);
48MODULE_PARM_DESC(force_pseudohp,
49 "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
50module_param(no_pseudohp, int, 0);
51MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
52module_param(no_extplug, int, 0);
53MODULE_PARM_DESC(no_extplug,
54 "Do not use external plug signal for pseudo hot-plug.");
4330c2f2 55
3bf61c55
GFT
56static int
57jme_mdio_read(struct net_device *netdev, int phy, int reg)
d7699f87
GFT
58{
59 struct jme_adapter *jme = netdev_priv(netdev);
cd0ff491 60 int i, val, again = (reg == MII_BMSR) ? 1 : 0;
d7699f87 61
186fc259 62read_again:
cd0ff491 63 jwrite32(jme, JME_SMI, SMI_OP_REQ |
3bf61c55
GFT
64 smi_phy_addr(phy) |
65 smi_reg_addr(reg));
d7699f87
GFT
66
67 wmb();
cd0ff491 68 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
cdcdc9eb 69 udelay(20);
b3821cc5
GFT
70 val = jread32(jme, JME_SMI);
71 if ((val & SMI_OP_REQ) == 0)
3bf61c55 72 break;
cd0ff491 73 }
d7699f87 74
cd0ff491
GFT
75 if (i == 0) {
76 jeprintk(jme->pdev, "phy(%d) read timeout : %d\n", phy, reg);
3bf61c55 77 return 0;
cd0ff491 78 }
d7699f87 79
cd0ff491 80 if (again--)
186fc259
GFT
81 goto read_again;
82
cd0ff491 83 return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
d7699f87
GFT
84}
85
3bf61c55
GFT
86static void
87jme_mdio_write(struct net_device *netdev,
88 int phy, int reg, int val)
d7699f87
GFT
89{
90 struct jme_adapter *jme = netdev_priv(netdev);
91 int i;
92
3bf61c55
GFT
93 jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
94 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
95 smi_phy_addr(phy) | smi_reg_addr(reg));
d7699f87
GFT
96
97 wmb();
cdcdc9eb
GFT
98 for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
99 udelay(20);
8d27293f 100 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
3bf61c55
GFT
101 break;
102 }
d7699f87 103
3bf61c55 104 if (i == 0)
cd0ff491 105 jeprintk(jme->pdev, "phy(%d) write timeout : %d\n", phy, reg);
d7699f87
GFT
106}
107
cd0ff491 108static inline void
3bf61c55 109jme_reset_phy_processor(struct jme_adapter *jme)
d7699f87 110{
cd0ff491 111 u32 val;
3bf61c55
GFT
112
113 jme_mdio_write(jme->dev,
114 jme->mii_if.phy_id,
8c198884
GFT
115 MII_ADVERTISE, ADVERTISE_ALL |
116 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
3bf61c55 117
cd0ff491 118 if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
8d27293f
GFT
119 jme_mdio_write(jme->dev,
120 jme->mii_if.phy_id,
121 MII_CTRL1000,
122 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
3bf61c55 123
fcf45b4c
GFT
124 val = jme_mdio_read(jme->dev,
125 jme->mii_if.phy_id,
126 MII_BMCR);
127
128 jme_mdio_write(jme->dev,
129 jme->mii_if.phy_id,
130 MII_BMCR, val | BMCR_RESET);
3bf61c55
GFT
131}
132
b3821cc5
GFT
133static void
134jme_setup_wakeup_frame(struct jme_adapter *jme,
cd0ff491 135 u32 *mask, u32 crc, int fnr)
b3821cc5
GFT
136{
137 int i;
138
139 /*
140 * Setup CRC pattern
141 */
142 jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
143 wmb();
144 jwrite32(jme, JME_WFODP, crc);
145 wmb();
146
147 /*
148 * Setup Mask
149 */
cd0ff491 150 for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
b3821cc5
GFT
151 jwrite32(jme, JME_WFOI,
152 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
153 (fnr & WFOI_FRAME_SEL));
154 wmb();
155 jwrite32(jme, JME_WFODP, mask[i]);
156 wmb();
157 }
158}
3bf61c55 159
cd0ff491 160static inline void
3bf61c55
GFT
161jme_reset_mac_processor(struct jme_adapter *jme)
162{
cd0ff491
GFT
163 u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
164 u32 crc = 0xCDCDCDCD;
165 u32 gpreg0;
b3821cc5
GFT
166 int i;
167
3bf61c55 168 jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
d7699f87 169 udelay(2);
3bf61c55 170 jwrite32(jme, JME_GHC, jme->reg_ghc);
cd0ff491
GFT
171
172 jwrite32(jme, JME_RXDBA_LO, 0x00000000);
173 jwrite32(jme, JME_RXDBA_HI, 0x00000000);
174 jwrite32(jme, JME_RXQDC, 0x00000000);
175 jwrite32(jme, JME_RXNDA, 0x00000000);
176 jwrite32(jme, JME_TXDBA_LO, 0x00000000);
177 jwrite32(jme, JME_TXDBA_HI, 0x00000000);
178 jwrite32(jme, JME_TXQDC, 0x00000000);
179 jwrite32(jme, JME_TXNDA, 0x00000000);
180
4330c2f2
GFT
181 jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
182 jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
cd0ff491 183 for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
b3821cc5 184 jme_setup_wakeup_frame(jme, mask, crc, i);
cd0ff491 185 if (jme->fpgaver)
cdcdc9eb
GFT
186 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
187 else
188 gpreg0 = GPREG0_DEFAULT;
189 jwrite32(jme, JME_GPREG0, gpreg0);
7ee473a3 190 jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
d7699f87
GFT
191}
192
cd0ff491
GFT
193static inline void
194jme_reset_ghc_speed(struct jme_adapter *jme)
195{
196 jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX);
197 jwrite32(jme, JME_GHC, jme->reg_ghc);
198}
199
200static inline void
3bf61c55 201jme_clear_pm(struct jme_adapter *jme)
d7699f87 202{
29bdd921 203 jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
4330c2f2 204 pci_set_power_state(jme->pdev, PCI_D0);
42b1055e 205 pci_enable_wake(jme->pdev, PCI_D0, false);
d7699f87
GFT
206}
207
3bf61c55
GFT
208static int
209jme_reload_eeprom(struct jme_adapter *jme)
d7699f87 210{
cd0ff491 211 u32 val;
d7699f87
GFT
212 int i;
213
214 val = jread32(jme, JME_SMBCSR);
215
cd0ff491 216 if (val & SMBCSR_EEPROMD) {
d7699f87
GFT
217 val |= SMBCSR_CNACK;
218 jwrite32(jme, JME_SMBCSR, val);
219 val |= SMBCSR_RELOAD;
220 jwrite32(jme, JME_SMBCSR, val);
221 mdelay(12);
222
cd0ff491 223 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
d7699f87
GFT
224 mdelay(1);
225 if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
226 break;
227 }
228
cd0ff491
GFT
229 if (i == 0) {
230 jeprintk(jme->pdev, "eeprom reload timeout\n");
d7699f87
GFT
231 return -EIO;
232 }
233 }
3bf61c55 234
d7699f87
GFT
235 return 0;
236}
237
3bf61c55
GFT
238static void
239jme_load_macaddr(struct net_device *netdev)
d7699f87
GFT
240{
241 struct jme_adapter *jme = netdev_priv(netdev);
242 unsigned char macaddr[6];
cd0ff491 243 u32 val;
d7699f87 244
cd0ff491 245 spin_lock_bh(&jme->macaddr_lock);
4330c2f2 246 val = jread32(jme, JME_RXUMA_LO);
d7699f87
GFT
247 macaddr[0] = (val >> 0) & 0xFF;
248 macaddr[1] = (val >> 8) & 0xFF;
249 macaddr[2] = (val >> 16) & 0xFF;
250 macaddr[3] = (val >> 24) & 0xFF;
4330c2f2 251 val = jread32(jme, JME_RXUMA_HI);
d7699f87
GFT
252 macaddr[4] = (val >> 0) & 0xFF;
253 macaddr[5] = (val >> 8) & 0xFF;
cd0ff491
GFT
254 memcpy(netdev->dev_addr, macaddr, 6);
255 spin_unlock_bh(&jme->macaddr_lock);
3bf61c55
GFT
256}
257
cd0ff491 258static inline void
3bf61c55
GFT
259jme_set_rx_pcc(struct jme_adapter *jme, int p)
260{
cd0ff491 261 switch (p) {
192570e0
GFT
262 case PCC_OFF:
263 jwrite32(jme, JME_PCCRX0,
264 ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
265 ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
266 break;
3bf61c55
GFT
267 case PCC_P1:
268 jwrite32(jme, JME_PCCRX0,
269 ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
270 ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
271 break;
272 case PCC_P2:
273 jwrite32(jme, JME_PCCRX0,
274 ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
275 ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
276 break;
277 case PCC_P3:
278 jwrite32(jme, JME_PCCRX0,
279 ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
280 ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
281 break;
282 default:
283 break;
284 }
192570e0 285 wmb();
3bf61c55 286
cd0ff491 287 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
7ca9ebee 288#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 289 msg_rx_status(jme, "Switched to PCC_P%d\n", p);
7ca9ebee
GFT
290#else
291 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
292#endif
d7699f87
GFT
293}
294
fcf45b4c 295static void
3bf61c55 296jme_start_irq(struct jme_adapter *jme)
d7699f87 297{
3bf61c55
GFT
298 register struct dynpcc_info *dpi = &(jme->dpi);
299
300 jme_set_rx_pcc(jme, PCC_P1);
3bf61c55
GFT
301 dpi->cur = PCC_P1;
302 dpi->attempt = PCC_P1;
303 dpi->cnt = 0;
304
305 jwrite32(jme, JME_PCCTX,
8c198884
GFT
306 ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
307 ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
3bf61c55
GFT
308 PCCTXQ0_EN
309 );
310
d7699f87
GFT
311 /*
312 * Enable Interrupts
313 */
314 jwrite32(jme, JME_IENS, INTR_ENABLE);
315}
316
cd0ff491 317static inline void
3bf61c55 318jme_stop_irq(struct jme_adapter *jme)
d7699f87
GFT
319{
320 /*
321 * Disable Interrupts
322 */
cd0ff491 323 jwrite32f(jme, JME_IENC, INTR_ENABLE);
d7699f87
GFT
324}
325
cd0ff491 326static u32
cdcdc9eb
GFT
327jme_linkstat_from_phy(struct jme_adapter *jme)
328{
cd0ff491 329 u32 phylink, bmsr;
cdcdc9eb
GFT
330
331 phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
332 bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
cd0ff491 333 if (bmsr & BMSR_ANCOMP)
cdcdc9eb
GFT
334 phylink |= PHY_LINK_AUTONEG_COMPLETE;
335
336 return phylink;
337}
338
cd0ff491 339static inline void
58c92f28 340jme_set_phyfifoa(struct jme_adapter *jme)
cd0ff491
GFT
341{
342 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
343}
344
345static inline void
58c92f28 346jme_set_phyfifob(struct jme_adapter *jme)
cd0ff491
GFT
347{
348 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
349}
350
fcf45b4c
GFT
351static int
352jme_check_link(struct net_device *netdev, int testonly)
d7699f87
GFT
353{
354 struct jme_adapter *jme = netdev_priv(netdev);
7ee473a3 355 u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
79ce639c 356 char linkmsg[64];
fcf45b4c 357 int rc = 0;
d7699f87 358
b3821cc5 359 linkmsg[0] = '\0';
cdcdc9eb 360
cd0ff491 361 if (jme->fpgaver)
cdcdc9eb
GFT
362 phylink = jme_linkstat_from_phy(jme);
363 else
364 phylink = jread32(jme, JME_PHY_LINK);
d7699f87 365
cd0ff491
GFT
366 if (phylink & PHY_LINK_UP) {
367 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
8c198884
GFT
368 /*
369 * If we did not enable AN
370 * Speed/Duplex Info should be obtained from SMI
371 */
372 phylink = PHY_LINK_UP;
373
374 bmcr = jme_mdio_read(jme->dev,
375 jme->mii_if.phy_id,
376 MII_BMCR);
377
378 phylink |= ((bmcr & BMCR_SPEED1000) &&
379 (bmcr & BMCR_SPEED100) == 0) ?
380 PHY_LINK_SPEED_1000M :
381 (bmcr & BMCR_SPEED100) ?
382 PHY_LINK_SPEED_100M :
383 PHY_LINK_SPEED_10M;
384
385 phylink |= (bmcr & BMCR_FULLDPLX) ?
386 PHY_LINK_DUPLEX : 0;
79ce639c 387
b3821cc5 388 strcat(linkmsg, "Forced: ");
cd0ff491 389 } else {
8c198884
GFT
390 /*
391 * Keep polling for speed/duplex resolve complete
392 */
cd0ff491 393 while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
8c198884
GFT
394 --cnt) {
395
396 udelay(1);
8c198884 397
cd0ff491 398 if (jme->fpgaver)
cdcdc9eb
GFT
399 phylink = jme_linkstat_from_phy(jme);
400 else
401 phylink = jread32(jme, JME_PHY_LINK);
8c198884 402 }
cd0ff491
GFT
403 if (!cnt)
404 jeprintk(jme->pdev,
8c198884 405 "Waiting speed resolve timeout.\n");
79ce639c 406
b3821cc5 407 strcat(linkmsg, "ANed: ");
d7699f87
GFT
408 }
409
cd0ff491 410 if (jme->phylink == phylink) {
fcf45b4c
GFT
411 rc = 1;
412 goto out;
413 }
cd0ff491 414 if (testonly)
fcf45b4c
GFT
415 goto out;
416
417 jme->phylink = phylink;
418
3b70a6fa
GFT
419 ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX |
420 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE |
421 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY);
cd0ff491
GFT
422 switch (phylink & PHY_LINK_SPEED_MASK) {
423 case PHY_LINK_SPEED_10M:
3b70a6fa
GFT
424 ghc |= GHC_SPEED_10M |
425 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
cd0ff491 426 strcat(linkmsg, "10 Mbps, ");
cd0ff491
GFT
427 break;
428 case PHY_LINK_SPEED_100M:
3b70a6fa
GFT
429 ghc |= GHC_SPEED_100M |
430 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
cd0ff491 431 strcat(linkmsg, "100 Mbps, ");
cd0ff491
GFT
432 break;
433 case PHY_LINK_SPEED_1000M:
3b70a6fa
GFT
434 ghc |= GHC_SPEED_1000M |
435 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
cd0ff491 436 strcat(linkmsg, "1000 Mbps, ");
cd0ff491
GFT
437 break;
438 default:
439 break;
d7699f87 440 }
d7699f87 441
cd0ff491 442 if (phylink & PHY_LINK_DUPLEX) {
d7699f87 443 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
7ee473a3 444 ghc |= GHC_DPX;
cd0ff491 445 } else {
d7699f87 446 jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
3bf61c55
GFT
447 TXMCS_BACKOFF |
448 TXMCS_CARRIERSENSE |
449 TXMCS_COLLISION);
8c198884
GFT
450 jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
451 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
452 TXTRHD_TXREN |
453 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
454 }
7ee473a3
GFT
455
456 gpreg1 = GPREG1_DEFAULT;
457 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
458 if (!(phylink & PHY_LINK_DUPLEX))
459 gpreg1 |= GPREG1_HALFMODEPATCH;
460 switch (phylink & PHY_LINK_SPEED_MASK) {
461 case PHY_LINK_SPEED_10M:
462 jme_set_phyfifoa(jme);
463 gpreg1 |= GPREG1_RSSPATCH;
464 break;
465 case PHY_LINK_SPEED_100M:
466 jme_set_phyfifob(jme);
467 gpreg1 |= GPREG1_RSSPATCH;
468 break;
469 case PHY_LINK_SPEED_1000M:
470 jme_set_phyfifoa(jme);
471 break;
472 default:
473 break;
474 }
475 }
d7699f87 476
3b70a6fa 477 jwrite32(jme, JME_GPREG1, gpreg1);
fcf45b4c 478 jwrite32(jme, JME_GHC, ghc);
3b70a6fa 479 jme->reg_ghc = ghc;
fcf45b4c 480
3b70a6fa
GFT
481 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
482 "Full-Duplex, " :
483 "Half-Duplex, ");
484 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
485 "MDI-X" :
486 "MDI");
7ca9ebee 487#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 488 msg_link(jme, "Link is up at %s.\n", linkmsg);
7ca9ebee
GFT
489#else
490 netif_info(jme, link, jme->dev, "Link is up at %s.\n", linkmsg);
491#endif
cd0ff491
GFT
492 netif_carrier_on(netdev);
493 } else {
494 if (testonly)
fcf45b4c
GFT
495 goto out;
496
7ca9ebee 497#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 498 msg_link(jme, "Link is down.\n");
7ca9ebee
GFT
499#else
500 netif_info(jme, link, jme->dev, "Link is down.\n");
501#endif
fcf45b4c 502 jme->phylink = 0;
cd0ff491 503 netif_carrier_off(netdev);
d7699f87 504 }
fcf45b4c
GFT
505
506out:
507 return rc;
d7699f87
GFT
508}
509
3bf61c55
GFT
510static int
511jme_setup_tx_resources(struct jme_adapter *jme)
d7699f87 512{
d7699f87
GFT
513 struct jme_ring *txring = &(jme->txring[0]);
514
515 txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
b3821cc5
GFT
516 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
517 &(txring->dmaalloc),
518 GFP_ATOMIC);
fcf45b4c 519
0ede469c
GFT
520 if (!txring->alloc)
521 goto err_set_null;
d7699f87
GFT
522
523 /*
524 * 16 Bytes align
525 */
cd0ff491 526 txring->desc = (void *)ALIGN((unsigned long)(txring->alloc),
3bf61c55 527 RING_DESC_ALIGN);
4330c2f2 528 txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
d7699f87 529 txring->next_to_use = 0;
cdcdc9eb 530 atomic_set(&txring->next_to_clean, 0);
b3821cc5 531 atomic_set(&txring->nr_free, jme->tx_ring_size);
d7699f87 532
0ede469c
GFT
533 txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
534 jme->tx_ring_size, GFP_ATOMIC);
535 if (unlikely(!(txring->bufinf)))
536 goto err_free_txring;
537
d7699f87 538 /*
b3821cc5 539 * Initialize Transmit Descriptors
d7699f87 540 */
b3821cc5 541 memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
3bf61c55 542 memset(txring->bufinf, 0,
b3821cc5 543 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
d7699f87
GFT
544
545 return 0;
0ede469c
GFT
546
547err_free_txring:
548 dma_free_coherent(&(jme->pdev->dev),
549 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
550 txring->alloc,
551 txring->dmaalloc);
552
553err_set_null:
554 txring->desc = NULL;
555 txring->dmaalloc = 0;
556 txring->dma = 0;
557 txring->bufinf = NULL;
558
559 return -ENOMEM;
d7699f87
GFT
560}
561
3bf61c55
GFT
562static void
563jme_free_tx_resources(struct jme_adapter *jme)
d7699f87
GFT
564{
565 int i;
566 struct jme_ring *txring = &(jme->txring[0]);
0ede469c 567 struct jme_buffer_info *txbi;
d7699f87 568
cd0ff491 569 if (txring->alloc) {
0ede469c
GFT
570 if (txring->bufinf) {
571 for (i = 0 ; i < jme->tx_ring_size ; ++i) {
572 txbi = txring->bufinf + i;
573 if (txbi->skb) {
574 dev_kfree_skb(txbi->skb);
575 txbi->skb = NULL;
576 }
577 txbi->mapping = 0;
578 txbi->len = 0;
579 txbi->nr_desc = 0;
580 txbi->start_xmit = 0;
d7699f87 581 }
0ede469c 582 kfree(txring->bufinf);
d7699f87
GFT
583 }
584
585 dma_free_coherent(&(jme->pdev->dev),
b3821cc5 586 TX_RING_ALLOC_SIZE(jme->tx_ring_size),
d7699f87
GFT
587 txring->alloc,
588 txring->dmaalloc);
3bf61c55
GFT
589
590 txring->alloc = NULL;
591 txring->desc = NULL;
592 txring->dmaalloc = 0;
593 txring->dma = 0;
0ede469c 594 txring->bufinf = NULL;
d7699f87 595 }
3bf61c55 596 txring->next_to_use = 0;
cdcdc9eb 597 atomic_set(&txring->next_to_clean, 0);
79ce639c 598 atomic_set(&txring->nr_free, 0);
d7699f87
GFT
599}
600
cd0ff491 601static inline void
3bf61c55 602jme_enable_tx_engine(struct jme_adapter *jme)
d7699f87
GFT
603{
604 /*
605 * Select Queue 0
606 */
607 jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
cd0ff491 608 wmb();
d7699f87
GFT
609
610 /*
611 * Setup TX Queue 0 DMA Bass Address
612 */
fcf45b4c 613 jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
3bf61c55 614 jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
fcf45b4c 615 jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
d7699f87
GFT
616
617 /*
618 * Setup TX Descptor Count
619 */
b3821cc5 620 jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
d7699f87
GFT
621
622 /*
623 * Enable TX Engine
624 */
625 wmb();
4330c2f2
GFT
626 jwrite32(jme, JME_TXCS, jme->reg_txcs |
627 TXCS_SELECT_QUEUE0 |
628 TXCS_ENABLE);
d7699f87
GFT
629
630}
631
cd0ff491 632static inline void
29bdd921
GFT
633jme_restart_tx_engine(struct jme_adapter *jme)
634{
635 /*
636 * Restart TX Engine
637 */
638 jwrite32(jme, JME_TXCS, jme->reg_txcs |
639 TXCS_SELECT_QUEUE0 |
640 TXCS_ENABLE);
641}
642
cd0ff491 643static inline void
3bf61c55 644jme_disable_tx_engine(struct jme_adapter *jme)
d7699f87
GFT
645{
646 int i;
cd0ff491 647 u32 val;
d7699f87
GFT
648
649 /*
650 * Disable TX Engine
651 */
fcf45b4c 652 jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
cd0ff491 653 wmb();
d7699f87
GFT
654
655 val = jread32(jme, JME_TXCS);
cd0ff491 656 for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
fcf45b4c 657 mdelay(1);
d7699f87 658 val = jread32(jme, JME_TXCS);
cd0ff491 659 rmb();
d7699f87
GFT
660 }
661
cd0ff491
GFT
662 if (!i)
663 jeprintk(jme->pdev, "Disable TX engine timeout.\n");
d7699f87
GFT
664}
665
3bf61c55
GFT
666static void
667jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
d7699f87 668{
0ede469c 669 struct jme_ring *rxring = &(jme->rxring[0]);
cd0ff491 670 register struct rxdesc *rxdesc = rxring->desc;
4330c2f2
GFT
671 struct jme_buffer_info *rxbi = rxring->bufinf;
672 rxdesc += i;
673 rxbi += i;
674
675 rxdesc->dw[0] = 0;
676 rxdesc->dw[1] = 0;
3bf61c55 677 rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32);
fcf45b4c
GFT
678 rxdesc->desc1.bufaddrl = cpu_to_le32(
679 (__u64)rxbi->mapping & 0xFFFFFFFFUL);
3bf61c55 680 rxdesc->desc1.datalen = cpu_to_le16(rxbi->len);
cd0ff491 681 if (jme->dev->features & NETIF_F_HIGHDMA)
3bf61c55 682 rxdesc->desc1.flags = RXFLAG_64BIT;
d7699f87 683 wmb();
3bf61c55 684 rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT;
d7699f87
GFT
685}
686
3bf61c55
GFT
687static int
688jme_make_new_rx_buf(struct jme_adapter *jme, int i)
4330c2f2
GFT
689{
690 struct jme_ring *rxring = &(jme->rxring[0]);
b3821cc5 691 struct jme_buffer_info *rxbi = rxring->bufinf + i;
cd0ff491 692 struct sk_buff *skb;
4330c2f2 693
79ce639c
GFT
694 skb = netdev_alloc_skb(jme->dev,
695 jme->dev->mtu + RX_EXTRA_LEN);
cd0ff491 696 if (unlikely(!skb))
4330c2f2 697 return -ENOMEM;
3b70a6fa
GFT
698#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
699 skb->dev = jme->dev;
700#endif
3bf61c55 701
4330c2f2 702 rxbi->skb = skb;
3bf61c55 703 rxbi->len = skb_tailroom(skb);
b3821cc5
GFT
704 rxbi->mapping = pci_map_page(jme->pdev,
705 virt_to_page(skb->data),
706 offset_in_page(skb->data),
707 rxbi->len,
708 PCI_DMA_FROMDEVICE);
4330c2f2
GFT
709
710 return 0;
711}
712
3bf61c55
GFT
713static void
714jme_free_rx_buf(struct jme_adapter *jme, int i)
4330c2f2
GFT
715{
716 struct jme_ring *rxring = &(jme->rxring[0]);
717 struct jme_buffer_info *rxbi = rxring->bufinf;
718 rxbi += i;
719
cd0ff491 720 if (rxbi->skb) {
b3821cc5 721 pci_unmap_page(jme->pdev,
4330c2f2 722 rxbi->mapping,
3bf61c55 723 rxbi->len,
4330c2f2
GFT
724 PCI_DMA_FROMDEVICE);
725 dev_kfree_skb(rxbi->skb);
726 rxbi->skb = NULL;
727 rxbi->mapping = 0;
3bf61c55 728 rxbi->len = 0;
4330c2f2
GFT
729 }
730}
731
3bf61c55
GFT
732static void
733jme_free_rx_resources(struct jme_adapter *jme)
734{
735 int i;
736 struct jme_ring *rxring = &(jme->rxring[0]);
737
cd0ff491 738 if (rxring->alloc) {
0ede469c
GFT
739 if (rxring->bufinf) {
740 for (i = 0 ; i < jme->rx_ring_size ; ++i)
741 jme_free_rx_buf(jme, i);
742 kfree(rxring->bufinf);
743 }
3bf61c55
GFT
744
745 dma_free_coherent(&(jme->pdev->dev),
b3821cc5 746 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
3bf61c55
GFT
747 rxring->alloc,
748 rxring->dmaalloc);
749 rxring->alloc = NULL;
750 rxring->desc = NULL;
751 rxring->dmaalloc = 0;
752 rxring->dma = 0;
0ede469c 753 rxring->bufinf = NULL;
3bf61c55
GFT
754 }
755 rxring->next_to_use = 0;
cdcdc9eb 756 atomic_set(&rxring->next_to_clean, 0);
3bf61c55
GFT
757}
758
759static int
760jme_setup_rx_resources(struct jme_adapter *jme)
d7699f87
GFT
761{
762 int i;
763 struct jme_ring *rxring = &(jme->rxring[0]);
764
765 rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
b3821cc5
GFT
766 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
767 &(rxring->dmaalloc),
768 GFP_ATOMIC);
0ede469c
GFT
769 if (!rxring->alloc)
770 goto err_set_null;
d7699f87
GFT
771
772 /*
773 * 16 Bytes align
774 */
cd0ff491 775 rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc),
3bf61c55 776 RING_DESC_ALIGN);
4330c2f2 777 rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
d7699f87 778 rxring->next_to_use = 0;
cdcdc9eb 779 atomic_set(&rxring->next_to_clean, 0);
d7699f87 780
0ede469c
GFT
781 rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) *
782 jme->rx_ring_size, GFP_ATOMIC);
783 if (unlikely(!(rxring->bufinf)))
784 goto err_free_rxring;
785
d7699f87
GFT
786 /*
787 * Initiallize Receive Descriptors
788 */
0ede469c
GFT
789 memset(rxring->bufinf, 0,
790 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
cd0ff491
GFT
791 for (i = 0 ; i < jme->rx_ring_size ; ++i) {
792 if (unlikely(jme_make_new_rx_buf(jme, i))) {
3bf61c55
GFT
793 jme_free_rx_resources(jme);
794 return -ENOMEM;
795 }
d7699f87
GFT
796
797 jme_set_clean_rxdesc(jme, i);
798 }
799
d7699f87 800 return 0;
0ede469c
GFT
801
802err_free_rxring:
803 dma_free_coherent(&(jme->pdev->dev),
804 RX_RING_ALLOC_SIZE(jme->rx_ring_size),
805 rxring->alloc,
806 rxring->dmaalloc);
807err_set_null:
808 rxring->desc = NULL;
809 rxring->dmaalloc = 0;
810 rxring->dma = 0;
811 rxring->bufinf = NULL;
812
813 return -ENOMEM;
d7699f87
GFT
814}
815
cd0ff491 816static inline void
3bf61c55 817jme_enable_rx_engine(struct jme_adapter *jme)
d7699f87 818{
d7699f87 819 /*
cd0ff491
GFT
820 * Select Queue 0
821 */
822 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
823 RXCS_QUEUESEL_Q0);
824 wmb();
825
826 /*
d7699f87
GFT
827 * Setup RX DMA Bass Address
828 */
0ede469c 829 jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
3bf61c55 830 jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
0ede469c 831 jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
d7699f87
GFT
832
833 /*
b3821cc5 834 * Setup RX Descriptor Count
d7699f87 835 */
b3821cc5 836 jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
d7699f87 837
3bf61c55 838 /*
d7699f87
GFT
839 * Setup Unicast Filter
840 */
841 jme_set_multi(jme->dev);
842
843 /*
844 * Enable RX Engine
845 */
846 wmb();
79ce639c 847 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
4330c2f2
GFT
848 RXCS_QUEUESEL_Q0 |
849 RXCS_ENABLE |
850 RXCS_QST);
d7699f87
GFT
851}
852
cd0ff491 853static inline void
3bf61c55 854jme_restart_rx_engine(struct jme_adapter *jme)
4330c2f2
GFT
855{
856 /*
3bf61c55 857 * Start RX Engine
4330c2f2 858 */
79ce639c 859 jwrite32(jme, JME_RXCS, jme->reg_rxcs |
4330c2f2
GFT
860 RXCS_QUEUESEL_Q0 |
861 RXCS_ENABLE |
862 RXCS_QST);
863}
864
cd0ff491 865static inline void
3bf61c55 866jme_disable_rx_engine(struct jme_adapter *jme)
d7699f87
GFT
867{
868 int i;
cd0ff491 869 u32 val;
d7699f87
GFT
870
871 /*
872 * Disable RX Engine
873 */
29bdd921 874 jwrite32(jme, JME_RXCS, jme->reg_rxcs);
cd0ff491 875 wmb();
d7699f87
GFT
876
877 val = jread32(jme, JME_RXCS);
cd0ff491 878 for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
29bdd921 879 mdelay(1);
d7699f87 880 val = jread32(jme, JME_RXCS);
cd0ff491 881 rmb();
d7699f87
GFT
882 }
883
cd0ff491
GFT
884 if (!i)
885 jeprintk(jme->pdev, "Disable RX engine timeout.\n");
d7699f87
GFT
886
887}
888
192570e0 889static int
cd0ff491 890jme_rxsum_ok(struct jme_adapter *jme, u16 flags)
192570e0 891{
cd0ff491 892 if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
192570e0
GFT
893 return false;
894
0ede469c
GFT
895 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
896 == RXWBFLAG_TCPON)) {
897 if (flags & RXWBFLAG_IPV4)
7ca9ebee 898#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
0ede469c 899 msg_rx_err(jme, "TCP Checksum error\n");
7ca9ebee
GFT
900#else
901 netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
902#endif
0ede469c 903 return false;
192570e0
GFT
904 }
905
0ede469c
GFT
906 if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
907 == RXWBFLAG_UDPON)) {
908 if (flags & RXWBFLAG_IPV4)
7ca9ebee 909#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
0ede469c 910 msg_rx_err(jme, "UDP Checksum error.\n");
7ca9ebee
GFT
911#else
912 netif_err(jme, rx_err, jme->dev, "UDP Checksum error.\n");
913#endif
0ede469c 914 return false;
192570e0
GFT
915 }
916
0ede469c
GFT
917 if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
918 == RXWBFLAG_IPV4)) {
7ca9ebee 919#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 920 msg_rx_err(jme, "IPv4 Checksum error.\n");
7ca9ebee
GFT
921#else
922 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error.\n");
923#endif
0ede469c 924 return false;
192570e0
GFT
925 }
926
927 return true;
928}
929
3bf61c55 930static void
42b1055e 931jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
d7699f87 932{
d7699f87 933 struct jme_ring *rxring = &(jme->rxring[0]);
cd0ff491 934 struct rxdesc *rxdesc = rxring->desc;
3bf61c55 935 struct jme_buffer_info *rxbi = rxring->bufinf;
d7699f87 936 struct sk_buff *skb;
3bf61c55 937 int framesize;
d7699f87 938
3bf61c55
GFT
939 rxdesc += idx;
940 rxbi += idx;
d7699f87 941
3bf61c55
GFT
942 skb = rxbi->skb;
943 pci_dma_sync_single_for_cpu(jme->pdev,
944 rxbi->mapping,
945 rxbi->len,
946 PCI_DMA_FROMDEVICE);
947
cd0ff491 948 if (unlikely(jme_make_new_rx_buf(jme, idx))) {
3bf61c55
GFT
949 pci_dma_sync_single_for_device(jme->pdev,
950 rxbi->mapping,
951 rxbi->len,
952 PCI_DMA_FROMDEVICE);
953
954 ++(NET_STAT(jme).rx_dropped);
cd0ff491 955 } else {
3bf61c55
GFT
956 framesize = le16_to_cpu(rxdesc->descwb.framesize)
957 - RX_PREPAD_SIZE;
958
959 skb_reserve(skb, RX_PREPAD_SIZE);
960 skb_put(skb, framesize);
961 skb->protocol = eth_type_trans(skb, jme->dev);
962
3b70a6fa 963 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags)))
8c198884 964 skb->ip_summed = CHECKSUM_UNNECESSARY;
29bdd921
GFT
965 else
966 skb->ip_summed = CHECKSUM_NONE;
8c198884 967
3b70a6fa 968 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
cd0ff491 969 if (jme->vlgrp) {
cdcdc9eb 970 jme->jme_vlan_rx(skb, jme->vlgrp,
3b70a6fa 971 le16_to_cpu(rxdesc->descwb.vlan));
b3821cc5 972 NET_STAT(jme).rx_bytes += 4;
7ca9ebee 973 } else {
7ca9ebee 974 dev_kfree_skb(skb);
b3821cc5 975 }
cd0ff491 976 } else {
cdcdc9eb 977 jme->jme_rx(skb);
b3821cc5 978 }
3bf61c55 979
3b70a6fa
GFT
980 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
981 cpu_to_le16(RXWBFLAG_DEST_MUL))
3bf61c55
GFT
982 ++(NET_STAT(jme).multicast);
983
3bf61c55
GFT
984 NET_STAT(jme).rx_bytes += framesize;
985 ++(NET_STAT(jme).rx_packets);
986 }
987
988 jme_set_clean_rxdesc(jme, idx);
989
990}
991
8c198884 992static int
3bf61c55
GFT
993jme_process_receive(struct jme_adapter *jme, int limit)
994{
995 struct jme_ring *rxring = &(jme->rxring[0]);
cd0ff491 996 struct rxdesc *rxdesc = rxring->desc;
b3821cc5 997 int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
3bf61c55 998
cd0ff491 999 if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
192570e0
GFT
1000 goto out_inc;
1001
cd0ff491 1002 if (unlikely(atomic_read(&jme->link_changing) != 1))
192570e0
GFT
1003 goto out_inc;
1004
cd0ff491 1005 if (unlikely(!netif_carrier_ok(jme->dev)))
192570e0
GFT
1006 goto out_inc;
1007
cdcdc9eb 1008 i = atomic_read(&rxring->next_to_clean);
0ede469c 1009 while (limit > 0) {
3bf61c55
GFT
1010 rxdesc = rxring->desc;
1011 rxdesc += i;
1012
3b70a6fa 1013 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
3bf61c55
GFT
1014 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1015 goto out;
0ede469c 1016 --limit;
d7699f87 1017
4330c2f2
GFT
1018 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1019
cd0ff491 1020 if (unlikely(desccnt > 1 ||
192570e0 1021 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
d7699f87 1022
cd0ff491 1023 if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
3bf61c55 1024 ++(NET_STAT(jme).rx_crc_errors);
cd0ff491 1025 else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
3bf61c55
GFT
1026 ++(NET_STAT(jme).rx_fifo_errors);
1027 else
1028 ++(NET_STAT(jme).rx_errors);
4330c2f2 1029
cd0ff491 1030 if (desccnt > 1)
3bf61c55 1031 limit -= desccnt - 1;
4330c2f2 1032
cd0ff491 1033 for (j = i, ccnt = desccnt ; ccnt-- ; ) {
4330c2f2 1034 jme_set_clean_rxdesc(jme, j);
b3821cc5 1035 j = (j + 1) & (mask);
4330c2f2 1036 }
3bf61c55 1037
cd0ff491 1038 } else {
42b1055e 1039 jme_alloc_and_feed_skb(jme, i);
3bf61c55 1040 }
4330c2f2 1041
b3821cc5 1042 i = (i + desccnt) & (mask);
3bf61c55 1043 }
4330c2f2 1044
3bf61c55 1045out:
cdcdc9eb 1046 atomic_set(&rxring->next_to_clean, i);
4330c2f2 1047
192570e0
GFT
1048out_inc:
1049 atomic_inc(&jme->rx_cleaning);
1050
3bf61c55 1051 return limit > 0 ? limit : 0;
4330c2f2 1052
3bf61c55 1053}
d7699f87 1054
3bf61c55 1055static void
79ce639c
GFT
1056jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1057{
cd0ff491 1058 if (likely(atmp == dpi->cur)) {
192570e0 1059 dpi->cnt = 0;
79ce639c 1060 return;
192570e0 1061 }
79ce639c 1062
cd0ff491 1063 if (dpi->attempt == atmp) {
79ce639c 1064 ++(dpi->cnt);
cd0ff491 1065 } else {
79ce639c
GFT
1066 dpi->attempt = atmp;
1067 dpi->cnt = 0;
1068 }
1069
1070}
1071
1072static void
1073jme_dynamic_pcc(struct jme_adapter *jme)
1074{
1075 register struct dynpcc_info *dpi = &(jme->dpi);
1076
cd0ff491 1077 if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
79ce639c 1078 jme_attempt_pcc(dpi, PCC_P3);
7ca9ebee
GFT
1079 else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1080 dpi->intr_cnt > PCC_INTR_THRESHOLD)
79ce639c
GFT
1081 jme_attempt_pcc(dpi, PCC_P2);
1082 else
1083 jme_attempt_pcc(dpi, PCC_P1);
1084
cd0ff491
GFT
1085 if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1086 if (dpi->attempt < dpi->cur)
1087 tasklet_schedule(&jme->rxclean_task);
79ce639c
GFT
1088 jme_set_rx_pcc(jme, dpi->attempt);
1089 dpi->cur = dpi->attempt;
1090 dpi->cnt = 0;
1091 }
1092}
1093
1094static void
1095jme_start_pcc_timer(struct jme_adapter *jme)
1096{
1097 struct dynpcc_info *dpi = &(jme->dpi);
1098 dpi->last_bytes = NET_STAT(jme).rx_bytes;
1099 dpi->last_pkts = NET_STAT(jme).rx_packets;
1100 dpi->intr_cnt = 0;
1101 jwrite32(jme, JME_TMCSR,
1102 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1103}
1104
cd0ff491 1105static inline void
29bdd921
GFT
1106jme_stop_pcc_timer(struct jme_adapter *jme)
1107{
1108 jwrite32(jme, JME_TMCSR, 0);
1109}
1110
1111static void
cd0ff491
GFT
1112jme_shutdown_nic(struct jme_adapter *jme)
1113{
1114 u32 phylink;
1115
1116 phylink = jme_linkstat_from_phy(jme);
1117
1118 if (!(phylink & PHY_LINK_UP)) {
1119 /*
1120 * Disable all interrupt before issue timer
1121 */
1122 jme_stop_irq(jme);
1123 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1124 }
1125}
1126
1127static void
79ce639c
GFT
1128jme_pcc_tasklet(unsigned long arg)
1129{
cd0ff491 1130 struct jme_adapter *jme = (struct jme_adapter *)arg;
79ce639c
GFT
1131 struct net_device *netdev = jme->dev;
1132
cd0ff491
GFT
1133 if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1134 jme_shutdown_nic(jme);
1135 return;
1136 }
29bdd921 1137
cd0ff491 1138 if (unlikely(!netif_carrier_ok(netdev) ||
29bdd921
GFT
1139 (atomic_read(&jme->link_changing) != 1)
1140 )) {
1141 jme_stop_pcc_timer(jme);
79ce639c
GFT
1142 return;
1143 }
29bdd921 1144
cd0ff491 1145 if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
192570e0
GFT
1146 jme_dynamic_pcc(jme);
1147
79ce639c
GFT
1148 jme_start_pcc_timer(jme);
1149}
1150
cd0ff491 1151static inline void
192570e0
GFT
1152jme_polling_mode(struct jme_adapter *jme)
1153{
1154 jme_set_rx_pcc(jme, PCC_OFF);
1155}
1156
cd0ff491 1157static inline void
192570e0
GFT
1158jme_interrupt_mode(struct jme_adapter *jme)
1159{
1160 jme_set_rx_pcc(jme, PCC_P1);
1161}
1162
cd0ff491
GFT
1163static inline int
1164jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1165{
1166 u32 apmc;
1167 apmc = jread32(jme, JME_APMC);
1168 return apmc & JME_APMC_PSEUDO_HP_EN;
1169}
1170
1171static void
1172jme_start_shutdown_timer(struct jme_adapter *jme)
1173{
1174 u32 apmc;
1175
1176 apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1177 apmc &= ~JME_APMC_EPIEN_CTRL;
1178 if (!no_extplug) {
1179 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1180 wmb();
1181 }
1182 jwrite32f(jme, JME_APMC, apmc);
1183
1184 jwrite32f(jme, JME_TIMER2, 0);
1185 set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1186 jwrite32(jme, JME_TMCSR,
1187 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1188}
1189
1190static void
1191jme_stop_shutdown_timer(struct jme_adapter *jme)
1192{
1193 u32 apmc;
1194
1195 jwrite32f(jme, JME_TMCSR, 0);
1196 jwrite32f(jme, JME_TIMER2, 0);
1197 clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1198
1199 apmc = jread32(jme, JME_APMC);
1200 apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1201 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1202 wmb();
1203 jwrite32f(jme, JME_APMC, apmc);
1204}
1205
79ce639c 1206static void
3bf61c55
GFT
1207jme_link_change_tasklet(unsigned long arg)
1208{
cd0ff491 1209 struct jme_adapter *jme = (struct jme_adapter *)arg;
fcf45b4c 1210 struct net_device *netdev = jme->dev;
fcf45b4c
GFT
1211 int rc;
1212
cd0ff491
GFT
1213 while (!atomic_dec_and_test(&jme->link_changing)) {
1214 atomic_inc(&jme->link_changing);
7ca9ebee 1215#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 1216 msg_intr(jme, "Get link change lock failed.\n");
7ca9ebee
GFT
1217#else
1218 netif_info(jme, intr, jme->dev, "Get link change lock failed.\n");
1219#endif
58c92f28 1220 while (atomic_read(&jme->link_changing) != 1)
7ca9ebee 1221#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 1222 msg_intr(jme, "Waiting link change lock.\n");
7ca9ebee
GFT
1223#else
1224 netif_info(jme, intr, jme->dev, "Waiting link change lock.\n");
1225#endif
cd0ff491 1226 }
fcf45b4c 1227
cd0ff491 1228 if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
fcf45b4c
GFT
1229 goto out;
1230
29bdd921 1231 jme->old_mtu = netdev->mtu;
fcf45b4c 1232 netif_stop_queue(netdev);
cd0ff491
GFT
1233 if (jme_pseudo_hotplug_enabled(jme))
1234 jme_stop_shutdown_timer(jme);
1235
1236 jme_stop_pcc_timer(jme);
1237 tasklet_disable(&jme->txclean_task);
1238 tasklet_disable(&jme->rxclean_task);
1239 tasklet_disable(&jme->rxempty_task);
1240
1241 if (netif_carrier_ok(netdev)) {
1242 jme_reset_ghc_speed(jme);
1243 jme_disable_rx_engine(jme);
1244 jme_disable_tx_engine(jme);
fcf45b4c
GFT
1245 jme_reset_mac_processor(jme);
1246 jme_free_rx_resources(jme);
1247 jme_free_tx_resources(jme);
192570e0 1248
cd0ff491 1249 if (test_bit(JME_FLAG_POLL, &jme->flags))
192570e0 1250 jme_polling_mode(jme);
cd0ff491
GFT
1251
1252 netif_carrier_off(netdev);
fcf45b4c
GFT
1253 }
1254
1255 jme_check_link(netdev, 0);
cd0ff491 1256 if (netif_carrier_ok(netdev)) {
fcf45b4c 1257 rc = jme_setup_rx_resources(jme);
cd0ff491
GFT
1258 if (rc) {
1259 jeprintk(jme->pdev, "Allocating resources for RX error"
fcf45b4c 1260 ", Device STOPPED!\n");
cd0ff491 1261 goto out_enable_tasklet;
fcf45b4c
GFT
1262 }
1263
fcf45b4c 1264 rc = jme_setup_tx_resources(jme);
cd0ff491
GFT
1265 if (rc) {
1266 jeprintk(jme->pdev, "Allocating resources for TX error"
fcf45b4c
GFT
1267 ", Device STOPPED!\n");
1268 goto err_out_free_rx_resources;
1269 }
1270
1271 jme_enable_rx_engine(jme);
1272 jme_enable_tx_engine(jme);
1273
1274 netif_start_queue(netdev);
192570e0 1275
cd0ff491 1276 if (test_bit(JME_FLAG_POLL, &jme->flags))
192570e0 1277 jme_interrupt_mode(jme);
192570e0 1278
79ce639c 1279 jme_start_pcc_timer(jme);
cd0ff491
GFT
1280 } else if (jme_pseudo_hotplug_enabled(jme)) {
1281 jme_start_shutdown_timer(jme);
fcf45b4c
GFT
1282 }
1283
cd0ff491 1284 goto out_enable_tasklet;
fcf45b4c
GFT
1285
1286err_out_free_rx_resources:
1287 jme_free_rx_resources(jme);
cd0ff491
GFT
1288out_enable_tasklet:
1289 tasklet_enable(&jme->txclean_task);
1290 tasklet_hi_enable(&jme->rxclean_task);
1291 tasklet_hi_enable(&jme->rxempty_task);
fcf45b4c
GFT
1292out:
1293 atomic_inc(&jme->link_changing);
3bf61c55 1294}
d7699f87 1295
3bf61c55
GFT
1296static void
1297jme_rx_clean_tasklet(unsigned long arg)
1298{
cd0ff491 1299 struct jme_adapter *jme = (struct jme_adapter *)arg;
79ce639c 1300 struct dynpcc_info *dpi = &(jme->dpi);
d7699f87 1301
192570e0
GFT
1302 jme_process_receive(jme, jme->rx_ring_size);
1303 ++(dpi->intr_cnt);
42b1055e 1304
192570e0 1305}
fcf45b4c 1306
192570e0 1307static int
cdcdc9eb 1308jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
192570e0 1309{
cdcdc9eb 1310 struct jme_adapter *jme = jme_napi_priv(holder);
3b70a6fa 1311 DECLARE_NETDEV
192570e0 1312 int rest;
fcf45b4c 1313
cdcdc9eb 1314 rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
fcf45b4c 1315
cd0ff491 1316 while (atomic_read(&jme->rx_empty) > 0) {
cdcdc9eb 1317 atomic_dec(&jme->rx_empty);
192570e0
GFT
1318 ++(NET_STAT(jme).rx_dropped);
1319 jme_restart_rx_engine(jme);
1320 }
1321 atomic_inc(&jme->rx_empty);
1322
cd0ff491 1323 if (rest) {
cdcdc9eb 1324 JME_RX_COMPLETE(netdev, holder);
192570e0
GFT
1325 jme_interrupt_mode(jme);
1326 }
1327
cdcdc9eb
GFT
1328 JME_NAPI_WEIGHT_SET(budget, rest);
1329 return JME_NAPI_WEIGHT_VAL(budget) - rest;
fcf45b4c
GFT
1330}
1331
1332static void
1333jme_rx_empty_tasklet(unsigned long arg)
1334{
cd0ff491 1335 struct jme_adapter *jme = (struct jme_adapter *)arg;
fcf45b4c 1336
cd0ff491 1337 if (unlikely(atomic_read(&jme->link_changing) != 1))
fcf45b4c
GFT
1338 return;
1339
cd0ff491 1340 if (unlikely(!netif_carrier_ok(jme->dev)))
fcf45b4c
GFT
1341 return;
1342
7ca9ebee 1343#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 1344 msg_rx_status(jme, "RX Queue Full!\n");
7ca9ebee
GFT
1345#else
1346 netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1347#endif
29bdd921 1348
fcf45b4c 1349 jme_rx_clean_tasklet(arg);
cdcdc9eb 1350
cd0ff491 1351 while (atomic_read(&jme->rx_empty) > 0) {
cdcdc9eb
GFT
1352 atomic_dec(&jme->rx_empty);
1353 ++(NET_STAT(jme).rx_dropped);
1354 jme_restart_rx_engine(jme);
1355 }
1356 atomic_inc(&jme->rx_empty);
4330c2f2
GFT
1357}
1358
3bf61c55 1359static void
b3821cc5
GFT
1360jme_wake_queue_if_stopped(struct jme_adapter *jme)
1361{
0ede469c 1362 struct jme_ring *txring = &(jme->txring[0]);
b3821cc5
GFT
1363
1364 smp_wmb();
cd0ff491 1365 if (unlikely(netif_queue_stopped(jme->dev) &&
b3821cc5 1366 atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
7ca9ebee 1367#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 1368 msg_tx_done(jme, "TX Queue Waked.\n");
7ca9ebee
GFT
1369#else
1370 netif_info(jme, tx_done, jme->dev, "TX Queue Waked.\n");
1371#endif
b3821cc5 1372 netif_wake_queue(jme->dev);
b3821cc5
GFT
1373 }
1374
1375}
1376
1377static void
3bf61c55 1378jme_tx_clean_tasklet(unsigned long arg)
4330c2f2 1379{
cd0ff491 1380 struct jme_adapter *jme = (struct jme_adapter *)arg;
3bf61c55 1381 struct jme_ring *txring = &(jme->txring[0]);
cd0ff491 1382 struct txdesc *txdesc = txring->desc;
3bf61c55 1383 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
b3821cc5 1384 int i, j, cnt = 0, max, err, mask;
3bf61c55 1385
cd0ff491
GFT
1386 tx_dbg(jme, "Into txclean.\n");
1387
1388 if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
fcf45b4c
GFT
1389 goto out;
1390
cd0ff491 1391 if (unlikely(atomic_read(&jme->link_changing) != 1))
fcf45b4c
GFT
1392 goto out;
1393
cd0ff491 1394 if (unlikely(!netif_carrier_ok(jme->dev)))
fcf45b4c
GFT
1395 goto out;
1396
b3821cc5
GFT
1397 max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1398 mask = jme->tx_ring_mask;
3bf61c55 1399
cd0ff491 1400 for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
3bf61c55
GFT
1401
1402 ctxbi = txbi + i;
1403
cd0ff491 1404 if (likely(ctxbi->skb &&
b3821cc5 1405 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
8c198884 1406
cd0ff491
GFT
1407 tx_dbg(jme, "txclean: %d+%d@%lu\n",
1408 i, ctxbi->nr_desc, jiffies);
3bf61c55 1409
cd0ff491 1410 err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
3bf61c55 1411
cd0ff491 1412 for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
b3821cc5
GFT
1413 ttxbi = txbi + ((i + j) & (mask));
1414 txdesc[(i + j) & (mask)].dw[0] = 0;
3bf61c55 1415
b3821cc5 1416 pci_unmap_page(jme->pdev,
3bf61c55
GFT
1417 ttxbi->mapping,
1418 ttxbi->len,
1419 PCI_DMA_TODEVICE);
1420
3bf61c55
GFT
1421 ttxbi->mapping = 0;
1422 ttxbi->len = 0;
1423 }
1424
1425 dev_kfree_skb(ctxbi->skb);
3bf61c55
GFT
1426
1427 cnt += ctxbi->nr_desc;
1428
cd0ff491 1429 if (unlikely(err)) {
8c198884 1430 ++(NET_STAT(jme).tx_carrier_errors);
cd0ff491 1431 } else {
8c198884 1432 ++(NET_STAT(jme).tx_packets);
b3821cc5
GFT
1433 NET_STAT(jme).tx_bytes += ctxbi->len;
1434 }
1435
1436 ctxbi->skb = NULL;
1437 ctxbi->len = 0;
cdcdc9eb 1438 ctxbi->start_xmit = 0;
cd0ff491
GFT
1439
1440 } else {
3bf61c55
GFT
1441 break;
1442 }
1443
b3821cc5 1444 i = (i + ctxbi->nr_desc) & mask;
3bf61c55
GFT
1445
1446 ctxbi->nr_desc = 0;
d7699f87
GFT
1447 }
1448
cd0ff491 1449 tx_dbg(jme, "txclean: done %d@%lu.\n", i, jiffies);
cdcdc9eb 1450 atomic_set(&txring->next_to_clean, i);
79ce639c 1451 atomic_add(cnt, &txring->nr_free);
3bf61c55 1452
b3821cc5
GFT
1453 jme_wake_queue_if_stopped(jme);
1454
fcf45b4c
GFT
1455out:
1456 atomic_inc(&jme->tx_cleaning);
d7699f87
GFT
1457}
1458
79ce639c 1459static void
cd0ff491 1460jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
d7699f87 1461{
3bf61c55
GFT
1462 /*
1463 * Disable interrupt
1464 */
1465 jwrite32f(jme, JME_IENC, INTR_ENABLE);
d7699f87 1466
cd0ff491 1467 if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
47220951
GFT
1468 /*
1469 * Link change event is critical
1470 * all other events are ignored
1471 */
1472 jwrite32(jme, JME_IEVE, intrstat);
3bf61c55 1473 tasklet_schedule(&jme->linkch_task);
29bdd921 1474 goto out_reenable;
fcf45b4c 1475 }
d7699f87 1476
cd0ff491 1477 if (intrstat & INTR_TMINTR) {
47220951 1478 jwrite32(jme, JME_IEVE, INTR_TMINTR);
79ce639c 1479 tasklet_schedule(&jme->pcc_task);
47220951 1480 }
79ce639c 1481
cd0ff491 1482 if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
47220951 1483 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
4330c2f2 1484 tasklet_schedule(&jme->txclean_task);
47220951
GFT
1485 }
1486
cd0ff491 1487 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
47220951
GFT
1488 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1489 INTR_PCCRX0 |
1490 INTR_RX0EMP)) |
1491 INTR_RX0);
1492 }
d7699f87 1493
cd0ff491
GFT
1494 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1495 if (intrstat & INTR_RX0EMP)
192570e0
GFT
1496 atomic_inc(&jme->rx_empty);
1497
cd0ff491
GFT
1498 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1499 if (likely(JME_RX_SCHEDULE_PREP(jme))) {
192570e0 1500 jme_polling_mode(jme);
cdcdc9eb 1501 JME_RX_SCHEDULE(jme);
192570e0
GFT
1502 }
1503 }
cd0ff491
GFT
1504 } else {
1505 if (intrstat & INTR_RX0EMP) {
cdcdc9eb 1506 atomic_inc(&jme->rx_empty);
cd0ff491
GFT
1507 tasklet_hi_schedule(&jme->rxempty_task);
1508 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1509 tasklet_hi_schedule(&jme->rxclean_task);
cdcdc9eb 1510 }
4330c2f2 1511 }
d7699f87 1512
29bdd921 1513out_reenable:
3bf61c55 1514 /*
fcf45b4c 1515 * Re-enable interrupt
3bf61c55 1516 */
fcf45b4c 1517 jwrite32f(jme, JME_IENS, INTR_ENABLE);
79ce639c
GFT
1518}
1519
3b70a6fa
GFT
1520#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1521static irqreturn_t
1522jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1523#else
79ce639c
GFT
1524static irqreturn_t
1525jme_intr(int irq, void *dev_id)
3b70a6fa 1526#endif
79ce639c 1527{
cd0ff491
GFT
1528 struct net_device *netdev = dev_id;
1529 struct jme_adapter *jme = netdev_priv(netdev);
1530 u32 intrstat;
79ce639c
GFT
1531
1532 intrstat = jread32(jme, JME_IEVE);
1533
1534 /*
1535 * Check if it's really an interrupt for us
1536 */
7ee473a3 1537 if (unlikely((intrstat & INTR_ENABLE) == 0))
29bdd921 1538 return IRQ_NONE;
79ce639c
GFT
1539
1540 /*
1541 * Check if the device still exist
1542 */
cd0ff491
GFT
1543 if (unlikely(intrstat == ~((typeof(intrstat))0)))
1544 return IRQ_NONE;
79ce639c
GFT
1545
1546 jme_intr_msi(jme, intrstat);
1547
cd0ff491 1548 return IRQ_HANDLED;
d7699f87
GFT
1549}
1550
3b70a6fa
GFT
1551#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1552static irqreturn_t
1553jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1554#else
79ce639c
GFT
1555static irqreturn_t
1556jme_msi(int irq, void *dev_id)
3b70a6fa 1557#endif
79ce639c 1558{
cd0ff491
GFT
1559 struct net_device *netdev = dev_id;
1560 struct jme_adapter *jme = netdev_priv(netdev);
1561 u32 intrstat;
79ce639c 1562
0ede469c 1563 intrstat = jread32(jme, JME_IEVE);
79ce639c
GFT
1564
1565 jme_intr_msi(jme, intrstat);
1566
cd0ff491 1567 return IRQ_HANDLED;
79ce639c
GFT
1568}
1569
79ce639c
GFT
1570static void
1571jme_reset_link(struct jme_adapter *jme)
1572{
1573 jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1574}
1575
fcf45b4c
GFT
1576static void
1577jme_restart_an(struct jme_adapter *jme)
1578{
cd0ff491 1579 u32 bmcr;
fcf45b4c 1580
cd0ff491 1581 spin_lock_bh(&jme->phy_lock);
fcf45b4c
GFT
1582 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1583 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1584 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
cd0ff491 1585 spin_unlock_bh(&jme->phy_lock);
79ce639c
GFT
1586}
1587
1588static int
1589jme_request_irq(struct jme_adapter *jme)
1590{
1591 int rc;
cd0ff491 1592 struct net_device *netdev = jme->dev;
3b70a6fa
GFT
1593#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1594 irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1595 int irq_flags = SA_SHIRQ;
1596#else
cd0ff491
GFT
1597 irq_handler_t handler = jme_intr;
1598 int irq_flags = IRQF_SHARED;
3b70a6fa 1599#endif
cd0ff491
GFT
1600
1601 if (!pci_enable_msi(jme->pdev)) {
1602 set_bit(JME_FLAG_MSI, &jme->flags);
1603 handler = jme_msi;
1604 irq_flags = 0;
1605 }
1606
1607 rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1608 netdev);
1609 if (rc) {
1610 jeprintk(jme->pdev,
b3821cc5 1611 "Unable to request %s interrupt (return: %d)\n",
cd0ff491
GFT
1612 test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1613 rc);
79ce639c 1614
cd0ff491
GFT
1615 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1616 pci_disable_msi(jme->pdev);
1617 clear_bit(JME_FLAG_MSI, &jme->flags);
79ce639c 1618 }
cd0ff491 1619 } else {
79ce639c
GFT
1620 netdev->irq = jme->pdev->irq;
1621 }
1622
cd0ff491 1623 return rc;
79ce639c
GFT
1624}
1625
1626static void
1627jme_free_irq(struct jme_adapter *jme)
1628{
cd0ff491
GFT
1629 free_irq(jme->pdev->irq, jme->dev);
1630 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1631 pci_disable_msi(jme->pdev);
1632 clear_bit(JME_FLAG_MSI, &jme->flags);
79ce639c 1633 jme->dev->irq = jme->pdev->irq;
cd0ff491 1634 }
fcf45b4c
GFT
1635}
1636
3bf61c55
GFT
1637static int
1638jme_open(struct net_device *netdev)
d7699f87
GFT
1639{
1640 struct jme_adapter *jme = netdev_priv(netdev);
cd0ff491 1641 int rc;
79ce639c 1642
42b1055e 1643 jme_clear_pm(jme);
cdcdc9eb 1644 JME_NAPI_ENABLE(jme);
d7699f87 1645
0ede469c 1646 tasklet_enable(&jme->linkch_task);
cd0ff491
GFT
1647 tasklet_enable(&jme->txclean_task);
1648 tasklet_hi_enable(&jme->rxclean_task);
1649 tasklet_hi_enable(&jme->rxempty_task);
1650
79ce639c 1651 rc = jme_request_irq(jme);
cd0ff491 1652 if (rc)
4330c2f2 1653 goto err_out;
79ce639c 1654
d7699f87 1655 jme_start_irq(jme);
42b1055e 1656
cd0ff491 1657 if (test_bit(JME_FLAG_SSET, &jme->flags))
42b1055e
GFT
1658 jme_set_settings(netdev, &jme->old_ecmd);
1659 else
1660 jme_reset_phy_processor(jme);
1661
29bdd921 1662 jme_reset_link(jme);
d7699f87
GFT
1663
1664 return 0;
1665
d7699f87
GFT
1666err_out:
1667 netif_stop_queue(netdev);
1668 netif_carrier_off(netdev);
4330c2f2 1669 return rc;
d7699f87
GFT
1670}
1671
7ee473a3 1672#ifdef CONFIG_PM
42b1055e
GFT
1673static void
1674jme_set_100m_half(struct jme_adapter *jme)
1675{
cd0ff491 1676 u32 bmcr, tmp;
42b1055e
GFT
1677
1678 bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1679 tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1680 BMCR_SPEED1000 | BMCR_FULLDPLX);
1681 tmp |= BMCR_SPEED100;
1682
1683 if (bmcr != tmp)
1684 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1685
cd0ff491 1686 if (jme->fpgaver)
cdcdc9eb
GFT
1687 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1688 else
1689 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
42b1055e
GFT
1690}
1691
47220951
GFT
1692#define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1693static void
1694jme_wait_link(struct jme_adapter *jme)
1695{
cd0ff491 1696 u32 phylink, to = JME_WAIT_LINK_TIME;
47220951
GFT
1697
1698 mdelay(1000);
1699 phylink = jme_linkstat_from_phy(jme);
cd0ff491 1700 while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
47220951
GFT
1701 mdelay(10);
1702 phylink = jme_linkstat_from_phy(jme);
1703 }
1704}
7ee473a3 1705#endif
47220951 1706
cd0ff491 1707static inline void
42b1055e
GFT
1708jme_phy_off(struct jme_adapter *jme)
1709{
1710 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
1711}
1712
3bf61c55
GFT
1713static int
1714jme_close(struct net_device *netdev)
d7699f87
GFT
1715{
1716 struct jme_adapter *jme = netdev_priv(netdev);
1717
1718 netif_stop_queue(netdev);
1719 netif_carrier_off(netdev);
1720
1721 jme_stop_irq(jme);
79ce639c 1722 jme_free_irq(jme);
d7699f87 1723
cdcdc9eb 1724 JME_NAPI_DISABLE(jme);
192570e0 1725
0ede469c
GFT
1726 tasklet_disable(&jme->linkch_task);
1727 tasklet_disable(&jme->txclean_task);
1728 tasklet_disable(&jme->rxclean_task);
1729 tasklet_disable(&jme->rxempty_task);
8c198884 1730
cd0ff491
GFT
1731 jme_reset_ghc_speed(jme);
1732 jme_disable_rx_engine(jme);
1733 jme_disable_tx_engine(jme);
8c198884 1734 jme_reset_mac_processor(jme);
d7699f87
GFT
1735 jme_free_rx_resources(jme);
1736 jme_free_tx_resources(jme);
42b1055e 1737 jme->phylink = 0;
b3821cc5
GFT
1738 jme_phy_off(jme);
1739
1740 return 0;
1741}
1742
1743static int
1744jme_alloc_txdesc(struct jme_adapter *jme,
1745 struct sk_buff *skb)
1746{
0ede469c 1747 struct jme_ring *txring = &(jme->txring[0]);
b3821cc5
GFT
1748 int idx, nr_alloc, mask = jme->tx_ring_mask;
1749
1750 idx = txring->next_to_use;
1751 nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1752
cd0ff491 1753 if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
b3821cc5
GFT
1754 return -1;
1755
1756 atomic_sub(nr_alloc, &txring->nr_free);
42b1055e 1757
b3821cc5
GFT
1758 txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1759
1760 return idx;
1761}
1762
1763static void
1764jme_fill_tx_map(struct pci_dev *pdev,
cd0ff491 1765 struct txdesc *txdesc,
b3821cc5
GFT
1766 struct jme_buffer_info *txbi,
1767 struct page *page,
cd0ff491
GFT
1768 u32 page_offset,
1769 u32 len,
1770 u8 hidma)
b3821cc5
GFT
1771{
1772 dma_addr_t dmaaddr;
1773
1774 dmaaddr = pci_map_page(pdev,
1775 page,
1776 page_offset,
1777 len,
1778 PCI_DMA_TODEVICE);
1779
1780 pci_dma_sync_single_for_device(pdev,
1781 dmaaddr,
1782 len,
1783 PCI_DMA_TODEVICE);
1784
1785 txdesc->dw[0] = 0;
1786 txdesc->dw[1] = 0;
1787 txdesc->desc2.flags = TXFLAG_OWN;
cd0ff491 1788 txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0;
b3821cc5
GFT
1789 txdesc->desc2.datalen = cpu_to_le16(len);
1790 txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32);
1791 txdesc->desc2.bufaddrl = cpu_to_le32(
1792 (__u64)dmaaddr & 0xFFFFFFFFUL);
1793
1794 txbi->mapping = dmaaddr;
1795 txbi->len = len;
1796}
1797
1798static void
1799jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1800{
0ede469c 1801 struct jme_ring *txring = &(jme->txring[0]);
cd0ff491 1802 struct txdesc *txdesc = txring->desc, *ctxdesc;
b3821cc5 1803 struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
cd0ff491 1804 u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
b3821cc5
GFT
1805 int i, nr_frags = skb_shinfo(skb)->nr_frags;
1806 int mask = jme->tx_ring_mask;
1807 struct skb_frag_struct *frag;
cd0ff491 1808 u32 len;
b3821cc5 1809
cd0ff491
GFT
1810 for (i = 0 ; i < nr_frags ; ++i) {
1811 frag = &skb_shinfo(skb)->frags[i];
b3821cc5
GFT
1812 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1813 ctxbi = txbi + ((idx + i + 2) & (mask));
1814
1815 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1816 frag->page_offset, frag->size, hidma);
42b1055e 1817 }
b3821cc5 1818
cd0ff491 1819 len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
b3821cc5
GFT
1820 ctxdesc = txdesc + ((idx + 1) & (mask));
1821 ctxbi = txbi + ((idx + 1) & (mask));
1822 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1823 offset_in_page(skb->data), len, hidma);
1824
1825}
1826
1827static int
1828jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1829{
3b70a6fa 1830 if (unlikely(
0ede469c 1831#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
3b70a6fa
GFT
1832 skb_shinfo(skb)->tso_size
1833#else
1834 skb_shinfo(skb)->gso_size
1835#endif
1836 && skb_header_cloned(skb) &&
b3821cc5
GFT
1837 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1838 dev_kfree_skb(skb);
1839 return -1;
1840 }
1841
1842 return 0;
1843}
1844
1845static int
3b70a6fa 1846jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
b3821cc5 1847{
0ede469c 1848#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
3b70a6fa
GFT
1849 *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1850#else
1851 *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1852#endif
cd0ff491 1853 if (*mss) {
b3821cc5
GFT
1854 *flags |= TXFLAG_LSEN;
1855
cd0ff491 1856 if (skb->protocol == htons(ETH_P_IP)) {
b3821cc5
GFT
1857 struct iphdr *iph = ip_hdr(skb);
1858
1859 iph->check = 0;
cd0ff491 1860 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
b3821cc5
GFT
1861 iph->daddr, 0,
1862 IPPROTO_TCP,
1863 0);
cd0ff491 1864 } else {
b3821cc5
GFT
1865 struct ipv6hdr *ip6h = ipv6_hdr(skb);
1866
cd0ff491 1867 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
b3821cc5
GFT
1868 &ip6h->daddr, 0,
1869 IPPROTO_TCP,
1870 0);
1871 }
1872
1873 return 0;
1874 }
1875
1876 return 1;
1877}
1878
1879static void
cd0ff491 1880jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
b3821cc5 1881{
3b70a6fa
GFT
1882#ifdef CHECKSUM_PARTIAL
1883 if (skb->ip_summed == CHECKSUM_PARTIAL)
1884#else
1885 if (skb->ip_summed == CHECKSUM_HW)
1886#endif
1887 {
cd0ff491 1888 u8 ip_proto;
b3821cc5 1889
3b70a6fa
GFT
1890#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1891 if (skb->protocol == htons(ETH_P_IP))
1892 ip_proto = ip_hdr(skb)->protocol;
1893 else if (skb->protocol == htons(ETH_P_IPV6))
1894 ip_proto = ipv6_hdr(skb)->nexthdr;
1895 else
1896 ip_proto = 0;
1897#else
b3821cc5 1898 switch (skb->protocol) {
cd0ff491 1899 case htons(ETH_P_IP):
b3821cc5
GFT
1900 ip_proto = ip_hdr(skb)->protocol;
1901 break;
cd0ff491 1902 case htons(ETH_P_IPV6):
b3821cc5
GFT
1903 ip_proto = ipv6_hdr(skb)->nexthdr;
1904 break;
1905 default:
1906 ip_proto = 0;
1907 break;
1908 }
3b70a6fa 1909#endif
b3821cc5 1910
cd0ff491 1911 switch (ip_proto) {
b3821cc5
GFT
1912 case IPPROTO_TCP:
1913 *flags |= TXFLAG_TCPCS;
1914 break;
1915 case IPPROTO_UDP:
1916 *flags |= TXFLAG_UDPCS;
1917 break;
1918 default:
7ca9ebee 1919#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 1920 msg_tx_err(jme, "Error upper layer protocol.\n");
7ca9ebee
GFT
1921#else
1922 netif_err(jme, tx_err, jme->dev, "Error upper layer protocol.\n");
1923#endif
b3821cc5
GFT
1924 break;
1925 }
1926 }
1927}
1928
cd0ff491 1929static inline void
3b70a6fa 1930jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
b3821cc5 1931{
cd0ff491 1932 if (vlan_tx_tag_present(skb)) {
b3821cc5 1933 *flags |= TXFLAG_TAGON;
3b70a6fa 1934 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
42b1055e 1935 }
b3821cc5
GFT
1936}
1937
1938static int
3b70a6fa 1939jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
b3821cc5 1940{
0ede469c 1941 struct jme_ring *txring = &(jme->txring[0]);
cd0ff491 1942 struct txdesc *txdesc;
b3821cc5 1943 struct jme_buffer_info *txbi;
cd0ff491 1944 u8 flags;
b3821cc5 1945
cd0ff491 1946 txdesc = (struct txdesc *)txring->desc + idx;
b3821cc5
GFT
1947 txbi = txring->bufinf + idx;
1948
1949 txdesc->dw[0] = 0;
1950 txdesc->dw[1] = 0;
1951 txdesc->dw[2] = 0;
1952 txdesc->dw[3] = 0;
1953 txdesc->desc1.pktsize = cpu_to_le16(skb->len);
1954 /*
1955 * Set OWN bit at final.
1956 * When kernel transmit faster than NIC.
1957 * And NIC trying to send this descriptor before we tell
1958 * it to start sending this TX queue.
1959 * Other fields are already filled correctly.
1960 */
1961 wmb();
1962 flags = TXFLAG_OWN | TXFLAG_INT;
cd0ff491
GFT
1963 /*
1964 * Set checksum flags while not tso
1965 */
1966 if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
1967 jme_tx_csum(jme, skb, &flags);
b3821cc5 1968 jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
3b70a6fa 1969 jme_map_tx_skb(jme, skb, idx);
b3821cc5
GFT
1970 txdesc->desc1.flags = flags;
1971 /*
1972 * Set tx buffer info after telling NIC to send
1973 * For better tx_clean timing
1974 */
1975 wmb();
1976 txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
1977 txbi->skb = skb;
1978 txbi->len = skb->len;
cd0ff491
GFT
1979 txbi->start_xmit = jiffies;
1980 if (!txbi->start_xmit)
8d27293f 1981 txbi->start_xmit = (0UL-1);
d7699f87
GFT
1982
1983 return 0;
1984}
1985
b3821cc5
GFT
1986static void
1987jme_stop_queue_if_full(struct jme_adapter *jme)
1988{
0ede469c 1989 struct jme_ring *txring = &(jme->txring[0]);
cd0ff491
GFT
1990 struct jme_buffer_info *txbi = txring->bufinf;
1991 int idx = atomic_read(&txring->next_to_clean);
cdcdc9eb 1992
cd0ff491 1993 txbi += idx;
b3821cc5
GFT
1994
1995 smp_wmb();
cd0ff491 1996 if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
b3821cc5 1997 netif_stop_queue(jme->dev);
7ca9ebee 1998#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 1999 msg_tx_queued(jme, "TX Queue Paused.\n");
7ca9ebee
GFT
2000#else
2001 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused.\n");
2002#endif
b3821cc5 2003 smp_wmb();
cd0ff491
GFT
2004 if (atomic_read(&txring->nr_free)
2005 >= (jme->tx_wake_threshold)) {
b3821cc5 2006 netif_wake_queue(jme->dev);
7ca9ebee 2007#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2008 msg_tx_queued(jme, "TX Queue Fast Waked.\n");
7ca9ebee
GFT
2009#else
2010 netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked.\n");
2011#endif
b3821cc5
GFT
2012 }
2013 }
2014
cd0ff491 2015 if (unlikely(txbi->start_xmit &&
cdcdc9eb
GFT
2016 (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2017 txbi->skb)) {
2018 netif_stop_queue(jme->dev);
7ca9ebee 2019#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2020 msg_tx_queued(jme, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
7ca9ebee
GFT
2021#else
2022 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu.\n", idx, jiffies);
2023#endif
cdcdc9eb 2024 }
b3821cc5
GFT
2025}
2026
3bf61c55
GFT
2027/*
2028 * This function is already protected by netif_tx_lock()
2029 */
cd0ff491 2030
7ca9ebee 2031#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
3bf61c55 2032static int
7ca9ebee
GFT
2033#else
2034static netdev_tx_t
2035#endif
3bf61c55 2036jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
d7699f87 2037{
cd0ff491 2038 struct jme_adapter *jme = netdev_priv(netdev);
b3821cc5 2039 int idx;
d7699f87 2040
cd0ff491 2041 if (unlikely(jme_expand_header(jme, skb))) {
b3821cc5
GFT
2042 ++(NET_STAT(jme).tx_dropped);
2043 return NETDEV_TX_OK;
2044 }
2045
2046 idx = jme_alloc_txdesc(jme, skb);
79ce639c 2047
cd0ff491 2048 if (unlikely(idx < 0)) {
b3821cc5 2049 netif_stop_queue(netdev);
7ca9ebee 2050#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2051 msg_tx_err(jme, "BUG! Tx ring full when queue awake!\n");
7ca9ebee
GFT
2052#else
2053 netif_err(jme, tx_err, jme->dev, "BUG! Tx ring full when queue awake!\n");
2054#endif
d7699f87 2055
cd0ff491 2056 return NETDEV_TX_BUSY;
b3821cc5
GFT
2057 }
2058
3b70a6fa 2059 jme_fill_tx_desc(jme, skb, idx);
b3821cc5 2060
4330c2f2
GFT
2061 jwrite32(jme, JME_TXCS, jme->reg_txcs |
2062 TXCS_SELECT_QUEUE0 |
2063 TXCS_QUEUE0S |
2064 TXCS_ENABLE);
0ede469c 2065#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
d7699f87 2066 netdev->trans_start = jiffies;
0ede469c 2067#endif
d7699f87 2068
cd0ff491
GFT
2069 tx_dbg(jme, "xmit: %d+%d@%lu\n", idx,
2070 skb_shinfo(skb)->nr_frags + 2,
2071 jiffies);
b3821cc5
GFT
2072 jme_stop_queue_if_full(jme);
2073
cd0ff491 2074 return NETDEV_TX_OK;
d7699f87
GFT
2075}
2076
3bf61c55
GFT
2077static int
2078jme_set_macaddr(struct net_device *netdev, void *p)
d7699f87 2079{
cd0ff491 2080 struct jme_adapter *jme = netdev_priv(netdev);
d7699f87 2081 struct sockaddr *addr = p;
cd0ff491 2082 u32 val;
d7699f87 2083
cd0ff491 2084 if (netif_running(netdev))
d7699f87
GFT
2085 return -EBUSY;
2086
cd0ff491 2087 spin_lock_bh(&jme->macaddr_lock);
d7699f87
GFT
2088 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2089
186fc259
GFT
2090 val = (addr->sa_data[3] & 0xff) << 24 |
2091 (addr->sa_data[2] & 0xff) << 16 |
2092 (addr->sa_data[1] & 0xff) << 8 |
2093 (addr->sa_data[0] & 0xff);
4330c2f2 2094 jwrite32(jme, JME_RXUMA_LO, val);
186fc259
GFT
2095 val = (addr->sa_data[5] & 0xff) << 8 |
2096 (addr->sa_data[4] & 0xff);
4330c2f2 2097 jwrite32(jme, JME_RXUMA_HI, val);
cd0ff491 2098 spin_unlock_bh(&jme->macaddr_lock);
d7699f87
GFT
2099
2100 return 0;
2101}
2102
3bf61c55
GFT
2103static void
2104jme_set_multi(struct net_device *netdev)
d7699f87 2105{
3bf61c55 2106 struct jme_adapter *jme = netdev_priv(netdev);
d7699f87 2107 u32 mc_hash[2] = {};
7ca9ebee 2108#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
d7699f87 2109 int i;
7ca9ebee 2110#endif
d7699f87 2111
cd0ff491 2112 spin_lock_bh(&jme->rxmcs_lock);
8c198884
GFT
2113
2114 jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
d7699f87 2115
cd0ff491 2116 if (netdev->flags & IFF_PROMISC) {
8c198884 2117 jme->reg_rxmcs |= RXMCS_ALLFRAME;
cd0ff491 2118 } else if (netdev->flags & IFF_ALLMULTI) {
8c198884 2119 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
cd0ff491 2120 } else if (netdev->flags & IFF_MULTICAST) {
8e14c278 2121#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
3bf61c55 2122 struct dev_mc_list *mclist;
8e14c278
JP
2123#else
2124 struct netdev_hw_addr *ha;
2125#endif
3bf61c55 2126 int bit_nr;
d7699f87 2127
8c198884 2128 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
7ca9ebee 2129#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
3bf61c55
GFT
2130 for (i = 0, mclist = netdev->mc_list;
2131 mclist && i < netdev->mc_count;
2132 ++i, mclist = mclist->next) {
8e14c278 2133#elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
7ca9ebee 2134 netdev_for_each_mc_addr(mclist, netdev) {
8e14c278
JP
2135#else
2136 netdev_for_each_mc_addr(ha, netdev) {
7ca9ebee 2137#endif
8e14c278 2138#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
cd0ff491 2139 bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
8e14c278
JP
2140#else
2141 bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2142#endif
cd0ff491
GFT
2143 mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2144 }
d7699f87 2145
4330c2f2
GFT
2146 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2147 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
d7699f87
GFT
2148 }
2149
d7699f87 2150 wmb();
8c198884
GFT
2151 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2152
cd0ff491 2153 spin_unlock_bh(&jme->rxmcs_lock);
d7699f87
GFT
2154}
2155
3bf61c55 2156static int
8c198884 2157jme_change_mtu(struct net_device *netdev, int new_mtu)
d7699f87 2158{
cd0ff491 2159 struct jme_adapter *jme = netdev_priv(netdev);
79ce639c 2160
cd0ff491 2161 if (new_mtu == jme->old_mtu)
29bdd921
GFT
2162 return 0;
2163
cd0ff491
GFT
2164 if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2165 ((new_mtu) < IPV6_MIN_MTU))
2166 return -EINVAL;
79ce639c 2167
cd0ff491 2168 if (new_mtu > 4000) {
79ce639c
GFT
2169 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2170 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2171 jme_restart_rx_engine(jme);
cd0ff491 2172 } else {
79ce639c
GFT
2173 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2174 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2175 jme_restart_rx_engine(jme);
2176 }
2177
cd0ff491 2178 if (new_mtu > 1900) {
b3821cc5 2179 netdev->features &= ~(NETIF_F_HW_CSUM |
3b70a6fa
GFT
2180 NETIF_F_TSO
2181#ifdef NETIF_F_TSO6
2182 | NETIF_F_TSO6
2183#endif
2184 );
cd0ff491
GFT
2185 } else {
2186 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
b3821cc5 2187 netdev->features |= NETIF_F_HW_CSUM;
cd0ff491 2188 if (test_bit(JME_FLAG_TSO, &jme->flags))
3b70a6fa
GFT
2189 netdev->features |= NETIF_F_TSO
2190#ifdef NETIF_F_TSO6
2191 | NETIF_F_TSO6
2192#endif
2193 ;
79ce639c
GFT
2194 }
2195
cd0ff491
GFT
2196 netdev->mtu = new_mtu;
2197 jme_reset_link(jme);
79ce639c
GFT
2198
2199 return 0;
d7699f87
GFT
2200}
2201
3bf61c55 2202static void
8c198884
GFT
2203jme_tx_timeout(struct net_device *netdev)
2204{
cd0ff491 2205 struct jme_adapter *jme = netdev_priv(netdev);
8c198884 2206
cdcdc9eb
GFT
2207 jme->phylink = 0;
2208 jme_reset_phy_processor(jme);
cd0ff491 2209 if (test_bit(JME_FLAG_SSET, &jme->flags))
cdcdc9eb
GFT
2210 jme_set_settings(netdev, &jme->old_ecmd);
2211
8c198884 2212 /*
cdcdc9eb 2213 * Force to Reset the link again
8c198884 2214 */
29bdd921 2215 jme_reset_link(jme);
8c198884
GFT
2216}
2217
1e5ebebc
GFT
2218static inline void jme_pause_rx(struct jme_adapter *jme)
2219{
2220 atomic_dec(&jme->link_changing);
2221
2222 jme_set_rx_pcc(jme, PCC_OFF);
2223 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2224 JME_NAPI_DISABLE(jme);
2225 } else {
2226 tasklet_disable(&jme->rxclean_task);
2227 tasklet_disable(&jme->rxempty_task);
2228 }
2229}
2230
2231static inline void jme_resume_rx(struct jme_adapter *jme)
2232{
2233 struct dynpcc_info *dpi = &(jme->dpi);
2234
2235 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2236 JME_NAPI_ENABLE(jme);
2237 } else {
2238 tasklet_hi_enable(&jme->rxclean_task);
2239 tasklet_hi_enable(&jme->rxempty_task);
2240 }
2241 dpi->cur = PCC_P1;
2242 dpi->attempt = PCC_P1;
2243 dpi->cnt = 0;
2244 jme_set_rx_pcc(jme, PCC_P1);
2245
2246 atomic_inc(&jme->link_changing);
2247}
2248
8c198884 2249static void
42b1055e
GFT
2250jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2251{
2252 struct jme_adapter *jme = netdev_priv(netdev);
2253
1e5ebebc 2254 jme_pause_rx(jme);
42b1055e 2255 jme->vlgrp = grp;
1e5ebebc 2256 jme_resume_rx(jme);
42b1055e
GFT
2257}
2258
7ca9ebee
GFT
2259#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2260static void
2261jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2262{
2263 struct jme_adapter *jme = netdev_priv(netdev);
2264
7ca9ebee 2265 if(jme->vlgrp) {
1e5ebebc 2266 jme_pause_rx(jme);
7ca9ebee
GFT
2267#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2268 jme->vlgrp->vlan_devices[vid] = NULL;
2269#else
2270 vlan_group_set_device(jme->vlgrp, vid, NULL);
2271#endif
1e5ebebc 2272 jme_resume_rx(jme);
7ca9ebee 2273 }
7ca9ebee
GFT
2274}
2275#endif
2276
42b1055e 2277static void
3bf61c55
GFT
2278jme_get_drvinfo(struct net_device *netdev,
2279 struct ethtool_drvinfo *info)
d7699f87 2280{
cd0ff491 2281 struct jme_adapter *jme = netdev_priv(netdev);
d7699f87 2282
cd0ff491
GFT
2283 strcpy(info->driver, DRV_NAME);
2284 strcpy(info->version, DRV_VERSION);
2285 strcpy(info->bus_info, pci_name(jme->pdev));
d7699f87
GFT
2286}
2287
3bf61c55 2288static int
8c198884
GFT
2289jme_get_regs_len(struct net_device *netdev)
2290{
cd0ff491 2291 return JME_REG_LEN;
8c198884
GFT
2292}
2293
2294static void
cd0ff491 2295mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
8c198884
GFT
2296{
2297 int i;
2298
cd0ff491 2299 for (i = 0 ; i < len ; i += 4)
79ce639c 2300 p[i >> 2] = jread32(jme, reg + i);
186fc259 2301}
8c198884 2302
186fc259 2303static void
cd0ff491 2304mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
186fc259
GFT
2305{
2306 int i;
cd0ff491 2307 u16 *p16 = (u16 *)p;
186fc259 2308
cd0ff491 2309 for (i = 0 ; i < reg_nr ; ++i)
186fc259 2310 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
8c198884
GFT
2311}
2312
2313static void
2314jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2315{
cd0ff491
GFT
2316 struct jme_adapter *jme = netdev_priv(netdev);
2317 u32 *p32 = (u32 *)p;
8c198884 2318
186fc259 2319 memset(p, 0xFF, JME_REG_LEN);
8c198884
GFT
2320
2321 regs->version = 1;
2322 mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2323
2324 p32 += 0x100 >> 2;
2325 mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2326
2327 p32 += 0x100 >> 2;
2328 mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2329
2330 p32 += 0x100 >> 2;
2331 mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2332
186fc259
GFT
2333 p32 += 0x100 >> 2;
2334 mdio_memcpy(jme, p32, JME_PHY_REG_NR);
8c198884
GFT
2335}
2336
2337static int
2338jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2339{
2340 struct jme_adapter *jme = netdev_priv(netdev);
2341
8c198884
GFT
2342 ecmd->tx_coalesce_usecs = PCC_TX_TO;
2343 ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2344
cd0ff491 2345 if (test_bit(JME_FLAG_POLL, &jme->flags)) {
cdcdc9eb
GFT
2346 ecmd->use_adaptive_rx_coalesce = false;
2347 ecmd->rx_coalesce_usecs = 0;
2348 ecmd->rx_max_coalesced_frames = 0;
2349 return 0;
2350 }
2351
2352 ecmd->use_adaptive_rx_coalesce = true;
2353
cd0ff491 2354 switch (jme->dpi.cur) {
8c198884
GFT
2355 case PCC_P1:
2356 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2357 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2358 break;
2359 case PCC_P2:
2360 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2361 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2362 break;
2363 case PCC_P3:
2364 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2365 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2366 break;
2367 default:
2368 break;
2369 }
2370
2371 return 0;
2372}
2373
192570e0
GFT
2374static int
2375jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2376{
2377 struct jme_adapter *jme = netdev_priv(netdev);
2378 struct dynpcc_info *dpi = &(jme->dpi);
2379
cd0ff491 2380 if (netif_running(netdev))
cdcdc9eb
GFT
2381 return -EBUSY;
2382
7ca9ebee
GFT
2383 if (ecmd->use_adaptive_rx_coalesce &&
2384 test_bit(JME_FLAG_POLL, &jme->flags)) {
cd0ff491 2385 clear_bit(JME_FLAG_POLL, &jme->flags);
cdcdc9eb
GFT
2386 jme->jme_rx = netif_rx;
2387 jme->jme_vlan_rx = vlan_hwaccel_rx;
192570e0
GFT
2388 dpi->cur = PCC_P1;
2389 dpi->attempt = PCC_P1;
2390 dpi->cnt = 0;
2391 jme_set_rx_pcc(jme, PCC_P1);
2392 jme_interrupt_mode(jme);
7ca9ebee
GFT
2393 } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2394 !(test_bit(JME_FLAG_POLL, &jme->flags))) {
cd0ff491 2395 set_bit(JME_FLAG_POLL, &jme->flags);
cdcdc9eb
GFT
2396 jme->jme_rx = netif_receive_skb;
2397 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
192570e0
GFT
2398 jme_interrupt_mode(jme);
2399 }
2400
2401 return 0;
2402}
2403
8c198884
GFT
2404static void
2405jme_get_pauseparam(struct net_device *netdev,
2406 struct ethtool_pauseparam *ecmd)
2407{
2408 struct jme_adapter *jme = netdev_priv(netdev);
cd0ff491 2409 u32 val;
8c198884
GFT
2410
2411 ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2412 ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2413
cd0ff491
GFT
2414 spin_lock_bh(&jme->phy_lock);
2415 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2416 spin_unlock_bh(&jme->phy_lock);
b3821cc5
GFT
2417
2418 ecmd->autoneg =
2419 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
8c198884
GFT
2420}
2421
2422static int
2423jme_set_pauseparam(struct net_device *netdev,
2424 struct ethtool_pauseparam *ecmd)
2425{
2426 struct jme_adapter *jme = netdev_priv(netdev);
cd0ff491 2427 u32 val;
8c198884 2428
cd0ff491 2429 if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
8c198884
GFT
2430 (ecmd->tx_pause != 0)) {
2431
cd0ff491 2432 if (ecmd->tx_pause)
8c198884
GFT
2433 jme->reg_txpfc |= TXPFC_PF_EN;
2434 else
2435 jme->reg_txpfc &= ~TXPFC_PF_EN;
2436
2437 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2438 }
2439
cd0ff491
GFT
2440 spin_lock_bh(&jme->rxmcs_lock);
2441 if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
8c198884
GFT
2442 (ecmd->rx_pause != 0)) {
2443
cd0ff491 2444 if (ecmd->rx_pause)
8c198884
GFT
2445 jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2446 else
2447 jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2448
2449 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2450 }
cd0ff491 2451 spin_unlock_bh(&jme->rxmcs_lock);
8c198884 2452
cd0ff491
GFT
2453 spin_lock_bh(&jme->phy_lock);
2454 val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2455 if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
8c198884
GFT
2456 (ecmd->autoneg != 0)) {
2457
cd0ff491 2458 if (ecmd->autoneg)
8c198884
GFT
2459 val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2460 else
2461 val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2462
b3821cc5
GFT
2463 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2464 MII_ADVERTISE, val);
8c198884 2465 }
cd0ff491 2466 spin_unlock_bh(&jme->phy_lock);
8c198884
GFT
2467
2468 return 0;
2469}
2470
29bdd921
GFT
2471static void
2472jme_get_wol(struct net_device *netdev,
2473 struct ethtool_wolinfo *wol)
2474{
2475 struct jme_adapter *jme = netdev_priv(netdev);
2476
2477 wol->supported = WAKE_MAGIC | WAKE_PHY;
2478
2479 wol->wolopts = 0;
2480
cd0ff491 2481 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
29bdd921
GFT
2482 wol->wolopts |= WAKE_PHY;
2483
cd0ff491 2484 if (jme->reg_pmcs & PMCS_MFEN)
29bdd921
GFT
2485 wol->wolopts |= WAKE_MAGIC;
2486
2487}
2488
2489static int
2490jme_set_wol(struct net_device *netdev,
2491 struct ethtool_wolinfo *wol)
2492{
2493 struct jme_adapter *jme = netdev_priv(netdev);
2494
cd0ff491 2495 if (wol->wolopts & (WAKE_MAGICSECURE |
29bdd921
GFT
2496 WAKE_UCAST |
2497 WAKE_MCAST |
2498 WAKE_BCAST |
2499 WAKE_ARP))
2500 return -EOPNOTSUPP;
2501
2502 jme->reg_pmcs = 0;
2503
cd0ff491 2504 if (wol->wolopts & WAKE_PHY)
29bdd921
GFT
2505 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2506
cd0ff491 2507 if (wol->wolopts & WAKE_MAGIC)
29bdd921
GFT
2508 jme->reg_pmcs |= PMCS_MFEN;
2509
cd0ff491 2510 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
42b1055e 2511
29bdd921
GFT
2512 return 0;
2513}
b3821cc5 2514
8c198884 2515static int
3bf61c55
GFT
2516jme_get_settings(struct net_device *netdev,
2517 struct ethtool_cmd *ecmd)
d7699f87
GFT
2518{
2519 struct jme_adapter *jme = netdev_priv(netdev);
2520 int rc;
8c198884 2521
cd0ff491 2522 spin_lock_bh(&jme->phy_lock);
d7699f87 2523 rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
cd0ff491 2524 spin_unlock_bh(&jme->phy_lock);
d7699f87
GFT
2525 return rc;
2526}
2527
3bf61c55
GFT
2528static int
2529jme_set_settings(struct net_device *netdev,
2530 struct ethtool_cmd *ecmd)
d7699f87
GFT
2531{
2532 struct jme_adapter *jme = netdev_priv(netdev);
cd0ff491 2533 int rc, fdc = 0;
fcf45b4c 2534
cd0ff491 2535 if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
8c198884
GFT
2536 return -EINVAL;
2537
cd0ff491 2538 if (jme->mii_if.force_media &&
79ce639c
GFT
2539 ecmd->autoneg != AUTONEG_ENABLE &&
2540 (jme->mii_if.full_duplex != ecmd->duplex))
2541 fdc = 1;
2542
cd0ff491 2543 spin_lock_bh(&jme->phy_lock);
d7699f87 2544 rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
cd0ff491 2545 spin_unlock_bh(&jme->phy_lock);
fcf45b4c 2546
cd0ff491 2547 if (!rc && fdc)
79ce639c
GFT
2548 jme_reset_link(jme);
2549
cd0ff491
GFT
2550 if (!rc) {
2551 set_bit(JME_FLAG_SSET, &jme->flags);
29bdd921
GFT
2552 jme->old_ecmd = *ecmd;
2553 }
2554
d7699f87
GFT
2555 return rc;
2556}
2557
cd0ff491 2558static u32
3bf61c55
GFT
2559jme_get_link(struct net_device *netdev)
2560{
d7699f87
GFT
2561 struct jme_adapter *jme = netdev_priv(netdev);
2562 return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2563}
2564
8c198884 2565static u32
cd0ff491
GFT
2566jme_get_msglevel(struct net_device *netdev)
2567{
2568 struct jme_adapter *jme = netdev_priv(netdev);
2569 return jme->msg_enable;
2570}
2571
2572static void
2573jme_set_msglevel(struct net_device *netdev, u32 value)
8c198884 2574{
cd0ff491
GFT
2575 struct jme_adapter *jme = netdev_priv(netdev);
2576 jme->msg_enable = value;
2577}
8c198884 2578
cd0ff491
GFT
2579static u32
2580jme_get_rx_csum(struct net_device *netdev)
2581{
2582 struct jme_adapter *jme = netdev_priv(netdev);
8c198884
GFT
2583 return jme->reg_rxmcs & RXMCS_CHECKSUM;
2584}
2585
2586static int
2587jme_set_rx_csum(struct net_device *netdev, u32 on)
2588{
cd0ff491 2589 struct jme_adapter *jme = netdev_priv(netdev);
b3821cc5 2590
cd0ff491
GFT
2591 spin_lock_bh(&jme->rxmcs_lock);
2592 if (on)
8c198884
GFT
2593 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2594 else
2595 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2596 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
cd0ff491 2597 spin_unlock_bh(&jme->rxmcs_lock);
8c198884
GFT
2598
2599 return 0;
2600}
2601
2602static int
2603jme_set_tx_csum(struct net_device *netdev, u32 on)
2604{
cd0ff491 2605 struct jme_adapter *jme = netdev_priv(netdev);
b3821cc5 2606
cd0ff491
GFT
2607 if (on) {
2608 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2609 if (netdev->mtu <= 1900)
b3821cc5 2610 netdev->features |= NETIF_F_HW_CSUM;
cd0ff491
GFT
2611 } else {
2612 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
8c198884 2613 netdev->features &= ~NETIF_F_HW_CSUM;
b3821cc5 2614 }
8c198884
GFT
2615
2616 return 0;
2617}
2618
2619static int
b3821cc5
GFT
2620jme_set_tso(struct net_device *netdev, u32 on)
2621{
cd0ff491 2622 struct jme_adapter *jme = netdev_priv(netdev);
b3821cc5 2623
cd0ff491
GFT
2624 if (on) {
2625 set_bit(JME_FLAG_TSO, &jme->flags);
2626 if (netdev->mtu <= 1900)
3b70a6fa
GFT
2627 netdev->features |= NETIF_F_TSO
2628#ifdef NETIF_F_TSO6
2629 | NETIF_F_TSO6
2630#endif
2631 ;
cd0ff491
GFT
2632 } else {
2633 clear_bit(JME_FLAG_TSO, &jme->flags);
3b70a6fa
GFT
2634 netdev->features &= ~(NETIF_F_TSO
2635#ifdef NETIF_F_TSO6
2636 | NETIF_F_TSO6
2637#endif
2638 );
b3821cc5
GFT
2639 }
2640
cd0ff491 2641 return 0;
b3821cc5
GFT
2642}
2643
2644static int
8c198884
GFT
2645jme_nway_reset(struct net_device *netdev)
2646{
cd0ff491 2647 struct jme_adapter *jme = netdev_priv(netdev);
8c198884
GFT
2648 jme_restart_an(jme);
2649 return 0;
2650}
2651
cd0ff491 2652static u8
186fc259
GFT
2653jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2654{
cd0ff491 2655 u32 val;
186fc259
GFT
2656 int to;
2657
2658 val = jread32(jme, JME_SMBCSR);
2659 to = JME_SMB_BUSY_TIMEOUT;
cd0ff491 2660 while ((val & SMBCSR_BUSY) && --to) {
186fc259
GFT
2661 msleep(1);
2662 val = jread32(jme, JME_SMBCSR);
2663 }
cd0ff491 2664 if (!to) {
7ca9ebee 2665#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2666 msg_hw(jme, "SMB Bus Busy.\n");
7ca9ebee
GFT
2667#else
2668 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2669#endif
186fc259
GFT
2670 return 0xFF;
2671 }
2672
2673 jwrite32(jme, JME_SMBINTF,
2674 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2675 SMBINTF_HWRWN_READ |
2676 SMBINTF_HWCMD);
2677
2678 val = jread32(jme, JME_SMBINTF);
2679 to = JME_SMB_BUSY_TIMEOUT;
cd0ff491 2680 while ((val & SMBINTF_HWCMD) && --to) {
186fc259
GFT
2681 msleep(1);
2682 val = jread32(jme, JME_SMBINTF);
2683 }
cd0ff491 2684 if (!to) {
7ca9ebee 2685#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2686 msg_hw(jme, "SMB Bus Busy.\n");
7ca9ebee
GFT
2687#else
2688 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2689#endif
186fc259
GFT
2690 return 0xFF;
2691 }
2692
2693 return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2694}
2695
2696static void
cd0ff491 2697jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
186fc259 2698{
cd0ff491 2699 u32 val;
186fc259
GFT
2700 int to;
2701
2702 val = jread32(jme, JME_SMBCSR);
2703 to = JME_SMB_BUSY_TIMEOUT;
cd0ff491 2704 while ((val & SMBCSR_BUSY) && --to) {
186fc259
GFT
2705 msleep(1);
2706 val = jread32(jme, JME_SMBCSR);
2707 }
cd0ff491 2708 if (!to) {
7ca9ebee 2709#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2710 msg_hw(jme, "SMB Bus Busy.\n");
7ca9ebee
GFT
2711#else
2712 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2713#endif
186fc259
GFT
2714 return;
2715 }
2716
2717 jwrite32(jme, JME_SMBINTF,
2718 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2719 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2720 SMBINTF_HWRWN_WRITE |
2721 SMBINTF_HWCMD);
2722
2723 val = jread32(jme, JME_SMBINTF);
2724 to = JME_SMB_BUSY_TIMEOUT;
cd0ff491 2725 while ((val & SMBINTF_HWCMD) && --to) {
186fc259
GFT
2726 msleep(1);
2727 val = jread32(jme, JME_SMBINTF);
2728 }
cd0ff491 2729 if (!to) {
7ca9ebee 2730#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
cd0ff491 2731 msg_hw(jme, "SMB Bus Busy.\n");
7ca9ebee
GFT
2732#else
2733 netif_err(jme, hw, jme->dev, "SMB Bus Busy.\n");
2734#endif
186fc259
GFT
2735 return;
2736 }
2737
2738 mdelay(2);
2739}
2740
2741static int
2742jme_get_eeprom_len(struct net_device *netdev)
2743{
cd0ff491
GFT
2744 struct jme_adapter *jme = netdev_priv(netdev);
2745 u32 val;
186fc259 2746 val = jread32(jme, JME_SMBCSR);
cd0ff491 2747 return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
186fc259
GFT
2748}
2749
2750static int
2751jme_get_eeprom(struct net_device *netdev,
2752 struct ethtool_eeprom *eeprom, u8 *data)
2753{
cd0ff491 2754 struct jme_adapter *jme = netdev_priv(netdev);
186fc259
GFT
2755 int i, offset = eeprom->offset, len = eeprom->len;
2756
2757 /*
8d27293f 2758 * ethtool will check the boundary for us
186fc259
GFT
2759 */
2760 eeprom->magic = JME_EEPROM_MAGIC;
cd0ff491 2761 for (i = 0 ; i < len ; ++i)
186fc259
GFT
2762 data[i] = jme_smb_read(jme, i + offset);
2763
2764 return 0;
2765}
2766
2767static int
2768jme_set_eeprom(struct net_device *netdev,
2769 struct ethtool_eeprom *eeprom, u8 *data)
2770{
cd0ff491 2771 struct jme_adapter *jme = netdev_priv(netdev);
186fc259
GFT
2772 int i, offset = eeprom->offset, len = eeprom->len;
2773
2774 if (eeprom->magic != JME_EEPROM_MAGIC)
2775 return -EINVAL;
2776
2777 /*
8d27293f 2778 * ethtool will check the boundary for us
186fc259 2779 */
cd0ff491 2780 for (i = 0 ; i < len ; ++i)
186fc259
GFT
2781 jme_smb_write(jme, i + offset, data[i]);
2782
2783 return 0;
2784}
2785
3b70a6fa
GFT
2786#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2787static struct ethtool_ops jme_ethtool_ops = {
2788#else
d7699f87 2789static const struct ethtool_ops jme_ethtool_ops = {
3b70a6fa 2790#endif
cd0ff491 2791 .get_drvinfo = jme_get_drvinfo,
8c198884
GFT
2792 .get_regs_len = jme_get_regs_len,
2793 .get_regs = jme_get_regs,
2794 .get_coalesce = jme_get_coalesce,
192570e0 2795 .set_coalesce = jme_set_coalesce,
cd0ff491
GFT
2796 .get_pauseparam = jme_get_pauseparam,
2797 .set_pauseparam = jme_set_pauseparam,
29bdd921
GFT
2798 .get_wol = jme_get_wol,
2799 .set_wol = jme_set_wol,
d7699f87
GFT
2800 .get_settings = jme_get_settings,
2801 .set_settings = jme_set_settings,
2802 .get_link = jme_get_link,
cd0ff491
GFT
2803 .get_msglevel = jme_get_msglevel,
2804 .set_msglevel = jme_set_msglevel,
8c198884
GFT
2805 .get_rx_csum = jme_get_rx_csum,
2806 .set_rx_csum = jme_set_rx_csum,
2807 .set_tx_csum = jme_set_tx_csum,
b3821cc5
GFT
2808 .set_tso = jme_set_tso,
2809 .set_sg = ethtool_op_set_sg,
8c198884 2810 .nway_reset = jme_nway_reset,
186fc259
GFT
2811 .get_eeprom_len = jme_get_eeprom_len,
2812 .get_eeprom = jme_get_eeprom,
2813 .set_eeprom = jme_set_eeprom,
d7699f87
GFT
2814};
2815
3bf61c55
GFT
2816static int
2817jme_pci_dma64(struct pci_dev *pdev)
d7699f87 2818{
3b70a6fa 2819 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
0ede469c
GFT
2820#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2821 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2822#else
2823 !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2824#endif
2825 )
2826#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2827 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2828#else
cd0ff491 2829 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
0ede469c 2830#endif
3bf61c55
GFT
2831 return 1;
2832
3b70a6fa 2833 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
0ede469c
GFT
2834#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2835 !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2836#else
2837 !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2838#endif
2839 )
2840#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2841 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2842#else
cd0ff491 2843 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
0ede469c 2844#endif
8c198884
GFT
2845 return 1;
2846
0ede469c
GFT
2847#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2848 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2849 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2850#else
cd0ff491
GFT
2851 if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2852 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
0ede469c 2853#endif
3bf61c55
GFT
2854 return 0;
2855
2856 return -1;
2857}
2858
cd0ff491 2859static inline void
cdcdc9eb
GFT
2860jme_phy_init(struct jme_adapter *jme)
2861{
cd0ff491 2862 u16 reg26;
cdcdc9eb
GFT
2863
2864 reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2865 jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2866}
2867
cd0ff491 2868static inline void
cdcdc9eb 2869jme_check_hw_ver(struct jme_adapter *jme)
42b1055e 2870{
cd0ff491 2871 u32 chipmode;
cdcdc9eb
GFT
2872
2873 chipmode = jread32(jme, JME_CHIPMODE);
2874
2875 jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
58c92f28 2876 jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
42b1055e
GFT
2877}
2878
3b70a6fa
GFT
2879#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2880static const struct net_device_ops jme_netdev_ops = {
2881 .ndo_open = jme_open,
2882 .ndo_stop = jme_close,
2883 .ndo_validate_addr = eth_validate_addr,
2884 .ndo_start_xmit = jme_start_xmit,
2885 .ndo_set_mac_address = jme_set_macaddr,
2886 .ndo_set_multicast_list = jme_set_multi,
2887 .ndo_change_mtu = jme_change_mtu,
2888 .ndo_tx_timeout = jme_tx_timeout,
2889 .ndo_vlan_rx_register = jme_vlan_rx_register,
2890};
2891#endif
2892
3bf61c55
GFT
2893static int __devinit
2894jme_init_one(struct pci_dev *pdev,
2895 const struct pci_device_id *ent)
2896{
cdcdc9eb 2897 int rc = 0, using_dac, i;
d7699f87
GFT
2898 struct net_device *netdev;
2899 struct jme_adapter *jme;
cd0ff491
GFT
2900 u16 bmcr, bmsr;
2901 u32 apmc;
d7699f87
GFT
2902
2903 /*
2904 * set up PCI device basics
2905 */
4330c2f2 2906 rc = pci_enable_device(pdev);
cd0ff491
GFT
2907 if (rc) {
2908 jeprintk(pdev, "Cannot enable PCI device.\n");
4330c2f2
GFT
2909 goto err_out;
2910 }
d7699f87 2911
3bf61c55 2912 using_dac = jme_pci_dma64(pdev);
cd0ff491
GFT
2913 if (using_dac < 0) {
2914 jeprintk(pdev, "Cannot set PCI DMA Mask.\n");
3bf61c55
GFT
2915 rc = -EIO;
2916 goto err_out_disable_pdev;
2917 }
2918
cd0ff491
GFT
2919 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2920 jeprintk(pdev, "No PCI resource region found.\n");
4330c2f2
GFT
2921 rc = -ENOMEM;
2922 goto err_out_disable_pdev;
2923 }
d7699f87 2924
4330c2f2 2925 rc = pci_request_regions(pdev, DRV_NAME);
cd0ff491
GFT
2926 if (rc) {
2927 jeprintk(pdev, "Cannot obtain PCI resource region.\n");
4330c2f2
GFT
2928 goto err_out_disable_pdev;
2929 }
d7699f87
GFT
2930
2931 pci_set_master(pdev);
2932
2933 /*
2934 * alloc and init net device
2935 */
3bf61c55 2936 netdev = alloc_etherdev(sizeof(*jme));
cd0ff491
GFT
2937 if (!netdev) {
2938 jeprintk(pdev, "Cannot allocate netdev structure.\n");
4330c2f2
GFT
2939 rc = -ENOMEM;
2940 goto err_out_release_regions;
d7699f87 2941 }
3b70a6fa
GFT
2942#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2943 netdev->netdev_ops = &jme_netdev_ops;
2944#else
d7699f87
GFT
2945 netdev->open = jme_open;
2946 netdev->stop = jme_close;
2947 netdev->hard_start_xmit = jme_start_xmit;
d7699f87
GFT
2948 netdev->set_mac_address = jme_set_macaddr;
2949 netdev->set_multicast_list = jme_set_multi;
2950 netdev->change_mtu = jme_change_mtu;
8c198884 2951 netdev->tx_timeout = jme_tx_timeout;
42b1055e 2952 netdev->vlan_rx_register = jme_vlan_rx_register;
7ca9ebee
GFT
2953#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2954 netdev->vlan_rx_kill_vid = jme_vlan_rx_kill_vid;
2955#endif
3bf61c55 2956 NETDEV_GET_STATS(netdev, &jme_get_stats);
3b70a6fa
GFT
2957#endif
2958 netdev->ethtool_ops = &jme_ethtool_ops;
2959 netdev->watchdog_timeo = TX_TIMEOUT;
42b1055e 2960 netdev->features = NETIF_F_HW_CSUM |
b3821cc5
GFT
2961 NETIF_F_SG |
2962 NETIF_F_TSO |
3b70a6fa 2963#ifdef NETIF_F_TSO6
b3821cc5 2964 NETIF_F_TSO6 |
3b70a6fa 2965#endif
42b1055e
GFT
2966 NETIF_F_HW_VLAN_TX |
2967 NETIF_F_HW_VLAN_RX;
cd0ff491 2968 if (using_dac)
8c198884 2969 netdev->features |= NETIF_F_HIGHDMA;
d7699f87
GFT
2970
2971 SET_NETDEV_DEV(netdev, &pdev->dev);
2972 pci_set_drvdata(pdev, netdev);
2973
2974 /*
2975 * init adapter info
2976 */
2977 jme = netdev_priv(netdev);
2978 jme->pdev = pdev;
2979 jme->dev = netdev;
cdcdc9eb
GFT
2980 jme->jme_rx = netif_rx;
2981 jme->jme_vlan_rx = vlan_hwaccel_rx;
29bdd921 2982 jme->old_mtu = netdev->mtu = 1500;
fcf45b4c 2983 jme->phylink = 0;
b3821cc5 2984 jme->tx_ring_size = 1 << 10;
0ede469c 2985 jme->tx_ring_mask = jme->tx_ring_size - 1;
b3821cc5
GFT
2986 jme->tx_wake_threshold = 1 << 9;
2987 jme->rx_ring_size = 1 << 9;
2988 jme->rx_ring_mask = jme->rx_ring_size - 1;
cd0ff491 2989 jme->msg_enable = JME_DEF_MSG_ENABLE;
d7699f87
GFT
2990 jme->regs = ioremap(pci_resource_start(pdev, 0),
2991 pci_resource_len(pdev, 0));
4330c2f2 2992 if (!(jme->regs)) {
cd0ff491 2993 jeprintk(pdev, "Mapping PCI resource region error.\n");
d7699f87
GFT
2994 rc = -ENOMEM;
2995 goto err_out_free_netdev;
2996 }
4330c2f2 2997
cd0ff491
GFT
2998 if (no_pseudohp) {
2999 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
3000 jwrite32(jme, JME_APMC, apmc);
3001 } else if (force_pseudohp) {
3002 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
3003 jwrite32(jme, JME_APMC, apmc);
3004 }
3005
cdcdc9eb 3006 NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
192570e0 3007
d7699f87 3008 spin_lock_init(&jme->phy_lock);
fcf45b4c 3009 spin_lock_init(&jme->macaddr_lock);
8c198884 3010 spin_lock_init(&jme->rxmcs_lock);
fcf45b4c 3011
fcf45b4c
GFT
3012 atomic_set(&jme->link_changing, 1);
3013 atomic_set(&jme->rx_cleaning, 1);
3014 atomic_set(&jme->tx_cleaning, 1);
192570e0 3015 atomic_set(&jme->rx_empty, 1);
fcf45b4c 3016
79ce639c 3017 tasklet_init(&jme->pcc_task,
7ca9ebee 3018 jme_pcc_tasklet,
79ce639c 3019 (unsigned long) jme);
4330c2f2 3020 tasklet_init(&jme->linkch_task,
7ca9ebee 3021 jme_link_change_tasklet,
4330c2f2
GFT
3022 (unsigned long) jme);
3023 tasklet_init(&jme->txclean_task,
7ca9ebee 3024 jme_tx_clean_tasklet,
4330c2f2
GFT
3025 (unsigned long) jme);
3026 tasklet_init(&jme->rxclean_task,
7ca9ebee 3027 jme_rx_clean_tasklet,
4330c2f2 3028 (unsigned long) jme);
fcf45b4c 3029 tasklet_init(&jme->rxempty_task,
7ca9ebee 3030 jme_rx_empty_tasklet,
fcf45b4c 3031 (unsigned long) jme);
0ede469c 3032 tasklet_disable_nosync(&jme->linkch_task);
cd0ff491
GFT
3033 tasklet_disable_nosync(&jme->txclean_task);
3034 tasklet_disable_nosync(&jme->rxclean_task);
3035 tasklet_disable_nosync(&jme->rxempty_task);
8c198884
GFT
3036 jme->dpi.cur = PCC_P1;
3037
cd0ff491 3038 jme->reg_ghc = 0;
79ce639c 3039 jme->reg_rxcs = RXCS_DEFAULT;
8c198884
GFT
3040 jme->reg_rxmcs = RXMCS_DEFAULT;
3041 jme->reg_txpfc = 0;
47220951 3042 jme->reg_pmcs = PMCS_MFEN;
cd0ff491
GFT
3043 set_bit(JME_FLAG_TXCSUM, &jme->flags);
3044 set_bit(JME_FLAG_TSO, &jme->flags);
192570e0 3045
d7699f87 3046 /*
fcf45b4c
GFT
3047 * Get Max Read Req Size from PCI Config Space
3048 */
cd0ff491
GFT
3049 pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3050 jme->mrrs &= PCI_DCSR_MRRS_MASK;
3051 switch (jme->mrrs) {
3052 case MRRS_128B:
3053 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3054 break;
3055 case MRRS_256B:
3056 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3057 break;
3058 default:
3059 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3060 break;
cd54cf32 3061 }
fcf45b4c 3062
fcf45b4c 3063 /*
cdcdc9eb 3064 * Must check before reset_mac_processor
d7699f87 3065 */
cdcdc9eb
GFT
3066 jme_check_hw_ver(jme);
3067 jme->mii_if.dev = netdev;
cd0ff491 3068 if (jme->fpgaver) {
cdcdc9eb 3069 jme->mii_if.phy_id = 0;
cd0ff491 3070 for (i = 1 ; i < 32 ; ++i) {
cdcdc9eb
GFT
3071 bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3072 bmsr = jme_mdio_read(netdev, i, MII_BMSR);
cd0ff491 3073 if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
cdcdc9eb
GFT
3074 jme->mii_if.phy_id = i;
3075 break;
3076 }
3077 }
3078
cd0ff491 3079 if (!jme->mii_if.phy_id) {
cdcdc9eb 3080 rc = -EIO;
cd0ff491 3081 jeprintk(pdev, "Can not find phy_id.\n");
0ede469c 3082 goto err_out_unmap;
cdcdc9eb
GFT
3083 }
3084
3085 jme->reg_ghc |= GHC_LINK_POLL;
cd0ff491 3086 } else {
cdcdc9eb
GFT
3087 jme->mii_if.phy_id = 1;
3088 }
cd0ff491 3089 if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
8d27293f
GFT
3090 jme->mii_if.supports_gmii = true;
3091 else
3092 jme->mii_if.supports_gmii = false;
cdcdc9eb
GFT
3093 jme->mii_if.mdio_read = jme_mdio_read;
3094 jme->mii_if.mdio_write = jme_mdio_write;
3095
d7699f87 3096 jme_clear_pm(jme);
58c92f28 3097 jme_set_phyfifoa(jme);
cd0ff491
GFT
3098 pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
3099 if (!jme->fpgaver)
cdcdc9eb 3100 jme_phy_init(jme);
42b1055e 3101 jme_phy_off(jme);
cdcdc9eb
GFT
3102
3103 /*
3104 * Reset MAC processor and reload EEPROM for MAC Address
3105 */
d7699f87 3106 jme_reset_mac_processor(jme);
4330c2f2 3107 rc = jme_reload_eeprom(jme);
cd0ff491
GFT
3108 if (rc) {
3109 jeprintk(pdev,
b3821cc5 3110 "Reload eeprom for reading MAC Address error.\n");
0ede469c 3111 goto err_out_unmap;
4330c2f2 3112 }
d7699f87
GFT
3113 jme_load_macaddr(netdev);
3114
d7699f87
GFT
3115 /*
3116 * Tell stack that we are not ready to work until open()
3117 */
3118 netif_carrier_off(netdev);
3119 netif_stop_queue(netdev);
3120
3121 /*
3122 * Register netdev
3123 */
4330c2f2 3124 rc = register_netdev(netdev);
cd0ff491
GFT
3125 if (rc) {
3126 jeprintk(pdev, "Cannot register net device.\n");
0ede469c 3127 goto err_out_unmap;
4330c2f2 3128 }
d7699f87 3129
7ca9ebee 3130#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
0ede469c
GFT
3131 msg_probe(jme, "%s%s ver:%x rev:%x "
3132 "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3b70a6fa
GFT
3133 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3134 "JMC250 Gigabit Ethernet" :
3135 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3136 "JMC260 Fast Ethernet" : "Unknown",
cd0ff491 3137 (jme->fpgaver != 0) ? " (FPGA)" : "",
58c92f28 3138 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
0ede469c
GFT
3139 jme->rev,
3140 netdev->dev_addr[0],
3141 netdev->dev_addr[1],
3142 netdev->dev_addr[2],
3143 netdev->dev_addr[3],
3144 netdev->dev_addr[4],
3145 netdev->dev_addr[5]);
7ca9ebee
GFT
3146#else
3147 netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x macaddr:%pM\n",
3148 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3149 "JMC250 Gigabit Ethernet" :
3150 (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3151 "JMC260 Fast Ethernet" : "Unknown",
3152 (jme->fpgaver != 0) ? " (FPGA)" : "",
3153 (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3154 jme->rev, netdev->dev_addr);
3155#endif
d7699f87
GFT
3156
3157 return 0;
3158
3159err_out_unmap:
3160 iounmap(jme->regs);
3161err_out_free_netdev:
3162 pci_set_drvdata(pdev, NULL);
3163 free_netdev(netdev);
4330c2f2
GFT
3164err_out_release_regions:
3165 pci_release_regions(pdev);
d7699f87 3166err_out_disable_pdev:
cd0ff491 3167 pci_disable_device(pdev);
d7699f87 3168err_out:
4330c2f2 3169 return rc;
d7699f87
GFT
3170}
3171
3bf61c55
GFT
3172static void __devexit
3173jme_remove_one(struct pci_dev *pdev)
3174{
d7699f87
GFT
3175 struct net_device *netdev = pci_get_drvdata(pdev);
3176 struct jme_adapter *jme = netdev_priv(netdev);
3177
3178 unregister_netdev(netdev);
3179 iounmap(jme->regs);
3180 pci_set_drvdata(pdev, NULL);
3181 free_netdev(netdev);
3182 pci_release_regions(pdev);
3183 pci_disable_device(pdev);
3184
3185}
3186
7ee473a3 3187#ifdef CONFIG_PM
29bdd921
GFT
3188static int
3189jme_suspend(struct pci_dev *pdev, pm_message_t state)
3190{
3191 struct net_device *netdev = pci_get_drvdata(pdev);
3192 struct jme_adapter *jme = netdev_priv(netdev);
29bdd921
GFT
3193
3194 atomic_dec(&jme->link_changing);
3195
3196 netif_device_detach(netdev);
3197 netif_stop_queue(netdev);
3198 jme_stop_irq(jme);
29bdd921 3199
cd0ff491
GFT
3200 tasklet_disable(&jme->txclean_task);
3201 tasklet_disable(&jme->rxclean_task);
3202 tasklet_disable(&jme->rxempty_task);
3203
cd0ff491
GFT
3204 if (netif_carrier_ok(netdev)) {
3205 if (test_bit(JME_FLAG_POLL, &jme->flags))
47220951
GFT
3206 jme_polling_mode(jme);
3207
29bdd921 3208 jme_stop_pcc_timer(jme);
cd0ff491
GFT
3209 jme_reset_ghc_speed(jme);
3210 jme_disable_rx_engine(jme);
3211 jme_disable_tx_engine(jme);
29bdd921
GFT
3212 jme_reset_mac_processor(jme);
3213 jme_free_rx_resources(jme);
3214 jme_free_tx_resources(jme);
3215 netif_carrier_off(netdev);
3216 jme->phylink = 0;
3217 }
3218
cd0ff491
GFT
3219 tasklet_enable(&jme->txclean_task);
3220 tasklet_hi_enable(&jme->rxclean_task);
3221 tasklet_hi_enable(&jme->rxempty_task);
29bdd921
GFT
3222
3223 pci_save_state(pdev);
cd0ff491 3224 if (jme->reg_pmcs) {
42b1055e 3225 jme_set_100m_half(jme);
47220951 3226
cd0ff491 3227 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
47220951
GFT
3228 jme_wait_link(jme);
3229
29bdd921 3230 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
cd0ff491 3231
42b1055e 3232 pci_enable_wake(pdev, PCI_D3cold, true);
cd0ff491 3233 } else {
42b1055e 3234 jme_phy_off(jme);
29bdd921 3235 }
cd0ff491 3236 pci_set_power_state(pdev, PCI_D3cold);
29bdd921
GFT
3237
3238 return 0;
3239}
3240
3241static int
3242jme_resume(struct pci_dev *pdev)
3243{
3244 struct net_device *netdev = pci_get_drvdata(pdev);
3245 struct jme_adapter *jme = netdev_priv(netdev);
3246
3247 jme_clear_pm(jme);
3248 pci_restore_state(pdev);
3249
cd0ff491 3250 if (test_bit(JME_FLAG_SSET, &jme->flags))
29bdd921
GFT
3251 jme_set_settings(netdev, &jme->old_ecmd);
3252 else
3253 jme_reset_phy_processor(jme);
3254
29bdd921
GFT
3255 jme_start_irq(jme);
3256 netif_device_attach(netdev);
3257
3258 atomic_inc(&jme->link_changing);
3259
3260 jme_reset_link(jme);
3261
3262 return 0;
3263}
7ee473a3 3264#endif
29bdd921 3265
7ca9ebee 3266#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
d7699f87 3267static struct pci_device_id jme_pci_tbl[] = {
7ca9ebee
GFT
3268#else
3269static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3270#endif
cd0ff491
GFT
3271 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3272 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
d7699f87
GFT
3273 { }
3274};
3275
3276static struct pci_driver jme_driver = {
cd0ff491
GFT
3277 .name = DRV_NAME,
3278 .id_table = jme_pci_tbl,
3279 .probe = jme_init_one,
3280 .remove = __devexit_p(jme_remove_one),
d7699f87 3281#ifdef CONFIG_PM
cd0ff491
GFT
3282 .suspend = jme_suspend,
3283 .resume = jme_resume,
d7699f87 3284#endif /* CONFIG_PM */
d7699f87
GFT
3285};
3286
3bf61c55
GFT
3287static int __init
3288jme_init_module(void)
d7699f87 3289{
3b70a6fa 3290 printk(KERN_INFO PFX "JMicron JMC2XX ethernet "
4330c2f2 3291 "driver version %s\n", DRV_VERSION);
d7699f87
GFT
3292 return pci_register_driver(&jme_driver);
3293}
3294
3bf61c55
GFT
3295static void __exit
3296jme_cleanup_module(void)
d7699f87
GFT
3297{
3298 pci_unregister_driver(&jme_driver);
3299}
3300
3301module_init(jme_init_module);
3302module_exit(jme_cleanup_module);
3303
3bf61c55 3304MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
d7699f87
GFT
3305MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3306MODULE_LICENSE("GPL");
3307MODULE_VERSION(DRV_VERSION);
3308MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3309