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d7699f87 GFT |
1 | /* |
2 | * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver | |
3 | * | |
4 | * Copyright 2008 JMicron Technology Corporation | |
5 | * http://www.jmicron.com/ | |
eee57828 | 6 | * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org> |
d7699f87 | 7 | * |
3bf61c55 GFT |
8 | * Author: Guo-Fu Tseng <cooldavid@cooldavid.org> |
9 | * | |
d7699f87 GFT |
10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | * | |
23 | */ | |
24 | ||
52a46ba8 JP |
25 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
26 | ||
d7699f87 GFT |
27 | #include <linux/module.h> |
28 | #include <linux/kernel.h> | |
29 | #include <linux/pci.h> | |
30 | #include <linux/netdevice.h> | |
31 | #include <linux/etherdevice.h> | |
32 | #include <linux/ethtool.h> | |
33 | #include <linux/mii.h> | |
34 | #include <linux/crc32.h> | |
4330c2f2 | 35 | #include <linux/delay.h> |
29bdd921 | 36 | #include <linux/spinlock.h> |
8c198884 GFT |
37 | #include <linux/in.h> |
38 | #include <linux/ip.h> | |
79ce639c GFT |
39 | #include <linux/ipv6.h> |
40 | #include <linux/tcp.h> | |
41 | #include <linux/udp.h> | |
42b1055e | 42 | #include <linux/if_vlan.h> |
6d641c63 | 43 | #include <linux/slab.h> |
94c5ea02 | 44 | #include <net/ip6_checksum.h> |
d7699f87 GFT |
45 | #include "jme.h" |
46 | ||
cd0ff491 GFT |
47 | static int force_pseudohp = -1; |
48 | static int no_pseudohp = -1; | |
49 | static int no_extplug = -1; | |
50 | module_param(force_pseudohp, int, 0); | |
51 | MODULE_PARM_DESC(force_pseudohp, | |
52 | "Enable pseudo hot-plug feature manually by driver instead of BIOS."); | |
53 | module_param(no_pseudohp, int, 0); | |
54 | MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); | |
55 | module_param(no_extplug, int, 0); | |
56 | MODULE_PARM_DESC(no_extplug, | |
57 | "Do not use external plug signal for pseudo hot-plug."); | |
4330c2f2 | 58 | |
3bf61c55 GFT |
59 | static int |
60 | jme_mdio_read(struct net_device *netdev, int phy, int reg) | |
d7699f87 GFT |
61 | { |
62 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 63 | int i, val, again = (reg == MII_BMSR) ? 1 : 0; |
d7699f87 | 64 | |
186fc259 | 65 | read_again: |
cd0ff491 | 66 | jwrite32(jme, JME_SMI, SMI_OP_REQ | |
3bf61c55 GFT |
67 | smi_phy_addr(phy) | |
68 | smi_reg_addr(reg)); | |
d7699f87 GFT |
69 | |
70 | wmb(); | |
cd0ff491 | 71 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
cdcdc9eb | 72 | udelay(20); |
b3821cc5 GFT |
73 | val = jread32(jme, JME_SMI); |
74 | if ((val & SMI_OP_REQ) == 0) | |
3bf61c55 | 75 | break; |
cd0ff491 | 76 | } |
d7699f87 | 77 | |
cd0ff491 | 78 | if (i == 0) { |
52a46ba8 | 79 | pr_err("phy(%d) read timeout : %d\n", phy, reg); |
3bf61c55 | 80 | return 0; |
cd0ff491 | 81 | } |
d7699f87 | 82 | |
cd0ff491 | 83 | if (again--) |
186fc259 GFT |
84 | goto read_again; |
85 | ||
cd0ff491 | 86 | return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT; |
d7699f87 GFT |
87 | } |
88 | ||
3bf61c55 GFT |
89 | static void |
90 | jme_mdio_write(struct net_device *netdev, | |
91 | int phy, int reg, int val) | |
d7699f87 GFT |
92 | { |
93 | struct jme_adapter *jme = netdev_priv(netdev); | |
94 | int i; | |
95 | ||
3bf61c55 GFT |
96 | jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ | |
97 | ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | | |
98 | smi_phy_addr(phy) | smi_reg_addr(reg)); | |
d7699f87 GFT |
99 | |
100 | wmb(); | |
cdcdc9eb GFT |
101 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
102 | udelay(20); | |
8d27293f | 103 | if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0) |
3bf61c55 GFT |
104 | break; |
105 | } | |
d7699f87 | 106 | |
3bf61c55 | 107 | if (i == 0) |
52a46ba8 | 108 | pr_err("phy(%d) write timeout : %d\n", phy, reg); |
d7699f87 GFT |
109 | } |
110 | ||
cd0ff491 | 111 | static inline void |
3bf61c55 | 112 | jme_reset_phy_processor(struct jme_adapter *jme) |
d7699f87 | 113 | { |
cd0ff491 | 114 | u32 val; |
3bf61c55 GFT |
115 | |
116 | jme_mdio_write(jme->dev, | |
117 | jme->mii_if.phy_id, | |
8c198884 GFT |
118 | MII_ADVERTISE, ADVERTISE_ALL | |
119 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
3bf61c55 | 120 | |
cd0ff491 | 121 | if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
122 | jme_mdio_write(jme->dev, |
123 | jme->mii_if.phy_id, | |
124 | MII_CTRL1000, | |
125 | ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
3bf61c55 | 126 | |
fcf45b4c GFT |
127 | val = jme_mdio_read(jme->dev, |
128 | jme->mii_if.phy_id, | |
129 | MII_BMCR); | |
130 | ||
131 | jme_mdio_write(jme->dev, | |
132 | jme->mii_if.phy_id, | |
133 | MII_BMCR, val | BMCR_RESET); | |
3bf61c55 GFT |
134 | } |
135 | ||
b3821cc5 GFT |
136 | static void |
137 | jme_setup_wakeup_frame(struct jme_adapter *jme, | |
0d8a2973 | 138 | const u32 *mask, u32 crc, int fnr) |
b3821cc5 GFT |
139 | { |
140 | int i; | |
141 | ||
142 | /* | |
143 | * Setup CRC pattern | |
144 | */ | |
145 | jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL)); | |
146 | wmb(); | |
147 | jwrite32(jme, JME_WFODP, crc); | |
148 | wmb(); | |
149 | ||
150 | /* | |
151 | * Setup Mask | |
152 | */ | |
cd0ff491 | 153 | for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { |
b3821cc5 GFT |
154 | jwrite32(jme, JME_WFOI, |
155 | ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) | | |
156 | (fnr & WFOI_FRAME_SEL)); | |
157 | wmb(); | |
158 | jwrite32(jme, JME_WFODP, mask[i]); | |
159 | wmb(); | |
160 | } | |
161 | } | |
3bf61c55 | 162 | |
ed830419 GFT |
163 | static inline void |
164 | jme_mac_rxclk_off(struct jme_adapter *jme) | |
165 | { | |
166 | jme->reg_gpreg1 |= GPREG1_RXCLKOFF; | |
167 | jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); | |
168 | } | |
169 | ||
170 | static inline void | |
171 | jme_mac_rxclk_on(struct jme_adapter *jme) | |
172 | { | |
173 | jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF; | |
174 | jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); | |
175 | } | |
176 | ||
177 | static inline void | |
178 | jme_mac_txclk_off(struct jme_adapter *jme) | |
179 | { | |
180 | jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC); | |
181 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
182 | } | |
183 | ||
184 | static inline void | |
185 | jme_mac_txclk_on(struct jme_adapter *jme) | |
186 | { | |
187 | u32 speed = jme->reg_ghc & GHC_SPEED; | |
188 | if (speed == GHC_SPEED_1000M) | |
189 | jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY; | |
190 | else | |
191 | jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; | |
192 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
193 | } | |
194 | ||
195 | static inline void | |
196 | jme_reset_ghc_speed(struct jme_adapter *jme) | |
197 | { | |
198 | jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX); | |
199 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
200 | } | |
201 | ||
202 | static inline void | |
203 | jme_reset_250A2_workaround(struct jme_adapter *jme) | |
204 | { | |
205 | jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | | |
206 | GPREG1_RSSPATCH); | |
207 | jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); | |
208 | } | |
209 | ||
210 | static inline void | |
211 | jme_assert_ghc_reset(struct jme_adapter *jme) | |
212 | { | |
213 | jme->reg_ghc |= GHC_SWRST; | |
214 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
215 | } | |
216 | ||
217 | static inline void | |
218 | jme_clear_ghc_reset(struct jme_adapter *jme) | |
219 | { | |
220 | jme->reg_ghc &= ~GHC_SWRST; | |
221 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
222 | } | |
223 | ||
cd0ff491 | 224 | static inline void |
3bf61c55 GFT |
225 | jme_reset_mac_processor(struct jme_adapter *jme) |
226 | { | |
0d8a2973 | 227 | static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; |
cd0ff491 GFT |
228 | u32 crc = 0xCDCDCDCD; |
229 | u32 gpreg0; | |
b3821cc5 GFT |
230 | int i; |
231 | ||
ed830419 GFT |
232 | jme_reset_ghc_speed(jme); |
233 | jme_reset_250A2_workaround(jme); | |
234 | ||
235 | jme_mac_rxclk_on(jme); | |
236 | jme_mac_txclk_on(jme); | |
237 | udelay(1); | |
238 | jme_assert_ghc_reset(jme); | |
239 | udelay(1); | |
240 | jme_mac_rxclk_off(jme); | |
241 | jme_mac_txclk_off(jme); | |
242 | udelay(1); | |
243 | jme_clear_ghc_reset(jme); | |
244 | udelay(1); | |
245 | jme_mac_rxclk_on(jme); | |
246 | jme_mac_txclk_on(jme); | |
247 | udelay(1); | |
248 | jme_mac_rxclk_off(jme); | |
249 | jme_mac_txclk_off(jme); | |
cd0ff491 GFT |
250 | |
251 | jwrite32(jme, JME_RXDBA_LO, 0x00000000); | |
252 | jwrite32(jme, JME_RXDBA_HI, 0x00000000); | |
253 | jwrite32(jme, JME_RXQDC, 0x00000000); | |
254 | jwrite32(jme, JME_RXNDA, 0x00000000); | |
255 | jwrite32(jme, JME_TXDBA_LO, 0x00000000); | |
256 | jwrite32(jme, JME_TXDBA_HI, 0x00000000); | |
257 | jwrite32(jme, JME_TXQDC, 0x00000000); | |
258 | jwrite32(jme, JME_TXNDA, 0x00000000); | |
259 | ||
4330c2f2 GFT |
260 | jwrite32(jme, JME_RXMCHT_LO, 0x00000000); |
261 | jwrite32(jme, JME_RXMCHT_HI, 0x00000000); | |
cd0ff491 | 262 | for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i) |
b3821cc5 | 263 | jme_setup_wakeup_frame(jme, mask, crc, i); |
cd0ff491 | 264 | if (jme->fpgaver) |
cdcdc9eb GFT |
265 | gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL; |
266 | else | |
267 | gpreg0 = GPREG0_DEFAULT; | |
268 | jwrite32(jme, JME_GPREG0, gpreg0); | |
cd0ff491 GFT |
269 | } |
270 | ||
271 | static inline void | |
3bf61c55 | 272 | jme_clear_pm(struct jme_adapter *jme) |
d7699f87 | 273 | { |
29bdd921 | 274 | jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs); |
4330c2f2 | 275 | pci_set_power_state(jme->pdev, PCI_D0); |
42b1055e | 276 | pci_enable_wake(jme->pdev, PCI_D0, false); |
d7699f87 GFT |
277 | } |
278 | ||
3bf61c55 GFT |
279 | static int |
280 | jme_reload_eeprom(struct jme_adapter *jme) | |
d7699f87 | 281 | { |
cd0ff491 | 282 | u32 val; |
d7699f87 GFT |
283 | int i; |
284 | ||
285 | val = jread32(jme, JME_SMBCSR); | |
286 | ||
cd0ff491 | 287 | if (val & SMBCSR_EEPROMD) { |
d7699f87 GFT |
288 | val |= SMBCSR_CNACK; |
289 | jwrite32(jme, JME_SMBCSR, val); | |
290 | val |= SMBCSR_RELOAD; | |
291 | jwrite32(jme, JME_SMBCSR, val); | |
292 | mdelay(12); | |
293 | ||
cd0ff491 | 294 | for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) { |
d7699f87 GFT |
295 | mdelay(1); |
296 | if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0) | |
297 | break; | |
298 | } | |
299 | ||
cd0ff491 | 300 | if (i == 0) { |
52a46ba8 | 301 | pr_err("eeprom reload timeout\n"); |
d7699f87 GFT |
302 | return -EIO; |
303 | } | |
304 | } | |
3bf61c55 | 305 | |
d7699f87 GFT |
306 | return 0; |
307 | } | |
308 | ||
3bf61c55 GFT |
309 | static void |
310 | jme_load_macaddr(struct net_device *netdev) | |
d7699f87 GFT |
311 | { |
312 | struct jme_adapter *jme = netdev_priv(netdev); | |
313 | unsigned char macaddr[6]; | |
cd0ff491 | 314 | u32 val; |
d7699f87 | 315 | |
cd0ff491 | 316 | spin_lock_bh(&jme->macaddr_lock); |
4330c2f2 | 317 | val = jread32(jme, JME_RXUMA_LO); |
d7699f87 GFT |
318 | macaddr[0] = (val >> 0) & 0xFF; |
319 | macaddr[1] = (val >> 8) & 0xFF; | |
320 | macaddr[2] = (val >> 16) & 0xFF; | |
321 | macaddr[3] = (val >> 24) & 0xFF; | |
4330c2f2 | 322 | val = jread32(jme, JME_RXUMA_HI); |
d7699f87 GFT |
323 | macaddr[4] = (val >> 0) & 0xFF; |
324 | macaddr[5] = (val >> 8) & 0xFF; | |
cd0ff491 GFT |
325 | memcpy(netdev->dev_addr, macaddr, 6); |
326 | spin_unlock_bh(&jme->macaddr_lock); | |
3bf61c55 GFT |
327 | } |
328 | ||
cd0ff491 | 329 | static inline void |
3bf61c55 GFT |
330 | jme_set_rx_pcc(struct jme_adapter *jme, int p) |
331 | { | |
cd0ff491 | 332 | switch (p) { |
192570e0 GFT |
333 | case PCC_OFF: |
334 | jwrite32(jme, JME_PCCRX0, | |
335 | ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
336 | ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
337 | break; | |
3bf61c55 GFT |
338 | case PCC_P1: |
339 | jwrite32(jme, JME_PCCRX0, | |
340 | ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
341 | ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
342 | break; | |
343 | case PCC_P2: | |
344 | jwrite32(jme, JME_PCCRX0, | |
345 | ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
346 | ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
347 | break; | |
348 | case PCC_P3: | |
349 | jwrite32(jme, JME_PCCRX0, | |
350 | ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
351 | ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
352 | break; | |
353 | default: | |
354 | break; | |
355 | } | |
192570e0 | 356 | wmb(); |
3bf61c55 | 357 | |
cd0ff491 | 358 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
c97b5740 | 359 | netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p); |
d7699f87 GFT |
360 | } |
361 | ||
fcf45b4c | 362 | static void |
3bf61c55 | 363 | jme_start_irq(struct jme_adapter *jme) |
d7699f87 | 364 | { |
3bf61c55 GFT |
365 | register struct dynpcc_info *dpi = &(jme->dpi); |
366 | ||
367 | jme_set_rx_pcc(jme, PCC_P1); | |
3bf61c55 GFT |
368 | dpi->cur = PCC_P1; |
369 | dpi->attempt = PCC_P1; | |
370 | dpi->cnt = 0; | |
371 | ||
372 | jwrite32(jme, JME_PCCTX, | |
8c198884 GFT |
373 | ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) | |
374 | ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) | | |
3bf61c55 GFT |
375 | PCCTXQ0_EN |
376 | ); | |
377 | ||
d7699f87 GFT |
378 | /* |
379 | * Enable Interrupts | |
380 | */ | |
381 | jwrite32(jme, JME_IENS, INTR_ENABLE); | |
382 | } | |
383 | ||
cd0ff491 | 384 | static inline void |
3bf61c55 | 385 | jme_stop_irq(struct jme_adapter *jme) |
d7699f87 GFT |
386 | { |
387 | /* | |
388 | * Disable Interrupts | |
389 | */ | |
cd0ff491 | 390 | jwrite32f(jme, JME_IENC, INTR_ENABLE); |
d7699f87 GFT |
391 | } |
392 | ||
cd0ff491 | 393 | static u32 |
cdcdc9eb GFT |
394 | jme_linkstat_from_phy(struct jme_adapter *jme) |
395 | { | |
cd0ff491 | 396 | u32 phylink, bmsr; |
cdcdc9eb GFT |
397 | |
398 | phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17); | |
399 | bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR); | |
cd0ff491 | 400 | if (bmsr & BMSR_ANCOMP) |
cdcdc9eb GFT |
401 | phylink |= PHY_LINK_AUTONEG_COMPLETE; |
402 | ||
403 | return phylink; | |
404 | } | |
405 | ||
cd0ff491 | 406 | static inline void |
06168a20 | 407 | jme_set_phyfifo_5level(struct jme_adapter *jme) |
cd0ff491 GFT |
408 | { |
409 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); | |
410 | } | |
411 | ||
412 | static inline void | |
06168a20 | 413 | jme_set_phyfifo_8level(struct jme_adapter *jme) |
cd0ff491 GFT |
414 | { |
415 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); | |
416 | } | |
417 | ||
fcf45b4c GFT |
418 | static int |
419 | jme_check_link(struct net_device *netdev, int testonly) | |
d7699f87 GFT |
420 | { |
421 | struct jme_adapter *jme = netdev_priv(netdev); | |
ed830419 | 422 | u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr; |
79ce639c | 423 | char linkmsg[64]; |
fcf45b4c | 424 | int rc = 0; |
d7699f87 | 425 | |
b3821cc5 | 426 | linkmsg[0] = '\0'; |
cdcdc9eb | 427 | |
cd0ff491 | 428 | if (jme->fpgaver) |
cdcdc9eb GFT |
429 | phylink = jme_linkstat_from_phy(jme); |
430 | else | |
431 | phylink = jread32(jme, JME_PHY_LINK); | |
d7699f87 | 432 | |
cd0ff491 GFT |
433 | if (phylink & PHY_LINK_UP) { |
434 | if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { | |
8c198884 GFT |
435 | /* |
436 | * If we did not enable AN | |
437 | * Speed/Duplex Info should be obtained from SMI | |
438 | */ | |
439 | phylink = PHY_LINK_UP; | |
440 | ||
441 | bmcr = jme_mdio_read(jme->dev, | |
442 | jme->mii_if.phy_id, | |
443 | MII_BMCR); | |
444 | ||
445 | phylink |= ((bmcr & BMCR_SPEED1000) && | |
446 | (bmcr & BMCR_SPEED100) == 0) ? | |
447 | PHY_LINK_SPEED_1000M : | |
448 | (bmcr & BMCR_SPEED100) ? | |
449 | PHY_LINK_SPEED_100M : | |
450 | PHY_LINK_SPEED_10M; | |
451 | ||
452 | phylink |= (bmcr & BMCR_FULLDPLX) ? | |
453 | PHY_LINK_DUPLEX : 0; | |
79ce639c | 454 | |
b3821cc5 | 455 | strcat(linkmsg, "Forced: "); |
cd0ff491 | 456 | } else { |
8c198884 GFT |
457 | /* |
458 | * Keep polling for speed/duplex resolve complete | |
459 | */ | |
cd0ff491 | 460 | while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && |
8c198884 GFT |
461 | --cnt) { |
462 | ||
463 | udelay(1); | |
8c198884 | 464 | |
cd0ff491 | 465 | if (jme->fpgaver) |
cdcdc9eb GFT |
466 | phylink = jme_linkstat_from_phy(jme); |
467 | else | |
468 | phylink = jread32(jme, JME_PHY_LINK); | |
8c198884 | 469 | } |
cd0ff491 | 470 | if (!cnt) |
52a46ba8 | 471 | pr_err("Waiting speed resolve timeout\n"); |
79ce639c | 472 | |
b3821cc5 | 473 | strcat(linkmsg, "ANed: "); |
d7699f87 GFT |
474 | } |
475 | ||
cd0ff491 | 476 | if (jme->phylink == phylink) { |
fcf45b4c GFT |
477 | rc = 1; |
478 | goto out; | |
479 | } | |
cd0ff491 | 480 | if (testonly) |
fcf45b4c GFT |
481 | goto out; |
482 | ||
483 | jme->phylink = phylink; | |
484 | ||
ed830419 GFT |
485 | /* |
486 | * The speed/duplex setting of jme->reg_ghc already cleared | |
487 | * by jme_reset_mac_processor() | |
488 | */ | |
cd0ff491 GFT |
489 | switch (phylink & PHY_LINK_SPEED_MASK) { |
490 | case PHY_LINK_SPEED_10M: | |
ed830419 | 491 | jme->reg_ghc |= GHC_SPEED_10M; |
cd0ff491 | 492 | strcat(linkmsg, "10 Mbps, "); |
cd0ff491 GFT |
493 | break; |
494 | case PHY_LINK_SPEED_100M: | |
ed830419 | 495 | jme->reg_ghc |= GHC_SPEED_100M; |
cd0ff491 | 496 | strcat(linkmsg, "100 Mbps, "); |
cd0ff491 GFT |
497 | break; |
498 | case PHY_LINK_SPEED_1000M: | |
ed830419 | 499 | jme->reg_ghc |= GHC_SPEED_1000M; |
cd0ff491 | 500 | strcat(linkmsg, "1000 Mbps, "); |
cd0ff491 GFT |
501 | break; |
502 | default: | |
503 | break; | |
d7699f87 | 504 | } |
d7699f87 | 505 | |
cd0ff491 | 506 | if (phylink & PHY_LINK_DUPLEX) { |
d7699f87 | 507 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); |
19bbc546 | 508 | jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX); |
ed830419 | 509 | jme->reg_ghc |= GHC_DPX; |
cd0ff491 | 510 | } else { |
d7699f87 | 511 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | |
3bf61c55 GFT |
512 | TXMCS_BACKOFF | |
513 | TXMCS_CARRIERSENSE | | |
514 | TXMCS_COLLISION); | |
19bbc546 | 515 | jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX); |
8c198884 | 516 | } |
9b9d55de | 517 | |
ed830419 GFT |
518 | jwrite32(jme, JME_GHC, jme->reg_ghc); |
519 | ||
9b9d55de | 520 | if (is_buggy250(jme->pdev->device, jme->chiprev)) { |
ed830419 GFT |
521 | jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | |
522 | GPREG1_RSSPATCH); | |
9b9d55de | 523 | if (!(phylink & PHY_LINK_DUPLEX)) |
ed830419 | 524 | jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH; |
9b9d55de GFT |
525 | switch (phylink & PHY_LINK_SPEED_MASK) { |
526 | case PHY_LINK_SPEED_10M: | |
06168a20 | 527 | jme_set_phyfifo_8level(jme); |
ed830419 | 528 | jme->reg_gpreg1 |= GPREG1_RSSPATCH; |
9b9d55de GFT |
529 | break; |
530 | case PHY_LINK_SPEED_100M: | |
06168a20 | 531 | jme_set_phyfifo_5level(jme); |
ed830419 | 532 | jme->reg_gpreg1 |= GPREG1_RSSPATCH; |
9b9d55de GFT |
533 | break; |
534 | case PHY_LINK_SPEED_1000M: | |
06168a20 | 535 | jme_set_phyfifo_8level(jme); |
9b9d55de GFT |
536 | break; |
537 | default: | |
538 | break; | |
539 | } | |
540 | } | |
ed830419 | 541 | jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); |
fcf45b4c | 542 | |
94c5ea02 GFT |
543 | strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? |
544 | "Full-Duplex, " : | |
545 | "Half-Duplex, "); | |
546 | strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ? | |
547 | "MDI-X" : | |
548 | "MDI"); | |
52a46ba8 | 549 | netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg); |
cd0ff491 GFT |
550 | netif_carrier_on(netdev); |
551 | } else { | |
552 | if (testonly) | |
fcf45b4c GFT |
553 | goto out; |
554 | ||
52a46ba8 | 555 | netif_info(jme, link, jme->dev, "Link is down\n"); |
fcf45b4c | 556 | jme->phylink = 0; |
cd0ff491 | 557 | netif_carrier_off(netdev); |
d7699f87 | 558 | } |
fcf45b4c GFT |
559 | |
560 | out: | |
561 | return rc; | |
d7699f87 GFT |
562 | } |
563 | ||
3bf61c55 GFT |
564 | static int |
565 | jme_setup_tx_resources(struct jme_adapter *jme) | |
d7699f87 | 566 | { |
d7699f87 GFT |
567 | struct jme_ring *txring = &(jme->txring[0]); |
568 | ||
569 | txring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
570 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
571 | &(txring->dmaalloc), | |
572 | GFP_ATOMIC); | |
fcf45b4c | 573 | |
fa97b924 GFT |
574 | if (!txring->alloc) |
575 | goto err_set_null; | |
d7699f87 GFT |
576 | |
577 | /* | |
578 | * 16 Bytes align | |
579 | */ | |
cd0ff491 | 580 | txring->desc = (void *)ALIGN((unsigned long)(txring->alloc), |
3bf61c55 | 581 | RING_DESC_ALIGN); |
4330c2f2 | 582 | txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 583 | txring->next_to_use = 0; |
cdcdc9eb | 584 | atomic_set(&txring->next_to_clean, 0); |
b3821cc5 | 585 | atomic_set(&txring->nr_free, jme->tx_ring_size); |
d7699f87 | 586 | |
fa97b924 GFT |
587 | txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
588 | jme->tx_ring_size, GFP_ATOMIC); | |
589 | if (unlikely(!(txring->bufinf))) | |
590 | goto err_free_txring; | |
591 | ||
d7699f87 | 592 | /* |
b3821cc5 | 593 | * Initialize Transmit Descriptors |
d7699f87 | 594 | */ |
b3821cc5 | 595 | memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size)); |
3bf61c55 | 596 | memset(txring->bufinf, 0, |
b3821cc5 | 597 | sizeof(struct jme_buffer_info) * jme->tx_ring_size); |
d7699f87 GFT |
598 | |
599 | return 0; | |
fa97b924 GFT |
600 | |
601 | err_free_txring: | |
602 | dma_free_coherent(&(jme->pdev->dev), | |
603 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), | |
604 | txring->alloc, | |
605 | txring->dmaalloc); | |
606 | ||
607 | err_set_null: | |
608 | txring->desc = NULL; | |
609 | txring->dmaalloc = 0; | |
610 | txring->dma = 0; | |
611 | txring->bufinf = NULL; | |
612 | ||
613 | return -ENOMEM; | |
d7699f87 GFT |
614 | } |
615 | ||
3bf61c55 GFT |
616 | static void |
617 | jme_free_tx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
618 | { |
619 | int i; | |
620 | struct jme_ring *txring = &(jme->txring[0]); | |
fa97b924 | 621 | struct jme_buffer_info *txbi; |
d7699f87 | 622 | |
cd0ff491 | 623 | if (txring->alloc) { |
fa97b924 GFT |
624 | if (txring->bufinf) { |
625 | for (i = 0 ; i < jme->tx_ring_size ; ++i) { | |
626 | txbi = txring->bufinf + i; | |
627 | if (txbi->skb) { | |
628 | dev_kfree_skb(txbi->skb); | |
629 | txbi->skb = NULL; | |
630 | } | |
631 | txbi->mapping = 0; | |
632 | txbi->len = 0; | |
633 | txbi->nr_desc = 0; | |
634 | txbi->start_xmit = 0; | |
d7699f87 | 635 | } |
fa97b924 | 636 | kfree(txring->bufinf); |
d7699f87 GFT |
637 | } |
638 | ||
639 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 640 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
d7699f87 GFT |
641 | txring->alloc, |
642 | txring->dmaalloc); | |
3bf61c55 GFT |
643 | |
644 | txring->alloc = NULL; | |
645 | txring->desc = NULL; | |
646 | txring->dmaalloc = 0; | |
647 | txring->dma = 0; | |
fa97b924 | 648 | txring->bufinf = NULL; |
d7699f87 | 649 | } |
3bf61c55 | 650 | txring->next_to_use = 0; |
cdcdc9eb | 651 | atomic_set(&txring->next_to_clean, 0); |
79ce639c | 652 | atomic_set(&txring->nr_free, 0); |
d7699f87 GFT |
653 | } |
654 | ||
cd0ff491 | 655 | static inline void |
3bf61c55 | 656 | jme_enable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
657 | { |
658 | /* | |
659 | * Select Queue 0 | |
660 | */ | |
661 | jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0); | |
cd0ff491 | 662 | wmb(); |
d7699f87 GFT |
663 | |
664 | /* | |
665 | * Setup TX Queue 0 DMA Bass Address | |
666 | */ | |
fcf45b4c | 667 | jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
3bf61c55 | 668 | jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32); |
fcf45b4c | 669 | jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
d7699f87 GFT |
670 | |
671 | /* | |
672 | * Setup TX Descptor Count | |
673 | */ | |
b3821cc5 | 674 | jwrite32(jme, JME_TXQDC, jme->tx_ring_size); |
d7699f87 GFT |
675 | |
676 | /* | |
677 | * Enable TX Engine | |
678 | */ | |
679 | wmb(); | |
ed830419 | 680 | jwrite32f(jme, JME_TXCS, jme->reg_txcs | |
4330c2f2 GFT |
681 | TXCS_SELECT_QUEUE0 | |
682 | TXCS_ENABLE); | |
d7699f87 | 683 | |
ed830419 GFT |
684 | /* |
685 | * Start clock for TX MAC Processor | |
686 | */ | |
687 | jme_mac_txclk_on(jme); | |
d7699f87 GFT |
688 | } |
689 | ||
cd0ff491 | 690 | static inline void |
29bdd921 GFT |
691 | jme_restart_tx_engine(struct jme_adapter *jme) |
692 | { | |
693 | /* | |
694 | * Restart TX Engine | |
695 | */ | |
696 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | |
697 | TXCS_SELECT_QUEUE0 | | |
698 | TXCS_ENABLE); | |
699 | } | |
700 | ||
cd0ff491 | 701 | static inline void |
3bf61c55 | 702 | jme_disable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
703 | { |
704 | int i; | |
cd0ff491 | 705 | u32 val; |
d7699f87 GFT |
706 | |
707 | /* | |
708 | * Disable TX Engine | |
709 | */ | |
fcf45b4c | 710 | jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0); |
cd0ff491 | 711 | wmb(); |
d7699f87 GFT |
712 | |
713 | val = jread32(jme, JME_TXCS); | |
cd0ff491 | 714 | for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) { |
fcf45b4c | 715 | mdelay(1); |
d7699f87 | 716 | val = jread32(jme, JME_TXCS); |
cd0ff491 | 717 | rmb(); |
d7699f87 GFT |
718 | } |
719 | ||
cd0ff491 | 720 | if (!i) |
52a46ba8 | 721 | pr_err("Disable TX engine timeout\n"); |
ed830419 GFT |
722 | |
723 | /* | |
724 | * Stop clock for TX MAC Processor | |
725 | */ | |
726 | jme_mac_txclk_off(jme); | |
d7699f87 GFT |
727 | } |
728 | ||
3bf61c55 GFT |
729 | static void |
730 | jme_set_clean_rxdesc(struct jme_adapter *jme, int i) | |
d7699f87 | 731 | { |
fa97b924 | 732 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 733 | register struct rxdesc *rxdesc = rxring->desc; |
4330c2f2 GFT |
734 | struct jme_buffer_info *rxbi = rxring->bufinf; |
735 | rxdesc += i; | |
736 | rxbi += i; | |
737 | ||
738 | rxdesc->dw[0] = 0; | |
739 | rxdesc->dw[1] = 0; | |
3bf61c55 | 740 | rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32); |
fcf45b4c GFT |
741 | rxdesc->desc1.bufaddrl = cpu_to_le32( |
742 | (__u64)rxbi->mapping & 0xFFFFFFFFUL); | |
3bf61c55 | 743 | rxdesc->desc1.datalen = cpu_to_le16(rxbi->len); |
cd0ff491 | 744 | if (jme->dev->features & NETIF_F_HIGHDMA) |
3bf61c55 | 745 | rxdesc->desc1.flags = RXFLAG_64BIT; |
d7699f87 | 746 | wmb(); |
3bf61c55 | 747 | rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT; |
d7699f87 GFT |
748 | } |
749 | ||
3bf61c55 GFT |
750 | static int |
751 | jme_make_new_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
752 | { |
753 | struct jme_ring *rxring = &(jme->rxring[0]); | |
b3821cc5 | 754 | struct jme_buffer_info *rxbi = rxring->bufinf + i; |
cd0ff491 | 755 | struct sk_buff *skb; |
4330c2f2 | 756 | |
79ce639c GFT |
757 | skb = netdev_alloc_skb(jme->dev, |
758 | jme->dev->mtu + RX_EXTRA_LEN); | |
cd0ff491 | 759 | if (unlikely(!skb)) |
4330c2f2 | 760 | return -ENOMEM; |
3bf61c55 | 761 | |
4330c2f2 | 762 | rxbi->skb = skb; |
3bf61c55 | 763 | rxbi->len = skb_tailroom(skb); |
b3821cc5 GFT |
764 | rxbi->mapping = pci_map_page(jme->pdev, |
765 | virt_to_page(skb->data), | |
766 | offset_in_page(skb->data), | |
767 | rxbi->len, | |
768 | PCI_DMA_FROMDEVICE); | |
4330c2f2 GFT |
769 | |
770 | return 0; | |
771 | } | |
772 | ||
3bf61c55 GFT |
773 | static void |
774 | jme_free_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
775 | { |
776 | struct jme_ring *rxring = &(jme->rxring[0]); | |
777 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
778 | rxbi += i; | |
779 | ||
cd0ff491 | 780 | if (rxbi->skb) { |
b3821cc5 | 781 | pci_unmap_page(jme->pdev, |
4330c2f2 | 782 | rxbi->mapping, |
3bf61c55 | 783 | rxbi->len, |
4330c2f2 GFT |
784 | PCI_DMA_FROMDEVICE); |
785 | dev_kfree_skb(rxbi->skb); | |
786 | rxbi->skb = NULL; | |
787 | rxbi->mapping = 0; | |
3bf61c55 | 788 | rxbi->len = 0; |
4330c2f2 GFT |
789 | } |
790 | } | |
791 | ||
3bf61c55 GFT |
792 | static void |
793 | jme_free_rx_resources(struct jme_adapter *jme) | |
794 | { | |
795 | int i; | |
796 | struct jme_ring *rxring = &(jme->rxring[0]); | |
797 | ||
cd0ff491 | 798 | if (rxring->alloc) { |
fa97b924 GFT |
799 | if (rxring->bufinf) { |
800 | for (i = 0 ; i < jme->rx_ring_size ; ++i) | |
801 | jme_free_rx_buf(jme, i); | |
802 | kfree(rxring->bufinf); | |
803 | } | |
3bf61c55 GFT |
804 | |
805 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 806 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
3bf61c55 GFT |
807 | rxring->alloc, |
808 | rxring->dmaalloc); | |
809 | rxring->alloc = NULL; | |
810 | rxring->desc = NULL; | |
811 | rxring->dmaalloc = 0; | |
812 | rxring->dma = 0; | |
fa97b924 | 813 | rxring->bufinf = NULL; |
3bf61c55 GFT |
814 | } |
815 | rxring->next_to_use = 0; | |
cdcdc9eb | 816 | atomic_set(&rxring->next_to_clean, 0); |
3bf61c55 GFT |
817 | } |
818 | ||
819 | static int | |
820 | jme_setup_rx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
821 | { |
822 | int i; | |
823 | struct jme_ring *rxring = &(jme->rxring[0]); | |
824 | ||
825 | rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
826 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
827 | &(rxring->dmaalloc), | |
828 | GFP_ATOMIC); | |
fa97b924 GFT |
829 | if (!rxring->alloc) |
830 | goto err_set_null; | |
d7699f87 GFT |
831 | |
832 | /* | |
833 | * 16 Bytes align | |
834 | */ | |
cd0ff491 | 835 | rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc), |
3bf61c55 | 836 | RING_DESC_ALIGN); |
4330c2f2 | 837 | rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 838 | rxring->next_to_use = 0; |
cdcdc9eb | 839 | atomic_set(&rxring->next_to_clean, 0); |
d7699f87 | 840 | |
fa97b924 GFT |
841 | rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
842 | jme->rx_ring_size, GFP_ATOMIC); | |
843 | if (unlikely(!(rxring->bufinf))) | |
844 | goto err_free_rxring; | |
845 | ||
d7699f87 GFT |
846 | /* |
847 | * Initiallize Receive Descriptors | |
848 | */ | |
fa97b924 GFT |
849 | memset(rxring->bufinf, 0, |
850 | sizeof(struct jme_buffer_info) * jme->rx_ring_size); | |
cd0ff491 GFT |
851 | for (i = 0 ; i < jme->rx_ring_size ; ++i) { |
852 | if (unlikely(jme_make_new_rx_buf(jme, i))) { | |
3bf61c55 GFT |
853 | jme_free_rx_resources(jme); |
854 | return -ENOMEM; | |
855 | } | |
d7699f87 GFT |
856 | |
857 | jme_set_clean_rxdesc(jme, i); | |
858 | } | |
859 | ||
d7699f87 | 860 | return 0; |
fa97b924 GFT |
861 | |
862 | err_free_rxring: | |
863 | dma_free_coherent(&(jme->pdev->dev), | |
864 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), | |
865 | rxring->alloc, | |
866 | rxring->dmaalloc); | |
867 | err_set_null: | |
868 | rxring->desc = NULL; | |
869 | rxring->dmaalloc = 0; | |
870 | rxring->dma = 0; | |
871 | rxring->bufinf = NULL; | |
872 | ||
873 | return -ENOMEM; | |
d7699f87 GFT |
874 | } |
875 | ||
cd0ff491 | 876 | static inline void |
3bf61c55 | 877 | jme_enable_rx_engine(struct jme_adapter *jme) |
d7699f87 | 878 | { |
cd0ff491 GFT |
879 | /* |
880 | * Select Queue 0 | |
881 | */ | |
882 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | | |
883 | RXCS_QUEUESEL_Q0); | |
884 | wmb(); | |
885 | ||
d7699f87 GFT |
886 | /* |
887 | * Setup RX DMA Bass Address | |
888 | */ | |
fa97b924 | 889 | jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
3bf61c55 | 890 | jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32); |
fa97b924 | 891 | jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
d7699f87 GFT |
892 | |
893 | /* | |
b3821cc5 | 894 | * Setup RX Descriptor Count |
d7699f87 | 895 | */ |
b3821cc5 | 896 | jwrite32(jme, JME_RXQDC, jme->rx_ring_size); |
d7699f87 | 897 | |
3bf61c55 | 898 | /* |
d7699f87 GFT |
899 | * Setup Unicast Filter |
900 | */ | |
bb4c5c8c | 901 | jme_set_unicastaddr(jme->dev); |
d7699f87 GFT |
902 | jme_set_multi(jme->dev); |
903 | ||
904 | /* | |
905 | * Enable RX Engine | |
906 | */ | |
907 | wmb(); | |
ed830419 | 908 | jwrite32f(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
909 | RXCS_QUEUESEL_Q0 | |
910 | RXCS_ENABLE | | |
911 | RXCS_QST); | |
ed830419 GFT |
912 | |
913 | /* | |
914 | * Start clock for RX MAC Processor | |
915 | */ | |
916 | jme_mac_rxclk_on(jme); | |
d7699f87 GFT |
917 | } |
918 | ||
cd0ff491 | 919 | static inline void |
3bf61c55 | 920 | jme_restart_rx_engine(struct jme_adapter *jme) |
4330c2f2 GFT |
921 | { |
922 | /* | |
3bf61c55 | 923 | * Start RX Engine |
4330c2f2 | 924 | */ |
79ce639c | 925 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
926 | RXCS_QUEUESEL_Q0 | |
927 | RXCS_ENABLE | | |
928 | RXCS_QST); | |
929 | } | |
930 | ||
cd0ff491 | 931 | static inline void |
3bf61c55 | 932 | jme_disable_rx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
933 | { |
934 | int i; | |
cd0ff491 | 935 | u32 val; |
d7699f87 GFT |
936 | |
937 | /* | |
938 | * Disable RX Engine | |
939 | */ | |
29bdd921 | 940 | jwrite32(jme, JME_RXCS, jme->reg_rxcs); |
cd0ff491 | 941 | wmb(); |
d7699f87 GFT |
942 | |
943 | val = jread32(jme, JME_RXCS); | |
cd0ff491 | 944 | for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) { |
29bdd921 | 945 | mdelay(1); |
d7699f87 | 946 | val = jread32(jme, JME_RXCS); |
cd0ff491 | 947 | rmb(); |
d7699f87 GFT |
948 | } |
949 | ||
cd0ff491 | 950 | if (!i) |
52a46ba8 | 951 | pr_err("Disable RX engine timeout\n"); |
d7699f87 | 952 | |
ed830419 GFT |
953 | /* |
954 | * Stop clock for RX MAC Processor | |
955 | */ | |
956 | jme_mac_rxclk_off(jme); | |
d7699f87 GFT |
957 | } |
958 | ||
192570e0 | 959 | static int |
cd0ff491 | 960 | jme_rxsum_ok(struct jme_adapter *jme, u16 flags) |
192570e0 | 961 | { |
cd0ff491 | 962 | if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) |
192570e0 GFT |
963 | return false; |
964 | ||
fa97b924 GFT |
965 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS)) |
966 | == RXWBFLAG_TCPON)) { | |
967 | if (flags & RXWBFLAG_IPV4) | |
c97b5740 | 968 | netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n"); |
fa97b924 | 969 | return false; |
192570e0 GFT |
970 | } |
971 | ||
fa97b924 GFT |
972 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS)) |
973 | == RXWBFLAG_UDPON)) { | |
974 | if (flags & RXWBFLAG_IPV4) | |
52a46ba8 | 975 | netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n"); |
fa97b924 | 976 | return false; |
192570e0 GFT |
977 | } |
978 | ||
fa97b924 GFT |
979 | if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS)) |
980 | == RXWBFLAG_IPV4)) { | |
52a46ba8 | 981 | netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n"); |
fa97b924 | 982 | return false; |
192570e0 GFT |
983 | } |
984 | ||
985 | return true; | |
986 | } | |
987 | ||
3bf61c55 | 988 | static void |
42b1055e | 989 | jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) |
d7699f87 | 990 | { |
d7699f87 | 991 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 992 | struct rxdesc *rxdesc = rxring->desc; |
3bf61c55 | 993 | struct jme_buffer_info *rxbi = rxring->bufinf; |
d7699f87 | 994 | struct sk_buff *skb; |
3bf61c55 | 995 | int framesize; |
d7699f87 | 996 | |
3bf61c55 GFT |
997 | rxdesc += idx; |
998 | rxbi += idx; | |
d7699f87 | 999 | |
3bf61c55 GFT |
1000 | skb = rxbi->skb; |
1001 | pci_dma_sync_single_for_cpu(jme->pdev, | |
1002 | rxbi->mapping, | |
1003 | rxbi->len, | |
1004 | PCI_DMA_FROMDEVICE); | |
1005 | ||
cd0ff491 | 1006 | if (unlikely(jme_make_new_rx_buf(jme, idx))) { |
3bf61c55 GFT |
1007 | pci_dma_sync_single_for_device(jme->pdev, |
1008 | rxbi->mapping, | |
1009 | rxbi->len, | |
1010 | PCI_DMA_FROMDEVICE); | |
1011 | ||
1012 | ++(NET_STAT(jme).rx_dropped); | |
cd0ff491 | 1013 | } else { |
3bf61c55 GFT |
1014 | framesize = le16_to_cpu(rxdesc->descwb.framesize) |
1015 | - RX_PREPAD_SIZE; | |
1016 | ||
1017 | skb_reserve(skb, RX_PREPAD_SIZE); | |
1018 | skb_put(skb, framesize); | |
1019 | skb->protocol = eth_type_trans(skb, jme->dev); | |
1020 | ||
94c5ea02 | 1021 | if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags))) |
8c198884 | 1022 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
29bdd921 | 1023 | else |
97984ab7 | 1024 | skb_checksum_none_assert(skb); |
8c198884 | 1025 | |
94c5ea02 | 1026 | if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) { |
cd0ff491 | 1027 | if (jme->vlgrp) { |
cdcdc9eb | 1028 | jme->jme_vlan_rx(skb, jme->vlgrp, |
94c5ea02 | 1029 | le16_to_cpu(rxdesc->descwb.vlan)); |
b3821cc5 | 1030 | NET_STAT(jme).rx_bytes += 4; |
c97b5740 | 1031 | } else { |
c97b5740 | 1032 | dev_kfree_skb(skb); |
b3821cc5 | 1033 | } |
cd0ff491 | 1034 | } else { |
cdcdc9eb | 1035 | jme->jme_rx(skb); |
b3821cc5 | 1036 | } |
3bf61c55 | 1037 | |
94c5ea02 GFT |
1038 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) == |
1039 | cpu_to_le16(RXWBFLAG_DEST_MUL)) | |
3bf61c55 GFT |
1040 | ++(NET_STAT(jme).multicast); |
1041 | ||
3bf61c55 GFT |
1042 | NET_STAT(jme).rx_bytes += framesize; |
1043 | ++(NET_STAT(jme).rx_packets); | |
1044 | } | |
1045 | ||
1046 | jme_set_clean_rxdesc(jme, idx); | |
1047 | ||
1048 | } | |
1049 | ||
1050 | static int | |
1051 | jme_process_receive(struct jme_adapter *jme, int limit) | |
1052 | { | |
1053 | struct jme_ring *rxring = &(jme->rxring[0]); | |
cd0ff491 | 1054 | struct rxdesc *rxdesc = rxring->desc; |
b3821cc5 | 1055 | int i, j, ccnt, desccnt, mask = jme->rx_ring_mask; |
3bf61c55 | 1056 | |
cd0ff491 | 1057 | if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) |
192570e0 GFT |
1058 | goto out_inc; |
1059 | ||
cd0ff491 | 1060 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
192570e0 GFT |
1061 | goto out_inc; |
1062 | ||
cd0ff491 | 1063 | if (unlikely(!netif_carrier_ok(jme->dev))) |
192570e0 GFT |
1064 | goto out_inc; |
1065 | ||
cdcdc9eb | 1066 | i = atomic_read(&rxring->next_to_clean); |
fa97b924 | 1067 | while (limit > 0) { |
3bf61c55 GFT |
1068 | rxdesc = rxring->desc; |
1069 | rxdesc += i; | |
1070 | ||
94c5ea02 | 1071 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) || |
3bf61c55 GFT |
1072 | !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL)) |
1073 | goto out; | |
fa97b924 | 1074 | --limit; |
d7699f87 | 1075 | |
1a7a122d | 1076 | rmb(); |
4330c2f2 GFT |
1077 | desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; |
1078 | ||
cd0ff491 | 1079 | if (unlikely(desccnt > 1 || |
192570e0 | 1080 | rxdesc->descwb.errstat & RXWBERR_ALLERR)) { |
d7699f87 | 1081 | |
cd0ff491 | 1082 | if (rxdesc->descwb.errstat & RXWBERR_CRCERR) |
3bf61c55 | 1083 | ++(NET_STAT(jme).rx_crc_errors); |
cd0ff491 | 1084 | else if (rxdesc->descwb.errstat & RXWBERR_OVERUN) |
3bf61c55 GFT |
1085 | ++(NET_STAT(jme).rx_fifo_errors); |
1086 | else | |
1087 | ++(NET_STAT(jme).rx_errors); | |
4330c2f2 | 1088 | |
cd0ff491 | 1089 | if (desccnt > 1) |
3bf61c55 | 1090 | limit -= desccnt - 1; |
4330c2f2 | 1091 | |
cd0ff491 | 1092 | for (j = i, ccnt = desccnt ; ccnt-- ; ) { |
4330c2f2 | 1093 | jme_set_clean_rxdesc(jme, j); |
b3821cc5 | 1094 | j = (j + 1) & (mask); |
4330c2f2 | 1095 | } |
3bf61c55 | 1096 | |
cd0ff491 | 1097 | } else { |
42b1055e | 1098 | jme_alloc_and_feed_skb(jme, i); |
3bf61c55 | 1099 | } |
4330c2f2 | 1100 | |
b3821cc5 | 1101 | i = (i + desccnt) & (mask); |
3bf61c55 | 1102 | } |
4330c2f2 | 1103 | |
3bf61c55 | 1104 | out: |
cdcdc9eb | 1105 | atomic_set(&rxring->next_to_clean, i); |
4330c2f2 | 1106 | |
192570e0 GFT |
1107 | out_inc: |
1108 | atomic_inc(&jme->rx_cleaning); | |
1109 | ||
3bf61c55 | 1110 | return limit > 0 ? limit : 0; |
4330c2f2 | 1111 | |
3bf61c55 | 1112 | } |
d7699f87 | 1113 | |
79ce639c GFT |
1114 | static void |
1115 | jme_attempt_pcc(struct dynpcc_info *dpi, int atmp) | |
1116 | { | |
cd0ff491 | 1117 | if (likely(atmp == dpi->cur)) { |
192570e0 | 1118 | dpi->cnt = 0; |
79ce639c | 1119 | return; |
192570e0 | 1120 | } |
79ce639c | 1121 | |
cd0ff491 | 1122 | if (dpi->attempt == atmp) { |
79ce639c | 1123 | ++(dpi->cnt); |
cd0ff491 | 1124 | } else { |
79ce639c GFT |
1125 | dpi->attempt = atmp; |
1126 | dpi->cnt = 0; | |
1127 | } | |
1128 | ||
1129 | } | |
1130 | ||
1131 | static void | |
1132 | jme_dynamic_pcc(struct jme_adapter *jme) | |
1133 | { | |
1134 | register struct dynpcc_info *dpi = &(jme->dpi); | |
1135 | ||
cd0ff491 | 1136 | if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) |
79ce639c | 1137 | jme_attempt_pcc(dpi, PCC_P3); |
c97b5740 GFT |
1138 | else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD || |
1139 | dpi->intr_cnt > PCC_INTR_THRESHOLD) | |
79ce639c GFT |
1140 | jme_attempt_pcc(dpi, PCC_P2); |
1141 | else | |
1142 | jme_attempt_pcc(dpi, PCC_P1); | |
1143 | ||
cd0ff491 GFT |
1144 | if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { |
1145 | if (dpi->attempt < dpi->cur) | |
1146 | tasklet_schedule(&jme->rxclean_task); | |
79ce639c GFT |
1147 | jme_set_rx_pcc(jme, dpi->attempt); |
1148 | dpi->cur = dpi->attempt; | |
1149 | dpi->cnt = 0; | |
1150 | } | |
1151 | } | |
1152 | ||
1153 | static void | |
1154 | jme_start_pcc_timer(struct jme_adapter *jme) | |
1155 | { | |
1156 | struct dynpcc_info *dpi = &(jme->dpi); | |
1157 | dpi->last_bytes = NET_STAT(jme).rx_bytes; | |
1158 | dpi->last_pkts = NET_STAT(jme).rx_packets; | |
1159 | dpi->intr_cnt = 0; | |
1160 | jwrite32(jme, JME_TMCSR, | |
1161 | TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT)); | |
1162 | } | |
1163 | ||
cd0ff491 | 1164 | static inline void |
29bdd921 GFT |
1165 | jme_stop_pcc_timer(struct jme_adapter *jme) |
1166 | { | |
1167 | jwrite32(jme, JME_TMCSR, 0); | |
1168 | } | |
1169 | ||
cd0ff491 GFT |
1170 | static void |
1171 | jme_shutdown_nic(struct jme_adapter *jme) | |
1172 | { | |
1173 | u32 phylink; | |
1174 | ||
1175 | phylink = jme_linkstat_from_phy(jme); | |
1176 | ||
1177 | if (!(phylink & PHY_LINK_UP)) { | |
1178 | /* | |
1179 | * Disable all interrupt before issue timer | |
1180 | */ | |
1181 | jme_stop_irq(jme); | |
1182 | jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE); | |
1183 | } | |
1184 | } | |
1185 | ||
79ce639c GFT |
1186 | static void |
1187 | jme_pcc_tasklet(unsigned long arg) | |
1188 | { | |
cd0ff491 | 1189 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c GFT |
1190 | struct net_device *netdev = jme->dev; |
1191 | ||
cd0ff491 GFT |
1192 | if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) { |
1193 | jme_shutdown_nic(jme); | |
1194 | return; | |
1195 | } | |
29bdd921 | 1196 | |
cd0ff491 | 1197 | if (unlikely(!netif_carrier_ok(netdev) || |
29bdd921 GFT |
1198 | (atomic_read(&jme->link_changing) != 1) |
1199 | )) { | |
1200 | jme_stop_pcc_timer(jme); | |
79ce639c GFT |
1201 | return; |
1202 | } | |
29bdd921 | 1203 | |
cd0ff491 | 1204 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
192570e0 GFT |
1205 | jme_dynamic_pcc(jme); |
1206 | ||
79ce639c GFT |
1207 | jme_start_pcc_timer(jme); |
1208 | } | |
1209 | ||
cd0ff491 | 1210 | static inline void |
192570e0 GFT |
1211 | jme_polling_mode(struct jme_adapter *jme) |
1212 | { | |
1213 | jme_set_rx_pcc(jme, PCC_OFF); | |
1214 | } | |
1215 | ||
cd0ff491 | 1216 | static inline void |
192570e0 GFT |
1217 | jme_interrupt_mode(struct jme_adapter *jme) |
1218 | { | |
1219 | jme_set_rx_pcc(jme, PCC_P1); | |
1220 | } | |
1221 | ||
cd0ff491 GFT |
1222 | static inline int |
1223 | jme_pseudo_hotplug_enabled(struct jme_adapter *jme) | |
1224 | { | |
1225 | u32 apmc; | |
1226 | apmc = jread32(jme, JME_APMC); | |
1227 | return apmc & JME_APMC_PSEUDO_HP_EN; | |
1228 | } | |
1229 | ||
1230 | static void | |
1231 | jme_start_shutdown_timer(struct jme_adapter *jme) | |
1232 | { | |
1233 | u32 apmc; | |
1234 | ||
1235 | apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN; | |
1236 | apmc &= ~JME_APMC_EPIEN_CTRL; | |
1237 | if (!no_extplug) { | |
1238 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN); | |
1239 | wmb(); | |
1240 | } | |
1241 | jwrite32f(jme, JME_APMC, apmc); | |
1242 | ||
1243 | jwrite32f(jme, JME_TIMER2, 0); | |
1244 | set_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1245 | jwrite32(jme, JME_TMCSR, | |
1246 | TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT)); | |
1247 | } | |
1248 | ||
1249 | static void | |
1250 | jme_stop_shutdown_timer(struct jme_adapter *jme) | |
1251 | { | |
1252 | u32 apmc; | |
1253 | ||
1254 | jwrite32f(jme, JME_TMCSR, 0); | |
1255 | jwrite32f(jme, JME_TIMER2, 0); | |
1256 | clear_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1257 | ||
1258 | apmc = jread32(jme, JME_APMC); | |
1259 | apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL); | |
1260 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS); | |
1261 | wmb(); | |
1262 | jwrite32f(jme, JME_APMC, apmc); | |
1263 | } | |
1264 | ||
3bf61c55 GFT |
1265 | static void |
1266 | jme_link_change_tasklet(unsigned long arg) | |
1267 | { | |
cd0ff491 | 1268 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1269 | struct net_device *netdev = jme->dev; |
fcf45b4c GFT |
1270 | int rc; |
1271 | ||
cd0ff491 GFT |
1272 | while (!atomic_dec_and_test(&jme->link_changing)) { |
1273 | atomic_inc(&jme->link_changing); | |
52a46ba8 | 1274 | netif_info(jme, intr, jme->dev, "Get link change lock failed\n"); |
e882564f | 1275 | while (atomic_read(&jme->link_changing) != 1) |
52a46ba8 | 1276 | netif_info(jme, intr, jme->dev, "Waiting link change lock\n"); |
cd0ff491 | 1277 | } |
fcf45b4c | 1278 | |
cd0ff491 | 1279 | if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) |
fcf45b4c GFT |
1280 | goto out; |
1281 | ||
29bdd921 | 1282 | jme->old_mtu = netdev->mtu; |
fcf45b4c | 1283 | netif_stop_queue(netdev); |
cd0ff491 GFT |
1284 | if (jme_pseudo_hotplug_enabled(jme)) |
1285 | jme_stop_shutdown_timer(jme); | |
1286 | ||
1287 | jme_stop_pcc_timer(jme); | |
1288 | tasklet_disable(&jme->txclean_task); | |
1289 | tasklet_disable(&jme->rxclean_task); | |
1290 | tasklet_disable(&jme->rxempty_task); | |
1291 | ||
1292 | if (netif_carrier_ok(netdev)) { | |
cd0ff491 GFT |
1293 | jme_disable_rx_engine(jme); |
1294 | jme_disable_tx_engine(jme); | |
fcf45b4c GFT |
1295 | jme_reset_mac_processor(jme); |
1296 | jme_free_rx_resources(jme); | |
1297 | jme_free_tx_resources(jme); | |
192570e0 | 1298 | |
cd0ff491 | 1299 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1300 | jme_polling_mode(jme); |
cd0ff491 GFT |
1301 | |
1302 | netif_carrier_off(netdev); | |
fcf45b4c GFT |
1303 | } |
1304 | ||
1305 | jme_check_link(netdev, 0); | |
cd0ff491 | 1306 | if (netif_carrier_ok(netdev)) { |
fcf45b4c | 1307 | rc = jme_setup_rx_resources(jme); |
cd0ff491 | 1308 | if (rc) { |
52a46ba8 | 1309 | pr_err("Allocating resources for RX error, Device STOPPED!\n"); |
cd0ff491 | 1310 | goto out_enable_tasklet; |
fcf45b4c GFT |
1311 | } |
1312 | ||
fcf45b4c | 1313 | rc = jme_setup_tx_resources(jme); |
cd0ff491 | 1314 | if (rc) { |
52a46ba8 | 1315 | pr_err("Allocating resources for TX error, Device STOPPED!\n"); |
fcf45b4c GFT |
1316 | goto err_out_free_rx_resources; |
1317 | } | |
1318 | ||
1319 | jme_enable_rx_engine(jme); | |
1320 | jme_enable_tx_engine(jme); | |
1321 | ||
1322 | netif_start_queue(netdev); | |
192570e0 | 1323 | |
cd0ff491 | 1324 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1325 | jme_interrupt_mode(jme); |
192570e0 | 1326 | |
79ce639c | 1327 | jme_start_pcc_timer(jme); |
cd0ff491 GFT |
1328 | } else if (jme_pseudo_hotplug_enabled(jme)) { |
1329 | jme_start_shutdown_timer(jme); | |
fcf45b4c GFT |
1330 | } |
1331 | ||
cd0ff491 | 1332 | goto out_enable_tasklet; |
fcf45b4c GFT |
1333 | |
1334 | err_out_free_rx_resources: | |
1335 | jme_free_rx_resources(jme); | |
cd0ff491 GFT |
1336 | out_enable_tasklet: |
1337 | tasklet_enable(&jme->txclean_task); | |
1338 | tasklet_hi_enable(&jme->rxclean_task); | |
1339 | tasklet_hi_enable(&jme->rxempty_task); | |
fcf45b4c GFT |
1340 | out: |
1341 | atomic_inc(&jme->link_changing); | |
3bf61c55 | 1342 | } |
d7699f87 | 1343 | |
3bf61c55 GFT |
1344 | static void |
1345 | jme_rx_clean_tasklet(unsigned long arg) | |
1346 | { | |
cd0ff491 | 1347 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c | 1348 | struct dynpcc_info *dpi = &(jme->dpi); |
d7699f87 | 1349 | |
192570e0 GFT |
1350 | jme_process_receive(jme, jme->rx_ring_size); |
1351 | ++(dpi->intr_cnt); | |
42b1055e | 1352 | |
192570e0 | 1353 | } |
fcf45b4c | 1354 | |
192570e0 | 1355 | static int |
cdcdc9eb | 1356 | jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) |
192570e0 | 1357 | { |
cdcdc9eb | 1358 | struct jme_adapter *jme = jme_napi_priv(holder); |
192570e0 | 1359 | int rest; |
fcf45b4c | 1360 | |
cdcdc9eb | 1361 | rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget)); |
fcf45b4c | 1362 | |
cd0ff491 | 1363 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb | 1364 | atomic_dec(&jme->rx_empty); |
192570e0 GFT |
1365 | ++(NET_STAT(jme).rx_dropped); |
1366 | jme_restart_rx_engine(jme); | |
1367 | } | |
1368 | atomic_inc(&jme->rx_empty); | |
1369 | ||
cd0ff491 | 1370 | if (rest) { |
cdcdc9eb | 1371 | JME_RX_COMPLETE(netdev, holder); |
192570e0 GFT |
1372 | jme_interrupt_mode(jme); |
1373 | } | |
1374 | ||
cdcdc9eb GFT |
1375 | JME_NAPI_WEIGHT_SET(budget, rest); |
1376 | return JME_NAPI_WEIGHT_VAL(budget) - rest; | |
fcf45b4c GFT |
1377 | } |
1378 | ||
1379 | static void | |
1380 | jme_rx_empty_tasklet(unsigned long arg) | |
1381 | { | |
cd0ff491 | 1382 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1383 | |
cd0ff491 | 1384 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1385 | return; |
1386 | ||
cd0ff491 | 1387 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1388 | return; |
1389 | ||
c97b5740 | 1390 | netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n"); |
29bdd921 | 1391 | |
fcf45b4c | 1392 | jme_rx_clean_tasklet(arg); |
cdcdc9eb | 1393 | |
cd0ff491 | 1394 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb GFT |
1395 | atomic_dec(&jme->rx_empty); |
1396 | ++(NET_STAT(jme).rx_dropped); | |
1397 | jme_restart_rx_engine(jme); | |
1398 | } | |
1399 | atomic_inc(&jme->rx_empty); | |
4330c2f2 GFT |
1400 | } |
1401 | ||
b3821cc5 GFT |
1402 | static void |
1403 | jme_wake_queue_if_stopped(struct jme_adapter *jme) | |
1404 | { | |
fa97b924 | 1405 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1406 | |
1407 | smp_wmb(); | |
cd0ff491 | 1408 | if (unlikely(netif_queue_stopped(jme->dev) && |
b3821cc5 | 1409 | atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) { |
52a46ba8 | 1410 | netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n"); |
b3821cc5 | 1411 | netif_wake_queue(jme->dev); |
b3821cc5 GFT |
1412 | } |
1413 | ||
1414 | } | |
1415 | ||
3bf61c55 GFT |
1416 | static void |
1417 | jme_tx_clean_tasklet(unsigned long arg) | |
4330c2f2 | 1418 | { |
cd0ff491 | 1419 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
3bf61c55 | 1420 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1421 | struct txdesc *txdesc = txring->desc; |
3bf61c55 | 1422 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi; |
b3821cc5 | 1423 | int i, j, cnt = 0, max, err, mask; |
3bf61c55 | 1424 | |
52a46ba8 | 1425 | tx_dbg(jme, "Into txclean\n"); |
cd0ff491 GFT |
1426 | |
1427 | if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) | |
fcf45b4c GFT |
1428 | goto out; |
1429 | ||
cd0ff491 | 1430 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1431 | goto out; |
1432 | ||
cd0ff491 | 1433 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1434 | goto out; |
1435 | ||
b3821cc5 GFT |
1436 | max = jme->tx_ring_size - atomic_read(&txring->nr_free); |
1437 | mask = jme->tx_ring_mask; | |
3bf61c55 | 1438 | |
cd0ff491 | 1439 | for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { |
3bf61c55 GFT |
1440 | |
1441 | ctxbi = txbi + i; | |
1442 | ||
cd0ff491 | 1443 | if (likely(ctxbi->skb && |
b3821cc5 | 1444 | !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) { |
8c198884 | 1445 | |
cd0ff491 | 1446 | tx_dbg(jme, "txclean: %d+%d@%lu\n", |
52a46ba8 | 1447 | i, ctxbi->nr_desc, jiffies); |
3bf61c55 | 1448 | |
cd0ff491 | 1449 | err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; |
3bf61c55 | 1450 | |
cd0ff491 | 1451 | for (j = 1 ; j < ctxbi->nr_desc ; ++j) { |
b3821cc5 GFT |
1452 | ttxbi = txbi + ((i + j) & (mask)); |
1453 | txdesc[(i + j) & (mask)].dw[0] = 0; | |
3bf61c55 | 1454 | |
b3821cc5 | 1455 | pci_unmap_page(jme->pdev, |
3bf61c55 GFT |
1456 | ttxbi->mapping, |
1457 | ttxbi->len, | |
1458 | PCI_DMA_TODEVICE); | |
1459 | ||
3bf61c55 GFT |
1460 | ttxbi->mapping = 0; |
1461 | ttxbi->len = 0; | |
1462 | } | |
1463 | ||
1464 | dev_kfree_skb(ctxbi->skb); | |
3bf61c55 GFT |
1465 | |
1466 | cnt += ctxbi->nr_desc; | |
1467 | ||
cd0ff491 | 1468 | if (unlikely(err)) { |
8c198884 | 1469 | ++(NET_STAT(jme).tx_carrier_errors); |
cd0ff491 | 1470 | } else { |
8c198884 | 1471 | ++(NET_STAT(jme).tx_packets); |
b3821cc5 GFT |
1472 | NET_STAT(jme).tx_bytes += ctxbi->len; |
1473 | } | |
1474 | ||
1475 | ctxbi->skb = NULL; | |
1476 | ctxbi->len = 0; | |
cdcdc9eb | 1477 | ctxbi->start_xmit = 0; |
cd0ff491 GFT |
1478 | |
1479 | } else { | |
3bf61c55 GFT |
1480 | break; |
1481 | } | |
1482 | ||
b3821cc5 | 1483 | i = (i + ctxbi->nr_desc) & mask; |
3bf61c55 GFT |
1484 | |
1485 | ctxbi->nr_desc = 0; | |
d7699f87 GFT |
1486 | } |
1487 | ||
52a46ba8 | 1488 | tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies); |
cdcdc9eb | 1489 | atomic_set(&txring->next_to_clean, i); |
79ce639c | 1490 | atomic_add(cnt, &txring->nr_free); |
3bf61c55 | 1491 | |
b3821cc5 GFT |
1492 | jme_wake_queue_if_stopped(jme); |
1493 | ||
fcf45b4c GFT |
1494 | out: |
1495 | atomic_inc(&jme->tx_cleaning); | |
d7699f87 GFT |
1496 | } |
1497 | ||
79ce639c | 1498 | static void |
cd0ff491 | 1499 | jme_intr_msi(struct jme_adapter *jme, u32 intrstat) |
d7699f87 | 1500 | { |
3bf61c55 GFT |
1501 | /* |
1502 | * Disable interrupt | |
1503 | */ | |
1504 | jwrite32f(jme, JME_IENC, INTR_ENABLE); | |
d7699f87 | 1505 | |
cd0ff491 | 1506 | if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { |
47220951 GFT |
1507 | /* |
1508 | * Link change event is critical | |
1509 | * all other events are ignored | |
1510 | */ | |
1511 | jwrite32(jme, JME_IEVE, intrstat); | |
3bf61c55 | 1512 | tasklet_schedule(&jme->linkch_task); |
29bdd921 | 1513 | goto out_reenable; |
fcf45b4c | 1514 | } |
d7699f87 | 1515 | |
cd0ff491 | 1516 | if (intrstat & INTR_TMINTR) { |
47220951 | 1517 | jwrite32(jme, JME_IEVE, INTR_TMINTR); |
79ce639c | 1518 | tasklet_schedule(&jme->pcc_task); |
47220951 | 1519 | } |
79ce639c | 1520 | |
cd0ff491 | 1521 | if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { |
47220951 | 1522 | jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0); |
4330c2f2 | 1523 | tasklet_schedule(&jme->txclean_task); |
47220951 GFT |
1524 | } |
1525 | ||
cd0ff491 | 1526 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
47220951 GFT |
1527 | jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO | |
1528 | INTR_PCCRX0 | | |
1529 | INTR_RX0EMP)) | | |
1530 | INTR_RX0); | |
1531 | } | |
d7699f87 | 1532 | |
cd0ff491 GFT |
1533 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
1534 | if (intrstat & INTR_RX0EMP) | |
192570e0 GFT |
1535 | atomic_inc(&jme->rx_empty); |
1536 | ||
cd0ff491 GFT |
1537 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
1538 | if (likely(JME_RX_SCHEDULE_PREP(jme))) { | |
192570e0 | 1539 | jme_polling_mode(jme); |
cdcdc9eb | 1540 | JME_RX_SCHEDULE(jme); |
192570e0 GFT |
1541 | } |
1542 | } | |
cd0ff491 GFT |
1543 | } else { |
1544 | if (intrstat & INTR_RX0EMP) { | |
cdcdc9eb | 1545 | atomic_inc(&jme->rx_empty); |
cd0ff491 GFT |
1546 | tasklet_hi_schedule(&jme->rxempty_task); |
1547 | } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) { | |
1548 | tasklet_hi_schedule(&jme->rxclean_task); | |
cdcdc9eb | 1549 | } |
4330c2f2 | 1550 | } |
d7699f87 | 1551 | |
29bdd921 | 1552 | out_reenable: |
3bf61c55 | 1553 | /* |
fcf45b4c | 1554 | * Re-enable interrupt |
3bf61c55 | 1555 | */ |
fcf45b4c | 1556 | jwrite32f(jme, JME_IENS, INTR_ENABLE); |
79ce639c GFT |
1557 | } |
1558 | ||
1559 | static irqreturn_t | |
1560 | jme_intr(int irq, void *dev_id) | |
1561 | { | |
cd0ff491 GFT |
1562 | struct net_device *netdev = dev_id; |
1563 | struct jme_adapter *jme = netdev_priv(netdev); | |
1564 | u32 intrstat; | |
79ce639c GFT |
1565 | |
1566 | intrstat = jread32(jme, JME_IEVE); | |
1567 | ||
1568 | /* | |
1569 | * Check if it's really an interrupt for us | |
1570 | */ | |
9b9d55de | 1571 | if (unlikely((intrstat & INTR_ENABLE) == 0)) |
29bdd921 | 1572 | return IRQ_NONE; |
79ce639c GFT |
1573 | |
1574 | /* | |
1575 | * Check if the device still exist | |
1576 | */ | |
cd0ff491 GFT |
1577 | if (unlikely(intrstat == ~((typeof(intrstat))0))) |
1578 | return IRQ_NONE; | |
79ce639c GFT |
1579 | |
1580 | jme_intr_msi(jme, intrstat); | |
1581 | ||
cd0ff491 | 1582 | return IRQ_HANDLED; |
d7699f87 GFT |
1583 | } |
1584 | ||
79ce639c GFT |
1585 | static irqreturn_t |
1586 | jme_msi(int irq, void *dev_id) | |
1587 | { | |
cd0ff491 GFT |
1588 | struct net_device *netdev = dev_id; |
1589 | struct jme_adapter *jme = netdev_priv(netdev); | |
1590 | u32 intrstat; | |
79ce639c | 1591 | |
fa97b924 | 1592 | intrstat = jread32(jme, JME_IEVE); |
79ce639c GFT |
1593 | |
1594 | jme_intr_msi(jme, intrstat); | |
1595 | ||
cd0ff491 | 1596 | return IRQ_HANDLED; |
79ce639c GFT |
1597 | } |
1598 | ||
79ce639c GFT |
1599 | static void |
1600 | jme_reset_link(struct jme_adapter *jme) | |
1601 | { | |
1602 | jwrite32(jme, JME_TMCSR, TMCSR_SWIT); | |
1603 | } | |
1604 | ||
fcf45b4c GFT |
1605 | static void |
1606 | jme_restart_an(struct jme_adapter *jme) | |
1607 | { | |
cd0ff491 | 1608 | u32 bmcr; |
fcf45b4c | 1609 | |
cd0ff491 | 1610 | spin_lock_bh(&jme->phy_lock); |
fcf45b4c GFT |
1611 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1612 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
1613 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
cd0ff491 | 1614 | spin_unlock_bh(&jme->phy_lock); |
79ce639c GFT |
1615 | } |
1616 | ||
1617 | static int | |
1618 | jme_request_irq(struct jme_adapter *jme) | |
1619 | { | |
1620 | int rc; | |
cd0ff491 GFT |
1621 | struct net_device *netdev = jme->dev; |
1622 | irq_handler_t handler = jme_intr; | |
1623 | int irq_flags = IRQF_SHARED; | |
1624 | ||
1625 | if (!pci_enable_msi(jme->pdev)) { | |
1626 | set_bit(JME_FLAG_MSI, &jme->flags); | |
1627 | handler = jme_msi; | |
1628 | irq_flags = 0; | |
1629 | } | |
1630 | ||
1631 | rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, | |
1632 | netdev); | |
1633 | if (rc) { | |
52a46ba8 JP |
1634 | netdev_err(netdev, |
1635 | "Unable to request %s interrupt (return: %d)\n", | |
1636 | test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx", | |
1637 | rc); | |
79ce639c | 1638 | |
cd0ff491 GFT |
1639 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { |
1640 | pci_disable_msi(jme->pdev); | |
1641 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1642 | } |
cd0ff491 | 1643 | } else { |
79ce639c GFT |
1644 | netdev->irq = jme->pdev->irq; |
1645 | } | |
1646 | ||
cd0ff491 | 1647 | return rc; |
79ce639c GFT |
1648 | } |
1649 | ||
1650 | static void | |
1651 | jme_free_irq(struct jme_adapter *jme) | |
1652 | { | |
cd0ff491 GFT |
1653 | free_irq(jme->pdev->irq, jme->dev); |
1654 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { | |
1655 | pci_disable_msi(jme->pdev); | |
1656 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1657 | jme->dev->irq = jme->pdev->irq; |
cd0ff491 | 1658 | } |
fcf45b4c GFT |
1659 | } |
1660 | ||
e4610a83 GFT |
1661 | static inline void |
1662 | jme_new_phy_on(struct jme_adapter *jme) | |
1663 | { | |
1664 | u32 reg; | |
1665 | ||
1666 | reg = jread32(jme, JME_PHY_PWR); | |
1667 | reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | | |
1668 | PHY_PWR_DWN2 | PHY_PWR_CLKSEL); | |
1669 | jwrite32(jme, JME_PHY_PWR, reg); | |
1670 | ||
1671 | pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); | |
1672 | reg &= ~PE1_GPREG0_PBG; | |
1673 | reg |= PE1_GPREG0_ENBG; | |
1674 | pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); | |
1675 | } | |
1676 | ||
1677 | static inline void | |
1678 | jme_new_phy_off(struct jme_adapter *jme) | |
1679 | { | |
1680 | u32 reg; | |
1681 | ||
1682 | reg = jread32(jme, JME_PHY_PWR); | |
1683 | reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | | |
1684 | PHY_PWR_DWN2 | PHY_PWR_CLKSEL; | |
1685 | jwrite32(jme, JME_PHY_PWR, reg); | |
1686 | ||
1687 | pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); | |
1688 | reg &= ~PE1_GPREG0_PBG; | |
1689 | reg |= PE1_GPREG0_PDD3COLD; | |
1690 | pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); | |
1691 | } | |
1692 | ||
48db98f7 GFT |
1693 | static inline void |
1694 | jme_phy_on(struct jme_adapter *jme) | |
1695 | { | |
1696 | u32 bmcr; | |
1697 | ||
1698 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1699 | bmcr &= ~BMCR_PDOWN; | |
1700 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
e4610a83 GFT |
1701 | |
1702 | if (new_phy_power_ctrl(jme->chip_main_rev)) | |
1703 | jme_new_phy_on(jme); | |
1704 | } | |
1705 | ||
1706 | static inline void | |
1707 | jme_phy_off(struct jme_adapter *jme) | |
1708 | { | |
1709 | u32 bmcr; | |
1710 | ||
1711 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1712 | bmcr |= BMCR_PDOWN; | |
1713 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
1714 | ||
1715 | if (new_phy_power_ctrl(jme->chip_main_rev)) | |
1716 | jme_new_phy_off(jme); | |
48db98f7 GFT |
1717 | } |
1718 | ||
3bf61c55 GFT |
1719 | static int |
1720 | jme_open(struct net_device *netdev) | |
d7699f87 GFT |
1721 | { |
1722 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 1723 | int rc; |
79ce639c | 1724 | |
42b1055e | 1725 | jme_clear_pm(jme); |
cdcdc9eb | 1726 | JME_NAPI_ENABLE(jme); |
d7699f87 | 1727 | |
fa97b924 | 1728 | tasklet_enable(&jme->linkch_task); |
cd0ff491 GFT |
1729 | tasklet_enable(&jme->txclean_task); |
1730 | tasklet_hi_enable(&jme->rxclean_task); | |
1731 | tasklet_hi_enable(&jme->rxempty_task); | |
1732 | ||
79ce639c | 1733 | rc = jme_request_irq(jme); |
cd0ff491 | 1734 | if (rc) |
4330c2f2 | 1735 | goto err_out; |
79ce639c | 1736 | |
d7699f87 | 1737 | jme_start_irq(jme); |
42b1055e | 1738 | |
e4610a83 GFT |
1739 | jme_phy_on(jme); |
1740 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
42b1055e | 1741 | jme_set_settings(netdev, &jme->old_ecmd); |
e4610a83 | 1742 | else |
42b1055e GFT |
1743 | jme_reset_phy_processor(jme); |
1744 | ||
29bdd921 | 1745 | jme_reset_link(jme); |
d7699f87 GFT |
1746 | |
1747 | return 0; | |
1748 | ||
d7699f87 GFT |
1749 | err_out: |
1750 | netif_stop_queue(netdev); | |
1751 | netif_carrier_off(netdev); | |
4330c2f2 | 1752 | return rc; |
d7699f87 GFT |
1753 | } |
1754 | ||
42b1055e GFT |
1755 | static void |
1756 | jme_set_100m_half(struct jme_adapter *jme) | |
1757 | { | |
cd0ff491 | 1758 | u32 bmcr, tmp; |
42b1055e | 1759 | |
fba4bc0c | 1760 | jme_phy_on(jme); |
42b1055e GFT |
1761 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1762 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | | |
1763 | BMCR_SPEED1000 | BMCR_FULLDPLX); | |
1764 | tmp |= BMCR_SPEED100; | |
1765 | ||
1766 | if (bmcr != tmp) | |
1767 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp); | |
1768 | ||
cd0ff491 | 1769 | if (jme->fpgaver) |
cdcdc9eb GFT |
1770 | jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL); |
1771 | else | |
1772 | jwrite32(jme, JME_GHC, GHC_SPEED_100M); | |
42b1055e GFT |
1773 | } |
1774 | ||
47220951 GFT |
1775 | #define JME_WAIT_LINK_TIME 2000 /* 2000ms */ |
1776 | static void | |
1777 | jme_wait_link(struct jme_adapter *jme) | |
1778 | { | |
cd0ff491 | 1779 | u32 phylink, to = JME_WAIT_LINK_TIME; |
47220951 GFT |
1780 | |
1781 | mdelay(1000); | |
1782 | phylink = jme_linkstat_from_phy(jme); | |
cd0ff491 | 1783 | while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { |
47220951 GFT |
1784 | mdelay(10); |
1785 | phylink = jme_linkstat_from_phy(jme); | |
1786 | } | |
1787 | } | |
1788 | ||
fba4bc0c GFT |
1789 | static void |
1790 | jme_powersave_phy(struct jme_adapter *jme) | |
1791 | { | |
1792 | if (jme->reg_pmcs) { | |
1793 | jme_set_100m_half(jme); | |
1794 | ||
1795 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) | |
1796 | jme_wait_link(jme); | |
1797 | ||
1798 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); | |
1799 | } else { | |
1800 | jme_phy_off(jme); | |
1801 | } | |
1802 | } | |
1803 | ||
3bf61c55 GFT |
1804 | static int |
1805 | jme_close(struct net_device *netdev) | |
d7699f87 GFT |
1806 | { |
1807 | struct jme_adapter *jme = netdev_priv(netdev); | |
1808 | ||
1809 | netif_stop_queue(netdev); | |
1810 | netif_carrier_off(netdev); | |
1811 | ||
1812 | jme_stop_irq(jme); | |
79ce639c | 1813 | jme_free_irq(jme); |
d7699f87 | 1814 | |
cdcdc9eb | 1815 | JME_NAPI_DISABLE(jme); |
192570e0 | 1816 | |
fa97b924 GFT |
1817 | tasklet_disable(&jme->linkch_task); |
1818 | tasklet_disable(&jme->txclean_task); | |
1819 | tasklet_disable(&jme->rxclean_task); | |
1820 | tasklet_disable(&jme->rxempty_task); | |
8c198884 | 1821 | |
cd0ff491 GFT |
1822 | jme_disable_rx_engine(jme); |
1823 | jme_disable_tx_engine(jme); | |
8c198884 | 1824 | jme_reset_mac_processor(jme); |
d7699f87 GFT |
1825 | jme_free_rx_resources(jme); |
1826 | jme_free_tx_resources(jme); | |
42b1055e | 1827 | jme->phylink = 0; |
b3821cc5 GFT |
1828 | jme_phy_off(jme); |
1829 | ||
1830 | return 0; | |
1831 | } | |
1832 | ||
1833 | static int | |
1834 | jme_alloc_txdesc(struct jme_adapter *jme, | |
1835 | struct sk_buff *skb) | |
1836 | { | |
fa97b924 | 1837 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1838 | int idx, nr_alloc, mask = jme->tx_ring_mask; |
1839 | ||
1840 | idx = txring->next_to_use; | |
1841 | nr_alloc = skb_shinfo(skb)->nr_frags + 2; | |
1842 | ||
cd0ff491 | 1843 | if (unlikely(atomic_read(&txring->nr_free) < nr_alloc)) |
b3821cc5 GFT |
1844 | return -1; |
1845 | ||
1846 | atomic_sub(nr_alloc, &txring->nr_free); | |
42b1055e | 1847 | |
b3821cc5 GFT |
1848 | txring->next_to_use = (txring->next_to_use + nr_alloc) & mask; |
1849 | ||
1850 | return idx; | |
1851 | } | |
1852 | ||
1853 | static void | |
1854 | jme_fill_tx_map(struct pci_dev *pdev, | |
cd0ff491 | 1855 | struct txdesc *txdesc, |
b3821cc5 GFT |
1856 | struct jme_buffer_info *txbi, |
1857 | struct page *page, | |
cd0ff491 GFT |
1858 | u32 page_offset, |
1859 | u32 len, | |
1860 | u8 hidma) | |
b3821cc5 GFT |
1861 | { |
1862 | dma_addr_t dmaaddr; | |
1863 | ||
1864 | dmaaddr = pci_map_page(pdev, | |
1865 | page, | |
1866 | page_offset, | |
1867 | len, | |
1868 | PCI_DMA_TODEVICE); | |
1869 | ||
1870 | pci_dma_sync_single_for_device(pdev, | |
1871 | dmaaddr, | |
1872 | len, | |
1873 | PCI_DMA_TODEVICE); | |
1874 | ||
1875 | txdesc->dw[0] = 0; | |
1876 | txdesc->dw[1] = 0; | |
1877 | txdesc->desc2.flags = TXFLAG_OWN; | |
cd0ff491 | 1878 | txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0; |
b3821cc5 GFT |
1879 | txdesc->desc2.datalen = cpu_to_le16(len); |
1880 | txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32); | |
1881 | txdesc->desc2.bufaddrl = cpu_to_le32( | |
1882 | (__u64)dmaaddr & 0xFFFFFFFFUL); | |
1883 | ||
1884 | txbi->mapping = dmaaddr; | |
1885 | txbi->len = len; | |
1886 | } | |
1887 | ||
1888 | static void | |
1889 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
1890 | { | |
fa97b924 | 1891 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1892 | struct txdesc *txdesc = txring->desc, *ctxdesc; |
b3821cc5 | 1893 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; |
cd0ff491 | 1894 | u8 hidma = jme->dev->features & NETIF_F_HIGHDMA; |
b3821cc5 GFT |
1895 | int i, nr_frags = skb_shinfo(skb)->nr_frags; |
1896 | int mask = jme->tx_ring_mask; | |
1897 | struct skb_frag_struct *frag; | |
cd0ff491 | 1898 | u32 len; |
b3821cc5 | 1899 | |
cd0ff491 GFT |
1900 | for (i = 0 ; i < nr_frags ; ++i) { |
1901 | frag = &skb_shinfo(skb)->frags[i]; | |
b3821cc5 GFT |
1902 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); |
1903 | ctxbi = txbi + ((idx + i + 2) & (mask)); | |
1904 | ||
1905 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page, | |
1906 | frag->page_offset, frag->size, hidma); | |
42b1055e | 1907 | } |
b3821cc5 | 1908 | |
cd0ff491 | 1909 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
b3821cc5 GFT |
1910 | ctxdesc = txdesc + ((idx + 1) & (mask)); |
1911 | ctxbi = txbi + ((idx + 1) & (mask)); | |
1912 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
1913 | offset_in_page(skb->data), len, hidma); | |
1914 | ||
1915 | } | |
1916 | ||
1917 | static int | |
1918 | jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) | |
1919 | { | |
cd0ff491 | 1920 | if (unlikely(skb_shinfo(skb)->gso_size && |
b3821cc5 GFT |
1921 | skb_header_cloned(skb) && |
1922 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) { | |
1923 | dev_kfree_skb(skb); | |
1924 | return -1; | |
1925 | } | |
1926 | ||
1927 | return 0; | |
1928 | } | |
1929 | ||
1930 | static int | |
94c5ea02 | 1931 | jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags) |
b3821cc5 | 1932 | { |
94c5ea02 | 1933 | *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT); |
cd0ff491 | 1934 | if (*mss) { |
b3821cc5 GFT |
1935 | *flags |= TXFLAG_LSEN; |
1936 | ||
cd0ff491 | 1937 | if (skb->protocol == htons(ETH_P_IP)) { |
b3821cc5 GFT |
1938 | struct iphdr *iph = ip_hdr(skb); |
1939 | ||
1940 | iph->check = 0; | |
cd0ff491 | 1941 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
b3821cc5 GFT |
1942 | iph->daddr, 0, |
1943 | IPPROTO_TCP, | |
1944 | 0); | |
cd0ff491 | 1945 | } else { |
b3821cc5 GFT |
1946 | struct ipv6hdr *ip6h = ipv6_hdr(skb); |
1947 | ||
cd0ff491 | 1948 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, |
b3821cc5 GFT |
1949 | &ip6h->daddr, 0, |
1950 | IPPROTO_TCP, | |
1951 | 0); | |
1952 | } | |
1953 | ||
1954 | return 0; | |
1955 | } | |
1956 | ||
1957 | return 1; | |
1958 | } | |
1959 | ||
1960 | static void | |
cd0ff491 | 1961 | jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags) |
b3821cc5 | 1962 | { |
cd0ff491 GFT |
1963 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
1964 | u8 ip_proto; | |
b3821cc5 GFT |
1965 | |
1966 | switch (skb->protocol) { | |
cd0ff491 | 1967 | case htons(ETH_P_IP): |
b3821cc5 GFT |
1968 | ip_proto = ip_hdr(skb)->protocol; |
1969 | break; | |
cd0ff491 | 1970 | case htons(ETH_P_IPV6): |
b3821cc5 GFT |
1971 | ip_proto = ipv6_hdr(skb)->nexthdr; |
1972 | break; | |
1973 | default: | |
1974 | ip_proto = 0; | |
1975 | break; | |
1976 | } | |
1977 | ||
cd0ff491 | 1978 | switch (ip_proto) { |
b3821cc5 GFT |
1979 | case IPPROTO_TCP: |
1980 | *flags |= TXFLAG_TCPCS; | |
1981 | break; | |
1982 | case IPPROTO_UDP: | |
1983 | *flags |= TXFLAG_UDPCS; | |
1984 | break; | |
1985 | default: | |
52a46ba8 | 1986 | netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n"); |
b3821cc5 GFT |
1987 | break; |
1988 | } | |
1989 | } | |
1990 | } | |
1991 | ||
cd0ff491 | 1992 | static inline void |
94c5ea02 | 1993 | jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags) |
b3821cc5 | 1994 | { |
cd0ff491 | 1995 | if (vlan_tx_tag_present(skb)) { |
b3821cc5 | 1996 | *flags |= TXFLAG_TAGON; |
94c5ea02 | 1997 | *vlan = cpu_to_le16(vlan_tx_tag_get(skb)); |
42b1055e | 1998 | } |
b3821cc5 GFT |
1999 | } |
2000 | ||
2001 | static int | |
94c5ea02 | 2002 | jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) |
b3821cc5 | 2003 | { |
fa97b924 | 2004 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 2005 | struct txdesc *txdesc; |
b3821cc5 | 2006 | struct jme_buffer_info *txbi; |
cd0ff491 | 2007 | u8 flags; |
b3821cc5 | 2008 | |
cd0ff491 | 2009 | txdesc = (struct txdesc *)txring->desc + idx; |
b3821cc5 GFT |
2010 | txbi = txring->bufinf + idx; |
2011 | ||
2012 | txdesc->dw[0] = 0; | |
2013 | txdesc->dw[1] = 0; | |
2014 | txdesc->dw[2] = 0; | |
2015 | txdesc->dw[3] = 0; | |
2016 | txdesc->desc1.pktsize = cpu_to_le16(skb->len); | |
2017 | /* | |
2018 | * Set OWN bit at final. | |
2019 | * When kernel transmit faster than NIC. | |
2020 | * And NIC trying to send this descriptor before we tell | |
2021 | * it to start sending this TX queue. | |
2022 | * Other fields are already filled correctly. | |
2023 | */ | |
2024 | wmb(); | |
2025 | flags = TXFLAG_OWN | TXFLAG_INT; | |
cd0ff491 GFT |
2026 | /* |
2027 | * Set checksum flags while not tso | |
2028 | */ | |
2029 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) | |
2030 | jme_tx_csum(jme, skb, &flags); | |
b3821cc5 | 2031 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); |
94c5ea02 | 2032 | jme_map_tx_skb(jme, skb, idx); |
b3821cc5 GFT |
2033 | txdesc->desc1.flags = flags; |
2034 | /* | |
2035 | * Set tx buffer info after telling NIC to send | |
2036 | * For better tx_clean timing | |
2037 | */ | |
2038 | wmb(); | |
2039 | txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2; | |
2040 | txbi->skb = skb; | |
2041 | txbi->len = skb->len; | |
cd0ff491 GFT |
2042 | txbi->start_xmit = jiffies; |
2043 | if (!txbi->start_xmit) | |
8d27293f | 2044 | txbi->start_xmit = (0UL-1); |
d7699f87 GFT |
2045 | |
2046 | return 0; | |
2047 | } | |
2048 | ||
b3821cc5 GFT |
2049 | static void |
2050 | jme_stop_queue_if_full(struct jme_adapter *jme) | |
2051 | { | |
fa97b924 | 2052 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 GFT |
2053 | struct jme_buffer_info *txbi = txring->bufinf; |
2054 | int idx = atomic_read(&txring->next_to_clean); | |
cdcdc9eb | 2055 | |
cd0ff491 | 2056 | txbi += idx; |
b3821cc5 GFT |
2057 | |
2058 | smp_wmb(); | |
cd0ff491 | 2059 | if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { |
b3821cc5 | 2060 | netif_stop_queue(jme->dev); |
52a46ba8 | 2061 | netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n"); |
b3821cc5 | 2062 | smp_wmb(); |
cd0ff491 GFT |
2063 | if (atomic_read(&txring->nr_free) |
2064 | >= (jme->tx_wake_threshold)) { | |
b3821cc5 | 2065 | netif_wake_queue(jme->dev); |
52a46ba8 | 2066 | netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n"); |
b3821cc5 GFT |
2067 | } |
2068 | } | |
2069 | ||
cd0ff491 | 2070 | if (unlikely(txbi->start_xmit && |
cdcdc9eb GFT |
2071 | (jiffies - txbi->start_xmit) >= TX_TIMEOUT && |
2072 | txbi->skb)) { | |
2073 | netif_stop_queue(jme->dev); | |
52a46ba8 JP |
2074 | netif_info(jme, tx_queued, jme->dev, |
2075 | "TX Queue Stopped %d@%lu\n", idx, jiffies); | |
cdcdc9eb | 2076 | } |
b3821cc5 GFT |
2077 | } |
2078 | ||
3bf61c55 GFT |
2079 | /* |
2080 | * This function is already protected by netif_tx_lock() | |
2081 | */ | |
cd0ff491 | 2082 | |
c97b5740 | 2083 | static netdev_tx_t |
3bf61c55 | 2084 | jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) |
d7699f87 | 2085 | { |
cd0ff491 | 2086 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2087 | int idx; |
d7699f87 | 2088 | |
cd0ff491 | 2089 | if (unlikely(jme_expand_header(jme, skb))) { |
b3821cc5 GFT |
2090 | ++(NET_STAT(jme).tx_dropped); |
2091 | return NETDEV_TX_OK; | |
2092 | } | |
2093 | ||
2094 | idx = jme_alloc_txdesc(jme, skb); | |
79ce639c | 2095 | |
cd0ff491 | 2096 | if (unlikely(idx < 0)) { |
b3821cc5 | 2097 | netif_stop_queue(netdev); |
52a46ba8 JP |
2098 | netif_err(jme, tx_err, jme->dev, |
2099 | "BUG! Tx ring full when queue awake!\n"); | |
d7699f87 | 2100 | |
cd0ff491 | 2101 | return NETDEV_TX_BUSY; |
b3821cc5 GFT |
2102 | } |
2103 | ||
94c5ea02 | 2104 | jme_fill_tx_desc(jme, skb, idx); |
b3821cc5 | 2105 | |
4330c2f2 GFT |
2106 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
2107 | TXCS_SELECT_QUEUE0 | | |
2108 | TXCS_QUEUE0S | | |
2109 | TXCS_ENABLE); | |
d7699f87 | 2110 | |
52a46ba8 JP |
2111 | tx_dbg(jme, "xmit: %d+%d@%lu\n", |
2112 | idx, skb_shinfo(skb)->nr_frags + 2, jiffies); | |
b3821cc5 GFT |
2113 | jme_stop_queue_if_full(jme); |
2114 | ||
cd0ff491 | 2115 | return NETDEV_TX_OK; |
d7699f87 GFT |
2116 | } |
2117 | ||
bb4c5c8c GFT |
2118 | static void |
2119 | jme_set_unicastaddr(struct net_device *netdev) | |
2120 | { | |
2121 | struct jme_adapter *jme = netdev_priv(netdev); | |
2122 | u32 val; | |
2123 | ||
2124 | val = (netdev->dev_addr[3] & 0xff) << 24 | | |
2125 | (netdev->dev_addr[2] & 0xff) << 16 | | |
2126 | (netdev->dev_addr[1] & 0xff) << 8 | | |
2127 | (netdev->dev_addr[0] & 0xff); | |
2128 | jwrite32(jme, JME_RXUMA_LO, val); | |
2129 | val = (netdev->dev_addr[5] & 0xff) << 8 | | |
2130 | (netdev->dev_addr[4] & 0xff); | |
2131 | jwrite32(jme, JME_RXUMA_HI, val); | |
2132 | } | |
2133 | ||
3bf61c55 GFT |
2134 | static int |
2135 | jme_set_macaddr(struct net_device *netdev, void *p) | |
d7699f87 | 2136 | { |
cd0ff491 | 2137 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2138 | struct sockaddr *addr = p; |
d7699f87 | 2139 | |
cd0ff491 | 2140 | if (netif_running(netdev)) |
d7699f87 GFT |
2141 | return -EBUSY; |
2142 | ||
cd0ff491 | 2143 | spin_lock_bh(&jme->macaddr_lock); |
d7699f87 | 2144 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
bb4c5c8c | 2145 | jme_set_unicastaddr(netdev); |
cd0ff491 | 2146 | spin_unlock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
2147 | |
2148 | return 0; | |
2149 | } | |
2150 | ||
3bf61c55 GFT |
2151 | static void |
2152 | jme_set_multi(struct net_device *netdev) | |
d7699f87 | 2153 | { |
3bf61c55 | 2154 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2155 | u32 mc_hash[2] = {}; |
d7699f87 | 2156 | |
cd0ff491 | 2157 | spin_lock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2158 | |
2159 | jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME; | |
d7699f87 | 2160 | |
cd0ff491 | 2161 | if (netdev->flags & IFF_PROMISC) { |
8c198884 | 2162 | jme->reg_rxmcs |= RXMCS_ALLFRAME; |
cd0ff491 | 2163 | } else if (netdev->flags & IFF_ALLMULTI) { |
8c198884 | 2164 | jme->reg_rxmcs |= RXMCS_ALLMULFRAME; |
cd0ff491 | 2165 | } else if (netdev->flags & IFF_MULTICAST) { |
d401cb9a | 2166 | struct netdev_hw_addr *ha; |
3bf61c55 | 2167 | int bit_nr; |
d7699f87 | 2168 | |
8c198884 | 2169 | jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED; |
d401cb9a JP |
2170 | netdev_for_each_mc_addr(ha, netdev) { |
2171 | bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F; | |
cd0ff491 GFT |
2172 | mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); |
2173 | } | |
d7699f87 | 2174 | |
4330c2f2 GFT |
2175 | jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]); |
2176 | jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]); | |
d7699f87 GFT |
2177 | } |
2178 | ||
d7699f87 | 2179 | wmb(); |
8c198884 GFT |
2180 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); |
2181 | ||
cd0ff491 | 2182 | spin_unlock_bh(&jme->rxmcs_lock); |
d7699f87 GFT |
2183 | } |
2184 | ||
3bf61c55 | 2185 | static int |
8c198884 | 2186 | jme_change_mtu(struct net_device *netdev, int new_mtu) |
d7699f87 | 2187 | { |
cd0ff491 | 2188 | struct jme_adapter *jme = netdev_priv(netdev); |
79ce639c | 2189 | |
cd0ff491 | 2190 | if (new_mtu == jme->old_mtu) |
29bdd921 GFT |
2191 | return 0; |
2192 | ||
cd0ff491 GFT |
2193 | if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || |
2194 | ((new_mtu) < IPV6_MIN_MTU)) | |
2195 | return -EINVAL; | |
79ce639c | 2196 | |
cd0ff491 | 2197 | if (new_mtu > 4000) { |
79ce639c GFT |
2198 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2199 | jme->reg_rxcs |= RXCS_FIFOTHNP_64QW; | |
2200 | jme_restart_rx_engine(jme); | |
cd0ff491 | 2201 | } else { |
79ce639c GFT |
2202 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2203 | jme->reg_rxcs |= RXCS_FIFOTHNP_128QW; | |
2204 | jme_restart_rx_engine(jme); | |
2205 | } | |
2206 | ||
cd0ff491 | 2207 | if (new_mtu > 1900) { |
9a08cd10 MM |
2208 | netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | |
2209 | NETIF_F_TSO | NETIF_F_TSO6); | |
cd0ff491 GFT |
2210 | } else { |
2211 | if (test_bit(JME_FLAG_TXCSUM, &jme->flags)) | |
9a08cd10 | 2212 | netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
cd0ff491 | 2213 | if (test_bit(JME_FLAG_TSO, &jme->flags)) |
b3821cc5 | 2214 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
79ce639c GFT |
2215 | } |
2216 | ||
cd0ff491 GFT |
2217 | netdev->mtu = new_mtu; |
2218 | jme_reset_link(jme); | |
79ce639c GFT |
2219 | |
2220 | return 0; | |
d7699f87 GFT |
2221 | } |
2222 | ||
8c198884 GFT |
2223 | static void |
2224 | jme_tx_timeout(struct net_device *netdev) | |
2225 | { | |
cd0ff491 | 2226 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 | 2227 | |
cdcdc9eb GFT |
2228 | jme->phylink = 0; |
2229 | jme_reset_phy_processor(jme); | |
cd0ff491 | 2230 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
cdcdc9eb GFT |
2231 | jme_set_settings(netdev, &jme->old_ecmd); |
2232 | ||
8c198884 | 2233 | /* |
cdcdc9eb | 2234 | * Force to Reset the link again |
8c198884 | 2235 | */ |
29bdd921 | 2236 | jme_reset_link(jme); |
8c198884 GFT |
2237 | } |
2238 | ||
f7f428e4 GFT |
2239 | static inline void jme_pause_rx(struct jme_adapter *jme) |
2240 | { | |
2241 | atomic_dec(&jme->link_changing); | |
2242 | ||
2243 | jme_set_rx_pcc(jme, PCC_OFF); | |
2244 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2245 | JME_NAPI_DISABLE(jme); | |
2246 | } else { | |
2247 | tasklet_disable(&jme->rxclean_task); | |
2248 | tasklet_disable(&jme->rxempty_task); | |
2249 | } | |
2250 | } | |
2251 | ||
2252 | static inline void jme_resume_rx(struct jme_adapter *jme) | |
2253 | { | |
2254 | struct dynpcc_info *dpi = &(jme->dpi); | |
2255 | ||
2256 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2257 | JME_NAPI_ENABLE(jme); | |
2258 | } else { | |
2259 | tasklet_hi_enable(&jme->rxclean_task); | |
2260 | tasklet_hi_enable(&jme->rxempty_task); | |
2261 | } | |
2262 | dpi->cur = PCC_P1; | |
2263 | dpi->attempt = PCC_P1; | |
2264 | dpi->cnt = 0; | |
2265 | jme_set_rx_pcc(jme, PCC_P1); | |
2266 | ||
2267 | atomic_inc(&jme->link_changing); | |
2268 | } | |
2269 | ||
42b1055e GFT |
2270 | static void |
2271 | jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
2272 | { | |
2273 | struct jme_adapter *jme = netdev_priv(netdev); | |
2274 | ||
f7f428e4 | 2275 | jme_pause_rx(jme); |
42b1055e | 2276 | jme->vlgrp = grp; |
f7f428e4 | 2277 | jme_resume_rx(jme); |
42b1055e GFT |
2278 | } |
2279 | ||
3bf61c55 GFT |
2280 | static void |
2281 | jme_get_drvinfo(struct net_device *netdev, | |
2282 | struct ethtool_drvinfo *info) | |
d7699f87 | 2283 | { |
cd0ff491 | 2284 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2285 | |
cd0ff491 GFT |
2286 | strcpy(info->driver, DRV_NAME); |
2287 | strcpy(info->version, DRV_VERSION); | |
2288 | strcpy(info->bus_info, pci_name(jme->pdev)); | |
d7699f87 GFT |
2289 | } |
2290 | ||
8c198884 GFT |
2291 | static int |
2292 | jme_get_regs_len(struct net_device *netdev) | |
2293 | { | |
cd0ff491 | 2294 | return JME_REG_LEN; |
8c198884 GFT |
2295 | } |
2296 | ||
2297 | static void | |
cd0ff491 | 2298 | mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len) |
8c198884 GFT |
2299 | { |
2300 | int i; | |
2301 | ||
cd0ff491 | 2302 | for (i = 0 ; i < len ; i += 4) |
79ce639c | 2303 | p[i >> 2] = jread32(jme, reg + i); |
186fc259 | 2304 | } |
8c198884 | 2305 | |
186fc259 | 2306 | static void |
cd0ff491 | 2307 | mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) |
186fc259 GFT |
2308 | { |
2309 | int i; | |
cd0ff491 | 2310 | u16 *p16 = (u16 *)p; |
186fc259 | 2311 | |
cd0ff491 | 2312 | for (i = 0 ; i < reg_nr ; ++i) |
186fc259 | 2313 | p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i); |
8c198884 GFT |
2314 | } |
2315 | ||
2316 | static void | |
2317 | jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) | |
2318 | { | |
cd0ff491 GFT |
2319 | struct jme_adapter *jme = netdev_priv(netdev); |
2320 | u32 *p32 = (u32 *)p; | |
8c198884 | 2321 | |
186fc259 | 2322 | memset(p, 0xFF, JME_REG_LEN); |
8c198884 GFT |
2323 | |
2324 | regs->version = 1; | |
2325 | mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN); | |
2326 | ||
2327 | p32 += 0x100 >> 2; | |
2328 | mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN); | |
2329 | ||
2330 | p32 += 0x100 >> 2; | |
2331 | mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN); | |
2332 | ||
2333 | p32 += 0x100 >> 2; | |
2334 | mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN); | |
2335 | ||
186fc259 GFT |
2336 | p32 += 0x100 >> 2; |
2337 | mdio_memcpy(jme, p32, JME_PHY_REG_NR); | |
8c198884 GFT |
2338 | } |
2339 | ||
2340 | static int | |
2341 | jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2342 | { | |
2343 | struct jme_adapter *jme = netdev_priv(netdev); | |
2344 | ||
8c198884 GFT |
2345 | ecmd->tx_coalesce_usecs = PCC_TX_TO; |
2346 | ecmd->tx_max_coalesced_frames = PCC_TX_CNT; | |
2347 | ||
cd0ff491 | 2348 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
cdcdc9eb GFT |
2349 | ecmd->use_adaptive_rx_coalesce = false; |
2350 | ecmd->rx_coalesce_usecs = 0; | |
2351 | ecmd->rx_max_coalesced_frames = 0; | |
2352 | return 0; | |
2353 | } | |
2354 | ||
2355 | ecmd->use_adaptive_rx_coalesce = true; | |
2356 | ||
cd0ff491 | 2357 | switch (jme->dpi.cur) { |
8c198884 GFT |
2358 | case PCC_P1: |
2359 | ecmd->rx_coalesce_usecs = PCC_P1_TO; | |
2360 | ecmd->rx_max_coalesced_frames = PCC_P1_CNT; | |
2361 | break; | |
2362 | case PCC_P2: | |
2363 | ecmd->rx_coalesce_usecs = PCC_P2_TO; | |
2364 | ecmd->rx_max_coalesced_frames = PCC_P2_CNT; | |
2365 | break; | |
2366 | case PCC_P3: | |
2367 | ecmd->rx_coalesce_usecs = PCC_P3_TO; | |
2368 | ecmd->rx_max_coalesced_frames = PCC_P3_CNT; | |
2369 | break; | |
2370 | default: | |
2371 | break; | |
2372 | } | |
2373 | ||
2374 | return 0; | |
2375 | } | |
2376 | ||
192570e0 GFT |
2377 | static int |
2378 | jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2379 | { | |
2380 | struct jme_adapter *jme = netdev_priv(netdev); | |
2381 | struct dynpcc_info *dpi = &(jme->dpi); | |
2382 | ||
cd0ff491 | 2383 | if (netif_running(netdev)) |
cdcdc9eb GFT |
2384 | return -EBUSY; |
2385 | ||
c97b5740 GFT |
2386 | if (ecmd->use_adaptive_rx_coalesce && |
2387 | test_bit(JME_FLAG_POLL, &jme->flags)) { | |
cd0ff491 | 2388 | clear_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb GFT |
2389 | jme->jme_rx = netif_rx; |
2390 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
192570e0 GFT |
2391 | dpi->cur = PCC_P1; |
2392 | dpi->attempt = PCC_P1; | |
2393 | dpi->cnt = 0; | |
2394 | jme_set_rx_pcc(jme, PCC_P1); | |
2395 | jme_interrupt_mode(jme); | |
c97b5740 GFT |
2396 | } else if (!(ecmd->use_adaptive_rx_coalesce) && |
2397 | !(test_bit(JME_FLAG_POLL, &jme->flags))) { | |
cd0ff491 | 2398 | set_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb GFT |
2399 | jme->jme_rx = netif_receive_skb; |
2400 | jme->jme_vlan_rx = vlan_hwaccel_receive_skb; | |
192570e0 GFT |
2401 | jme_interrupt_mode(jme); |
2402 | } | |
2403 | ||
2404 | return 0; | |
2405 | } | |
2406 | ||
8c198884 GFT |
2407 | static void |
2408 | jme_get_pauseparam(struct net_device *netdev, | |
2409 | struct ethtool_pauseparam *ecmd) | |
2410 | { | |
2411 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2412 | u32 val; |
8c198884 GFT |
2413 | |
2414 | ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0; | |
2415 | ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0; | |
2416 | ||
cd0ff491 GFT |
2417 | spin_lock_bh(&jme->phy_lock); |
2418 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2419 | spin_unlock_bh(&jme->phy_lock); | |
b3821cc5 GFT |
2420 | |
2421 | ecmd->autoneg = | |
2422 | (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0; | |
8c198884 GFT |
2423 | } |
2424 | ||
2425 | static int | |
2426 | jme_set_pauseparam(struct net_device *netdev, | |
2427 | struct ethtool_pauseparam *ecmd) | |
2428 | { | |
2429 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2430 | u32 val; |
8c198884 | 2431 | |
cd0ff491 | 2432 | if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^ |
8c198884 GFT |
2433 | (ecmd->tx_pause != 0)) { |
2434 | ||
cd0ff491 | 2435 | if (ecmd->tx_pause) |
8c198884 GFT |
2436 | jme->reg_txpfc |= TXPFC_PF_EN; |
2437 | else | |
2438 | jme->reg_txpfc &= ~TXPFC_PF_EN; | |
2439 | ||
2440 | jwrite32(jme, JME_TXPFC, jme->reg_txpfc); | |
2441 | } | |
2442 | ||
cd0ff491 GFT |
2443 | spin_lock_bh(&jme->rxmcs_lock); |
2444 | if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^ | |
8c198884 GFT |
2445 | (ecmd->rx_pause != 0)) { |
2446 | ||
cd0ff491 | 2447 | if (ecmd->rx_pause) |
8c198884 GFT |
2448 | jme->reg_rxmcs |= RXMCS_FLOWCTRL; |
2449 | else | |
2450 | jme->reg_rxmcs &= ~RXMCS_FLOWCTRL; | |
2451 | ||
2452 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2453 | } | |
cd0ff491 | 2454 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 | 2455 | |
cd0ff491 GFT |
2456 | spin_lock_bh(&jme->phy_lock); |
2457 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2458 | if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^ | |
8c198884 GFT |
2459 | (ecmd->autoneg != 0)) { |
2460 | ||
cd0ff491 | 2461 | if (ecmd->autoneg) |
8c198884 GFT |
2462 | val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
2463 | else | |
2464 | val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
2465 | ||
b3821cc5 GFT |
2466 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, |
2467 | MII_ADVERTISE, val); | |
8c198884 | 2468 | } |
cd0ff491 | 2469 | spin_unlock_bh(&jme->phy_lock); |
8c198884 GFT |
2470 | |
2471 | return 0; | |
2472 | } | |
2473 | ||
29bdd921 GFT |
2474 | static void |
2475 | jme_get_wol(struct net_device *netdev, | |
2476 | struct ethtool_wolinfo *wol) | |
2477 | { | |
2478 | struct jme_adapter *jme = netdev_priv(netdev); | |
2479 | ||
2480 | wol->supported = WAKE_MAGIC | WAKE_PHY; | |
2481 | ||
2482 | wol->wolopts = 0; | |
2483 | ||
cd0ff491 | 2484 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
29bdd921 GFT |
2485 | wol->wolopts |= WAKE_PHY; |
2486 | ||
cd0ff491 | 2487 | if (jme->reg_pmcs & PMCS_MFEN) |
29bdd921 GFT |
2488 | wol->wolopts |= WAKE_MAGIC; |
2489 | ||
2490 | } | |
2491 | ||
2492 | static int | |
2493 | jme_set_wol(struct net_device *netdev, | |
2494 | struct ethtool_wolinfo *wol) | |
2495 | { | |
2496 | struct jme_adapter *jme = netdev_priv(netdev); | |
2497 | ||
cd0ff491 | 2498 | if (wol->wolopts & (WAKE_MAGICSECURE | |
29bdd921 GFT |
2499 | WAKE_UCAST | |
2500 | WAKE_MCAST | | |
2501 | WAKE_BCAST | | |
2502 | WAKE_ARP)) | |
2503 | return -EOPNOTSUPP; | |
2504 | ||
2505 | jme->reg_pmcs = 0; | |
2506 | ||
cd0ff491 | 2507 | if (wol->wolopts & WAKE_PHY) |
29bdd921 GFT |
2508 | jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN; |
2509 | ||
cd0ff491 | 2510 | if (wol->wolopts & WAKE_MAGIC) |
29bdd921 GFT |
2511 | jme->reg_pmcs |= PMCS_MFEN; |
2512 | ||
cd0ff491 | 2513 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
42b1055e | 2514 | |
29bdd921 GFT |
2515 | return 0; |
2516 | } | |
b3821cc5 | 2517 | |
3bf61c55 GFT |
2518 | static int |
2519 | jme_get_settings(struct net_device *netdev, | |
2520 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2521 | { |
2522 | struct jme_adapter *jme = netdev_priv(netdev); | |
2523 | int rc; | |
8c198884 | 2524 | |
cd0ff491 | 2525 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2526 | rc = mii_ethtool_gset(&(jme->mii_if), ecmd); |
cd0ff491 | 2527 | spin_unlock_bh(&jme->phy_lock); |
d7699f87 GFT |
2528 | return rc; |
2529 | } | |
2530 | ||
3bf61c55 GFT |
2531 | static int |
2532 | jme_set_settings(struct net_device *netdev, | |
2533 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2534 | { |
2535 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2536 | int rc, fdc = 0; |
fcf45b4c | 2537 | |
cd0ff491 | 2538 | if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE) |
8c198884 GFT |
2539 | return -EINVAL; |
2540 | ||
f79361a6 GFT |
2541 | /* |
2542 | * Check If user changed duplex only while force_media. | |
2543 | * Hardware would not generate link change interrupt. | |
2544 | */ | |
cd0ff491 | 2545 | if (jme->mii_if.force_media && |
79ce639c GFT |
2546 | ecmd->autoneg != AUTONEG_ENABLE && |
2547 | (jme->mii_if.full_duplex != ecmd->duplex)) | |
2548 | fdc = 1; | |
2549 | ||
cd0ff491 | 2550 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2551 | rc = mii_ethtool_sset(&(jme->mii_if), ecmd); |
cd0ff491 | 2552 | spin_unlock_bh(&jme->phy_lock); |
fcf45b4c | 2553 | |
cd0ff491 | 2554 | if (!rc) { |
f79361a6 GFT |
2555 | if (fdc) |
2556 | jme_reset_link(jme); | |
29bdd921 | 2557 | jme->old_ecmd = *ecmd; |
43e4651b GFT |
2558 | set_bit(JME_FLAG_SSET, &jme->flags); |
2559 | } | |
2560 | ||
2561 | return rc; | |
2562 | } | |
2563 | ||
2564 | static int | |
2565 | jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
2566 | { | |
2567 | int rc; | |
2568 | struct jme_adapter *jme = netdev_priv(netdev); | |
2569 | struct mii_ioctl_data *mii_data = if_mii(rq); | |
2570 | unsigned int duplex_chg; | |
2571 | ||
2572 | if (cmd == SIOCSMIIREG) { | |
2573 | u16 val = mii_data->val_in; | |
2574 | if (!(val & (BMCR_RESET|BMCR_ANENABLE)) && | |
2575 | (val & BMCR_SPEED1000)) | |
2576 | return -EINVAL; | |
2577 | } | |
2578 | ||
2579 | spin_lock_bh(&jme->phy_lock); | |
2580 | rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg); | |
2581 | spin_unlock_bh(&jme->phy_lock); | |
2582 | ||
2583 | if (!rc && (cmd == SIOCSMIIREG)) { | |
2584 | if (duplex_chg) | |
2585 | jme_reset_link(jme); | |
2586 | jme_get_settings(netdev, &jme->old_ecmd); | |
2587 | set_bit(JME_FLAG_SSET, &jme->flags); | |
29bdd921 GFT |
2588 | } |
2589 | ||
d7699f87 GFT |
2590 | return rc; |
2591 | } | |
2592 | ||
cd0ff491 | 2593 | static u32 |
3bf61c55 GFT |
2594 | jme_get_link(struct net_device *netdev) |
2595 | { | |
d7699f87 GFT |
2596 | struct jme_adapter *jme = netdev_priv(netdev); |
2597 | return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP; | |
2598 | } | |
2599 | ||
8c198884 | 2600 | static u32 |
cd0ff491 GFT |
2601 | jme_get_msglevel(struct net_device *netdev) |
2602 | { | |
2603 | struct jme_adapter *jme = netdev_priv(netdev); | |
2604 | return jme->msg_enable; | |
2605 | } | |
2606 | ||
2607 | static void | |
2608 | jme_set_msglevel(struct net_device *netdev, u32 value) | |
8c198884 | 2609 | { |
cd0ff491 GFT |
2610 | struct jme_adapter *jme = netdev_priv(netdev); |
2611 | jme->msg_enable = value; | |
2612 | } | |
8c198884 | 2613 | |
cd0ff491 GFT |
2614 | static u32 |
2615 | jme_get_rx_csum(struct net_device *netdev) | |
2616 | { | |
2617 | struct jme_adapter *jme = netdev_priv(netdev); | |
8c198884 GFT |
2618 | return jme->reg_rxmcs & RXMCS_CHECKSUM; |
2619 | } | |
2620 | ||
2621 | static int | |
2622 | jme_set_rx_csum(struct net_device *netdev, u32 on) | |
2623 | { | |
cd0ff491 | 2624 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2625 | |
cd0ff491 GFT |
2626 | spin_lock_bh(&jme->rxmcs_lock); |
2627 | if (on) | |
8c198884 GFT |
2628 | jme->reg_rxmcs |= RXMCS_CHECKSUM; |
2629 | else | |
2630 | jme->reg_rxmcs &= ~RXMCS_CHECKSUM; | |
2631 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
cd0ff491 | 2632 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2633 | |
2634 | return 0; | |
2635 | } | |
2636 | ||
2637 | static int | |
2638 | jme_set_tx_csum(struct net_device *netdev, u32 on) | |
2639 | { | |
cd0ff491 | 2640 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2641 | |
cd0ff491 GFT |
2642 | if (on) { |
2643 | set_bit(JME_FLAG_TXCSUM, &jme->flags); | |
2644 | if (netdev->mtu <= 1900) | |
9a08cd10 MM |
2645 | netdev->features |= |
2646 | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; | |
cd0ff491 GFT |
2647 | } else { |
2648 | clear_bit(JME_FLAG_TXCSUM, &jme->flags); | |
9a08cd10 MM |
2649 | netdev->features &= |
2650 | ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); | |
b3821cc5 | 2651 | } |
8c198884 GFT |
2652 | |
2653 | return 0; | |
2654 | } | |
2655 | ||
b3821cc5 GFT |
2656 | static int |
2657 | jme_set_tso(struct net_device *netdev, u32 on) | |
2658 | { | |
cd0ff491 | 2659 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2660 | |
cd0ff491 GFT |
2661 | if (on) { |
2662 | set_bit(JME_FLAG_TSO, &jme->flags); | |
2663 | if (netdev->mtu <= 1900) | |
b3821cc5 | 2664 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
cd0ff491 GFT |
2665 | } else { |
2666 | clear_bit(JME_FLAG_TSO, &jme->flags); | |
2667 | netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); | |
b3821cc5 GFT |
2668 | } |
2669 | ||
cd0ff491 | 2670 | return 0; |
b3821cc5 GFT |
2671 | } |
2672 | ||
8c198884 GFT |
2673 | static int |
2674 | jme_nway_reset(struct net_device *netdev) | |
2675 | { | |
cd0ff491 | 2676 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 GFT |
2677 | jme_restart_an(jme); |
2678 | return 0; | |
2679 | } | |
2680 | ||
cd0ff491 | 2681 | static u8 |
186fc259 GFT |
2682 | jme_smb_read(struct jme_adapter *jme, unsigned int addr) |
2683 | { | |
cd0ff491 | 2684 | u32 val; |
186fc259 GFT |
2685 | int to; |
2686 | ||
2687 | val = jread32(jme, JME_SMBCSR); | |
2688 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2689 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2690 | msleep(1); |
2691 | val = jread32(jme, JME_SMBCSR); | |
2692 | } | |
cd0ff491 | 2693 | if (!to) { |
52a46ba8 | 2694 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2695 | return 0xFF; |
2696 | } | |
2697 | ||
2698 | jwrite32(jme, JME_SMBINTF, | |
2699 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2700 | SMBINTF_HWRWN_READ | | |
2701 | SMBINTF_HWCMD); | |
2702 | ||
2703 | val = jread32(jme, JME_SMBINTF); | |
2704 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2705 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2706 | msleep(1); |
2707 | val = jread32(jme, JME_SMBINTF); | |
2708 | } | |
cd0ff491 | 2709 | if (!to) { |
52a46ba8 | 2710 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2711 | return 0xFF; |
2712 | } | |
2713 | ||
2714 | return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT; | |
2715 | } | |
2716 | ||
2717 | static void | |
cd0ff491 | 2718 | jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data) |
186fc259 | 2719 | { |
cd0ff491 | 2720 | u32 val; |
186fc259 GFT |
2721 | int to; |
2722 | ||
2723 | val = jread32(jme, JME_SMBCSR); | |
2724 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2725 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2726 | msleep(1); |
2727 | val = jread32(jme, JME_SMBCSR); | |
2728 | } | |
cd0ff491 | 2729 | if (!to) { |
52a46ba8 | 2730 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2731 | return; |
2732 | } | |
2733 | ||
2734 | jwrite32(jme, JME_SMBINTF, | |
2735 | ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) | | |
2736 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2737 | SMBINTF_HWRWN_WRITE | | |
2738 | SMBINTF_HWCMD); | |
2739 | ||
2740 | val = jread32(jme, JME_SMBINTF); | |
2741 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2742 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2743 | msleep(1); |
2744 | val = jread32(jme, JME_SMBINTF); | |
2745 | } | |
cd0ff491 | 2746 | if (!to) { |
52a46ba8 | 2747 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2748 | return; |
2749 | } | |
2750 | ||
2751 | mdelay(2); | |
2752 | } | |
2753 | ||
2754 | static int | |
2755 | jme_get_eeprom_len(struct net_device *netdev) | |
2756 | { | |
cd0ff491 GFT |
2757 | struct jme_adapter *jme = netdev_priv(netdev); |
2758 | u32 val; | |
186fc259 | 2759 | val = jread32(jme, JME_SMBCSR); |
cd0ff491 | 2760 | return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0; |
186fc259 GFT |
2761 | } |
2762 | ||
2763 | static int | |
2764 | jme_get_eeprom(struct net_device *netdev, | |
2765 | struct ethtool_eeprom *eeprom, u8 *data) | |
2766 | { | |
cd0ff491 | 2767 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2768 | int i, offset = eeprom->offset, len = eeprom->len; |
2769 | ||
2770 | /* | |
8d27293f | 2771 | * ethtool will check the boundary for us |
186fc259 GFT |
2772 | */ |
2773 | eeprom->magic = JME_EEPROM_MAGIC; | |
cd0ff491 | 2774 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2775 | data[i] = jme_smb_read(jme, i + offset); |
2776 | ||
2777 | return 0; | |
2778 | } | |
2779 | ||
2780 | static int | |
2781 | jme_set_eeprom(struct net_device *netdev, | |
2782 | struct ethtool_eeprom *eeprom, u8 *data) | |
2783 | { | |
cd0ff491 | 2784 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2785 | int i, offset = eeprom->offset, len = eeprom->len; |
2786 | ||
2787 | if (eeprom->magic != JME_EEPROM_MAGIC) | |
2788 | return -EINVAL; | |
2789 | ||
2790 | /* | |
8d27293f | 2791 | * ethtool will check the boundary for us |
186fc259 | 2792 | */ |
cd0ff491 | 2793 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2794 | jme_smb_write(jme, i + offset, data[i]); |
2795 | ||
2796 | return 0; | |
2797 | } | |
2798 | ||
d7699f87 | 2799 | static const struct ethtool_ops jme_ethtool_ops = { |
cd0ff491 | 2800 | .get_drvinfo = jme_get_drvinfo, |
8c198884 GFT |
2801 | .get_regs_len = jme_get_regs_len, |
2802 | .get_regs = jme_get_regs, | |
2803 | .get_coalesce = jme_get_coalesce, | |
192570e0 | 2804 | .set_coalesce = jme_set_coalesce, |
cd0ff491 GFT |
2805 | .get_pauseparam = jme_get_pauseparam, |
2806 | .set_pauseparam = jme_set_pauseparam, | |
29bdd921 GFT |
2807 | .get_wol = jme_get_wol, |
2808 | .set_wol = jme_set_wol, | |
d7699f87 GFT |
2809 | .get_settings = jme_get_settings, |
2810 | .set_settings = jme_set_settings, | |
2811 | .get_link = jme_get_link, | |
cd0ff491 GFT |
2812 | .get_msglevel = jme_get_msglevel, |
2813 | .set_msglevel = jme_set_msglevel, | |
8c198884 GFT |
2814 | .get_rx_csum = jme_get_rx_csum, |
2815 | .set_rx_csum = jme_set_rx_csum, | |
2816 | .set_tx_csum = jme_set_tx_csum, | |
b3821cc5 GFT |
2817 | .set_tso = jme_set_tso, |
2818 | .set_sg = ethtool_op_set_sg, | |
8c198884 | 2819 | .nway_reset = jme_nway_reset, |
186fc259 GFT |
2820 | .get_eeprom_len = jme_get_eeprom_len, |
2821 | .get_eeprom = jme_get_eeprom, | |
2822 | .set_eeprom = jme_set_eeprom, | |
d7699f87 GFT |
2823 | }; |
2824 | ||
3bf61c55 GFT |
2825 | static int |
2826 | jme_pci_dma64(struct pci_dev *pdev) | |
d7699f87 | 2827 | { |
94c5ea02 | 2828 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
fa97b924 GFT |
2829 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) |
2830 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) | |
3bf61c55 GFT |
2831 | return 1; |
2832 | ||
94c5ea02 | 2833 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
fa97b924 GFT |
2834 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))) |
2835 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40))) | |
8c198884 GFT |
2836 | return 1; |
2837 | ||
fa97b924 GFT |
2838 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) |
2839 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) | |
3bf61c55 GFT |
2840 | return 0; |
2841 | ||
2842 | return -1; | |
2843 | } | |
2844 | ||
cd0ff491 | 2845 | static inline void |
cdcdc9eb GFT |
2846 | jme_phy_init(struct jme_adapter *jme) |
2847 | { | |
cd0ff491 | 2848 | u16 reg26; |
cdcdc9eb GFT |
2849 | |
2850 | reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26); | |
2851 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000); | |
2852 | } | |
2853 | ||
cd0ff491 | 2854 | static inline void |
cdcdc9eb | 2855 | jme_check_hw_ver(struct jme_adapter *jme) |
42b1055e | 2856 | { |
cd0ff491 | 2857 | u32 chipmode; |
cdcdc9eb GFT |
2858 | |
2859 | chipmode = jread32(jme, JME_CHIPMODE); | |
2860 | ||
2861 | jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT; | |
e882564f | 2862 | jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT; |
4400ae98 GFT |
2863 | jme->chip_main_rev = jme->chiprev & 0xF; |
2864 | jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF; | |
42b1055e GFT |
2865 | } |
2866 | ||
94c5ea02 GFT |
2867 | static const struct net_device_ops jme_netdev_ops = { |
2868 | .ndo_open = jme_open, | |
2869 | .ndo_stop = jme_close, | |
2870 | .ndo_validate_addr = eth_validate_addr, | |
43e4651b | 2871 | .ndo_do_ioctl = jme_ioctl, |
94c5ea02 GFT |
2872 | .ndo_start_xmit = jme_start_xmit, |
2873 | .ndo_set_mac_address = jme_set_macaddr, | |
2874 | .ndo_set_multicast_list = jme_set_multi, | |
2875 | .ndo_change_mtu = jme_change_mtu, | |
2876 | .ndo_tx_timeout = jme_tx_timeout, | |
2877 | .ndo_vlan_rx_register = jme_vlan_rx_register, | |
2878 | }; | |
2879 | ||
3bf61c55 GFT |
2880 | static int __devinit |
2881 | jme_init_one(struct pci_dev *pdev, | |
2882 | const struct pci_device_id *ent) | |
2883 | { | |
cdcdc9eb | 2884 | int rc = 0, using_dac, i; |
d7699f87 GFT |
2885 | struct net_device *netdev; |
2886 | struct jme_adapter *jme; | |
cd0ff491 GFT |
2887 | u16 bmcr, bmsr; |
2888 | u32 apmc; | |
d7699f87 GFT |
2889 | |
2890 | /* | |
2891 | * set up PCI device basics | |
2892 | */ | |
4330c2f2 | 2893 | rc = pci_enable_device(pdev); |
cd0ff491 | 2894 | if (rc) { |
52a46ba8 | 2895 | pr_err("Cannot enable PCI device\n"); |
4330c2f2 GFT |
2896 | goto err_out; |
2897 | } | |
d7699f87 | 2898 | |
3bf61c55 | 2899 | using_dac = jme_pci_dma64(pdev); |
cd0ff491 | 2900 | if (using_dac < 0) { |
52a46ba8 | 2901 | pr_err("Cannot set PCI DMA Mask\n"); |
3bf61c55 GFT |
2902 | rc = -EIO; |
2903 | goto err_out_disable_pdev; | |
2904 | } | |
2905 | ||
cd0ff491 | 2906 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
52a46ba8 | 2907 | pr_err("No PCI resource region found\n"); |
4330c2f2 GFT |
2908 | rc = -ENOMEM; |
2909 | goto err_out_disable_pdev; | |
2910 | } | |
d7699f87 | 2911 | |
4330c2f2 | 2912 | rc = pci_request_regions(pdev, DRV_NAME); |
cd0ff491 | 2913 | if (rc) { |
52a46ba8 | 2914 | pr_err("Cannot obtain PCI resource region\n"); |
4330c2f2 GFT |
2915 | goto err_out_disable_pdev; |
2916 | } | |
d7699f87 GFT |
2917 | |
2918 | pci_set_master(pdev); | |
2919 | ||
2920 | /* | |
2921 | * alloc and init net device | |
2922 | */ | |
3bf61c55 | 2923 | netdev = alloc_etherdev(sizeof(*jme)); |
cd0ff491 | 2924 | if (!netdev) { |
52a46ba8 | 2925 | pr_err("Cannot allocate netdev structure\n"); |
4330c2f2 GFT |
2926 | rc = -ENOMEM; |
2927 | goto err_out_release_regions; | |
d7699f87 | 2928 | } |
94c5ea02 | 2929 | netdev->netdev_ops = &jme_netdev_ops; |
d7699f87 | 2930 | netdev->ethtool_ops = &jme_ethtool_ops; |
8c198884 | 2931 | netdev->watchdog_timeo = TX_TIMEOUT; |
9a08cd10 MM |
2932 | netdev->features = NETIF_F_IP_CSUM | |
2933 | NETIF_F_IPV6_CSUM | | |
b3821cc5 GFT |
2934 | NETIF_F_SG | |
2935 | NETIF_F_TSO | | |
2936 | NETIF_F_TSO6 | | |
42b1055e GFT |
2937 | NETIF_F_HW_VLAN_TX | |
2938 | NETIF_F_HW_VLAN_RX; | |
cd0ff491 | 2939 | if (using_dac) |
8c198884 | 2940 | netdev->features |= NETIF_F_HIGHDMA; |
d7699f87 GFT |
2941 | |
2942 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
2943 | pci_set_drvdata(pdev, netdev); | |
2944 | ||
2945 | /* | |
2946 | * init adapter info | |
2947 | */ | |
2948 | jme = netdev_priv(netdev); | |
2949 | jme->pdev = pdev; | |
2950 | jme->dev = netdev; | |
cdcdc9eb GFT |
2951 | jme->jme_rx = netif_rx; |
2952 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
29bdd921 | 2953 | jme->old_mtu = netdev->mtu = 1500; |
fcf45b4c | 2954 | jme->phylink = 0; |
b3821cc5 GFT |
2955 | jme->tx_ring_size = 1 << 10; |
2956 | jme->tx_ring_mask = jme->tx_ring_size - 1; | |
2957 | jme->tx_wake_threshold = 1 << 9; | |
2958 | jme->rx_ring_size = 1 << 9; | |
2959 | jme->rx_ring_mask = jme->rx_ring_size - 1; | |
cd0ff491 | 2960 | jme->msg_enable = JME_DEF_MSG_ENABLE; |
d7699f87 GFT |
2961 | jme->regs = ioremap(pci_resource_start(pdev, 0), |
2962 | pci_resource_len(pdev, 0)); | |
4330c2f2 | 2963 | if (!(jme->regs)) { |
52a46ba8 | 2964 | pr_err("Mapping PCI resource region error\n"); |
d7699f87 GFT |
2965 | rc = -ENOMEM; |
2966 | goto err_out_free_netdev; | |
2967 | } | |
4330c2f2 | 2968 | |
cd0ff491 GFT |
2969 | if (no_pseudohp) { |
2970 | apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN; | |
2971 | jwrite32(jme, JME_APMC, apmc); | |
2972 | } else if (force_pseudohp) { | |
2973 | apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN; | |
2974 | jwrite32(jme, JME_APMC, apmc); | |
2975 | } | |
2976 | ||
cdcdc9eb | 2977 | NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2) |
192570e0 | 2978 | |
d7699f87 | 2979 | spin_lock_init(&jme->phy_lock); |
fcf45b4c | 2980 | spin_lock_init(&jme->macaddr_lock); |
8c198884 | 2981 | spin_lock_init(&jme->rxmcs_lock); |
fcf45b4c | 2982 | |
fcf45b4c GFT |
2983 | atomic_set(&jme->link_changing, 1); |
2984 | atomic_set(&jme->rx_cleaning, 1); | |
2985 | atomic_set(&jme->tx_cleaning, 1); | |
192570e0 | 2986 | atomic_set(&jme->rx_empty, 1); |
fcf45b4c | 2987 | |
79ce639c | 2988 | tasklet_init(&jme->pcc_task, |
c97b5740 | 2989 | jme_pcc_tasklet, |
79ce639c | 2990 | (unsigned long) jme); |
4330c2f2 | 2991 | tasklet_init(&jme->linkch_task, |
c97b5740 | 2992 | jme_link_change_tasklet, |
4330c2f2 GFT |
2993 | (unsigned long) jme); |
2994 | tasklet_init(&jme->txclean_task, | |
c97b5740 | 2995 | jme_tx_clean_tasklet, |
4330c2f2 GFT |
2996 | (unsigned long) jme); |
2997 | tasklet_init(&jme->rxclean_task, | |
c97b5740 | 2998 | jme_rx_clean_tasklet, |
4330c2f2 | 2999 | (unsigned long) jme); |
fcf45b4c | 3000 | tasklet_init(&jme->rxempty_task, |
c97b5740 | 3001 | jme_rx_empty_tasklet, |
fcf45b4c | 3002 | (unsigned long) jme); |
fa97b924 | 3003 | tasklet_disable_nosync(&jme->linkch_task); |
cd0ff491 GFT |
3004 | tasklet_disable_nosync(&jme->txclean_task); |
3005 | tasklet_disable_nosync(&jme->rxclean_task); | |
3006 | tasklet_disable_nosync(&jme->rxempty_task); | |
8c198884 GFT |
3007 | jme->dpi.cur = PCC_P1; |
3008 | ||
cd0ff491 | 3009 | jme->reg_ghc = 0; |
79ce639c | 3010 | jme->reg_rxcs = RXCS_DEFAULT; |
8c198884 GFT |
3011 | jme->reg_rxmcs = RXMCS_DEFAULT; |
3012 | jme->reg_txpfc = 0; | |
47220951 | 3013 | jme->reg_pmcs = PMCS_MFEN; |
ed830419 | 3014 | jme->reg_gpreg1 = GPREG1_DEFAULT; |
cd0ff491 GFT |
3015 | set_bit(JME_FLAG_TXCSUM, &jme->flags); |
3016 | set_bit(JME_FLAG_TSO, &jme->flags); | |
192570e0 | 3017 | |
fcf45b4c GFT |
3018 | /* |
3019 | * Get Max Read Req Size from PCI Config Space | |
3020 | */ | |
cd0ff491 GFT |
3021 | pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs); |
3022 | jme->mrrs &= PCI_DCSR_MRRS_MASK; | |
3023 | switch (jme->mrrs) { | |
3024 | case MRRS_128B: | |
3025 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; | |
3026 | break; | |
3027 | case MRRS_256B: | |
3028 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; | |
3029 | break; | |
3030 | default: | |
3031 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; | |
3032 | break; | |
06527f9b | 3033 | } |
fcf45b4c | 3034 | |
d7699f87 | 3035 | /* |
cdcdc9eb | 3036 | * Must check before reset_mac_processor |
d7699f87 | 3037 | */ |
cdcdc9eb GFT |
3038 | jme_check_hw_ver(jme); |
3039 | jme->mii_if.dev = netdev; | |
cd0ff491 | 3040 | if (jme->fpgaver) { |
cdcdc9eb | 3041 | jme->mii_if.phy_id = 0; |
cd0ff491 | 3042 | for (i = 1 ; i < 32 ; ++i) { |
cdcdc9eb GFT |
3043 | bmcr = jme_mdio_read(netdev, i, MII_BMCR); |
3044 | bmsr = jme_mdio_read(netdev, i, MII_BMSR); | |
cd0ff491 | 3045 | if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { |
cdcdc9eb GFT |
3046 | jme->mii_if.phy_id = i; |
3047 | break; | |
3048 | } | |
3049 | } | |
3050 | ||
cd0ff491 | 3051 | if (!jme->mii_if.phy_id) { |
cdcdc9eb | 3052 | rc = -EIO; |
52a46ba8 JP |
3053 | pr_err("Can not find phy_id\n"); |
3054 | goto err_out_unmap; | |
cdcdc9eb GFT |
3055 | } |
3056 | ||
3057 | jme->reg_ghc |= GHC_LINK_POLL; | |
cd0ff491 | 3058 | } else { |
cdcdc9eb GFT |
3059 | jme->mii_if.phy_id = 1; |
3060 | } | |
cd0ff491 | 3061 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
3062 | jme->mii_if.supports_gmii = true; |
3063 | else | |
3064 | jme->mii_if.supports_gmii = false; | |
43e4651b GFT |
3065 | jme->mii_if.phy_id_mask = 0x1F; |
3066 | jme->mii_if.reg_num_mask = 0x1F; | |
cdcdc9eb GFT |
3067 | jme->mii_if.mdio_read = jme_mdio_read; |
3068 | jme->mii_if.mdio_write = jme_mdio_write; | |
3069 | ||
d7699f87 | 3070 | jme_clear_pm(jme); |
06168a20 | 3071 | jme_set_phyfifo_5level(jme); |
4400ae98 | 3072 | pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev); |
cd0ff491 | 3073 | if (!jme->fpgaver) |
cdcdc9eb | 3074 | jme_phy_init(jme); |
42b1055e | 3075 | jme_phy_off(jme); |
cdcdc9eb GFT |
3076 | |
3077 | /* | |
3078 | * Reset MAC processor and reload EEPROM for MAC Address | |
3079 | */ | |
d7699f87 | 3080 | jme_reset_mac_processor(jme); |
4330c2f2 | 3081 | rc = jme_reload_eeprom(jme); |
cd0ff491 | 3082 | if (rc) { |
52a46ba8 | 3083 | pr_err("Reload eeprom for reading MAC Address error\n"); |
fa97b924 | 3084 | goto err_out_unmap; |
4330c2f2 | 3085 | } |
d7699f87 GFT |
3086 | jme_load_macaddr(netdev); |
3087 | ||
d7699f87 GFT |
3088 | /* |
3089 | * Tell stack that we are not ready to work until open() | |
3090 | */ | |
3091 | netif_carrier_off(netdev); | |
d7699f87 | 3092 | |
4330c2f2 | 3093 | rc = register_netdev(netdev); |
cd0ff491 | 3094 | if (rc) { |
52a46ba8 | 3095 | pr_err("Cannot register net device\n"); |
fa97b924 | 3096 | goto err_out_unmap; |
4330c2f2 | 3097 | } |
d7699f87 | 3098 | |
4400ae98 | 3099 | netif_info(jme, probe, jme->dev, "%s%s chiprev:%x pcirev:%x macaddr:%pM\n", |
c97b5740 GFT |
3100 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ? |
3101 | "JMC250 Gigabit Ethernet" : | |
3102 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ? | |
3103 | "JMC260 Fast Ethernet" : "Unknown", | |
3104 | (jme->fpgaver != 0) ? " (FPGA)" : "", | |
3105 | (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev, | |
4400ae98 | 3106 | jme->pcirev, netdev->dev_addr); |
d7699f87 GFT |
3107 | |
3108 | return 0; | |
3109 | ||
3110 | err_out_unmap: | |
3111 | iounmap(jme->regs); | |
3112 | err_out_free_netdev: | |
3113 | pci_set_drvdata(pdev, NULL); | |
3114 | free_netdev(netdev); | |
4330c2f2 GFT |
3115 | err_out_release_regions: |
3116 | pci_release_regions(pdev); | |
d7699f87 | 3117 | err_out_disable_pdev: |
cd0ff491 | 3118 | pci_disable_device(pdev); |
d7699f87 | 3119 | err_out: |
4330c2f2 | 3120 | return rc; |
d7699f87 GFT |
3121 | } |
3122 | ||
3bf61c55 GFT |
3123 | static void __devexit |
3124 | jme_remove_one(struct pci_dev *pdev) | |
3125 | { | |
d7699f87 GFT |
3126 | struct net_device *netdev = pci_get_drvdata(pdev); |
3127 | struct jme_adapter *jme = netdev_priv(netdev); | |
3128 | ||
3129 | unregister_netdev(netdev); | |
3130 | iounmap(jme->regs); | |
3131 | pci_set_drvdata(pdev, NULL); | |
3132 | free_netdev(netdev); | |
3133 | pci_release_regions(pdev); | |
3134 | pci_disable_device(pdev); | |
3135 | ||
3136 | } | |
3137 | ||
fba4bc0c GFT |
3138 | static void |
3139 | jme_shutdown(struct pci_dev *pdev) | |
3140 | { | |
3141 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3142 | struct jme_adapter *jme = netdev_priv(netdev); | |
3143 | ||
3144 | jme_powersave_phy(jme); | |
3145 | pci_pme_active(pdev, true); | |
3146 | } | |
3147 | ||
9b9d55de | 3148 | #ifdef CONFIG_PM |
29bdd921 GFT |
3149 | static int |
3150 | jme_suspend(struct pci_dev *pdev, pm_message_t state) | |
3151 | { | |
3152 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3153 | struct jme_adapter *jme = netdev_priv(netdev); | |
29bdd921 GFT |
3154 | |
3155 | atomic_dec(&jme->link_changing); | |
3156 | ||
3157 | netif_device_detach(netdev); | |
3158 | netif_stop_queue(netdev); | |
3159 | jme_stop_irq(jme); | |
29bdd921 | 3160 | |
cd0ff491 GFT |
3161 | tasklet_disable(&jme->txclean_task); |
3162 | tasklet_disable(&jme->rxclean_task); | |
3163 | tasklet_disable(&jme->rxempty_task); | |
3164 | ||
cd0ff491 GFT |
3165 | if (netif_carrier_ok(netdev)) { |
3166 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
47220951 GFT |
3167 | jme_polling_mode(jme); |
3168 | ||
29bdd921 | 3169 | jme_stop_pcc_timer(jme); |
cd0ff491 GFT |
3170 | jme_disable_rx_engine(jme); |
3171 | jme_disable_tx_engine(jme); | |
29bdd921 GFT |
3172 | jme_reset_mac_processor(jme); |
3173 | jme_free_rx_resources(jme); | |
3174 | jme_free_tx_resources(jme); | |
3175 | netif_carrier_off(netdev); | |
3176 | jme->phylink = 0; | |
3177 | } | |
3178 | ||
cd0ff491 GFT |
3179 | tasklet_enable(&jme->txclean_task); |
3180 | tasklet_hi_enable(&jme->rxclean_task); | |
3181 | tasklet_hi_enable(&jme->rxempty_task); | |
29bdd921 GFT |
3182 | |
3183 | pci_save_state(pdev); | |
fba4bc0c GFT |
3184 | jme_powersave_phy(jme); |
3185 | pci_enable_wake(jme->pdev, PCI_D3hot, true); | |
3186 | pci_set_power_state(pdev, PCI_D3hot); | |
29bdd921 GFT |
3187 | |
3188 | return 0; | |
3189 | } | |
3190 | ||
3191 | static int | |
3192 | jme_resume(struct pci_dev *pdev) | |
3193 | { | |
3194 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3195 | struct jme_adapter *jme = netdev_priv(netdev); | |
3196 | ||
3197 | jme_clear_pm(jme); | |
3198 | pci_restore_state(pdev); | |
3199 | ||
e4610a83 GFT |
3200 | jme_phy_on(jme); |
3201 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
29bdd921 | 3202 | jme_set_settings(netdev, &jme->old_ecmd); |
e4610a83 | 3203 | else |
29bdd921 GFT |
3204 | jme_reset_phy_processor(jme); |
3205 | ||
29bdd921 GFT |
3206 | jme_start_irq(jme); |
3207 | netif_device_attach(netdev); | |
3208 | ||
3209 | atomic_inc(&jme->link_changing); | |
3210 | ||
3211 | jme_reset_link(jme); | |
3212 | ||
3213 | return 0; | |
3214 | } | |
9b9d55de | 3215 | #endif |
29bdd921 | 3216 | |
c97b5740 | 3217 | static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = { |
cd0ff491 GFT |
3218 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) }, |
3219 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) }, | |
d7699f87 GFT |
3220 | { } |
3221 | }; | |
3222 | ||
3223 | static struct pci_driver jme_driver = { | |
cd0ff491 GFT |
3224 | .name = DRV_NAME, |
3225 | .id_table = jme_pci_tbl, | |
3226 | .probe = jme_init_one, | |
3227 | .remove = __devexit_p(jme_remove_one), | |
d7699f87 | 3228 | #ifdef CONFIG_PM |
cd0ff491 GFT |
3229 | .suspend = jme_suspend, |
3230 | .resume = jme_resume, | |
d7699f87 | 3231 | #endif /* CONFIG_PM */ |
fba4bc0c | 3232 | .shutdown = jme_shutdown, |
d7699f87 GFT |
3233 | }; |
3234 | ||
3bf61c55 GFT |
3235 | static int __init |
3236 | jme_init_module(void) | |
d7699f87 | 3237 | { |
52a46ba8 | 3238 | pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION); |
d7699f87 GFT |
3239 | return pci_register_driver(&jme_driver); |
3240 | } | |
3241 | ||
3bf61c55 GFT |
3242 | static void __exit |
3243 | jme_cleanup_module(void) | |
d7699f87 GFT |
3244 | { |
3245 | pci_unregister_driver(&jme_driver); | |
3246 | } | |
3247 | ||
3248 | module_init(jme_init_module); | |
3249 | module_exit(jme_cleanup_module); | |
3250 | ||
3bf61c55 | 3251 | MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>"); |
d7699f87 GFT |
3252 | MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver"); |
3253 | MODULE_LICENSE("GPL"); | |
3254 | MODULE_VERSION(DRV_VERSION); | |
3255 | MODULE_DEVICE_TABLE(pci, jme_pci_tbl); | |
3256 |