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d7699f87 GFT |
1 | /* |
2 | * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver | |
3 | * | |
4 | * Copyright 2008 JMicron Technology Corporation | |
5 | * http://www.jmicron.com/ | |
eee57828 | 6 | * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org> |
d7699f87 | 7 | * |
3bf61c55 GFT |
8 | * Author: Guo-Fu Tseng <cooldavid@cooldavid.org> |
9 | * | |
d7699f87 GFT |
10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | * | |
23 | */ | |
24 | ||
52a46ba8 JP |
25 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
26 | ||
d7699f87 GFT |
27 | #include <linux/module.h> |
28 | #include <linux/kernel.h> | |
29 | #include <linux/pci.h> | |
30 | #include <linux/netdevice.h> | |
31 | #include <linux/etherdevice.h> | |
32 | #include <linux/ethtool.h> | |
33 | #include <linux/mii.h> | |
34 | #include <linux/crc32.h> | |
4330c2f2 | 35 | #include <linux/delay.h> |
29bdd921 | 36 | #include <linux/spinlock.h> |
8c198884 GFT |
37 | #include <linux/in.h> |
38 | #include <linux/ip.h> | |
79ce639c GFT |
39 | #include <linux/ipv6.h> |
40 | #include <linux/tcp.h> | |
41 | #include <linux/udp.h> | |
42b1055e | 42 | #include <linux/if_vlan.h> |
6d641c63 | 43 | #include <linux/slab.h> |
94c5ea02 | 44 | #include <net/ip6_checksum.h> |
d7699f87 GFT |
45 | #include "jme.h" |
46 | ||
cd0ff491 GFT |
47 | static int force_pseudohp = -1; |
48 | static int no_pseudohp = -1; | |
49 | static int no_extplug = -1; | |
50 | module_param(force_pseudohp, int, 0); | |
51 | MODULE_PARM_DESC(force_pseudohp, | |
52 | "Enable pseudo hot-plug feature manually by driver instead of BIOS."); | |
53 | module_param(no_pseudohp, int, 0); | |
54 | MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); | |
55 | module_param(no_extplug, int, 0); | |
56 | MODULE_PARM_DESC(no_extplug, | |
57 | "Do not use external plug signal for pseudo hot-plug."); | |
4330c2f2 | 58 | |
3bf61c55 GFT |
59 | static int |
60 | jme_mdio_read(struct net_device *netdev, int phy, int reg) | |
d7699f87 GFT |
61 | { |
62 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 63 | int i, val, again = (reg == MII_BMSR) ? 1 : 0; |
d7699f87 | 64 | |
186fc259 | 65 | read_again: |
cd0ff491 | 66 | jwrite32(jme, JME_SMI, SMI_OP_REQ | |
3bf61c55 GFT |
67 | smi_phy_addr(phy) | |
68 | smi_reg_addr(reg)); | |
d7699f87 GFT |
69 | |
70 | wmb(); | |
cd0ff491 | 71 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
cdcdc9eb | 72 | udelay(20); |
b3821cc5 GFT |
73 | val = jread32(jme, JME_SMI); |
74 | if ((val & SMI_OP_REQ) == 0) | |
3bf61c55 | 75 | break; |
cd0ff491 | 76 | } |
d7699f87 | 77 | |
cd0ff491 | 78 | if (i == 0) { |
52a46ba8 | 79 | pr_err("phy(%d) read timeout : %d\n", phy, reg); |
3bf61c55 | 80 | return 0; |
cd0ff491 | 81 | } |
d7699f87 | 82 | |
cd0ff491 | 83 | if (again--) |
186fc259 GFT |
84 | goto read_again; |
85 | ||
cd0ff491 | 86 | return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT; |
d7699f87 GFT |
87 | } |
88 | ||
3bf61c55 GFT |
89 | static void |
90 | jme_mdio_write(struct net_device *netdev, | |
91 | int phy, int reg, int val) | |
d7699f87 GFT |
92 | { |
93 | struct jme_adapter *jme = netdev_priv(netdev); | |
94 | int i; | |
95 | ||
3bf61c55 GFT |
96 | jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ | |
97 | ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | | |
98 | smi_phy_addr(phy) | smi_reg_addr(reg)); | |
d7699f87 GFT |
99 | |
100 | wmb(); | |
cdcdc9eb GFT |
101 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
102 | udelay(20); | |
8d27293f | 103 | if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0) |
3bf61c55 GFT |
104 | break; |
105 | } | |
d7699f87 | 106 | |
3bf61c55 | 107 | if (i == 0) |
52a46ba8 | 108 | pr_err("phy(%d) write timeout : %d\n", phy, reg); |
d7699f87 GFT |
109 | } |
110 | ||
cd0ff491 | 111 | static inline void |
3bf61c55 | 112 | jme_reset_phy_processor(struct jme_adapter *jme) |
d7699f87 | 113 | { |
cd0ff491 | 114 | u32 val; |
3bf61c55 GFT |
115 | |
116 | jme_mdio_write(jme->dev, | |
117 | jme->mii_if.phy_id, | |
8c198884 GFT |
118 | MII_ADVERTISE, ADVERTISE_ALL | |
119 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
3bf61c55 | 120 | |
cd0ff491 | 121 | if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
122 | jme_mdio_write(jme->dev, |
123 | jme->mii_if.phy_id, | |
124 | MII_CTRL1000, | |
125 | ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
3bf61c55 | 126 | |
fcf45b4c GFT |
127 | val = jme_mdio_read(jme->dev, |
128 | jme->mii_if.phy_id, | |
129 | MII_BMCR); | |
130 | ||
131 | jme_mdio_write(jme->dev, | |
132 | jme->mii_if.phy_id, | |
133 | MII_BMCR, val | BMCR_RESET); | |
3bf61c55 GFT |
134 | } |
135 | ||
b3821cc5 GFT |
136 | static void |
137 | jme_setup_wakeup_frame(struct jme_adapter *jme, | |
0d8a2973 | 138 | const u32 *mask, u32 crc, int fnr) |
b3821cc5 GFT |
139 | { |
140 | int i; | |
141 | ||
142 | /* | |
143 | * Setup CRC pattern | |
144 | */ | |
145 | jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL)); | |
146 | wmb(); | |
147 | jwrite32(jme, JME_WFODP, crc); | |
148 | wmb(); | |
149 | ||
150 | /* | |
151 | * Setup Mask | |
152 | */ | |
cd0ff491 | 153 | for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { |
b3821cc5 GFT |
154 | jwrite32(jme, JME_WFOI, |
155 | ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) | | |
156 | (fnr & WFOI_FRAME_SEL)); | |
157 | wmb(); | |
158 | jwrite32(jme, JME_WFODP, mask[i]); | |
159 | wmb(); | |
160 | } | |
161 | } | |
3bf61c55 | 162 | |
ed830419 GFT |
163 | static inline void |
164 | jme_mac_rxclk_off(struct jme_adapter *jme) | |
165 | { | |
166 | jme->reg_gpreg1 |= GPREG1_RXCLKOFF; | |
167 | jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); | |
168 | } | |
169 | ||
170 | static inline void | |
171 | jme_mac_rxclk_on(struct jme_adapter *jme) | |
172 | { | |
173 | jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF; | |
174 | jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); | |
175 | } | |
176 | ||
177 | static inline void | |
178 | jme_mac_txclk_off(struct jme_adapter *jme) | |
179 | { | |
180 | jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC); | |
181 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
182 | } | |
183 | ||
184 | static inline void | |
185 | jme_mac_txclk_on(struct jme_adapter *jme) | |
186 | { | |
187 | u32 speed = jme->reg_ghc & GHC_SPEED; | |
188 | if (speed == GHC_SPEED_1000M) | |
189 | jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY; | |
190 | else | |
191 | jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; | |
192 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
193 | } | |
194 | ||
195 | static inline void | |
196 | jme_reset_ghc_speed(struct jme_adapter *jme) | |
197 | { | |
198 | jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX); | |
199 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
200 | } | |
201 | ||
202 | static inline void | |
203 | jme_reset_250A2_workaround(struct jme_adapter *jme) | |
204 | { | |
205 | jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | | |
206 | GPREG1_RSSPATCH); | |
207 | jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); | |
208 | } | |
209 | ||
210 | static inline void | |
211 | jme_assert_ghc_reset(struct jme_adapter *jme) | |
212 | { | |
213 | jme->reg_ghc |= GHC_SWRST; | |
214 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
215 | } | |
216 | ||
217 | static inline void | |
218 | jme_clear_ghc_reset(struct jme_adapter *jme) | |
219 | { | |
220 | jme->reg_ghc &= ~GHC_SWRST; | |
221 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
222 | } | |
223 | ||
cd0ff491 | 224 | static inline void |
3bf61c55 GFT |
225 | jme_reset_mac_processor(struct jme_adapter *jme) |
226 | { | |
0d8a2973 | 227 | static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; |
cd0ff491 GFT |
228 | u32 crc = 0xCDCDCDCD; |
229 | u32 gpreg0; | |
b3821cc5 GFT |
230 | int i; |
231 | ||
ed830419 GFT |
232 | jme_reset_ghc_speed(jme); |
233 | jme_reset_250A2_workaround(jme); | |
234 | ||
235 | jme_mac_rxclk_on(jme); | |
236 | jme_mac_txclk_on(jme); | |
237 | udelay(1); | |
238 | jme_assert_ghc_reset(jme); | |
239 | udelay(1); | |
240 | jme_mac_rxclk_off(jme); | |
241 | jme_mac_txclk_off(jme); | |
242 | udelay(1); | |
243 | jme_clear_ghc_reset(jme); | |
244 | udelay(1); | |
245 | jme_mac_rxclk_on(jme); | |
246 | jme_mac_txclk_on(jme); | |
247 | udelay(1); | |
248 | jme_mac_rxclk_off(jme); | |
249 | jme_mac_txclk_off(jme); | |
cd0ff491 GFT |
250 | |
251 | jwrite32(jme, JME_RXDBA_LO, 0x00000000); | |
252 | jwrite32(jme, JME_RXDBA_HI, 0x00000000); | |
253 | jwrite32(jme, JME_RXQDC, 0x00000000); | |
254 | jwrite32(jme, JME_RXNDA, 0x00000000); | |
255 | jwrite32(jme, JME_TXDBA_LO, 0x00000000); | |
256 | jwrite32(jme, JME_TXDBA_HI, 0x00000000); | |
257 | jwrite32(jme, JME_TXQDC, 0x00000000); | |
258 | jwrite32(jme, JME_TXNDA, 0x00000000); | |
259 | ||
4330c2f2 GFT |
260 | jwrite32(jme, JME_RXMCHT_LO, 0x00000000); |
261 | jwrite32(jme, JME_RXMCHT_HI, 0x00000000); | |
cd0ff491 | 262 | for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i) |
b3821cc5 | 263 | jme_setup_wakeup_frame(jme, mask, crc, i); |
cd0ff491 | 264 | if (jme->fpgaver) |
cdcdc9eb GFT |
265 | gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL; |
266 | else | |
267 | gpreg0 = GPREG0_DEFAULT; | |
268 | jwrite32(jme, JME_GPREG0, gpreg0); | |
cd0ff491 GFT |
269 | } |
270 | ||
271 | static inline void | |
3bf61c55 | 272 | jme_clear_pm(struct jme_adapter *jme) |
d7699f87 | 273 | { |
18783c49 | 274 | jwrite32(jme, JME_PMCS, PMCS_STMASK | jme->reg_pmcs); |
d7699f87 GFT |
275 | } |
276 | ||
3bf61c55 GFT |
277 | static int |
278 | jme_reload_eeprom(struct jme_adapter *jme) | |
d7699f87 | 279 | { |
cd0ff491 | 280 | u32 val; |
d7699f87 GFT |
281 | int i; |
282 | ||
283 | val = jread32(jme, JME_SMBCSR); | |
284 | ||
cd0ff491 | 285 | if (val & SMBCSR_EEPROMD) { |
d7699f87 GFT |
286 | val |= SMBCSR_CNACK; |
287 | jwrite32(jme, JME_SMBCSR, val); | |
288 | val |= SMBCSR_RELOAD; | |
289 | jwrite32(jme, JME_SMBCSR, val); | |
290 | mdelay(12); | |
291 | ||
cd0ff491 | 292 | for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) { |
d7699f87 GFT |
293 | mdelay(1); |
294 | if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0) | |
295 | break; | |
296 | } | |
297 | ||
cd0ff491 | 298 | if (i == 0) { |
52a46ba8 | 299 | pr_err("eeprom reload timeout\n"); |
d7699f87 GFT |
300 | return -EIO; |
301 | } | |
302 | } | |
3bf61c55 | 303 | |
d7699f87 GFT |
304 | return 0; |
305 | } | |
306 | ||
3bf61c55 GFT |
307 | static void |
308 | jme_load_macaddr(struct net_device *netdev) | |
d7699f87 GFT |
309 | { |
310 | struct jme_adapter *jme = netdev_priv(netdev); | |
311 | unsigned char macaddr[6]; | |
cd0ff491 | 312 | u32 val; |
d7699f87 | 313 | |
cd0ff491 | 314 | spin_lock_bh(&jme->macaddr_lock); |
4330c2f2 | 315 | val = jread32(jme, JME_RXUMA_LO); |
d7699f87 GFT |
316 | macaddr[0] = (val >> 0) & 0xFF; |
317 | macaddr[1] = (val >> 8) & 0xFF; | |
318 | macaddr[2] = (val >> 16) & 0xFF; | |
319 | macaddr[3] = (val >> 24) & 0xFF; | |
4330c2f2 | 320 | val = jread32(jme, JME_RXUMA_HI); |
d7699f87 GFT |
321 | macaddr[4] = (val >> 0) & 0xFF; |
322 | macaddr[5] = (val >> 8) & 0xFF; | |
cd0ff491 GFT |
323 | memcpy(netdev->dev_addr, macaddr, 6); |
324 | spin_unlock_bh(&jme->macaddr_lock); | |
3bf61c55 GFT |
325 | } |
326 | ||
cd0ff491 | 327 | static inline void |
3bf61c55 GFT |
328 | jme_set_rx_pcc(struct jme_adapter *jme, int p) |
329 | { | |
cd0ff491 | 330 | switch (p) { |
192570e0 GFT |
331 | case PCC_OFF: |
332 | jwrite32(jme, JME_PCCRX0, | |
333 | ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
334 | ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
335 | break; | |
3bf61c55 GFT |
336 | case PCC_P1: |
337 | jwrite32(jme, JME_PCCRX0, | |
338 | ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
339 | ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
340 | break; | |
341 | case PCC_P2: | |
342 | jwrite32(jme, JME_PCCRX0, | |
343 | ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
344 | ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
345 | break; | |
346 | case PCC_P3: | |
347 | jwrite32(jme, JME_PCCRX0, | |
348 | ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
349 | ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
350 | break; | |
351 | default: | |
352 | break; | |
353 | } | |
192570e0 | 354 | wmb(); |
3bf61c55 | 355 | |
cd0ff491 | 356 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
c97b5740 | 357 | netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p); |
d7699f87 GFT |
358 | } |
359 | ||
fcf45b4c | 360 | static void |
3bf61c55 | 361 | jme_start_irq(struct jme_adapter *jme) |
d7699f87 | 362 | { |
3bf61c55 GFT |
363 | register struct dynpcc_info *dpi = &(jme->dpi); |
364 | ||
365 | jme_set_rx_pcc(jme, PCC_P1); | |
3bf61c55 GFT |
366 | dpi->cur = PCC_P1; |
367 | dpi->attempt = PCC_P1; | |
368 | dpi->cnt = 0; | |
369 | ||
370 | jwrite32(jme, JME_PCCTX, | |
8c198884 GFT |
371 | ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) | |
372 | ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) | | |
3bf61c55 GFT |
373 | PCCTXQ0_EN |
374 | ); | |
375 | ||
d7699f87 GFT |
376 | /* |
377 | * Enable Interrupts | |
378 | */ | |
379 | jwrite32(jme, JME_IENS, INTR_ENABLE); | |
380 | } | |
381 | ||
cd0ff491 | 382 | static inline void |
3bf61c55 | 383 | jme_stop_irq(struct jme_adapter *jme) |
d7699f87 GFT |
384 | { |
385 | /* | |
386 | * Disable Interrupts | |
387 | */ | |
cd0ff491 | 388 | jwrite32f(jme, JME_IENC, INTR_ENABLE); |
d7699f87 GFT |
389 | } |
390 | ||
cd0ff491 | 391 | static u32 |
cdcdc9eb GFT |
392 | jme_linkstat_from_phy(struct jme_adapter *jme) |
393 | { | |
cd0ff491 | 394 | u32 phylink, bmsr; |
cdcdc9eb GFT |
395 | |
396 | phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17); | |
397 | bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR); | |
cd0ff491 | 398 | if (bmsr & BMSR_ANCOMP) |
cdcdc9eb GFT |
399 | phylink |= PHY_LINK_AUTONEG_COMPLETE; |
400 | ||
401 | return phylink; | |
402 | } | |
403 | ||
cd0ff491 | 404 | static inline void |
06168a20 | 405 | jme_set_phyfifo_5level(struct jme_adapter *jme) |
cd0ff491 GFT |
406 | { |
407 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); | |
408 | } | |
409 | ||
410 | static inline void | |
06168a20 | 411 | jme_set_phyfifo_8level(struct jme_adapter *jme) |
cd0ff491 GFT |
412 | { |
413 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); | |
414 | } | |
415 | ||
fcf45b4c GFT |
416 | static int |
417 | jme_check_link(struct net_device *netdev, int testonly) | |
d7699f87 GFT |
418 | { |
419 | struct jme_adapter *jme = netdev_priv(netdev); | |
ed830419 | 420 | u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr; |
79ce639c | 421 | char linkmsg[64]; |
fcf45b4c | 422 | int rc = 0; |
d7699f87 | 423 | |
b3821cc5 | 424 | linkmsg[0] = '\0'; |
cdcdc9eb | 425 | |
cd0ff491 | 426 | if (jme->fpgaver) |
cdcdc9eb GFT |
427 | phylink = jme_linkstat_from_phy(jme); |
428 | else | |
429 | phylink = jread32(jme, JME_PHY_LINK); | |
d7699f87 | 430 | |
cd0ff491 GFT |
431 | if (phylink & PHY_LINK_UP) { |
432 | if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { | |
8c198884 GFT |
433 | /* |
434 | * If we did not enable AN | |
435 | * Speed/Duplex Info should be obtained from SMI | |
436 | */ | |
437 | phylink = PHY_LINK_UP; | |
438 | ||
439 | bmcr = jme_mdio_read(jme->dev, | |
440 | jme->mii_if.phy_id, | |
441 | MII_BMCR); | |
442 | ||
443 | phylink |= ((bmcr & BMCR_SPEED1000) && | |
444 | (bmcr & BMCR_SPEED100) == 0) ? | |
445 | PHY_LINK_SPEED_1000M : | |
446 | (bmcr & BMCR_SPEED100) ? | |
447 | PHY_LINK_SPEED_100M : | |
448 | PHY_LINK_SPEED_10M; | |
449 | ||
450 | phylink |= (bmcr & BMCR_FULLDPLX) ? | |
451 | PHY_LINK_DUPLEX : 0; | |
79ce639c | 452 | |
b3821cc5 | 453 | strcat(linkmsg, "Forced: "); |
cd0ff491 | 454 | } else { |
8c198884 GFT |
455 | /* |
456 | * Keep polling for speed/duplex resolve complete | |
457 | */ | |
cd0ff491 | 458 | while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && |
8c198884 GFT |
459 | --cnt) { |
460 | ||
461 | udelay(1); | |
8c198884 | 462 | |
cd0ff491 | 463 | if (jme->fpgaver) |
cdcdc9eb GFT |
464 | phylink = jme_linkstat_from_phy(jme); |
465 | else | |
466 | phylink = jread32(jme, JME_PHY_LINK); | |
8c198884 | 467 | } |
cd0ff491 | 468 | if (!cnt) |
52a46ba8 | 469 | pr_err("Waiting speed resolve timeout\n"); |
79ce639c | 470 | |
b3821cc5 | 471 | strcat(linkmsg, "ANed: "); |
d7699f87 GFT |
472 | } |
473 | ||
cd0ff491 | 474 | if (jme->phylink == phylink) { |
fcf45b4c GFT |
475 | rc = 1; |
476 | goto out; | |
477 | } | |
cd0ff491 | 478 | if (testonly) |
fcf45b4c GFT |
479 | goto out; |
480 | ||
481 | jme->phylink = phylink; | |
482 | ||
ed830419 GFT |
483 | /* |
484 | * The speed/duplex setting of jme->reg_ghc already cleared | |
485 | * by jme_reset_mac_processor() | |
486 | */ | |
cd0ff491 GFT |
487 | switch (phylink & PHY_LINK_SPEED_MASK) { |
488 | case PHY_LINK_SPEED_10M: | |
ed830419 | 489 | jme->reg_ghc |= GHC_SPEED_10M; |
cd0ff491 | 490 | strcat(linkmsg, "10 Mbps, "); |
cd0ff491 GFT |
491 | break; |
492 | case PHY_LINK_SPEED_100M: | |
ed830419 | 493 | jme->reg_ghc |= GHC_SPEED_100M; |
cd0ff491 | 494 | strcat(linkmsg, "100 Mbps, "); |
cd0ff491 GFT |
495 | break; |
496 | case PHY_LINK_SPEED_1000M: | |
ed830419 | 497 | jme->reg_ghc |= GHC_SPEED_1000M; |
cd0ff491 | 498 | strcat(linkmsg, "1000 Mbps, "); |
cd0ff491 GFT |
499 | break; |
500 | default: | |
501 | break; | |
d7699f87 | 502 | } |
d7699f87 | 503 | |
cd0ff491 | 504 | if (phylink & PHY_LINK_DUPLEX) { |
d7699f87 | 505 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); |
19bbc546 | 506 | jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX); |
ed830419 | 507 | jme->reg_ghc |= GHC_DPX; |
cd0ff491 | 508 | } else { |
d7699f87 | 509 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | |
3bf61c55 GFT |
510 | TXMCS_BACKOFF | |
511 | TXMCS_CARRIERSENSE | | |
512 | TXMCS_COLLISION); | |
19bbc546 | 513 | jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX); |
8c198884 | 514 | } |
9b9d55de | 515 | |
ed830419 GFT |
516 | jwrite32(jme, JME_GHC, jme->reg_ghc); |
517 | ||
9b9d55de | 518 | if (is_buggy250(jme->pdev->device, jme->chiprev)) { |
ed830419 GFT |
519 | jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | |
520 | GPREG1_RSSPATCH); | |
9b9d55de | 521 | if (!(phylink & PHY_LINK_DUPLEX)) |
ed830419 | 522 | jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH; |
9b9d55de GFT |
523 | switch (phylink & PHY_LINK_SPEED_MASK) { |
524 | case PHY_LINK_SPEED_10M: | |
06168a20 | 525 | jme_set_phyfifo_8level(jme); |
ed830419 | 526 | jme->reg_gpreg1 |= GPREG1_RSSPATCH; |
9b9d55de GFT |
527 | break; |
528 | case PHY_LINK_SPEED_100M: | |
06168a20 | 529 | jme_set_phyfifo_5level(jme); |
ed830419 | 530 | jme->reg_gpreg1 |= GPREG1_RSSPATCH; |
9b9d55de GFT |
531 | break; |
532 | case PHY_LINK_SPEED_1000M: | |
06168a20 | 533 | jme_set_phyfifo_8level(jme); |
9b9d55de GFT |
534 | break; |
535 | default: | |
536 | break; | |
537 | } | |
538 | } | |
ed830419 | 539 | jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); |
fcf45b4c | 540 | |
94c5ea02 GFT |
541 | strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? |
542 | "Full-Duplex, " : | |
543 | "Half-Duplex, "); | |
544 | strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ? | |
545 | "MDI-X" : | |
546 | "MDI"); | |
52a46ba8 | 547 | netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg); |
cd0ff491 GFT |
548 | netif_carrier_on(netdev); |
549 | } else { | |
550 | if (testonly) | |
fcf45b4c GFT |
551 | goto out; |
552 | ||
52a46ba8 | 553 | netif_info(jme, link, jme->dev, "Link is down\n"); |
fcf45b4c | 554 | jme->phylink = 0; |
cd0ff491 | 555 | netif_carrier_off(netdev); |
d7699f87 | 556 | } |
fcf45b4c GFT |
557 | |
558 | out: | |
559 | return rc; | |
d7699f87 GFT |
560 | } |
561 | ||
3bf61c55 GFT |
562 | static int |
563 | jme_setup_tx_resources(struct jme_adapter *jme) | |
d7699f87 | 564 | { |
d7699f87 GFT |
565 | struct jme_ring *txring = &(jme->txring[0]); |
566 | ||
567 | txring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
568 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
569 | &(txring->dmaalloc), | |
570 | GFP_ATOMIC); | |
fcf45b4c | 571 | |
fa97b924 GFT |
572 | if (!txring->alloc) |
573 | goto err_set_null; | |
d7699f87 GFT |
574 | |
575 | /* | |
576 | * 16 Bytes align | |
577 | */ | |
cd0ff491 | 578 | txring->desc = (void *)ALIGN((unsigned long)(txring->alloc), |
3bf61c55 | 579 | RING_DESC_ALIGN); |
4330c2f2 | 580 | txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 581 | txring->next_to_use = 0; |
cdcdc9eb | 582 | atomic_set(&txring->next_to_clean, 0); |
b3821cc5 | 583 | atomic_set(&txring->nr_free, jme->tx_ring_size); |
d7699f87 | 584 | |
fa97b924 GFT |
585 | txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
586 | jme->tx_ring_size, GFP_ATOMIC); | |
587 | if (unlikely(!(txring->bufinf))) | |
588 | goto err_free_txring; | |
589 | ||
d7699f87 | 590 | /* |
b3821cc5 | 591 | * Initialize Transmit Descriptors |
d7699f87 | 592 | */ |
b3821cc5 | 593 | memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size)); |
3bf61c55 | 594 | memset(txring->bufinf, 0, |
b3821cc5 | 595 | sizeof(struct jme_buffer_info) * jme->tx_ring_size); |
d7699f87 GFT |
596 | |
597 | return 0; | |
fa97b924 GFT |
598 | |
599 | err_free_txring: | |
600 | dma_free_coherent(&(jme->pdev->dev), | |
601 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), | |
602 | txring->alloc, | |
603 | txring->dmaalloc); | |
604 | ||
605 | err_set_null: | |
606 | txring->desc = NULL; | |
607 | txring->dmaalloc = 0; | |
608 | txring->dma = 0; | |
609 | txring->bufinf = NULL; | |
610 | ||
611 | return -ENOMEM; | |
d7699f87 GFT |
612 | } |
613 | ||
3bf61c55 GFT |
614 | static void |
615 | jme_free_tx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
616 | { |
617 | int i; | |
618 | struct jme_ring *txring = &(jme->txring[0]); | |
fa97b924 | 619 | struct jme_buffer_info *txbi; |
d7699f87 | 620 | |
cd0ff491 | 621 | if (txring->alloc) { |
fa97b924 GFT |
622 | if (txring->bufinf) { |
623 | for (i = 0 ; i < jme->tx_ring_size ; ++i) { | |
624 | txbi = txring->bufinf + i; | |
625 | if (txbi->skb) { | |
626 | dev_kfree_skb(txbi->skb); | |
627 | txbi->skb = NULL; | |
628 | } | |
629 | txbi->mapping = 0; | |
630 | txbi->len = 0; | |
631 | txbi->nr_desc = 0; | |
632 | txbi->start_xmit = 0; | |
d7699f87 | 633 | } |
fa97b924 | 634 | kfree(txring->bufinf); |
d7699f87 GFT |
635 | } |
636 | ||
637 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 638 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
d7699f87 GFT |
639 | txring->alloc, |
640 | txring->dmaalloc); | |
3bf61c55 GFT |
641 | |
642 | txring->alloc = NULL; | |
643 | txring->desc = NULL; | |
644 | txring->dmaalloc = 0; | |
645 | txring->dma = 0; | |
fa97b924 | 646 | txring->bufinf = NULL; |
d7699f87 | 647 | } |
3bf61c55 | 648 | txring->next_to_use = 0; |
cdcdc9eb | 649 | atomic_set(&txring->next_to_clean, 0); |
79ce639c | 650 | atomic_set(&txring->nr_free, 0); |
d7699f87 GFT |
651 | } |
652 | ||
cd0ff491 | 653 | static inline void |
3bf61c55 | 654 | jme_enable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
655 | { |
656 | /* | |
657 | * Select Queue 0 | |
658 | */ | |
659 | jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0); | |
cd0ff491 | 660 | wmb(); |
d7699f87 GFT |
661 | |
662 | /* | |
663 | * Setup TX Queue 0 DMA Bass Address | |
664 | */ | |
fcf45b4c | 665 | jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
3bf61c55 | 666 | jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32); |
fcf45b4c | 667 | jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
d7699f87 GFT |
668 | |
669 | /* | |
670 | * Setup TX Descptor Count | |
671 | */ | |
b3821cc5 | 672 | jwrite32(jme, JME_TXQDC, jme->tx_ring_size); |
d7699f87 GFT |
673 | |
674 | /* | |
675 | * Enable TX Engine | |
676 | */ | |
677 | wmb(); | |
ed830419 | 678 | jwrite32f(jme, JME_TXCS, jme->reg_txcs | |
4330c2f2 GFT |
679 | TXCS_SELECT_QUEUE0 | |
680 | TXCS_ENABLE); | |
d7699f87 | 681 | |
ed830419 GFT |
682 | /* |
683 | * Start clock for TX MAC Processor | |
684 | */ | |
685 | jme_mac_txclk_on(jme); | |
d7699f87 GFT |
686 | } |
687 | ||
cd0ff491 | 688 | static inline void |
29bdd921 GFT |
689 | jme_restart_tx_engine(struct jme_adapter *jme) |
690 | { | |
691 | /* | |
692 | * Restart TX Engine | |
693 | */ | |
694 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | |
695 | TXCS_SELECT_QUEUE0 | | |
696 | TXCS_ENABLE); | |
697 | } | |
698 | ||
cd0ff491 | 699 | static inline void |
3bf61c55 | 700 | jme_disable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
701 | { |
702 | int i; | |
cd0ff491 | 703 | u32 val; |
d7699f87 GFT |
704 | |
705 | /* | |
706 | * Disable TX Engine | |
707 | */ | |
fcf45b4c | 708 | jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0); |
cd0ff491 | 709 | wmb(); |
d7699f87 GFT |
710 | |
711 | val = jread32(jme, JME_TXCS); | |
cd0ff491 | 712 | for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) { |
fcf45b4c | 713 | mdelay(1); |
d7699f87 | 714 | val = jread32(jme, JME_TXCS); |
cd0ff491 | 715 | rmb(); |
d7699f87 GFT |
716 | } |
717 | ||
cd0ff491 | 718 | if (!i) |
52a46ba8 | 719 | pr_err("Disable TX engine timeout\n"); |
ed830419 GFT |
720 | |
721 | /* | |
722 | * Stop clock for TX MAC Processor | |
723 | */ | |
724 | jme_mac_txclk_off(jme); | |
d7699f87 GFT |
725 | } |
726 | ||
3bf61c55 GFT |
727 | static void |
728 | jme_set_clean_rxdesc(struct jme_adapter *jme, int i) | |
d7699f87 | 729 | { |
fa97b924 | 730 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 731 | register struct rxdesc *rxdesc = rxring->desc; |
4330c2f2 GFT |
732 | struct jme_buffer_info *rxbi = rxring->bufinf; |
733 | rxdesc += i; | |
734 | rxbi += i; | |
735 | ||
736 | rxdesc->dw[0] = 0; | |
737 | rxdesc->dw[1] = 0; | |
3bf61c55 | 738 | rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32); |
fcf45b4c GFT |
739 | rxdesc->desc1.bufaddrl = cpu_to_le32( |
740 | (__u64)rxbi->mapping & 0xFFFFFFFFUL); | |
3bf61c55 | 741 | rxdesc->desc1.datalen = cpu_to_le16(rxbi->len); |
cd0ff491 | 742 | if (jme->dev->features & NETIF_F_HIGHDMA) |
3bf61c55 | 743 | rxdesc->desc1.flags = RXFLAG_64BIT; |
d7699f87 | 744 | wmb(); |
3bf61c55 | 745 | rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT; |
d7699f87 GFT |
746 | } |
747 | ||
3bf61c55 GFT |
748 | static int |
749 | jme_make_new_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
750 | { |
751 | struct jme_ring *rxring = &(jme->rxring[0]); | |
b3821cc5 | 752 | struct jme_buffer_info *rxbi = rxring->bufinf + i; |
cd0ff491 | 753 | struct sk_buff *skb; |
52edb99a | 754 | dma_addr_t mapping; |
4330c2f2 | 755 | |
79ce639c GFT |
756 | skb = netdev_alloc_skb(jme->dev, |
757 | jme->dev->mtu + RX_EXTRA_LEN); | |
cd0ff491 | 758 | if (unlikely(!skb)) |
4330c2f2 | 759 | return -ENOMEM; |
3bf61c55 | 760 | |
52edb99a GFT |
761 | mapping = pci_map_page(jme->pdev, virt_to_page(skb->data), |
762 | offset_in_page(skb->data), skb_tailroom(skb), | |
763 | PCI_DMA_FROMDEVICE); | |
764 | if (unlikely(pci_dma_mapping_error(jme->pdev, mapping))) { | |
765 | dev_kfree_skb(skb); | |
766 | return -ENOMEM; | |
767 | } | |
768 | ||
769 | if (likely(rxbi->mapping)) | |
770 | pci_unmap_page(jme->pdev, rxbi->mapping, | |
771 | rxbi->len, PCI_DMA_FROMDEVICE); | |
772 | ||
4330c2f2 | 773 | rxbi->skb = skb; |
3bf61c55 | 774 | rxbi->len = skb_tailroom(skb); |
52edb99a | 775 | rxbi->mapping = mapping; |
4330c2f2 GFT |
776 | return 0; |
777 | } | |
778 | ||
3bf61c55 GFT |
779 | static void |
780 | jme_free_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
781 | { |
782 | struct jme_ring *rxring = &(jme->rxring[0]); | |
783 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
784 | rxbi += i; | |
785 | ||
cd0ff491 | 786 | if (rxbi->skb) { |
b3821cc5 | 787 | pci_unmap_page(jme->pdev, |
4330c2f2 | 788 | rxbi->mapping, |
3bf61c55 | 789 | rxbi->len, |
4330c2f2 GFT |
790 | PCI_DMA_FROMDEVICE); |
791 | dev_kfree_skb(rxbi->skb); | |
792 | rxbi->skb = NULL; | |
793 | rxbi->mapping = 0; | |
3bf61c55 | 794 | rxbi->len = 0; |
4330c2f2 GFT |
795 | } |
796 | } | |
797 | ||
3bf61c55 GFT |
798 | static void |
799 | jme_free_rx_resources(struct jme_adapter *jme) | |
800 | { | |
801 | int i; | |
802 | struct jme_ring *rxring = &(jme->rxring[0]); | |
803 | ||
cd0ff491 | 804 | if (rxring->alloc) { |
fa97b924 GFT |
805 | if (rxring->bufinf) { |
806 | for (i = 0 ; i < jme->rx_ring_size ; ++i) | |
807 | jme_free_rx_buf(jme, i); | |
808 | kfree(rxring->bufinf); | |
809 | } | |
3bf61c55 GFT |
810 | |
811 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 812 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
3bf61c55 GFT |
813 | rxring->alloc, |
814 | rxring->dmaalloc); | |
815 | rxring->alloc = NULL; | |
816 | rxring->desc = NULL; | |
817 | rxring->dmaalloc = 0; | |
818 | rxring->dma = 0; | |
fa97b924 | 819 | rxring->bufinf = NULL; |
3bf61c55 GFT |
820 | } |
821 | rxring->next_to_use = 0; | |
cdcdc9eb | 822 | atomic_set(&rxring->next_to_clean, 0); |
3bf61c55 GFT |
823 | } |
824 | ||
825 | static int | |
826 | jme_setup_rx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
827 | { |
828 | int i; | |
829 | struct jme_ring *rxring = &(jme->rxring[0]); | |
830 | ||
831 | rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
832 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
833 | &(rxring->dmaalloc), | |
834 | GFP_ATOMIC); | |
fa97b924 GFT |
835 | if (!rxring->alloc) |
836 | goto err_set_null; | |
d7699f87 GFT |
837 | |
838 | /* | |
839 | * 16 Bytes align | |
840 | */ | |
cd0ff491 | 841 | rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc), |
3bf61c55 | 842 | RING_DESC_ALIGN); |
4330c2f2 | 843 | rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 844 | rxring->next_to_use = 0; |
cdcdc9eb | 845 | atomic_set(&rxring->next_to_clean, 0); |
d7699f87 | 846 | |
fa97b924 GFT |
847 | rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
848 | jme->rx_ring_size, GFP_ATOMIC); | |
849 | if (unlikely(!(rxring->bufinf))) | |
850 | goto err_free_rxring; | |
851 | ||
d7699f87 GFT |
852 | /* |
853 | * Initiallize Receive Descriptors | |
854 | */ | |
fa97b924 GFT |
855 | memset(rxring->bufinf, 0, |
856 | sizeof(struct jme_buffer_info) * jme->rx_ring_size); | |
cd0ff491 GFT |
857 | for (i = 0 ; i < jme->rx_ring_size ; ++i) { |
858 | if (unlikely(jme_make_new_rx_buf(jme, i))) { | |
3bf61c55 GFT |
859 | jme_free_rx_resources(jme); |
860 | return -ENOMEM; | |
861 | } | |
d7699f87 GFT |
862 | |
863 | jme_set_clean_rxdesc(jme, i); | |
864 | } | |
865 | ||
d7699f87 | 866 | return 0; |
fa97b924 GFT |
867 | |
868 | err_free_rxring: | |
869 | dma_free_coherent(&(jme->pdev->dev), | |
870 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), | |
871 | rxring->alloc, | |
872 | rxring->dmaalloc); | |
873 | err_set_null: | |
874 | rxring->desc = NULL; | |
875 | rxring->dmaalloc = 0; | |
876 | rxring->dma = 0; | |
877 | rxring->bufinf = NULL; | |
878 | ||
879 | return -ENOMEM; | |
d7699f87 GFT |
880 | } |
881 | ||
cd0ff491 | 882 | static inline void |
3bf61c55 | 883 | jme_enable_rx_engine(struct jme_adapter *jme) |
d7699f87 | 884 | { |
cd0ff491 GFT |
885 | /* |
886 | * Select Queue 0 | |
887 | */ | |
888 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | | |
889 | RXCS_QUEUESEL_Q0); | |
890 | wmb(); | |
891 | ||
d7699f87 GFT |
892 | /* |
893 | * Setup RX DMA Bass Address | |
894 | */ | |
fa97b924 | 895 | jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
3bf61c55 | 896 | jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32); |
fa97b924 | 897 | jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
d7699f87 GFT |
898 | |
899 | /* | |
b3821cc5 | 900 | * Setup RX Descriptor Count |
d7699f87 | 901 | */ |
b3821cc5 | 902 | jwrite32(jme, JME_RXQDC, jme->rx_ring_size); |
d7699f87 | 903 | |
3bf61c55 | 904 | /* |
d7699f87 GFT |
905 | * Setup Unicast Filter |
906 | */ | |
bb4c5c8c | 907 | jme_set_unicastaddr(jme->dev); |
d7699f87 GFT |
908 | jme_set_multi(jme->dev); |
909 | ||
910 | /* | |
911 | * Enable RX Engine | |
912 | */ | |
913 | wmb(); | |
ed830419 | 914 | jwrite32f(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
915 | RXCS_QUEUESEL_Q0 | |
916 | RXCS_ENABLE | | |
917 | RXCS_QST); | |
ed830419 GFT |
918 | |
919 | /* | |
920 | * Start clock for RX MAC Processor | |
921 | */ | |
922 | jme_mac_rxclk_on(jme); | |
d7699f87 GFT |
923 | } |
924 | ||
cd0ff491 | 925 | static inline void |
3bf61c55 | 926 | jme_restart_rx_engine(struct jme_adapter *jme) |
4330c2f2 GFT |
927 | { |
928 | /* | |
3bf61c55 | 929 | * Start RX Engine |
4330c2f2 | 930 | */ |
79ce639c | 931 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
932 | RXCS_QUEUESEL_Q0 | |
933 | RXCS_ENABLE | | |
934 | RXCS_QST); | |
935 | } | |
936 | ||
cd0ff491 | 937 | static inline void |
3bf61c55 | 938 | jme_disable_rx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
939 | { |
940 | int i; | |
cd0ff491 | 941 | u32 val; |
d7699f87 GFT |
942 | |
943 | /* | |
944 | * Disable RX Engine | |
945 | */ | |
29bdd921 | 946 | jwrite32(jme, JME_RXCS, jme->reg_rxcs); |
cd0ff491 | 947 | wmb(); |
d7699f87 GFT |
948 | |
949 | val = jread32(jme, JME_RXCS); | |
cd0ff491 | 950 | for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) { |
29bdd921 | 951 | mdelay(1); |
d7699f87 | 952 | val = jread32(jme, JME_RXCS); |
cd0ff491 | 953 | rmb(); |
d7699f87 GFT |
954 | } |
955 | ||
cd0ff491 | 956 | if (!i) |
52a46ba8 | 957 | pr_err("Disable RX engine timeout\n"); |
d7699f87 | 958 | |
ed830419 GFT |
959 | /* |
960 | * Stop clock for RX MAC Processor | |
961 | */ | |
962 | jme_mac_rxclk_off(jme); | |
d7699f87 GFT |
963 | } |
964 | ||
a452eef1 GFT |
965 | static u16 |
966 | jme_udpsum(struct sk_buff *skb) | |
967 | { | |
968 | u16 csum = 0xFFFFu; | |
969 | ||
970 | if (skb->len < (ETH_HLEN + sizeof(struct iphdr))) | |
971 | return csum; | |
972 | if (skb->protocol != htons(ETH_P_IP)) | |
973 | return csum; | |
974 | skb_set_network_header(skb, ETH_HLEN); | |
975 | if ((ip_hdr(skb)->protocol != IPPROTO_UDP) || | |
976 | (skb->len < (ETH_HLEN + | |
977 | (ip_hdr(skb)->ihl << 2) + | |
978 | sizeof(struct udphdr)))) { | |
979 | skb_reset_network_header(skb); | |
980 | return csum; | |
981 | } | |
982 | skb_set_transport_header(skb, | |
983 | ETH_HLEN + (ip_hdr(skb)->ihl << 2)); | |
984 | csum = udp_hdr(skb)->check; | |
985 | skb_reset_transport_header(skb); | |
986 | skb_reset_network_header(skb); | |
987 | ||
988 | return csum; | |
989 | } | |
990 | ||
192570e0 | 991 | static int |
a452eef1 | 992 | jme_rxsum_ok(struct jme_adapter *jme, u16 flags, struct sk_buff *skb) |
192570e0 | 993 | { |
cd0ff491 | 994 | if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) |
192570e0 GFT |
995 | return false; |
996 | ||
fa97b924 GFT |
997 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS)) |
998 | == RXWBFLAG_TCPON)) { | |
999 | if (flags & RXWBFLAG_IPV4) | |
c97b5740 | 1000 | netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n"); |
fa97b924 | 1001 | return false; |
192570e0 GFT |
1002 | } |
1003 | ||
fa97b924 | 1004 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS)) |
a452eef1 | 1005 | == RXWBFLAG_UDPON) && jme_udpsum(skb)) { |
fa97b924 | 1006 | if (flags & RXWBFLAG_IPV4) |
52a46ba8 | 1007 | netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n"); |
fa97b924 | 1008 | return false; |
192570e0 GFT |
1009 | } |
1010 | ||
fa97b924 GFT |
1011 | if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS)) |
1012 | == RXWBFLAG_IPV4)) { | |
52a46ba8 | 1013 | netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n"); |
fa97b924 | 1014 | return false; |
192570e0 GFT |
1015 | } |
1016 | ||
1017 | return true; | |
1018 | } | |
1019 | ||
3bf61c55 | 1020 | static void |
42b1055e | 1021 | jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) |
d7699f87 | 1022 | { |
d7699f87 | 1023 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 1024 | struct rxdesc *rxdesc = rxring->desc; |
3bf61c55 | 1025 | struct jme_buffer_info *rxbi = rxring->bufinf; |
d7699f87 | 1026 | struct sk_buff *skb; |
3bf61c55 | 1027 | int framesize; |
d7699f87 | 1028 | |
3bf61c55 GFT |
1029 | rxdesc += idx; |
1030 | rxbi += idx; | |
d7699f87 | 1031 | |
3bf61c55 GFT |
1032 | skb = rxbi->skb; |
1033 | pci_dma_sync_single_for_cpu(jme->pdev, | |
1034 | rxbi->mapping, | |
1035 | rxbi->len, | |
1036 | PCI_DMA_FROMDEVICE); | |
1037 | ||
cd0ff491 | 1038 | if (unlikely(jme_make_new_rx_buf(jme, idx))) { |
3bf61c55 GFT |
1039 | pci_dma_sync_single_for_device(jme->pdev, |
1040 | rxbi->mapping, | |
1041 | rxbi->len, | |
1042 | PCI_DMA_FROMDEVICE); | |
1043 | ||
1044 | ++(NET_STAT(jme).rx_dropped); | |
cd0ff491 | 1045 | } else { |
3bf61c55 GFT |
1046 | framesize = le16_to_cpu(rxdesc->descwb.framesize) |
1047 | - RX_PREPAD_SIZE; | |
1048 | ||
1049 | skb_reserve(skb, RX_PREPAD_SIZE); | |
1050 | skb_put(skb, framesize); | |
1051 | skb->protocol = eth_type_trans(skb, jme->dev); | |
1052 | ||
a452eef1 | 1053 | if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags), skb)) |
8c198884 | 1054 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
29bdd921 | 1055 | else |
97984ab7 | 1056 | skb_checksum_none_assert(skb); |
8c198884 | 1057 | |
94c5ea02 | 1058 | if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) { |
202bd32d JP |
1059 | u16 vid = le16_to_cpu(rxdesc->descwb.vlan); |
1060 | ||
1061 | __vlan_hwaccel_put_tag(skb, vid); | |
1062 | NET_STAT(jme).rx_bytes += 4; | |
b3821cc5 | 1063 | } |
202bd32d | 1064 | jme->jme_rx(skb); |
3bf61c55 | 1065 | |
94c5ea02 GFT |
1066 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) == |
1067 | cpu_to_le16(RXWBFLAG_DEST_MUL)) | |
3bf61c55 GFT |
1068 | ++(NET_STAT(jme).multicast); |
1069 | ||
3bf61c55 GFT |
1070 | NET_STAT(jme).rx_bytes += framesize; |
1071 | ++(NET_STAT(jme).rx_packets); | |
1072 | } | |
1073 | ||
1074 | jme_set_clean_rxdesc(jme, idx); | |
1075 | ||
1076 | } | |
1077 | ||
1078 | static int | |
1079 | jme_process_receive(struct jme_adapter *jme, int limit) | |
1080 | { | |
1081 | struct jme_ring *rxring = &(jme->rxring[0]); | |
cd0ff491 | 1082 | struct rxdesc *rxdesc = rxring->desc; |
b3821cc5 | 1083 | int i, j, ccnt, desccnt, mask = jme->rx_ring_mask; |
3bf61c55 | 1084 | |
cd0ff491 | 1085 | if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) |
192570e0 GFT |
1086 | goto out_inc; |
1087 | ||
cd0ff491 | 1088 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
192570e0 GFT |
1089 | goto out_inc; |
1090 | ||
cd0ff491 | 1091 | if (unlikely(!netif_carrier_ok(jme->dev))) |
192570e0 GFT |
1092 | goto out_inc; |
1093 | ||
cdcdc9eb | 1094 | i = atomic_read(&rxring->next_to_clean); |
fa97b924 | 1095 | while (limit > 0) { |
3bf61c55 GFT |
1096 | rxdesc = rxring->desc; |
1097 | rxdesc += i; | |
1098 | ||
94c5ea02 | 1099 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) || |
3bf61c55 GFT |
1100 | !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL)) |
1101 | goto out; | |
fa97b924 | 1102 | --limit; |
d7699f87 | 1103 | |
1a7a122d | 1104 | rmb(); |
4330c2f2 GFT |
1105 | desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; |
1106 | ||
cd0ff491 | 1107 | if (unlikely(desccnt > 1 || |
192570e0 | 1108 | rxdesc->descwb.errstat & RXWBERR_ALLERR)) { |
d7699f87 | 1109 | |
cd0ff491 | 1110 | if (rxdesc->descwb.errstat & RXWBERR_CRCERR) |
3bf61c55 | 1111 | ++(NET_STAT(jme).rx_crc_errors); |
cd0ff491 | 1112 | else if (rxdesc->descwb.errstat & RXWBERR_OVERUN) |
3bf61c55 GFT |
1113 | ++(NET_STAT(jme).rx_fifo_errors); |
1114 | else | |
1115 | ++(NET_STAT(jme).rx_errors); | |
4330c2f2 | 1116 | |
cd0ff491 | 1117 | if (desccnt > 1) |
3bf61c55 | 1118 | limit -= desccnt - 1; |
4330c2f2 | 1119 | |
cd0ff491 | 1120 | for (j = i, ccnt = desccnt ; ccnt-- ; ) { |
4330c2f2 | 1121 | jme_set_clean_rxdesc(jme, j); |
b3821cc5 | 1122 | j = (j + 1) & (mask); |
4330c2f2 | 1123 | } |
3bf61c55 | 1124 | |
cd0ff491 | 1125 | } else { |
42b1055e | 1126 | jme_alloc_and_feed_skb(jme, i); |
3bf61c55 | 1127 | } |
4330c2f2 | 1128 | |
b3821cc5 | 1129 | i = (i + desccnt) & (mask); |
3bf61c55 | 1130 | } |
4330c2f2 | 1131 | |
3bf61c55 | 1132 | out: |
cdcdc9eb | 1133 | atomic_set(&rxring->next_to_clean, i); |
4330c2f2 | 1134 | |
192570e0 GFT |
1135 | out_inc: |
1136 | atomic_inc(&jme->rx_cleaning); | |
1137 | ||
3bf61c55 | 1138 | return limit > 0 ? limit : 0; |
4330c2f2 | 1139 | |
3bf61c55 | 1140 | } |
d7699f87 | 1141 | |
79ce639c GFT |
1142 | static void |
1143 | jme_attempt_pcc(struct dynpcc_info *dpi, int atmp) | |
1144 | { | |
cd0ff491 | 1145 | if (likely(atmp == dpi->cur)) { |
192570e0 | 1146 | dpi->cnt = 0; |
79ce639c | 1147 | return; |
192570e0 | 1148 | } |
79ce639c | 1149 | |
cd0ff491 | 1150 | if (dpi->attempt == atmp) { |
79ce639c | 1151 | ++(dpi->cnt); |
cd0ff491 | 1152 | } else { |
79ce639c GFT |
1153 | dpi->attempt = atmp; |
1154 | dpi->cnt = 0; | |
1155 | } | |
1156 | ||
1157 | } | |
1158 | ||
1159 | static void | |
1160 | jme_dynamic_pcc(struct jme_adapter *jme) | |
1161 | { | |
1162 | register struct dynpcc_info *dpi = &(jme->dpi); | |
1163 | ||
cd0ff491 | 1164 | if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) |
79ce639c | 1165 | jme_attempt_pcc(dpi, PCC_P3); |
c97b5740 GFT |
1166 | else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD || |
1167 | dpi->intr_cnt > PCC_INTR_THRESHOLD) | |
79ce639c GFT |
1168 | jme_attempt_pcc(dpi, PCC_P2); |
1169 | else | |
1170 | jme_attempt_pcc(dpi, PCC_P1); | |
1171 | ||
cd0ff491 GFT |
1172 | if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { |
1173 | if (dpi->attempt < dpi->cur) | |
1174 | tasklet_schedule(&jme->rxclean_task); | |
79ce639c GFT |
1175 | jme_set_rx_pcc(jme, dpi->attempt); |
1176 | dpi->cur = dpi->attempt; | |
1177 | dpi->cnt = 0; | |
1178 | } | |
1179 | } | |
1180 | ||
1181 | static void | |
1182 | jme_start_pcc_timer(struct jme_adapter *jme) | |
1183 | { | |
1184 | struct dynpcc_info *dpi = &(jme->dpi); | |
1185 | dpi->last_bytes = NET_STAT(jme).rx_bytes; | |
1186 | dpi->last_pkts = NET_STAT(jme).rx_packets; | |
1187 | dpi->intr_cnt = 0; | |
1188 | jwrite32(jme, JME_TMCSR, | |
1189 | TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT)); | |
1190 | } | |
1191 | ||
cd0ff491 | 1192 | static inline void |
29bdd921 GFT |
1193 | jme_stop_pcc_timer(struct jme_adapter *jme) |
1194 | { | |
1195 | jwrite32(jme, JME_TMCSR, 0); | |
1196 | } | |
1197 | ||
cd0ff491 GFT |
1198 | static void |
1199 | jme_shutdown_nic(struct jme_adapter *jme) | |
1200 | { | |
1201 | u32 phylink; | |
1202 | ||
1203 | phylink = jme_linkstat_from_phy(jme); | |
1204 | ||
1205 | if (!(phylink & PHY_LINK_UP)) { | |
1206 | /* | |
1207 | * Disable all interrupt before issue timer | |
1208 | */ | |
1209 | jme_stop_irq(jme); | |
1210 | jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE); | |
1211 | } | |
1212 | } | |
1213 | ||
79ce639c GFT |
1214 | static void |
1215 | jme_pcc_tasklet(unsigned long arg) | |
1216 | { | |
cd0ff491 | 1217 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c GFT |
1218 | struct net_device *netdev = jme->dev; |
1219 | ||
cd0ff491 GFT |
1220 | if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) { |
1221 | jme_shutdown_nic(jme); | |
1222 | return; | |
1223 | } | |
29bdd921 | 1224 | |
cd0ff491 | 1225 | if (unlikely(!netif_carrier_ok(netdev) || |
29bdd921 GFT |
1226 | (atomic_read(&jme->link_changing) != 1) |
1227 | )) { | |
1228 | jme_stop_pcc_timer(jme); | |
79ce639c GFT |
1229 | return; |
1230 | } | |
29bdd921 | 1231 | |
cd0ff491 | 1232 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
192570e0 GFT |
1233 | jme_dynamic_pcc(jme); |
1234 | ||
79ce639c GFT |
1235 | jme_start_pcc_timer(jme); |
1236 | } | |
1237 | ||
cd0ff491 | 1238 | static inline void |
192570e0 GFT |
1239 | jme_polling_mode(struct jme_adapter *jme) |
1240 | { | |
1241 | jme_set_rx_pcc(jme, PCC_OFF); | |
1242 | } | |
1243 | ||
cd0ff491 | 1244 | static inline void |
192570e0 GFT |
1245 | jme_interrupt_mode(struct jme_adapter *jme) |
1246 | { | |
1247 | jme_set_rx_pcc(jme, PCC_P1); | |
1248 | } | |
1249 | ||
cd0ff491 GFT |
1250 | static inline int |
1251 | jme_pseudo_hotplug_enabled(struct jme_adapter *jme) | |
1252 | { | |
1253 | u32 apmc; | |
1254 | apmc = jread32(jme, JME_APMC); | |
1255 | return apmc & JME_APMC_PSEUDO_HP_EN; | |
1256 | } | |
1257 | ||
1258 | static void | |
1259 | jme_start_shutdown_timer(struct jme_adapter *jme) | |
1260 | { | |
1261 | u32 apmc; | |
1262 | ||
1263 | apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN; | |
1264 | apmc &= ~JME_APMC_EPIEN_CTRL; | |
1265 | if (!no_extplug) { | |
1266 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN); | |
1267 | wmb(); | |
1268 | } | |
1269 | jwrite32f(jme, JME_APMC, apmc); | |
1270 | ||
1271 | jwrite32f(jme, JME_TIMER2, 0); | |
1272 | set_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1273 | jwrite32(jme, JME_TMCSR, | |
1274 | TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT)); | |
1275 | } | |
1276 | ||
1277 | static void | |
1278 | jme_stop_shutdown_timer(struct jme_adapter *jme) | |
1279 | { | |
1280 | u32 apmc; | |
1281 | ||
1282 | jwrite32f(jme, JME_TMCSR, 0); | |
1283 | jwrite32f(jme, JME_TIMER2, 0); | |
1284 | clear_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1285 | ||
1286 | apmc = jread32(jme, JME_APMC); | |
1287 | apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL); | |
1288 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS); | |
1289 | wmb(); | |
1290 | jwrite32f(jme, JME_APMC, apmc); | |
1291 | } | |
1292 | ||
3bf61c55 GFT |
1293 | static void |
1294 | jme_link_change_tasklet(unsigned long arg) | |
1295 | { | |
cd0ff491 | 1296 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1297 | struct net_device *netdev = jme->dev; |
fcf45b4c GFT |
1298 | int rc; |
1299 | ||
cd0ff491 GFT |
1300 | while (!atomic_dec_and_test(&jme->link_changing)) { |
1301 | atomic_inc(&jme->link_changing); | |
52a46ba8 | 1302 | netif_info(jme, intr, jme->dev, "Get link change lock failed\n"); |
e882564f | 1303 | while (atomic_read(&jme->link_changing) != 1) |
52a46ba8 | 1304 | netif_info(jme, intr, jme->dev, "Waiting link change lock\n"); |
cd0ff491 | 1305 | } |
fcf45b4c | 1306 | |
cd0ff491 | 1307 | if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) |
fcf45b4c GFT |
1308 | goto out; |
1309 | ||
29bdd921 | 1310 | jme->old_mtu = netdev->mtu; |
fcf45b4c | 1311 | netif_stop_queue(netdev); |
cd0ff491 GFT |
1312 | if (jme_pseudo_hotplug_enabled(jme)) |
1313 | jme_stop_shutdown_timer(jme); | |
1314 | ||
1315 | jme_stop_pcc_timer(jme); | |
1316 | tasklet_disable(&jme->txclean_task); | |
1317 | tasklet_disable(&jme->rxclean_task); | |
1318 | tasklet_disable(&jme->rxempty_task); | |
1319 | ||
1320 | if (netif_carrier_ok(netdev)) { | |
cd0ff491 GFT |
1321 | jme_disable_rx_engine(jme); |
1322 | jme_disable_tx_engine(jme); | |
fcf45b4c GFT |
1323 | jme_reset_mac_processor(jme); |
1324 | jme_free_rx_resources(jme); | |
1325 | jme_free_tx_resources(jme); | |
192570e0 | 1326 | |
cd0ff491 | 1327 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1328 | jme_polling_mode(jme); |
cd0ff491 GFT |
1329 | |
1330 | netif_carrier_off(netdev); | |
fcf45b4c GFT |
1331 | } |
1332 | ||
1333 | jme_check_link(netdev, 0); | |
cd0ff491 | 1334 | if (netif_carrier_ok(netdev)) { |
fcf45b4c | 1335 | rc = jme_setup_rx_resources(jme); |
cd0ff491 | 1336 | if (rc) { |
52a46ba8 | 1337 | pr_err("Allocating resources for RX error, Device STOPPED!\n"); |
cd0ff491 | 1338 | goto out_enable_tasklet; |
fcf45b4c GFT |
1339 | } |
1340 | ||
fcf45b4c | 1341 | rc = jme_setup_tx_resources(jme); |
cd0ff491 | 1342 | if (rc) { |
52a46ba8 | 1343 | pr_err("Allocating resources for TX error, Device STOPPED!\n"); |
fcf45b4c GFT |
1344 | goto err_out_free_rx_resources; |
1345 | } | |
1346 | ||
1347 | jme_enable_rx_engine(jme); | |
1348 | jme_enable_tx_engine(jme); | |
1349 | ||
1350 | netif_start_queue(netdev); | |
192570e0 | 1351 | |
cd0ff491 | 1352 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1353 | jme_interrupt_mode(jme); |
192570e0 | 1354 | |
79ce639c | 1355 | jme_start_pcc_timer(jme); |
cd0ff491 GFT |
1356 | } else if (jme_pseudo_hotplug_enabled(jme)) { |
1357 | jme_start_shutdown_timer(jme); | |
fcf45b4c GFT |
1358 | } |
1359 | ||
cd0ff491 | 1360 | goto out_enable_tasklet; |
fcf45b4c GFT |
1361 | |
1362 | err_out_free_rx_resources: | |
1363 | jme_free_rx_resources(jme); | |
cd0ff491 GFT |
1364 | out_enable_tasklet: |
1365 | tasklet_enable(&jme->txclean_task); | |
1366 | tasklet_hi_enable(&jme->rxclean_task); | |
1367 | tasklet_hi_enable(&jme->rxempty_task); | |
fcf45b4c GFT |
1368 | out: |
1369 | atomic_inc(&jme->link_changing); | |
3bf61c55 | 1370 | } |
d7699f87 | 1371 | |
3bf61c55 GFT |
1372 | static void |
1373 | jme_rx_clean_tasklet(unsigned long arg) | |
1374 | { | |
cd0ff491 | 1375 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c | 1376 | struct dynpcc_info *dpi = &(jme->dpi); |
d7699f87 | 1377 | |
192570e0 GFT |
1378 | jme_process_receive(jme, jme->rx_ring_size); |
1379 | ++(dpi->intr_cnt); | |
42b1055e | 1380 | |
192570e0 | 1381 | } |
fcf45b4c | 1382 | |
192570e0 | 1383 | static int |
cdcdc9eb | 1384 | jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) |
192570e0 | 1385 | { |
cdcdc9eb | 1386 | struct jme_adapter *jme = jme_napi_priv(holder); |
192570e0 | 1387 | int rest; |
fcf45b4c | 1388 | |
cdcdc9eb | 1389 | rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget)); |
fcf45b4c | 1390 | |
cd0ff491 | 1391 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb | 1392 | atomic_dec(&jme->rx_empty); |
192570e0 GFT |
1393 | ++(NET_STAT(jme).rx_dropped); |
1394 | jme_restart_rx_engine(jme); | |
1395 | } | |
1396 | atomic_inc(&jme->rx_empty); | |
1397 | ||
cd0ff491 | 1398 | if (rest) { |
cdcdc9eb | 1399 | JME_RX_COMPLETE(netdev, holder); |
192570e0 GFT |
1400 | jme_interrupt_mode(jme); |
1401 | } | |
1402 | ||
cdcdc9eb GFT |
1403 | JME_NAPI_WEIGHT_SET(budget, rest); |
1404 | return JME_NAPI_WEIGHT_VAL(budget) - rest; | |
fcf45b4c GFT |
1405 | } |
1406 | ||
1407 | static void | |
1408 | jme_rx_empty_tasklet(unsigned long arg) | |
1409 | { | |
cd0ff491 | 1410 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1411 | |
cd0ff491 | 1412 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1413 | return; |
1414 | ||
cd0ff491 | 1415 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1416 | return; |
1417 | ||
c97b5740 | 1418 | netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n"); |
29bdd921 | 1419 | |
fcf45b4c | 1420 | jme_rx_clean_tasklet(arg); |
cdcdc9eb | 1421 | |
cd0ff491 | 1422 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb GFT |
1423 | atomic_dec(&jme->rx_empty); |
1424 | ++(NET_STAT(jme).rx_dropped); | |
1425 | jme_restart_rx_engine(jme); | |
1426 | } | |
1427 | atomic_inc(&jme->rx_empty); | |
4330c2f2 GFT |
1428 | } |
1429 | ||
b3821cc5 GFT |
1430 | static void |
1431 | jme_wake_queue_if_stopped(struct jme_adapter *jme) | |
1432 | { | |
fa97b924 | 1433 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1434 | |
1435 | smp_wmb(); | |
cd0ff491 | 1436 | if (unlikely(netif_queue_stopped(jme->dev) && |
b3821cc5 | 1437 | atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) { |
52a46ba8 | 1438 | netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n"); |
b3821cc5 | 1439 | netif_wake_queue(jme->dev); |
b3821cc5 GFT |
1440 | } |
1441 | ||
1442 | } | |
1443 | ||
3bf61c55 GFT |
1444 | static void |
1445 | jme_tx_clean_tasklet(unsigned long arg) | |
4330c2f2 | 1446 | { |
cd0ff491 | 1447 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
3bf61c55 | 1448 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1449 | struct txdesc *txdesc = txring->desc; |
3bf61c55 | 1450 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi; |
b3821cc5 | 1451 | int i, j, cnt = 0, max, err, mask; |
3bf61c55 | 1452 | |
52a46ba8 | 1453 | tx_dbg(jme, "Into txclean\n"); |
cd0ff491 GFT |
1454 | |
1455 | if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) | |
fcf45b4c GFT |
1456 | goto out; |
1457 | ||
cd0ff491 | 1458 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1459 | goto out; |
1460 | ||
cd0ff491 | 1461 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1462 | goto out; |
1463 | ||
b3821cc5 GFT |
1464 | max = jme->tx_ring_size - atomic_read(&txring->nr_free); |
1465 | mask = jme->tx_ring_mask; | |
3bf61c55 | 1466 | |
cd0ff491 | 1467 | for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { |
3bf61c55 GFT |
1468 | |
1469 | ctxbi = txbi + i; | |
1470 | ||
cd0ff491 | 1471 | if (likely(ctxbi->skb && |
b3821cc5 | 1472 | !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) { |
8c198884 | 1473 | |
cd0ff491 | 1474 | tx_dbg(jme, "txclean: %d+%d@%lu\n", |
52a46ba8 | 1475 | i, ctxbi->nr_desc, jiffies); |
3bf61c55 | 1476 | |
cd0ff491 | 1477 | err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; |
3bf61c55 | 1478 | |
cd0ff491 | 1479 | for (j = 1 ; j < ctxbi->nr_desc ; ++j) { |
b3821cc5 GFT |
1480 | ttxbi = txbi + ((i + j) & (mask)); |
1481 | txdesc[(i + j) & (mask)].dw[0] = 0; | |
3bf61c55 | 1482 | |
b3821cc5 | 1483 | pci_unmap_page(jme->pdev, |
3bf61c55 GFT |
1484 | ttxbi->mapping, |
1485 | ttxbi->len, | |
1486 | PCI_DMA_TODEVICE); | |
1487 | ||
3bf61c55 GFT |
1488 | ttxbi->mapping = 0; |
1489 | ttxbi->len = 0; | |
1490 | } | |
1491 | ||
1492 | dev_kfree_skb(ctxbi->skb); | |
3bf61c55 GFT |
1493 | |
1494 | cnt += ctxbi->nr_desc; | |
1495 | ||
cd0ff491 | 1496 | if (unlikely(err)) { |
8c198884 | 1497 | ++(NET_STAT(jme).tx_carrier_errors); |
cd0ff491 | 1498 | } else { |
8c198884 | 1499 | ++(NET_STAT(jme).tx_packets); |
b3821cc5 GFT |
1500 | NET_STAT(jme).tx_bytes += ctxbi->len; |
1501 | } | |
1502 | ||
1503 | ctxbi->skb = NULL; | |
1504 | ctxbi->len = 0; | |
cdcdc9eb | 1505 | ctxbi->start_xmit = 0; |
cd0ff491 GFT |
1506 | |
1507 | } else { | |
3bf61c55 GFT |
1508 | break; |
1509 | } | |
1510 | ||
b3821cc5 | 1511 | i = (i + ctxbi->nr_desc) & mask; |
3bf61c55 GFT |
1512 | |
1513 | ctxbi->nr_desc = 0; | |
d7699f87 GFT |
1514 | } |
1515 | ||
52a46ba8 | 1516 | tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies); |
cdcdc9eb | 1517 | atomic_set(&txring->next_to_clean, i); |
79ce639c | 1518 | atomic_add(cnt, &txring->nr_free); |
3bf61c55 | 1519 | |
b3821cc5 GFT |
1520 | jme_wake_queue_if_stopped(jme); |
1521 | ||
fcf45b4c GFT |
1522 | out: |
1523 | atomic_inc(&jme->tx_cleaning); | |
d7699f87 GFT |
1524 | } |
1525 | ||
79ce639c | 1526 | static void |
cd0ff491 | 1527 | jme_intr_msi(struct jme_adapter *jme, u32 intrstat) |
d7699f87 | 1528 | { |
3bf61c55 GFT |
1529 | /* |
1530 | * Disable interrupt | |
1531 | */ | |
1532 | jwrite32f(jme, JME_IENC, INTR_ENABLE); | |
d7699f87 | 1533 | |
cd0ff491 | 1534 | if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { |
47220951 GFT |
1535 | /* |
1536 | * Link change event is critical | |
1537 | * all other events are ignored | |
1538 | */ | |
1539 | jwrite32(jme, JME_IEVE, intrstat); | |
3bf61c55 | 1540 | tasklet_schedule(&jme->linkch_task); |
29bdd921 | 1541 | goto out_reenable; |
fcf45b4c | 1542 | } |
d7699f87 | 1543 | |
cd0ff491 | 1544 | if (intrstat & INTR_TMINTR) { |
47220951 | 1545 | jwrite32(jme, JME_IEVE, INTR_TMINTR); |
79ce639c | 1546 | tasklet_schedule(&jme->pcc_task); |
47220951 | 1547 | } |
79ce639c | 1548 | |
cd0ff491 | 1549 | if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { |
47220951 | 1550 | jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0); |
4330c2f2 | 1551 | tasklet_schedule(&jme->txclean_task); |
47220951 GFT |
1552 | } |
1553 | ||
cd0ff491 | 1554 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
47220951 GFT |
1555 | jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO | |
1556 | INTR_PCCRX0 | | |
1557 | INTR_RX0EMP)) | | |
1558 | INTR_RX0); | |
1559 | } | |
d7699f87 | 1560 | |
cd0ff491 GFT |
1561 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
1562 | if (intrstat & INTR_RX0EMP) | |
192570e0 GFT |
1563 | atomic_inc(&jme->rx_empty); |
1564 | ||
cd0ff491 GFT |
1565 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
1566 | if (likely(JME_RX_SCHEDULE_PREP(jme))) { | |
192570e0 | 1567 | jme_polling_mode(jme); |
cdcdc9eb | 1568 | JME_RX_SCHEDULE(jme); |
192570e0 GFT |
1569 | } |
1570 | } | |
cd0ff491 GFT |
1571 | } else { |
1572 | if (intrstat & INTR_RX0EMP) { | |
cdcdc9eb | 1573 | atomic_inc(&jme->rx_empty); |
cd0ff491 GFT |
1574 | tasklet_hi_schedule(&jme->rxempty_task); |
1575 | } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) { | |
1576 | tasklet_hi_schedule(&jme->rxclean_task); | |
cdcdc9eb | 1577 | } |
4330c2f2 | 1578 | } |
d7699f87 | 1579 | |
29bdd921 | 1580 | out_reenable: |
3bf61c55 | 1581 | /* |
fcf45b4c | 1582 | * Re-enable interrupt |
3bf61c55 | 1583 | */ |
fcf45b4c | 1584 | jwrite32f(jme, JME_IENS, INTR_ENABLE); |
79ce639c GFT |
1585 | } |
1586 | ||
1587 | static irqreturn_t | |
1588 | jme_intr(int irq, void *dev_id) | |
1589 | { | |
cd0ff491 GFT |
1590 | struct net_device *netdev = dev_id; |
1591 | struct jme_adapter *jme = netdev_priv(netdev); | |
1592 | u32 intrstat; | |
79ce639c GFT |
1593 | |
1594 | intrstat = jread32(jme, JME_IEVE); | |
1595 | ||
1596 | /* | |
1597 | * Check if it's really an interrupt for us | |
1598 | */ | |
9b9d55de | 1599 | if (unlikely((intrstat & INTR_ENABLE) == 0)) |
29bdd921 | 1600 | return IRQ_NONE; |
79ce639c GFT |
1601 | |
1602 | /* | |
1603 | * Check if the device still exist | |
1604 | */ | |
cd0ff491 GFT |
1605 | if (unlikely(intrstat == ~((typeof(intrstat))0))) |
1606 | return IRQ_NONE; | |
79ce639c GFT |
1607 | |
1608 | jme_intr_msi(jme, intrstat); | |
1609 | ||
cd0ff491 | 1610 | return IRQ_HANDLED; |
d7699f87 GFT |
1611 | } |
1612 | ||
79ce639c GFT |
1613 | static irqreturn_t |
1614 | jme_msi(int irq, void *dev_id) | |
1615 | { | |
cd0ff491 GFT |
1616 | struct net_device *netdev = dev_id; |
1617 | struct jme_adapter *jme = netdev_priv(netdev); | |
1618 | u32 intrstat; | |
79ce639c | 1619 | |
fa97b924 | 1620 | intrstat = jread32(jme, JME_IEVE); |
79ce639c GFT |
1621 | |
1622 | jme_intr_msi(jme, intrstat); | |
1623 | ||
cd0ff491 | 1624 | return IRQ_HANDLED; |
79ce639c GFT |
1625 | } |
1626 | ||
79ce639c GFT |
1627 | static void |
1628 | jme_reset_link(struct jme_adapter *jme) | |
1629 | { | |
1630 | jwrite32(jme, JME_TMCSR, TMCSR_SWIT); | |
1631 | } | |
1632 | ||
fcf45b4c GFT |
1633 | static void |
1634 | jme_restart_an(struct jme_adapter *jme) | |
1635 | { | |
cd0ff491 | 1636 | u32 bmcr; |
fcf45b4c | 1637 | |
cd0ff491 | 1638 | spin_lock_bh(&jme->phy_lock); |
fcf45b4c GFT |
1639 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1640 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
1641 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
cd0ff491 | 1642 | spin_unlock_bh(&jme->phy_lock); |
79ce639c GFT |
1643 | } |
1644 | ||
1645 | static int | |
1646 | jme_request_irq(struct jme_adapter *jme) | |
1647 | { | |
1648 | int rc; | |
cd0ff491 GFT |
1649 | struct net_device *netdev = jme->dev; |
1650 | irq_handler_t handler = jme_intr; | |
1651 | int irq_flags = IRQF_SHARED; | |
1652 | ||
1653 | if (!pci_enable_msi(jme->pdev)) { | |
1654 | set_bit(JME_FLAG_MSI, &jme->flags); | |
1655 | handler = jme_msi; | |
1656 | irq_flags = 0; | |
1657 | } | |
1658 | ||
1659 | rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, | |
1660 | netdev); | |
1661 | if (rc) { | |
52a46ba8 JP |
1662 | netdev_err(netdev, |
1663 | "Unable to request %s interrupt (return: %d)\n", | |
1664 | test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx", | |
1665 | rc); | |
79ce639c | 1666 | |
cd0ff491 GFT |
1667 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { |
1668 | pci_disable_msi(jme->pdev); | |
1669 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1670 | } |
cd0ff491 | 1671 | } else { |
79ce639c GFT |
1672 | netdev->irq = jme->pdev->irq; |
1673 | } | |
1674 | ||
cd0ff491 | 1675 | return rc; |
79ce639c GFT |
1676 | } |
1677 | ||
1678 | static void | |
1679 | jme_free_irq(struct jme_adapter *jme) | |
1680 | { | |
cd0ff491 GFT |
1681 | free_irq(jme->pdev->irq, jme->dev); |
1682 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { | |
1683 | pci_disable_msi(jme->pdev); | |
1684 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1685 | jme->dev->irq = jme->pdev->irq; |
cd0ff491 | 1686 | } |
fcf45b4c GFT |
1687 | } |
1688 | ||
e4610a83 GFT |
1689 | static inline void |
1690 | jme_new_phy_on(struct jme_adapter *jme) | |
1691 | { | |
1692 | u32 reg; | |
1693 | ||
1694 | reg = jread32(jme, JME_PHY_PWR); | |
1695 | reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | | |
1696 | PHY_PWR_DWN2 | PHY_PWR_CLKSEL); | |
1697 | jwrite32(jme, JME_PHY_PWR, reg); | |
1698 | ||
1699 | pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); | |
1700 | reg &= ~PE1_GPREG0_PBG; | |
1701 | reg |= PE1_GPREG0_ENBG; | |
1702 | pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); | |
1703 | } | |
1704 | ||
1705 | static inline void | |
1706 | jme_new_phy_off(struct jme_adapter *jme) | |
1707 | { | |
1708 | u32 reg; | |
1709 | ||
1710 | reg = jread32(jme, JME_PHY_PWR); | |
1711 | reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | | |
1712 | PHY_PWR_DWN2 | PHY_PWR_CLKSEL; | |
1713 | jwrite32(jme, JME_PHY_PWR, reg); | |
1714 | ||
1715 | pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); | |
1716 | reg &= ~PE1_GPREG0_PBG; | |
1717 | reg |= PE1_GPREG0_PDD3COLD; | |
1718 | pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); | |
1719 | } | |
1720 | ||
48db98f7 GFT |
1721 | static inline void |
1722 | jme_phy_on(struct jme_adapter *jme) | |
1723 | { | |
1724 | u32 bmcr; | |
1725 | ||
1726 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1727 | bmcr &= ~BMCR_PDOWN; | |
1728 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
e4610a83 GFT |
1729 | |
1730 | if (new_phy_power_ctrl(jme->chip_main_rev)) | |
1731 | jme_new_phy_on(jme); | |
1732 | } | |
1733 | ||
1734 | static inline void | |
1735 | jme_phy_off(struct jme_adapter *jme) | |
1736 | { | |
1737 | u32 bmcr; | |
1738 | ||
1739 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1740 | bmcr |= BMCR_PDOWN; | |
1741 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
1742 | ||
1743 | if (new_phy_power_ctrl(jme->chip_main_rev)) | |
1744 | jme_new_phy_off(jme); | |
48db98f7 GFT |
1745 | } |
1746 | ||
314d65d8 AL |
1747 | static int |
1748 | jme_phy_specreg_read(struct jme_adapter *jme, u32 specreg) | |
1749 | { | |
1750 | u32 phy_addr; | |
1751 | ||
1752 | phy_addr = JM_PHY_SPEC_REG_READ | specreg; | |
1753 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_ADDR_REG, | |
1754 | phy_addr); | |
1755 | return jme_mdio_read(jme->dev, jme->mii_if.phy_id, | |
1756 | JM_PHY_SPEC_DATA_REG); | |
1757 | } | |
1758 | ||
1759 | static void | |
1760 | jme_phy_specreg_write(struct jme_adapter *jme, u32 ext_reg, u32 phy_data) | |
1761 | { | |
1762 | u32 phy_addr; | |
1763 | ||
1764 | phy_addr = JM_PHY_SPEC_REG_WRITE | ext_reg; | |
1765 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_DATA_REG, | |
1766 | phy_data); | |
1767 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_ADDR_REG, | |
1768 | phy_addr); | |
1769 | } | |
1770 | ||
1771 | static int | |
1772 | jme_phy_calibration(struct jme_adapter *jme) | |
1773 | { | |
1774 | u32 ctrl1000, phy_data; | |
1775 | ||
1776 | jme_phy_off(jme); | |
1777 | jme_phy_on(jme); | |
1778 | /* Enabel PHY test mode 1 */ | |
1779 | ctrl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000); | |
1780 | ctrl1000 &= ~PHY_GAD_TEST_MODE_MSK; | |
1781 | ctrl1000 |= PHY_GAD_TEST_MODE_1; | |
1782 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, ctrl1000); | |
1783 | ||
1784 | phy_data = jme_phy_specreg_read(jme, JM_PHY_EXT_COMM_2_REG); | |
1785 | phy_data &= ~JM_PHY_EXT_COMM_2_CALI_MODE_0; | |
1786 | phy_data |= JM_PHY_EXT_COMM_2_CALI_LATCH | | |
1787 | JM_PHY_EXT_COMM_2_CALI_ENABLE; | |
1788 | jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_2_REG, phy_data); | |
1789 | msleep(20); | |
1790 | phy_data = jme_phy_specreg_read(jme, JM_PHY_EXT_COMM_2_REG); | |
1791 | phy_data &= ~(JM_PHY_EXT_COMM_2_CALI_ENABLE | | |
1792 | JM_PHY_EXT_COMM_2_CALI_MODE_0 | | |
1793 | JM_PHY_EXT_COMM_2_CALI_LATCH); | |
1794 | jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_2_REG, phy_data); | |
1795 | ||
1796 | /* Disable PHY test mode */ | |
1797 | ctrl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000); | |
1798 | ctrl1000 &= ~PHY_GAD_TEST_MODE_MSK; | |
1799 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, ctrl1000); | |
1800 | return 0; | |
1801 | } | |
1802 | ||
1803 | static int | |
1804 | jme_phy_setEA(struct jme_adapter *jme) | |
1805 | { | |
1806 | u32 phy_comm0 = 0, phy_comm1 = 0; | |
1807 | u8 nic_ctrl; | |
1808 | ||
1809 | pci_read_config_byte(jme->pdev, PCI_PRIV_SHARE_NICCTRL, &nic_ctrl); | |
1810 | if ((nic_ctrl & 0x3) == JME_FLAG_PHYEA_ENABLE) | |
1811 | return 0; | |
1812 | ||
1813 | switch (jme->pdev->device) { | |
1814 | case PCI_DEVICE_ID_JMICRON_JMC250: | |
1815 | if (((jme->chip_main_rev == 5) && | |
1816 | ((jme->chip_sub_rev == 0) || (jme->chip_sub_rev == 1) || | |
1817 | (jme->chip_sub_rev == 3))) || | |
1818 | (jme->chip_main_rev >= 6)) { | |
1819 | phy_comm0 = 0x008A; | |
1820 | phy_comm1 = 0x4109; | |
1821 | } | |
1822 | if ((jme->chip_main_rev == 3) && | |
1823 | ((jme->chip_sub_rev == 1) || (jme->chip_sub_rev == 2))) | |
1824 | phy_comm0 = 0xE088; | |
1825 | break; | |
1826 | case PCI_DEVICE_ID_JMICRON_JMC260: | |
1827 | if (((jme->chip_main_rev == 5) && | |
1828 | ((jme->chip_sub_rev == 0) || (jme->chip_sub_rev == 1) || | |
1829 | (jme->chip_sub_rev == 3))) || | |
1830 | (jme->chip_main_rev >= 6)) { | |
1831 | phy_comm0 = 0x008A; | |
1832 | phy_comm1 = 0x4109; | |
1833 | } | |
1834 | if ((jme->chip_main_rev == 3) && | |
1835 | ((jme->chip_sub_rev == 1) || (jme->chip_sub_rev == 2))) | |
1836 | phy_comm0 = 0xE088; | |
1837 | if ((jme->chip_main_rev == 2) && (jme->chip_sub_rev == 0)) | |
1838 | phy_comm0 = 0x608A; | |
1839 | if ((jme->chip_main_rev == 2) && (jme->chip_sub_rev == 2)) | |
1840 | phy_comm0 = 0x408A; | |
1841 | break; | |
1842 | default: | |
1843 | return -ENODEV; | |
1844 | } | |
1845 | if (phy_comm0) | |
1846 | jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_0_REG, phy_comm0); | |
1847 | if (phy_comm1) | |
1848 | jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_1_REG, phy_comm1); | |
1849 | ||
1850 | return 0; | |
1851 | } | |
1852 | ||
3bf61c55 GFT |
1853 | static int |
1854 | jme_open(struct net_device *netdev) | |
d7699f87 GFT |
1855 | { |
1856 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 1857 | int rc; |
79ce639c | 1858 | |
42b1055e | 1859 | jme_clear_pm(jme); |
cdcdc9eb | 1860 | JME_NAPI_ENABLE(jme); |
d7699f87 | 1861 | |
fa97b924 | 1862 | tasklet_enable(&jme->linkch_task); |
cd0ff491 GFT |
1863 | tasklet_enable(&jme->txclean_task); |
1864 | tasklet_hi_enable(&jme->rxclean_task); | |
1865 | tasklet_hi_enable(&jme->rxempty_task); | |
1866 | ||
79ce639c | 1867 | rc = jme_request_irq(jme); |
cd0ff491 | 1868 | if (rc) |
4330c2f2 | 1869 | goto err_out; |
79ce639c | 1870 | |
d7699f87 | 1871 | jme_start_irq(jme); |
42b1055e | 1872 | |
e4610a83 GFT |
1873 | jme_phy_on(jme); |
1874 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
42b1055e | 1875 | jme_set_settings(netdev, &jme->old_ecmd); |
e4610a83 | 1876 | else |
42b1055e | 1877 | jme_reset_phy_processor(jme); |
314d65d8 AL |
1878 | jme_phy_calibration(jme); |
1879 | jme_phy_setEA(jme); | |
29bdd921 | 1880 | jme_reset_link(jme); |
d7699f87 GFT |
1881 | |
1882 | return 0; | |
1883 | ||
d7699f87 GFT |
1884 | err_out: |
1885 | netif_stop_queue(netdev); | |
1886 | netif_carrier_off(netdev); | |
4330c2f2 | 1887 | return rc; |
d7699f87 GFT |
1888 | } |
1889 | ||
42b1055e GFT |
1890 | static void |
1891 | jme_set_100m_half(struct jme_adapter *jme) | |
1892 | { | |
cd0ff491 | 1893 | u32 bmcr, tmp; |
42b1055e | 1894 | |
fba4bc0c | 1895 | jme_phy_on(jme); |
42b1055e GFT |
1896 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1897 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | | |
1898 | BMCR_SPEED1000 | BMCR_FULLDPLX); | |
1899 | tmp |= BMCR_SPEED100; | |
1900 | ||
1901 | if (bmcr != tmp) | |
1902 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp); | |
1903 | ||
cd0ff491 | 1904 | if (jme->fpgaver) |
cdcdc9eb GFT |
1905 | jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL); |
1906 | else | |
1907 | jwrite32(jme, JME_GHC, GHC_SPEED_100M); | |
42b1055e GFT |
1908 | } |
1909 | ||
47220951 GFT |
1910 | #define JME_WAIT_LINK_TIME 2000 /* 2000ms */ |
1911 | static void | |
1912 | jme_wait_link(struct jme_adapter *jme) | |
1913 | { | |
cd0ff491 | 1914 | u32 phylink, to = JME_WAIT_LINK_TIME; |
47220951 GFT |
1915 | |
1916 | mdelay(1000); | |
1917 | phylink = jme_linkstat_from_phy(jme); | |
cd0ff491 | 1918 | while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { |
47220951 GFT |
1919 | mdelay(10); |
1920 | phylink = jme_linkstat_from_phy(jme); | |
1921 | } | |
1922 | } | |
1923 | ||
fba4bc0c GFT |
1924 | static void |
1925 | jme_powersave_phy(struct jme_adapter *jme) | |
1926 | { | |
1927 | if (jme->reg_pmcs) { | |
1928 | jme_set_100m_half(jme); | |
fba4bc0c GFT |
1929 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
1930 | jme_wait_link(jme); | |
18783c49 | 1931 | jme_clear_pm(jme); |
fba4bc0c GFT |
1932 | } else { |
1933 | jme_phy_off(jme); | |
1934 | } | |
1935 | } | |
1936 | ||
3bf61c55 GFT |
1937 | static int |
1938 | jme_close(struct net_device *netdev) | |
d7699f87 GFT |
1939 | { |
1940 | struct jme_adapter *jme = netdev_priv(netdev); | |
1941 | ||
1942 | netif_stop_queue(netdev); | |
1943 | netif_carrier_off(netdev); | |
1944 | ||
1945 | jme_stop_irq(jme); | |
79ce639c | 1946 | jme_free_irq(jme); |
d7699f87 | 1947 | |
cdcdc9eb | 1948 | JME_NAPI_DISABLE(jme); |
192570e0 | 1949 | |
fa97b924 GFT |
1950 | tasklet_disable(&jme->linkch_task); |
1951 | tasklet_disable(&jme->txclean_task); | |
1952 | tasklet_disable(&jme->rxclean_task); | |
1953 | tasklet_disable(&jme->rxempty_task); | |
8c198884 | 1954 | |
cd0ff491 GFT |
1955 | jme_disable_rx_engine(jme); |
1956 | jme_disable_tx_engine(jme); | |
8c198884 | 1957 | jme_reset_mac_processor(jme); |
d7699f87 GFT |
1958 | jme_free_rx_resources(jme); |
1959 | jme_free_tx_resources(jme); | |
42b1055e | 1960 | jme->phylink = 0; |
b3821cc5 GFT |
1961 | jme_phy_off(jme); |
1962 | ||
1963 | return 0; | |
1964 | } | |
1965 | ||
1966 | static int | |
1967 | jme_alloc_txdesc(struct jme_adapter *jme, | |
1968 | struct sk_buff *skb) | |
1969 | { | |
fa97b924 | 1970 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1971 | int idx, nr_alloc, mask = jme->tx_ring_mask; |
1972 | ||
1973 | idx = txring->next_to_use; | |
1974 | nr_alloc = skb_shinfo(skb)->nr_frags + 2; | |
1975 | ||
cd0ff491 | 1976 | if (unlikely(atomic_read(&txring->nr_free) < nr_alloc)) |
b3821cc5 GFT |
1977 | return -1; |
1978 | ||
1979 | atomic_sub(nr_alloc, &txring->nr_free); | |
42b1055e | 1980 | |
b3821cc5 GFT |
1981 | txring->next_to_use = (txring->next_to_use + nr_alloc) & mask; |
1982 | ||
1983 | return idx; | |
1984 | } | |
1985 | ||
1986 | static void | |
1987 | jme_fill_tx_map(struct pci_dev *pdev, | |
cd0ff491 | 1988 | struct txdesc *txdesc, |
b3821cc5 GFT |
1989 | struct jme_buffer_info *txbi, |
1990 | struct page *page, | |
cd0ff491 GFT |
1991 | u32 page_offset, |
1992 | u32 len, | |
f0a10b93 | 1993 | bool hidma) |
b3821cc5 GFT |
1994 | { |
1995 | dma_addr_t dmaaddr; | |
1996 | ||
1997 | dmaaddr = pci_map_page(pdev, | |
1998 | page, | |
1999 | page_offset, | |
2000 | len, | |
2001 | PCI_DMA_TODEVICE); | |
2002 | ||
2003 | pci_dma_sync_single_for_device(pdev, | |
2004 | dmaaddr, | |
2005 | len, | |
2006 | PCI_DMA_TODEVICE); | |
2007 | ||
2008 | txdesc->dw[0] = 0; | |
2009 | txdesc->dw[1] = 0; | |
2010 | txdesc->desc2.flags = TXFLAG_OWN; | |
cd0ff491 | 2011 | txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0; |
b3821cc5 GFT |
2012 | txdesc->desc2.datalen = cpu_to_le16(len); |
2013 | txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32); | |
2014 | txdesc->desc2.bufaddrl = cpu_to_le32( | |
2015 | (__u64)dmaaddr & 0xFFFFFFFFUL); | |
2016 | ||
2017 | txbi->mapping = dmaaddr; | |
2018 | txbi->len = len; | |
2019 | } | |
2020 | ||
2021 | static void | |
2022 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
2023 | { | |
fa97b924 | 2024 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 2025 | struct txdesc *txdesc = txring->desc, *ctxdesc; |
b3821cc5 | 2026 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; |
f0a10b93 | 2027 | bool hidma = jme->dev->features & NETIF_F_HIGHDMA; |
b3821cc5 GFT |
2028 | int i, nr_frags = skb_shinfo(skb)->nr_frags; |
2029 | int mask = jme->tx_ring_mask; | |
0da918aa | 2030 | const struct skb_frag_struct *frag; |
cd0ff491 | 2031 | u32 len; |
b3821cc5 | 2032 | |
cd0ff491 GFT |
2033 | for (i = 0 ; i < nr_frags ; ++i) { |
2034 | frag = &skb_shinfo(skb)->frags[i]; | |
b3821cc5 GFT |
2035 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); |
2036 | ctxbi = txbi + ((idx + i + 2) & (mask)); | |
2037 | ||
608a9fae IC |
2038 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, |
2039 | skb_frag_page(frag), | |
0da918aa | 2040 | frag->page_offset, skb_frag_size(frag), hidma); |
42b1055e | 2041 | } |
b3821cc5 | 2042 | |
cd0ff491 | 2043 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
b3821cc5 GFT |
2044 | ctxdesc = txdesc + ((idx + 1) & (mask)); |
2045 | ctxbi = txbi + ((idx + 1) & (mask)); | |
2046 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
2047 | offset_in_page(skb->data), len, hidma); | |
2048 | ||
2049 | } | |
2050 | ||
2051 | static int | |
2052 | jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) | |
2053 | { | |
cd0ff491 | 2054 | if (unlikely(skb_shinfo(skb)->gso_size && |
b3821cc5 GFT |
2055 | skb_header_cloned(skb) && |
2056 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) { | |
2057 | dev_kfree_skb(skb); | |
2058 | return -1; | |
2059 | } | |
2060 | ||
2061 | return 0; | |
2062 | } | |
2063 | ||
2064 | static int | |
94c5ea02 | 2065 | jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags) |
b3821cc5 | 2066 | { |
94c5ea02 | 2067 | *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT); |
cd0ff491 | 2068 | if (*mss) { |
b3821cc5 GFT |
2069 | *flags |= TXFLAG_LSEN; |
2070 | ||
cd0ff491 | 2071 | if (skb->protocol == htons(ETH_P_IP)) { |
b3821cc5 GFT |
2072 | struct iphdr *iph = ip_hdr(skb); |
2073 | ||
2074 | iph->check = 0; | |
cd0ff491 | 2075 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
b3821cc5 GFT |
2076 | iph->daddr, 0, |
2077 | IPPROTO_TCP, | |
2078 | 0); | |
cd0ff491 | 2079 | } else { |
b3821cc5 GFT |
2080 | struct ipv6hdr *ip6h = ipv6_hdr(skb); |
2081 | ||
cd0ff491 | 2082 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, |
b3821cc5 GFT |
2083 | &ip6h->daddr, 0, |
2084 | IPPROTO_TCP, | |
2085 | 0); | |
2086 | } | |
2087 | ||
2088 | return 0; | |
2089 | } | |
2090 | ||
2091 | return 1; | |
2092 | } | |
2093 | ||
2094 | static void | |
cd0ff491 | 2095 | jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags) |
b3821cc5 | 2096 | { |
cd0ff491 GFT |
2097 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
2098 | u8 ip_proto; | |
b3821cc5 GFT |
2099 | |
2100 | switch (skb->protocol) { | |
cd0ff491 | 2101 | case htons(ETH_P_IP): |
b3821cc5 GFT |
2102 | ip_proto = ip_hdr(skb)->protocol; |
2103 | break; | |
cd0ff491 | 2104 | case htons(ETH_P_IPV6): |
b3821cc5 GFT |
2105 | ip_proto = ipv6_hdr(skb)->nexthdr; |
2106 | break; | |
2107 | default: | |
2108 | ip_proto = 0; | |
2109 | break; | |
2110 | } | |
2111 | ||
cd0ff491 | 2112 | switch (ip_proto) { |
b3821cc5 GFT |
2113 | case IPPROTO_TCP: |
2114 | *flags |= TXFLAG_TCPCS; | |
2115 | break; | |
2116 | case IPPROTO_UDP: | |
2117 | *flags |= TXFLAG_UDPCS; | |
2118 | break; | |
2119 | default: | |
52a46ba8 | 2120 | netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n"); |
b3821cc5 GFT |
2121 | break; |
2122 | } | |
2123 | } | |
2124 | } | |
2125 | ||
cd0ff491 | 2126 | static inline void |
94c5ea02 | 2127 | jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags) |
b3821cc5 | 2128 | { |
cd0ff491 | 2129 | if (vlan_tx_tag_present(skb)) { |
b3821cc5 | 2130 | *flags |= TXFLAG_TAGON; |
94c5ea02 | 2131 | *vlan = cpu_to_le16(vlan_tx_tag_get(skb)); |
42b1055e | 2132 | } |
b3821cc5 GFT |
2133 | } |
2134 | ||
2135 | static int | |
94c5ea02 | 2136 | jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) |
b3821cc5 | 2137 | { |
fa97b924 | 2138 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 2139 | struct txdesc *txdesc; |
b3821cc5 | 2140 | struct jme_buffer_info *txbi; |
cd0ff491 | 2141 | u8 flags; |
b3821cc5 | 2142 | |
cd0ff491 | 2143 | txdesc = (struct txdesc *)txring->desc + idx; |
b3821cc5 GFT |
2144 | txbi = txring->bufinf + idx; |
2145 | ||
2146 | txdesc->dw[0] = 0; | |
2147 | txdesc->dw[1] = 0; | |
2148 | txdesc->dw[2] = 0; | |
2149 | txdesc->dw[3] = 0; | |
2150 | txdesc->desc1.pktsize = cpu_to_le16(skb->len); | |
2151 | /* | |
2152 | * Set OWN bit at final. | |
2153 | * When kernel transmit faster than NIC. | |
2154 | * And NIC trying to send this descriptor before we tell | |
2155 | * it to start sending this TX queue. | |
2156 | * Other fields are already filled correctly. | |
2157 | */ | |
2158 | wmb(); | |
2159 | flags = TXFLAG_OWN | TXFLAG_INT; | |
cd0ff491 GFT |
2160 | /* |
2161 | * Set checksum flags while not tso | |
2162 | */ | |
2163 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) | |
2164 | jme_tx_csum(jme, skb, &flags); | |
b3821cc5 | 2165 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); |
94c5ea02 | 2166 | jme_map_tx_skb(jme, skb, idx); |
b3821cc5 GFT |
2167 | txdesc->desc1.flags = flags; |
2168 | /* | |
2169 | * Set tx buffer info after telling NIC to send | |
2170 | * For better tx_clean timing | |
2171 | */ | |
2172 | wmb(); | |
2173 | txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2; | |
2174 | txbi->skb = skb; | |
2175 | txbi->len = skb->len; | |
cd0ff491 GFT |
2176 | txbi->start_xmit = jiffies; |
2177 | if (!txbi->start_xmit) | |
8d27293f | 2178 | txbi->start_xmit = (0UL-1); |
d7699f87 GFT |
2179 | |
2180 | return 0; | |
2181 | } | |
2182 | ||
b3821cc5 GFT |
2183 | static void |
2184 | jme_stop_queue_if_full(struct jme_adapter *jme) | |
2185 | { | |
fa97b924 | 2186 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 GFT |
2187 | struct jme_buffer_info *txbi = txring->bufinf; |
2188 | int idx = atomic_read(&txring->next_to_clean); | |
cdcdc9eb | 2189 | |
cd0ff491 | 2190 | txbi += idx; |
b3821cc5 GFT |
2191 | |
2192 | smp_wmb(); | |
cd0ff491 | 2193 | if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { |
b3821cc5 | 2194 | netif_stop_queue(jme->dev); |
52a46ba8 | 2195 | netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n"); |
b3821cc5 | 2196 | smp_wmb(); |
cd0ff491 GFT |
2197 | if (atomic_read(&txring->nr_free) |
2198 | >= (jme->tx_wake_threshold)) { | |
b3821cc5 | 2199 | netif_wake_queue(jme->dev); |
52a46ba8 | 2200 | netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n"); |
b3821cc5 GFT |
2201 | } |
2202 | } | |
2203 | ||
cd0ff491 | 2204 | if (unlikely(txbi->start_xmit && |
cdcdc9eb GFT |
2205 | (jiffies - txbi->start_xmit) >= TX_TIMEOUT && |
2206 | txbi->skb)) { | |
2207 | netif_stop_queue(jme->dev); | |
52a46ba8 JP |
2208 | netif_info(jme, tx_queued, jme->dev, |
2209 | "TX Queue Stopped %d@%lu\n", idx, jiffies); | |
cdcdc9eb | 2210 | } |
b3821cc5 GFT |
2211 | } |
2212 | ||
3bf61c55 GFT |
2213 | /* |
2214 | * This function is already protected by netif_tx_lock() | |
2215 | */ | |
cd0ff491 | 2216 | |
c97b5740 | 2217 | static netdev_tx_t |
3bf61c55 | 2218 | jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) |
d7699f87 | 2219 | { |
cd0ff491 | 2220 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2221 | int idx; |
d7699f87 | 2222 | |
cd0ff491 | 2223 | if (unlikely(jme_expand_header(jme, skb))) { |
b3821cc5 GFT |
2224 | ++(NET_STAT(jme).tx_dropped); |
2225 | return NETDEV_TX_OK; | |
2226 | } | |
2227 | ||
2228 | idx = jme_alloc_txdesc(jme, skb); | |
79ce639c | 2229 | |
cd0ff491 | 2230 | if (unlikely(idx < 0)) { |
b3821cc5 | 2231 | netif_stop_queue(netdev); |
52a46ba8 JP |
2232 | netif_err(jme, tx_err, jme->dev, |
2233 | "BUG! Tx ring full when queue awake!\n"); | |
d7699f87 | 2234 | |
cd0ff491 | 2235 | return NETDEV_TX_BUSY; |
b3821cc5 GFT |
2236 | } |
2237 | ||
94c5ea02 | 2238 | jme_fill_tx_desc(jme, skb, idx); |
b3821cc5 | 2239 | |
4330c2f2 GFT |
2240 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
2241 | TXCS_SELECT_QUEUE0 | | |
2242 | TXCS_QUEUE0S | | |
2243 | TXCS_ENABLE); | |
d7699f87 | 2244 | |
52a46ba8 JP |
2245 | tx_dbg(jme, "xmit: %d+%d@%lu\n", |
2246 | idx, skb_shinfo(skb)->nr_frags + 2, jiffies); | |
b3821cc5 GFT |
2247 | jme_stop_queue_if_full(jme); |
2248 | ||
cd0ff491 | 2249 | return NETDEV_TX_OK; |
d7699f87 GFT |
2250 | } |
2251 | ||
bb4c5c8c GFT |
2252 | static void |
2253 | jme_set_unicastaddr(struct net_device *netdev) | |
2254 | { | |
2255 | struct jme_adapter *jme = netdev_priv(netdev); | |
2256 | u32 val; | |
2257 | ||
2258 | val = (netdev->dev_addr[3] & 0xff) << 24 | | |
2259 | (netdev->dev_addr[2] & 0xff) << 16 | | |
2260 | (netdev->dev_addr[1] & 0xff) << 8 | | |
2261 | (netdev->dev_addr[0] & 0xff); | |
2262 | jwrite32(jme, JME_RXUMA_LO, val); | |
2263 | val = (netdev->dev_addr[5] & 0xff) << 8 | | |
2264 | (netdev->dev_addr[4] & 0xff); | |
2265 | jwrite32(jme, JME_RXUMA_HI, val); | |
2266 | } | |
2267 | ||
3bf61c55 GFT |
2268 | static int |
2269 | jme_set_macaddr(struct net_device *netdev, void *p) | |
d7699f87 | 2270 | { |
cd0ff491 | 2271 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2272 | struct sockaddr *addr = p; |
d7699f87 | 2273 | |
cd0ff491 | 2274 | if (netif_running(netdev)) |
d7699f87 GFT |
2275 | return -EBUSY; |
2276 | ||
cd0ff491 | 2277 | spin_lock_bh(&jme->macaddr_lock); |
d7699f87 | 2278 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
bb4c5c8c | 2279 | jme_set_unicastaddr(netdev); |
cd0ff491 | 2280 | spin_unlock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
2281 | |
2282 | return 0; | |
2283 | } | |
2284 | ||
3bf61c55 GFT |
2285 | static void |
2286 | jme_set_multi(struct net_device *netdev) | |
d7699f87 | 2287 | { |
3bf61c55 | 2288 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2289 | u32 mc_hash[2] = {}; |
d7699f87 | 2290 | |
cd0ff491 | 2291 | spin_lock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2292 | |
2293 | jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME; | |
d7699f87 | 2294 | |
cd0ff491 | 2295 | if (netdev->flags & IFF_PROMISC) { |
8c198884 | 2296 | jme->reg_rxmcs |= RXMCS_ALLFRAME; |
cd0ff491 | 2297 | } else if (netdev->flags & IFF_ALLMULTI) { |
8c198884 | 2298 | jme->reg_rxmcs |= RXMCS_ALLMULFRAME; |
cd0ff491 | 2299 | } else if (netdev->flags & IFF_MULTICAST) { |
d401cb9a | 2300 | struct netdev_hw_addr *ha; |
3bf61c55 | 2301 | int bit_nr; |
d7699f87 | 2302 | |
8c198884 | 2303 | jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED; |
d401cb9a JP |
2304 | netdev_for_each_mc_addr(ha, netdev) { |
2305 | bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F; | |
cd0ff491 GFT |
2306 | mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); |
2307 | } | |
d7699f87 | 2308 | |
4330c2f2 GFT |
2309 | jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]); |
2310 | jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]); | |
d7699f87 GFT |
2311 | } |
2312 | ||
d7699f87 | 2313 | wmb(); |
8c198884 GFT |
2314 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); |
2315 | ||
cd0ff491 | 2316 | spin_unlock_bh(&jme->rxmcs_lock); |
d7699f87 GFT |
2317 | } |
2318 | ||
3bf61c55 | 2319 | static int |
8c198884 | 2320 | jme_change_mtu(struct net_device *netdev, int new_mtu) |
d7699f87 | 2321 | { |
cd0ff491 | 2322 | struct jme_adapter *jme = netdev_priv(netdev); |
79ce639c | 2323 | |
cd0ff491 | 2324 | if (new_mtu == jme->old_mtu) |
29bdd921 GFT |
2325 | return 0; |
2326 | ||
cd0ff491 GFT |
2327 | if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || |
2328 | ((new_mtu) < IPV6_MIN_MTU)) | |
2329 | return -EINVAL; | |
79ce639c | 2330 | |
79ce639c | 2331 | |
cd0ff491 | 2332 | netdev->mtu = new_mtu; |
aa4d6a67 MM |
2333 | netdev_update_features(netdev); |
2334 | ||
a528441e | 2335 | jme_restart_rx_engine(jme); |
cd0ff491 | 2336 | jme_reset_link(jme); |
79ce639c GFT |
2337 | |
2338 | return 0; | |
d7699f87 GFT |
2339 | } |
2340 | ||
8c198884 GFT |
2341 | static void |
2342 | jme_tx_timeout(struct net_device *netdev) | |
2343 | { | |
cd0ff491 | 2344 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 | 2345 | |
cdcdc9eb GFT |
2346 | jme->phylink = 0; |
2347 | jme_reset_phy_processor(jme); | |
cd0ff491 | 2348 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
cdcdc9eb GFT |
2349 | jme_set_settings(netdev, &jme->old_ecmd); |
2350 | ||
8c198884 | 2351 | /* |
cdcdc9eb | 2352 | * Force to Reset the link again |
8c198884 | 2353 | */ |
29bdd921 | 2354 | jme_reset_link(jme); |
8c198884 GFT |
2355 | } |
2356 | ||
f7f428e4 GFT |
2357 | static inline void jme_pause_rx(struct jme_adapter *jme) |
2358 | { | |
2359 | atomic_dec(&jme->link_changing); | |
2360 | ||
2361 | jme_set_rx_pcc(jme, PCC_OFF); | |
2362 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2363 | JME_NAPI_DISABLE(jme); | |
2364 | } else { | |
2365 | tasklet_disable(&jme->rxclean_task); | |
2366 | tasklet_disable(&jme->rxempty_task); | |
2367 | } | |
2368 | } | |
2369 | ||
2370 | static inline void jme_resume_rx(struct jme_adapter *jme) | |
2371 | { | |
2372 | struct dynpcc_info *dpi = &(jme->dpi); | |
2373 | ||
2374 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2375 | JME_NAPI_ENABLE(jme); | |
2376 | } else { | |
2377 | tasklet_hi_enable(&jme->rxclean_task); | |
2378 | tasklet_hi_enable(&jme->rxempty_task); | |
2379 | } | |
2380 | dpi->cur = PCC_P1; | |
2381 | dpi->attempt = PCC_P1; | |
2382 | dpi->cnt = 0; | |
2383 | jme_set_rx_pcc(jme, PCC_P1); | |
2384 | ||
2385 | atomic_inc(&jme->link_changing); | |
2386 | } | |
2387 | ||
3bf61c55 GFT |
2388 | static void |
2389 | jme_get_drvinfo(struct net_device *netdev, | |
2390 | struct ethtool_drvinfo *info) | |
d7699f87 | 2391 | { |
cd0ff491 | 2392 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2393 | |
3f88967d RJ |
2394 | strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); |
2395 | strlcpy(info->version, DRV_VERSION, sizeof(info->version)); | |
2396 | strlcpy(info->bus_info, pci_name(jme->pdev), sizeof(info->bus_info)); | |
d7699f87 GFT |
2397 | } |
2398 | ||
8c198884 GFT |
2399 | static int |
2400 | jme_get_regs_len(struct net_device *netdev) | |
2401 | { | |
cd0ff491 | 2402 | return JME_REG_LEN; |
8c198884 GFT |
2403 | } |
2404 | ||
2405 | static void | |
cd0ff491 | 2406 | mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len) |
8c198884 GFT |
2407 | { |
2408 | int i; | |
2409 | ||
cd0ff491 | 2410 | for (i = 0 ; i < len ; i += 4) |
79ce639c | 2411 | p[i >> 2] = jread32(jme, reg + i); |
186fc259 | 2412 | } |
8c198884 | 2413 | |
186fc259 | 2414 | static void |
cd0ff491 | 2415 | mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) |
186fc259 GFT |
2416 | { |
2417 | int i; | |
cd0ff491 | 2418 | u16 *p16 = (u16 *)p; |
186fc259 | 2419 | |
cd0ff491 | 2420 | for (i = 0 ; i < reg_nr ; ++i) |
186fc259 | 2421 | p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i); |
8c198884 GFT |
2422 | } |
2423 | ||
2424 | static void | |
2425 | jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) | |
2426 | { | |
cd0ff491 GFT |
2427 | struct jme_adapter *jme = netdev_priv(netdev); |
2428 | u32 *p32 = (u32 *)p; | |
8c198884 | 2429 | |
186fc259 | 2430 | memset(p, 0xFF, JME_REG_LEN); |
8c198884 GFT |
2431 | |
2432 | regs->version = 1; | |
2433 | mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN); | |
2434 | ||
2435 | p32 += 0x100 >> 2; | |
2436 | mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN); | |
2437 | ||
2438 | p32 += 0x100 >> 2; | |
2439 | mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN); | |
2440 | ||
2441 | p32 += 0x100 >> 2; | |
2442 | mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN); | |
2443 | ||
186fc259 GFT |
2444 | p32 += 0x100 >> 2; |
2445 | mdio_memcpy(jme, p32, JME_PHY_REG_NR); | |
8c198884 GFT |
2446 | } |
2447 | ||
2448 | static int | |
2449 | jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2450 | { | |
2451 | struct jme_adapter *jme = netdev_priv(netdev); | |
2452 | ||
8c198884 GFT |
2453 | ecmd->tx_coalesce_usecs = PCC_TX_TO; |
2454 | ecmd->tx_max_coalesced_frames = PCC_TX_CNT; | |
2455 | ||
cd0ff491 | 2456 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
cdcdc9eb GFT |
2457 | ecmd->use_adaptive_rx_coalesce = false; |
2458 | ecmd->rx_coalesce_usecs = 0; | |
2459 | ecmd->rx_max_coalesced_frames = 0; | |
2460 | return 0; | |
2461 | } | |
2462 | ||
2463 | ecmd->use_adaptive_rx_coalesce = true; | |
2464 | ||
cd0ff491 | 2465 | switch (jme->dpi.cur) { |
8c198884 GFT |
2466 | case PCC_P1: |
2467 | ecmd->rx_coalesce_usecs = PCC_P1_TO; | |
2468 | ecmd->rx_max_coalesced_frames = PCC_P1_CNT; | |
2469 | break; | |
2470 | case PCC_P2: | |
2471 | ecmd->rx_coalesce_usecs = PCC_P2_TO; | |
2472 | ecmd->rx_max_coalesced_frames = PCC_P2_CNT; | |
2473 | break; | |
2474 | case PCC_P3: | |
2475 | ecmd->rx_coalesce_usecs = PCC_P3_TO; | |
2476 | ecmd->rx_max_coalesced_frames = PCC_P3_CNT; | |
2477 | break; | |
2478 | default: | |
2479 | break; | |
2480 | } | |
2481 | ||
2482 | return 0; | |
2483 | } | |
2484 | ||
192570e0 GFT |
2485 | static int |
2486 | jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2487 | { | |
2488 | struct jme_adapter *jme = netdev_priv(netdev); | |
2489 | struct dynpcc_info *dpi = &(jme->dpi); | |
2490 | ||
cd0ff491 | 2491 | if (netif_running(netdev)) |
cdcdc9eb GFT |
2492 | return -EBUSY; |
2493 | ||
c97b5740 GFT |
2494 | if (ecmd->use_adaptive_rx_coalesce && |
2495 | test_bit(JME_FLAG_POLL, &jme->flags)) { | |
cd0ff491 | 2496 | clear_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb | 2497 | jme->jme_rx = netif_rx; |
192570e0 GFT |
2498 | dpi->cur = PCC_P1; |
2499 | dpi->attempt = PCC_P1; | |
2500 | dpi->cnt = 0; | |
2501 | jme_set_rx_pcc(jme, PCC_P1); | |
2502 | jme_interrupt_mode(jme); | |
c97b5740 GFT |
2503 | } else if (!(ecmd->use_adaptive_rx_coalesce) && |
2504 | !(test_bit(JME_FLAG_POLL, &jme->flags))) { | |
cd0ff491 | 2505 | set_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb | 2506 | jme->jme_rx = netif_receive_skb; |
192570e0 GFT |
2507 | jme_interrupt_mode(jme); |
2508 | } | |
2509 | ||
2510 | return 0; | |
2511 | } | |
2512 | ||
8c198884 GFT |
2513 | static void |
2514 | jme_get_pauseparam(struct net_device *netdev, | |
2515 | struct ethtool_pauseparam *ecmd) | |
2516 | { | |
2517 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2518 | u32 val; |
8c198884 GFT |
2519 | |
2520 | ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0; | |
2521 | ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0; | |
2522 | ||
cd0ff491 GFT |
2523 | spin_lock_bh(&jme->phy_lock); |
2524 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2525 | spin_unlock_bh(&jme->phy_lock); | |
b3821cc5 GFT |
2526 | |
2527 | ecmd->autoneg = | |
2528 | (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0; | |
8c198884 GFT |
2529 | } |
2530 | ||
2531 | static int | |
2532 | jme_set_pauseparam(struct net_device *netdev, | |
2533 | struct ethtool_pauseparam *ecmd) | |
2534 | { | |
2535 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2536 | u32 val; |
8c198884 | 2537 | |
cd0ff491 | 2538 | if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^ |
8c198884 GFT |
2539 | (ecmd->tx_pause != 0)) { |
2540 | ||
cd0ff491 | 2541 | if (ecmd->tx_pause) |
8c198884 GFT |
2542 | jme->reg_txpfc |= TXPFC_PF_EN; |
2543 | else | |
2544 | jme->reg_txpfc &= ~TXPFC_PF_EN; | |
2545 | ||
2546 | jwrite32(jme, JME_TXPFC, jme->reg_txpfc); | |
2547 | } | |
2548 | ||
cd0ff491 GFT |
2549 | spin_lock_bh(&jme->rxmcs_lock); |
2550 | if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^ | |
8c198884 GFT |
2551 | (ecmd->rx_pause != 0)) { |
2552 | ||
cd0ff491 | 2553 | if (ecmd->rx_pause) |
8c198884 GFT |
2554 | jme->reg_rxmcs |= RXMCS_FLOWCTRL; |
2555 | else | |
2556 | jme->reg_rxmcs &= ~RXMCS_FLOWCTRL; | |
2557 | ||
2558 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2559 | } | |
cd0ff491 | 2560 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 | 2561 | |
cd0ff491 GFT |
2562 | spin_lock_bh(&jme->phy_lock); |
2563 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2564 | if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^ | |
8c198884 GFT |
2565 | (ecmd->autoneg != 0)) { |
2566 | ||
cd0ff491 | 2567 | if (ecmd->autoneg) |
8c198884 GFT |
2568 | val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
2569 | else | |
2570 | val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
2571 | ||
b3821cc5 GFT |
2572 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, |
2573 | MII_ADVERTISE, val); | |
8c198884 | 2574 | } |
cd0ff491 | 2575 | spin_unlock_bh(&jme->phy_lock); |
8c198884 GFT |
2576 | |
2577 | return 0; | |
2578 | } | |
2579 | ||
29bdd921 GFT |
2580 | static void |
2581 | jme_get_wol(struct net_device *netdev, | |
2582 | struct ethtool_wolinfo *wol) | |
2583 | { | |
2584 | struct jme_adapter *jme = netdev_priv(netdev); | |
2585 | ||
2586 | wol->supported = WAKE_MAGIC | WAKE_PHY; | |
2587 | ||
2588 | wol->wolopts = 0; | |
2589 | ||
cd0ff491 | 2590 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
29bdd921 GFT |
2591 | wol->wolopts |= WAKE_PHY; |
2592 | ||
cd0ff491 | 2593 | if (jme->reg_pmcs & PMCS_MFEN) |
29bdd921 GFT |
2594 | wol->wolopts |= WAKE_MAGIC; |
2595 | ||
2596 | } | |
2597 | ||
2598 | static int | |
2599 | jme_set_wol(struct net_device *netdev, | |
2600 | struct ethtool_wolinfo *wol) | |
2601 | { | |
2602 | struct jme_adapter *jme = netdev_priv(netdev); | |
2603 | ||
cd0ff491 | 2604 | if (wol->wolopts & (WAKE_MAGICSECURE | |
29bdd921 GFT |
2605 | WAKE_UCAST | |
2606 | WAKE_MCAST | | |
2607 | WAKE_BCAST | | |
2608 | WAKE_ARP)) | |
2609 | return -EOPNOTSUPP; | |
2610 | ||
2611 | jme->reg_pmcs = 0; | |
2612 | ||
cd0ff491 | 2613 | if (wol->wolopts & WAKE_PHY) |
29bdd921 GFT |
2614 | jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN; |
2615 | ||
cd0ff491 | 2616 | if (wol->wolopts & WAKE_MAGIC) |
29bdd921 GFT |
2617 | jme->reg_pmcs |= PMCS_MFEN; |
2618 | ||
cd0ff491 | 2619 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
18783c49 | 2620 | device_set_wakeup_enable(&jme->pdev->dev, !!(jme->reg_pmcs)); |
8ad2ddac | 2621 | |
29bdd921 GFT |
2622 | return 0; |
2623 | } | |
b3821cc5 | 2624 | |
3bf61c55 GFT |
2625 | static int |
2626 | jme_get_settings(struct net_device *netdev, | |
2627 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2628 | { |
2629 | struct jme_adapter *jme = netdev_priv(netdev); | |
2630 | int rc; | |
8c198884 | 2631 | |
cd0ff491 | 2632 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2633 | rc = mii_ethtool_gset(&(jme->mii_if), ecmd); |
cd0ff491 | 2634 | spin_unlock_bh(&jme->phy_lock); |
d7699f87 GFT |
2635 | return rc; |
2636 | } | |
2637 | ||
3bf61c55 GFT |
2638 | static int |
2639 | jme_set_settings(struct net_device *netdev, | |
2640 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2641 | { |
2642 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2643 | int rc, fdc = 0; |
fcf45b4c | 2644 | |
035550c9 DD |
2645 | if (ethtool_cmd_speed(ecmd) == SPEED_1000 |
2646 | && ecmd->autoneg != AUTONEG_ENABLE) | |
8c198884 GFT |
2647 | return -EINVAL; |
2648 | ||
f79361a6 GFT |
2649 | /* |
2650 | * Check If user changed duplex only while force_media. | |
2651 | * Hardware would not generate link change interrupt. | |
2652 | */ | |
cd0ff491 | 2653 | if (jme->mii_if.force_media && |
79ce639c GFT |
2654 | ecmd->autoneg != AUTONEG_ENABLE && |
2655 | (jme->mii_if.full_duplex != ecmd->duplex)) | |
2656 | fdc = 1; | |
2657 | ||
cd0ff491 | 2658 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2659 | rc = mii_ethtool_sset(&(jme->mii_if), ecmd); |
cd0ff491 | 2660 | spin_unlock_bh(&jme->phy_lock); |
fcf45b4c | 2661 | |
cd0ff491 | 2662 | if (!rc) { |
f79361a6 GFT |
2663 | if (fdc) |
2664 | jme_reset_link(jme); | |
29bdd921 | 2665 | jme->old_ecmd = *ecmd; |
43e4651b GFT |
2666 | set_bit(JME_FLAG_SSET, &jme->flags); |
2667 | } | |
2668 | ||
2669 | return rc; | |
2670 | } | |
2671 | ||
2672 | static int | |
2673 | jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
2674 | { | |
2675 | int rc; | |
2676 | struct jme_adapter *jme = netdev_priv(netdev); | |
2677 | struct mii_ioctl_data *mii_data = if_mii(rq); | |
2678 | unsigned int duplex_chg; | |
2679 | ||
2680 | if (cmd == SIOCSMIIREG) { | |
2681 | u16 val = mii_data->val_in; | |
2682 | if (!(val & (BMCR_RESET|BMCR_ANENABLE)) && | |
2683 | (val & BMCR_SPEED1000)) | |
2684 | return -EINVAL; | |
2685 | } | |
2686 | ||
2687 | spin_lock_bh(&jme->phy_lock); | |
2688 | rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg); | |
2689 | spin_unlock_bh(&jme->phy_lock); | |
2690 | ||
2691 | if (!rc && (cmd == SIOCSMIIREG)) { | |
2692 | if (duplex_chg) | |
2693 | jme_reset_link(jme); | |
2694 | jme_get_settings(netdev, &jme->old_ecmd); | |
2695 | set_bit(JME_FLAG_SSET, &jme->flags); | |
29bdd921 GFT |
2696 | } |
2697 | ||
d7699f87 GFT |
2698 | return rc; |
2699 | } | |
2700 | ||
cd0ff491 | 2701 | static u32 |
3bf61c55 GFT |
2702 | jme_get_link(struct net_device *netdev) |
2703 | { | |
d7699f87 GFT |
2704 | struct jme_adapter *jme = netdev_priv(netdev); |
2705 | return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP; | |
2706 | } | |
2707 | ||
8c198884 | 2708 | static u32 |
cd0ff491 GFT |
2709 | jme_get_msglevel(struct net_device *netdev) |
2710 | { | |
2711 | struct jme_adapter *jme = netdev_priv(netdev); | |
2712 | return jme->msg_enable; | |
2713 | } | |
2714 | ||
2715 | static void | |
2716 | jme_set_msglevel(struct net_device *netdev, u32 value) | |
8c198884 | 2717 | { |
cd0ff491 GFT |
2718 | struct jme_adapter *jme = netdev_priv(netdev); |
2719 | jme->msg_enable = value; | |
2720 | } | |
8c198884 | 2721 | |
ae968fb3 MM |
2722 | static netdev_features_t |
2723 | jme_fix_features(struct net_device *netdev, netdev_features_t features) | |
cd0ff491 | 2724 | { |
aa4d6a67 MM |
2725 | if (netdev->mtu > 1900) |
2726 | features &= ~(NETIF_F_ALL_TSO | NETIF_F_ALL_CSUM); | |
2727 | return features; | |
8c198884 GFT |
2728 | } |
2729 | ||
2730 | static int | |
ae968fb3 | 2731 | jme_set_features(struct net_device *netdev, netdev_features_t features) |
8c198884 | 2732 | { |
cd0ff491 | 2733 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2734 | |
cd0ff491 | 2735 | spin_lock_bh(&jme->rxmcs_lock); |
aa4d6a67 | 2736 | if (features & NETIF_F_RXCSUM) |
8c198884 GFT |
2737 | jme->reg_rxmcs |= RXMCS_CHECKSUM; |
2738 | else | |
2739 | jme->reg_rxmcs &= ~RXMCS_CHECKSUM; | |
2740 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
cd0ff491 | 2741 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2742 | |
2743 | return 0; | |
2744 | } | |
2745 | ||
8c198884 GFT |
2746 | static int |
2747 | jme_nway_reset(struct net_device *netdev) | |
2748 | { | |
cd0ff491 | 2749 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 GFT |
2750 | jme_restart_an(jme); |
2751 | return 0; | |
2752 | } | |
2753 | ||
cd0ff491 | 2754 | static u8 |
186fc259 GFT |
2755 | jme_smb_read(struct jme_adapter *jme, unsigned int addr) |
2756 | { | |
cd0ff491 | 2757 | u32 val; |
186fc259 GFT |
2758 | int to; |
2759 | ||
2760 | val = jread32(jme, JME_SMBCSR); | |
2761 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2762 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2763 | msleep(1); |
2764 | val = jread32(jme, JME_SMBCSR); | |
2765 | } | |
cd0ff491 | 2766 | if (!to) { |
52a46ba8 | 2767 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2768 | return 0xFF; |
2769 | } | |
2770 | ||
2771 | jwrite32(jme, JME_SMBINTF, | |
2772 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2773 | SMBINTF_HWRWN_READ | | |
2774 | SMBINTF_HWCMD); | |
2775 | ||
2776 | val = jread32(jme, JME_SMBINTF); | |
2777 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2778 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2779 | msleep(1); |
2780 | val = jread32(jme, JME_SMBINTF); | |
2781 | } | |
cd0ff491 | 2782 | if (!to) { |
52a46ba8 | 2783 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2784 | return 0xFF; |
2785 | } | |
2786 | ||
2787 | return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT; | |
2788 | } | |
2789 | ||
2790 | static void | |
cd0ff491 | 2791 | jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data) |
186fc259 | 2792 | { |
cd0ff491 | 2793 | u32 val; |
186fc259 GFT |
2794 | int to; |
2795 | ||
2796 | val = jread32(jme, JME_SMBCSR); | |
2797 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2798 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2799 | msleep(1); |
2800 | val = jread32(jme, JME_SMBCSR); | |
2801 | } | |
cd0ff491 | 2802 | if (!to) { |
52a46ba8 | 2803 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2804 | return; |
2805 | } | |
2806 | ||
2807 | jwrite32(jme, JME_SMBINTF, | |
2808 | ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) | | |
2809 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2810 | SMBINTF_HWRWN_WRITE | | |
2811 | SMBINTF_HWCMD); | |
2812 | ||
2813 | val = jread32(jme, JME_SMBINTF); | |
2814 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2815 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2816 | msleep(1); |
2817 | val = jread32(jme, JME_SMBINTF); | |
2818 | } | |
cd0ff491 | 2819 | if (!to) { |
52a46ba8 | 2820 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2821 | return; |
2822 | } | |
2823 | ||
2824 | mdelay(2); | |
2825 | } | |
2826 | ||
2827 | static int | |
2828 | jme_get_eeprom_len(struct net_device *netdev) | |
2829 | { | |
cd0ff491 GFT |
2830 | struct jme_adapter *jme = netdev_priv(netdev); |
2831 | u32 val; | |
186fc259 | 2832 | val = jread32(jme, JME_SMBCSR); |
cd0ff491 | 2833 | return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0; |
186fc259 GFT |
2834 | } |
2835 | ||
2836 | static int | |
2837 | jme_get_eeprom(struct net_device *netdev, | |
2838 | struct ethtool_eeprom *eeprom, u8 *data) | |
2839 | { | |
cd0ff491 | 2840 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2841 | int i, offset = eeprom->offset, len = eeprom->len; |
2842 | ||
2843 | /* | |
8d27293f | 2844 | * ethtool will check the boundary for us |
186fc259 GFT |
2845 | */ |
2846 | eeprom->magic = JME_EEPROM_MAGIC; | |
cd0ff491 | 2847 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2848 | data[i] = jme_smb_read(jme, i + offset); |
2849 | ||
2850 | return 0; | |
2851 | } | |
2852 | ||
2853 | static int | |
2854 | jme_set_eeprom(struct net_device *netdev, | |
2855 | struct ethtool_eeprom *eeprom, u8 *data) | |
2856 | { | |
cd0ff491 | 2857 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2858 | int i, offset = eeprom->offset, len = eeprom->len; |
2859 | ||
2860 | if (eeprom->magic != JME_EEPROM_MAGIC) | |
2861 | return -EINVAL; | |
2862 | ||
2863 | /* | |
8d27293f | 2864 | * ethtool will check the boundary for us |
186fc259 | 2865 | */ |
cd0ff491 | 2866 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2867 | jme_smb_write(jme, i + offset, data[i]); |
2868 | ||
2869 | return 0; | |
2870 | } | |
2871 | ||
d7699f87 | 2872 | static const struct ethtool_ops jme_ethtool_ops = { |
cd0ff491 | 2873 | .get_drvinfo = jme_get_drvinfo, |
8c198884 GFT |
2874 | .get_regs_len = jme_get_regs_len, |
2875 | .get_regs = jme_get_regs, | |
2876 | .get_coalesce = jme_get_coalesce, | |
192570e0 | 2877 | .set_coalesce = jme_set_coalesce, |
cd0ff491 GFT |
2878 | .get_pauseparam = jme_get_pauseparam, |
2879 | .set_pauseparam = jme_set_pauseparam, | |
29bdd921 GFT |
2880 | .get_wol = jme_get_wol, |
2881 | .set_wol = jme_set_wol, | |
d7699f87 GFT |
2882 | .get_settings = jme_get_settings, |
2883 | .set_settings = jme_set_settings, | |
2884 | .get_link = jme_get_link, | |
cd0ff491 GFT |
2885 | .get_msglevel = jme_get_msglevel, |
2886 | .set_msglevel = jme_set_msglevel, | |
8c198884 | 2887 | .nway_reset = jme_nway_reset, |
186fc259 GFT |
2888 | .get_eeprom_len = jme_get_eeprom_len, |
2889 | .get_eeprom = jme_get_eeprom, | |
2890 | .set_eeprom = jme_set_eeprom, | |
d7699f87 GFT |
2891 | }; |
2892 | ||
3bf61c55 GFT |
2893 | static int |
2894 | jme_pci_dma64(struct pci_dev *pdev) | |
d7699f87 | 2895 | { |
94c5ea02 | 2896 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
fa97b924 GFT |
2897 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) |
2898 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) | |
3bf61c55 GFT |
2899 | return 1; |
2900 | ||
94c5ea02 | 2901 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
fa97b924 GFT |
2902 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))) |
2903 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40))) | |
8c198884 GFT |
2904 | return 1; |
2905 | ||
fa97b924 GFT |
2906 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) |
2907 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) | |
3bf61c55 GFT |
2908 | return 0; |
2909 | ||
2910 | return -1; | |
2911 | } | |
2912 | ||
cd0ff491 | 2913 | static inline void |
cdcdc9eb GFT |
2914 | jme_phy_init(struct jme_adapter *jme) |
2915 | { | |
cd0ff491 | 2916 | u16 reg26; |
cdcdc9eb GFT |
2917 | |
2918 | reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26); | |
2919 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000); | |
2920 | } | |
2921 | ||
cd0ff491 | 2922 | static inline void |
cdcdc9eb | 2923 | jme_check_hw_ver(struct jme_adapter *jme) |
42b1055e | 2924 | { |
cd0ff491 | 2925 | u32 chipmode; |
cdcdc9eb GFT |
2926 | |
2927 | chipmode = jread32(jme, JME_CHIPMODE); | |
2928 | ||
2929 | jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT; | |
e882564f | 2930 | jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT; |
4400ae98 GFT |
2931 | jme->chip_main_rev = jme->chiprev & 0xF; |
2932 | jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF; | |
42b1055e GFT |
2933 | } |
2934 | ||
94c5ea02 GFT |
2935 | static const struct net_device_ops jme_netdev_ops = { |
2936 | .ndo_open = jme_open, | |
2937 | .ndo_stop = jme_close, | |
2938 | .ndo_validate_addr = eth_validate_addr, | |
43e4651b | 2939 | .ndo_do_ioctl = jme_ioctl, |
94c5ea02 GFT |
2940 | .ndo_start_xmit = jme_start_xmit, |
2941 | .ndo_set_mac_address = jme_set_macaddr, | |
43df9b78 | 2942 | .ndo_set_rx_mode = jme_set_multi, |
94c5ea02 GFT |
2943 | .ndo_change_mtu = jme_change_mtu, |
2944 | .ndo_tx_timeout = jme_tx_timeout, | |
aa4d6a67 MM |
2945 | .ndo_fix_features = jme_fix_features, |
2946 | .ndo_set_features = jme_set_features, | |
94c5ea02 GFT |
2947 | }; |
2948 | ||
3bf61c55 GFT |
2949 | static int __devinit |
2950 | jme_init_one(struct pci_dev *pdev, | |
2951 | const struct pci_device_id *ent) | |
2952 | { | |
cdcdc9eb | 2953 | int rc = 0, using_dac, i; |
d7699f87 GFT |
2954 | struct net_device *netdev; |
2955 | struct jme_adapter *jme; | |
cd0ff491 GFT |
2956 | u16 bmcr, bmsr; |
2957 | u32 apmc; | |
d7699f87 GFT |
2958 | |
2959 | /* | |
2960 | * set up PCI device basics | |
2961 | */ | |
4330c2f2 | 2962 | rc = pci_enable_device(pdev); |
cd0ff491 | 2963 | if (rc) { |
52a46ba8 | 2964 | pr_err("Cannot enable PCI device\n"); |
4330c2f2 GFT |
2965 | goto err_out; |
2966 | } | |
d7699f87 | 2967 | |
3bf61c55 | 2968 | using_dac = jme_pci_dma64(pdev); |
cd0ff491 | 2969 | if (using_dac < 0) { |
52a46ba8 | 2970 | pr_err("Cannot set PCI DMA Mask\n"); |
3bf61c55 GFT |
2971 | rc = -EIO; |
2972 | goto err_out_disable_pdev; | |
2973 | } | |
2974 | ||
cd0ff491 | 2975 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
52a46ba8 | 2976 | pr_err("No PCI resource region found\n"); |
4330c2f2 GFT |
2977 | rc = -ENOMEM; |
2978 | goto err_out_disable_pdev; | |
2979 | } | |
d7699f87 | 2980 | |
4330c2f2 | 2981 | rc = pci_request_regions(pdev, DRV_NAME); |
cd0ff491 | 2982 | if (rc) { |
52a46ba8 | 2983 | pr_err("Cannot obtain PCI resource region\n"); |
4330c2f2 GFT |
2984 | goto err_out_disable_pdev; |
2985 | } | |
d7699f87 GFT |
2986 | |
2987 | pci_set_master(pdev); | |
2988 | ||
2989 | /* | |
2990 | * alloc and init net device | |
2991 | */ | |
3bf61c55 | 2992 | netdev = alloc_etherdev(sizeof(*jme)); |
cd0ff491 | 2993 | if (!netdev) { |
4330c2f2 GFT |
2994 | rc = -ENOMEM; |
2995 | goto err_out_release_regions; | |
d7699f87 | 2996 | } |
94c5ea02 | 2997 | netdev->netdev_ops = &jme_netdev_ops; |
d7699f87 | 2998 | netdev->ethtool_ops = &jme_ethtool_ops; |
8c198884 | 2999 | netdev->watchdog_timeo = TX_TIMEOUT; |
aa4d6a67 MM |
3000 | netdev->hw_features = NETIF_F_IP_CSUM | |
3001 | NETIF_F_IPV6_CSUM | | |
3002 | NETIF_F_SG | | |
3003 | NETIF_F_TSO | | |
3004 | NETIF_F_TSO6 | | |
3005 | NETIF_F_RXCSUM; | |
9a08cd10 MM |
3006 | netdev->features = NETIF_F_IP_CSUM | |
3007 | NETIF_F_IPV6_CSUM | | |
b3821cc5 GFT |
3008 | NETIF_F_SG | |
3009 | NETIF_F_TSO | | |
3010 | NETIF_F_TSO6 | | |
42b1055e GFT |
3011 | NETIF_F_HW_VLAN_TX | |
3012 | NETIF_F_HW_VLAN_RX; | |
cd0ff491 | 3013 | if (using_dac) |
8c198884 | 3014 | netdev->features |= NETIF_F_HIGHDMA; |
d7699f87 GFT |
3015 | |
3016 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
3017 | pci_set_drvdata(pdev, netdev); | |
3018 | ||
3019 | /* | |
3020 | * init adapter info | |
3021 | */ | |
3022 | jme = netdev_priv(netdev); | |
3023 | jme->pdev = pdev; | |
3024 | jme->dev = netdev; | |
cdcdc9eb | 3025 | jme->jme_rx = netif_rx; |
29bdd921 | 3026 | jme->old_mtu = netdev->mtu = 1500; |
fcf45b4c | 3027 | jme->phylink = 0; |
b3821cc5 GFT |
3028 | jme->tx_ring_size = 1 << 10; |
3029 | jme->tx_ring_mask = jme->tx_ring_size - 1; | |
3030 | jme->tx_wake_threshold = 1 << 9; | |
3031 | jme->rx_ring_size = 1 << 9; | |
3032 | jme->rx_ring_mask = jme->rx_ring_size - 1; | |
cd0ff491 | 3033 | jme->msg_enable = JME_DEF_MSG_ENABLE; |
d7699f87 GFT |
3034 | jme->regs = ioremap(pci_resource_start(pdev, 0), |
3035 | pci_resource_len(pdev, 0)); | |
4330c2f2 | 3036 | if (!(jme->regs)) { |
52a46ba8 | 3037 | pr_err("Mapping PCI resource region error\n"); |
d7699f87 GFT |
3038 | rc = -ENOMEM; |
3039 | goto err_out_free_netdev; | |
3040 | } | |
4330c2f2 | 3041 | |
cd0ff491 GFT |
3042 | if (no_pseudohp) { |
3043 | apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN; | |
3044 | jwrite32(jme, JME_APMC, apmc); | |
3045 | } else if (force_pseudohp) { | |
3046 | apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN; | |
3047 | jwrite32(jme, JME_APMC, apmc); | |
3048 | } | |
3049 | ||
cdcdc9eb | 3050 | NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2) |
192570e0 | 3051 | |
d7699f87 | 3052 | spin_lock_init(&jme->phy_lock); |
fcf45b4c | 3053 | spin_lock_init(&jme->macaddr_lock); |
8c198884 | 3054 | spin_lock_init(&jme->rxmcs_lock); |
fcf45b4c | 3055 | |
fcf45b4c GFT |
3056 | atomic_set(&jme->link_changing, 1); |
3057 | atomic_set(&jme->rx_cleaning, 1); | |
3058 | atomic_set(&jme->tx_cleaning, 1); | |
192570e0 | 3059 | atomic_set(&jme->rx_empty, 1); |
fcf45b4c | 3060 | |
79ce639c | 3061 | tasklet_init(&jme->pcc_task, |
c97b5740 | 3062 | jme_pcc_tasklet, |
79ce639c | 3063 | (unsigned long) jme); |
4330c2f2 | 3064 | tasklet_init(&jme->linkch_task, |
c97b5740 | 3065 | jme_link_change_tasklet, |
4330c2f2 GFT |
3066 | (unsigned long) jme); |
3067 | tasklet_init(&jme->txclean_task, | |
c97b5740 | 3068 | jme_tx_clean_tasklet, |
4330c2f2 GFT |
3069 | (unsigned long) jme); |
3070 | tasklet_init(&jme->rxclean_task, | |
c97b5740 | 3071 | jme_rx_clean_tasklet, |
4330c2f2 | 3072 | (unsigned long) jme); |
fcf45b4c | 3073 | tasklet_init(&jme->rxempty_task, |
c97b5740 | 3074 | jme_rx_empty_tasklet, |
fcf45b4c | 3075 | (unsigned long) jme); |
fa97b924 | 3076 | tasklet_disable_nosync(&jme->linkch_task); |
cd0ff491 GFT |
3077 | tasklet_disable_nosync(&jme->txclean_task); |
3078 | tasklet_disable_nosync(&jme->rxclean_task); | |
3079 | tasklet_disable_nosync(&jme->rxempty_task); | |
8c198884 GFT |
3080 | jme->dpi.cur = PCC_P1; |
3081 | ||
cd0ff491 | 3082 | jme->reg_ghc = 0; |
79ce639c | 3083 | jme->reg_rxcs = RXCS_DEFAULT; |
8c198884 GFT |
3084 | jme->reg_rxmcs = RXMCS_DEFAULT; |
3085 | jme->reg_txpfc = 0; | |
47220951 | 3086 | jme->reg_pmcs = PMCS_MFEN; |
ed830419 | 3087 | jme->reg_gpreg1 = GPREG1_DEFAULT; |
aa4d6a67 MM |
3088 | |
3089 | if (jme->reg_rxmcs & RXMCS_CHECKSUM) | |
3090 | netdev->features |= NETIF_F_RXCSUM; | |
192570e0 | 3091 | |
fcf45b4c GFT |
3092 | /* |
3093 | * Get Max Read Req Size from PCI Config Space | |
3094 | */ | |
cd0ff491 GFT |
3095 | pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs); |
3096 | jme->mrrs &= PCI_DCSR_MRRS_MASK; | |
3097 | switch (jme->mrrs) { | |
3098 | case MRRS_128B: | |
3099 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; | |
3100 | break; | |
3101 | case MRRS_256B: | |
3102 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; | |
3103 | break; | |
3104 | default: | |
3105 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; | |
3106 | break; | |
06527f9b | 3107 | } |
fcf45b4c | 3108 | |
d7699f87 | 3109 | /* |
cdcdc9eb | 3110 | * Must check before reset_mac_processor |
d7699f87 | 3111 | */ |
cdcdc9eb GFT |
3112 | jme_check_hw_ver(jme); |
3113 | jme->mii_if.dev = netdev; | |
cd0ff491 | 3114 | if (jme->fpgaver) { |
cdcdc9eb | 3115 | jme->mii_if.phy_id = 0; |
cd0ff491 | 3116 | for (i = 1 ; i < 32 ; ++i) { |
cdcdc9eb GFT |
3117 | bmcr = jme_mdio_read(netdev, i, MII_BMCR); |
3118 | bmsr = jme_mdio_read(netdev, i, MII_BMSR); | |
cd0ff491 | 3119 | if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { |
cdcdc9eb GFT |
3120 | jme->mii_if.phy_id = i; |
3121 | break; | |
3122 | } | |
3123 | } | |
3124 | ||
cd0ff491 | 3125 | if (!jme->mii_if.phy_id) { |
cdcdc9eb | 3126 | rc = -EIO; |
52a46ba8 JP |
3127 | pr_err("Can not find phy_id\n"); |
3128 | goto err_out_unmap; | |
cdcdc9eb GFT |
3129 | } |
3130 | ||
3131 | jme->reg_ghc |= GHC_LINK_POLL; | |
cd0ff491 | 3132 | } else { |
cdcdc9eb GFT |
3133 | jme->mii_if.phy_id = 1; |
3134 | } | |
cd0ff491 | 3135 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
3136 | jme->mii_if.supports_gmii = true; |
3137 | else | |
3138 | jme->mii_if.supports_gmii = false; | |
43e4651b GFT |
3139 | jme->mii_if.phy_id_mask = 0x1F; |
3140 | jme->mii_if.reg_num_mask = 0x1F; | |
cdcdc9eb GFT |
3141 | jme->mii_if.mdio_read = jme_mdio_read; |
3142 | jme->mii_if.mdio_write = jme_mdio_write; | |
3143 | ||
d7699f87 | 3144 | jme_clear_pm(jme); |
18783c49 GFT |
3145 | pci_set_power_state(jme->pdev, PCI_D0); |
3146 | device_set_wakeup_enable(&pdev->dev, true); | |
3147 | ||
06168a20 | 3148 | jme_set_phyfifo_5level(jme); |
6db67aa5 | 3149 | jme->pcirev = pdev->revision; |
cd0ff491 | 3150 | if (!jme->fpgaver) |
cdcdc9eb | 3151 | jme_phy_init(jme); |
42b1055e | 3152 | jme_phy_off(jme); |
cdcdc9eb GFT |
3153 | |
3154 | /* | |
3155 | * Reset MAC processor and reload EEPROM for MAC Address | |
3156 | */ | |
d7699f87 | 3157 | jme_reset_mac_processor(jme); |
4330c2f2 | 3158 | rc = jme_reload_eeprom(jme); |
cd0ff491 | 3159 | if (rc) { |
52a46ba8 | 3160 | pr_err("Reload eeprom for reading MAC Address error\n"); |
fa97b924 | 3161 | goto err_out_unmap; |
4330c2f2 | 3162 | } |
d7699f87 GFT |
3163 | jme_load_macaddr(netdev); |
3164 | ||
d7699f87 GFT |
3165 | /* |
3166 | * Tell stack that we are not ready to work until open() | |
3167 | */ | |
3168 | netif_carrier_off(netdev); | |
d7699f87 | 3169 | |
4330c2f2 | 3170 | rc = register_netdev(netdev); |
cd0ff491 | 3171 | if (rc) { |
52a46ba8 | 3172 | pr_err("Cannot register net device\n"); |
fa97b924 | 3173 | goto err_out_unmap; |
4330c2f2 | 3174 | } |
d7699f87 | 3175 | |
4400ae98 | 3176 | netif_info(jme, probe, jme->dev, "%s%s chiprev:%x pcirev:%x macaddr:%pM\n", |
c97b5740 GFT |
3177 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ? |
3178 | "JMC250 Gigabit Ethernet" : | |
3179 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ? | |
3180 | "JMC260 Fast Ethernet" : "Unknown", | |
3181 | (jme->fpgaver != 0) ? " (FPGA)" : "", | |
3182 | (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev, | |
4400ae98 | 3183 | jme->pcirev, netdev->dev_addr); |
d7699f87 GFT |
3184 | |
3185 | return 0; | |
3186 | ||
3187 | err_out_unmap: | |
3188 | iounmap(jme->regs); | |
3189 | err_out_free_netdev: | |
3190 | pci_set_drvdata(pdev, NULL); | |
3191 | free_netdev(netdev); | |
4330c2f2 GFT |
3192 | err_out_release_regions: |
3193 | pci_release_regions(pdev); | |
d7699f87 | 3194 | err_out_disable_pdev: |
cd0ff491 | 3195 | pci_disable_device(pdev); |
d7699f87 | 3196 | err_out: |
4330c2f2 | 3197 | return rc; |
d7699f87 GFT |
3198 | } |
3199 | ||
3bf61c55 GFT |
3200 | static void __devexit |
3201 | jme_remove_one(struct pci_dev *pdev) | |
3202 | { | |
d7699f87 GFT |
3203 | struct net_device *netdev = pci_get_drvdata(pdev); |
3204 | struct jme_adapter *jme = netdev_priv(netdev); | |
3205 | ||
3206 | unregister_netdev(netdev); | |
3207 | iounmap(jme->regs); | |
3208 | pci_set_drvdata(pdev, NULL); | |
3209 | free_netdev(netdev); | |
3210 | pci_release_regions(pdev); | |
3211 | pci_disable_device(pdev); | |
3212 | ||
3213 | } | |
3214 | ||
fba4bc0c GFT |
3215 | static void |
3216 | jme_shutdown(struct pci_dev *pdev) | |
3217 | { | |
3218 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3219 | struct jme_adapter *jme = netdev_priv(netdev); | |
3220 | ||
3221 | jme_powersave_phy(jme); | |
3222 | pci_pme_active(pdev, true); | |
3223 | } | |
3224 | ||
e10cd037 | 3225 | #ifdef CONFIG_PM_SLEEP |
18783c49 GFT |
3226 | static int |
3227 | jme_suspend(struct device *dev) | |
29bdd921 | 3228 | { |
8ad2ddac | 3229 | struct pci_dev *pdev = to_pci_dev(dev); |
29bdd921 GFT |
3230 | struct net_device *netdev = pci_get_drvdata(pdev); |
3231 | struct jme_adapter *jme = netdev_priv(netdev); | |
29bdd921 GFT |
3232 | |
3233 | atomic_dec(&jme->link_changing); | |
3234 | ||
3235 | netif_device_detach(netdev); | |
3236 | netif_stop_queue(netdev); | |
3237 | jme_stop_irq(jme); | |
29bdd921 | 3238 | |
cd0ff491 GFT |
3239 | tasklet_disable(&jme->txclean_task); |
3240 | tasklet_disable(&jme->rxclean_task); | |
3241 | tasklet_disable(&jme->rxempty_task); | |
3242 | ||
cd0ff491 GFT |
3243 | if (netif_carrier_ok(netdev)) { |
3244 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
47220951 GFT |
3245 | jme_polling_mode(jme); |
3246 | ||
29bdd921 | 3247 | jme_stop_pcc_timer(jme); |
cd0ff491 GFT |
3248 | jme_disable_rx_engine(jme); |
3249 | jme_disable_tx_engine(jme); | |
29bdd921 GFT |
3250 | jme_reset_mac_processor(jme); |
3251 | jme_free_rx_resources(jme); | |
3252 | jme_free_tx_resources(jme); | |
3253 | netif_carrier_off(netdev); | |
3254 | jme->phylink = 0; | |
3255 | } | |
3256 | ||
cd0ff491 GFT |
3257 | tasklet_enable(&jme->txclean_task); |
3258 | tasklet_hi_enable(&jme->rxclean_task); | |
3259 | tasklet_hi_enable(&jme->rxempty_task); | |
29bdd921 | 3260 | |
fba4bc0c | 3261 | jme_powersave_phy(jme); |
29bdd921 GFT |
3262 | |
3263 | return 0; | |
3264 | } | |
3265 | ||
18783c49 GFT |
3266 | static int |
3267 | jme_resume(struct device *dev) | |
29bdd921 | 3268 | { |
8ad2ddac | 3269 | struct pci_dev *pdev = to_pci_dev(dev); |
29bdd921 GFT |
3270 | struct net_device *netdev = pci_get_drvdata(pdev); |
3271 | struct jme_adapter *jme = netdev_priv(netdev); | |
3272 | ||
18783c49 | 3273 | jme_clear_pm(jme); |
e4610a83 GFT |
3274 | jme_phy_on(jme); |
3275 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
29bdd921 | 3276 | jme_set_settings(netdev, &jme->old_ecmd); |
e4610a83 | 3277 | else |
29bdd921 | 3278 | jme_reset_phy_processor(jme); |
314d65d8 AL |
3279 | jme_phy_calibration(jme); |
3280 | jme_phy_setEA(jme); | |
29bdd921 GFT |
3281 | jme_start_irq(jme); |
3282 | netif_device_attach(netdev); | |
3283 | ||
3284 | atomic_inc(&jme->link_changing); | |
3285 | ||
3286 | jme_reset_link(jme); | |
3287 | ||
3288 | return 0; | |
3289 | } | |
8ad2ddac RW |
3290 | |
3291 | static SIMPLE_DEV_PM_OPS(jme_pm_ops, jme_suspend, jme_resume); | |
3292 | #define JME_PM_OPS (&jme_pm_ops) | |
3293 | ||
3294 | #else | |
3295 | ||
3296 | #define JME_PM_OPS NULL | |
9b9d55de | 3297 | #endif |
29bdd921 | 3298 | |
c97b5740 | 3299 | static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = { |
cd0ff491 GFT |
3300 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) }, |
3301 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) }, | |
d7699f87 GFT |
3302 | { } |
3303 | }; | |
3304 | ||
3305 | static struct pci_driver jme_driver = { | |
cd0ff491 GFT |
3306 | .name = DRV_NAME, |
3307 | .id_table = jme_pci_tbl, | |
3308 | .probe = jme_init_one, | |
3309 | .remove = __devexit_p(jme_remove_one), | |
fba4bc0c | 3310 | .shutdown = jme_shutdown, |
8ad2ddac | 3311 | .driver.pm = JME_PM_OPS, |
d7699f87 GFT |
3312 | }; |
3313 | ||
3bf61c55 GFT |
3314 | static int __init |
3315 | jme_init_module(void) | |
d7699f87 | 3316 | { |
52a46ba8 | 3317 | pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION); |
d7699f87 GFT |
3318 | return pci_register_driver(&jme_driver); |
3319 | } | |
3320 | ||
3bf61c55 GFT |
3321 | static void __exit |
3322 | jme_cleanup_module(void) | |
d7699f87 GFT |
3323 | { |
3324 | pci_unregister_driver(&jme_driver); | |
3325 | } | |
3326 | ||
3327 | module_init(jme_init_module); | |
3328 | module_exit(jme_cleanup_module); | |
3329 | ||
3bf61c55 | 3330 | MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>"); |
d7699f87 GFT |
3331 | MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver"); |
3332 | MODULE_LICENSE("GPL"); | |
3333 | MODULE_VERSION(DRV_VERSION); | |
3334 | MODULE_DEVICE_TABLE(pci, jme_pci_tbl); |