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d7699f87 GFT |
1 | /* |
2 | * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver | |
3 | * | |
4 | * Copyright 2008 JMicron Technology Corporation | |
5 | * http://www.jmicron.com/ | |
d3d584f5 | 6 | * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org> |
d7699f87 | 7 | * |
3bf61c55 GFT |
8 | * Author: Guo-Fu Tseng <cooldavid@cooldavid.org> |
9 | * | |
d7699f87 GFT |
10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | * | |
23 | */ | |
24 | ||
2e582300 | 25 | #include <linux/version.h> |
937ef75a JP |
26 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28) |
27 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
28 | #endif | |
29 | ||
d7699f87 GFT |
30 | #include <linux/module.h> |
31 | #include <linux/kernel.h> | |
32 | #include <linux/pci.h> | |
33 | #include <linux/netdevice.h> | |
34 | #include <linux/etherdevice.h> | |
35 | #include <linux/ethtool.h> | |
36 | #include <linux/mii.h> | |
37 | #include <linux/crc32.h> | |
4330c2f2 | 38 | #include <linux/delay.h> |
29bdd921 | 39 | #include <linux/spinlock.h> |
8c198884 GFT |
40 | #include <linux/in.h> |
41 | #include <linux/ip.h> | |
79ce639c GFT |
42 | #include <linux/ipv6.h> |
43 | #include <linux/tcp.h> | |
44 | #include <linux/udp.h> | |
42b1055e | 45 | #include <linux/if_vlan.h> |
38d1bc09 | 46 | #include <linux/slab.h> |
3b70a6fa | 47 | #include <net/ip6_checksum.h> |
d7699f87 GFT |
48 | #include "jme.h" |
49 | ||
cd0ff491 GFT |
50 | static int force_pseudohp = -1; |
51 | static int no_pseudohp = -1; | |
52 | static int no_extplug = -1; | |
53 | module_param(force_pseudohp, int, 0); | |
54 | MODULE_PARM_DESC(force_pseudohp, | |
55 | "Enable pseudo hot-plug feature manually by driver instead of BIOS."); | |
56 | module_param(no_pseudohp, int, 0); | |
57 | MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); | |
58 | module_param(no_extplug, int, 0); | |
59 | MODULE_PARM_DESC(no_extplug, | |
60 | "Do not use external plug signal for pseudo hot-plug."); | |
4330c2f2 | 61 | |
3bf61c55 GFT |
62 | static int |
63 | jme_mdio_read(struct net_device *netdev, int phy, int reg) | |
d7699f87 GFT |
64 | { |
65 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 66 | int i, val, again = (reg == MII_BMSR) ? 1 : 0; |
d7699f87 | 67 | |
186fc259 | 68 | read_again: |
cd0ff491 | 69 | jwrite32(jme, JME_SMI, SMI_OP_REQ | |
3bf61c55 GFT |
70 | smi_phy_addr(phy) | |
71 | smi_reg_addr(reg)); | |
d7699f87 GFT |
72 | |
73 | wmb(); | |
cd0ff491 | 74 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
cdcdc9eb | 75 | udelay(20); |
b3821cc5 GFT |
76 | val = jread32(jme, JME_SMI); |
77 | if ((val & SMI_OP_REQ) == 0) | |
3bf61c55 | 78 | break; |
cd0ff491 | 79 | } |
d7699f87 | 80 | |
cd0ff491 | 81 | if (i == 0) { |
937ef75a | 82 | pr_err("phy(%d) read timeout : %d\n", phy, reg); |
3bf61c55 | 83 | return 0; |
cd0ff491 | 84 | } |
d7699f87 | 85 | |
cd0ff491 | 86 | if (again--) |
186fc259 GFT |
87 | goto read_again; |
88 | ||
cd0ff491 | 89 | return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT; |
d7699f87 GFT |
90 | } |
91 | ||
3bf61c55 GFT |
92 | static void |
93 | jme_mdio_write(struct net_device *netdev, | |
94 | int phy, int reg, int val) | |
d7699f87 GFT |
95 | { |
96 | struct jme_adapter *jme = netdev_priv(netdev); | |
97 | int i; | |
98 | ||
3bf61c55 GFT |
99 | jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ | |
100 | ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | | |
101 | smi_phy_addr(phy) | smi_reg_addr(reg)); | |
d7699f87 GFT |
102 | |
103 | wmb(); | |
cdcdc9eb GFT |
104 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
105 | udelay(20); | |
8d27293f | 106 | if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0) |
3bf61c55 GFT |
107 | break; |
108 | } | |
d7699f87 | 109 | |
3bf61c55 | 110 | if (i == 0) |
937ef75a | 111 | pr_err("phy(%d) write timeout : %d\n", phy, reg); |
d7699f87 GFT |
112 | } |
113 | ||
8a76ab5f GFT |
114 | static int |
115 | jme_phyext_read(struct jme_adapter *jme, int reg) | |
116 | { | |
117 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, | |
118 | JME_PHY_SPEC_ADDR_REG, | |
119 | JME_PHY_SPEC_REG_READ | (reg & 0x3FFF)); | |
120 | return jme_mdio_read(jme->dev, jme->mii_if.phy_id, | |
121 | JME_PHY_SPEC_DATA_REG); | |
122 | } | |
123 | ||
124 | static void | |
125 | jme_phyext_write(struct jme_adapter *jme, int reg, int val) | |
126 | { | |
127 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, | |
128 | JME_PHY_SPEC_DATA_REG, val); | |
129 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, | |
130 | JME_PHY_SPEC_ADDR_REG, | |
131 | JME_PHY_SPEC_REG_WRITE | (reg & 0x3FFF)); | |
132 | } | |
133 | ||
134 | static void | |
135 | jme_phyext_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) | |
136 | { | |
137 | int i; | |
138 | u16 *p16 = (u16 *)p; | |
139 | ||
140 | for (i = 0 ; i < reg_nr ; ++i) | |
141 | p16[i] = jme_phyext_read(jme, i); | |
142 | } | |
143 | ||
cd0ff491 | 144 | static inline void |
3bf61c55 | 145 | jme_reset_phy_processor(struct jme_adapter *jme) |
d7699f87 | 146 | { |
cd0ff491 | 147 | u32 val; |
3bf61c55 GFT |
148 | |
149 | jme_mdio_write(jme->dev, | |
150 | jme->mii_if.phy_id, | |
8c198884 GFT |
151 | MII_ADVERTISE, ADVERTISE_ALL | |
152 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
3bf61c55 | 153 | |
cd0ff491 | 154 | if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
155 | jme_mdio_write(jme->dev, |
156 | jme->mii_if.phy_id, | |
157 | MII_CTRL1000, | |
158 | ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
3bf61c55 | 159 | |
fcf45b4c GFT |
160 | val = jme_mdio_read(jme->dev, |
161 | jme->mii_if.phy_id, | |
162 | MII_BMCR); | |
163 | ||
164 | jme_mdio_write(jme->dev, | |
165 | jme->mii_if.phy_id, | |
166 | MII_BMCR, val | BMCR_RESET); | |
3bf61c55 GFT |
167 | } |
168 | ||
b3821cc5 GFT |
169 | static void |
170 | jme_setup_wakeup_frame(struct jme_adapter *jme, | |
a4181cd4 | 171 | const u32 *mask, u32 crc, int fnr) |
b3821cc5 GFT |
172 | { |
173 | int i; | |
174 | ||
175 | /* | |
176 | * Setup CRC pattern | |
177 | */ | |
178 | jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL)); | |
179 | wmb(); | |
180 | jwrite32(jme, JME_WFODP, crc); | |
181 | wmb(); | |
182 | ||
183 | /* | |
184 | * Setup Mask | |
185 | */ | |
cd0ff491 | 186 | for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { |
b3821cc5 GFT |
187 | jwrite32(jme, JME_WFOI, |
188 | ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) | | |
189 | (fnr & WFOI_FRAME_SEL)); | |
190 | wmb(); | |
191 | jwrite32(jme, JME_WFODP, mask[i]); | |
192 | wmb(); | |
193 | } | |
194 | } | |
3bf61c55 | 195 | |
dc4185bd GFT |
196 | static inline void |
197 | jme_mac_rxclk_off(struct jme_adapter *jme) | |
198 | { | |
199 | jme->reg_gpreg1 |= GPREG1_RXCLKOFF; | |
200 | jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); | |
201 | } | |
202 | ||
203 | static inline void | |
204 | jme_mac_rxclk_on(struct jme_adapter *jme) | |
205 | { | |
206 | jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF; | |
207 | jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); | |
208 | } | |
209 | ||
210 | static inline void | |
211 | jme_mac_txclk_off(struct jme_adapter *jme) | |
212 | { | |
213 | jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC); | |
214 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
215 | } | |
216 | ||
217 | static inline void | |
218 | jme_mac_txclk_on(struct jme_adapter *jme) | |
219 | { | |
220 | u32 speed = jme->reg_ghc & GHC_SPEED; | |
221 | if (speed == GHC_SPEED_1000M) | |
222 | jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY; | |
223 | else | |
224 | jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; | |
225 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
226 | } | |
227 | ||
228 | static inline void | |
229 | jme_reset_ghc_speed(struct jme_adapter *jme) | |
230 | { | |
231 | jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX); | |
232 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
233 | } | |
234 | ||
235 | static inline void | |
236 | jme_reset_250A2_workaround(struct jme_adapter *jme) | |
237 | { | |
238 | jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | | |
239 | GPREG1_RSSPATCH); | |
240 | jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); | |
241 | } | |
242 | ||
243 | static inline void | |
244 | jme_assert_ghc_reset(struct jme_adapter *jme) | |
245 | { | |
246 | jme->reg_ghc |= GHC_SWRST; | |
247 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
248 | } | |
249 | ||
250 | static inline void | |
251 | jme_clear_ghc_reset(struct jme_adapter *jme) | |
252 | { | |
253 | jme->reg_ghc &= ~GHC_SWRST; | |
254 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
255 | } | |
256 | ||
cd0ff491 | 257 | static inline void |
3bf61c55 GFT |
258 | jme_reset_mac_processor(struct jme_adapter *jme) |
259 | { | |
a4181cd4 | 260 | static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; |
cd0ff491 GFT |
261 | u32 crc = 0xCDCDCDCD; |
262 | u32 gpreg0; | |
b3821cc5 GFT |
263 | int i; |
264 | ||
dc4185bd GFT |
265 | jme_reset_ghc_speed(jme); |
266 | jme_reset_250A2_workaround(jme); | |
267 | ||
268 | jme_mac_rxclk_on(jme); | |
269 | jme_mac_txclk_on(jme); | |
270 | udelay(1); | |
271 | jme_assert_ghc_reset(jme); | |
272 | udelay(1); | |
273 | jme_mac_rxclk_off(jme); | |
274 | jme_mac_txclk_off(jme); | |
275 | udelay(1); | |
276 | jme_clear_ghc_reset(jme); | |
277 | udelay(1); | |
278 | jme_mac_rxclk_on(jme); | |
279 | jme_mac_txclk_on(jme); | |
280 | udelay(1); | |
281 | jme_mac_rxclk_off(jme); | |
282 | jme_mac_txclk_off(jme); | |
cd0ff491 GFT |
283 | |
284 | jwrite32(jme, JME_RXDBA_LO, 0x00000000); | |
285 | jwrite32(jme, JME_RXDBA_HI, 0x00000000); | |
286 | jwrite32(jme, JME_RXQDC, 0x00000000); | |
287 | jwrite32(jme, JME_RXNDA, 0x00000000); | |
288 | jwrite32(jme, JME_TXDBA_LO, 0x00000000); | |
289 | jwrite32(jme, JME_TXDBA_HI, 0x00000000); | |
290 | jwrite32(jme, JME_TXQDC, 0x00000000); | |
291 | jwrite32(jme, JME_TXNDA, 0x00000000); | |
292 | ||
4330c2f2 GFT |
293 | jwrite32(jme, JME_RXMCHT_LO, 0x00000000); |
294 | jwrite32(jme, JME_RXMCHT_HI, 0x00000000); | |
cd0ff491 | 295 | for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i) |
b3821cc5 | 296 | jme_setup_wakeup_frame(jme, mask, crc, i); |
cd0ff491 | 297 | if (jme->fpgaver) |
cdcdc9eb GFT |
298 | gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL; |
299 | else | |
300 | gpreg0 = GPREG0_DEFAULT; | |
301 | jwrite32(jme, JME_GPREG0, gpreg0); | |
cd0ff491 GFT |
302 | } |
303 | ||
304 | static inline void | |
3bf61c55 | 305 | jme_clear_pm(struct jme_adapter *jme) |
d7699f87 | 306 | { |
29bdd921 | 307 | jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs); |
4330c2f2 | 308 | pci_set_power_state(jme->pdev, PCI_D0); |
42b1055e | 309 | pci_enable_wake(jme->pdev, PCI_D0, false); |
d7699f87 GFT |
310 | } |
311 | ||
3bf61c55 GFT |
312 | static int |
313 | jme_reload_eeprom(struct jme_adapter *jme) | |
d7699f87 | 314 | { |
cd0ff491 | 315 | u32 val; |
d7699f87 GFT |
316 | int i; |
317 | ||
318 | val = jread32(jme, JME_SMBCSR); | |
319 | ||
cd0ff491 | 320 | if (val & SMBCSR_EEPROMD) { |
d7699f87 GFT |
321 | val |= SMBCSR_CNACK; |
322 | jwrite32(jme, JME_SMBCSR, val); | |
323 | val |= SMBCSR_RELOAD; | |
324 | jwrite32(jme, JME_SMBCSR, val); | |
325 | mdelay(12); | |
326 | ||
cd0ff491 | 327 | for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) { |
d7699f87 GFT |
328 | mdelay(1); |
329 | if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0) | |
330 | break; | |
331 | } | |
332 | ||
cd0ff491 | 333 | if (i == 0) { |
937ef75a | 334 | pr_err("eeprom reload timeout\n"); |
d7699f87 GFT |
335 | return -EIO; |
336 | } | |
337 | } | |
3bf61c55 | 338 | |
d7699f87 GFT |
339 | return 0; |
340 | } | |
341 | ||
3bf61c55 GFT |
342 | static void |
343 | jme_load_macaddr(struct net_device *netdev) | |
d7699f87 GFT |
344 | { |
345 | struct jme_adapter *jme = netdev_priv(netdev); | |
346 | unsigned char macaddr[6]; | |
cd0ff491 | 347 | u32 val; |
d7699f87 | 348 | |
cd0ff491 | 349 | spin_lock_bh(&jme->macaddr_lock); |
4330c2f2 | 350 | val = jread32(jme, JME_RXUMA_LO); |
d7699f87 GFT |
351 | macaddr[0] = (val >> 0) & 0xFF; |
352 | macaddr[1] = (val >> 8) & 0xFF; | |
353 | macaddr[2] = (val >> 16) & 0xFF; | |
354 | macaddr[3] = (val >> 24) & 0xFF; | |
4330c2f2 | 355 | val = jread32(jme, JME_RXUMA_HI); |
d7699f87 GFT |
356 | macaddr[4] = (val >> 0) & 0xFF; |
357 | macaddr[5] = (val >> 8) & 0xFF; | |
cd0ff491 GFT |
358 | memcpy(netdev->dev_addr, macaddr, 6); |
359 | spin_unlock_bh(&jme->macaddr_lock); | |
3bf61c55 GFT |
360 | } |
361 | ||
cd0ff491 | 362 | static inline void |
3bf61c55 GFT |
363 | jme_set_rx_pcc(struct jme_adapter *jme, int p) |
364 | { | |
cd0ff491 | 365 | switch (p) { |
192570e0 GFT |
366 | case PCC_OFF: |
367 | jwrite32(jme, JME_PCCRX0, | |
368 | ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
369 | ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
370 | break; | |
3bf61c55 GFT |
371 | case PCC_P1: |
372 | jwrite32(jme, JME_PCCRX0, | |
373 | ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
374 | ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
375 | break; | |
376 | case PCC_P2: | |
377 | jwrite32(jme, JME_PCCRX0, | |
378 | ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
379 | ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
380 | break; | |
381 | case PCC_P3: | |
382 | jwrite32(jme, JME_PCCRX0, | |
383 | ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
384 | ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
385 | break; | |
386 | default: | |
387 | break; | |
388 | } | |
192570e0 | 389 | wmb(); |
3bf61c55 | 390 | |
cd0ff491 | 391 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
7ca9ebee | 392 | netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p); |
d7699f87 GFT |
393 | } |
394 | ||
fcf45b4c | 395 | static void |
3bf61c55 | 396 | jme_start_irq(struct jme_adapter *jme) |
d7699f87 | 397 | { |
3bf61c55 GFT |
398 | register struct dynpcc_info *dpi = &(jme->dpi); |
399 | ||
400 | jme_set_rx_pcc(jme, PCC_P1); | |
3bf61c55 GFT |
401 | dpi->cur = PCC_P1; |
402 | dpi->attempt = PCC_P1; | |
403 | dpi->cnt = 0; | |
404 | ||
405 | jwrite32(jme, JME_PCCTX, | |
8c198884 GFT |
406 | ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) | |
407 | ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) | | |
3bf61c55 GFT |
408 | PCCTXQ0_EN |
409 | ); | |
410 | ||
d7699f87 GFT |
411 | /* |
412 | * Enable Interrupts | |
413 | */ | |
414 | jwrite32(jme, JME_IENS, INTR_ENABLE); | |
415 | } | |
416 | ||
cd0ff491 | 417 | static inline void |
3bf61c55 | 418 | jme_stop_irq(struct jme_adapter *jme) |
d7699f87 GFT |
419 | { |
420 | /* | |
421 | * Disable Interrupts | |
422 | */ | |
cd0ff491 | 423 | jwrite32f(jme, JME_IENC, INTR_ENABLE); |
d7699f87 GFT |
424 | } |
425 | ||
cd0ff491 | 426 | static u32 |
cdcdc9eb GFT |
427 | jme_linkstat_from_phy(struct jme_adapter *jme) |
428 | { | |
cd0ff491 | 429 | u32 phylink, bmsr; |
cdcdc9eb GFT |
430 | |
431 | phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17); | |
432 | bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR); | |
cd0ff491 | 433 | if (bmsr & BMSR_ANCOMP) |
cdcdc9eb GFT |
434 | phylink |= PHY_LINK_AUTONEG_COMPLETE; |
435 | ||
436 | return phylink; | |
437 | } | |
438 | ||
cd0ff491 | 439 | static inline void |
55d19799 | 440 | jme_set_phyfifo_5level(struct jme_adapter *jme) |
cd0ff491 GFT |
441 | { |
442 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); | |
443 | } | |
444 | ||
445 | static inline void | |
55d19799 | 446 | jme_set_phyfifo_8level(struct jme_adapter *jme) |
cd0ff491 GFT |
447 | { |
448 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); | |
449 | } | |
450 | ||
fcf45b4c GFT |
451 | static int |
452 | jme_check_link(struct net_device *netdev, int testonly) | |
d7699f87 GFT |
453 | { |
454 | struct jme_adapter *jme = netdev_priv(netdev); | |
dc4185bd | 455 | u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr; |
79ce639c | 456 | char linkmsg[64]; |
fcf45b4c | 457 | int rc = 0; |
d7699f87 | 458 | |
b3821cc5 | 459 | linkmsg[0] = '\0'; |
cdcdc9eb | 460 | |
cd0ff491 | 461 | if (jme->fpgaver) |
cdcdc9eb GFT |
462 | phylink = jme_linkstat_from_phy(jme); |
463 | else | |
464 | phylink = jread32(jme, JME_PHY_LINK); | |
d7699f87 | 465 | |
cd0ff491 GFT |
466 | if (phylink & PHY_LINK_UP) { |
467 | if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { | |
8c198884 GFT |
468 | /* |
469 | * If we did not enable AN | |
470 | * Speed/Duplex Info should be obtained from SMI | |
471 | */ | |
472 | phylink = PHY_LINK_UP; | |
473 | ||
474 | bmcr = jme_mdio_read(jme->dev, | |
475 | jme->mii_if.phy_id, | |
476 | MII_BMCR); | |
477 | ||
478 | phylink |= ((bmcr & BMCR_SPEED1000) && | |
479 | (bmcr & BMCR_SPEED100) == 0) ? | |
480 | PHY_LINK_SPEED_1000M : | |
481 | (bmcr & BMCR_SPEED100) ? | |
482 | PHY_LINK_SPEED_100M : | |
483 | PHY_LINK_SPEED_10M; | |
484 | ||
485 | phylink |= (bmcr & BMCR_FULLDPLX) ? | |
486 | PHY_LINK_DUPLEX : 0; | |
79ce639c | 487 | |
b3821cc5 | 488 | strcat(linkmsg, "Forced: "); |
cd0ff491 | 489 | } else { |
8c198884 GFT |
490 | /* |
491 | * Keep polling for speed/duplex resolve complete | |
492 | */ | |
cd0ff491 | 493 | while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && |
8c198884 GFT |
494 | --cnt) { |
495 | ||
496 | udelay(1); | |
8c198884 | 497 | |
cd0ff491 | 498 | if (jme->fpgaver) |
cdcdc9eb GFT |
499 | phylink = jme_linkstat_from_phy(jme); |
500 | else | |
501 | phylink = jread32(jme, JME_PHY_LINK); | |
8c198884 | 502 | } |
cd0ff491 | 503 | if (!cnt) |
937ef75a | 504 | pr_err("Waiting speed resolve timeout\n"); |
79ce639c | 505 | |
b3821cc5 | 506 | strcat(linkmsg, "ANed: "); |
d7699f87 GFT |
507 | } |
508 | ||
cd0ff491 | 509 | if (jme->phylink == phylink) { |
fcf45b4c GFT |
510 | rc = 1; |
511 | goto out; | |
512 | } | |
cd0ff491 | 513 | if (testonly) |
fcf45b4c GFT |
514 | goto out; |
515 | ||
516 | jme->phylink = phylink; | |
517 | ||
dc4185bd GFT |
518 | /* |
519 | * The speed/duplex setting of jme->reg_ghc already cleared | |
520 | * by jme_reset_mac_processor() | |
521 | */ | |
cd0ff491 GFT |
522 | switch (phylink & PHY_LINK_SPEED_MASK) { |
523 | case PHY_LINK_SPEED_10M: | |
dc4185bd | 524 | jme->reg_ghc |= GHC_SPEED_10M; |
cd0ff491 | 525 | strcat(linkmsg, "10 Mbps, "); |
cd0ff491 GFT |
526 | break; |
527 | case PHY_LINK_SPEED_100M: | |
dc4185bd | 528 | jme->reg_ghc |= GHC_SPEED_100M; |
cd0ff491 | 529 | strcat(linkmsg, "100 Mbps, "); |
cd0ff491 GFT |
530 | break; |
531 | case PHY_LINK_SPEED_1000M: | |
dc4185bd | 532 | jme->reg_ghc |= GHC_SPEED_1000M; |
cd0ff491 | 533 | strcat(linkmsg, "1000 Mbps, "); |
cd0ff491 GFT |
534 | break; |
535 | default: | |
536 | break; | |
d7699f87 | 537 | } |
d7699f87 | 538 | |
cd0ff491 | 539 | if (phylink & PHY_LINK_DUPLEX) { |
d7699f87 | 540 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); |
809b2798 | 541 | jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX); |
dc4185bd | 542 | jme->reg_ghc |= GHC_DPX; |
cd0ff491 | 543 | } else { |
d7699f87 | 544 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | |
3bf61c55 GFT |
545 | TXMCS_BACKOFF | |
546 | TXMCS_CARRIERSENSE | | |
547 | TXMCS_COLLISION); | |
809b2798 | 548 | jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX); |
8c198884 | 549 | } |
7ee473a3 | 550 | |
dc4185bd GFT |
551 | jwrite32(jme, JME_GHC, jme->reg_ghc); |
552 | ||
7ee473a3 | 553 | if (is_buggy250(jme->pdev->device, jme->chiprev)) { |
dc4185bd GFT |
554 | jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | |
555 | GPREG1_RSSPATCH); | |
7ee473a3 | 556 | if (!(phylink & PHY_LINK_DUPLEX)) |
dc4185bd | 557 | jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH; |
7ee473a3 GFT |
558 | switch (phylink & PHY_LINK_SPEED_MASK) { |
559 | case PHY_LINK_SPEED_10M: | |
55d19799 | 560 | jme_set_phyfifo_8level(jme); |
dc4185bd | 561 | jme->reg_gpreg1 |= GPREG1_RSSPATCH; |
7ee473a3 GFT |
562 | break; |
563 | case PHY_LINK_SPEED_100M: | |
55d19799 | 564 | jme_set_phyfifo_5level(jme); |
dc4185bd | 565 | jme->reg_gpreg1 |= GPREG1_RSSPATCH; |
7ee473a3 GFT |
566 | break; |
567 | case PHY_LINK_SPEED_1000M: | |
55d19799 | 568 | jme_set_phyfifo_8level(jme); |
7ee473a3 GFT |
569 | break; |
570 | default: | |
571 | break; | |
572 | } | |
573 | } | |
dc4185bd | 574 | jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); |
fcf45b4c | 575 | |
3b70a6fa GFT |
576 | strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? |
577 | "Full-Duplex, " : | |
578 | "Half-Duplex, "); | |
579 | strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ? | |
580 | "MDI-X" : | |
581 | "MDI"); | |
937ef75a | 582 | netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg); |
cd0ff491 GFT |
583 | netif_carrier_on(netdev); |
584 | } else { | |
585 | if (testonly) | |
fcf45b4c GFT |
586 | goto out; |
587 | ||
937ef75a | 588 | netif_info(jme, link, jme->dev, "Link is down\n"); |
fcf45b4c | 589 | jme->phylink = 0; |
cd0ff491 | 590 | netif_carrier_off(netdev); |
d7699f87 | 591 | } |
fcf45b4c GFT |
592 | |
593 | out: | |
594 | return rc; | |
d7699f87 GFT |
595 | } |
596 | ||
3bf61c55 GFT |
597 | static int |
598 | jme_setup_tx_resources(struct jme_adapter *jme) | |
d7699f87 | 599 | { |
d7699f87 GFT |
600 | struct jme_ring *txring = &(jme->txring[0]); |
601 | ||
602 | txring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
603 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
604 | &(txring->dmaalloc), | |
605 | GFP_ATOMIC); | |
fcf45b4c | 606 | |
0ede469c GFT |
607 | if (!txring->alloc) |
608 | goto err_set_null; | |
d7699f87 GFT |
609 | |
610 | /* | |
611 | * 16 Bytes align | |
612 | */ | |
cd0ff491 | 613 | txring->desc = (void *)ALIGN((unsigned long)(txring->alloc), |
3bf61c55 | 614 | RING_DESC_ALIGN); |
4330c2f2 | 615 | txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 616 | txring->next_to_use = 0; |
cdcdc9eb | 617 | atomic_set(&txring->next_to_clean, 0); |
b3821cc5 | 618 | atomic_set(&txring->nr_free, jme->tx_ring_size); |
d7699f87 | 619 | |
0ede469c GFT |
620 | txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
621 | jme->tx_ring_size, GFP_ATOMIC); | |
622 | if (unlikely(!(txring->bufinf))) | |
623 | goto err_free_txring; | |
624 | ||
d7699f87 | 625 | /* |
b3821cc5 | 626 | * Initialize Transmit Descriptors |
d7699f87 | 627 | */ |
b3821cc5 | 628 | memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size)); |
3bf61c55 | 629 | memset(txring->bufinf, 0, |
b3821cc5 | 630 | sizeof(struct jme_buffer_info) * jme->tx_ring_size); |
d7699f87 GFT |
631 | |
632 | return 0; | |
0ede469c GFT |
633 | |
634 | err_free_txring: | |
635 | dma_free_coherent(&(jme->pdev->dev), | |
636 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), | |
637 | txring->alloc, | |
638 | txring->dmaalloc); | |
639 | ||
640 | err_set_null: | |
641 | txring->desc = NULL; | |
642 | txring->dmaalloc = 0; | |
643 | txring->dma = 0; | |
644 | txring->bufinf = NULL; | |
645 | ||
646 | return -ENOMEM; | |
d7699f87 GFT |
647 | } |
648 | ||
3bf61c55 GFT |
649 | static void |
650 | jme_free_tx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
651 | { |
652 | int i; | |
653 | struct jme_ring *txring = &(jme->txring[0]); | |
0ede469c | 654 | struct jme_buffer_info *txbi; |
d7699f87 | 655 | |
cd0ff491 | 656 | if (txring->alloc) { |
0ede469c GFT |
657 | if (txring->bufinf) { |
658 | for (i = 0 ; i < jme->tx_ring_size ; ++i) { | |
659 | txbi = txring->bufinf + i; | |
660 | if (txbi->skb) { | |
661 | dev_kfree_skb(txbi->skb); | |
662 | txbi->skb = NULL; | |
663 | } | |
664 | txbi->mapping = 0; | |
665 | txbi->len = 0; | |
666 | txbi->nr_desc = 0; | |
667 | txbi->start_xmit = 0; | |
d7699f87 | 668 | } |
0ede469c | 669 | kfree(txring->bufinf); |
d7699f87 GFT |
670 | } |
671 | ||
672 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 673 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
d7699f87 GFT |
674 | txring->alloc, |
675 | txring->dmaalloc); | |
3bf61c55 GFT |
676 | |
677 | txring->alloc = NULL; | |
678 | txring->desc = NULL; | |
679 | txring->dmaalloc = 0; | |
680 | txring->dma = 0; | |
0ede469c | 681 | txring->bufinf = NULL; |
d7699f87 | 682 | } |
3bf61c55 | 683 | txring->next_to_use = 0; |
cdcdc9eb | 684 | atomic_set(&txring->next_to_clean, 0); |
79ce639c | 685 | atomic_set(&txring->nr_free, 0); |
d7699f87 GFT |
686 | } |
687 | ||
cd0ff491 | 688 | static inline void |
3bf61c55 | 689 | jme_enable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
690 | { |
691 | /* | |
692 | * Select Queue 0 | |
693 | */ | |
694 | jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0); | |
cd0ff491 | 695 | wmb(); |
d7699f87 GFT |
696 | |
697 | /* | |
698 | * Setup TX Queue 0 DMA Bass Address | |
699 | */ | |
fcf45b4c | 700 | jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
3bf61c55 | 701 | jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32); |
fcf45b4c | 702 | jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
d7699f87 GFT |
703 | |
704 | /* | |
705 | * Setup TX Descptor Count | |
706 | */ | |
b3821cc5 | 707 | jwrite32(jme, JME_TXQDC, jme->tx_ring_size); |
d7699f87 GFT |
708 | |
709 | /* | |
710 | * Enable TX Engine | |
711 | */ | |
712 | wmb(); | |
dc4185bd | 713 | jwrite32f(jme, JME_TXCS, jme->reg_txcs | |
4330c2f2 GFT |
714 | TXCS_SELECT_QUEUE0 | |
715 | TXCS_ENABLE); | |
d7699f87 | 716 | |
dc4185bd GFT |
717 | /* |
718 | * Start clock for TX MAC Processor | |
719 | */ | |
720 | jme_mac_txclk_on(jme); | |
d7699f87 GFT |
721 | } |
722 | ||
cd0ff491 | 723 | static inline void |
29bdd921 GFT |
724 | jme_restart_tx_engine(struct jme_adapter *jme) |
725 | { | |
726 | /* | |
727 | * Restart TX Engine | |
728 | */ | |
729 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | |
730 | TXCS_SELECT_QUEUE0 | | |
731 | TXCS_ENABLE); | |
732 | } | |
733 | ||
cd0ff491 | 734 | static inline void |
3bf61c55 | 735 | jme_disable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
736 | { |
737 | int i; | |
cd0ff491 | 738 | u32 val; |
d7699f87 GFT |
739 | |
740 | /* | |
741 | * Disable TX Engine | |
742 | */ | |
fcf45b4c | 743 | jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0); |
cd0ff491 | 744 | wmb(); |
d7699f87 GFT |
745 | |
746 | val = jread32(jme, JME_TXCS); | |
cd0ff491 | 747 | for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) { |
fcf45b4c | 748 | mdelay(1); |
d7699f87 | 749 | val = jread32(jme, JME_TXCS); |
cd0ff491 | 750 | rmb(); |
d7699f87 GFT |
751 | } |
752 | ||
cd0ff491 | 753 | if (!i) |
937ef75a | 754 | pr_err("Disable TX engine timeout\n"); |
dc4185bd GFT |
755 | |
756 | /* | |
757 | * Stop clock for TX MAC Processor | |
758 | */ | |
759 | jme_mac_txclk_off(jme); | |
d7699f87 GFT |
760 | } |
761 | ||
3bf61c55 GFT |
762 | static void |
763 | jme_set_clean_rxdesc(struct jme_adapter *jme, int i) | |
d7699f87 | 764 | { |
0ede469c | 765 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 766 | register struct rxdesc *rxdesc = rxring->desc; |
4330c2f2 GFT |
767 | struct jme_buffer_info *rxbi = rxring->bufinf; |
768 | rxdesc += i; | |
769 | rxbi += i; | |
770 | ||
771 | rxdesc->dw[0] = 0; | |
772 | rxdesc->dw[1] = 0; | |
3bf61c55 | 773 | rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32); |
fcf45b4c GFT |
774 | rxdesc->desc1.bufaddrl = cpu_to_le32( |
775 | (__u64)rxbi->mapping & 0xFFFFFFFFUL); | |
3bf61c55 | 776 | rxdesc->desc1.datalen = cpu_to_le16(rxbi->len); |
cd0ff491 | 777 | if (jme->dev->features & NETIF_F_HIGHDMA) |
3bf61c55 | 778 | rxdesc->desc1.flags = RXFLAG_64BIT; |
d7699f87 | 779 | wmb(); |
3bf61c55 | 780 | rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT; |
d7699f87 GFT |
781 | } |
782 | ||
3bf61c55 GFT |
783 | static int |
784 | jme_make_new_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
785 | { |
786 | struct jme_ring *rxring = &(jme->rxring[0]); | |
b3821cc5 | 787 | struct jme_buffer_info *rxbi = rxring->bufinf + i; |
cd0ff491 | 788 | struct sk_buff *skb; |
4330c2f2 | 789 | |
79ce639c GFT |
790 | skb = netdev_alloc_skb(jme->dev, |
791 | jme->dev->mtu + RX_EXTRA_LEN); | |
cd0ff491 | 792 | if (unlikely(!skb)) |
4330c2f2 | 793 | return -ENOMEM; |
3b70a6fa GFT |
794 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) |
795 | skb->dev = jme->dev; | |
796 | #endif | |
3bf61c55 | 797 | |
4330c2f2 | 798 | rxbi->skb = skb; |
3bf61c55 | 799 | rxbi->len = skb_tailroom(skb); |
b3821cc5 GFT |
800 | rxbi->mapping = pci_map_page(jme->pdev, |
801 | virt_to_page(skb->data), | |
802 | offset_in_page(skb->data), | |
803 | rxbi->len, | |
804 | PCI_DMA_FROMDEVICE); | |
4330c2f2 GFT |
805 | |
806 | return 0; | |
807 | } | |
808 | ||
3bf61c55 GFT |
809 | static void |
810 | jme_free_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
811 | { |
812 | struct jme_ring *rxring = &(jme->rxring[0]); | |
813 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
814 | rxbi += i; | |
815 | ||
cd0ff491 | 816 | if (rxbi->skb) { |
b3821cc5 | 817 | pci_unmap_page(jme->pdev, |
4330c2f2 | 818 | rxbi->mapping, |
3bf61c55 | 819 | rxbi->len, |
4330c2f2 GFT |
820 | PCI_DMA_FROMDEVICE); |
821 | dev_kfree_skb(rxbi->skb); | |
822 | rxbi->skb = NULL; | |
823 | rxbi->mapping = 0; | |
3bf61c55 | 824 | rxbi->len = 0; |
4330c2f2 GFT |
825 | } |
826 | } | |
827 | ||
3bf61c55 GFT |
828 | static void |
829 | jme_free_rx_resources(struct jme_adapter *jme) | |
830 | { | |
831 | int i; | |
832 | struct jme_ring *rxring = &(jme->rxring[0]); | |
833 | ||
cd0ff491 | 834 | if (rxring->alloc) { |
0ede469c GFT |
835 | if (rxring->bufinf) { |
836 | for (i = 0 ; i < jme->rx_ring_size ; ++i) | |
837 | jme_free_rx_buf(jme, i); | |
838 | kfree(rxring->bufinf); | |
839 | } | |
3bf61c55 GFT |
840 | |
841 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 842 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
3bf61c55 GFT |
843 | rxring->alloc, |
844 | rxring->dmaalloc); | |
845 | rxring->alloc = NULL; | |
846 | rxring->desc = NULL; | |
847 | rxring->dmaalloc = 0; | |
848 | rxring->dma = 0; | |
0ede469c | 849 | rxring->bufinf = NULL; |
3bf61c55 GFT |
850 | } |
851 | rxring->next_to_use = 0; | |
cdcdc9eb | 852 | atomic_set(&rxring->next_to_clean, 0); |
3bf61c55 GFT |
853 | } |
854 | ||
855 | static int | |
856 | jme_setup_rx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
857 | { |
858 | int i; | |
859 | struct jme_ring *rxring = &(jme->rxring[0]); | |
860 | ||
861 | rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
862 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
863 | &(rxring->dmaalloc), | |
864 | GFP_ATOMIC); | |
0ede469c GFT |
865 | if (!rxring->alloc) |
866 | goto err_set_null; | |
d7699f87 GFT |
867 | |
868 | /* | |
869 | * 16 Bytes align | |
870 | */ | |
cd0ff491 | 871 | rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc), |
3bf61c55 | 872 | RING_DESC_ALIGN); |
4330c2f2 | 873 | rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 874 | rxring->next_to_use = 0; |
cdcdc9eb | 875 | atomic_set(&rxring->next_to_clean, 0); |
d7699f87 | 876 | |
0ede469c GFT |
877 | rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
878 | jme->rx_ring_size, GFP_ATOMIC); | |
879 | if (unlikely(!(rxring->bufinf))) | |
880 | goto err_free_rxring; | |
881 | ||
d7699f87 GFT |
882 | /* |
883 | * Initiallize Receive Descriptors | |
884 | */ | |
0ede469c GFT |
885 | memset(rxring->bufinf, 0, |
886 | sizeof(struct jme_buffer_info) * jme->rx_ring_size); | |
cd0ff491 GFT |
887 | for (i = 0 ; i < jme->rx_ring_size ; ++i) { |
888 | if (unlikely(jme_make_new_rx_buf(jme, i))) { | |
3bf61c55 GFT |
889 | jme_free_rx_resources(jme); |
890 | return -ENOMEM; | |
891 | } | |
d7699f87 GFT |
892 | |
893 | jme_set_clean_rxdesc(jme, i); | |
894 | } | |
895 | ||
d7699f87 | 896 | return 0; |
0ede469c GFT |
897 | |
898 | err_free_rxring: | |
899 | dma_free_coherent(&(jme->pdev->dev), | |
900 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), | |
901 | rxring->alloc, | |
902 | rxring->dmaalloc); | |
903 | err_set_null: | |
904 | rxring->desc = NULL; | |
905 | rxring->dmaalloc = 0; | |
906 | rxring->dma = 0; | |
907 | rxring->bufinf = NULL; | |
908 | ||
909 | return -ENOMEM; | |
d7699f87 GFT |
910 | } |
911 | ||
cd0ff491 | 912 | static inline void |
3bf61c55 | 913 | jme_enable_rx_engine(struct jme_adapter *jme) |
d7699f87 | 914 | { |
cd0ff491 GFT |
915 | /* |
916 | * Select Queue 0 | |
917 | */ | |
918 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | | |
919 | RXCS_QUEUESEL_Q0); | |
920 | wmb(); | |
921 | ||
d7699f87 GFT |
922 | /* |
923 | * Setup RX DMA Bass Address | |
924 | */ | |
0ede469c | 925 | jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
3bf61c55 | 926 | jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32); |
0ede469c | 927 | jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
d7699f87 GFT |
928 | |
929 | /* | |
b3821cc5 | 930 | * Setup RX Descriptor Count |
d7699f87 | 931 | */ |
b3821cc5 | 932 | jwrite32(jme, JME_RXQDC, jme->rx_ring_size); |
d7699f87 | 933 | |
3bf61c55 | 934 | /* |
d7699f87 GFT |
935 | * Setup Unicast Filter |
936 | */ | |
e523cd89 | 937 | jme_set_unicastaddr(jme->dev); |
d7699f87 GFT |
938 | jme_set_multi(jme->dev); |
939 | ||
940 | /* | |
941 | * Enable RX Engine | |
942 | */ | |
943 | wmb(); | |
dc4185bd | 944 | jwrite32f(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
945 | RXCS_QUEUESEL_Q0 | |
946 | RXCS_ENABLE | | |
947 | RXCS_QST); | |
dc4185bd GFT |
948 | |
949 | /* | |
950 | * Start clock for RX MAC Processor | |
951 | */ | |
952 | jme_mac_rxclk_on(jme); | |
d7699f87 GFT |
953 | } |
954 | ||
cd0ff491 | 955 | static inline void |
3bf61c55 | 956 | jme_restart_rx_engine(struct jme_adapter *jme) |
4330c2f2 GFT |
957 | { |
958 | /* | |
3bf61c55 | 959 | * Start RX Engine |
4330c2f2 | 960 | */ |
79ce639c | 961 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
962 | RXCS_QUEUESEL_Q0 | |
963 | RXCS_ENABLE | | |
964 | RXCS_QST); | |
965 | } | |
966 | ||
cd0ff491 | 967 | static inline void |
3bf61c55 | 968 | jme_disable_rx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
969 | { |
970 | int i; | |
cd0ff491 | 971 | u32 val; |
d7699f87 GFT |
972 | |
973 | /* | |
974 | * Disable RX Engine | |
975 | */ | |
29bdd921 | 976 | jwrite32(jme, JME_RXCS, jme->reg_rxcs); |
cd0ff491 | 977 | wmb(); |
d7699f87 GFT |
978 | |
979 | val = jread32(jme, JME_RXCS); | |
cd0ff491 | 980 | for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) { |
29bdd921 | 981 | mdelay(1); |
d7699f87 | 982 | val = jread32(jme, JME_RXCS); |
cd0ff491 | 983 | rmb(); |
d7699f87 GFT |
984 | } |
985 | ||
cd0ff491 | 986 | if (!i) |
937ef75a | 987 | pr_err("Disable RX engine timeout\n"); |
d7699f87 | 988 | |
dc4185bd GFT |
989 | /* |
990 | * Stop clock for RX MAC Processor | |
991 | */ | |
992 | jme_mac_rxclk_off(jme); | |
d7699f87 GFT |
993 | } |
994 | ||
93f698ca GFT |
995 | static u16 |
996 | jme_udpsum(struct sk_buff *skb) | |
997 | { | |
998 | u16 csum = 0xFFFFu; | |
999 | ||
1000 | if (skb->len < (ETH_HLEN + sizeof(struct iphdr))) | |
1001 | return csum; | |
1002 | if (skb->protocol != htons(ETH_P_IP)) | |
1003 | return csum; | |
1004 | skb_set_network_header(skb, ETH_HLEN); | |
1005 | if ((ip_hdr(skb)->protocol != IPPROTO_UDP) || | |
1006 | (skb->len < (ETH_HLEN + | |
1007 | (ip_hdr(skb)->ihl << 2) + | |
1008 | sizeof(struct udphdr)))) { | |
1009 | skb_reset_network_header(skb); | |
1010 | return csum; | |
1011 | } | |
1012 | skb_set_transport_header(skb, | |
1013 | ETH_HLEN + (ip_hdr(skb)->ihl << 2)); | |
1014 | csum = udp_hdr(skb)->check; | |
1015 | skb_reset_transport_header(skb); | |
1016 | skb_reset_network_header(skb); | |
1017 | ||
1018 | return csum; | |
1019 | } | |
1020 | ||
192570e0 | 1021 | static int |
93f698ca | 1022 | jme_rxsum_ok(struct jme_adapter *jme, u16 flags, struct sk_buff *skb) |
192570e0 | 1023 | { |
cd0ff491 | 1024 | if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) |
192570e0 GFT |
1025 | return false; |
1026 | ||
0ede469c GFT |
1027 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS)) |
1028 | == RXWBFLAG_TCPON)) { | |
1029 | if (flags & RXWBFLAG_IPV4) | |
7ca9ebee | 1030 | netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n"); |
0ede469c | 1031 | return false; |
192570e0 GFT |
1032 | } |
1033 | ||
0ede469c | 1034 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS)) |
93f698ca | 1035 | == RXWBFLAG_UDPON) && jme_udpsum(skb)) { |
0ede469c | 1036 | if (flags & RXWBFLAG_IPV4) |
937ef75a | 1037 | netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n"); |
0ede469c | 1038 | return false; |
192570e0 GFT |
1039 | } |
1040 | ||
0ede469c GFT |
1041 | if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS)) |
1042 | == RXWBFLAG_IPV4)) { | |
937ef75a | 1043 | netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n"); |
0ede469c | 1044 | return false; |
192570e0 GFT |
1045 | } |
1046 | ||
1047 | return true; | |
1048 | } | |
1049 | ||
3bf61c55 | 1050 | static void |
42b1055e | 1051 | jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) |
d7699f87 | 1052 | { |
d7699f87 | 1053 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 1054 | struct rxdesc *rxdesc = rxring->desc; |
3bf61c55 | 1055 | struct jme_buffer_info *rxbi = rxring->bufinf; |
d7699f87 | 1056 | struct sk_buff *skb; |
3bf61c55 | 1057 | int framesize; |
d7699f87 | 1058 | |
3bf61c55 GFT |
1059 | rxdesc += idx; |
1060 | rxbi += idx; | |
d7699f87 | 1061 | |
3bf61c55 GFT |
1062 | skb = rxbi->skb; |
1063 | pci_dma_sync_single_for_cpu(jme->pdev, | |
1064 | rxbi->mapping, | |
1065 | rxbi->len, | |
1066 | PCI_DMA_FROMDEVICE); | |
1067 | ||
cd0ff491 | 1068 | if (unlikely(jme_make_new_rx_buf(jme, idx))) { |
3bf61c55 GFT |
1069 | pci_dma_sync_single_for_device(jme->pdev, |
1070 | rxbi->mapping, | |
1071 | rxbi->len, | |
1072 | PCI_DMA_FROMDEVICE); | |
1073 | ||
1074 | ++(NET_STAT(jme).rx_dropped); | |
cd0ff491 | 1075 | } else { |
3bf61c55 GFT |
1076 | framesize = le16_to_cpu(rxdesc->descwb.framesize) |
1077 | - RX_PREPAD_SIZE; | |
1078 | ||
1079 | skb_reserve(skb, RX_PREPAD_SIZE); | |
1080 | skb_put(skb, framesize); | |
1081 | skb->protocol = eth_type_trans(skb, jme->dev); | |
1082 | ||
93f698ca | 1083 | if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags), skb)) |
8c198884 | 1084 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
29bdd921 | 1085 | else |
08f5fcfa | 1086 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35) |
29bdd921 | 1087 | skb->ip_summed = CHECKSUM_NONE; |
08f5fcfa ED |
1088 | #else |
1089 | skb_checksum_none_assert(skb); | |
1090 | #endif | |
8c198884 | 1091 | |
3b70a6fa | 1092 | if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) { |
cd0ff491 | 1093 | if (jme->vlgrp) { |
cdcdc9eb | 1094 | jme->jme_vlan_rx(skb, jme->vlgrp, |
3b70a6fa | 1095 | le16_to_cpu(rxdesc->descwb.vlan)); |
b3821cc5 | 1096 | NET_STAT(jme).rx_bytes += 4; |
7ca9ebee | 1097 | } else { |
7ca9ebee | 1098 | dev_kfree_skb(skb); |
b3821cc5 | 1099 | } |
cd0ff491 | 1100 | } else { |
cdcdc9eb | 1101 | jme->jme_rx(skb); |
b3821cc5 | 1102 | } |
3bf61c55 | 1103 | |
3b70a6fa GFT |
1104 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) == |
1105 | cpu_to_le16(RXWBFLAG_DEST_MUL)) | |
3bf61c55 GFT |
1106 | ++(NET_STAT(jme).multicast); |
1107 | ||
3bf61c55 GFT |
1108 | NET_STAT(jme).rx_bytes += framesize; |
1109 | ++(NET_STAT(jme).rx_packets); | |
1110 | } | |
1111 | ||
1112 | jme_set_clean_rxdesc(jme, idx); | |
1113 | ||
1114 | } | |
1115 | ||
1116 | static int | |
1117 | jme_process_receive(struct jme_adapter *jme, int limit) | |
1118 | { | |
1119 | struct jme_ring *rxring = &(jme->rxring[0]); | |
cd0ff491 | 1120 | struct rxdesc *rxdesc = rxring->desc; |
b3821cc5 | 1121 | int i, j, ccnt, desccnt, mask = jme->rx_ring_mask; |
3bf61c55 | 1122 | |
cd0ff491 | 1123 | if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) |
192570e0 GFT |
1124 | goto out_inc; |
1125 | ||
cd0ff491 | 1126 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
192570e0 GFT |
1127 | goto out_inc; |
1128 | ||
cd0ff491 | 1129 | if (unlikely(!netif_carrier_ok(jme->dev))) |
192570e0 GFT |
1130 | goto out_inc; |
1131 | ||
cdcdc9eb | 1132 | i = atomic_read(&rxring->next_to_clean); |
0ede469c | 1133 | while (limit > 0) { |
3bf61c55 GFT |
1134 | rxdesc = rxring->desc; |
1135 | rxdesc += i; | |
1136 | ||
3b70a6fa | 1137 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) || |
3bf61c55 GFT |
1138 | !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL)) |
1139 | goto out; | |
0ede469c | 1140 | --limit; |
d7699f87 | 1141 | |
9134abda | 1142 | rmb(); |
4330c2f2 GFT |
1143 | desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; |
1144 | ||
cd0ff491 | 1145 | if (unlikely(desccnt > 1 || |
192570e0 | 1146 | rxdesc->descwb.errstat & RXWBERR_ALLERR)) { |
d7699f87 | 1147 | |
cd0ff491 | 1148 | if (rxdesc->descwb.errstat & RXWBERR_CRCERR) |
3bf61c55 | 1149 | ++(NET_STAT(jme).rx_crc_errors); |
cd0ff491 | 1150 | else if (rxdesc->descwb.errstat & RXWBERR_OVERUN) |
3bf61c55 GFT |
1151 | ++(NET_STAT(jme).rx_fifo_errors); |
1152 | else | |
1153 | ++(NET_STAT(jme).rx_errors); | |
4330c2f2 | 1154 | |
cd0ff491 | 1155 | if (desccnt > 1) |
3bf61c55 | 1156 | limit -= desccnt - 1; |
4330c2f2 | 1157 | |
cd0ff491 | 1158 | for (j = i, ccnt = desccnt ; ccnt-- ; ) { |
4330c2f2 | 1159 | jme_set_clean_rxdesc(jme, j); |
b3821cc5 | 1160 | j = (j + 1) & (mask); |
4330c2f2 | 1161 | } |
3bf61c55 | 1162 | |
cd0ff491 | 1163 | } else { |
42b1055e | 1164 | jme_alloc_and_feed_skb(jme, i); |
3bf61c55 | 1165 | } |
4330c2f2 | 1166 | |
b3821cc5 | 1167 | i = (i + desccnt) & (mask); |
3bf61c55 | 1168 | } |
4330c2f2 | 1169 | |
3bf61c55 | 1170 | out: |
cdcdc9eb | 1171 | atomic_set(&rxring->next_to_clean, i); |
4330c2f2 | 1172 | |
192570e0 GFT |
1173 | out_inc: |
1174 | atomic_inc(&jme->rx_cleaning); | |
1175 | ||
3bf61c55 | 1176 | return limit > 0 ? limit : 0; |
4330c2f2 | 1177 | |
3bf61c55 | 1178 | } |
d7699f87 | 1179 | |
79ce639c GFT |
1180 | static void |
1181 | jme_attempt_pcc(struct dynpcc_info *dpi, int atmp) | |
1182 | { | |
cd0ff491 | 1183 | if (likely(atmp == dpi->cur)) { |
192570e0 | 1184 | dpi->cnt = 0; |
79ce639c | 1185 | return; |
192570e0 | 1186 | } |
79ce639c | 1187 | |
cd0ff491 | 1188 | if (dpi->attempt == atmp) { |
79ce639c | 1189 | ++(dpi->cnt); |
cd0ff491 | 1190 | } else { |
79ce639c GFT |
1191 | dpi->attempt = atmp; |
1192 | dpi->cnt = 0; | |
1193 | } | |
1194 | ||
1195 | } | |
1196 | ||
1197 | static void | |
1198 | jme_dynamic_pcc(struct jme_adapter *jme) | |
1199 | { | |
1200 | register struct dynpcc_info *dpi = &(jme->dpi); | |
1201 | ||
cd0ff491 | 1202 | if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) |
79ce639c | 1203 | jme_attempt_pcc(dpi, PCC_P3); |
7ca9ebee GFT |
1204 | else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD || |
1205 | dpi->intr_cnt > PCC_INTR_THRESHOLD) | |
79ce639c GFT |
1206 | jme_attempt_pcc(dpi, PCC_P2); |
1207 | else | |
1208 | jme_attempt_pcc(dpi, PCC_P1); | |
1209 | ||
cd0ff491 GFT |
1210 | if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { |
1211 | if (dpi->attempt < dpi->cur) | |
1212 | tasklet_schedule(&jme->rxclean_task); | |
79ce639c GFT |
1213 | jme_set_rx_pcc(jme, dpi->attempt); |
1214 | dpi->cur = dpi->attempt; | |
1215 | dpi->cnt = 0; | |
1216 | } | |
1217 | } | |
1218 | ||
1219 | static void | |
1220 | jme_start_pcc_timer(struct jme_adapter *jme) | |
1221 | { | |
1222 | struct dynpcc_info *dpi = &(jme->dpi); | |
1223 | dpi->last_bytes = NET_STAT(jme).rx_bytes; | |
1224 | dpi->last_pkts = NET_STAT(jme).rx_packets; | |
1225 | dpi->intr_cnt = 0; | |
1226 | jwrite32(jme, JME_TMCSR, | |
1227 | TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT)); | |
1228 | } | |
1229 | ||
cd0ff491 | 1230 | static inline void |
29bdd921 GFT |
1231 | jme_stop_pcc_timer(struct jme_adapter *jme) |
1232 | { | |
1233 | jwrite32(jme, JME_TMCSR, 0); | |
1234 | } | |
1235 | ||
cd0ff491 GFT |
1236 | static void |
1237 | jme_shutdown_nic(struct jme_adapter *jme) | |
1238 | { | |
1239 | u32 phylink; | |
1240 | ||
1241 | phylink = jme_linkstat_from_phy(jme); | |
1242 | ||
1243 | if (!(phylink & PHY_LINK_UP)) { | |
1244 | /* | |
1245 | * Disable all interrupt before issue timer | |
1246 | */ | |
1247 | jme_stop_irq(jme); | |
1248 | jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE); | |
1249 | } | |
1250 | } | |
1251 | ||
79ce639c GFT |
1252 | static void |
1253 | jme_pcc_tasklet(unsigned long arg) | |
1254 | { | |
cd0ff491 | 1255 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c GFT |
1256 | struct net_device *netdev = jme->dev; |
1257 | ||
cd0ff491 GFT |
1258 | if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) { |
1259 | jme_shutdown_nic(jme); | |
1260 | return; | |
1261 | } | |
29bdd921 | 1262 | |
cd0ff491 | 1263 | if (unlikely(!netif_carrier_ok(netdev) || |
29bdd921 GFT |
1264 | (atomic_read(&jme->link_changing) != 1) |
1265 | )) { | |
1266 | jme_stop_pcc_timer(jme); | |
79ce639c GFT |
1267 | return; |
1268 | } | |
29bdd921 | 1269 | |
cd0ff491 | 1270 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
192570e0 GFT |
1271 | jme_dynamic_pcc(jme); |
1272 | ||
79ce639c GFT |
1273 | jme_start_pcc_timer(jme); |
1274 | } | |
1275 | ||
cd0ff491 | 1276 | static inline void |
192570e0 GFT |
1277 | jme_polling_mode(struct jme_adapter *jme) |
1278 | { | |
1279 | jme_set_rx_pcc(jme, PCC_OFF); | |
1280 | } | |
1281 | ||
cd0ff491 | 1282 | static inline void |
192570e0 GFT |
1283 | jme_interrupt_mode(struct jme_adapter *jme) |
1284 | { | |
1285 | jme_set_rx_pcc(jme, PCC_P1); | |
1286 | } | |
1287 | ||
cd0ff491 GFT |
1288 | static inline int |
1289 | jme_pseudo_hotplug_enabled(struct jme_adapter *jme) | |
1290 | { | |
1291 | u32 apmc; | |
1292 | apmc = jread32(jme, JME_APMC); | |
1293 | return apmc & JME_APMC_PSEUDO_HP_EN; | |
1294 | } | |
1295 | ||
1296 | static void | |
1297 | jme_start_shutdown_timer(struct jme_adapter *jme) | |
1298 | { | |
1299 | u32 apmc; | |
1300 | ||
1301 | apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN; | |
1302 | apmc &= ~JME_APMC_EPIEN_CTRL; | |
1303 | if (!no_extplug) { | |
1304 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN); | |
1305 | wmb(); | |
1306 | } | |
1307 | jwrite32f(jme, JME_APMC, apmc); | |
1308 | ||
1309 | jwrite32f(jme, JME_TIMER2, 0); | |
1310 | set_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1311 | jwrite32(jme, JME_TMCSR, | |
1312 | TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT)); | |
1313 | } | |
1314 | ||
1315 | static void | |
1316 | jme_stop_shutdown_timer(struct jme_adapter *jme) | |
1317 | { | |
1318 | u32 apmc; | |
1319 | ||
1320 | jwrite32f(jme, JME_TMCSR, 0); | |
1321 | jwrite32f(jme, JME_TIMER2, 0); | |
1322 | clear_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1323 | ||
1324 | apmc = jread32(jme, JME_APMC); | |
1325 | apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL); | |
1326 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS); | |
1327 | wmb(); | |
1328 | jwrite32f(jme, JME_APMC, apmc); | |
1329 | } | |
1330 | ||
3bf61c55 GFT |
1331 | static void |
1332 | jme_link_change_tasklet(unsigned long arg) | |
1333 | { | |
cd0ff491 | 1334 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1335 | struct net_device *netdev = jme->dev; |
fcf45b4c GFT |
1336 | int rc; |
1337 | ||
cd0ff491 GFT |
1338 | while (!atomic_dec_and_test(&jme->link_changing)) { |
1339 | atomic_inc(&jme->link_changing); | |
937ef75a | 1340 | netif_info(jme, intr, jme->dev, "Get link change lock failed\n"); |
58c92f28 | 1341 | while (atomic_read(&jme->link_changing) != 1) |
937ef75a | 1342 | netif_info(jme, intr, jme->dev, "Waiting link change lock\n"); |
cd0ff491 | 1343 | } |
fcf45b4c | 1344 | |
cd0ff491 | 1345 | if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) |
fcf45b4c GFT |
1346 | goto out; |
1347 | ||
29bdd921 | 1348 | jme->old_mtu = netdev->mtu; |
fcf45b4c | 1349 | netif_stop_queue(netdev); |
cd0ff491 GFT |
1350 | if (jme_pseudo_hotplug_enabled(jme)) |
1351 | jme_stop_shutdown_timer(jme); | |
1352 | ||
1353 | jme_stop_pcc_timer(jme); | |
1354 | tasklet_disable(&jme->txclean_task); | |
1355 | tasklet_disable(&jme->rxclean_task); | |
1356 | tasklet_disable(&jme->rxempty_task); | |
1357 | ||
1358 | if (netif_carrier_ok(netdev)) { | |
cd0ff491 GFT |
1359 | jme_disable_rx_engine(jme); |
1360 | jme_disable_tx_engine(jme); | |
fcf45b4c GFT |
1361 | jme_reset_mac_processor(jme); |
1362 | jme_free_rx_resources(jme); | |
1363 | jme_free_tx_resources(jme); | |
192570e0 | 1364 | |
cd0ff491 | 1365 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1366 | jme_polling_mode(jme); |
cd0ff491 GFT |
1367 | |
1368 | netif_carrier_off(netdev); | |
fcf45b4c GFT |
1369 | } |
1370 | ||
1371 | jme_check_link(netdev, 0); | |
cd0ff491 | 1372 | if (netif_carrier_ok(netdev)) { |
fcf45b4c | 1373 | rc = jme_setup_rx_resources(jme); |
cd0ff491 | 1374 | if (rc) { |
937ef75a | 1375 | pr_err("Allocating resources for RX error, Device STOPPED!\n"); |
cd0ff491 | 1376 | goto out_enable_tasklet; |
fcf45b4c GFT |
1377 | } |
1378 | ||
fcf45b4c | 1379 | rc = jme_setup_tx_resources(jme); |
cd0ff491 | 1380 | if (rc) { |
937ef75a | 1381 | pr_err("Allocating resources for TX error, Device STOPPED!\n"); |
fcf45b4c GFT |
1382 | goto err_out_free_rx_resources; |
1383 | } | |
1384 | ||
1385 | jme_enable_rx_engine(jme); | |
1386 | jme_enable_tx_engine(jme); | |
1387 | ||
1388 | netif_start_queue(netdev); | |
192570e0 | 1389 | |
cd0ff491 | 1390 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1391 | jme_interrupt_mode(jme); |
192570e0 | 1392 | |
79ce639c | 1393 | jme_start_pcc_timer(jme); |
cd0ff491 GFT |
1394 | } else if (jme_pseudo_hotplug_enabled(jme)) { |
1395 | jme_start_shutdown_timer(jme); | |
fcf45b4c GFT |
1396 | } |
1397 | ||
cd0ff491 | 1398 | goto out_enable_tasklet; |
fcf45b4c GFT |
1399 | |
1400 | err_out_free_rx_resources: | |
1401 | jme_free_rx_resources(jme); | |
cd0ff491 GFT |
1402 | out_enable_tasklet: |
1403 | tasklet_enable(&jme->txclean_task); | |
1404 | tasklet_hi_enable(&jme->rxclean_task); | |
1405 | tasklet_hi_enable(&jme->rxempty_task); | |
fcf45b4c GFT |
1406 | out: |
1407 | atomic_inc(&jme->link_changing); | |
3bf61c55 | 1408 | } |
d7699f87 | 1409 | |
3bf61c55 GFT |
1410 | static void |
1411 | jme_rx_clean_tasklet(unsigned long arg) | |
1412 | { | |
cd0ff491 | 1413 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c | 1414 | struct dynpcc_info *dpi = &(jme->dpi); |
d7699f87 | 1415 | |
192570e0 GFT |
1416 | jme_process_receive(jme, jme->rx_ring_size); |
1417 | ++(dpi->intr_cnt); | |
42b1055e | 1418 | |
192570e0 | 1419 | } |
fcf45b4c | 1420 | |
192570e0 | 1421 | static int |
cdcdc9eb | 1422 | jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) |
192570e0 | 1423 | { |
cdcdc9eb | 1424 | struct jme_adapter *jme = jme_napi_priv(holder); |
3b70a6fa | 1425 | DECLARE_NETDEV |
192570e0 | 1426 | int rest; |
fcf45b4c | 1427 | |
cdcdc9eb | 1428 | rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget)); |
fcf45b4c | 1429 | |
cd0ff491 | 1430 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb | 1431 | atomic_dec(&jme->rx_empty); |
192570e0 GFT |
1432 | ++(NET_STAT(jme).rx_dropped); |
1433 | jme_restart_rx_engine(jme); | |
1434 | } | |
1435 | atomic_inc(&jme->rx_empty); | |
1436 | ||
cd0ff491 | 1437 | if (rest) { |
cdcdc9eb | 1438 | JME_RX_COMPLETE(netdev, holder); |
192570e0 GFT |
1439 | jme_interrupt_mode(jme); |
1440 | } | |
1441 | ||
cdcdc9eb GFT |
1442 | JME_NAPI_WEIGHT_SET(budget, rest); |
1443 | return JME_NAPI_WEIGHT_VAL(budget) - rest; | |
fcf45b4c GFT |
1444 | } |
1445 | ||
1446 | static void | |
1447 | jme_rx_empty_tasklet(unsigned long arg) | |
1448 | { | |
cd0ff491 | 1449 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1450 | |
cd0ff491 | 1451 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1452 | return; |
1453 | ||
cd0ff491 | 1454 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1455 | return; |
1456 | ||
7ca9ebee | 1457 | netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n"); |
29bdd921 | 1458 | |
fcf45b4c | 1459 | jme_rx_clean_tasklet(arg); |
cdcdc9eb | 1460 | |
cd0ff491 | 1461 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb GFT |
1462 | atomic_dec(&jme->rx_empty); |
1463 | ++(NET_STAT(jme).rx_dropped); | |
1464 | jme_restart_rx_engine(jme); | |
1465 | } | |
1466 | atomic_inc(&jme->rx_empty); | |
4330c2f2 GFT |
1467 | } |
1468 | ||
b3821cc5 GFT |
1469 | static void |
1470 | jme_wake_queue_if_stopped(struct jme_adapter *jme) | |
1471 | { | |
0ede469c | 1472 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1473 | |
1474 | smp_wmb(); | |
cd0ff491 | 1475 | if (unlikely(netif_queue_stopped(jme->dev) && |
b3821cc5 | 1476 | atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) { |
937ef75a | 1477 | netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n"); |
b3821cc5 | 1478 | netif_wake_queue(jme->dev); |
b3821cc5 GFT |
1479 | } |
1480 | ||
1481 | } | |
1482 | ||
3bf61c55 GFT |
1483 | static void |
1484 | jme_tx_clean_tasklet(unsigned long arg) | |
4330c2f2 | 1485 | { |
cd0ff491 | 1486 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
3bf61c55 | 1487 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1488 | struct txdesc *txdesc = txring->desc; |
3bf61c55 | 1489 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi; |
b3821cc5 | 1490 | int i, j, cnt = 0, max, err, mask; |
3bf61c55 | 1491 | |
937ef75a | 1492 | tx_dbg(jme, "Into txclean\n"); |
cd0ff491 GFT |
1493 | |
1494 | if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) | |
fcf45b4c GFT |
1495 | goto out; |
1496 | ||
cd0ff491 | 1497 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1498 | goto out; |
1499 | ||
cd0ff491 | 1500 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1501 | goto out; |
1502 | ||
b3821cc5 GFT |
1503 | max = jme->tx_ring_size - atomic_read(&txring->nr_free); |
1504 | mask = jme->tx_ring_mask; | |
3bf61c55 | 1505 | |
cd0ff491 | 1506 | for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { |
3bf61c55 GFT |
1507 | |
1508 | ctxbi = txbi + i; | |
1509 | ||
cd0ff491 | 1510 | if (likely(ctxbi->skb && |
b3821cc5 | 1511 | !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) { |
8c198884 | 1512 | |
cd0ff491 | 1513 | tx_dbg(jme, "txclean: %d+%d@%lu\n", |
937ef75a | 1514 | i, ctxbi->nr_desc, jiffies); |
3bf61c55 | 1515 | |
cd0ff491 | 1516 | err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; |
3bf61c55 | 1517 | |
cd0ff491 | 1518 | for (j = 1 ; j < ctxbi->nr_desc ; ++j) { |
b3821cc5 GFT |
1519 | ttxbi = txbi + ((i + j) & (mask)); |
1520 | txdesc[(i + j) & (mask)].dw[0] = 0; | |
3bf61c55 | 1521 | |
b3821cc5 | 1522 | pci_unmap_page(jme->pdev, |
3bf61c55 GFT |
1523 | ttxbi->mapping, |
1524 | ttxbi->len, | |
1525 | PCI_DMA_TODEVICE); | |
1526 | ||
3bf61c55 GFT |
1527 | ttxbi->mapping = 0; |
1528 | ttxbi->len = 0; | |
1529 | } | |
1530 | ||
1531 | dev_kfree_skb(ctxbi->skb); | |
3bf61c55 GFT |
1532 | |
1533 | cnt += ctxbi->nr_desc; | |
1534 | ||
cd0ff491 | 1535 | if (unlikely(err)) { |
8c198884 | 1536 | ++(NET_STAT(jme).tx_carrier_errors); |
cd0ff491 | 1537 | } else { |
8c198884 | 1538 | ++(NET_STAT(jme).tx_packets); |
b3821cc5 GFT |
1539 | NET_STAT(jme).tx_bytes += ctxbi->len; |
1540 | } | |
1541 | ||
1542 | ctxbi->skb = NULL; | |
1543 | ctxbi->len = 0; | |
cdcdc9eb | 1544 | ctxbi->start_xmit = 0; |
cd0ff491 GFT |
1545 | |
1546 | } else { | |
3bf61c55 GFT |
1547 | break; |
1548 | } | |
1549 | ||
b3821cc5 | 1550 | i = (i + ctxbi->nr_desc) & mask; |
3bf61c55 GFT |
1551 | |
1552 | ctxbi->nr_desc = 0; | |
d7699f87 GFT |
1553 | } |
1554 | ||
937ef75a | 1555 | tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies); |
cdcdc9eb | 1556 | atomic_set(&txring->next_to_clean, i); |
79ce639c | 1557 | atomic_add(cnt, &txring->nr_free); |
3bf61c55 | 1558 | |
b3821cc5 GFT |
1559 | jme_wake_queue_if_stopped(jme); |
1560 | ||
fcf45b4c GFT |
1561 | out: |
1562 | atomic_inc(&jme->tx_cleaning); | |
d7699f87 GFT |
1563 | } |
1564 | ||
79ce639c | 1565 | static void |
cd0ff491 | 1566 | jme_intr_msi(struct jme_adapter *jme, u32 intrstat) |
d7699f87 | 1567 | { |
3bf61c55 GFT |
1568 | /* |
1569 | * Disable interrupt | |
1570 | */ | |
1571 | jwrite32f(jme, JME_IENC, INTR_ENABLE); | |
d7699f87 | 1572 | |
cd0ff491 | 1573 | if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { |
47220951 GFT |
1574 | /* |
1575 | * Link change event is critical | |
1576 | * all other events are ignored | |
1577 | */ | |
1578 | jwrite32(jme, JME_IEVE, intrstat); | |
3bf61c55 | 1579 | tasklet_schedule(&jme->linkch_task); |
29bdd921 | 1580 | goto out_reenable; |
fcf45b4c | 1581 | } |
d7699f87 | 1582 | |
cd0ff491 | 1583 | if (intrstat & INTR_TMINTR) { |
47220951 | 1584 | jwrite32(jme, JME_IEVE, INTR_TMINTR); |
79ce639c | 1585 | tasklet_schedule(&jme->pcc_task); |
47220951 | 1586 | } |
79ce639c | 1587 | |
cd0ff491 | 1588 | if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { |
47220951 | 1589 | jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0); |
4330c2f2 | 1590 | tasklet_schedule(&jme->txclean_task); |
47220951 GFT |
1591 | } |
1592 | ||
cd0ff491 | 1593 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
47220951 GFT |
1594 | jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO | |
1595 | INTR_PCCRX0 | | |
1596 | INTR_RX0EMP)) | | |
1597 | INTR_RX0); | |
1598 | } | |
d7699f87 | 1599 | |
cd0ff491 GFT |
1600 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
1601 | if (intrstat & INTR_RX0EMP) | |
192570e0 GFT |
1602 | atomic_inc(&jme->rx_empty); |
1603 | ||
cd0ff491 GFT |
1604 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
1605 | if (likely(JME_RX_SCHEDULE_PREP(jme))) { | |
192570e0 | 1606 | jme_polling_mode(jme); |
cdcdc9eb | 1607 | JME_RX_SCHEDULE(jme); |
192570e0 GFT |
1608 | } |
1609 | } | |
cd0ff491 GFT |
1610 | } else { |
1611 | if (intrstat & INTR_RX0EMP) { | |
cdcdc9eb | 1612 | atomic_inc(&jme->rx_empty); |
cd0ff491 GFT |
1613 | tasklet_hi_schedule(&jme->rxempty_task); |
1614 | } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) { | |
1615 | tasklet_hi_schedule(&jme->rxclean_task); | |
cdcdc9eb | 1616 | } |
4330c2f2 | 1617 | } |
d7699f87 | 1618 | |
29bdd921 | 1619 | out_reenable: |
3bf61c55 | 1620 | /* |
fcf45b4c | 1621 | * Re-enable interrupt |
3bf61c55 | 1622 | */ |
fcf45b4c | 1623 | jwrite32f(jme, JME_IENS, INTR_ENABLE); |
79ce639c GFT |
1624 | } |
1625 | ||
3b70a6fa GFT |
1626 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
1627 | static irqreturn_t | |
1628 | jme_intr(int irq, void *dev_id, struct pt_regs *regs) | |
1629 | #else | |
79ce639c GFT |
1630 | static irqreturn_t |
1631 | jme_intr(int irq, void *dev_id) | |
3b70a6fa | 1632 | #endif |
79ce639c | 1633 | { |
cd0ff491 GFT |
1634 | struct net_device *netdev = dev_id; |
1635 | struct jme_adapter *jme = netdev_priv(netdev); | |
1636 | u32 intrstat; | |
79ce639c GFT |
1637 | |
1638 | intrstat = jread32(jme, JME_IEVE); | |
1639 | ||
1640 | /* | |
1641 | * Check if it's really an interrupt for us | |
1642 | */ | |
7ee473a3 | 1643 | if (unlikely((intrstat & INTR_ENABLE) == 0)) |
29bdd921 | 1644 | return IRQ_NONE; |
79ce639c GFT |
1645 | |
1646 | /* | |
1647 | * Check if the device still exist | |
1648 | */ | |
cd0ff491 GFT |
1649 | if (unlikely(intrstat == ~((typeof(intrstat))0))) |
1650 | return IRQ_NONE; | |
79ce639c GFT |
1651 | |
1652 | jme_intr_msi(jme, intrstat); | |
1653 | ||
cd0ff491 | 1654 | return IRQ_HANDLED; |
d7699f87 GFT |
1655 | } |
1656 | ||
3b70a6fa GFT |
1657 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
1658 | static irqreturn_t | |
1659 | jme_msi(int irq, void *dev_id, struct pt_regs *regs) | |
1660 | #else | |
79ce639c GFT |
1661 | static irqreturn_t |
1662 | jme_msi(int irq, void *dev_id) | |
3b70a6fa | 1663 | #endif |
79ce639c | 1664 | { |
cd0ff491 GFT |
1665 | struct net_device *netdev = dev_id; |
1666 | struct jme_adapter *jme = netdev_priv(netdev); | |
1667 | u32 intrstat; | |
79ce639c | 1668 | |
0ede469c | 1669 | intrstat = jread32(jme, JME_IEVE); |
79ce639c GFT |
1670 | |
1671 | jme_intr_msi(jme, intrstat); | |
1672 | ||
cd0ff491 | 1673 | return IRQ_HANDLED; |
79ce639c GFT |
1674 | } |
1675 | ||
79ce639c GFT |
1676 | static void |
1677 | jme_reset_link(struct jme_adapter *jme) | |
1678 | { | |
1679 | jwrite32(jme, JME_TMCSR, TMCSR_SWIT); | |
1680 | } | |
1681 | ||
fcf45b4c GFT |
1682 | static void |
1683 | jme_restart_an(struct jme_adapter *jme) | |
1684 | { | |
cd0ff491 | 1685 | u32 bmcr; |
fcf45b4c | 1686 | |
cd0ff491 | 1687 | spin_lock_bh(&jme->phy_lock); |
fcf45b4c GFT |
1688 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1689 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
1690 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
cd0ff491 | 1691 | spin_unlock_bh(&jme->phy_lock); |
79ce639c GFT |
1692 | } |
1693 | ||
1694 | static int | |
1695 | jme_request_irq(struct jme_adapter *jme) | |
1696 | { | |
1697 | int rc; | |
cd0ff491 | 1698 | struct net_device *netdev = jme->dev; |
3b70a6fa GFT |
1699 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
1700 | irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr; | |
1701 | int irq_flags = SA_SHIRQ; | |
1702 | #else | |
cd0ff491 GFT |
1703 | irq_handler_t handler = jme_intr; |
1704 | int irq_flags = IRQF_SHARED; | |
3b70a6fa | 1705 | #endif |
cd0ff491 GFT |
1706 | |
1707 | if (!pci_enable_msi(jme->pdev)) { | |
1708 | set_bit(JME_FLAG_MSI, &jme->flags); | |
1709 | handler = jme_msi; | |
1710 | irq_flags = 0; | |
1711 | } | |
1712 | ||
1713 | rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, | |
1714 | netdev); | |
1715 | if (rc) { | |
937ef75a JP |
1716 | netdev_err(netdev, |
1717 | "Unable to request %s interrupt (return: %d)\n", | |
1718 | test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx", | |
1719 | rc); | |
79ce639c | 1720 | |
cd0ff491 GFT |
1721 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { |
1722 | pci_disable_msi(jme->pdev); | |
1723 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1724 | } |
cd0ff491 | 1725 | } else { |
79ce639c GFT |
1726 | netdev->irq = jme->pdev->irq; |
1727 | } | |
1728 | ||
cd0ff491 | 1729 | return rc; |
79ce639c GFT |
1730 | } |
1731 | ||
1732 | static void | |
1733 | jme_free_irq(struct jme_adapter *jme) | |
1734 | { | |
cd0ff491 GFT |
1735 | free_irq(jme->pdev->irq, jme->dev); |
1736 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { | |
1737 | pci_disable_msi(jme->pdev); | |
1738 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1739 | jme->dev->irq = jme->pdev->irq; |
cd0ff491 | 1740 | } |
fcf45b4c GFT |
1741 | } |
1742 | ||
ed457bcc GFT |
1743 | static inline void |
1744 | jme_new_phy_on(struct jme_adapter *jme) | |
1745 | { | |
1746 | u32 reg; | |
1747 | ||
1748 | reg = jread32(jme, JME_PHY_PWR); | |
1749 | reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | | |
1750 | PHY_PWR_DWN2 | PHY_PWR_CLKSEL); | |
1751 | jwrite32(jme, JME_PHY_PWR, reg); | |
1752 | ||
1753 | pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); | |
1754 | reg &= ~PE1_GPREG0_PBG; | |
1755 | reg |= PE1_GPREG0_ENBG; | |
1756 | pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); | |
1757 | } | |
1758 | ||
1759 | static inline void | |
1760 | jme_new_phy_off(struct jme_adapter *jme) | |
1761 | { | |
1762 | u32 reg; | |
1763 | ||
1764 | reg = jread32(jme, JME_PHY_PWR); | |
1765 | reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | | |
1766 | PHY_PWR_DWN2 | PHY_PWR_CLKSEL; | |
1767 | jwrite32(jme, JME_PHY_PWR, reg); | |
1768 | ||
1769 | pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); | |
1770 | reg &= ~PE1_GPREG0_PBG; | |
1771 | reg |= PE1_GPREG0_PDD3COLD; | |
1772 | pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); | |
1773 | } | |
1774 | ||
e58b908e GFT |
1775 | static inline void |
1776 | jme_phy_on(struct jme_adapter *jme) | |
1777 | { | |
1778 | u32 bmcr; | |
1779 | ||
1780 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1781 | bmcr &= ~BMCR_PDOWN; | |
1782 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
ed457bcc GFT |
1783 | |
1784 | if (new_phy_power_ctrl(jme->chip_main_rev)) | |
1785 | jme_new_phy_on(jme); | |
1786 | } | |
1787 | ||
1788 | static inline void | |
1789 | jme_phy_off(struct jme_adapter *jme) | |
1790 | { | |
1791 | u32 bmcr; | |
1792 | ||
1793 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1794 | bmcr |= BMCR_PDOWN; | |
1795 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
1796 | ||
1797 | if (new_phy_power_ctrl(jme->chip_main_rev)) | |
1798 | jme_new_phy_off(jme); | |
e58b908e GFT |
1799 | } |
1800 | ||
3bf61c55 GFT |
1801 | static int |
1802 | jme_open(struct net_device *netdev) | |
d7699f87 GFT |
1803 | { |
1804 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 1805 | int rc; |
79ce639c | 1806 | |
42b1055e | 1807 | jme_clear_pm(jme); |
cdcdc9eb | 1808 | JME_NAPI_ENABLE(jme); |
d7699f87 | 1809 | |
0ede469c | 1810 | tasklet_enable(&jme->linkch_task); |
cd0ff491 GFT |
1811 | tasklet_enable(&jme->txclean_task); |
1812 | tasklet_hi_enable(&jme->rxclean_task); | |
1813 | tasklet_hi_enable(&jme->rxempty_task); | |
1814 | ||
79ce639c | 1815 | rc = jme_request_irq(jme); |
cd0ff491 | 1816 | if (rc) |
4330c2f2 | 1817 | goto err_out; |
79ce639c | 1818 | |
d7699f87 | 1819 | jme_start_irq(jme); |
42b1055e | 1820 | |
ed457bcc GFT |
1821 | jme_phy_on(jme); |
1822 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
42b1055e | 1823 | jme_set_settings(netdev, &jme->old_ecmd); |
ed457bcc | 1824 | else |
42b1055e GFT |
1825 | jme_reset_phy_processor(jme); |
1826 | ||
29bdd921 | 1827 | jme_reset_link(jme); |
d7699f87 GFT |
1828 | |
1829 | return 0; | |
1830 | ||
d7699f87 GFT |
1831 | err_out: |
1832 | netif_stop_queue(netdev); | |
1833 | netif_carrier_off(netdev); | |
4330c2f2 | 1834 | return rc; |
d7699f87 GFT |
1835 | } |
1836 | ||
42b1055e GFT |
1837 | static void |
1838 | jme_set_100m_half(struct jme_adapter *jme) | |
1839 | { | |
cd0ff491 | 1840 | u32 bmcr, tmp; |
42b1055e | 1841 | |
a82e368c | 1842 | jme_phy_on(jme); |
42b1055e GFT |
1843 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1844 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | | |
1845 | BMCR_SPEED1000 | BMCR_FULLDPLX); | |
1846 | tmp |= BMCR_SPEED100; | |
1847 | ||
1848 | if (bmcr != tmp) | |
1849 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp); | |
1850 | ||
cd0ff491 | 1851 | if (jme->fpgaver) |
cdcdc9eb GFT |
1852 | jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL); |
1853 | else | |
1854 | jwrite32(jme, JME_GHC, GHC_SPEED_100M); | |
42b1055e GFT |
1855 | } |
1856 | ||
47220951 GFT |
1857 | #define JME_WAIT_LINK_TIME 2000 /* 2000ms */ |
1858 | static void | |
1859 | jme_wait_link(struct jme_adapter *jme) | |
1860 | { | |
cd0ff491 | 1861 | u32 phylink, to = JME_WAIT_LINK_TIME; |
47220951 GFT |
1862 | |
1863 | mdelay(1000); | |
1864 | phylink = jme_linkstat_from_phy(jme); | |
cd0ff491 | 1865 | while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { |
47220951 GFT |
1866 | mdelay(10); |
1867 | phylink = jme_linkstat_from_phy(jme); | |
1868 | } | |
1869 | } | |
1870 | ||
a82e368c GFT |
1871 | static void |
1872 | jme_powersave_phy(struct jme_adapter *jme) | |
1873 | { | |
1874 | if (jme->reg_pmcs) { | |
1875 | jme_set_100m_half(jme); | |
1876 | ||
1877 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) | |
1878 | jme_wait_link(jme); | |
1879 | ||
1880 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); | |
1881 | } else { | |
1882 | jme_phy_off(jme); | |
1883 | } | |
1884 | } | |
1885 | ||
3bf61c55 GFT |
1886 | static int |
1887 | jme_close(struct net_device *netdev) | |
d7699f87 GFT |
1888 | { |
1889 | struct jme_adapter *jme = netdev_priv(netdev); | |
1890 | ||
1891 | netif_stop_queue(netdev); | |
1892 | netif_carrier_off(netdev); | |
1893 | ||
1894 | jme_stop_irq(jme); | |
79ce639c | 1895 | jme_free_irq(jme); |
d7699f87 | 1896 | |
cdcdc9eb | 1897 | JME_NAPI_DISABLE(jme); |
192570e0 | 1898 | |
0ede469c GFT |
1899 | tasklet_disable(&jme->linkch_task); |
1900 | tasklet_disable(&jme->txclean_task); | |
1901 | tasklet_disable(&jme->rxclean_task); | |
1902 | tasklet_disable(&jme->rxempty_task); | |
8c198884 | 1903 | |
cd0ff491 GFT |
1904 | jme_disable_rx_engine(jme); |
1905 | jme_disable_tx_engine(jme); | |
8c198884 | 1906 | jme_reset_mac_processor(jme); |
d7699f87 GFT |
1907 | jme_free_rx_resources(jme); |
1908 | jme_free_tx_resources(jme); | |
42b1055e | 1909 | jme->phylink = 0; |
b3821cc5 GFT |
1910 | jme_phy_off(jme); |
1911 | ||
1912 | return 0; | |
1913 | } | |
1914 | ||
1915 | static int | |
1916 | jme_alloc_txdesc(struct jme_adapter *jme, | |
1917 | struct sk_buff *skb) | |
1918 | { | |
0ede469c | 1919 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1920 | int idx, nr_alloc, mask = jme->tx_ring_mask; |
1921 | ||
1922 | idx = txring->next_to_use; | |
1923 | nr_alloc = skb_shinfo(skb)->nr_frags + 2; | |
1924 | ||
cd0ff491 | 1925 | if (unlikely(atomic_read(&txring->nr_free) < nr_alloc)) |
b3821cc5 GFT |
1926 | return -1; |
1927 | ||
1928 | atomic_sub(nr_alloc, &txring->nr_free); | |
42b1055e | 1929 | |
b3821cc5 GFT |
1930 | txring->next_to_use = (txring->next_to_use + nr_alloc) & mask; |
1931 | ||
1932 | return idx; | |
1933 | } | |
1934 | ||
1935 | static void | |
1936 | jme_fill_tx_map(struct pci_dev *pdev, | |
cd0ff491 | 1937 | struct txdesc *txdesc, |
b3821cc5 GFT |
1938 | struct jme_buffer_info *txbi, |
1939 | struct page *page, | |
cd0ff491 GFT |
1940 | u32 page_offset, |
1941 | u32 len, | |
1942 | u8 hidma) | |
b3821cc5 GFT |
1943 | { |
1944 | dma_addr_t dmaaddr; | |
1945 | ||
1946 | dmaaddr = pci_map_page(pdev, | |
1947 | page, | |
1948 | page_offset, | |
1949 | len, | |
1950 | PCI_DMA_TODEVICE); | |
1951 | ||
1952 | pci_dma_sync_single_for_device(pdev, | |
1953 | dmaaddr, | |
1954 | len, | |
1955 | PCI_DMA_TODEVICE); | |
1956 | ||
1957 | txdesc->dw[0] = 0; | |
1958 | txdesc->dw[1] = 0; | |
1959 | txdesc->desc2.flags = TXFLAG_OWN; | |
cd0ff491 | 1960 | txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0; |
b3821cc5 GFT |
1961 | txdesc->desc2.datalen = cpu_to_le16(len); |
1962 | txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32); | |
1963 | txdesc->desc2.bufaddrl = cpu_to_le32( | |
1964 | (__u64)dmaaddr & 0xFFFFFFFFUL); | |
1965 | ||
1966 | txbi->mapping = dmaaddr; | |
1967 | txbi->len = len; | |
1968 | } | |
1969 | ||
1970 | static void | |
1971 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
1972 | { | |
0ede469c | 1973 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1974 | struct txdesc *txdesc = txring->desc, *ctxdesc; |
b3821cc5 | 1975 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; |
cd0ff491 | 1976 | u8 hidma = jme->dev->features & NETIF_F_HIGHDMA; |
b3821cc5 GFT |
1977 | int i, nr_frags = skb_shinfo(skb)->nr_frags; |
1978 | int mask = jme->tx_ring_mask; | |
1979 | struct skb_frag_struct *frag; | |
cd0ff491 | 1980 | u32 len; |
b3821cc5 | 1981 | |
cd0ff491 GFT |
1982 | for (i = 0 ; i < nr_frags ; ++i) { |
1983 | frag = &skb_shinfo(skb)->frags[i]; | |
b3821cc5 GFT |
1984 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); |
1985 | ctxbi = txbi + ((idx + i + 2) & (mask)); | |
1986 | ||
1987 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page, | |
1988 | frag->page_offset, frag->size, hidma); | |
42b1055e | 1989 | } |
b3821cc5 | 1990 | |
cd0ff491 | 1991 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
b3821cc5 GFT |
1992 | ctxdesc = txdesc + ((idx + 1) & (mask)); |
1993 | ctxbi = txbi + ((idx + 1) & (mask)); | |
1994 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
1995 | offset_in_page(skb->data), len, hidma); | |
1996 | ||
1997 | } | |
1998 | ||
1999 | static int | |
2000 | jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) | |
2001 | { | |
3b70a6fa | 2002 | if (unlikely( |
0ede469c | 2003 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17) |
3b70a6fa GFT |
2004 | skb_shinfo(skb)->tso_size |
2005 | #else | |
2006 | skb_shinfo(skb)->gso_size | |
2007 | #endif | |
2008 | && skb_header_cloned(skb) && | |
b3821cc5 GFT |
2009 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) { |
2010 | dev_kfree_skb(skb); | |
2011 | return -1; | |
2012 | } | |
2013 | ||
2014 | return 0; | |
2015 | } | |
2016 | ||
2017 | static int | |
3b70a6fa | 2018 | jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags) |
b3821cc5 | 2019 | { |
0ede469c | 2020 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17) |
3b70a6fa GFT |
2021 | *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT); |
2022 | #else | |
2023 | *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT); | |
2024 | #endif | |
cd0ff491 | 2025 | if (*mss) { |
b3821cc5 GFT |
2026 | *flags |= TXFLAG_LSEN; |
2027 | ||
cd0ff491 | 2028 | if (skb->protocol == htons(ETH_P_IP)) { |
b3821cc5 GFT |
2029 | struct iphdr *iph = ip_hdr(skb); |
2030 | ||
2031 | iph->check = 0; | |
cd0ff491 | 2032 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
b3821cc5 GFT |
2033 | iph->daddr, 0, |
2034 | IPPROTO_TCP, | |
2035 | 0); | |
cd0ff491 | 2036 | } else { |
b3821cc5 GFT |
2037 | struct ipv6hdr *ip6h = ipv6_hdr(skb); |
2038 | ||
cd0ff491 | 2039 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, |
b3821cc5 GFT |
2040 | &ip6h->daddr, 0, |
2041 | IPPROTO_TCP, | |
2042 | 0); | |
2043 | } | |
2044 | ||
2045 | return 0; | |
2046 | } | |
2047 | ||
2048 | return 1; | |
2049 | } | |
2050 | ||
2051 | static void | |
cd0ff491 | 2052 | jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags) |
b3821cc5 | 2053 | { |
3b70a6fa GFT |
2054 | #ifdef CHECKSUM_PARTIAL |
2055 | if (skb->ip_summed == CHECKSUM_PARTIAL) | |
2056 | #else | |
2057 | if (skb->ip_summed == CHECKSUM_HW) | |
2058 | #endif | |
2059 | { | |
cd0ff491 | 2060 | u8 ip_proto; |
b3821cc5 | 2061 | |
3b70a6fa GFT |
2062 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
2063 | if (skb->protocol == htons(ETH_P_IP)) | |
2064 | ip_proto = ip_hdr(skb)->protocol; | |
2065 | else if (skb->protocol == htons(ETH_P_IPV6)) | |
2066 | ip_proto = ipv6_hdr(skb)->nexthdr; | |
2067 | else | |
2068 | ip_proto = 0; | |
2069 | #else | |
b3821cc5 | 2070 | switch (skb->protocol) { |
cd0ff491 | 2071 | case htons(ETH_P_IP): |
b3821cc5 GFT |
2072 | ip_proto = ip_hdr(skb)->protocol; |
2073 | break; | |
cd0ff491 | 2074 | case htons(ETH_P_IPV6): |
b3821cc5 GFT |
2075 | ip_proto = ipv6_hdr(skb)->nexthdr; |
2076 | break; | |
2077 | default: | |
2078 | ip_proto = 0; | |
2079 | break; | |
2080 | } | |
3b70a6fa | 2081 | #endif |
b3821cc5 | 2082 | |
cd0ff491 | 2083 | switch (ip_proto) { |
b3821cc5 GFT |
2084 | case IPPROTO_TCP: |
2085 | *flags |= TXFLAG_TCPCS; | |
2086 | break; | |
2087 | case IPPROTO_UDP: | |
2088 | *flags |= TXFLAG_UDPCS; | |
2089 | break; | |
2090 | default: | |
937ef75a | 2091 | netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n"); |
b3821cc5 GFT |
2092 | break; |
2093 | } | |
2094 | } | |
2095 | } | |
2096 | ||
cd0ff491 | 2097 | static inline void |
3b70a6fa | 2098 | jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags) |
b3821cc5 | 2099 | { |
cd0ff491 | 2100 | if (vlan_tx_tag_present(skb)) { |
b3821cc5 | 2101 | *flags |= TXFLAG_TAGON; |
3b70a6fa | 2102 | *vlan = cpu_to_le16(vlan_tx_tag_get(skb)); |
42b1055e | 2103 | } |
b3821cc5 GFT |
2104 | } |
2105 | ||
2106 | static int | |
3b70a6fa | 2107 | jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) |
b3821cc5 | 2108 | { |
0ede469c | 2109 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 2110 | struct txdesc *txdesc; |
b3821cc5 | 2111 | struct jme_buffer_info *txbi; |
cd0ff491 | 2112 | u8 flags; |
b3821cc5 | 2113 | |
cd0ff491 | 2114 | txdesc = (struct txdesc *)txring->desc + idx; |
b3821cc5 GFT |
2115 | txbi = txring->bufinf + idx; |
2116 | ||
2117 | txdesc->dw[0] = 0; | |
2118 | txdesc->dw[1] = 0; | |
2119 | txdesc->dw[2] = 0; | |
2120 | txdesc->dw[3] = 0; | |
2121 | txdesc->desc1.pktsize = cpu_to_le16(skb->len); | |
2122 | /* | |
2123 | * Set OWN bit at final. | |
2124 | * When kernel transmit faster than NIC. | |
2125 | * And NIC trying to send this descriptor before we tell | |
2126 | * it to start sending this TX queue. | |
2127 | * Other fields are already filled correctly. | |
2128 | */ | |
2129 | wmb(); | |
2130 | flags = TXFLAG_OWN | TXFLAG_INT; | |
cd0ff491 GFT |
2131 | /* |
2132 | * Set checksum flags while not tso | |
2133 | */ | |
2134 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) | |
2135 | jme_tx_csum(jme, skb, &flags); | |
b3821cc5 | 2136 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); |
3b70a6fa | 2137 | jme_map_tx_skb(jme, skb, idx); |
b3821cc5 GFT |
2138 | txdesc->desc1.flags = flags; |
2139 | /* | |
2140 | * Set tx buffer info after telling NIC to send | |
2141 | * For better tx_clean timing | |
2142 | */ | |
2143 | wmb(); | |
2144 | txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2; | |
2145 | txbi->skb = skb; | |
2146 | txbi->len = skb->len; | |
cd0ff491 GFT |
2147 | txbi->start_xmit = jiffies; |
2148 | if (!txbi->start_xmit) | |
8d27293f | 2149 | txbi->start_xmit = (0UL-1); |
d7699f87 GFT |
2150 | |
2151 | return 0; | |
2152 | } | |
2153 | ||
b3821cc5 GFT |
2154 | static void |
2155 | jme_stop_queue_if_full(struct jme_adapter *jme) | |
2156 | { | |
0ede469c | 2157 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 GFT |
2158 | struct jme_buffer_info *txbi = txring->bufinf; |
2159 | int idx = atomic_read(&txring->next_to_clean); | |
cdcdc9eb | 2160 | |
cd0ff491 | 2161 | txbi += idx; |
b3821cc5 GFT |
2162 | |
2163 | smp_wmb(); | |
cd0ff491 | 2164 | if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { |
b3821cc5 | 2165 | netif_stop_queue(jme->dev); |
937ef75a | 2166 | netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n"); |
b3821cc5 | 2167 | smp_wmb(); |
cd0ff491 GFT |
2168 | if (atomic_read(&txring->nr_free) |
2169 | >= (jme->tx_wake_threshold)) { | |
b3821cc5 | 2170 | netif_wake_queue(jme->dev); |
937ef75a | 2171 | netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n"); |
b3821cc5 GFT |
2172 | } |
2173 | } | |
2174 | ||
cd0ff491 | 2175 | if (unlikely(txbi->start_xmit && |
cdcdc9eb GFT |
2176 | (jiffies - txbi->start_xmit) >= TX_TIMEOUT && |
2177 | txbi->skb)) { | |
2178 | netif_stop_queue(jme->dev); | |
937ef75a | 2179 | netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu\n", idx, jiffies); |
cdcdc9eb | 2180 | } |
b3821cc5 GFT |
2181 | } |
2182 | ||
3bf61c55 GFT |
2183 | /* |
2184 | * This function is already protected by netif_tx_lock() | |
2185 | */ | |
cd0ff491 | 2186 | |
7ca9ebee | 2187 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31) |
3bf61c55 | 2188 | static int |
7ca9ebee GFT |
2189 | #else |
2190 | static netdev_tx_t | |
2191 | #endif | |
3bf61c55 | 2192 | jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) |
d7699f87 | 2193 | { |
cd0ff491 | 2194 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2195 | int idx; |
d7699f87 | 2196 | |
cd0ff491 | 2197 | if (unlikely(jme_expand_header(jme, skb))) { |
b3821cc5 GFT |
2198 | ++(NET_STAT(jme).tx_dropped); |
2199 | return NETDEV_TX_OK; | |
2200 | } | |
2201 | ||
2202 | idx = jme_alloc_txdesc(jme, skb); | |
79ce639c | 2203 | |
cd0ff491 | 2204 | if (unlikely(idx < 0)) { |
b3821cc5 | 2205 | netif_stop_queue(netdev); |
937ef75a JP |
2206 | netif_err(jme, tx_err, jme->dev, |
2207 | "BUG! Tx ring full when queue awake!\n"); | |
d7699f87 | 2208 | |
cd0ff491 | 2209 | return NETDEV_TX_BUSY; |
b3821cc5 GFT |
2210 | } |
2211 | ||
3b70a6fa | 2212 | jme_fill_tx_desc(jme, skb, idx); |
b3821cc5 | 2213 | |
4330c2f2 GFT |
2214 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
2215 | TXCS_SELECT_QUEUE0 | | |
2216 | TXCS_QUEUE0S | | |
2217 | TXCS_ENABLE); | |
0ede469c | 2218 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29) |
d7699f87 | 2219 | netdev->trans_start = jiffies; |
0ede469c | 2220 | #endif |
d7699f87 | 2221 | |
937ef75a JP |
2222 | tx_dbg(jme, "xmit: %d+%d@%lu\n", |
2223 | idx, skb_shinfo(skb)->nr_frags + 2, jiffies); | |
b3821cc5 GFT |
2224 | jme_stop_queue_if_full(jme); |
2225 | ||
cd0ff491 | 2226 | return NETDEV_TX_OK; |
d7699f87 GFT |
2227 | } |
2228 | ||
e523cd89 GFT |
2229 | static void |
2230 | jme_set_unicastaddr(struct net_device *netdev) | |
2231 | { | |
2232 | struct jme_adapter *jme = netdev_priv(netdev); | |
2233 | u32 val; | |
2234 | ||
2235 | val = (netdev->dev_addr[3] & 0xff) << 24 | | |
2236 | (netdev->dev_addr[2] & 0xff) << 16 | | |
2237 | (netdev->dev_addr[1] & 0xff) << 8 | | |
2238 | (netdev->dev_addr[0] & 0xff); | |
2239 | jwrite32(jme, JME_RXUMA_LO, val); | |
2240 | val = (netdev->dev_addr[5] & 0xff) << 8 | | |
2241 | (netdev->dev_addr[4] & 0xff); | |
2242 | jwrite32(jme, JME_RXUMA_HI, val); | |
2243 | } | |
2244 | ||
3bf61c55 GFT |
2245 | static int |
2246 | jme_set_macaddr(struct net_device *netdev, void *p) | |
d7699f87 | 2247 | { |
cd0ff491 | 2248 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2249 | struct sockaddr *addr = p; |
d7699f87 | 2250 | |
cd0ff491 | 2251 | if (netif_running(netdev)) |
d7699f87 GFT |
2252 | return -EBUSY; |
2253 | ||
cd0ff491 | 2254 | spin_lock_bh(&jme->macaddr_lock); |
d7699f87 | 2255 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
e523cd89 | 2256 | jme_set_unicastaddr(netdev); |
cd0ff491 | 2257 | spin_unlock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
2258 | |
2259 | return 0; | |
2260 | } | |
2261 | ||
3bf61c55 GFT |
2262 | static void |
2263 | jme_set_multi(struct net_device *netdev) | |
d7699f87 | 2264 | { |
3bf61c55 | 2265 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2266 | u32 mc_hash[2] = {}; |
7ca9ebee | 2267 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33) |
d7699f87 | 2268 | int i; |
7ca9ebee | 2269 | #endif |
d7699f87 | 2270 | |
cd0ff491 | 2271 | spin_lock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2272 | |
2273 | jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME; | |
d7699f87 | 2274 | |
cd0ff491 | 2275 | if (netdev->flags & IFF_PROMISC) { |
8c198884 | 2276 | jme->reg_rxmcs |= RXMCS_ALLFRAME; |
cd0ff491 | 2277 | } else if (netdev->flags & IFF_ALLMULTI) { |
8c198884 | 2278 | jme->reg_rxmcs |= RXMCS_ALLMULFRAME; |
cd0ff491 | 2279 | } else if (netdev->flags & IFF_MULTICAST) { |
8e14c278 | 2280 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34) |
3bf61c55 | 2281 | struct dev_mc_list *mclist; |
8e14c278 JP |
2282 | #else |
2283 | struct netdev_hw_addr *ha; | |
2284 | #endif | |
3bf61c55 | 2285 | int bit_nr; |
d7699f87 | 2286 | |
8c198884 | 2287 | jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED; |
7ca9ebee | 2288 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33) |
3bf61c55 GFT |
2289 | for (i = 0, mclist = netdev->mc_list; |
2290 | mclist && i < netdev->mc_count; | |
2291 | ++i, mclist = mclist->next) { | |
8e14c278 | 2292 | #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34) |
7ca9ebee | 2293 | netdev_for_each_mc_addr(mclist, netdev) { |
8e14c278 JP |
2294 | #else |
2295 | netdev_for_each_mc_addr(ha, netdev) { | |
7ca9ebee | 2296 | #endif |
8e14c278 | 2297 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34) |
cd0ff491 | 2298 | bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F; |
8e14c278 JP |
2299 | #else |
2300 | bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F; | |
2301 | #endif | |
cd0ff491 GFT |
2302 | mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); |
2303 | } | |
d7699f87 | 2304 | |
4330c2f2 GFT |
2305 | jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]); |
2306 | jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]); | |
d7699f87 GFT |
2307 | } |
2308 | ||
d7699f87 | 2309 | wmb(); |
8c198884 GFT |
2310 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); |
2311 | ||
cd0ff491 | 2312 | spin_unlock_bh(&jme->rxmcs_lock); |
d7699f87 GFT |
2313 | } |
2314 | ||
3bf61c55 | 2315 | static int |
8c198884 | 2316 | jme_change_mtu(struct net_device *netdev, int new_mtu) |
d7699f87 | 2317 | { |
cd0ff491 | 2318 | struct jme_adapter *jme = netdev_priv(netdev); |
79ce639c | 2319 | |
cd0ff491 | 2320 | if (new_mtu == jme->old_mtu) |
29bdd921 GFT |
2321 | return 0; |
2322 | ||
cd0ff491 GFT |
2323 | if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || |
2324 | ((new_mtu) < IPV6_MIN_MTU)) | |
2325 | return -EINVAL; | |
79ce639c | 2326 | |
cd0ff491 | 2327 | if (new_mtu > 4000) { |
79ce639c GFT |
2328 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2329 | jme->reg_rxcs |= RXCS_FIFOTHNP_64QW; | |
2330 | jme_restart_rx_engine(jme); | |
cd0ff491 | 2331 | } else { |
79ce639c GFT |
2332 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2333 | jme->reg_rxcs |= RXCS_FIFOTHNP_128QW; | |
2334 | jme_restart_rx_engine(jme); | |
2335 | } | |
2336 | ||
cd0ff491 | 2337 | if (new_mtu > 1900) { |
1a0b42f4 MM |
2338 | netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | |
2339 | NETIF_F_TSO | NETIF_F_TSO6); | |
cd0ff491 GFT |
2340 | } else { |
2341 | if (test_bit(JME_FLAG_TXCSUM, &jme->flags)) | |
1a0b42f4 | 2342 | netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
cd0ff491 | 2343 | if (test_bit(JME_FLAG_TSO, &jme->flags)) |
1a0b42f4 | 2344 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
79ce639c GFT |
2345 | } |
2346 | ||
cd0ff491 GFT |
2347 | netdev->mtu = new_mtu; |
2348 | jme_reset_link(jme); | |
79ce639c GFT |
2349 | |
2350 | return 0; | |
d7699f87 GFT |
2351 | } |
2352 | ||
8c198884 GFT |
2353 | static void |
2354 | jme_tx_timeout(struct net_device *netdev) | |
2355 | { | |
cd0ff491 | 2356 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 | 2357 | |
cdcdc9eb GFT |
2358 | jme->phylink = 0; |
2359 | jme_reset_phy_processor(jme); | |
cd0ff491 | 2360 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
cdcdc9eb GFT |
2361 | jme_set_settings(netdev, &jme->old_ecmd); |
2362 | ||
8c198884 | 2363 | /* |
cdcdc9eb | 2364 | * Force to Reset the link again |
8c198884 | 2365 | */ |
29bdd921 | 2366 | jme_reset_link(jme); |
8c198884 GFT |
2367 | } |
2368 | ||
1e5ebebc GFT |
2369 | static inline void jme_pause_rx(struct jme_adapter *jme) |
2370 | { | |
2371 | atomic_dec(&jme->link_changing); | |
2372 | ||
2373 | jme_set_rx_pcc(jme, PCC_OFF); | |
2374 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2375 | JME_NAPI_DISABLE(jme); | |
2376 | } else { | |
2377 | tasklet_disable(&jme->rxclean_task); | |
2378 | tasklet_disable(&jme->rxempty_task); | |
2379 | } | |
2380 | } | |
2381 | ||
2382 | static inline void jme_resume_rx(struct jme_adapter *jme) | |
2383 | { | |
2384 | struct dynpcc_info *dpi = &(jme->dpi); | |
2385 | ||
2386 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2387 | JME_NAPI_ENABLE(jme); | |
2388 | } else { | |
2389 | tasklet_hi_enable(&jme->rxclean_task); | |
2390 | tasklet_hi_enable(&jme->rxempty_task); | |
2391 | } | |
2392 | dpi->cur = PCC_P1; | |
2393 | dpi->attempt = PCC_P1; | |
2394 | dpi->cnt = 0; | |
2395 | jme_set_rx_pcc(jme, PCC_P1); | |
2396 | ||
2397 | atomic_inc(&jme->link_changing); | |
2398 | } | |
2399 | ||
42b1055e GFT |
2400 | static void |
2401 | jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
2402 | { | |
2403 | struct jme_adapter *jme = netdev_priv(netdev); | |
2404 | ||
1e5ebebc | 2405 | jme_pause_rx(jme); |
42b1055e | 2406 | jme->vlgrp = grp; |
1e5ebebc | 2407 | jme_resume_rx(jme); |
42b1055e GFT |
2408 | } |
2409 | ||
7ca9ebee GFT |
2410 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
2411 | static void | |
2412 | jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid) | |
2413 | { | |
2414 | struct jme_adapter *jme = netdev_priv(netdev); | |
2415 | ||
7ca9ebee | 2416 | if(jme->vlgrp) { |
1e5ebebc | 2417 | jme_pause_rx(jme); |
7ca9ebee GFT |
2418 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20) |
2419 | jme->vlgrp->vlan_devices[vid] = NULL; | |
2420 | #else | |
2421 | vlan_group_set_device(jme->vlgrp, vid, NULL); | |
2422 | #endif | |
1e5ebebc | 2423 | jme_resume_rx(jme); |
7ca9ebee | 2424 | } |
7ca9ebee GFT |
2425 | } |
2426 | #endif | |
2427 | ||
3bf61c55 GFT |
2428 | static void |
2429 | jme_get_drvinfo(struct net_device *netdev, | |
2430 | struct ethtool_drvinfo *info) | |
d7699f87 | 2431 | { |
cd0ff491 | 2432 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2433 | |
cd0ff491 GFT |
2434 | strcpy(info->driver, DRV_NAME); |
2435 | strcpy(info->version, DRV_VERSION); | |
2436 | strcpy(info->bus_info, pci_name(jme->pdev)); | |
d7699f87 GFT |
2437 | } |
2438 | ||
8c198884 GFT |
2439 | static int |
2440 | jme_get_regs_len(struct net_device *netdev) | |
2441 | { | |
cd0ff491 | 2442 | return JME_REG_LEN; |
8c198884 GFT |
2443 | } |
2444 | ||
2445 | static void | |
cd0ff491 | 2446 | mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len) |
8c198884 GFT |
2447 | { |
2448 | int i; | |
2449 | ||
cd0ff491 | 2450 | for (i = 0 ; i < len ; i += 4) |
79ce639c | 2451 | p[i >> 2] = jread32(jme, reg + i); |
186fc259 | 2452 | } |
8c198884 | 2453 | |
186fc259 | 2454 | static void |
cd0ff491 | 2455 | mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) |
186fc259 GFT |
2456 | { |
2457 | int i; | |
cd0ff491 | 2458 | u16 *p16 = (u16 *)p; |
186fc259 | 2459 | |
cd0ff491 | 2460 | for (i = 0 ; i < reg_nr ; ++i) |
186fc259 | 2461 | p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i); |
8c198884 GFT |
2462 | } |
2463 | ||
2464 | static void | |
2465 | jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) | |
2466 | { | |
cd0ff491 GFT |
2467 | struct jme_adapter *jme = netdev_priv(netdev); |
2468 | u32 *p32 = (u32 *)p; | |
8c198884 | 2469 | |
186fc259 | 2470 | memset(p, 0xFF, JME_REG_LEN); |
8c198884 GFT |
2471 | |
2472 | regs->version = 1; | |
2473 | mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN); | |
2474 | ||
2475 | p32 += 0x100 >> 2; | |
2476 | mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN); | |
2477 | ||
2478 | p32 += 0x100 >> 2; | |
2479 | mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN); | |
2480 | ||
2481 | p32 += 0x100 >> 2; | |
2482 | mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN); | |
2483 | ||
186fc259 GFT |
2484 | p32 += 0x100 >> 2; |
2485 | mdio_memcpy(jme, p32, JME_PHY_REG_NR); | |
8a76ab5f GFT |
2486 | |
2487 | p32 += 0x100 >> 2; | |
2488 | jme_phyext_memcpy(jme, p32, JME_PHY_SPEC_REG_NR); | |
8c198884 GFT |
2489 | } |
2490 | ||
2491 | static int | |
2492 | jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2493 | { | |
2494 | struct jme_adapter *jme = netdev_priv(netdev); | |
2495 | ||
8c198884 GFT |
2496 | ecmd->tx_coalesce_usecs = PCC_TX_TO; |
2497 | ecmd->tx_max_coalesced_frames = PCC_TX_CNT; | |
2498 | ||
cd0ff491 | 2499 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
cdcdc9eb GFT |
2500 | ecmd->use_adaptive_rx_coalesce = false; |
2501 | ecmd->rx_coalesce_usecs = 0; | |
2502 | ecmd->rx_max_coalesced_frames = 0; | |
2503 | return 0; | |
2504 | } | |
2505 | ||
2506 | ecmd->use_adaptive_rx_coalesce = true; | |
2507 | ||
cd0ff491 | 2508 | switch (jme->dpi.cur) { |
8c198884 GFT |
2509 | case PCC_P1: |
2510 | ecmd->rx_coalesce_usecs = PCC_P1_TO; | |
2511 | ecmd->rx_max_coalesced_frames = PCC_P1_CNT; | |
2512 | break; | |
2513 | case PCC_P2: | |
2514 | ecmd->rx_coalesce_usecs = PCC_P2_TO; | |
2515 | ecmd->rx_max_coalesced_frames = PCC_P2_CNT; | |
2516 | break; | |
2517 | case PCC_P3: | |
2518 | ecmd->rx_coalesce_usecs = PCC_P3_TO; | |
2519 | ecmd->rx_max_coalesced_frames = PCC_P3_CNT; | |
2520 | break; | |
2521 | default: | |
2522 | break; | |
2523 | } | |
2524 | ||
2525 | return 0; | |
2526 | } | |
2527 | ||
192570e0 GFT |
2528 | static int |
2529 | jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2530 | { | |
2531 | struct jme_adapter *jme = netdev_priv(netdev); | |
2532 | struct dynpcc_info *dpi = &(jme->dpi); | |
2533 | ||
cd0ff491 | 2534 | if (netif_running(netdev)) |
cdcdc9eb GFT |
2535 | return -EBUSY; |
2536 | ||
7ca9ebee GFT |
2537 | if (ecmd->use_adaptive_rx_coalesce && |
2538 | test_bit(JME_FLAG_POLL, &jme->flags)) { | |
cd0ff491 | 2539 | clear_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb GFT |
2540 | jme->jme_rx = netif_rx; |
2541 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
192570e0 GFT |
2542 | dpi->cur = PCC_P1; |
2543 | dpi->attempt = PCC_P1; | |
2544 | dpi->cnt = 0; | |
2545 | jme_set_rx_pcc(jme, PCC_P1); | |
2546 | jme_interrupt_mode(jme); | |
7ca9ebee GFT |
2547 | } else if (!(ecmd->use_adaptive_rx_coalesce) && |
2548 | !(test_bit(JME_FLAG_POLL, &jme->flags))) { | |
cd0ff491 | 2549 | set_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb GFT |
2550 | jme->jme_rx = netif_receive_skb; |
2551 | jme->jme_vlan_rx = vlan_hwaccel_receive_skb; | |
192570e0 GFT |
2552 | jme_interrupt_mode(jme); |
2553 | } | |
2554 | ||
2555 | return 0; | |
2556 | } | |
2557 | ||
8c198884 GFT |
2558 | static void |
2559 | jme_get_pauseparam(struct net_device *netdev, | |
2560 | struct ethtool_pauseparam *ecmd) | |
2561 | { | |
2562 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2563 | u32 val; |
8c198884 GFT |
2564 | |
2565 | ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0; | |
2566 | ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0; | |
2567 | ||
cd0ff491 GFT |
2568 | spin_lock_bh(&jme->phy_lock); |
2569 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2570 | spin_unlock_bh(&jme->phy_lock); | |
b3821cc5 GFT |
2571 | |
2572 | ecmd->autoneg = | |
2573 | (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0; | |
8c198884 GFT |
2574 | } |
2575 | ||
2576 | static int | |
2577 | jme_set_pauseparam(struct net_device *netdev, | |
2578 | struct ethtool_pauseparam *ecmd) | |
2579 | { | |
2580 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2581 | u32 val; |
8c198884 | 2582 | |
cd0ff491 | 2583 | if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^ |
8c198884 GFT |
2584 | (ecmd->tx_pause != 0)) { |
2585 | ||
cd0ff491 | 2586 | if (ecmd->tx_pause) |
8c198884 GFT |
2587 | jme->reg_txpfc |= TXPFC_PF_EN; |
2588 | else | |
2589 | jme->reg_txpfc &= ~TXPFC_PF_EN; | |
2590 | ||
2591 | jwrite32(jme, JME_TXPFC, jme->reg_txpfc); | |
2592 | } | |
2593 | ||
cd0ff491 GFT |
2594 | spin_lock_bh(&jme->rxmcs_lock); |
2595 | if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^ | |
8c198884 GFT |
2596 | (ecmd->rx_pause != 0)) { |
2597 | ||
cd0ff491 | 2598 | if (ecmd->rx_pause) |
8c198884 GFT |
2599 | jme->reg_rxmcs |= RXMCS_FLOWCTRL; |
2600 | else | |
2601 | jme->reg_rxmcs &= ~RXMCS_FLOWCTRL; | |
2602 | ||
2603 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2604 | } | |
cd0ff491 | 2605 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 | 2606 | |
cd0ff491 GFT |
2607 | spin_lock_bh(&jme->phy_lock); |
2608 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2609 | if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^ | |
8c198884 GFT |
2610 | (ecmd->autoneg != 0)) { |
2611 | ||
cd0ff491 | 2612 | if (ecmd->autoneg) |
8c198884 GFT |
2613 | val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
2614 | else | |
2615 | val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
2616 | ||
b3821cc5 GFT |
2617 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, |
2618 | MII_ADVERTISE, val); | |
8c198884 | 2619 | } |
cd0ff491 | 2620 | spin_unlock_bh(&jme->phy_lock); |
8c198884 GFT |
2621 | |
2622 | return 0; | |
2623 | } | |
2624 | ||
29bdd921 GFT |
2625 | static void |
2626 | jme_get_wol(struct net_device *netdev, | |
2627 | struct ethtool_wolinfo *wol) | |
2628 | { | |
2629 | struct jme_adapter *jme = netdev_priv(netdev); | |
2630 | ||
2631 | wol->supported = WAKE_MAGIC | WAKE_PHY; | |
2632 | ||
2633 | wol->wolopts = 0; | |
2634 | ||
cd0ff491 | 2635 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
29bdd921 GFT |
2636 | wol->wolopts |= WAKE_PHY; |
2637 | ||
cd0ff491 | 2638 | if (jme->reg_pmcs & PMCS_MFEN) |
29bdd921 GFT |
2639 | wol->wolopts |= WAKE_MAGIC; |
2640 | ||
2641 | } | |
2642 | ||
2643 | static int | |
2644 | jme_set_wol(struct net_device *netdev, | |
2645 | struct ethtool_wolinfo *wol) | |
2646 | { | |
2647 | struct jme_adapter *jme = netdev_priv(netdev); | |
2648 | ||
cd0ff491 | 2649 | if (wol->wolopts & (WAKE_MAGICSECURE | |
29bdd921 GFT |
2650 | WAKE_UCAST | |
2651 | WAKE_MCAST | | |
2652 | WAKE_BCAST | | |
2653 | WAKE_ARP)) | |
2654 | return -EOPNOTSUPP; | |
2655 | ||
2656 | jme->reg_pmcs = 0; | |
2657 | ||
cd0ff491 | 2658 | if (wol->wolopts & WAKE_PHY) |
29bdd921 GFT |
2659 | jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN; |
2660 | ||
cd0ff491 | 2661 | if (wol->wolopts & WAKE_MAGIC) |
29bdd921 GFT |
2662 | jme->reg_pmcs |= PMCS_MFEN; |
2663 | ||
cd0ff491 | 2664 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
42b1055e | 2665 | |
29bdd921 GFT |
2666 | return 0; |
2667 | } | |
b3821cc5 | 2668 | |
3bf61c55 GFT |
2669 | static int |
2670 | jme_get_settings(struct net_device *netdev, | |
2671 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2672 | { |
2673 | struct jme_adapter *jme = netdev_priv(netdev); | |
2674 | int rc; | |
8c198884 | 2675 | |
cd0ff491 | 2676 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2677 | rc = mii_ethtool_gset(&(jme->mii_if), ecmd); |
cd0ff491 | 2678 | spin_unlock_bh(&jme->phy_lock); |
d7699f87 GFT |
2679 | return rc; |
2680 | } | |
2681 | ||
3bf61c55 GFT |
2682 | static int |
2683 | jme_set_settings(struct net_device *netdev, | |
2684 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2685 | { |
2686 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2687 | int rc, fdc = 0; |
fcf45b4c | 2688 | |
cd0ff491 | 2689 | if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE) |
8c198884 GFT |
2690 | return -EINVAL; |
2691 | ||
e6b41b51 GFT |
2692 | /* |
2693 | * Check If user changed duplex only while force_media. | |
2694 | * Hardware would not generate link change interrupt. | |
2695 | */ | |
cd0ff491 | 2696 | if (jme->mii_if.force_media && |
79ce639c GFT |
2697 | ecmd->autoneg != AUTONEG_ENABLE && |
2698 | (jme->mii_if.full_duplex != ecmd->duplex)) | |
2699 | fdc = 1; | |
2700 | ||
cd0ff491 | 2701 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2702 | rc = mii_ethtool_sset(&(jme->mii_if), ecmd); |
cd0ff491 | 2703 | spin_unlock_bh(&jme->phy_lock); |
fcf45b4c | 2704 | |
cd0ff491 | 2705 | if (!rc) { |
e6b41b51 GFT |
2706 | if (fdc) |
2707 | jme_reset_link(jme); | |
29bdd921 | 2708 | jme->old_ecmd = *ecmd; |
aa1e7189 GFT |
2709 | set_bit(JME_FLAG_SSET, &jme->flags); |
2710 | } | |
2711 | ||
2712 | return rc; | |
2713 | } | |
2714 | ||
2715 | static int | |
2716 | jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
2717 | { | |
2718 | int rc; | |
2719 | struct jme_adapter *jme = netdev_priv(netdev); | |
2720 | struct mii_ioctl_data *mii_data = if_mii(rq); | |
2721 | unsigned int duplex_chg; | |
2722 | ||
2723 | if (cmd == SIOCSMIIREG) { | |
2724 | u16 val = mii_data->val_in; | |
2725 | if (!(val & (BMCR_RESET|BMCR_ANENABLE)) && | |
2726 | (val & BMCR_SPEED1000)) | |
2727 | return -EINVAL; | |
2728 | } | |
2729 | ||
2730 | spin_lock_bh(&jme->phy_lock); | |
2731 | rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg); | |
2732 | spin_unlock_bh(&jme->phy_lock); | |
2733 | ||
2734 | if (!rc && (cmd == SIOCSMIIREG)) { | |
2735 | if (duplex_chg) | |
2736 | jme_reset_link(jme); | |
2737 | jme_get_settings(netdev, &jme->old_ecmd); | |
2738 | set_bit(JME_FLAG_SSET, &jme->flags); | |
29bdd921 GFT |
2739 | } |
2740 | ||
d7699f87 GFT |
2741 | return rc; |
2742 | } | |
2743 | ||
cd0ff491 | 2744 | static u32 |
3bf61c55 GFT |
2745 | jme_get_link(struct net_device *netdev) |
2746 | { | |
d7699f87 GFT |
2747 | struct jme_adapter *jme = netdev_priv(netdev); |
2748 | return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP; | |
2749 | } | |
2750 | ||
8c198884 | 2751 | static u32 |
cd0ff491 GFT |
2752 | jme_get_msglevel(struct net_device *netdev) |
2753 | { | |
2754 | struct jme_adapter *jme = netdev_priv(netdev); | |
2755 | return jme->msg_enable; | |
2756 | } | |
2757 | ||
2758 | static void | |
2759 | jme_set_msglevel(struct net_device *netdev, u32 value) | |
8c198884 | 2760 | { |
cd0ff491 GFT |
2761 | struct jme_adapter *jme = netdev_priv(netdev); |
2762 | jme->msg_enable = value; | |
2763 | } | |
8c198884 | 2764 | |
cd0ff491 GFT |
2765 | static u32 |
2766 | jme_get_rx_csum(struct net_device *netdev) | |
2767 | { | |
2768 | struct jme_adapter *jme = netdev_priv(netdev); | |
8c198884 GFT |
2769 | return jme->reg_rxmcs & RXMCS_CHECKSUM; |
2770 | } | |
2771 | ||
2772 | static int | |
2773 | jme_set_rx_csum(struct net_device *netdev, u32 on) | |
2774 | { | |
cd0ff491 | 2775 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2776 | |
cd0ff491 GFT |
2777 | spin_lock_bh(&jme->rxmcs_lock); |
2778 | if (on) | |
8c198884 GFT |
2779 | jme->reg_rxmcs |= RXMCS_CHECKSUM; |
2780 | else | |
2781 | jme->reg_rxmcs &= ~RXMCS_CHECKSUM; | |
2782 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
cd0ff491 | 2783 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2784 | |
2785 | return 0; | |
2786 | } | |
2787 | ||
2788 | static int | |
2789 | jme_set_tx_csum(struct net_device *netdev, u32 on) | |
2790 | { | |
cd0ff491 | 2791 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2792 | |
cd0ff491 GFT |
2793 | if (on) { |
2794 | set_bit(JME_FLAG_TXCSUM, &jme->flags); | |
2795 | if (netdev->mtu <= 1900) | |
1a0b42f4 MM |
2796 | netdev->features |= |
2797 | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; | |
cd0ff491 GFT |
2798 | } else { |
2799 | clear_bit(JME_FLAG_TXCSUM, &jme->flags); | |
1a0b42f4 MM |
2800 | netdev->features &= |
2801 | ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); | |
b3821cc5 | 2802 | } |
8c198884 GFT |
2803 | |
2804 | return 0; | |
2805 | } | |
2806 | ||
b3821cc5 GFT |
2807 | static int |
2808 | jme_set_tso(struct net_device *netdev, u32 on) | |
2809 | { | |
cd0ff491 | 2810 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2811 | |
cd0ff491 GFT |
2812 | if (on) { |
2813 | set_bit(JME_FLAG_TSO, &jme->flags); | |
2814 | if (netdev->mtu <= 1900) | |
1a0b42f4 | 2815 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
cd0ff491 GFT |
2816 | } else { |
2817 | clear_bit(JME_FLAG_TSO, &jme->flags); | |
1a0b42f4 | 2818 | netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); |
b3821cc5 GFT |
2819 | } |
2820 | ||
cd0ff491 | 2821 | return 0; |
b3821cc5 GFT |
2822 | } |
2823 | ||
8c198884 GFT |
2824 | static int |
2825 | jme_nway_reset(struct net_device *netdev) | |
2826 | { | |
cd0ff491 | 2827 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 GFT |
2828 | jme_restart_an(jme); |
2829 | return 0; | |
2830 | } | |
2831 | ||
cd0ff491 | 2832 | static u8 |
186fc259 GFT |
2833 | jme_smb_read(struct jme_adapter *jme, unsigned int addr) |
2834 | { | |
cd0ff491 | 2835 | u32 val; |
186fc259 GFT |
2836 | int to; |
2837 | ||
2838 | val = jread32(jme, JME_SMBCSR); | |
2839 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2840 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2841 | msleep(1); |
2842 | val = jread32(jme, JME_SMBCSR); | |
2843 | } | |
cd0ff491 | 2844 | if (!to) { |
937ef75a | 2845 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2846 | return 0xFF; |
2847 | } | |
2848 | ||
2849 | jwrite32(jme, JME_SMBINTF, | |
2850 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2851 | SMBINTF_HWRWN_READ | | |
2852 | SMBINTF_HWCMD); | |
2853 | ||
2854 | val = jread32(jme, JME_SMBINTF); | |
2855 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2856 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2857 | msleep(1); |
2858 | val = jread32(jme, JME_SMBINTF); | |
2859 | } | |
cd0ff491 | 2860 | if (!to) { |
937ef75a | 2861 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2862 | return 0xFF; |
2863 | } | |
2864 | ||
2865 | return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT; | |
2866 | } | |
2867 | ||
2868 | static void | |
cd0ff491 | 2869 | jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data) |
186fc259 | 2870 | { |
cd0ff491 | 2871 | u32 val; |
186fc259 GFT |
2872 | int to; |
2873 | ||
2874 | val = jread32(jme, JME_SMBCSR); | |
2875 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2876 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2877 | msleep(1); |
2878 | val = jread32(jme, JME_SMBCSR); | |
2879 | } | |
cd0ff491 | 2880 | if (!to) { |
937ef75a | 2881 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2882 | return; |
2883 | } | |
2884 | ||
2885 | jwrite32(jme, JME_SMBINTF, | |
2886 | ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) | | |
2887 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2888 | SMBINTF_HWRWN_WRITE | | |
2889 | SMBINTF_HWCMD); | |
2890 | ||
2891 | val = jread32(jme, JME_SMBINTF); | |
2892 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2893 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2894 | msleep(1); |
2895 | val = jread32(jme, JME_SMBINTF); | |
2896 | } | |
cd0ff491 | 2897 | if (!to) { |
937ef75a | 2898 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2899 | return; |
2900 | } | |
2901 | ||
2902 | mdelay(2); | |
2903 | } | |
2904 | ||
2905 | static int | |
2906 | jme_get_eeprom_len(struct net_device *netdev) | |
2907 | { | |
cd0ff491 GFT |
2908 | struct jme_adapter *jme = netdev_priv(netdev); |
2909 | u32 val; | |
186fc259 | 2910 | val = jread32(jme, JME_SMBCSR); |
cd0ff491 | 2911 | return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0; |
186fc259 GFT |
2912 | } |
2913 | ||
2914 | static int | |
2915 | jme_get_eeprom(struct net_device *netdev, | |
2916 | struct ethtool_eeprom *eeprom, u8 *data) | |
2917 | { | |
cd0ff491 | 2918 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2919 | int i, offset = eeprom->offset, len = eeprom->len; |
2920 | ||
2921 | /* | |
8d27293f | 2922 | * ethtool will check the boundary for us |
186fc259 GFT |
2923 | */ |
2924 | eeprom->magic = JME_EEPROM_MAGIC; | |
cd0ff491 | 2925 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2926 | data[i] = jme_smb_read(jme, i + offset); |
2927 | ||
2928 | return 0; | |
2929 | } | |
2930 | ||
2931 | static int | |
2932 | jme_set_eeprom(struct net_device *netdev, | |
2933 | struct ethtool_eeprom *eeprom, u8 *data) | |
2934 | { | |
cd0ff491 | 2935 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2936 | int i, offset = eeprom->offset, len = eeprom->len; |
2937 | ||
2938 | if (eeprom->magic != JME_EEPROM_MAGIC) | |
2939 | return -EINVAL; | |
2940 | ||
2941 | /* | |
8d27293f | 2942 | * ethtool will check the boundary for us |
186fc259 | 2943 | */ |
cd0ff491 | 2944 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2945 | jme_smb_write(jme, i + offset, data[i]); |
2946 | ||
2947 | return 0; | |
2948 | } | |
2949 | ||
3b70a6fa GFT |
2950 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
2951 | static struct ethtool_ops jme_ethtool_ops = { | |
2952 | #else | |
d7699f87 | 2953 | static const struct ethtool_ops jme_ethtool_ops = { |
3b70a6fa | 2954 | #endif |
cd0ff491 | 2955 | .get_drvinfo = jme_get_drvinfo, |
8c198884 GFT |
2956 | .get_regs_len = jme_get_regs_len, |
2957 | .get_regs = jme_get_regs, | |
2958 | .get_coalesce = jme_get_coalesce, | |
192570e0 | 2959 | .set_coalesce = jme_set_coalesce, |
cd0ff491 GFT |
2960 | .get_pauseparam = jme_get_pauseparam, |
2961 | .set_pauseparam = jme_set_pauseparam, | |
29bdd921 GFT |
2962 | .get_wol = jme_get_wol, |
2963 | .set_wol = jme_set_wol, | |
d7699f87 GFT |
2964 | .get_settings = jme_get_settings, |
2965 | .set_settings = jme_set_settings, | |
2966 | .get_link = jme_get_link, | |
cd0ff491 GFT |
2967 | .get_msglevel = jme_get_msglevel, |
2968 | .set_msglevel = jme_set_msglevel, | |
8c198884 GFT |
2969 | .get_rx_csum = jme_get_rx_csum, |
2970 | .set_rx_csum = jme_set_rx_csum, | |
2971 | .set_tx_csum = jme_set_tx_csum, | |
b3821cc5 GFT |
2972 | .set_tso = jme_set_tso, |
2973 | .set_sg = ethtool_op_set_sg, | |
8c198884 | 2974 | .nway_reset = jme_nway_reset, |
186fc259 GFT |
2975 | .get_eeprom_len = jme_get_eeprom_len, |
2976 | .get_eeprom = jme_get_eeprom, | |
2977 | .set_eeprom = jme_set_eeprom, | |
d7699f87 GFT |
2978 | }; |
2979 | ||
3bf61c55 GFT |
2980 | static int |
2981 | jme_pci_dma64(struct pci_dev *pdev) | |
d7699f87 | 2982 | { |
3b70a6fa | 2983 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
0ede469c GFT |
2984 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
2985 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) | |
2986 | #else | |
2987 | !pci_set_dma_mask(pdev, DMA_64BIT_MASK) | |
2988 | #endif | |
2989 | ) | |
2990 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) | |
2991 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) | |
2992 | #else | |
cd0ff491 | 2993 | if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) |
0ede469c | 2994 | #endif |
3bf61c55 GFT |
2995 | return 1; |
2996 | ||
3b70a6fa | 2997 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
0ede469c GFT |
2998 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
2999 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(40)) | |
3000 | #else | |
3001 | !pci_set_dma_mask(pdev, DMA_40BIT_MASK) | |
3002 | #endif | |
3003 | ) | |
3004 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) | |
3005 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40))) | |
3006 | #else | |
cd0ff491 | 3007 | if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK)) |
0ede469c | 3008 | #endif |
8c198884 GFT |
3009 | return 1; |
3010 | ||
0ede469c GFT |
3011 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
3012 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) | |
3013 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) | |
3014 | #else | |
cd0ff491 GFT |
3015 | if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) |
3016 | if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) | |
0ede469c | 3017 | #endif |
3bf61c55 GFT |
3018 | return 0; |
3019 | ||
3020 | return -1; | |
3021 | } | |
3022 | ||
cd0ff491 | 3023 | static inline void |
cdcdc9eb GFT |
3024 | jme_phy_init(struct jme_adapter *jme) |
3025 | { | |
cd0ff491 | 3026 | u16 reg26; |
cdcdc9eb GFT |
3027 | |
3028 | reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26); | |
3029 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000); | |
3030 | } | |
3031 | ||
cd0ff491 | 3032 | static inline void |
cdcdc9eb | 3033 | jme_check_hw_ver(struct jme_adapter *jme) |
42b1055e | 3034 | { |
cd0ff491 | 3035 | u32 chipmode; |
cdcdc9eb GFT |
3036 | |
3037 | chipmode = jread32(jme, JME_CHIPMODE); | |
3038 | ||
3039 | jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT; | |
58c92f28 | 3040 | jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT; |
98ef18f1 GFT |
3041 | jme->chip_main_rev = jme->chiprev & 0xF; |
3042 | jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF; | |
42b1055e GFT |
3043 | } |
3044 | ||
3b70a6fa GFT |
3045 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
3046 | static const struct net_device_ops jme_netdev_ops = { | |
3047 | .ndo_open = jme_open, | |
3048 | .ndo_stop = jme_close, | |
3049 | .ndo_validate_addr = eth_validate_addr, | |
aa1e7189 | 3050 | .ndo_do_ioctl = jme_ioctl, |
3b70a6fa GFT |
3051 | .ndo_start_xmit = jme_start_xmit, |
3052 | .ndo_set_mac_address = jme_set_macaddr, | |
3053 | .ndo_set_multicast_list = jme_set_multi, | |
3054 | .ndo_change_mtu = jme_change_mtu, | |
3055 | .ndo_tx_timeout = jme_tx_timeout, | |
3056 | .ndo_vlan_rx_register = jme_vlan_rx_register, | |
3057 | }; | |
3058 | #endif | |
3059 | ||
3bf61c55 GFT |
3060 | static int __devinit |
3061 | jme_init_one(struct pci_dev *pdev, | |
3062 | const struct pci_device_id *ent) | |
3063 | { | |
cdcdc9eb | 3064 | int rc = 0, using_dac, i; |
d7699f87 GFT |
3065 | struct net_device *netdev; |
3066 | struct jme_adapter *jme; | |
cd0ff491 GFT |
3067 | u16 bmcr, bmsr; |
3068 | u32 apmc; | |
d7699f87 GFT |
3069 | |
3070 | /* | |
3071 | * set up PCI device basics | |
3072 | */ | |
4330c2f2 | 3073 | rc = pci_enable_device(pdev); |
cd0ff491 | 3074 | if (rc) { |
937ef75a | 3075 | pr_err("Cannot enable PCI device\n"); |
4330c2f2 GFT |
3076 | goto err_out; |
3077 | } | |
d7699f87 | 3078 | |
3bf61c55 | 3079 | using_dac = jme_pci_dma64(pdev); |
cd0ff491 | 3080 | if (using_dac < 0) { |
937ef75a | 3081 | pr_err("Cannot set PCI DMA Mask\n"); |
3bf61c55 GFT |
3082 | rc = -EIO; |
3083 | goto err_out_disable_pdev; | |
3084 | } | |
3085 | ||
cd0ff491 | 3086 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
937ef75a | 3087 | pr_err("No PCI resource region found\n"); |
4330c2f2 GFT |
3088 | rc = -ENOMEM; |
3089 | goto err_out_disable_pdev; | |
3090 | } | |
d7699f87 | 3091 | |
4330c2f2 | 3092 | rc = pci_request_regions(pdev, DRV_NAME); |
cd0ff491 | 3093 | if (rc) { |
937ef75a | 3094 | pr_err("Cannot obtain PCI resource region\n"); |
4330c2f2 GFT |
3095 | goto err_out_disable_pdev; |
3096 | } | |
d7699f87 GFT |
3097 | |
3098 | pci_set_master(pdev); | |
3099 | ||
3100 | /* | |
3101 | * alloc and init net device | |
3102 | */ | |
3bf61c55 | 3103 | netdev = alloc_etherdev(sizeof(*jme)); |
cd0ff491 | 3104 | if (!netdev) { |
937ef75a | 3105 | pr_err("Cannot allocate netdev structure\n"); |
4330c2f2 GFT |
3106 | rc = -ENOMEM; |
3107 | goto err_out_release_regions; | |
d7699f87 | 3108 | } |
3b70a6fa GFT |
3109 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
3110 | netdev->netdev_ops = &jme_netdev_ops; | |
3111 | #else | |
d7699f87 GFT |
3112 | netdev->open = jme_open; |
3113 | netdev->stop = jme_close; | |
aa1e7189 | 3114 | netdev->do_ioctl = jme_ioctl; |
d7699f87 | 3115 | netdev->hard_start_xmit = jme_start_xmit; |
d7699f87 GFT |
3116 | netdev->set_mac_address = jme_set_macaddr; |
3117 | netdev->set_multicast_list = jme_set_multi; | |
3118 | netdev->change_mtu = jme_change_mtu; | |
8c198884 | 3119 | netdev->tx_timeout = jme_tx_timeout; |
42b1055e | 3120 | netdev->vlan_rx_register = jme_vlan_rx_register; |
7ca9ebee GFT |
3121 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
3122 | netdev->vlan_rx_kill_vid = jme_vlan_rx_kill_vid; | |
3123 | #endif | |
3bf61c55 | 3124 | NETDEV_GET_STATS(netdev, &jme_get_stats); |
3b70a6fa GFT |
3125 | #endif |
3126 | netdev->ethtool_ops = &jme_ethtool_ops; | |
3127 | netdev->watchdog_timeo = TX_TIMEOUT; | |
1a0b42f4 MM |
3128 | netdev->features = NETIF_F_IP_CSUM | |
3129 | NETIF_F_IPV6_CSUM | | |
b3821cc5 GFT |
3130 | NETIF_F_SG | |
3131 | NETIF_F_TSO | | |
3132 | NETIF_F_TSO6 | | |
42b1055e GFT |
3133 | NETIF_F_HW_VLAN_TX | |
3134 | NETIF_F_HW_VLAN_RX; | |
cd0ff491 | 3135 | if (using_dac) |
8c198884 | 3136 | netdev->features |= NETIF_F_HIGHDMA; |
d7699f87 GFT |
3137 | |
3138 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
3139 | pci_set_drvdata(pdev, netdev); | |
3140 | ||
3141 | /* | |
3142 | * init adapter info | |
3143 | */ | |
3144 | jme = netdev_priv(netdev); | |
3145 | jme->pdev = pdev; | |
3146 | jme->dev = netdev; | |
cdcdc9eb GFT |
3147 | jme->jme_rx = netif_rx; |
3148 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
29bdd921 | 3149 | jme->old_mtu = netdev->mtu = 1500; |
fcf45b4c | 3150 | jme->phylink = 0; |
b3821cc5 | 3151 | jme->tx_ring_size = 1 << 10; |
0ede469c | 3152 | jme->tx_ring_mask = jme->tx_ring_size - 1; |
b3821cc5 GFT |
3153 | jme->tx_wake_threshold = 1 << 9; |
3154 | jme->rx_ring_size = 1 << 9; | |
3155 | jme->rx_ring_mask = jme->rx_ring_size - 1; | |
cd0ff491 | 3156 | jme->msg_enable = JME_DEF_MSG_ENABLE; |
d7699f87 GFT |
3157 | jme->regs = ioremap(pci_resource_start(pdev, 0), |
3158 | pci_resource_len(pdev, 0)); | |
4330c2f2 | 3159 | if (!(jme->regs)) { |
937ef75a | 3160 | pr_err("Mapping PCI resource region error\n"); |
d7699f87 GFT |
3161 | rc = -ENOMEM; |
3162 | goto err_out_free_netdev; | |
3163 | } | |
4330c2f2 | 3164 | |
cd0ff491 GFT |
3165 | if (no_pseudohp) { |
3166 | apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN; | |
3167 | jwrite32(jme, JME_APMC, apmc); | |
3168 | } else if (force_pseudohp) { | |
3169 | apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN; | |
3170 | jwrite32(jme, JME_APMC, apmc); | |
3171 | } | |
3172 | ||
cdcdc9eb | 3173 | NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2) |
192570e0 | 3174 | |
d7699f87 | 3175 | spin_lock_init(&jme->phy_lock); |
fcf45b4c | 3176 | spin_lock_init(&jme->macaddr_lock); |
8c198884 | 3177 | spin_lock_init(&jme->rxmcs_lock); |
fcf45b4c | 3178 | |
fcf45b4c GFT |
3179 | atomic_set(&jme->link_changing, 1); |
3180 | atomic_set(&jme->rx_cleaning, 1); | |
3181 | atomic_set(&jme->tx_cleaning, 1); | |
192570e0 | 3182 | atomic_set(&jme->rx_empty, 1); |
fcf45b4c | 3183 | |
79ce639c | 3184 | tasklet_init(&jme->pcc_task, |
7ca9ebee | 3185 | jme_pcc_tasklet, |
79ce639c | 3186 | (unsigned long) jme); |
4330c2f2 | 3187 | tasklet_init(&jme->linkch_task, |
7ca9ebee | 3188 | jme_link_change_tasklet, |
4330c2f2 GFT |
3189 | (unsigned long) jme); |
3190 | tasklet_init(&jme->txclean_task, | |
7ca9ebee | 3191 | jme_tx_clean_tasklet, |
4330c2f2 GFT |
3192 | (unsigned long) jme); |
3193 | tasklet_init(&jme->rxclean_task, | |
7ca9ebee | 3194 | jme_rx_clean_tasklet, |
4330c2f2 | 3195 | (unsigned long) jme); |
fcf45b4c | 3196 | tasklet_init(&jme->rxempty_task, |
7ca9ebee | 3197 | jme_rx_empty_tasklet, |
fcf45b4c | 3198 | (unsigned long) jme); |
0ede469c | 3199 | tasklet_disable_nosync(&jme->linkch_task); |
cd0ff491 GFT |
3200 | tasklet_disable_nosync(&jme->txclean_task); |
3201 | tasklet_disable_nosync(&jme->rxclean_task); | |
3202 | tasklet_disable_nosync(&jme->rxempty_task); | |
8c198884 GFT |
3203 | jme->dpi.cur = PCC_P1; |
3204 | ||
cd0ff491 | 3205 | jme->reg_ghc = 0; |
79ce639c | 3206 | jme->reg_rxcs = RXCS_DEFAULT; |
8c198884 GFT |
3207 | jme->reg_rxmcs = RXMCS_DEFAULT; |
3208 | jme->reg_txpfc = 0; | |
47220951 | 3209 | jme->reg_pmcs = PMCS_MFEN; |
dc4185bd | 3210 | jme->reg_gpreg1 = GPREG1_DEFAULT; |
cd0ff491 GFT |
3211 | set_bit(JME_FLAG_TXCSUM, &jme->flags); |
3212 | set_bit(JME_FLAG_TSO, &jme->flags); | |
192570e0 | 3213 | |
fcf45b4c GFT |
3214 | /* |
3215 | * Get Max Read Req Size from PCI Config Space | |
3216 | */ | |
cd0ff491 GFT |
3217 | pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs); |
3218 | jme->mrrs &= PCI_DCSR_MRRS_MASK; | |
3219 | switch (jme->mrrs) { | |
3220 | case MRRS_128B: | |
3221 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; | |
3222 | break; | |
3223 | case MRRS_256B: | |
3224 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; | |
3225 | break; | |
3226 | default: | |
3227 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; | |
3228 | break; | |
cd54cf32 | 3229 | } |
fcf45b4c | 3230 | |
d7699f87 | 3231 | /* |
cdcdc9eb | 3232 | * Must check before reset_mac_processor |
d7699f87 | 3233 | */ |
cdcdc9eb GFT |
3234 | jme_check_hw_ver(jme); |
3235 | jme->mii_if.dev = netdev; | |
cd0ff491 | 3236 | if (jme->fpgaver) { |
cdcdc9eb | 3237 | jme->mii_if.phy_id = 0; |
cd0ff491 | 3238 | for (i = 1 ; i < 32 ; ++i) { |
cdcdc9eb GFT |
3239 | bmcr = jme_mdio_read(netdev, i, MII_BMCR); |
3240 | bmsr = jme_mdio_read(netdev, i, MII_BMSR); | |
cd0ff491 | 3241 | if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { |
cdcdc9eb GFT |
3242 | jme->mii_if.phy_id = i; |
3243 | break; | |
3244 | } | |
3245 | } | |
3246 | ||
cd0ff491 | 3247 | if (!jme->mii_if.phy_id) { |
cdcdc9eb | 3248 | rc = -EIO; |
937ef75a JP |
3249 | pr_err("Can not find phy_id\n"); |
3250 | goto err_out_unmap; | |
cdcdc9eb GFT |
3251 | } |
3252 | ||
3253 | jme->reg_ghc |= GHC_LINK_POLL; | |
cd0ff491 | 3254 | } else { |
cdcdc9eb GFT |
3255 | jme->mii_if.phy_id = 1; |
3256 | } | |
cd0ff491 | 3257 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
3258 | jme->mii_if.supports_gmii = true; |
3259 | else | |
3260 | jme->mii_if.supports_gmii = false; | |
aa1e7189 GFT |
3261 | jme->mii_if.phy_id_mask = 0x1F; |
3262 | jme->mii_if.reg_num_mask = 0x1F; | |
cdcdc9eb GFT |
3263 | jme->mii_if.mdio_read = jme_mdio_read; |
3264 | jme->mii_if.mdio_write = jme_mdio_write; | |
3265 | ||
d7699f87 | 3266 | jme_clear_pm(jme); |
55d19799 | 3267 | jme_set_phyfifo_5level(jme); |
98ef18f1 | 3268 | pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev); |
cd0ff491 | 3269 | if (!jme->fpgaver) |
cdcdc9eb | 3270 | jme_phy_init(jme); |
42b1055e | 3271 | jme_phy_off(jme); |
cdcdc9eb GFT |
3272 | |
3273 | /* | |
3274 | * Reset MAC processor and reload EEPROM for MAC Address | |
3275 | */ | |
d7699f87 | 3276 | jme_reset_mac_processor(jme); |
4330c2f2 | 3277 | rc = jme_reload_eeprom(jme); |
cd0ff491 | 3278 | if (rc) { |
937ef75a | 3279 | pr_err("Reload eeprom for reading MAC Address error\n"); |
0ede469c | 3280 | goto err_out_unmap; |
4330c2f2 | 3281 | } |
d7699f87 GFT |
3282 | jme_load_macaddr(netdev); |
3283 | ||
d7699f87 GFT |
3284 | /* |
3285 | * Tell stack that we are not ready to work until open() | |
3286 | */ | |
3287 | netif_carrier_off(netdev); | |
d7699f87 | 3288 | |
4330c2f2 | 3289 | rc = register_netdev(netdev); |
cd0ff491 | 3290 | if (rc) { |
937ef75a | 3291 | pr_err("Cannot register net device\n"); |
0ede469c | 3292 | goto err_out_unmap; |
4330c2f2 | 3293 | } |
d7699f87 | 3294 | |
98ef18f1 | 3295 | netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x " |
937ef75a | 3296 | "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n", |
7ca9ebee GFT |
3297 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ? |
3298 | "JMC250 Gigabit Ethernet" : | |
3299 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ? | |
3300 | "JMC260 Fast Ethernet" : "Unknown", | |
3301 | (jme->fpgaver != 0) ? " (FPGA)" : "", | |
3302 | (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev, | |
98ef18f1 | 3303 | jme->pcirev, |
937ef75a JP |
3304 | netdev->dev_addr[0], |
3305 | netdev->dev_addr[1], | |
3306 | netdev->dev_addr[2], | |
3307 | netdev->dev_addr[3], | |
3308 | netdev->dev_addr[4], | |
3309 | netdev->dev_addr[5]); | |
d7699f87 GFT |
3310 | |
3311 | return 0; | |
3312 | ||
3313 | err_out_unmap: | |
3314 | iounmap(jme->regs); | |
3315 | err_out_free_netdev: | |
3316 | pci_set_drvdata(pdev, NULL); | |
3317 | free_netdev(netdev); | |
4330c2f2 GFT |
3318 | err_out_release_regions: |
3319 | pci_release_regions(pdev); | |
d7699f87 | 3320 | err_out_disable_pdev: |
cd0ff491 | 3321 | pci_disable_device(pdev); |
d7699f87 | 3322 | err_out: |
4330c2f2 | 3323 | return rc; |
d7699f87 GFT |
3324 | } |
3325 | ||
3bf61c55 GFT |
3326 | static void __devexit |
3327 | jme_remove_one(struct pci_dev *pdev) | |
3328 | { | |
d7699f87 GFT |
3329 | struct net_device *netdev = pci_get_drvdata(pdev); |
3330 | struct jme_adapter *jme = netdev_priv(netdev); | |
3331 | ||
3332 | unregister_netdev(netdev); | |
3333 | iounmap(jme->regs); | |
3334 | pci_set_drvdata(pdev, NULL); | |
3335 | free_netdev(netdev); | |
3336 | pci_release_regions(pdev); | |
3337 | pci_disable_device(pdev); | |
3338 | ||
3339 | } | |
3340 | ||
a82e368c GFT |
3341 | static void |
3342 | jme_shutdown(struct pci_dev *pdev) | |
3343 | { | |
3344 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3345 | struct jme_adapter *jme = netdev_priv(netdev); | |
3346 | ||
3347 | jme_powersave_phy(jme); | |
3348 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27) | |
3349 | pci_enable_wake(pdev, PCI_D3hot, true); | |
3350 | #else | |
3351 | pci_pme_active(pdev, true); | |
3352 | #endif | |
3353 | } | |
3354 | ||
7ee473a3 | 3355 | #ifdef CONFIG_PM |
29bdd921 GFT |
3356 | static int |
3357 | jme_suspend(struct pci_dev *pdev, pm_message_t state) | |
3358 | { | |
3359 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3360 | struct jme_adapter *jme = netdev_priv(netdev); | |
29bdd921 GFT |
3361 | |
3362 | atomic_dec(&jme->link_changing); | |
3363 | ||
3364 | netif_device_detach(netdev); | |
3365 | netif_stop_queue(netdev); | |
3366 | jme_stop_irq(jme); | |
29bdd921 | 3367 | |
cd0ff491 GFT |
3368 | tasklet_disable(&jme->txclean_task); |
3369 | tasklet_disable(&jme->rxclean_task); | |
3370 | tasklet_disable(&jme->rxempty_task); | |
3371 | ||
cd0ff491 GFT |
3372 | if (netif_carrier_ok(netdev)) { |
3373 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
47220951 GFT |
3374 | jme_polling_mode(jme); |
3375 | ||
29bdd921 | 3376 | jme_stop_pcc_timer(jme); |
cd0ff491 GFT |
3377 | jme_disable_rx_engine(jme); |
3378 | jme_disable_tx_engine(jme); | |
29bdd921 GFT |
3379 | jme_reset_mac_processor(jme); |
3380 | jme_free_rx_resources(jme); | |
3381 | jme_free_tx_resources(jme); | |
3382 | netif_carrier_off(netdev); | |
3383 | jme->phylink = 0; | |
3384 | } | |
3385 | ||
cd0ff491 GFT |
3386 | tasklet_enable(&jme->txclean_task); |
3387 | tasklet_hi_enable(&jme->rxclean_task); | |
3388 | tasklet_hi_enable(&jme->rxempty_task); | |
29bdd921 GFT |
3389 | |
3390 | pci_save_state(pdev); | |
a82e368c | 3391 | jme_powersave_phy(jme); |
44d44589 | 3392 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27) |
a82e368c | 3393 | pci_enable_wake(pdev, PCI_D3hot, true); |
44d44589 AL |
3394 | #else |
3395 | pci_pme_active(pdev, true); | |
3396 | #endif | |
a82e368c | 3397 | pci_set_power_state(pdev, PCI_D3hot); |
29bdd921 GFT |
3398 | |
3399 | return 0; | |
3400 | } | |
3401 | ||
3402 | static int | |
3403 | jme_resume(struct pci_dev *pdev) | |
3404 | { | |
3405 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3406 | struct jme_adapter *jme = netdev_priv(netdev); | |
3407 | ||
3408 | jme_clear_pm(jme); | |
3409 | pci_restore_state(pdev); | |
3410 | ||
ed457bcc GFT |
3411 | jme_phy_on(jme); |
3412 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
29bdd921 | 3413 | jme_set_settings(netdev, &jme->old_ecmd); |
ed457bcc | 3414 | else |
29bdd921 GFT |
3415 | jme_reset_phy_processor(jme); |
3416 | ||
29bdd921 GFT |
3417 | jme_start_irq(jme); |
3418 | netif_device_attach(netdev); | |
3419 | ||
3420 | atomic_inc(&jme->link_changing); | |
3421 | ||
3422 | jme_reset_link(jme); | |
3423 | ||
3424 | return 0; | |
3425 | } | |
7ee473a3 | 3426 | #endif |
29bdd921 | 3427 | |
7ca9ebee | 3428 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24) |
d7699f87 | 3429 | static struct pci_device_id jme_pci_tbl[] = { |
7ca9ebee GFT |
3430 | #else |
3431 | static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = { | |
3432 | #endif | |
cd0ff491 GFT |
3433 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) }, |
3434 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) }, | |
d7699f87 GFT |
3435 | { } |
3436 | }; | |
3437 | ||
3438 | static struct pci_driver jme_driver = { | |
cd0ff491 GFT |
3439 | .name = DRV_NAME, |
3440 | .id_table = jme_pci_tbl, | |
3441 | .probe = jme_init_one, | |
3442 | .remove = __devexit_p(jme_remove_one), | |
d7699f87 | 3443 | #ifdef CONFIG_PM |
cd0ff491 GFT |
3444 | .suspend = jme_suspend, |
3445 | .resume = jme_resume, | |
d7699f87 | 3446 | #endif /* CONFIG_PM */ |
a82e368c | 3447 | .shutdown = jme_shutdown, |
d7699f87 GFT |
3448 | }; |
3449 | ||
3bf61c55 GFT |
3450 | static int __init |
3451 | jme_init_module(void) | |
d7699f87 | 3452 | { |
937ef75a | 3453 | pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION); |
d7699f87 GFT |
3454 | return pci_register_driver(&jme_driver); |
3455 | } | |
3456 | ||
3bf61c55 GFT |
3457 | static void __exit |
3458 | jme_cleanup_module(void) | |
d7699f87 GFT |
3459 | { |
3460 | pci_unregister_driver(&jme_driver); | |
3461 | } | |
3462 | ||
3463 | module_init(jme_init_module); | |
3464 | module_exit(jme_cleanup_module); | |
3465 | ||
3bf61c55 | 3466 | MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>"); |
d7699f87 GFT |
3467 | MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver"); |
3468 | MODULE_LICENSE("GPL"); | |
3469 | MODULE_VERSION(DRV_VERSION); | |
3470 | MODULE_DEVICE_TABLE(pci, jme_pci_tbl); | |
3471 |