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d7699f87 GFT |
1 | /* |
2 | * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver | |
3 | * | |
4 | * Copyright 2008 JMicron Technology Corporation | |
5 | * http://www.jmicron.com/ | |
6 | * | |
3bf61c55 GFT |
7 | * Author: Guo-Fu Tseng <cooldavid@cooldavid.org> |
8 | * | |
d7699f87 GFT |
9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | * | |
22 | */ | |
23 | ||
2e582300 | 24 | #include <linux/version.h> |
937ef75a JP |
25 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28) |
26 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
27 | #endif | |
28 | ||
d7699f87 GFT |
29 | #include <linux/module.h> |
30 | #include <linux/kernel.h> | |
31 | #include <linux/pci.h> | |
32 | #include <linux/netdevice.h> | |
33 | #include <linux/etherdevice.h> | |
34 | #include <linux/ethtool.h> | |
35 | #include <linux/mii.h> | |
36 | #include <linux/crc32.h> | |
4330c2f2 | 37 | #include <linux/delay.h> |
29bdd921 | 38 | #include <linux/spinlock.h> |
8c198884 GFT |
39 | #include <linux/in.h> |
40 | #include <linux/ip.h> | |
79ce639c GFT |
41 | #include <linux/ipv6.h> |
42 | #include <linux/tcp.h> | |
43 | #include <linux/udp.h> | |
42b1055e | 44 | #include <linux/if_vlan.h> |
38d1bc09 | 45 | #include <linux/slab.h> |
3b70a6fa | 46 | #include <net/ip6_checksum.h> |
d7699f87 GFT |
47 | #include "jme.h" |
48 | ||
cd0ff491 GFT |
49 | static int force_pseudohp = -1; |
50 | static int no_pseudohp = -1; | |
51 | static int no_extplug = -1; | |
52 | module_param(force_pseudohp, int, 0); | |
53 | MODULE_PARM_DESC(force_pseudohp, | |
54 | "Enable pseudo hot-plug feature manually by driver instead of BIOS."); | |
55 | module_param(no_pseudohp, int, 0); | |
56 | MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); | |
57 | module_param(no_extplug, int, 0); | |
58 | MODULE_PARM_DESC(no_extplug, | |
59 | "Do not use external plug signal for pseudo hot-plug."); | |
4330c2f2 | 60 | |
3bf61c55 GFT |
61 | static int |
62 | jme_mdio_read(struct net_device *netdev, int phy, int reg) | |
d7699f87 GFT |
63 | { |
64 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 65 | int i, val, again = (reg == MII_BMSR) ? 1 : 0; |
d7699f87 | 66 | |
186fc259 | 67 | read_again: |
cd0ff491 | 68 | jwrite32(jme, JME_SMI, SMI_OP_REQ | |
3bf61c55 GFT |
69 | smi_phy_addr(phy) | |
70 | smi_reg_addr(reg)); | |
d7699f87 GFT |
71 | |
72 | wmb(); | |
cd0ff491 | 73 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
cdcdc9eb | 74 | udelay(20); |
b3821cc5 GFT |
75 | val = jread32(jme, JME_SMI); |
76 | if ((val & SMI_OP_REQ) == 0) | |
3bf61c55 | 77 | break; |
cd0ff491 | 78 | } |
d7699f87 | 79 | |
cd0ff491 | 80 | if (i == 0) { |
937ef75a | 81 | pr_err("phy(%d) read timeout : %d\n", phy, reg); |
3bf61c55 | 82 | return 0; |
cd0ff491 | 83 | } |
d7699f87 | 84 | |
cd0ff491 | 85 | if (again--) |
186fc259 GFT |
86 | goto read_again; |
87 | ||
cd0ff491 | 88 | return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT; |
d7699f87 GFT |
89 | } |
90 | ||
3bf61c55 GFT |
91 | static void |
92 | jme_mdio_write(struct net_device *netdev, | |
93 | int phy, int reg, int val) | |
d7699f87 GFT |
94 | { |
95 | struct jme_adapter *jme = netdev_priv(netdev); | |
96 | int i; | |
97 | ||
3bf61c55 GFT |
98 | jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ | |
99 | ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | | |
100 | smi_phy_addr(phy) | smi_reg_addr(reg)); | |
d7699f87 GFT |
101 | |
102 | wmb(); | |
cdcdc9eb GFT |
103 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
104 | udelay(20); | |
8d27293f | 105 | if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0) |
3bf61c55 GFT |
106 | break; |
107 | } | |
d7699f87 | 108 | |
3bf61c55 | 109 | if (i == 0) |
937ef75a | 110 | pr_err("phy(%d) write timeout : %d\n", phy, reg); |
d7699f87 GFT |
111 | } |
112 | ||
cd0ff491 | 113 | static inline void |
3bf61c55 | 114 | jme_reset_phy_processor(struct jme_adapter *jme) |
d7699f87 | 115 | { |
cd0ff491 | 116 | u32 val; |
3bf61c55 GFT |
117 | |
118 | jme_mdio_write(jme->dev, | |
119 | jme->mii_if.phy_id, | |
8c198884 GFT |
120 | MII_ADVERTISE, ADVERTISE_ALL | |
121 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
3bf61c55 | 122 | |
cd0ff491 | 123 | if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
124 | jme_mdio_write(jme->dev, |
125 | jme->mii_if.phy_id, | |
126 | MII_CTRL1000, | |
127 | ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
3bf61c55 | 128 | |
fcf45b4c GFT |
129 | val = jme_mdio_read(jme->dev, |
130 | jme->mii_if.phy_id, | |
131 | MII_BMCR); | |
132 | ||
133 | jme_mdio_write(jme->dev, | |
134 | jme->mii_if.phy_id, | |
135 | MII_BMCR, val | BMCR_RESET); | |
3bf61c55 GFT |
136 | } |
137 | ||
b3821cc5 GFT |
138 | static void |
139 | jme_setup_wakeup_frame(struct jme_adapter *jme, | |
cd0ff491 | 140 | u32 *mask, u32 crc, int fnr) |
b3821cc5 GFT |
141 | { |
142 | int i; | |
143 | ||
144 | /* | |
145 | * Setup CRC pattern | |
146 | */ | |
147 | jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL)); | |
148 | wmb(); | |
149 | jwrite32(jme, JME_WFODP, crc); | |
150 | wmb(); | |
151 | ||
152 | /* | |
153 | * Setup Mask | |
154 | */ | |
cd0ff491 | 155 | for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { |
b3821cc5 GFT |
156 | jwrite32(jme, JME_WFOI, |
157 | ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) | | |
158 | (fnr & WFOI_FRAME_SEL)); | |
159 | wmb(); | |
160 | jwrite32(jme, JME_WFODP, mask[i]); | |
161 | wmb(); | |
162 | } | |
163 | } | |
3bf61c55 | 164 | |
cd0ff491 | 165 | static inline void |
3bf61c55 GFT |
166 | jme_reset_mac_processor(struct jme_adapter *jme) |
167 | { | |
cd0ff491 GFT |
168 | u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; |
169 | u32 crc = 0xCDCDCDCD; | |
170 | u32 gpreg0; | |
b3821cc5 GFT |
171 | int i; |
172 | ||
3bf61c55 | 173 | jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST); |
d7699f87 | 174 | udelay(2); |
3bf61c55 | 175 | jwrite32(jme, JME_GHC, jme->reg_ghc); |
cd0ff491 GFT |
176 | |
177 | jwrite32(jme, JME_RXDBA_LO, 0x00000000); | |
178 | jwrite32(jme, JME_RXDBA_HI, 0x00000000); | |
179 | jwrite32(jme, JME_RXQDC, 0x00000000); | |
180 | jwrite32(jme, JME_RXNDA, 0x00000000); | |
181 | jwrite32(jme, JME_TXDBA_LO, 0x00000000); | |
182 | jwrite32(jme, JME_TXDBA_HI, 0x00000000); | |
183 | jwrite32(jme, JME_TXQDC, 0x00000000); | |
184 | jwrite32(jme, JME_TXNDA, 0x00000000); | |
185 | ||
4330c2f2 GFT |
186 | jwrite32(jme, JME_RXMCHT_LO, 0x00000000); |
187 | jwrite32(jme, JME_RXMCHT_HI, 0x00000000); | |
cd0ff491 | 188 | for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i) |
b3821cc5 | 189 | jme_setup_wakeup_frame(jme, mask, crc, i); |
cd0ff491 | 190 | if (jme->fpgaver) |
cdcdc9eb GFT |
191 | gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL; |
192 | else | |
193 | gpreg0 = GPREG0_DEFAULT; | |
194 | jwrite32(jme, JME_GPREG0, gpreg0); | |
7ee473a3 | 195 | jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT); |
d7699f87 GFT |
196 | } |
197 | ||
cd0ff491 GFT |
198 | static inline void |
199 | jme_reset_ghc_speed(struct jme_adapter *jme) | |
200 | { | |
201 | jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX); | |
202 | jwrite32(jme, JME_GHC, jme->reg_ghc); | |
203 | } | |
204 | ||
205 | static inline void | |
3bf61c55 | 206 | jme_clear_pm(struct jme_adapter *jme) |
d7699f87 | 207 | { |
29bdd921 | 208 | jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs); |
4330c2f2 | 209 | pci_set_power_state(jme->pdev, PCI_D0); |
42b1055e | 210 | pci_enable_wake(jme->pdev, PCI_D0, false); |
d7699f87 GFT |
211 | } |
212 | ||
3bf61c55 GFT |
213 | static int |
214 | jme_reload_eeprom(struct jme_adapter *jme) | |
d7699f87 | 215 | { |
cd0ff491 | 216 | u32 val; |
d7699f87 GFT |
217 | int i; |
218 | ||
219 | val = jread32(jme, JME_SMBCSR); | |
220 | ||
cd0ff491 | 221 | if (val & SMBCSR_EEPROMD) { |
d7699f87 GFT |
222 | val |= SMBCSR_CNACK; |
223 | jwrite32(jme, JME_SMBCSR, val); | |
224 | val |= SMBCSR_RELOAD; | |
225 | jwrite32(jme, JME_SMBCSR, val); | |
226 | mdelay(12); | |
227 | ||
cd0ff491 | 228 | for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) { |
d7699f87 GFT |
229 | mdelay(1); |
230 | if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0) | |
231 | break; | |
232 | } | |
233 | ||
cd0ff491 | 234 | if (i == 0) { |
937ef75a | 235 | pr_err("eeprom reload timeout\n"); |
d7699f87 GFT |
236 | return -EIO; |
237 | } | |
238 | } | |
3bf61c55 | 239 | |
d7699f87 GFT |
240 | return 0; |
241 | } | |
242 | ||
3bf61c55 GFT |
243 | static void |
244 | jme_load_macaddr(struct net_device *netdev) | |
d7699f87 GFT |
245 | { |
246 | struct jme_adapter *jme = netdev_priv(netdev); | |
247 | unsigned char macaddr[6]; | |
cd0ff491 | 248 | u32 val; |
d7699f87 | 249 | |
cd0ff491 | 250 | spin_lock_bh(&jme->macaddr_lock); |
4330c2f2 | 251 | val = jread32(jme, JME_RXUMA_LO); |
d7699f87 GFT |
252 | macaddr[0] = (val >> 0) & 0xFF; |
253 | macaddr[1] = (val >> 8) & 0xFF; | |
254 | macaddr[2] = (val >> 16) & 0xFF; | |
255 | macaddr[3] = (val >> 24) & 0xFF; | |
4330c2f2 | 256 | val = jread32(jme, JME_RXUMA_HI); |
d7699f87 GFT |
257 | macaddr[4] = (val >> 0) & 0xFF; |
258 | macaddr[5] = (val >> 8) & 0xFF; | |
cd0ff491 GFT |
259 | memcpy(netdev->dev_addr, macaddr, 6); |
260 | spin_unlock_bh(&jme->macaddr_lock); | |
3bf61c55 GFT |
261 | } |
262 | ||
cd0ff491 | 263 | static inline void |
3bf61c55 GFT |
264 | jme_set_rx_pcc(struct jme_adapter *jme, int p) |
265 | { | |
cd0ff491 | 266 | switch (p) { |
192570e0 GFT |
267 | case PCC_OFF: |
268 | jwrite32(jme, JME_PCCRX0, | |
269 | ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
270 | ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
271 | break; | |
3bf61c55 GFT |
272 | case PCC_P1: |
273 | jwrite32(jme, JME_PCCRX0, | |
274 | ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
275 | ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
276 | break; | |
277 | case PCC_P2: | |
278 | jwrite32(jme, JME_PCCRX0, | |
279 | ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
280 | ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
281 | break; | |
282 | case PCC_P3: | |
283 | jwrite32(jme, JME_PCCRX0, | |
284 | ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
285 | ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
286 | break; | |
287 | default: | |
288 | break; | |
289 | } | |
192570e0 | 290 | wmb(); |
3bf61c55 | 291 | |
cd0ff491 | 292 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
7ca9ebee | 293 | netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p); |
d7699f87 GFT |
294 | } |
295 | ||
fcf45b4c | 296 | static void |
3bf61c55 | 297 | jme_start_irq(struct jme_adapter *jme) |
d7699f87 | 298 | { |
3bf61c55 GFT |
299 | register struct dynpcc_info *dpi = &(jme->dpi); |
300 | ||
301 | jme_set_rx_pcc(jme, PCC_P1); | |
3bf61c55 GFT |
302 | dpi->cur = PCC_P1; |
303 | dpi->attempt = PCC_P1; | |
304 | dpi->cnt = 0; | |
305 | ||
306 | jwrite32(jme, JME_PCCTX, | |
8c198884 GFT |
307 | ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) | |
308 | ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) | | |
3bf61c55 GFT |
309 | PCCTXQ0_EN |
310 | ); | |
311 | ||
d7699f87 GFT |
312 | /* |
313 | * Enable Interrupts | |
314 | */ | |
315 | jwrite32(jme, JME_IENS, INTR_ENABLE); | |
316 | } | |
317 | ||
cd0ff491 | 318 | static inline void |
3bf61c55 | 319 | jme_stop_irq(struct jme_adapter *jme) |
d7699f87 GFT |
320 | { |
321 | /* | |
322 | * Disable Interrupts | |
323 | */ | |
cd0ff491 | 324 | jwrite32f(jme, JME_IENC, INTR_ENABLE); |
d7699f87 GFT |
325 | } |
326 | ||
cd0ff491 | 327 | static u32 |
cdcdc9eb GFT |
328 | jme_linkstat_from_phy(struct jme_adapter *jme) |
329 | { | |
cd0ff491 | 330 | u32 phylink, bmsr; |
cdcdc9eb GFT |
331 | |
332 | phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17); | |
333 | bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR); | |
cd0ff491 | 334 | if (bmsr & BMSR_ANCOMP) |
cdcdc9eb GFT |
335 | phylink |= PHY_LINK_AUTONEG_COMPLETE; |
336 | ||
337 | return phylink; | |
338 | } | |
339 | ||
cd0ff491 | 340 | static inline void |
58c92f28 | 341 | jme_set_phyfifoa(struct jme_adapter *jme) |
cd0ff491 GFT |
342 | { |
343 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); | |
344 | } | |
345 | ||
346 | static inline void | |
58c92f28 | 347 | jme_set_phyfifob(struct jme_adapter *jme) |
cd0ff491 GFT |
348 | { |
349 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); | |
350 | } | |
351 | ||
fcf45b4c GFT |
352 | static int |
353 | jme_check_link(struct net_device *netdev, int testonly) | |
d7699f87 GFT |
354 | { |
355 | struct jme_adapter *jme = netdev_priv(netdev); | |
7ee473a3 | 356 | u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1; |
79ce639c | 357 | char linkmsg[64]; |
fcf45b4c | 358 | int rc = 0; |
d7699f87 | 359 | |
b3821cc5 | 360 | linkmsg[0] = '\0'; |
cdcdc9eb | 361 | |
cd0ff491 | 362 | if (jme->fpgaver) |
cdcdc9eb GFT |
363 | phylink = jme_linkstat_from_phy(jme); |
364 | else | |
365 | phylink = jread32(jme, JME_PHY_LINK); | |
d7699f87 | 366 | |
cd0ff491 GFT |
367 | if (phylink & PHY_LINK_UP) { |
368 | if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { | |
8c198884 GFT |
369 | /* |
370 | * If we did not enable AN | |
371 | * Speed/Duplex Info should be obtained from SMI | |
372 | */ | |
373 | phylink = PHY_LINK_UP; | |
374 | ||
375 | bmcr = jme_mdio_read(jme->dev, | |
376 | jme->mii_if.phy_id, | |
377 | MII_BMCR); | |
378 | ||
379 | phylink |= ((bmcr & BMCR_SPEED1000) && | |
380 | (bmcr & BMCR_SPEED100) == 0) ? | |
381 | PHY_LINK_SPEED_1000M : | |
382 | (bmcr & BMCR_SPEED100) ? | |
383 | PHY_LINK_SPEED_100M : | |
384 | PHY_LINK_SPEED_10M; | |
385 | ||
386 | phylink |= (bmcr & BMCR_FULLDPLX) ? | |
387 | PHY_LINK_DUPLEX : 0; | |
79ce639c | 388 | |
b3821cc5 | 389 | strcat(linkmsg, "Forced: "); |
cd0ff491 | 390 | } else { |
8c198884 GFT |
391 | /* |
392 | * Keep polling for speed/duplex resolve complete | |
393 | */ | |
cd0ff491 | 394 | while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && |
8c198884 GFT |
395 | --cnt) { |
396 | ||
397 | udelay(1); | |
8c198884 | 398 | |
cd0ff491 | 399 | if (jme->fpgaver) |
cdcdc9eb GFT |
400 | phylink = jme_linkstat_from_phy(jme); |
401 | else | |
402 | phylink = jread32(jme, JME_PHY_LINK); | |
8c198884 | 403 | } |
cd0ff491 | 404 | if (!cnt) |
937ef75a | 405 | pr_err("Waiting speed resolve timeout\n"); |
79ce639c | 406 | |
b3821cc5 | 407 | strcat(linkmsg, "ANed: "); |
d7699f87 GFT |
408 | } |
409 | ||
cd0ff491 | 410 | if (jme->phylink == phylink) { |
fcf45b4c GFT |
411 | rc = 1; |
412 | goto out; | |
413 | } | |
cd0ff491 | 414 | if (testonly) |
fcf45b4c GFT |
415 | goto out; |
416 | ||
417 | jme->phylink = phylink; | |
418 | ||
3b70a6fa GFT |
419 | ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX | |
420 | GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE | | |
421 | GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY); | |
cd0ff491 GFT |
422 | switch (phylink & PHY_LINK_SPEED_MASK) { |
423 | case PHY_LINK_SPEED_10M: | |
3b70a6fa GFT |
424 | ghc |= GHC_SPEED_10M | |
425 | GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; | |
cd0ff491 | 426 | strcat(linkmsg, "10 Mbps, "); |
cd0ff491 GFT |
427 | break; |
428 | case PHY_LINK_SPEED_100M: | |
3b70a6fa GFT |
429 | ghc |= GHC_SPEED_100M | |
430 | GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; | |
cd0ff491 | 431 | strcat(linkmsg, "100 Mbps, "); |
cd0ff491 GFT |
432 | break; |
433 | case PHY_LINK_SPEED_1000M: | |
3b70a6fa GFT |
434 | ghc |= GHC_SPEED_1000M | |
435 | GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY; | |
cd0ff491 | 436 | strcat(linkmsg, "1000 Mbps, "); |
cd0ff491 GFT |
437 | break; |
438 | default: | |
439 | break; | |
d7699f87 | 440 | } |
d7699f87 | 441 | |
cd0ff491 | 442 | if (phylink & PHY_LINK_DUPLEX) { |
d7699f87 | 443 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); |
7ee473a3 | 444 | ghc |= GHC_DPX; |
cd0ff491 | 445 | } else { |
d7699f87 | 446 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | |
3bf61c55 GFT |
447 | TXMCS_BACKOFF | |
448 | TXMCS_CARRIERSENSE | | |
449 | TXMCS_COLLISION); | |
8c198884 GFT |
450 | jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN | |
451 | ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) | | |
452 | TXTRHD_TXREN | | |
453 | ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL)); | |
454 | } | |
7ee473a3 GFT |
455 | |
456 | gpreg1 = GPREG1_DEFAULT; | |
457 | if (is_buggy250(jme->pdev->device, jme->chiprev)) { | |
458 | if (!(phylink & PHY_LINK_DUPLEX)) | |
459 | gpreg1 |= GPREG1_HALFMODEPATCH; | |
460 | switch (phylink & PHY_LINK_SPEED_MASK) { | |
461 | case PHY_LINK_SPEED_10M: | |
462 | jme_set_phyfifoa(jme); | |
463 | gpreg1 |= GPREG1_RSSPATCH; | |
464 | break; | |
465 | case PHY_LINK_SPEED_100M: | |
466 | jme_set_phyfifob(jme); | |
467 | gpreg1 |= GPREG1_RSSPATCH; | |
468 | break; | |
469 | case PHY_LINK_SPEED_1000M: | |
470 | jme_set_phyfifoa(jme); | |
471 | break; | |
472 | default: | |
473 | break; | |
474 | } | |
475 | } | |
d7699f87 | 476 | |
3b70a6fa | 477 | jwrite32(jme, JME_GPREG1, gpreg1); |
fcf45b4c | 478 | jwrite32(jme, JME_GHC, ghc); |
3b70a6fa | 479 | jme->reg_ghc = ghc; |
fcf45b4c | 480 | |
3b70a6fa GFT |
481 | strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? |
482 | "Full-Duplex, " : | |
483 | "Half-Duplex, "); | |
484 | strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ? | |
485 | "MDI-X" : | |
486 | "MDI"); | |
937ef75a | 487 | netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg); |
cd0ff491 GFT |
488 | netif_carrier_on(netdev); |
489 | } else { | |
490 | if (testonly) | |
fcf45b4c GFT |
491 | goto out; |
492 | ||
937ef75a | 493 | netif_info(jme, link, jme->dev, "Link is down\n"); |
fcf45b4c | 494 | jme->phylink = 0; |
cd0ff491 | 495 | netif_carrier_off(netdev); |
d7699f87 | 496 | } |
fcf45b4c GFT |
497 | |
498 | out: | |
499 | return rc; | |
d7699f87 GFT |
500 | } |
501 | ||
3bf61c55 GFT |
502 | static int |
503 | jme_setup_tx_resources(struct jme_adapter *jme) | |
d7699f87 | 504 | { |
d7699f87 GFT |
505 | struct jme_ring *txring = &(jme->txring[0]); |
506 | ||
507 | txring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
508 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
509 | &(txring->dmaalloc), | |
510 | GFP_ATOMIC); | |
fcf45b4c | 511 | |
0ede469c GFT |
512 | if (!txring->alloc) |
513 | goto err_set_null; | |
d7699f87 GFT |
514 | |
515 | /* | |
516 | * 16 Bytes align | |
517 | */ | |
cd0ff491 | 518 | txring->desc = (void *)ALIGN((unsigned long)(txring->alloc), |
3bf61c55 | 519 | RING_DESC_ALIGN); |
4330c2f2 | 520 | txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 521 | txring->next_to_use = 0; |
cdcdc9eb | 522 | atomic_set(&txring->next_to_clean, 0); |
b3821cc5 | 523 | atomic_set(&txring->nr_free, jme->tx_ring_size); |
d7699f87 | 524 | |
0ede469c GFT |
525 | txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
526 | jme->tx_ring_size, GFP_ATOMIC); | |
527 | if (unlikely(!(txring->bufinf))) | |
528 | goto err_free_txring; | |
529 | ||
d7699f87 | 530 | /* |
b3821cc5 | 531 | * Initialize Transmit Descriptors |
d7699f87 | 532 | */ |
b3821cc5 | 533 | memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size)); |
3bf61c55 | 534 | memset(txring->bufinf, 0, |
b3821cc5 | 535 | sizeof(struct jme_buffer_info) * jme->tx_ring_size); |
d7699f87 GFT |
536 | |
537 | return 0; | |
0ede469c GFT |
538 | |
539 | err_free_txring: | |
540 | dma_free_coherent(&(jme->pdev->dev), | |
541 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), | |
542 | txring->alloc, | |
543 | txring->dmaalloc); | |
544 | ||
545 | err_set_null: | |
546 | txring->desc = NULL; | |
547 | txring->dmaalloc = 0; | |
548 | txring->dma = 0; | |
549 | txring->bufinf = NULL; | |
550 | ||
551 | return -ENOMEM; | |
d7699f87 GFT |
552 | } |
553 | ||
3bf61c55 GFT |
554 | static void |
555 | jme_free_tx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
556 | { |
557 | int i; | |
558 | struct jme_ring *txring = &(jme->txring[0]); | |
0ede469c | 559 | struct jme_buffer_info *txbi; |
d7699f87 | 560 | |
cd0ff491 | 561 | if (txring->alloc) { |
0ede469c GFT |
562 | if (txring->bufinf) { |
563 | for (i = 0 ; i < jme->tx_ring_size ; ++i) { | |
564 | txbi = txring->bufinf + i; | |
565 | if (txbi->skb) { | |
566 | dev_kfree_skb(txbi->skb); | |
567 | txbi->skb = NULL; | |
568 | } | |
569 | txbi->mapping = 0; | |
570 | txbi->len = 0; | |
571 | txbi->nr_desc = 0; | |
572 | txbi->start_xmit = 0; | |
d7699f87 | 573 | } |
0ede469c | 574 | kfree(txring->bufinf); |
d7699f87 GFT |
575 | } |
576 | ||
577 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 578 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
d7699f87 GFT |
579 | txring->alloc, |
580 | txring->dmaalloc); | |
3bf61c55 GFT |
581 | |
582 | txring->alloc = NULL; | |
583 | txring->desc = NULL; | |
584 | txring->dmaalloc = 0; | |
585 | txring->dma = 0; | |
0ede469c | 586 | txring->bufinf = NULL; |
d7699f87 | 587 | } |
3bf61c55 | 588 | txring->next_to_use = 0; |
cdcdc9eb | 589 | atomic_set(&txring->next_to_clean, 0); |
79ce639c | 590 | atomic_set(&txring->nr_free, 0); |
d7699f87 GFT |
591 | } |
592 | ||
cd0ff491 | 593 | static inline void |
3bf61c55 | 594 | jme_enable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
595 | { |
596 | /* | |
597 | * Select Queue 0 | |
598 | */ | |
599 | jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0); | |
cd0ff491 | 600 | wmb(); |
d7699f87 GFT |
601 | |
602 | /* | |
603 | * Setup TX Queue 0 DMA Bass Address | |
604 | */ | |
fcf45b4c | 605 | jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
3bf61c55 | 606 | jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32); |
fcf45b4c | 607 | jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
d7699f87 GFT |
608 | |
609 | /* | |
610 | * Setup TX Descptor Count | |
611 | */ | |
b3821cc5 | 612 | jwrite32(jme, JME_TXQDC, jme->tx_ring_size); |
d7699f87 GFT |
613 | |
614 | /* | |
615 | * Enable TX Engine | |
616 | */ | |
617 | wmb(); | |
4330c2f2 GFT |
618 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
619 | TXCS_SELECT_QUEUE0 | | |
620 | TXCS_ENABLE); | |
d7699f87 GFT |
621 | |
622 | } | |
623 | ||
cd0ff491 | 624 | static inline void |
29bdd921 GFT |
625 | jme_restart_tx_engine(struct jme_adapter *jme) |
626 | { | |
627 | /* | |
628 | * Restart TX Engine | |
629 | */ | |
630 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | |
631 | TXCS_SELECT_QUEUE0 | | |
632 | TXCS_ENABLE); | |
633 | } | |
634 | ||
cd0ff491 | 635 | static inline void |
3bf61c55 | 636 | jme_disable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
637 | { |
638 | int i; | |
cd0ff491 | 639 | u32 val; |
d7699f87 GFT |
640 | |
641 | /* | |
642 | * Disable TX Engine | |
643 | */ | |
fcf45b4c | 644 | jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0); |
cd0ff491 | 645 | wmb(); |
d7699f87 GFT |
646 | |
647 | val = jread32(jme, JME_TXCS); | |
cd0ff491 | 648 | for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) { |
fcf45b4c | 649 | mdelay(1); |
d7699f87 | 650 | val = jread32(jme, JME_TXCS); |
cd0ff491 | 651 | rmb(); |
d7699f87 GFT |
652 | } |
653 | ||
cd0ff491 | 654 | if (!i) |
937ef75a | 655 | pr_err("Disable TX engine timeout\n"); |
d7699f87 GFT |
656 | } |
657 | ||
3bf61c55 GFT |
658 | static void |
659 | jme_set_clean_rxdesc(struct jme_adapter *jme, int i) | |
d7699f87 | 660 | { |
0ede469c | 661 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 662 | register struct rxdesc *rxdesc = rxring->desc; |
4330c2f2 GFT |
663 | struct jme_buffer_info *rxbi = rxring->bufinf; |
664 | rxdesc += i; | |
665 | rxbi += i; | |
666 | ||
667 | rxdesc->dw[0] = 0; | |
668 | rxdesc->dw[1] = 0; | |
3bf61c55 | 669 | rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32); |
fcf45b4c GFT |
670 | rxdesc->desc1.bufaddrl = cpu_to_le32( |
671 | (__u64)rxbi->mapping & 0xFFFFFFFFUL); | |
3bf61c55 | 672 | rxdesc->desc1.datalen = cpu_to_le16(rxbi->len); |
cd0ff491 | 673 | if (jme->dev->features & NETIF_F_HIGHDMA) |
3bf61c55 | 674 | rxdesc->desc1.flags = RXFLAG_64BIT; |
d7699f87 | 675 | wmb(); |
3bf61c55 | 676 | rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT; |
d7699f87 GFT |
677 | } |
678 | ||
3bf61c55 GFT |
679 | static int |
680 | jme_make_new_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
681 | { |
682 | struct jme_ring *rxring = &(jme->rxring[0]); | |
b3821cc5 | 683 | struct jme_buffer_info *rxbi = rxring->bufinf + i; |
cd0ff491 | 684 | struct sk_buff *skb; |
4330c2f2 | 685 | |
79ce639c GFT |
686 | skb = netdev_alloc_skb(jme->dev, |
687 | jme->dev->mtu + RX_EXTRA_LEN); | |
cd0ff491 | 688 | if (unlikely(!skb)) |
4330c2f2 | 689 | return -ENOMEM; |
3b70a6fa GFT |
690 | #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) |
691 | skb->dev = jme->dev; | |
692 | #endif | |
3bf61c55 | 693 | |
4330c2f2 | 694 | rxbi->skb = skb; |
3bf61c55 | 695 | rxbi->len = skb_tailroom(skb); |
b3821cc5 GFT |
696 | rxbi->mapping = pci_map_page(jme->pdev, |
697 | virt_to_page(skb->data), | |
698 | offset_in_page(skb->data), | |
699 | rxbi->len, | |
700 | PCI_DMA_FROMDEVICE); | |
4330c2f2 GFT |
701 | |
702 | return 0; | |
703 | } | |
704 | ||
3bf61c55 GFT |
705 | static void |
706 | jme_free_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
707 | { |
708 | struct jme_ring *rxring = &(jme->rxring[0]); | |
709 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
710 | rxbi += i; | |
711 | ||
cd0ff491 | 712 | if (rxbi->skb) { |
b3821cc5 | 713 | pci_unmap_page(jme->pdev, |
4330c2f2 | 714 | rxbi->mapping, |
3bf61c55 | 715 | rxbi->len, |
4330c2f2 GFT |
716 | PCI_DMA_FROMDEVICE); |
717 | dev_kfree_skb(rxbi->skb); | |
718 | rxbi->skb = NULL; | |
719 | rxbi->mapping = 0; | |
3bf61c55 | 720 | rxbi->len = 0; |
4330c2f2 GFT |
721 | } |
722 | } | |
723 | ||
3bf61c55 GFT |
724 | static void |
725 | jme_free_rx_resources(struct jme_adapter *jme) | |
726 | { | |
727 | int i; | |
728 | struct jme_ring *rxring = &(jme->rxring[0]); | |
729 | ||
cd0ff491 | 730 | if (rxring->alloc) { |
0ede469c GFT |
731 | if (rxring->bufinf) { |
732 | for (i = 0 ; i < jme->rx_ring_size ; ++i) | |
733 | jme_free_rx_buf(jme, i); | |
734 | kfree(rxring->bufinf); | |
735 | } | |
3bf61c55 GFT |
736 | |
737 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 738 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
3bf61c55 GFT |
739 | rxring->alloc, |
740 | rxring->dmaalloc); | |
741 | rxring->alloc = NULL; | |
742 | rxring->desc = NULL; | |
743 | rxring->dmaalloc = 0; | |
744 | rxring->dma = 0; | |
0ede469c | 745 | rxring->bufinf = NULL; |
3bf61c55 GFT |
746 | } |
747 | rxring->next_to_use = 0; | |
cdcdc9eb | 748 | atomic_set(&rxring->next_to_clean, 0); |
3bf61c55 GFT |
749 | } |
750 | ||
751 | static int | |
752 | jme_setup_rx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
753 | { |
754 | int i; | |
755 | struct jme_ring *rxring = &(jme->rxring[0]); | |
756 | ||
757 | rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
758 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
759 | &(rxring->dmaalloc), | |
760 | GFP_ATOMIC); | |
0ede469c GFT |
761 | if (!rxring->alloc) |
762 | goto err_set_null; | |
d7699f87 GFT |
763 | |
764 | /* | |
765 | * 16 Bytes align | |
766 | */ | |
cd0ff491 | 767 | rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc), |
3bf61c55 | 768 | RING_DESC_ALIGN); |
4330c2f2 | 769 | rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 770 | rxring->next_to_use = 0; |
cdcdc9eb | 771 | atomic_set(&rxring->next_to_clean, 0); |
d7699f87 | 772 | |
0ede469c GFT |
773 | rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
774 | jme->rx_ring_size, GFP_ATOMIC); | |
775 | if (unlikely(!(rxring->bufinf))) | |
776 | goto err_free_rxring; | |
777 | ||
d7699f87 GFT |
778 | /* |
779 | * Initiallize Receive Descriptors | |
780 | */ | |
0ede469c GFT |
781 | memset(rxring->bufinf, 0, |
782 | sizeof(struct jme_buffer_info) * jme->rx_ring_size); | |
cd0ff491 GFT |
783 | for (i = 0 ; i < jme->rx_ring_size ; ++i) { |
784 | if (unlikely(jme_make_new_rx_buf(jme, i))) { | |
3bf61c55 GFT |
785 | jme_free_rx_resources(jme); |
786 | return -ENOMEM; | |
787 | } | |
d7699f87 GFT |
788 | |
789 | jme_set_clean_rxdesc(jme, i); | |
790 | } | |
791 | ||
d7699f87 | 792 | return 0; |
0ede469c GFT |
793 | |
794 | err_free_rxring: | |
795 | dma_free_coherent(&(jme->pdev->dev), | |
796 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), | |
797 | rxring->alloc, | |
798 | rxring->dmaalloc); | |
799 | err_set_null: | |
800 | rxring->desc = NULL; | |
801 | rxring->dmaalloc = 0; | |
802 | rxring->dma = 0; | |
803 | rxring->bufinf = NULL; | |
804 | ||
805 | return -ENOMEM; | |
d7699f87 GFT |
806 | } |
807 | ||
cd0ff491 | 808 | static inline void |
3bf61c55 | 809 | jme_enable_rx_engine(struct jme_adapter *jme) |
d7699f87 | 810 | { |
cd0ff491 GFT |
811 | /* |
812 | * Select Queue 0 | |
813 | */ | |
814 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | | |
815 | RXCS_QUEUESEL_Q0); | |
816 | wmb(); | |
817 | ||
d7699f87 GFT |
818 | /* |
819 | * Setup RX DMA Bass Address | |
820 | */ | |
0ede469c | 821 | jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
3bf61c55 | 822 | jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32); |
0ede469c | 823 | jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
d7699f87 GFT |
824 | |
825 | /* | |
b3821cc5 | 826 | * Setup RX Descriptor Count |
d7699f87 | 827 | */ |
b3821cc5 | 828 | jwrite32(jme, JME_RXQDC, jme->rx_ring_size); |
d7699f87 | 829 | |
3bf61c55 | 830 | /* |
d7699f87 GFT |
831 | * Setup Unicast Filter |
832 | */ | |
833 | jme_set_multi(jme->dev); | |
834 | ||
835 | /* | |
836 | * Enable RX Engine | |
837 | */ | |
838 | wmb(); | |
79ce639c | 839 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
840 | RXCS_QUEUESEL_Q0 | |
841 | RXCS_ENABLE | | |
842 | RXCS_QST); | |
d7699f87 GFT |
843 | } |
844 | ||
cd0ff491 | 845 | static inline void |
3bf61c55 | 846 | jme_restart_rx_engine(struct jme_adapter *jme) |
4330c2f2 GFT |
847 | { |
848 | /* | |
3bf61c55 | 849 | * Start RX Engine |
4330c2f2 | 850 | */ |
79ce639c | 851 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
852 | RXCS_QUEUESEL_Q0 | |
853 | RXCS_ENABLE | | |
854 | RXCS_QST); | |
855 | } | |
856 | ||
cd0ff491 | 857 | static inline void |
3bf61c55 | 858 | jme_disable_rx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
859 | { |
860 | int i; | |
cd0ff491 | 861 | u32 val; |
d7699f87 GFT |
862 | |
863 | /* | |
864 | * Disable RX Engine | |
865 | */ | |
29bdd921 | 866 | jwrite32(jme, JME_RXCS, jme->reg_rxcs); |
cd0ff491 | 867 | wmb(); |
d7699f87 GFT |
868 | |
869 | val = jread32(jme, JME_RXCS); | |
cd0ff491 | 870 | for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) { |
29bdd921 | 871 | mdelay(1); |
d7699f87 | 872 | val = jread32(jme, JME_RXCS); |
cd0ff491 | 873 | rmb(); |
d7699f87 GFT |
874 | } |
875 | ||
cd0ff491 | 876 | if (!i) |
937ef75a | 877 | pr_err("Disable RX engine timeout\n"); |
d7699f87 GFT |
878 | |
879 | } | |
880 | ||
192570e0 | 881 | static int |
cd0ff491 | 882 | jme_rxsum_ok(struct jme_adapter *jme, u16 flags) |
192570e0 | 883 | { |
cd0ff491 | 884 | if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) |
192570e0 GFT |
885 | return false; |
886 | ||
0ede469c GFT |
887 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS)) |
888 | == RXWBFLAG_TCPON)) { | |
889 | if (flags & RXWBFLAG_IPV4) | |
7ca9ebee | 890 | netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n"); |
0ede469c | 891 | return false; |
192570e0 GFT |
892 | } |
893 | ||
0ede469c GFT |
894 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS)) |
895 | == RXWBFLAG_UDPON)) { | |
896 | if (flags & RXWBFLAG_IPV4) | |
937ef75a | 897 | netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n"); |
0ede469c | 898 | return false; |
192570e0 GFT |
899 | } |
900 | ||
0ede469c GFT |
901 | if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS)) |
902 | == RXWBFLAG_IPV4)) { | |
937ef75a | 903 | netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n"); |
0ede469c | 904 | return false; |
192570e0 GFT |
905 | } |
906 | ||
907 | return true; | |
908 | } | |
909 | ||
3bf61c55 | 910 | static void |
42b1055e | 911 | jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) |
d7699f87 | 912 | { |
d7699f87 | 913 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 914 | struct rxdesc *rxdesc = rxring->desc; |
3bf61c55 | 915 | struct jme_buffer_info *rxbi = rxring->bufinf; |
d7699f87 | 916 | struct sk_buff *skb; |
3bf61c55 | 917 | int framesize; |
d7699f87 | 918 | |
3bf61c55 GFT |
919 | rxdesc += idx; |
920 | rxbi += idx; | |
d7699f87 | 921 | |
3bf61c55 GFT |
922 | skb = rxbi->skb; |
923 | pci_dma_sync_single_for_cpu(jme->pdev, | |
924 | rxbi->mapping, | |
925 | rxbi->len, | |
926 | PCI_DMA_FROMDEVICE); | |
927 | ||
cd0ff491 | 928 | if (unlikely(jme_make_new_rx_buf(jme, idx))) { |
3bf61c55 GFT |
929 | pci_dma_sync_single_for_device(jme->pdev, |
930 | rxbi->mapping, | |
931 | rxbi->len, | |
932 | PCI_DMA_FROMDEVICE); | |
933 | ||
934 | ++(NET_STAT(jme).rx_dropped); | |
cd0ff491 | 935 | } else { |
3bf61c55 GFT |
936 | framesize = le16_to_cpu(rxdesc->descwb.framesize) |
937 | - RX_PREPAD_SIZE; | |
938 | ||
939 | skb_reserve(skb, RX_PREPAD_SIZE); | |
940 | skb_put(skb, framesize); | |
941 | skb->protocol = eth_type_trans(skb, jme->dev); | |
942 | ||
3b70a6fa | 943 | if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags))) |
8c198884 | 944 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
29bdd921 | 945 | else |
08f5fcfa | 946 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35) |
29bdd921 | 947 | skb->ip_summed = CHECKSUM_NONE; |
08f5fcfa ED |
948 | #else |
949 | skb_checksum_none_assert(skb); | |
950 | #endif | |
8c198884 | 951 | |
3b70a6fa | 952 | if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) { |
cd0ff491 | 953 | if (jme->vlgrp) { |
cdcdc9eb | 954 | jme->jme_vlan_rx(skb, jme->vlgrp, |
3b70a6fa | 955 | le16_to_cpu(rxdesc->descwb.vlan)); |
b3821cc5 | 956 | NET_STAT(jme).rx_bytes += 4; |
7ca9ebee | 957 | } else { |
7ca9ebee | 958 | dev_kfree_skb(skb); |
b3821cc5 | 959 | } |
cd0ff491 | 960 | } else { |
cdcdc9eb | 961 | jme->jme_rx(skb); |
b3821cc5 | 962 | } |
3bf61c55 | 963 | |
3b70a6fa GFT |
964 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) == |
965 | cpu_to_le16(RXWBFLAG_DEST_MUL)) | |
3bf61c55 GFT |
966 | ++(NET_STAT(jme).multicast); |
967 | ||
3bf61c55 GFT |
968 | NET_STAT(jme).rx_bytes += framesize; |
969 | ++(NET_STAT(jme).rx_packets); | |
970 | } | |
971 | ||
972 | jme_set_clean_rxdesc(jme, idx); | |
973 | ||
974 | } | |
975 | ||
976 | static int | |
977 | jme_process_receive(struct jme_adapter *jme, int limit) | |
978 | { | |
979 | struct jme_ring *rxring = &(jme->rxring[0]); | |
cd0ff491 | 980 | struct rxdesc *rxdesc = rxring->desc; |
b3821cc5 | 981 | int i, j, ccnt, desccnt, mask = jme->rx_ring_mask; |
3bf61c55 | 982 | |
cd0ff491 | 983 | if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) |
192570e0 GFT |
984 | goto out_inc; |
985 | ||
cd0ff491 | 986 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
192570e0 GFT |
987 | goto out_inc; |
988 | ||
cd0ff491 | 989 | if (unlikely(!netif_carrier_ok(jme->dev))) |
192570e0 GFT |
990 | goto out_inc; |
991 | ||
cdcdc9eb | 992 | i = atomic_read(&rxring->next_to_clean); |
0ede469c | 993 | while (limit > 0) { |
3bf61c55 GFT |
994 | rxdesc = rxring->desc; |
995 | rxdesc += i; | |
996 | ||
3b70a6fa | 997 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) || |
3bf61c55 GFT |
998 | !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL)) |
999 | goto out; | |
0ede469c | 1000 | --limit; |
d7699f87 | 1001 | |
4330c2f2 GFT |
1002 | desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; |
1003 | ||
cd0ff491 | 1004 | if (unlikely(desccnt > 1 || |
192570e0 | 1005 | rxdesc->descwb.errstat & RXWBERR_ALLERR)) { |
d7699f87 | 1006 | |
cd0ff491 | 1007 | if (rxdesc->descwb.errstat & RXWBERR_CRCERR) |
3bf61c55 | 1008 | ++(NET_STAT(jme).rx_crc_errors); |
cd0ff491 | 1009 | else if (rxdesc->descwb.errstat & RXWBERR_OVERUN) |
3bf61c55 GFT |
1010 | ++(NET_STAT(jme).rx_fifo_errors); |
1011 | else | |
1012 | ++(NET_STAT(jme).rx_errors); | |
4330c2f2 | 1013 | |
cd0ff491 | 1014 | if (desccnt > 1) |
3bf61c55 | 1015 | limit -= desccnt - 1; |
4330c2f2 | 1016 | |
cd0ff491 | 1017 | for (j = i, ccnt = desccnt ; ccnt-- ; ) { |
4330c2f2 | 1018 | jme_set_clean_rxdesc(jme, j); |
b3821cc5 | 1019 | j = (j + 1) & (mask); |
4330c2f2 | 1020 | } |
3bf61c55 | 1021 | |
cd0ff491 | 1022 | } else { |
42b1055e | 1023 | jme_alloc_and_feed_skb(jme, i); |
3bf61c55 | 1024 | } |
4330c2f2 | 1025 | |
b3821cc5 | 1026 | i = (i + desccnt) & (mask); |
3bf61c55 | 1027 | } |
4330c2f2 | 1028 | |
3bf61c55 | 1029 | out: |
cdcdc9eb | 1030 | atomic_set(&rxring->next_to_clean, i); |
4330c2f2 | 1031 | |
192570e0 GFT |
1032 | out_inc: |
1033 | atomic_inc(&jme->rx_cleaning); | |
1034 | ||
3bf61c55 | 1035 | return limit > 0 ? limit : 0; |
4330c2f2 | 1036 | |
3bf61c55 | 1037 | } |
d7699f87 | 1038 | |
79ce639c GFT |
1039 | static void |
1040 | jme_attempt_pcc(struct dynpcc_info *dpi, int atmp) | |
1041 | { | |
cd0ff491 | 1042 | if (likely(atmp == dpi->cur)) { |
192570e0 | 1043 | dpi->cnt = 0; |
79ce639c | 1044 | return; |
192570e0 | 1045 | } |
79ce639c | 1046 | |
cd0ff491 | 1047 | if (dpi->attempt == atmp) { |
79ce639c | 1048 | ++(dpi->cnt); |
cd0ff491 | 1049 | } else { |
79ce639c GFT |
1050 | dpi->attempt = atmp; |
1051 | dpi->cnt = 0; | |
1052 | } | |
1053 | ||
1054 | } | |
1055 | ||
1056 | static void | |
1057 | jme_dynamic_pcc(struct jme_adapter *jme) | |
1058 | { | |
1059 | register struct dynpcc_info *dpi = &(jme->dpi); | |
1060 | ||
cd0ff491 | 1061 | if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) |
79ce639c | 1062 | jme_attempt_pcc(dpi, PCC_P3); |
7ca9ebee GFT |
1063 | else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD || |
1064 | dpi->intr_cnt > PCC_INTR_THRESHOLD) | |
79ce639c GFT |
1065 | jme_attempt_pcc(dpi, PCC_P2); |
1066 | else | |
1067 | jme_attempt_pcc(dpi, PCC_P1); | |
1068 | ||
cd0ff491 GFT |
1069 | if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { |
1070 | if (dpi->attempt < dpi->cur) | |
1071 | tasklet_schedule(&jme->rxclean_task); | |
79ce639c GFT |
1072 | jme_set_rx_pcc(jme, dpi->attempt); |
1073 | dpi->cur = dpi->attempt; | |
1074 | dpi->cnt = 0; | |
1075 | } | |
1076 | } | |
1077 | ||
1078 | static void | |
1079 | jme_start_pcc_timer(struct jme_adapter *jme) | |
1080 | { | |
1081 | struct dynpcc_info *dpi = &(jme->dpi); | |
1082 | dpi->last_bytes = NET_STAT(jme).rx_bytes; | |
1083 | dpi->last_pkts = NET_STAT(jme).rx_packets; | |
1084 | dpi->intr_cnt = 0; | |
1085 | jwrite32(jme, JME_TMCSR, | |
1086 | TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT)); | |
1087 | } | |
1088 | ||
cd0ff491 | 1089 | static inline void |
29bdd921 GFT |
1090 | jme_stop_pcc_timer(struct jme_adapter *jme) |
1091 | { | |
1092 | jwrite32(jme, JME_TMCSR, 0); | |
1093 | } | |
1094 | ||
cd0ff491 GFT |
1095 | static void |
1096 | jme_shutdown_nic(struct jme_adapter *jme) | |
1097 | { | |
1098 | u32 phylink; | |
1099 | ||
1100 | phylink = jme_linkstat_from_phy(jme); | |
1101 | ||
1102 | if (!(phylink & PHY_LINK_UP)) { | |
1103 | /* | |
1104 | * Disable all interrupt before issue timer | |
1105 | */ | |
1106 | jme_stop_irq(jme); | |
1107 | jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE); | |
1108 | } | |
1109 | } | |
1110 | ||
79ce639c GFT |
1111 | static void |
1112 | jme_pcc_tasklet(unsigned long arg) | |
1113 | { | |
cd0ff491 | 1114 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c GFT |
1115 | struct net_device *netdev = jme->dev; |
1116 | ||
cd0ff491 GFT |
1117 | if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) { |
1118 | jme_shutdown_nic(jme); | |
1119 | return; | |
1120 | } | |
29bdd921 | 1121 | |
cd0ff491 | 1122 | if (unlikely(!netif_carrier_ok(netdev) || |
29bdd921 GFT |
1123 | (atomic_read(&jme->link_changing) != 1) |
1124 | )) { | |
1125 | jme_stop_pcc_timer(jme); | |
79ce639c GFT |
1126 | return; |
1127 | } | |
29bdd921 | 1128 | |
cd0ff491 | 1129 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
192570e0 GFT |
1130 | jme_dynamic_pcc(jme); |
1131 | ||
79ce639c GFT |
1132 | jme_start_pcc_timer(jme); |
1133 | } | |
1134 | ||
cd0ff491 | 1135 | static inline void |
192570e0 GFT |
1136 | jme_polling_mode(struct jme_adapter *jme) |
1137 | { | |
1138 | jme_set_rx_pcc(jme, PCC_OFF); | |
1139 | } | |
1140 | ||
cd0ff491 | 1141 | static inline void |
192570e0 GFT |
1142 | jme_interrupt_mode(struct jme_adapter *jme) |
1143 | { | |
1144 | jme_set_rx_pcc(jme, PCC_P1); | |
1145 | } | |
1146 | ||
cd0ff491 GFT |
1147 | static inline int |
1148 | jme_pseudo_hotplug_enabled(struct jme_adapter *jme) | |
1149 | { | |
1150 | u32 apmc; | |
1151 | apmc = jread32(jme, JME_APMC); | |
1152 | return apmc & JME_APMC_PSEUDO_HP_EN; | |
1153 | } | |
1154 | ||
1155 | static void | |
1156 | jme_start_shutdown_timer(struct jme_adapter *jme) | |
1157 | { | |
1158 | u32 apmc; | |
1159 | ||
1160 | apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN; | |
1161 | apmc &= ~JME_APMC_EPIEN_CTRL; | |
1162 | if (!no_extplug) { | |
1163 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN); | |
1164 | wmb(); | |
1165 | } | |
1166 | jwrite32f(jme, JME_APMC, apmc); | |
1167 | ||
1168 | jwrite32f(jme, JME_TIMER2, 0); | |
1169 | set_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1170 | jwrite32(jme, JME_TMCSR, | |
1171 | TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT)); | |
1172 | } | |
1173 | ||
1174 | static void | |
1175 | jme_stop_shutdown_timer(struct jme_adapter *jme) | |
1176 | { | |
1177 | u32 apmc; | |
1178 | ||
1179 | jwrite32f(jme, JME_TMCSR, 0); | |
1180 | jwrite32f(jme, JME_TIMER2, 0); | |
1181 | clear_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1182 | ||
1183 | apmc = jread32(jme, JME_APMC); | |
1184 | apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL); | |
1185 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS); | |
1186 | wmb(); | |
1187 | jwrite32f(jme, JME_APMC, apmc); | |
1188 | } | |
1189 | ||
3bf61c55 GFT |
1190 | static void |
1191 | jme_link_change_tasklet(unsigned long arg) | |
1192 | { | |
cd0ff491 | 1193 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1194 | struct net_device *netdev = jme->dev; |
fcf45b4c GFT |
1195 | int rc; |
1196 | ||
cd0ff491 GFT |
1197 | while (!atomic_dec_and_test(&jme->link_changing)) { |
1198 | atomic_inc(&jme->link_changing); | |
937ef75a | 1199 | netif_info(jme, intr, jme->dev, "Get link change lock failed\n"); |
58c92f28 | 1200 | while (atomic_read(&jme->link_changing) != 1) |
937ef75a | 1201 | netif_info(jme, intr, jme->dev, "Waiting link change lock\n"); |
cd0ff491 | 1202 | } |
fcf45b4c | 1203 | |
cd0ff491 | 1204 | if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) |
fcf45b4c GFT |
1205 | goto out; |
1206 | ||
29bdd921 | 1207 | jme->old_mtu = netdev->mtu; |
fcf45b4c | 1208 | netif_stop_queue(netdev); |
cd0ff491 GFT |
1209 | if (jme_pseudo_hotplug_enabled(jme)) |
1210 | jme_stop_shutdown_timer(jme); | |
1211 | ||
1212 | jme_stop_pcc_timer(jme); | |
1213 | tasklet_disable(&jme->txclean_task); | |
1214 | tasklet_disable(&jme->rxclean_task); | |
1215 | tasklet_disable(&jme->rxempty_task); | |
1216 | ||
1217 | if (netif_carrier_ok(netdev)) { | |
1218 | jme_reset_ghc_speed(jme); | |
1219 | jme_disable_rx_engine(jme); | |
1220 | jme_disable_tx_engine(jme); | |
fcf45b4c GFT |
1221 | jme_reset_mac_processor(jme); |
1222 | jme_free_rx_resources(jme); | |
1223 | jme_free_tx_resources(jme); | |
192570e0 | 1224 | |
cd0ff491 | 1225 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1226 | jme_polling_mode(jme); |
cd0ff491 GFT |
1227 | |
1228 | netif_carrier_off(netdev); | |
fcf45b4c GFT |
1229 | } |
1230 | ||
1231 | jme_check_link(netdev, 0); | |
cd0ff491 | 1232 | if (netif_carrier_ok(netdev)) { |
fcf45b4c | 1233 | rc = jme_setup_rx_resources(jme); |
cd0ff491 | 1234 | if (rc) { |
937ef75a | 1235 | pr_err("Allocating resources for RX error, Device STOPPED!\n"); |
cd0ff491 | 1236 | goto out_enable_tasklet; |
fcf45b4c GFT |
1237 | } |
1238 | ||
fcf45b4c | 1239 | rc = jme_setup_tx_resources(jme); |
cd0ff491 | 1240 | if (rc) { |
937ef75a | 1241 | pr_err("Allocating resources for TX error, Device STOPPED!\n"); |
fcf45b4c GFT |
1242 | goto err_out_free_rx_resources; |
1243 | } | |
1244 | ||
1245 | jme_enable_rx_engine(jme); | |
1246 | jme_enable_tx_engine(jme); | |
1247 | ||
1248 | netif_start_queue(netdev); | |
192570e0 | 1249 | |
cd0ff491 | 1250 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1251 | jme_interrupt_mode(jme); |
192570e0 | 1252 | |
79ce639c | 1253 | jme_start_pcc_timer(jme); |
cd0ff491 GFT |
1254 | } else if (jme_pseudo_hotplug_enabled(jme)) { |
1255 | jme_start_shutdown_timer(jme); | |
fcf45b4c GFT |
1256 | } |
1257 | ||
cd0ff491 | 1258 | goto out_enable_tasklet; |
fcf45b4c GFT |
1259 | |
1260 | err_out_free_rx_resources: | |
1261 | jme_free_rx_resources(jme); | |
cd0ff491 GFT |
1262 | out_enable_tasklet: |
1263 | tasklet_enable(&jme->txclean_task); | |
1264 | tasklet_hi_enable(&jme->rxclean_task); | |
1265 | tasklet_hi_enable(&jme->rxempty_task); | |
fcf45b4c GFT |
1266 | out: |
1267 | atomic_inc(&jme->link_changing); | |
3bf61c55 | 1268 | } |
d7699f87 | 1269 | |
3bf61c55 GFT |
1270 | static void |
1271 | jme_rx_clean_tasklet(unsigned long arg) | |
1272 | { | |
cd0ff491 | 1273 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c | 1274 | struct dynpcc_info *dpi = &(jme->dpi); |
d7699f87 | 1275 | |
192570e0 GFT |
1276 | jme_process_receive(jme, jme->rx_ring_size); |
1277 | ++(dpi->intr_cnt); | |
42b1055e | 1278 | |
192570e0 | 1279 | } |
fcf45b4c | 1280 | |
192570e0 | 1281 | static int |
cdcdc9eb | 1282 | jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) |
192570e0 | 1283 | { |
cdcdc9eb | 1284 | struct jme_adapter *jme = jme_napi_priv(holder); |
3b70a6fa | 1285 | DECLARE_NETDEV |
192570e0 | 1286 | int rest; |
fcf45b4c | 1287 | |
cdcdc9eb | 1288 | rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget)); |
fcf45b4c | 1289 | |
cd0ff491 | 1290 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb | 1291 | atomic_dec(&jme->rx_empty); |
192570e0 GFT |
1292 | ++(NET_STAT(jme).rx_dropped); |
1293 | jme_restart_rx_engine(jme); | |
1294 | } | |
1295 | atomic_inc(&jme->rx_empty); | |
1296 | ||
cd0ff491 | 1297 | if (rest) { |
cdcdc9eb | 1298 | JME_RX_COMPLETE(netdev, holder); |
192570e0 GFT |
1299 | jme_interrupt_mode(jme); |
1300 | } | |
1301 | ||
cdcdc9eb GFT |
1302 | JME_NAPI_WEIGHT_SET(budget, rest); |
1303 | return JME_NAPI_WEIGHT_VAL(budget) - rest; | |
fcf45b4c GFT |
1304 | } |
1305 | ||
1306 | static void | |
1307 | jme_rx_empty_tasklet(unsigned long arg) | |
1308 | { | |
cd0ff491 | 1309 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1310 | |
cd0ff491 | 1311 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1312 | return; |
1313 | ||
cd0ff491 | 1314 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1315 | return; |
1316 | ||
7ca9ebee | 1317 | netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n"); |
29bdd921 | 1318 | |
fcf45b4c | 1319 | jme_rx_clean_tasklet(arg); |
cdcdc9eb | 1320 | |
cd0ff491 | 1321 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb GFT |
1322 | atomic_dec(&jme->rx_empty); |
1323 | ++(NET_STAT(jme).rx_dropped); | |
1324 | jme_restart_rx_engine(jme); | |
1325 | } | |
1326 | atomic_inc(&jme->rx_empty); | |
4330c2f2 GFT |
1327 | } |
1328 | ||
b3821cc5 GFT |
1329 | static void |
1330 | jme_wake_queue_if_stopped(struct jme_adapter *jme) | |
1331 | { | |
0ede469c | 1332 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1333 | |
1334 | smp_wmb(); | |
cd0ff491 | 1335 | if (unlikely(netif_queue_stopped(jme->dev) && |
b3821cc5 | 1336 | atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) { |
937ef75a | 1337 | netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n"); |
b3821cc5 | 1338 | netif_wake_queue(jme->dev); |
b3821cc5 GFT |
1339 | } |
1340 | ||
1341 | } | |
1342 | ||
3bf61c55 GFT |
1343 | static void |
1344 | jme_tx_clean_tasklet(unsigned long arg) | |
4330c2f2 | 1345 | { |
cd0ff491 | 1346 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
3bf61c55 | 1347 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1348 | struct txdesc *txdesc = txring->desc; |
3bf61c55 | 1349 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi; |
b3821cc5 | 1350 | int i, j, cnt = 0, max, err, mask; |
3bf61c55 | 1351 | |
937ef75a | 1352 | tx_dbg(jme, "Into txclean\n"); |
cd0ff491 GFT |
1353 | |
1354 | if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) | |
fcf45b4c GFT |
1355 | goto out; |
1356 | ||
cd0ff491 | 1357 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1358 | goto out; |
1359 | ||
cd0ff491 | 1360 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1361 | goto out; |
1362 | ||
b3821cc5 GFT |
1363 | max = jme->tx_ring_size - atomic_read(&txring->nr_free); |
1364 | mask = jme->tx_ring_mask; | |
3bf61c55 | 1365 | |
cd0ff491 | 1366 | for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { |
3bf61c55 GFT |
1367 | |
1368 | ctxbi = txbi + i; | |
1369 | ||
cd0ff491 | 1370 | if (likely(ctxbi->skb && |
b3821cc5 | 1371 | !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) { |
8c198884 | 1372 | |
cd0ff491 | 1373 | tx_dbg(jme, "txclean: %d+%d@%lu\n", |
937ef75a | 1374 | i, ctxbi->nr_desc, jiffies); |
3bf61c55 | 1375 | |
cd0ff491 | 1376 | err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; |
3bf61c55 | 1377 | |
cd0ff491 | 1378 | for (j = 1 ; j < ctxbi->nr_desc ; ++j) { |
b3821cc5 GFT |
1379 | ttxbi = txbi + ((i + j) & (mask)); |
1380 | txdesc[(i + j) & (mask)].dw[0] = 0; | |
3bf61c55 | 1381 | |
b3821cc5 | 1382 | pci_unmap_page(jme->pdev, |
3bf61c55 GFT |
1383 | ttxbi->mapping, |
1384 | ttxbi->len, | |
1385 | PCI_DMA_TODEVICE); | |
1386 | ||
3bf61c55 GFT |
1387 | ttxbi->mapping = 0; |
1388 | ttxbi->len = 0; | |
1389 | } | |
1390 | ||
1391 | dev_kfree_skb(ctxbi->skb); | |
3bf61c55 GFT |
1392 | |
1393 | cnt += ctxbi->nr_desc; | |
1394 | ||
cd0ff491 | 1395 | if (unlikely(err)) { |
8c198884 | 1396 | ++(NET_STAT(jme).tx_carrier_errors); |
cd0ff491 | 1397 | } else { |
8c198884 | 1398 | ++(NET_STAT(jme).tx_packets); |
b3821cc5 GFT |
1399 | NET_STAT(jme).tx_bytes += ctxbi->len; |
1400 | } | |
1401 | ||
1402 | ctxbi->skb = NULL; | |
1403 | ctxbi->len = 0; | |
cdcdc9eb | 1404 | ctxbi->start_xmit = 0; |
cd0ff491 GFT |
1405 | |
1406 | } else { | |
3bf61c55 GFT |
1407 | break; |
1408 | } | |
1409 | ||
b3821cc5 | 1410 | i = (i + ctxbi->nr_desc) & mask; |
3bf61c55 GFT |
1411 | |
1412 | ctxbi->nr_desc = 0; | |
d7699f87 GFT |
1413 | } |
1414 | ||
937ef75a | 1415 | tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies); |
cdcdc9eb | 1416 | atomic_set(&txring->next_to_clean, i); |
79ce639c | 1417 | atomic_add(cnt, &txring->nr_free); |
3bf61c55 | 1418 | |
b3821cc5 GFT |
1419 | jme_wake_queue_if_stopped(jme); |
1420 | ||
fcf45b4c GFT |
1421 | out: |
1422 | atomic_inc(&jme->tx_cleaning); | |
d7699f87 GFT |
1423 | } |
1424 | ||
79ce639c | 1425 | static void |
cd0ff491 | 1426 | jme_intr_msi(struct jme_adapter *jme, u32 intrstat) |
d7699f87 | 1427 | { |
3bf61c55 GFT |
1428 | /* |
1429 | * Disable interrupt | |
1430 | */ | |
1431 | jwrite32f(jme, JME_IENC, INTR_ENABLE); | |
d7699f87 | 1432 | |
cd0ff491 | 1433 | if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { |
47220951 GFT |
1434 | /* |
1435 | * Link change event is critical | |
1436 | * all other events are ignored | |
1437 | */ | |
1438 | jwrite32(jme, JME_IEVE, intrstat); | |
3bf61c55 | 1439 | tasklet_schedule(&jme->linkch_task); |
29bdd921 | 1440 | goto out_reenable; |
fcf45b4c | 1441 | } |
d7699f87 | 1442 | |
cd0ff491 | 1443 | if (intrstat & INTR_TMINTR) { |
47220951 | 1444 | jwrite32(jme, JME_IEVE, INTR_TMINTR); |
79ce639c | 1445 | tasklet_schedule(&jme->pcc_task); |
47220951 | 1446 | } |
79ce639c | 1447 | |
cd0ff491 | 1448 | if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { |
47220951 | 1449 | jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0); |
4330c2f2 | 1450 | tasklet_schedule(&jme->txclean_task); |
47220951 GFT |
1451 | } |
1452 | ||
cd0ff491 | 1453 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
47220951 GFT |
1454 | jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO | |
1455 | INTR_PCCRX0 | | |
1456 | INTR_RX0EMP)) | | |
1457 | INTR_RX0); | |
1458 | } | |
d7699f87 | 1459 | |
cd0ff491 GFT |
1460 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
1461 | if (intrstat & INTR_RX0EMP) | |
192570e0 GFT |
1462 | atomic_inc(&jme->rx_empty); |
1463 | ||
cd0ff491 GFT |
1464 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
1465 | if (likely(JME_RX_SCHEDULE_PREP(jme))) { | |
192570e0 | 1466 | jme_polling_mode(jme); |
cdcdc9eb | 1467 | JME_RX_SCHEDULE(jme); |
192570e0 GFT |
1468 | } |
1469 | } | |
cd0ff491 GFT |
1470 | } else { |
1471 | if (intrstat & INTR_RX0EMP) { | |
cdcdc9eb | 1472 | atomic_inc(&jme->rx_empty); |
cd0ff491 GFT |
1473 | tasklet_hi_schedule(&jme->rxempty_task); |
1474 | } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) { | |
1475 | tasklet_hi_schedule(&jme->rxclean_task); | |
cdcdc9eb | 1476 | } |
4330c2f2 | 1477 | } |
d7699f87 | 1478 | |
29bdd921 | 1479 | out_reenable: |
3bf61c55 | 1480 | /* |
fcf45b4c | 1481 | * Re-enable interrupt |
3bf61c55 | 1482 | */ |
fcf45b4c | 1483 | jwrite32f(jme, JME_IENS, INTR_ENABLE); |
79ce639c GFT |
1484 | } |
1485 | ||
3b70a6fa GFT |
1486 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
1487 | static irqreturn_t | |
1488 | jme_intr(int irq, void *dev_id, struct pt_regs *regs) | |
1489 | #else | |
79ce639c GFT |
1490 | static irqreturn_t |
1491 | jme_intr(int irq, void *dev_id) | |
3b70a6fa | 1492 | #endif |
79ce639c | 1493 | { |
cd0ff491 GFT |
1494 | struct net_device *netdev = dev_id; |
1495 | struct jme_adapter *jme = netdev_priv(netdev); | |
1496 | u32 intrstat; | |
79ce639c GFT |
1497 | |
1498 | intrstat = jread32(jme, JME_IEVE); | |
1499 | ||
1500 | /* | |
1501 | * Check if it's really an interrupt for us | |
1502 | */ | |
7ee473a3 | 1503 | if (unlikely((intrstat & INTR_ENABLE) == 0)) |
29bdd921 | 1504 | return IRQ_NONE; |
79ce639c GFT |
1505 | |
1506 | /* | |
1507 | * Check if the device still exist | |
1508 | */ | |
cd0ff491 GFT |
1509 | if (unlikely(intrstat == ~((typeof(intrstat))0))) |
1510 | return IRQ_NONE; | |
79ce639c GFT |
1511 | |
1512 | jme_intr_msi(jme, intrstat); | |
1513 | ||
cd0ff491 | 1514 | return IRQ_HANDLED; |
d7699f87 GFT |
1515 | } |
1516 | ||
3b70a6fa GFT |
1517 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
1518 | static irqreturn_t | |
1519 | jme_msi(int irq, void *dev_id, struct pt_regs *regs) | |
1520 | #else | |
79ce639c GFT |
1521 | static irqreturn_t |
1522 | jme_msi(int irq, void *dev_id) | |
3b70a6fa | 1523 | #endif |
79ce639c | 1524 | { |
cd0ff491 GFT |
1525 | struct net_device *netdev = dev_id; |
1526 | struct jme_adapter *jme = netdev_priv(netdev); | |
1527 | u32 intrstat; | |
79ce639c | 1528 | |
0ede469c | 1529 | intrstat = jread32(jme, JME_IEVE); |
79ce639c GFT |
1530 | |
1531 | jme_intr_msi(jme, intrstat); | |
1532 | ||
cd0ff491 | 1533 | return IRQ_HANDLED; |
79ce639c GFT |
1534 | } |
1535 | ||
79ce639c GFT |
1536 | static void |
1537 | jme_reset_link(struct jme_adapter *jme) | |
1538 | { | |
1539 | jwrite32(jme, JME_TMCSR, TMCSR_SWIT); | |
1540 | } | |
1541 | ||
fcf45b4c GFT |
1542 | static void |
1543 | jme_restart_an(struct jme_adapter *jme) | |
1544 | { | |
cd0ff491 | 1545 | u32 bmcr; |
fcf45b4c | 1546 | |
cd0ff491 | 1547 | spin_lock_bh(&jme->phy_lock); |
fcf45b4c GFT |
1548 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1549 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
1550 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
cd0ff491 | 1551 | spin_unlock_bh(&jme->phy_lock); |
79ce639c GFT |
1552 | } |
1553 | ||
1554 | static int | |
1555 | jme_request_irq(struct jme_adapter *jme) | |
1556 | { | |
1557 | int rc; | |
cd0ff491 | 1558 | struct net_device *netdev = jme->dev; |
3b70a6fa GFT |
1559 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
1560 | irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr; | |
1561 | int irq_flags = SA_SHIRQ; | |
1562 | #else | |
cd0ff491 GFT |
1563 | irq_handler_t handler = jme_intr; |
1564 | int irq_flags = IRQF_SHARED; | |
3b70a6fa | 1565 | #endif |
cd0ff491 GFT |
1566 | |
1567 | if (!pci_enable_msi(jme->pdev)) { | |
1568 | set_bit(JME_FLAG_MSI, &jme->flags); | |
1569 | handler = jme_msi; | |
1570 | irq_flags = 0; | |
1571 | } | |
1572 | ||
1573 | rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, | |
1574 | netdev); | |
1575 | if (rc) { | |
937ef75a JP |
1576 | netdev_err(netdev, |
1577 | "Unable to request %s interrupt (return: %d)\n", | |
1578 | test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx", | |
1579 | rc); | |
79ce639c | 1580 | |
cd0ff491 GFT |
1581 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { |
1582 | pci_disable_msi(jme->pdev); | |
1583 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1584 | } |
cd0ff491 | 1585 | } else { |
79ce639c GFT |
1586 | netdev->irq = jme->pdev->irq; |
1587 | } | |
1588 | ||
cd0ff491 | 1589 | return rc; |
79ce639c GFT |
1590 | } |
1591 | ||
1592 | static void | |
1593 | jme_free_irq(struct jme_adapter *jme) | |
1594 | { | |
cd0ff491 GFT |
1595 | free_irq(jme->pdev->irq, jme->dev); |
1596 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { | |
1597 | pci_disable_msi(jme->pdev); | |
1598 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1599 | jme->dev->irq = jme->pdev->irq; |
cd0ff491 | 1600 | } |
fcf45b4c GFT |
1601 | } |
1602 | ||
e58b908e GFT |
1603 | static inline void |
1604 | jme_phy_on(struct jme_adapter *jme) | |
1605 | { | |
1606 | u32 bmcr; | |
1607 | ||
1608 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1609 | bmcr &= ~BMCR_PDOWN; | |
1610 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
1611 | } | |
1612 | ||
3bf61c55 GFT |
1613 | static int |
1614 | jme_open(struct net_device *netdev) | |
d7699f87 GFT |
1615 | { |
1616 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 1617 | int rc; |
79ce639c | 1618 | |
42b1055e | 1619 | jme_clear_pm(jme); |
cdcdc9eb | 1620 | JME_NAPI_ENABLE(jme); |
d7699f87 | 1621 | |
0ede469c | 1622 | tasklet_enable(&jme->linkch_task); |
cd0ff491 GFT |
1623 | tasklet_enable(&jme->txclean_task); |
1624 | tasklet_hi_enable(&jme->rxclean_task); | |
1625 | tasklet_hi_enable(&jme->rxempty_task); | |
1626 | ||
79ce639c | 1627 | rc = jme_request_irq(jme); |
cd0ff491 | 1628 | if (rc) |
4330c2f2 | 1629 | goto err_out; |
79ce639c | 1630 | |
d7699f87 | 1631 | jme_start_irq(jme); |
42b1055e | 1632 | |
e58b908e GFT |
1633 | if (test_bit(JME_FLAG_SSET, &jme->flags)) { |
1634 | jme_phy_on(jme); | |
42b1055e | 1635 | jme_set_settings(netdev, &jme->old_ecmd); |
e58b908e | 1636 | } else { |
42b1055e | 1637 | jme_reset_phy_processor(jme); |
e58b908e | 1638 | } |
42b1055e | 1639 | |
29bdd921 | 1640 | jme_reset_link(jme); |
d7699f87 GFT |
1641 | |
1642 | return 0; | |
1643 | ||
d7699f87 GFT |
1644 | err_out: |
1645 | netif_stop_queue(netdev); | |
1646 | netif_carrier_off(netdev); | |
4330c2f2 | 1647 | return rc; |
d7699f87 GFT |
1648 | } |
1649 | ||
7ee473a3 | 1650 | #ifdef CONFIG_PM |
42b1055e GFT |
1651 | static void |
1652 | jme_set_100m_half(struct jme_adapter *jme) | |
1653 | { | |
cd0ff491 | 1654 | u32 bmcr, tmp; |
42b1055e GFT |
1655 | |
1656 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1657 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | | |
1658 | BMCR_SPEED1000 | BMCR_FULLDPLX); | |
1659 | tmp |= BMCR_SPEED100; | |
1660 | ||
1661 | if (bmcr != tmp) | |
1662 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp); | |
1663 | ||
cd0ff491 | 1664 | if (jme->fpgaver) |
cdcdc9eb GFT |
1665 | jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL); |
1666 | else | |
1667 | jwrite32(jme, JME_GHC, GHC_SPEED_100M); | |
42b1055e GFT |
1668 | } |
1669 | ||
47220951 GFT |
1670 | #define JME_WAIT_LINK_TIME 2000 /* 2000ms */ |
1671 | static void | |
1672 | jme_wait_link(struct jme_adapter *jme) | |
1673 | { | |
cd0ff491 | 1674 | u32 phylink, to = JME_WAIT_LINK_TIME; |
47220951 GFT |
1675 | |
1676 | mdelay(1000); | |
1677 | phylink = jme_linkstat_from_phy(jme); | |
cd0ff491 | 1678 | while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { |
47220951 GFT |
1679 | mdelay(10); |
1680 | phylink = jme_linkstat_from_phy(jme); | |
1681 | } | |
1682 | } | |
7ee473a3 | 1683 | #endif |
47220951 | 1684 | |
cd0ff491 | 1685 | static inline void |
42b1055e GFT |
1686 | jme_phy_off(struct jme_adapter *jme) |
1687 | { | |
1688 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN); | |
1689 | } | |
1690 | ||
3bf61c55 GFT |
1691 | static int |
1692 | jme_close(struct net_device *netdev) | |
d7699f87 GFT |
1693 | { |
1694 | struct jme_adapter *jme = netdev_priv(netdev); | |
1695 | ||
1696 | netif_stop_queue(netdev); | |
1697 | netif_carrier_off(netdev); | |
1698 | ||
1699 | jme_stop_irq(jme); | |
79ce639c | 1700 | jme_free_irq(jme); |
d7699f87 | 1701 | |
cdcdc9eb | 1702 | JME_NAPI_DISABLE(jme); |
192570e0 | 1703 | |
0ede469c GFT |
1704 | tasklet_disable(&jme->linkch_task); |
1705 | tasklet_disable(&jme->txclean_task); | |
1706 | tasklet_disable(&jme->rxclean_task); | |
1707 | tasklet_disable(&jme->rxempty_task); | |
8c198884 | 1708 | |
cd0ff491 GFT |
1709 | jme_reset_ghc_speed(jme); |
1710 | jme_disable_rx_engine(jme); | |
1711 | jme_disable_tx_engine(jme); | |
8c198884 | 1712 | jme_reset_mac_processor(jme); |
d7699f87 GFT |
1713 | jme_free_rx_resources(jme); |
1714 | jme_free_tx_resources(jme); | |
42b1055e | 1715 | jme->phylink = 0; |
b3821cc5 GFT |
1716 | jme_phy_off(jme); |
1717 | ||
1718 | return 0; | |
1719 | } | |
1720 | ||
1721 | static int | |
1722 | jme_alloc_txdesc(struct jme_adapter *jme, | |
1723 | struct sk_buff *skb) | |
1724 | { | |
0ede469c | 1725 | struct jme_ring *txring = &(jme->txring[0]); |
b3821cc5 GFT |
1726 | int idx, nr_alloc, mask = jme->tx_ring_mask; |
1727 | ||
1728 | idx = txring->next_to_use; | |
1729 | nr_alloc = skb_shinfo(skb)->nr_frags + 2; | |
1730 | ||
cd0ff491 | 1731 | if (unlikely(atomic_read(&txring->nr_free) < nr_alloc)) |
b3821cc5 GFT |
1732 | return -1; |
1733 | ||
1734 | atomic_sub(nr_alloc, &txring->nr_free); | |
42b1055e | 1735 | |
b3821cc5 GFT |
1736 | txring->next_to_use = (txring->next_to_use + nr_alloc) & mask; |
1737 | ||
1738 | return idx; | |
1739 | } | |
1740 | ||
1741 | static void | |
1742 | jme_fill_tx_map(struct pci_dev *pdev, | |
cd0ff491 | 1743 | struct txdesc *txdesc, |
b3821cc5 GFT |
1744 | struct jme_buffer_info *txbi, |
1745 | struct page *page, | |
cd0ff491 GFT |
1746 | u32 page_offset, |
1747 | u32 len, | |
1748 | u8 hidma) | |
b3821cc5 GFT |
1749 | { |
1750 | dma_addr_t dmaaddr; | |
1751 | ||
1752 | dmaaddr = pci_map_page(pdev, | |
1753 | page, | |
1754 | page_offset, | |
1755 | len, | |
1756 | PCI_DMA_TODEVICE); | |
1757 | ||
1758 | pci_dma_sync_single_for_device(pdev, | |
1759 | dmaaddr, | |
1760 | len, | |
1761 | PCI_DMA_TODEVICE); | |
1762 | ||
1763 | txdesc->dw[0] = 0; | |
1764 | txdesc->dw[1] = 0; | |
1765 | txdesc->desc2.flags = TXFLAG_OWN; | |
cd0ff491 | 1766 | txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0; |
b3821cc5 GFT |
1767 | txdesc->desc2.datalen = cpu_to_le16(len); |
1768 | txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32); | |
1769 | txdesc->desc2.bufaddrl = cpu_to_le32( | |
1770 | (__u64)dmaaddr & 0xFFFFFFFFUL); | |
1771 | ||
1772 | txbi->mapping = dmaaddr; | |
1773 | txbi->len = len; | |
1774 | } | |
1775 | ||
1776 | static void | |
1777 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
1778 | { | |
0ede469c | 1779 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1780 | struct txdesc *txdesc = txring->desc, *ctxdesc; |
b3821cc5 | 1781 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; |
cd0ff491 | 1782 | u8 hidma = jme->dev->features & NETIF_F_HIGHDMA; |
b3821cc5 GFT |
1783 | int i, nr_frags = skb_shinfo(skb)->nr_frags; |
1784 | int mask = jme->tx_ring_mask; | |
1785 | struct skb_frag_struct *frag; | |
cd0ff491 | 1786 | u32 len; |
b3821cc5 | 1787 | |
cd0ff491 GFT |
1788 | for (i = 0 ; i < nr_frags ; ++i) { |
1789 | frag = &skb_shinfo(skb)->frags[i]; | |
b3821cc5 GFT |
1790 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); |
1791 | ctxbi = txbi + ((idx + i + 2) & (mask)); | |
1792 | ||
1793 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page, | |
1794 | frag->page_offset, frag->size, hidma); | |
42b1055e | 1795 | } |
b3821cc5 | 1796 | |
cd0ff491 | 1797 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
b3821cc5 GFT |
1798 | ctxdesc = txdesc + ((idx + 1) & (mask)); |
1799 | ctxbi = txbi + ((idx + 1) & (mask)); | |
1800 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
1801 | offset_in_page(skb->data), len, hidma); | |
1802 | ||
1803 | } | |
1804 | ||
1805 | static int | |
1806 | jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) | |
1807 | { | |
3b70a6fa | 1808 | if (unlikely( |
0ede469c | 1809 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17) |
3b70a6fa GFT |
1810 | skb_shinfo(skb)->tso_size |
1811 | #else | |
1812 | skb_shinfo(skb)->gso_size | |
1813 | #endif | |
1814 | && skb_header_cloned(skb) && | |
b3821cc5 GFT |
1815 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) { |
1816 | dev_kfree_skb(skb); | |
1817 | return -1; | |
1818 | } | |
1819 | ||
1820 | return 0; | |
1821 | } | |
1822 | ||
1823 | static int | |
3b70a6fa | 1824 | jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags) |
b3821cc5 | 1825 | { |
0ede469c | 1826 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17) |
3b70a6fa GFT |
1827 | *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT); |
1828 | #else | |
1829 | *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT); | |
1830 | #endif | |
cd0ff491 | 1831 | if (*mss) { |
b3821cc5 GFT |
1832 | *flags |= TXFLAG_LSEN; |
1833 | ||
cd0ff491 | 1834 | if (skb->protocol == htons(ETH_P_IP)) { |
b3821cc5 GFT |
1835 | struct iphdr *iph = ip_hdr(skb); |
1836 | ||
1837 | iph->check = 0; | |
cd0ff491 | 1838 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
b3821cc5 GFT |
1839 | iph->daddr, 0, |
1840 | IPPROTO_TCP, | |
1841 | 0); | |
cd0ff491 | 1842 | } else { |
b3821cc5 GFT |
1843 | struct ipv6hdr *ip6h = ipv6_hdr(skb); |
1844 | ||
cd0ff491 | 1845 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, |
b3821cc5 GFT |
1846 | &ip6h->daddr, 0, |
1847 | IPPROTO_TCP, | |
1848 | 0); | |
1849 | } | |
1850 | ||
1851 | return 0; | |
1852 | } | |
1853 | ||
1854 | return 1; | |
1855 | } | |
1856 | ||
1857 | static void | |
cd0ff491 | 1858 | jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags) |
b3821cc5 | 1859 | { |
3b70a6fa GFT |
1860 | #ifdef CHECKSUM_PARTIAL |
1861 | if (skb->ip_summed == CHECKSUM_PARTIAL) | |
1862 | #else | |
1863 | if (skb->ip_summed == CHECKSUM_HW) | |
1864 | #endif | |
1865 | { | |
cd0ff491 | 1866 | u8 ip_proto; |
b3821cc5 | 1867 | |
3b70a6fa GFT |
1868 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
1869 | if (skb->protocol == htons(ETH_P_IP)) | |
1870 | ip_proto = ip_hdr(skb)->protocol; | |
1871 | else if (skb->protocol == htons(ETH_P_IPV6)) | |
1872 | ip_proto = ipv6_hdr(skb)->nexthdr; | |
1873 | else | |
1874 | ip_proto = 0; | |
1875 | #else | |
b3821cc5 | 1876 | switch (skb->protocol) { |
cd0ff491 | 1877 | case htons(ETH_P_IP): |
b3821cc5 GFT |
1878 | ip_proto = ip_hdr(skb)->protocol; |
1879 | break; | |
cd0ff491 | 1880 | case htons(ETH_P_IPV6): |
b3821cc5 GFT |
1881 | ip_proto = ipv6_hdr(skb)->nexthdr; |
1882 | break; | |
1883 | default: | |
1884 | ip_proto = 0; | |
1885 | break; | |
1886 | } | |
3b70a6fa | 1887 | #endif |
b3821cc5 | 1888 | |
cd0ff491 | 1889 | switch (ip_proto) { |
b3821cc5 GFT |
1890 | case IPPROTO_TCP: |
1891 | *flags |= TXFLAG_TCPCS; | |
1892 | break; | |
1893 | case IPPROTO_UDP: | |
1894 | *flags |= TXFLAG_UDPCS; | |
1895 | break; | |
1896 | default: | |
937ef75a | 1897 | netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n"); |
b3821cc5 GFT |
1898 | break; |
1899 | } | |
1900 | } | |
1901 | } | |
1902 | ||
cd0ff491 | 1903 | static inline void |
3b70a6fa | 1904 | jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags) |
b3821cc5 | 1905 | { |
cd0ff491 | 1906 | if (vlan_tx_tag_present(skb)) { |
b3821cc5 | 1907 | *flags |= TXFLAG_TAGON; |
3b70a6fa | 1908 | *vlan = cpu_to_le16(vlan_tx_tag_get(skb)); |
42b1055e | 1909 | } |
b3821cc5 GFT |
1910 | } |
1911 | ||
1912 | static int | |
3b70a6fa | 1913 | jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) |
b3821cc5 | 1914 | { |
0ede469c | 1915 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1916 | struct txdesc *txdesc; |
b3821cc5 | 1917 | struct jme_buffer_info *txbi; |
cd0ff491 | 1918 | u8 flags; |
b3821cc5 | 1919 | |
cd0ff491 | 1920 | txdesc = (struct txdesc *)txring->desc + idx; |
b3821cc5 GFT |
1921 | txbi = txring->bufinf + idx; |
1922 | ||
1923 | txdesc->dw[0] = 0; | |
1924 | txdesc->dw[1] = 0; | |
1925 | txdesc->dw[2] = 0; | |
1926 | txdesc->dw[3] = 0; | |
1927 | txdesc->desc1.pktsize = cpu_to_le16(skb->len); | |
1928 | /* | |
1929 | * Set OWN bit at final. | |
1930 | * When kernel transmit faster than NIC. | |
1931 | * And NIC trying to send this descriptor before we tell | |
1932 | * it to start sending this TX queue. | |
1933 | * Other fields are already filled correctly. | |
1934 | */ | |
1935 | wmb(); | |
1936 | flags = TXFLAG_OWN | TXFLAG_INT; | |
cd0ff491 GFT |
1937 | /* |
1938 | * Set checksum flags while not tso | |
1939 | */ | |
1940 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) | |
1941 | jme_tx_csum(jme, skb, &flags); | |
b3821cc5 | 1942 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); |
3b70a6fa | 1943 | jme_map_tx_skb(jme, skb, idx); |
b3821cc5 GFT |
1944 | txdesc->desc1.flags = flags; |
1945 | /* | |
1946 | * Set tx buffer info after telling NIC to send | |
1947 | * For better tx_clean timing | |
1948 | */ | |
1949 | wmb(); | |
1950 | txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2; | |
1951 | txbi->skb = skb; | |
1952 | txbi->len = skb->len; | |
cd0ff491 GFT |
1953 | txbi->start_xmit = jiffies; |
1954 | if (!txbi->start_xmit) | |
8d27293f | 1955 | txbi->start_xmit = (0UL-1); |
d7699f87 GFT |
1956 | |
1957 | return 0; | |
1958 | } | |
1959 | ||
b3821cc5 GFT |
1960 | static void |
1961 | jme_stop_queue_if_full(struct jme_adapter *jme) | |
1962 | { | |
0ede469c | 1963 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 GFT |
1964 | struct jme_buffer_info *txbi = txring->bufinf; |
1965 | int idx = atomic_read(&txring->next_to_clean); | |
cdcdc9eb | 1966 | |
cd0ff491 | 1967 | txbi += idx; |
b3821cc5 GFT |
1968 | |
1969 | smp_wmb(); | |
cd0ff491 | 1970 | if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { |
b3821cc5 | 1971 | netif_stop_queue(jme->dev); |
937ef75a | 1972 | netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n"); |
b3821cc5 | 1973 | smp_wmb(); |
cd0ff491 GFT |
1974 | if (atomic_read(&txring->nr_free) |
1975 | >= (jme->tx_wake_threshold)) { | |
b3821cc5 | 1976 | netif_wake_queue(jme->dev); |
937ef75a | 1977 | netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n"); |
b3821cc5 GFT |
1978 | } |
1979 | } | |
1980 | ||
cd0ff491 | 1981 | if (unlikely(txbi->start_xmit && |
cdcdc9eb GFT |
1982 | (jiffies - txbi->start_xmit) >= TX_TIMEOUT && |
1983 | txbi->skb)) { | |
1984 | netif_stop_queue(jme->dev); | |
937ef75a | 1985 | netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu\n", idx, jiffies); |
cdcdc9eb | 1986 | } |
b3821cc5 GFT |
1987 | } |
1988 | ||
3bf61c55 GFT |
1989 | /* |
1990 | * This function is already protected by netif_tx_lock() | |
1991 | */ | |
cd0ff491 | 1992 | |
7ca9ebee | 1993 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31) |
3bf61c55 | 1994 | static int |
7ca9ebee GFT |
1995 | #else |
1996 | static netdev_tx_t | |
1997 | #endif | |
3bf61c55 | 1998 | jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) |
d7699f87 | 1999 | { |
cd0ff491 | 2000 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2001 | int idx; |
d7699f87 | 2002 | |
cd0ff491 | 2003 | if (unlikely(jme_expand_header(jme, skb))) { |
b3821cc5 GFT |
2004 | ++(NET_STAT(jme).tx_dropped); |
2005 | return NETDEV_TX_OK; | |
2006 | } | |
2007 | ||
2008 | idx = jme_alloc_txdesc(jme, skb); | |
79ce639c | 2009 | |
cd0ff491 | 2010 | if (unlikely(idx < 0)) { |
b3821cc5 | 2011 | netif_stop_queue(netdev); |
937ef75a JP |
2012 | netif_err(jme, tx_err, jme->dev, |
2013 | "BUG! Tx ring full when queue awake!\n"); | |
d7699f87 | 2014 | |
cd0ff491 | 2015 | return NETDEV_TX_BUSY; |
b3821cc5 GFT |
2016 | } |
2017 | ||
3b70a6fa | 2018 | jme_fill_tx_desc(jme, skb, idx); |
b3821cc5 | 2019 | |
4330c2f2 GFT |
2020 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
2021 | TXCS_SELECT_QUEUE0 | | |
2022 | TXCS_QUEUE0S | | |
2023 | TXCS_ENABLE); | |
0ede469c | 2024 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29) |
d7699f87 | 2025 | netdev->trans_start = jiffies; |
0ede469c | 2026 | #endif |
d7699f87 | 2027 | |
937ef75a JP |
2028 | tx_dbg(jme, "xmit: %d+%d@%lu\n", |
2029 | idx, skb_shinfo(skb)->nr_frags + 2, jiffies); | |
b3821cc5 GFT |
2030 | jme_stop_queue_if_full(jme); |
2031 | ||
cd0ff491 | 2032 | return NETDEV_TX_OK; |
d7699f87 GFT |
2033 | } |
2034 | ||
3bf61c55 GFT |
2035 | static int |
2036 | jme_set_macaddr(struct net_device *netdev, void *p) | |
d7699f87 | 2037 | { |
cd0ff491 | 2038 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2039 | struct sockaddr *addr = p; |
cd0ff491 | 2040 | u32 val; |
d7699f87 | 2041 | |
cd0ff491 | 2042 | if (netif_running(netdev)) |
d7699f87 GFT |
2043 | return -EBUSY; |
2044 | ||
cd0ff491 | 2045 | spin_lock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
2046 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
2047 | ||
186fc259 GFT |
2048 | val = (addr->sa_data[3] & 0xff) << 24 | |
2049 | (addr->sa_data[2] & 0xff) << 16 | | |
2050 | (addr->sa_data[1] & 0xff) << 8 | | |
2051 | (addr->sa_data[0] & 0xff); | |
4330c2f2 | 2052 | jwrite32(jme, JME_RXUMA_LO, val); |
186fc259 GFT |
2053 | val = (addr->sa_data[5] & 0xff) << 8 | |
2054 | (addr->sa_data[4] & 0xff); | |
4330c2f2 | 2055 | jwrite32(jme, JME_RXUMA_HI, val); |
cd0ff491 | 2056 | spin_unlock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
2057 | |
2058 | return 0; | |
2059 | } | |
2060 | ||
3bf61c55 GFT |
2061 | static void |
2062 | jme_set_multi(struct net_device *netdev) | |
d7699f87 | 2063 | { |
3bf61c55 | 2064 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2065 | u32 mc_hash[2] = {}; |
7ca9ebee | 2066 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33) |
d7699f87 | 2067 | int i; |
7ca9ebee | 2068 | #endif |
d7699f87 | 2069 | |
cd0ff491 | 2070 | spin_lock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2071 | |
2072 | jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME; | |
d7699f87 | 2073 | |
cd0ff491 | 2074 | if (netdev->flags & IFF_PROMISC) { |
8c198884 | 2075 | jme->reg_rxmcs |= RXMCS_ALLFRAME; |
cd0ff491 | 2076 | } else if (netdev->flags & IFF_ALLMULTI) { |
8c198884 | 2077 | jme->reg_rxmcs |= RXMCS_ALLMULFRAME; |
cd0ff491 | 2078 | } else if (netdev->flags & IFF_MULTICAST) { |
8e14c278 | 2079 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34) |
3bf61c55 | 2080 | struct dev_mc_list *mclist; |
8e14c278 JP |
2081 | #else |
2082 | struct netdev_hw_addr *ha; | |
2083 | #endif | |
3bf61c55 | 2084 | int bit_nr; |
d7699f87 | 2085 | |
8c198884 | 2086 | jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED; |
7ca9ebee | 2087 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33) |
3bf61c55 GFT |
2088 | for (i = 0, mclist = netdev->mc_list; |
2089 | mclist && i < netdev->mc_count; | |
2090 | ++i, mclist = mclist->next) { | |
8e14c278 | 2091 | #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34) |
7ca9ebee | 2092 | netdev_for_each_mc_addr(mclist, netdev) { |
8e14c278 JP |
2093 | #else |
2094 | netdev_for_each_mc_addr(ha, netdev) { | |
7ca9ebee | 2095 | #endif |
8e14c278 | 2096 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34) |
cd0ff491 | 2097 | bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F; |
8e14c278 JP |
2098 | #else |
2099 | bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F; | |
2100 | #endif | |
cd0ff491 GFT |
2101 | mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); |
2102 | } | |
d7699f87 | 2103 | |
4330c2f2 GFT |
2104 | jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]); |
2105 | jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]); | |
d7699f87 GFT |
2106 | } |
2107 | ||
d7699f87 | 2108 | wmb(); |
8c198884 GFT |
2109 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); |
2110 | ||
cd0ff491 | 2111 | spin_unlock_bh(&jme->rxmcs_lock); |
d7699f87 GFT |
2112 | } |
2113 | ||
3bf61c55 | 2114 | static int |
8c198884 | 2115 | jme_change_mtu(struct net_device *netdev, int new_mtu) |
d7699f87 | 2116 | { |
cd0ff491 | 2117 | struct jme_adapter *jme = netdev_priv(netdev); |
79ce639c | 2118 | |
cd0ff491 | 2119 | if (new_mtu == jme->old_mtu) |
29bdd921 GFT |
2120 | return 0; |
2121 | ||
cd0ff491 GFT |
2122 | if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || |
2123 | ((new_mtu) < IPV6_MIN_MTU)) | |
2124 | return -EINVAL; | |
79ce639c | 2125 | |
cd0ff491 | 2126 | if (new_mtu > 4000) { |
79ce639c GFT |
2127 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2128 | jme->reg_rxcs |= RXCS_FIFOTHNP_64QW; | |
2129 | jme_restart_rx_engine(jme); | |
cd0ff491 | 2130 | } else { |
79ce639c GFT |
2131 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2132 | jme->reg_rxcs |= RXCS_FIFOTHNP_128QW; | |
2133 | jme_restart_rx_engine(jme); | |
2134 | } | |
2135 | ||
cd0ff491 | 2136 | if (new_mtu > 1900) { |
b3821cc5 | 2137 | netdev->features &= ~(NETIF_F_HW_CSUM | |
3b70a6fa GFT |
2138 | NETIF_F_TSO |
2139 | #ifdef NETIF_F_TSO6 | |
2140 | | NETIF_F_TSO6 | |
2141 | #endif | |
2142 | ); | |
cd0ff491 GFT |
2143 | } else { |
2144 | if (test_bit(JME_FLAG_TXCSUM, &jme->flags)) | |
b3821cc5 | 2145 | netdev->features |= NETIF_F_HW_CSUM; |
cd0ff491 | 2146 | if (test_bit(JME_FLAG_TSO, &jme->flags)) |
3b70a6fa GFT |
2147 | netdev->features |= NETIF_F_TSO |
2148 | #ifdef NETIF_F_TSO6 | |
2149 | | NETIF_F_TSO6 | |
2150 | #endif | |
2151 | ; | |
79ce639c GFT |
2152 | } |
2153 | ||
cd0ff491 GFT |
2154 | netdev->mtu = new_mtu; |
2155 | jme_reset_link(jme); | |
79ce639c GFT |
2156 | |
2157 | return 0; | |
d7699f87 GFT |
2158 | } |
2159 | ||
8c198884 GFT |
2160 | static void |
2161 | jme_tx_timeout(struct net_device *netdev) | |
2162 | { | |
cd0ff491 | 2163 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 | 2164 | |
cdcdc9eb GFT |
2165 | jme->phylink = 0; |
2166 | jme_reset_phy_processor(jme); | |
cd0ff491 | 2167 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
cdcdc9eb GFT |
2168 | jme_set_settings(netdev, &jme->old_ecmd); |
2169 | ||
8c198884 | 2170 | /* |
cdcdc9eb | 2171 | * Force to Reset the link again |
8c198884 | 2172 | */ |
29bdd921 | 2173 | jme_reset_link(jme); |
8c198884 GFT |
2174 | } |
2175 | ||
1e5ebebc GFT |
2176 | static inline void jme_pause_rx(struct jme_adapter *jme) |
2177 | { | |
2178 | atomic_dec(&jme->link_changing); | |
2179 | ||
2180 | jme_set_rx_pcc(jme, PCC_OFF); | |
2181 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2182 | JME_NAPI_DISABLE(jme); | |
2183 | } else { | |
2184 | tasklet_disable(&jme->rxclean_task); | |
2185 | tasklet_disable(&jme->rxempty_task); | |
2186 | } | |
2187 | } | |
2188 | ||
2189 | static inline void jme_resume_rx(struct jme_adapter *jme) | |
2190 | { | |
2191 | struct dynpcc_info *dpi = &(jme->dpi); | |
2192 | ||
2193 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2194 | JME_NAPI_ENABLE(jme); | |
2195 | } else { | |
2196 | tasklet_hi_enable(&jme->rxclean_task); | |
2197 | tasklet_hi_enable(&jme->rxempty_task); | |
2198 | } | |
2199 | dpi->cur = PCC_P1; | |
2200 | dpi->attempt = PCC_P1; | |
2201 | dpi->cnt = 0; | |
2202 | jme_set_rx_pcc(jme, PCC_P1); | |
2203 | ||
2204 | atomic_inc(&jme->link_changing); | |
2205 | } | |
2206 | ||
42b1055e GFT |
2207 | static void |
2208 | jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
2209 | { | |
2210 | struct jme_adapter *jme = netdev_priv(netdev); | |
2211 | ||
1e5ebebc | 2212 | jme_pause_rx(jme); |
42b1055e | 2213 | jme->vlgrp = grp; |
1e5ebebc | 2214 | jme_resume_rx(jme); |
42b1055e GFT |
2215 | } |
2216 | ||
7ca9ebee GFT |
2217 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
2218 | static void | |
2219 | jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid) | |
2220 | { | |
2221 | struct jme_adapter *jme = netdev_priv(netdev); | |
2222 | ||
7ca9ebee | 2223 | if(jme->vlgrp) { |
1e5ebebc | 2224 | jme_pause_rx(jme); |
7ca9ebee GFT |
2225 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20) |
2226 | jme->vlgrp->vlan_devices[vid] = NULL; | |
2227 | #else | |
2228 | vlan_group_set_device(jme->vlgrp, vid, NULL); | |
2229 | #endif | |
1e5ebebc | 2230 | jme_resume_rx(jme); |
7ca9ebee | 2231 | } |
7ca9ebee GFT |
2232 | } |
2233 | #endif | |
2234 | ||
3bf61c55 GFT |
2235 | static void |
2236 | jme_get_drvinfo(struct net_device *netdev, | |
2237 | struct ethtool_drvinfo *info) | |
d7699f87 | 2238 | { |
cd0ff491 | 2239 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2240 | |
cd0ff491 GFT |
2241 | strcpy(info->driver, DRV_NAME); |
2242 | strcpy(info->version, DRV_VERSION); | |
2243 | strcpy(info->bus_info, pci_name(jme->pdev)); | |
d7699f87 GFT |
2244 | } |
2245 | ||
8c198884 GFT |
2246 | static int |
2247 | jme_get_regs_len(struct net_device *netdev) | |
2248 | { | |
cd0ff491 | 2249 | return JME_REG_LEN; |
8c198884 GFT |
2250 | } |
2251 | ||
2252 | static void | |
cd0ff491 | 2253 | mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len) |
8c198884 GFT |
2254 | { |
2255 | int i; | |
2256 | ||
cd0ff491 | 2257 | for (i = 0 ; i < len ; i += 4) |
79ce639c | 2258 | p[i >> 2] = jread32(jme, reg + i); |
186fc259 | 2259 | } |
8c198884 | 2260 | |
186fc259 | 2261 | static void |
cd0ff491 | 2262 | mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) |
186fc259 GFT |
2263 | { |
2264 | int i; | |
cd0ff491 | 2265 | u16 *p16 = (u16 *)p; |
186fc259 | 2266 | |
cd0ff491 | 2267 | for (i = 0 ; i < reg_nr ; ++i) |
186fc259 | 2268 | p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i); |
8c198884 GFT |
2269 | } |
2270 | ||
2271 | static void | |
2272 | jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) | |
2273 | { | |
cd0ff491 GFT |
2274 | struct jme_adapter *jme = netdev_priv(netdev); |
2275 | u32 *p32 = (u32 *)p; | |
8c198884 | 2276 | |
186fc259 | 2277 | memset(p, 0xFF, JME_REG_LEN); |
8c198884 GFT |
2278 | |
2279 | regs->version = 1; | |
2280 | mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN); | |
2281 | ||
2282 | p32 += 0x100 >> 2; | |
2283 | mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN); | |
2284 | ||
2285 | p32 += 0x100 >> 2; | |
2286 | mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN); | |
2287 | ||
2288 | p32 += 0x100 >> 2; | |
2289 | mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN); | |
2290 | ||
186fc259 GFT |
2291 | p32 += 0x100 >> 2; |
2292 | mdio_memcpy(jme, p32, JME_PHY_REG_NR); | |
8c198884 GFT |
2293 | } |
2294 | ||
2295 | static int | |
2296 | jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2297 | { | |
2298 | struct jme_adapter *jme = netdev_priv(netdev); | |
2299 | ||
8c198884 GFT |
2300 | ecmd->tx_coalesce_usecs = PCC_TX_TO; |
2301 | ecmd->tx_max_coalesced_frames = PCC_TX_CNT; | |
2302 | ||
cd0ff491 | 2303 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
cdcdc9eb GFT |
2304 | ecmd->use_adaptive_rx_coalesce = false; |
2305 | ecmd->rx_coalesce_usecs = 0; | |
2306 | ecmd->rx_max_coalesced_frames = 0; | |
2307 | return 0; | |
2308 | } | |
2309 | ||
2310 | ecmd->use_adaptive_rx_coalesce = true; | |
2311 | ||
cd0ff491 | 2312 | switch (jme->dpi.cur) { |
8c198884 GFT |
2313 | case PCC_P1: |
2314 | ecmd->rx_coalesce_usecs = PCC_P1_TO; | |
2315 | ecmd->rx_max_coalesced_frames = PCC_P1_CNT; | |
2316 | break; | |
2317 | case PCC_P2: | |
2318 | ecmd->rx_coalesce_usecs = PCC_P2_TO; | |
2319 | ecmd->rx_max_coalesced_frames = PCC_P2_CNT; | |
2320 | break; | |
2321 | case PCC_P3: | |
2322 | ecmd->rx_coalesce_usecs = PCC_P3_TO; | |
2323 | ecmd->rx_max_coalesced_frames = PCC_P3_CNT; | |
2324 | break; | |
2325 | default: | |
2326 | break; | |
2327 | } | |
2328 | ||
2329 | return 0; | |
2330 | } | |
2331 | ||
192570e0 GFT |
2332 | static int |
2333 | jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2334 | { | |
2335 | struct jme_adapter *jme = netdev_priv(netdev); | |
2336 | struct dynpcc_info *dpi = &(jme->dpi); | |
2337 | ||
cd0ff491 | 2338 | if (netif_running(netdev)) |
cdcdc9eb GFT |
2339 | return -EBUSY; |
2340 | ||
7ca9ebee GFT |
2341 | if (ecmd->use_adaptive_rx_coalesce && |
2342 | test_bit(JME_FLAG_POLL, &jme->flags)) { | |
cd0ff491 | 2343 | clear_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb GFT |
2344 | jme->jme_rx = netif_rx; |
2345 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
192570e0 GFT |
2346 | dpi->cur = PCC_P1; |
2347 | dpi->attempt = PCC_P1; | |
2348 | dpi->cnt = 0; | |
2349 | jme_set_rx_pcc(jme, PCC_P1); | |
2350 | jme_interrupt_mode(jme); | |
7ca9ebee GFT |
2351 | } else if (!(ecmd->use_adaptive_rx_coalesce) && |
2352 | !(test_bit(JME_FLAG_POLL, &jme->flags))) { | |
cd0ff491 | 2353 | set_bit(JME_FLAG_POLL, &jme->flags); |
cdcdc9eb GFT |
2354 | jme->jme_rx = netif_receive_skb; |
2355 | jme->jme_vlan_rx = vlan_hwaccel_receive_skb; | |
192570e0 GFT |
2356 | jme_interrupt_mode(jme); |
2357 | } | |
2358 | ||
2359 | return 0; | |
2360 | } | |
2361 | ||
8c198884 GFT |
2362 | static void |
2363 | jme_get_pauseparam(struct net_device *netdev, | |
2364 | struct ethtool_pauseparam *ecmd) | |
2365 | { | |
2366 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2367 | u32 val; |
8c198884 GFT |
2368 | |
2369 | ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0; | |
2370 | ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0; | |
2371 | ||
cd0ff491 GFT |
2372 | spin_lock_bh(&jme->phy_lock); |
2373 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2374 | spin_unlock_bh(&jme->phy_lock); | |
b3821cc5 GFT |
2375 | |
2376 | ecmd->autoneg = | |
2377 | (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0; | |
8c198884 GFT |
2378 | } |
2379 | ||
2380 | static int | |
2381 | jme_set_pauseparam(struct net_device *netdev, | |
2382 | struct ethtool_pauseparam *ecmd) | |
2383 | { | |
2384 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2385 | u32 val; |
8c198884 | 2386 | |
cd0ff491 | 2387 | if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^ |
8c198884 GFT |
2388 | (ecmd->tx_pause != 0)) { |
2389 | ||
cd0ff491 | 2390 | if (ecmd->tx_pause) |
8c198884 GFT |
2391 | jme->reg_txpfc |= TXPFC_PF_EN; |
2392 | else | |
2393 | jme->reg_txpfc &= ~TXPFC_PF_EN; | |
2394 | ||
2395 | jwrite32(jme, JME_TXPFC, jme->reg_txpfc); | |
2396 | } | |
2397 | ||
cd0ff491 GFT |
2398 | spin_lock_bh(&jme->rxmcs_lock); |
2399 | if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^ | |
8c198884 GFT |
2400 | (ecmd->rx_pause != 0)) { |
2401 | ||
cd0ff491 | 2402 | if (ecmd->rx_pause) |
8c198884 GFT |
2403 | jme->reg_rxmcs |= RXMCS_FLOWCTRL; |
2404 | else | |
2405 | jme->reg_rxmcs &= ~RXMCS_FLOWCTRL; | |
2406 | ||
2407 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2408 | } | |
cd0ff491 | 2409 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 | 2410 | |
cd0ff491 GFT |
2411 | spin_lock_bh(&jme->phy_lock); |
2412 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2413 | if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^ | |
8c198884 GFT |
2414 | (ecmd->autoneg != 0)) { |
2415 | ||
cd0ff491 | 2416 | if (ecmd->autoneg) |
8c198884 GFT |
2417 | val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
2418 | else | |
2419 | val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
2420 | ||
b3821cc5 GFT |
2421 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, |
2422 | MII_ADVERTISE, val); | |
8c198884 | 2423 | } |
cd0ff491 | 2424 | spin_unlock_bh(&jme->phy_lock); |
8c198884 GFT |
2425 | |
2426 | return 0; | |
2427 | } | |
2428 | ||
29bdd921 GFT |
2429 | static void |
2430 | jme_get_wol(struct net_device *netdev, | |
2431 | struct ethtool_wolinfo *wol) | |
2432 | { | |
2433 | struct jme_adapter *jme = netdev_priv(netdev); | |
2434 | ||
2435 | wol->supported = WAKE_MAGIC | WAKE_PHY; | |
2436 | ||
2437 | wol->wolopts = 0; | |
2438 | ||
cd0ff491 | 2439 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
29bdd921 GFT |
2440 | wol->wolopts |= WAKE_PHY; |
2441 | ||
cd0ff491 | 2442 | if (jme->reg_pmcs & PMCS_MFEN) |
29bdd921 GFT |
2443 | wol->wolopts |= WAKE_MAGIC; |
2444 | ||
2445 | } | |
2446 | ||
2447 | static int | |
2448 | jme_set_wol(struct net_device *netdev, | |
2449 | struct ethtool_wolinfo *wol) | |
2450 | { | |
2451 | struct jme_adapter *jme = netdev_priv(netdev); | |
2452 | ||
cd0ff491 | 2453 | if (wol->wolopts & (WAKE_MAGICSECURE | |
29bdd921 GFT |
2454 | WAKE_UCAST | |
2455 | WAKE_MCAST | | |
2456 | WAKE_BCAST | | |
2457 | WAKE_ARP)) | |
2458 | return -EOPNOTSUPP; | |
2459 | ||
2460 | jme->reg_pmcs = 0; | |
2461 | ||
cd0ff491 | 2462 | if (wol->wolopts & WAKE_PHY) |
29bdd921 GFT |
2463 | jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN; |
2464 | ||
cd0ff491 | 2465 | if (wol->wolopts & WAKE_MAGIC) |
29bdd921 GFT |
2466 | jme->reg_pmcs |= PMCS_MFEN; |
2467 | ||
cd0ff491 | 2468 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
42b1055e | 2469 | |
29bdd921 GFT |
2470 | return 0; |
2471 | } | |
b3821cc5 | 2472 | |
3bf61c55 GFT |
2473 | static int |
2474 | jme_get_settings(struct net_device *netdev, | |
2475 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2476 | { |
2477 | struct jme_adapter *jme = netdev_priv(netdev); | |
2478 | int rc; | |
8c198884 | 2479 | |
cd0ff491 | 2480 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2481 | rc = mii_ethtool_gset(&(jme->mii_if), ecmd); |
cd0ff491 | 2482 | spin_unlock_bh(&jme->phy_lock); |
d7699f87 GFT |
2483 | return rc; |
2484 | } | |
2485 | ||
3bf61c55 GFT |
2486 | static int |
2487 | jme_set_settings(struct net_device *netdev, | |
2488 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2489 | { |
2490 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2491 | int rc, fdc = 0; |
fcf45b4c | 2492 | |
cd0ff491 | 2493 | if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE) |
8c198884 GFT |
2494 | return -EINVAL; |
2495 | ||
cd0ff491 | 2496 | if (jme->mii_if.force_media && |
79ce639c GFT |
2497 | ecmd->autoneg != AUTONEG_ENABLE && |
2498 | (jme->mii_if.full_duplex != ecmd->duplex)) | |
2499 | fdc = 1; | |
2500 | ||
cd0ff491 | 2501 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2502 | rc = mii_ethtool_sset(&(jme->mii_if), ecmd); |
cd0ff491 | 2503 | spin_unlock_bh(&jme->phy_lock); |
fcf45b4c | 2504 | |
cd0ff491 | 2505 | if (!rc && fdc) |
79ce639c GFT |
2506 | jme_reset_link(jme); |
2507 | ||
cd0ff491 GFT |
2508 | if (!rc) { |
2509 | set_bit(JME_FLAG_SSET, &jme->flags); | |
29bdd921 GFT |
2510 | jme->old_ecmd = *ecmd; |
2511 | } | |
2512 | ||
d7699f87 GFT |
2513 | return rc; |
2514 | } | |
2515 | ||
cd0ff491 | 2516 | static u32 |
3bf61c55 GFT |
2517 | jme_get_link(struct net_device *netdev) |
2518 | { | |
d7699f87 GFT |
2519 | struct jme_adapter *jme = netdev_priv(netdev); |
2520 | return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP; | |
2521 | } | |
2522 | ||
8c198884 | 2523 | static u32 |
cd0ff491 GFT |
2524 | jme_get_msglevel(struct net_device *netdev) |
2525 | { | |
2526 | struct jme_adapter *jme = netdev_priv(netdev); | |
2527 | return jme->msg_enable; | |
2528 | } | |
2529 | ||
2530 | static void | |
2531 | jme_set_msglevel(struct net_device *netdev, u32 value) | |
8c198884 | 2532 | { |
cd0ff491 GFT |
2533 | struct jme_adapter *jme = netdev_priv(netdev); |
2534 | jme->msg_enable = value; | |
2535 | } | |
8c198884 | 2536 | |
cd0ff491 GFT |
2537 | static u32 |
2538 | jme_get_rx_csum(struct net_device *netdev) | |
2539 | { | |
2540 | struct jme_adapter *jme = netdev_priv(netdev); | |
8c198884 GFT |
2541 | return jme->reg_rxmcs & RXMCS_CHECKSUM; |
2542 | } | |
2543 | ||
2544 | static int | |
2545 | jme_set_rx_csum(struct net_device *netdev, u32 on) | |
2546 | { | |
cd0ff491 | 2547 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2548 | |
cd0ff491 GFT |
2549 | spin_lock_bh(&jme->rxmcs_lock); |
2550 | if (on) | |
8c198884 GFT |
2551 | jme->reg_rxmcs |= RXMCS_CHECKSUM; |
2552 | else | |
2553 | jme->reg_rxmcs &= ~RXMCS_CHECKSUM; | |
2554 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
cd0ff491 | 2555 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2556 | |
2557 | return 0; | |
2558 | } | |
2559 | ||
2560 | static int | |
2561 | jme_set_tx_csum(struct net_device *netdev, u32 on) | |
2562 | { | |
cd0ff491 | 2563 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2564 | |
cd0ff491 GFT |
2565 | if (on) { |
2566 | set_bit(JME_FLAG_TXCSUM, &jme->flags); | |
2567 | if (netdev->mtu <= 1900) | |
b3821cc5 | 2568 | netdev->features |= NETIF_F_HW_CSUM; |
cd0ff491 GFT |
2569 | } else { |
2570 | clear_bit(JME_FLAG_TXCSUM, &jme->flags); | |
8c198884 | 2571 | netdev->features &= ~NETIF_F_HW_CSUM; |
b3821cc5 | 2572 | } |
8c198884 GFT |
2573 | |
2574 | return 0; | |
2575 | } | |
2576 | ||
b3821cc5 GFT |
2577 | static int |
2578 | jme_set_tso(struct net_device *netdev, u32 on) | |
2579 | { | |
cd0ff491 | 2580 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2581 | |
cd0ff491 GFT |
2582 | if (on) { |
2583 | set_bit(JME_FLAG_TSO, &jme->flags); | |
2584 | if (netdev->mtu <= 1900) | |
3b70a6fa GFT |
2585 | netdev->features |= NETIF_F_TSO |
2586 | #ifdef NETIF_F_TSO6 | |
2587 | | NETIF_F_TSO6 | |
2588 | #endif | |
2589 | ; | |
cd0ff491 GFT |
2590 | } else { |
2591 | clear_bit(JME_FLAG_TSO, &jme->flags); | |
3b70a6fa GFT |
2592 | netdev->features &= ~(NETIF_F_TSO |
2593 | #ifdef NETIF_F_TSO6 | |
2594 | | NETIF_F_TSO6 | |
2595 | #endif | |
2596 | ); | |
b3821cc5 GFT |
2597 | } |
2598 | ||
cd0ff491 | 2599 | return 0; |
b3821cc5 GFT |
2600 | } |
2601 | ||
8c198884 GFT |
2602 | static int |
2603 | jme_nway_reset(struct net_device *netdev) | |
2604 | { | |
cd0ff491 | 2605 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 GFT |
2606 | jme_restart_an(jme); |
2607 | return 0; | |
2608 | } | |
2609 | ||
cd0ff491 | 2610 | static u8 |
186fc259 GFT |
2611 | jme_smb_read(struct jme_adapter *jme, unsigned int addr) |
2612 | { | |
cd0ff491 | 2613 | u32 val; |
186fc259 GFT |
2614 | int to; |
2615 | ||
2616 | val = jread32(jme, JME_SMBCSR); | |
2617 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2618 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2619 | msleep(1); |
2620 | val = jread32(jme, JME_SMBCSR); | |
2621 | } | |
cd0ff491 | 2622 | if (!to) { |
937ef75a | 2623 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2624 | return 0xFF; |
2625 | } | |
2626 | ||
2627 | jwrite32(jme, JME_SMBINTF, | |
2628 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2629 | SMBINTF_HWRWN_READ | | |
2630 | SMBINTF_HWCMD); | |
2631 | ||
2632 | val = jread32(jme, JME_SMBINTF); | |
2633 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2634 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2635 | msleep(1); |
2636 | val = jread32(jme, JME_SMBINTF); | |
2637 | } | |
cd0ff491 | 2638 | if (!to) { |
937ef75a | 2639 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2640 | return 0xFF; |
2641 | } | |
2642 | ||
2643 | return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT; | |
2644 | } | |
2645 | ||
2646 | static void | |
cd0ff491 | 2647 | jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data) |
186fc259 | 2648 | { |
cd0ff491 | 2649 | u32 val; |
186fc259 GFT |
2650 | int to; |
2651 | ||
2652 | val = jread32(jme, JME_SMBCSR); | |
2653 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2654 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2655 | msleep(1); |
2656 | val = jread32(jme, JME_SMBCSR); | |
2657 | } | |
cd0ff491 | 2658 | if (!to) { |
937ef75a | 2659 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2660 | return; |
2661 | } | |
2662 | ||
2663 | jwrite32(jme, JME_SMBINTF, | |
2664 | ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) | | |
2665 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2666 | SMBINTF_HWRWN_WRITE | | |
2667 | SMBINTF_HWCMD); | |
2668 | ||
2669 | val = jread32(jme, JME_SMBINTF); | |
2670 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2671 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2672 | msleep(1); |
2673 | val = jread32(jme, JME_SMBINTF); | |
2674 | } | |
cd0ff491 | 2675 | if (!to) { |
937ef75a | 2676 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
186fc259 GFT |
2677 | return; |
2678 | } | |
2679 | ||
2680 | mdelay(2); | |
2681 | } | |
2682 | ||
2683 | static int | |
2684 | jme_get_eeprom_len(struct net_device *netdev) | |
2685 | { | |
cd0ff491 GFT |
2686 | struct jme_adapter *jme = netdev_priv(netdev); |
2687 | u32 val; | |
186fc259 | 2688 | val = jread32(jme, JME_SMBCSR); |
cd0ff491 | 2689 | return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0; |
186fc259 GFT |
2690 | } |
2691 | ||
2692 | static int | |
2693 | jme_get_eeprom(struct net_device *netdev, | |
2694 | struct ethtool_eeprom *eeprom, u8 *data) | |
2695 | { | |
cd0ff491 | 2696 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2697 | int i, offset = eeprom->offset, len = eeprom->len; |
2698 | ||
2699 | /* | |
8d27293f | 2700 | * ethtool will check the boundary for us |
186fc259 GFT |
2701 | */ |
2702 | eeprom->magic = JME_EEPROM_MAGIC; | |
cd0ff491 | 2703 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2704 | data[i] = jme_smb_read(jme, i + offset); |
2705 | ||
2706 | return 0; | |
2707 | } | |
2708 | ||
2709 | static int | |
2710 | jme_set_eeprom(struct net_device *netdev, | |
2711 | struct ethtool_eeprom *eeprom, u8 *data) | |
2712 | { | |
cd0ff491 | 2713 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2714 | int i, offset = eeprom->offset, len = eeprom->len; |
2715 | ||
2716 | if (eeprom->magic != JME_EEPROM_MAGIC) | |
2717 | return -EINVAL; | |
2718 | ||
2719 | /* | |
8d27293f | 2720 | * ethtool will check the boundary for us |
186fc259 | 2721 | */ |
cd0ff491 | 2722 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2723 | jme_smb_write(jme, i + offset, data[i]); |
2724 | ||
2725 | return 0; | |
2726 | } | |
2727 | ||
3b70a6fa GFT |
2728 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18) |
2729 | static struct ethtool_ops jme_ethtool_ops = { | |
2730 | #else | |
d7699f87 | 2731 | static const struct ethtool_ops jme_ethtool_ops = { |
3b70a6fa | 2732 | #endif |
cd0ff491 | 2733 | .get_drvinfo = jme_get_drvinfo, |
8c198884 GFT |
2734 | .get_regs_len = jme_get_regs_len, |
2735 | .get_regs = jme_get_regs, | |
2736 | .get_coalesce = jme_get_coalesce, | |
192570e0 | 2737 | .set_coalesce = jme_set_coalesce, |
cd0ff491 GFT |
2738 | .get_pauseparam = jme_get_pauseparam, |
2739 | .set_pauseparam = jme_set_pauseparam, | |
29bdd921 GFT |
2740 | .get_wol = jme_get_wol, |
2741 | .set_wol = jme_set_wol, | |
d7699f87 GFT |
2742 | .get_settings = jme_get_settings, |
2743 | .set_settings = jme_set_settings, | |
2744 | .get_link = jme_get_link, | |
cd0ff491 GFT |
2745 | .get_msglevel = jme_get_msglevel, |
2746 | .set_msglevel = jme_set_msglevel, | |
8c198884 GFT |
2747 | .get_rx_csum = jme_get_rx_csum, |
2748 | .set_rx_csum = jme_set_rx_csum, | |
2749 | .set_tx_csum = jme_set_tx_csum, | |
b3821cc5 GFT |
2750 | .set_tso = jme_set_tso, |
2751 | .set_sg = ethtool_op_set_sg, | |
8c198884 | 2752 | .nway_reset = jme_nway_reset, |
186fc259 GFT |
2753 | .get_eeprom_len = jme_get_eeprom_len, |
2754 | .get_eeprom = jme_get_eeprom, | |
2755 | .set_eeprom = jme_set_eeprom, | |
d7699f87 GFT |
2756 | }; |
2757 | ||
3bf61c55 GFT |
2758 | static int |
2759 | jme_pci_dma64(struct pci_dev *pdev) | |
d7699f87 | 2760 | { |
3b70a6fa | 2761 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
0ede469c GFT |
2762 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
2763 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) | |
2764 | #else | |
2765 | !pci_set_dma_mask(pdev, DMA_64BIT_MASK) | |
2766 | #endif | |
2767 | ) | |
2768 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) | |
2769 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) | |
2770 | #else | |
cd0ff491 | 2771 | if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) |
0ede469c | 2772 | #endif |
3bf61c55 GFT |
2773 | return 1; |
2774 | ||
3b70a6fa | 2775 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
0ede469c GFT |
2776 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
2777 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(40)) | |
2778 | #else | |
2779 | !pci_set_dma_mask(pdev, DMA_40BIT_MASK) | |
2780 | #endif | |
2781 | ) | |
2782 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) | |
2783 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40))) | |
2784 | #else | |
cd0ff491 | 2785 | if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK)) |
0ede469c | 2786 | #endif |
8c198884 GFT |
2787 | return 1; |
2788 | ||
0ede469c GFT |
2789 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
2790 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) | |
2791 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) | |
2792 | #else | |
cd0ff491 GFT |
2793 | if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) |
2794 | if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) | |
0ede469c | 2795 | #endif |
3bf61c55 GFT |
2796 | return 0; |
2797 | ||
2798 | return -1; | |
2799 | } | |
2800 | ||
cd0ff491 | 2801 | static inline void |
cdcdc9eb GFT |
2802 | jme_phy_init(struct jme_adapter *jme) |
2803 | { | |
cd0ff491 | 2804 | u16 reg26; |
cdcdc9eb GFT |
2805 | |
2806 | reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26); | |
2807 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000); | |
2808 | } | |
2809 | ||
cd0ff491 | 2810 | static inline void |
cdcdc9eb | 2811 | jme_check_hw_ver(struct jme_adapter *jme) |
42b1055e | 2812 | { |
cd0ff491 | 2813 | u32 chipmode; |
cdcdc9eb GFT |
2814 | |
2815 | chipmode = jread32(jme, JME_CHIPMODE); | |
2816 | ||
2817 | jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT; | |
58c92f28 | 2818 | jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT; |
42b1055e GFT |
2819 | } |
2820 | ||
3b70a6fa GFT |
2821 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
2822 | static const struct net_device_ops jme_netdev_ops = { | |
2823 | .ndo_open = jme_open, | |
2824 | .ndo_stop = jme_close, | |
2825 | .ndo_validate_addr = eth_validate_addr, | |
2826 | .ndo_start_xmit = jme_start_xmit, | |
2827 | .ndo_set_mac_address = jme_set_macaddr, | |
2828 | .ndo_set_multicast_list = jme_set_multi, | |
2829 | .ndo_change_mtu = jme_change_mtu, | |
2830 | .ndo_tx_timeout = jme_tx_timeout, | |
2831 | .ndo_vlan_rx_register = jme_vlan_rx_register, | |
2832 | }; | |
2833 | #endif | |
2834 | ||
3bf61c55 GFT |
2835 | static int __devinit |
2836 | jme_init_one(struct pci_dev *pdev, | |
2837 | const struct pci_device_id *ent) | |
2838 | { | |
cdcdc9eb | 2839 | int rc = 0, using_dac, i; |
d7699f87 GFT |
2840 | struct net_device *netdev; |
2841 | struct jme_adapter *jme; | |
cd0ff491 GFT |
2842 | u16 bmcr, bmsr; |
2843 | u32 apmc; | |
d7699f87 GFT |
2844 | |
2845 | /* | |
2846 | * set up PCI device basics | |
2847 | */ | |
4330c2f2 | 2848 | rc = pci_enable_device(pdev); |
cd0ff491 | 2849 | if (rc) { |
937ef75a | 2850 | pr_err("Cannot enable PCI device\n"); |
4330c2f2 GFT |
2851 | goto err_out; |
2852 | } | |
d7699f87 | 2853 | |
3bf61c55 | 2854 | using_dac = jme_pci_dma64(pdev); |
cd0ff491 | 2855 | if (using_dac < 0) { |
937ef75a | 2856 | pr_err("Cannot set PCI DMA Mask\n"); |
3bf61c55 GFT |
2857 | rc = -EIO; |
2858 | goto err_out_disable_pdev; | |
2859 | } | |
2860 | ||
cd0ff491 | 2861 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
937ef75a | 2862 | pr_err("No PCI resource region found\n"); |
4330c2f2 GFT |
2863 | rc = -ENOMEM; |
2864 | goto err_out_disable_pdev; | |
2865 | } | |
d7699f87 | 2866 | |
4330c2f2 | 2867 | rc = pci_request_regions(pdev, DRV_NAME); |
cd0ff491 | 2868 | if (rc) { |
937ef75a | 2869 | pr_err("Cannot obtain PCI resource region\n"); |
4330c2f2 GFT |
2870 | goto err_out_disable_pdev; |
2871 | } | |
d7699f87 GFT |
2872 | |
2873 | pci_set_master(pdev); | |
2874 | ||
2875 | /* | |
2876 | * alloc and init net device | |
2877 | */ | |
3bf61c55 | 2878 | netdev = alloc_etherdev(sizeof(*jme)); |
cd0ff491 | 2879 | if (!netdev) { |
937ef75a | 2880 | pr_err("Cannot allocate netdev structure\n"); |
4330c2f2 GFT |
2881 | rc = -ENOMEM; |
2882 | goto err_out_release_regions; | |
d7699f87 | 2883 | } |
3b70a6fa GFT |
2884 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) |
2885 | netdev->netdev_ops = &jme_netdev_ops; | |
2886 | #else | |
d7699f87 GFT |
2887 | netdev->open = jme_open; |
2888 | netdev->stop = jme_close; | |
2889 | netdev->hard_start_xmit = jme_start_xmit; | |
d7699f87 GFT |
2890 | netdev->set_mac_address = jme_set_macaddr; |
2891 | netdev->set_multicast_list = jme_set_multi; | |
2892 | netdev->change_mtu = jme_change_mtu; | |
8c198884 | 2893 | netdev->tx_timeout = jme_tx_timeout; |
42b1055e | 2894 | netdev->vlan_rx_register = jme_vlan_rx_register; |
7ca9ebee GFT |
2895 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21) |
2896 | netdev->vlan_rx_kill_vid = jme_vlan_rx_kill_vid; | |
2897 | #endif | |
3bf61c55 | 2898 | NETDEV_GET_STATS(netdev, &jme_get_stats); |
3b70a6fa GFT |
2899 | #endif |
2900 | netdev->ethtool_ops = &jme_ethtool_ops; | |
2901 | netdev->watchdog_timeo = TX_TIMEOUT; | |
42b1055e | 2902 | netdev->features = NETIF_F_HW_CSUM | |
b3821cc5 GFT |
2903 | NETIF_F_SG | |
2904 | NETIF_F_TSO | | |
3b70a6fa | 2905 | #ifdef NETIF_F_TSO6 |
b3821cc5 | 2906 | NETIF_F_TSO6 | |
3b70a6fa | 2907 | #endif |
42b1055e GFT |
2908 | NETIF_F_HW_VLAN_TX | |
2909 | NETIF_F_HW_VLAN_RX; | |
cd0ff491 | 2910 | if (using_dac) |
8c198884 | 2911 | netdev->features |= NETIF_F_HIGHDMA; |
d7699f87 GFT |
2912 | |
2913 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
2914 | pci_set_drvdata(pdev, netdev); | |
2915 | ||
2916 | /* | |
2917 | * init adapter info | |
2918 | */ | |
2919 | jme = netdev_priv(netdev); | |
2920 | jme->pdev = pdev; | |
2921 | jme->dev = netdev; | |
cdcdc9eb GFT |
2922 | jme->jme_rx = netif_rx; |
2923 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
29bdd921 | 2924 | jme->old_mtu = netdev->mtu = 1500; |
fcf45b4c | 2925 | jme->phylink = 0; |
b3821cc5 | 2926 | jme->tx_ring_size = 1 << 10; |
0ede469c | 2927 | jme->tx_ring_mask = jme->tx_ring_size - 1; |
b3821cc5 GFT |
2928 | jme->tx_wake_threshold = 1 << 9; |
2929 | jme->rx_ring_size = 1 << 9; | |
2930 | jme->rx_ring_mask = jme->rx_ring_size - 1; | |
cd0ff491 | 2931 | jme->msg_enable = JME_DEF_MSG_ENABLE; |
d7699f87 GFT |
2932 | jme->regs = ioremap(pci_resource_start(pdev, 0), |
2933 | pci_resource_len(pdev, 0)); | |
4330c2f2 | 2934 | if (!(jme->regs)) { |
937ef75a | 2935 | pr_err("Mapping PCI resource region error\n"); |
d7699f87 GFT |
2936 | rc = -ENOMEM; |
2937 | goto err_out_free_netdev; | |
2938 | } | |
4330c2f2 | 2939 | |
cd0ff491 GFT |
2940 | if (no_pseudohp) { |
2941 | apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN; | |
2942 | jwrite32(jme, JME_APMC, apmc); | |
2943 | } else if (force_pseudohp) { | |
2944 | apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN; | |
2945 | jwrite32(jme, JME_APMC, apmc); | |
2946 | } | |
2947 | ||
cdcdc9eb | 2948 | NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2) |
192570e0 | 2949 | |
d7699f87 | 2950 | spin_lock_init(&jme->phy_lock); |
fcf45b4c | 2951 | spin_lock_init(&jme->macaddr_lock); |
8c198884 | 2952 | spin_lock_init(&jme->rxmcs_lock); |
fcf45b4c | 2953 | |
fcf45b4c GFT |
2954 | atomic_set(&jme->link_changing, 1); |
2955 | atomic_set(&jme->rx_cleaning, 1); | |
2956 | atomic_set(&jme->tx_cleaning, 1); | |
192570e0 | 2957 | atomic_set(&jme->rx_empty, 1); |
fcf45b4c | 2958 | |
79ce639c | 2959 | tasklet_init(&jme->pcc_task, |
7ca9ebee | 2960 | jme_pcc_tasklet, |
79ce639c | 2961 | (unsigned long) jme); |
4330c2f2 | 2962 | tasklet_init(&jme->linkch_task, |
7ca9ebee | 2963 | jme_link_change_tasklet, |
4330c2f2 GFT |
2964 | (unsigned long) jme); |
2965 | tasklet_init(&jme->txclean_task, | |
7ca9ebee | 2966 | jme_tx_clean_tasklet, |
4330c2f2 GFT |
2967 | (unsigned long) jme); |
2968 | tasklet_init(&jme->rxclean_task, | |
7ca9ebee | 2969 | jme_rx_clean_tasklet, |
4330c2f2 | 2970 | (unsigned long) jme); |
fcf45b4c | 2971 | tasklet_init(&jme->rxempty_task, |
7ca9ebee | 2972 | jme_rx_empty_tasklet, |
fcf45b4c | 2973 | (unsigned long) jme); |
0ede469c | 2974 | tasklet_disable_nosync(&jme->linkch_task); |
cd0ff491 GFT |
2975 | tasklet_disable_nosync(&jme->txclean_task); |
2976 | tasklet_disable_nosync(&jme->rxclean_task); | |
2977 | tasklet_disable_nosync(&jme->rxempty_task); | |
8c198884 GFT |
2978 | jme->dpi.cur = PCC_P1; |
2979 | ||
cd0ff491 | 2980 | jme->reg_ghc = 0; |
79ce639c | 2981 | jme->reg_rxcs = RXCS_DEFAULT; |
8c198884 GFT |
2982 | jme->reg_rxmcs = RXMCS_DEFAULT; |
2983 | jme->reg_txpfc = 0; | |
47220951 | 2984 | jme->reg_pmcs = PMCS_MFEN; |
cd0ff491 GFT |
2985 | set_bit(JME_FLAG_TXCSUM, &jme->flags); |
2986 | set_bit(JME_FLAG_TSO, &jme->flags); | |
192570e0 | 2987 | |
fcf45b4c GFT |
2988 | /* |
2989 | * Get Max Read Req Size from PCI Config Space | |
2990 | */ | |
cd0ff491 GFT |
2991 | pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs); |
2992 | jme->mrrs &= PCI_DCSR_MRRS_MASK; | |
2993 | switch (jme->mrrs) { | |
2994 | case MRRS_128B: | |
2995 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; | |
2996 | break; | |
2997 | case MRRS_256B: | |
2998 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; | |
2999 | break; | |
3000 | default: | |
3001 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; | |
3002 | break; | |
cd54cf32 | 3003 | } |
fcf45b4c | 3004 | |
d7699f87 | 3005 | /* |
cdcdc9eb | 3006 | * Must check before reset_mac_processor |
d7699f87 | 3007 | */ |
cdcdc9eb GFT |
3008 | jme_check_hw_ver(jme); |
3009 | jme->mii_if.dev = netdev; | |
cd0ff491 | 3010 | if (jme->fpgaver) { |
cdcdc9eb | 3011 | jme->mii_if.phy_id = 0; |
cd0ff491 | 3012 | for (i = 1 ; i < 32 ; ++i) { |
cdcdc9eb GFT |
3013 | bmcr = jme_mdio_read(netdev, i, MII_BMCR); |
3014 | bmsr = jme_mdio_read(netdev, i, MII_BMSR); | |
cd0ff491 | 3015 | if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { |
cdcdc9eb GFT |
3016 | jme->mii_if.phy_id = i; |
3017 | break; | |
3018 | } | |
3019 | } | |
3020 | ||
cd0ff491 | 3021 | if (!jme->mii_if.phy_id) { |
cdcdc9eb | 3022 | rc = -EIO; |
937ef75a JP |
3023 | pr_err("Can not find phy_id\n"); |
3024 | goto err_out_unmap; | |
cdcdc9eb GFT |
3025 | } |
3026 | ||
3027 | jme->reg_ghc |= GHC_LINK_POLL; | |
cd0ff491 | 3028 | } else { |
cdcdc9eb GFT |
3029 | jme->mii_if.phy_id = 1; |
3030 | } | |
cd0ff491 | 3031 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
3032 | jme->mii_if.supports_gmii = true; |
3033 | else | |
3034 | jme->mii_if.supports_gmii = false; | |
cdcdc9eb GFT |
3035 | jme->mii_if.mdio_read = jme_mdio_read; |
3036 | jme->mii_if.mdio_write = jme_mdio_write; | |
3037 | ||
d7699f87 | 3038 | jme_clear_pm(jme); |
58c92f28 | 3039 | jme_set_phyfifoa(jme); |
cd0ff491 GFT |
3040 | pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev); |
3041 | if (!jme->fpgaver) | |
cdcdc9eb | 3042 | jme_phy_init(jme); |
42b1055e | 3043 | jme_phy_off(jme); |
cdcdc9eb GFT |
3044 | |
3045 | /* | |
3046 | * Reset MAC processor and reload EEPROM for MAC Address | |
3047 | */ | |
d7699f87 | 3048 | jme_reset_mac_processor(jme); |
4330c2f2 | 3049 | rc = jme_reload_eeprom(jme); |
cd0ff491 | 3050 | if (rc) { |
937ef75a | 3051 | pr_err("Reload eeprom for reading MAC Address error\n"); |
0ede469c | 3052 | goto err_out_unmap; |
4330c2f2 | 3053 | } |
d7699f87 GFT |
3054 | jme_load_macaddr(netdev); |
3055 | ||
d7699f87 GFT |
3056 | /* |
3057 | * Tell stack that we are not ready to work until open() | |
3058 | */ | |
3059 | netif_carrier_off(netdev); | |
3060 | netif_stop_queue(netdev); | |
3061 | ||
3062 | /* | |
3063 | * Register netdev | |
3064 | */ | |
4330c2f2 | 3065 | rc = register_netdev(netdev); |
cd0ff491 | 3066 | if (rc) { |
937ef75a | 3067 | pr_err("Cannot register net device\n"); |
0ede469c | 3068 | goto err_out_unmap; |
4330c2f2 | 3069 | } |
d7699f87 | 3070 | |
937ef75a JP |
3071 | netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x " |
3072 | "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n", | |
7ca9ebee GFT |
3073 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ? |
3074 | "JMC250 Gigabit Ethernet" : | |
3075 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ? | |
3076 | "JMC260 Fast Ethernet" : "Unknown", | |
3077 | (jme->fpgaver != 0) ? " (FPGA)" : "", | |
3078 | (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev, | |
937ef75a JP |
3079 | jme->rev, |
3080 | netdev->dev_addr[0], | |
3081 | netdev->dev_addr[1], | |
3082 | netdev->dev_addr[2], | |
3083 | netdev->dev_addr[3], | |
3084 | netdev->dev_addr[4], | |
3085 | netdev->dev_addr[5]); | |
d7699f87 GFT |
3086 | |
3087 | return 0; | |
3088 | ||
3089 | err_out_unmap: | |
3090 | iounmap(jme->regs); | |
3091 | err_out_free_netdev: | |
3092 | pci_set_drvdata(pdev, NULL); | |
3093 | free_netdev(netdev); | |
4330c2f2 GFT |
3094 | err_out_release_regions: |
3095 | pci_release_regions(pdev); | |
d7699f87 | 3096 | err_out_disable_pdev: |
cd0ff491 | 3097 | pci_disable_device(pdev); |
d7699f87 | 3098 | err_out: |
4330c2f2 | 3099 | return rc; |
d7699f87 GFT |
3100 | } |
3101 | ||
3bf61c55 GFT |
3102 | static void __devexit |
3103 | jme_remove_one(struct pci_dev *pdev) | |
3104 | { | |
d7699f87 GFT |
3105 | struct net_device *netdev = pci_get_drvdata(pdev); |
3106 | struct jme_adapter *jme = netdev_priv(netdev); | |
3107 | ||
3108 | unregister_netdev(netdev); | |
3109 | iounmap(jme->regs); | |
3110 | pci_set_drvdata(pdev, NULL); | |
3111 | free_netdev(netdev); | |
3112 | pci_release_regions(pdev); | |
3113 | pci_disable_device(pdev); | |
3114 | ||
3115 | } | |
3116 | ||
7ee473a3 | 3117 | #ifdef CONFIG_PM |
29bdd921 GFT |
3118 | static int |
3119 | jme_suspend(struct pci_dev *pdev, pm_message_t state) | |
3120 | { | |
3121 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3122 | struct jme_adapter *jme = netdev_priv(netdev); | |
29bdd921 GFT |
3123 | |
3124 | atomic_dec(&jme->link_changing); | |
3125 | ||
3126 | netif_device_detach(netdev); | |
3127 | netif_stop_queue(netdev); | |
3128 | jme_stop_irq(jme); | |
29bdd921 | 3129 | |
cd0ff491 GFT |
3130 | tasklet_disable(&jme->txclean_task); |
3131 | tasklet_disable(&jme->rxclean_task); | |
3132 | tasklet_disable(&jme->rxempty_task); | |
3133 | ||
cd0ff491 GFT |
3134 | if (netif_carrier_ok(netdev)) { |
3135 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
47220951 GFT |
3136 | jme_polling_mode(jme); |
3137 | ||
29bdd921 | 3138 | jme_stop_pcc_timer(jme); |
cd0ff491 GFT |
3139 | jme_reset_ghc_speed(jme); |
3140 | jme_disable_rx_engine(jme); | |
3141 | jme_disable_tx_engine(jme); | |
29bdd921 GFT |
3142 | jme_reset_mac_processor(jme); |
3143 | jme_free_rx_resources(jme); | |
3144 | jme_free_tx_resources(jme); | |
3145 | netif_carrier_off(netdev); | |
3146 | jme->phylink = 0; | |
3147 | } | |
3148 | ||
cd0ff491 GFT |
3149 | tasklet_enable(&jme->txclean_task); |
3150 | tasklet_hi_enable(&jme->rxclean_task); | |
3151 | tasklet_hi_enable(&jme->rxempty_task); | |
29bdd921 GFT |
3152 | |
3153 | pci_save_state(pdev); | |
cd0ff491 | 3154 | if (jme->reg_pmcs) { |
42b1055e | 3155 | jme_set_100m_half(jme); |
47220951 | 3156 | |
cd0ff491 | 3157 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
47220951 GFT |
3158 | jme_wait_link(jme); |
3159 | ||
29bdd921 | 3160 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
cd0ff491 | 3161 | |
42b1055e | 3162 | pci_enable_wake(pdev, PCI_D3cold, true); |
cd0ff491 | 3163 | } else { |
42b1055e | 3164 | jme_phy_off(jme); |
29bdd921 | 3165 | } |
cd0ff491 | 3166 | pci_set_power_state(pdev, PCI_D3cold); |
29bdd921 GFT |
3167 | |
3168 | return 0; | |
3169 | } | |
3170 | ||
3171 | static int | |
3172 | jme_resume(struct pci_dev *pdev) | |
3173 | { | |
3174 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3175 | struct jme_adapter *jme = netdev_priv(netdev); | |
3176 | ||
3177 | jme_clear_pm(jme); | |
3178 | pci_restore_state(pdev); | |
3179 | ||
e58b908e GFT |
3180 | if (test_bit(JME_FLAG_SSET, &jme->flags)) { |
3181 | jme_phy_on(jme); | |
29bdd921 | 3182 | jme_set_settings(netdev, &jme->old_ecmd); |
e58b908e | 3183 | } else { |
29bdd921 | 3184 | jme_reset_phy_processor(jme); |
e58b908e | 3185 | } |
29bdd921 | 3186 | |
29bdd921 GFT |
3187 | jme_start_irq(jme); |
3188 | netif_device_attach(netdev); | |
3189 | ||
3190 | atomic_inc(&jme->link_changing); | |
3191 | ||
3192 | jme_reset_link(jme); | |
3193 | ||
3194 | return 0; | |
3195 | } | |
7ee473a3 | 3196 | #endif |
29bdd921 | 3197 | |
7ca9ebee | 3198 | #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24) |
d7699f87 | 3199 | static struct pci_device_id jme_pci_tbl[] = { |
7ca9ebee GFT |
3200 | #else |
3201 | static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = { | |
3202 | #endif | |
cd0ff491 GFT |
3203 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) }, |
3204 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) }, | |
d7699f87 GFT |
3205 | { } |
3206 | }; | |
3207 | ||
3208 | static struct pci_driver jme_driver = { | |
cd0ff491 GFT |
3209 | .name = DRV_NAME, |
3210 | .id_table = jme_pci_tbl, | |
3211 | .probe = jme_init_one, | |
3212 | .remove = __devexit_p(jme_remove_one), | |
d7699f87 | 3213 | #ifdef CONFIG_PM |
cd0ff491 GFT |
3214 | .suspend = jme_suspend, |
3215 | .resume = jme_resume, | |
d7699f87 | 3216 | #endif /* CONFIG_PM */ |
d7699f87 GFT |
3217 | }; |
3218 | ||
3bf61c55 GFT |
3219 | static int __init |
3220 | jme_init_module(void) | |
d7699f87 | 3221 | { |
937ef75a | 3222 | pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION); |
d7699f87 GFT |
3223 | return pci_register_driver(&jme_driver); |
3224 | } | |
3225 | ||
3bf61c55 GFT |
3226 | static void __exit |
3227 | jme_cleanup_module(void) | |
d7699f87 GFT |
3228 | { |
3229 | pci_unregister_driver(&jme_driver); | |
3230 | } | |
3231 | ||
3232 | module_init(jme_init_module); | |
3233 | module_exit(jme_cleanup_module); | |
3234 | ||
3bf61c55 | 3235 | MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>"); |
d7699f87 GFT |
3236 | MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver"); |
3237 | MODULE_LICENSE("GPL"); | |
3238 | MODULE_VERSION(DRV_VERSION); | |
3239 | MODULE_DEVICE_TABLE(pci, jme_pci_tbl); | |
3240 |