]> bbs.cooldavid.org Git - net-next-2.6.git/commitdiff
mfd: Add WM831x revision B support
authorMark Brown <broonie@opensource.wolfsonmicro.com>
Wed, 17 Feb 2010 18:45:25 +0000 (18:45 +0000)
committerSamuel Ortiz <sameo@linux.intel.com>
Sun, 7 Mar 2010 21:17:29 +0000 (22:17 +0100)
Revision B of the WM831x devices changes the sense of the tristate
bit for GPIO configuration, inverting it to become an enable instead.
Take account of this in the gpiolib driver.

A current sink regulation status bit has also been added in revision B,
add a flag indicating if it's present but don't use it yet.

This revision also adds an interrupt on key up for the ON pin event
which the existing code is able to take advantage of.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
drivers/gpio/wm831x-gpio.c
drivers/mfd/wm831x-core.c
include/linux/mfd/wm831x/core.h
include/linux/mfd/wm831x/gpio.h

index 2554180534a18ec8f0260fd636836754204ad524..5b8dc098d80ffc5b729dcae6e96d104f4cd107c7 100644 (file)
@@ -38,10 +38,13 @@ static int wm831x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
 {
        struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
        struct wm831x *wm831x = wm831x_gpio->wm831x;
+       int val = WM831X_GPN_DIR;
+
+       if (wm831x->has_gpio_ena)
+               val |= WM831X_GPN_TRI;
 
        return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
-                              WM831X_GPN_DIR | WM831X_GPN_TRI,
-                              WM831X_GPN_DIR);
+                              WM831X_GPN_DIR | WM831X_GPN_TRI, val);
 }
 
 static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset)
@@ -74,10 +77,14 @@ static int wm831x_gpio_direction_out(struct gpio_chip *chip,
 {
        struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
        struct wm831x *wm831x = wm831x_gpio->wm831x;
+       int val = 0;
        int ret;
 
+       if (wm831x->has_gpio_ena)
+               val |= WM831X_GPN_TRI;
+
        ret = wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
-                             WM831X_GPN_DIR | WM831X_GPN_TRI, 0);
+                             WM831X_GPN_DIR | WM831X_GPN_TRI, val);
        if (ret < 0)
                return ret;
 
@@ -103,7 +110,7 @@ static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
 {
        struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
        struct wm831x *wm831x = wm831x_gpio->wm831x;
-       int i;
+       int i, tristated;
 
        for (i = 0; i < chip->ngpio; i++) {
                int gpio = i + chip->base;
@@ -170,6 +177,10 @@ static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
                        break;
                }
 
+               tristated = reg & WM831X_GPN_TRI;
+               if (wm831x->has_gpio_ena)
+                       tristated = !tristated;
+
                seq_printf(s, " %s %s %s %s%s\n"
                           "                                  %s%s (0x%4x)\n",
                           reg & WM831X_GPN_DIR ? "in" : "out",
@@ -178,7 +189,7 @@ static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
                           powerdomain,
                           reg & WM831X_GPN_POL ? "" : " inverted",
                           reg & WM831X_GPN_OD ? "open-drain" : "CMOS",
-                          reg & WM831X_GPN_TRI ? " tristated" : "",
+                          tristated ? " tristated" : "",
                           reg);
        }
 }
index 4b2021af1d9646be71d5a257c9adc0ded9b8052d..c428d9f918fc79dc48f3cd8bdb264f3242669a2b 100644 (file)
@@ -1449,18 +1449,33 @@ static int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)
        case WM8310:
                parent = WM8310;
                wm831x->num_gpio = 16;
+               if (rev > 0) {
+                       wm831x->has_gpio_ena = 1;
+                       wm831x->has_cs_sts = 1;
+               }
+
                dev_info(wm831x->dev, "WM8310 revision %c\n", 'A' + rev);
                break;
 
        case WM8311:
                parent = WM8311;
                wm831x->num_gpio = 16;
+               if (rev > 0) {
+                       wm831x->has_gpio_ena = 1;
+                       wm831x->has_cs_sts = 1;
+               }
+
                dev_info(wm831x->dev, "WM8311 revision %c\n", 'A' + rev);
                break;
 
        case WM8312:
                parent = WM8312;
                wm831x->num_gpio = 16;
+               if (rev > 0) {
+                       wm831x->has_gpio_ena = 1;
+                       wm831x->has_cs_sts = 1;
+               }
+
                dev_info(wm831x->dev, "WM8312 revision %c\n", 'A' + rev);
                break;
 
index 5184b79c700bdc0c7df7ba5016df71e7d2d85665..53580b592bc9ac639d35fec7a823913859b5b0d9 100644 (file)
@@ -254,6 +254,10 @@ struct wm831x {
        int irq_masks_cur[WM831X_NUM_IRQ_REGS];   /* Currently active value */
        int irq_masks_cache[WM831X_NUM_IRQ_REGS]; /* Cached hardware value */
 
+       /* Chip revision based flags */
+       unsigned has_gpio_ena:1;  /* Has GPIO enable bit */
+       unsigned has_cs_sts:1;    /* Has current sink status bit */
+
        int num_gpio;
 
        struct mutex auxadc_lock;
index 2835614af0e341836023b20a3b50c5de6b2f1e11..9b163c58865fe17d9516197dcc010d7a8e14aa60 100644 (file)
 #define WM831X_GPN_OD_MASK                      0x0200  /* GPN_OD */
 #define WM831X_GPN_OD_SHIFT                          9  /* GPN_OD */
 #define WM831X_GPN_OD_WIDTH                          1  /* GPN_OD */
+#define WM831X_GPN_ENA                          0x0080  /* GPN_ENA */
+#define WM831X_GPN_ENA_MASK                     0x0080  /* GPN_ENA */
+#define WM831X_GPN_ENA_SHIFT                         7  /* GPN_ENA */
+#define WM831X_GPN_ENA_WIDTH                         1  /* GPN_ENA */
 #define WM831X_GPN_TRI                          0x0080  /* GPN_TRI */
 #define WM831X_GPN_TRI_MASK                     0x0080  /* GPN_TRI */
 #define WM831X_GPN_TRI_SHIFT                         7  /* GPN_TRI */