]> bbs.cooldavid.org Git - net-next-2.6.git/commitdiff
ARM: S5PV310: Fix on PLL setting for S5PV310
authorJongpill Lee <boyko.lee@samsung.com>
Wed, 18 Aug 2010 13:13:49 +0000 (22:13 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Fri, 27 Aug 2010 09:06:54 +0000 (18:06 +0900)
This patch fixes on PLL setting for S5PV310/S5PC210.

Signed-off-by: Jongpill Lee <boyko.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-s5pv310/clock.c

index 77f2b4d85e6bb09a91bcdcb0ef32e16afda16f84..1659eb1e7b07807b2ab1eeeec1b69fd427a74ff2 100644 (file)
@@ -470,11 +470,11 @@ void __init_or_cpufreq s5pv310_setup_clocks(void)
        apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON0), pll_4508);
        mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON0), pll_4508);
        epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON0),
-                               __raw_readl(S5P_EPLL_CON1), pll_4500);
+                               __raw_readl(S5P_EPLL_CON1), pll_4600);
 
        vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
        vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
-                               __raw_readl(S5P_VPLL_CON1), pll_4502);
+                               __raw_readl(S5P_VPLL_CON1), pll_4650);
 
        clk_fout_apll.rate = apll;
        clk_fout_mpll.rate = mpll;