]> bbs.cooldavid.org Git - net-next-2.6.git/commitdiff
omap: Split OMAP2_IO_ADDRESS to L3 and L4
authorSantosh Shilimkar <santosh.shilimkar@ti.com>
Mon, 19 Oct 2009 22:25:31 +0000 (15:25 -0700)
committerTony Lindgren <tony@atomide.com>
Mon, 19 Oct 2009 22:25:31 +0000 (15:25 -0700)
This patch splits OMAP2_IO_ADDRESS to OMAP2_L3_IO_ADDRESS and
OMAP2_L4_IO_ADDRESS to reclaim more IO space.

The omap_read*() and omap_write*() functions will work only over
L4 address space. Current omap kernel stack uses these functions
only to access registers over L4 io address space

Note that these macros should only be used when ioremap does
not work. Please use ioremap instead in all new code.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
13 files changed:
arch/arm/mach-omap2/cm.h
arch/arm/mach-omap2/pm-debug.c
arch/arm/mach-omap2/prm.h
arch/arm/mach-omap2/sdrc.h
arch/arm/mach-omap2/sram242x.S
arch/arm/mach-omap2/sram243x.S
arch/arm/plat-omap/common.c
arch/arm/plat-omap/include/mach/control.h
arch/arm/plat-omap/include/mach/entry-macro.S
arch/arm/plat-omap/include/mach/io.h
arch/arm/plat-omap/include/mach/sdrc.h
arch/arm/plat-omap/io.c
arch/arm/plat-omap/sram.c

index cfd0b726ba442544d99c75632443a55dda36f388..a2fcfcc253cc4a6519db7bf5d6729c2cbde2e7d1 100644 (file)
 #include "prcm-common.h"
 
 #define OMAP2420_CM_REGADDR(module, reg)                               \
-                       OMAP2_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
+                       OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
 #define OMAP2430_CM_REGADDR(module, reg)                               \
-                       OMAP2_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
+                       OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
 #define OMAP34XX_CM_REGADDR(module, reg)                               \
-                       OMAP2_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
+                       OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
 
 /*
  * Architecture-specific global CM registers
index 2fc4d6abbd0a8a22a580542b93fb838a565b13b3..deed1ddd039aace2e88707d3c4c1aeec69529013 100644 (file)
@@ -51,7 +51,8 @@ int omap2_pm_debug;
        regs[reg_count++].val = __raw_readl(reg)
 #define DUMP_INTC_REG(reg, off) \
        regs[reg_count].name = #reg; \
-       regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off)))
+       regs[reg_count++].val = \
+                        __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off)))
 
 static int __init pm_dbg_init(void);
 
index 03c467c35f54b81aaf3d84fc16dfc57c543c4eb4..a117f853ea39212ac21d144a6016bdf13f2bf000 100644 (file)
 #include "prcm-common.h"
 
 #define OMAP2420_PRM_REGADDR(module, reg)                              \
-                       OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
+               OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
 #define OMAP2430_PRM_REGADDR(module, reg)                              \
-                       OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
+               OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
 #define OMAP34XX_PRM_REGADDR(module, reg)                              \
-                       OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
+               OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
 
 /*
  * Architecture-specific global PRM registers
index 0837eda5f2b6a868fdcc7d4f9288502b31fe98e2..345183dbc7fb759bf2c8045f55bca648a4368616 100644 (file)
@@ -48,9 +48,12 @@ static inline u32 sms_read_reg(u16 reg)
        return __raw_readl(OMAP_SMS_REGADDR(reg));
 }
 #else
-#define OMAP242X_SDRC_REGADDR(reg)     OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
-#define OMAP243X_SDRC_REGADDR(reg)     OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
-#define OMAP34XX_SDRC_REGADDR(reg)     OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
+#define OMAP242X_SDRC_REGADDR(reg)                                     \
+                       OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
+#define OMAP243X_SDRC_REGADDR(reg)                                     \
+                       OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
+#define OMAP34XX_SDRC_REGADDR(reg)                                     \
+                       OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
 #endif /* __ASSEMBLER__ */
 
 #endif
index 9b62208658bc47900385a0fdf17a9acea38f38f8..92e6e1a12af863630fcac7be810f3207afb02fca 100644 (file)
@@ -128,7 +128,7 @@ omap242x_sdi_prcm_voltctrl:
 prcm_mask_val:
        .word 0xFFFF3FFC
 omap242x_sdi_timer_32ksynct_cr:
-       .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
+       .word OMAP2_L4_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
 ENTRY(omap242x_sram_ddr_init_sz)
        .word   . - omap242x_sram_ddr_init
 
@@ -224,7 +224,7 @@ omap242x_srs_prcm_voltctrl:
 ddr_prcm_mask_val:
        .word 0xFFFF3FFC
 omap242x_srs_timer_32ksynct:
-       .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
+       .word OMAP2_L4_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
 
 ENTRY(omap242x_sram_reprogram_sdrc_sz)
        .word   . - omap242x_sram_reprogram_sdrc
index df2cd9277c009a8d380901ea43d676b82fc250a3..ab4973695c7133007cc05871d4c07634823d423b 100644 (file)
@@ -128,7 +128,7 @@ omap243x_sdi_prcm_voltctrl:
 prcm_mask_val:
        .word 0xFFFF3FFC
 omap243x_sdi_timer_32ksynct_cr:
-       .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
+       .word OMAP2_L4_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
 ENTRY(omap243x_sram_ddr_init_sz)
        .word   . - omap243x_sram_ddr_init
 
@@ -224,7 +224,7 @@ omap243x_srs_prcm_voltctrl:
 ddr_prcm_mask_val:
        .word 0xFFFF3FFC
 omap243x_srs_timer_32ksynct:
-       .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
+       .word OMAP2_L4_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
 
 ENTRY(omap243x_sram_reprogram_sdrc_sz)
        .word   . - omap243x_sram_reprogram_sdrc
index fdcb1cfd0c35b83b4a0b5d270cde2fa3e954312a..8b3ef17183e20968005fa98005cbb938ef79a6db 100644 (file)
@@ -227,12 +227,12 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
 
 static struct omap_globals omap242x_globals = {
        .class  = OMAP242X_CLASS,
-       .tap    = OMAP2_IO_ADDRESS(0x48014000),
-       .sdrc   = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE),
-       .sms    = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE),
-       .ctrl   = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE),
-       .prm    = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE),
-       .cm     = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE),
+       .tap    = OMAP2_L4_IO_ADDRESS(0x48014000),
+       .sdrc   = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
+       .sms    = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE),
+       .ctrl   = OMAP2_L4_IO_ADDRESS(OMAP2420_CTRL_BASE),
+       .prm    = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE),
+       .cm     = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE),
 };
 
 void __init omap2_set_globals_242x(void)
@@ -245,12 +245,12 @@ void __init omap2_set_globals_242x(void)
 
 static struct omap_globals omap243x_globals = {
        .class  = OMAP243X_CLASS,
-       .tap    = OMAP2_IO_ADDRESS(0x4900a000),
-       .sdrc   = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE),
-       .sms    = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE),
-       .ctrl   = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE),
-       .prm    = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE),
-       .cm     = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE),
+       .tap    = OMAP2_L4_IO_ADDRESS(0x4900a000),
+       .sdrc   = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
+       .sms    = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE),
+       .ctrl   = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
+       .prm    = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE),
+       .cm     = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE),
 };
 
 void __init omap2_set_globals_243x(void)
@@ -263,12 +263,12 @@ void __init omap2_set_globals_243x(void)
 
 static struct omap_globals omap343x_globals = {
        .class  = OMAP343X_CLASS,
-       .tap    = OMAP2_IO_ADDRESS(0x4830A000),
-       .sdrc   = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE),
-       .sms    = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE),
-       .ctrl   = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE),
-       .prm    = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE),
-       .cm     = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE),
+       .tap    = OMAP2_L4_IO_ADDRESS(0x4830A000),
+       .sdrc   = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
+       .sms    = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE),
+       .ctrl   = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
+       .prm    = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE),
+       .cm     = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE),
 };
 
 void __init omap2_set_globals_343x(void)
@@ -280,10 +280,10 @@ void __init omap2_set_globals_343x(void)
 #if defined(CONFIG_ARCH_OMAP4)
 static struct omap_globals omap4_globals = {
        .class  = OMAP443X_CLASS,
-       .tap    = OMAP2_IO_ADDRESS(0x4830a000),
-       .ctrl   = OMAP2_IO_ADDRESS(OMAP443X_CTRL_BASE),
-       .prm    = OMAP2_IO_ADDRESS(OMAP4430_PRM_BASE),
-       .cm     = OMAP2_IO_ADDRESS(OMAP4430_CM_BASE),
+       .tap    = OMAP2_L4_IO_ADDRESS(0x4830a000),
+       .ctrl   = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE),
+       .prm    = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE),
+       .cm     = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
 };
 
 void __init omap2_set_globals_443x(void)
index 826d317cdbec8dff637b5485abd3a8e375d45c5e..805819f3a8680a14f5d447546758e7aa4e76c6af 100644 (file)
 
 #ifndef __ASSEMBLY__
 #define OMAP242X_CTRL_REGADDR(reg)                                     \
-       OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
+               OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
 #define OMAP243X_CTRL_REGADDR(reg)                                     \
-       OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
+               OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
 #define OMAP343X_CTRL_REGADDR(reg)                                     \
-       OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
+               OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
 #else
-#define OMAP242X_CTRL_REGADDR(reg)     OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
-#define OMAP243X_CTRL_REGADDR(reg)     OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
-#define OMAP343X_CTRL_REGADDR(reg)     OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
+#define OMAP242X_CTRL_REGADDR(reg)                                     \
+               OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
+#define OMAP243X_CTRL_REGADDR(reg)                                     \
+               OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
+#define OMAP343X_CTRL_REGADDR(reg)                                     \
+               OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
 #endif /* __ASSEMBLY__ */
 
 /*
index 3bad928c6315c0f58d8126b53d5909ca93832301..2aea5665f58faad907c2f6ee4752b3e3a887e360 100644 (file)
@@ -68,9 +68,9 @@
 
 /* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */
 #if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430)
-#define OMAP2_VA_IC_BASE               OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE)
+#define OMAP2_VA_IC_BASE               OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
 #elif defined(CONFIG_ARCH_OMAP34XX)
-#define OMAP2_VA_IC_BASE               OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE)
+#define OMAP2_VA_IC_BASE               OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
 #endif
 #if defined(CONFIG_ARCH_OMAP4)
 #include <mach/omap44xx.h>
 
                .endm
 #else
-#define OMAP44XX_VA_GIC_CPU_BASE       OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
+#define OMAP44XX_VA_GIC_CPU_BASE       OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
 
                /*
                 * The interrupt numbering scheme is defined in the
index 8d32df32b0b137883ea89d387030dd158ea5ef9b..c475be75267e022a4afb91125d6d7cbc831de4e3 100644 (file)
 #define OMAP1_IO_OFFSET                0x01000000      /* Virtual IO = 0xfefb0000 */
 #define OMAP1_IO_ADDRESS(pa)   IOMEM((pa) - OMAP1_IO_OFFSET)
 
-#define OMAP2_IO_OFFSET                0x90000000
-#define OMAP2_IO_ADDRESS(pa)   IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */
+#define OMAP2_L3_IO_OFFSET     0x90000000
+#define OMAP2_L3_IO_ADDRESS(pa)        IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
 
+#define OMAP2_L4_IO_OFFSET     0x90000000
+#define OMAP2_L4_IO_ADDRESS(pa)        IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
 /*
  * ----------------------------------------------------------------------------
  * Omap1 specific IO mapping
index 1c09c78a48f2ed17c46aec6be994d70c23c01dfa..7b58a5f78ce4360f6c5407332b54d04adedd8739 100644 (file)
  */
 
 #define OMAP242X_SMS_REGADDR(reg)                                      \
-                       (void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
+               (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
 #define OMAP243X_SMS_REGADDR(reg)                                      \
-                       (void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
+               (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
 #define OMAP343X_SMS_REGADDR(reg)                                      \
-                       (void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
+               (void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
 
 /* SMS register offsets - read/write with sms_{read,write}_reg() */
 
index 23a205f4a2b19b8a0b16ced4bec83371cb013018..eb74ab286081b5d1550a7661a6e532fed3cfd791 100644 (file)
@@ -142,7 +142,7 @@ u8 omap_readb(u32 pa)
        if (cpu_class_is_omap1())
                return __raw_readb(OMAP1_IO_ADDRESS(pa));
        else
-               return __raw_readb(OMAP2_IO_ADDRESS(pa));
+               return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
 }
 EXPORT_SYMBOL(omap_readb);
 
@@ -151,7 +151,7 @@ u16 omap_readw(u32 pa)
        if (cpu_class_is_omap1())
                return __raw_readw(OMAP1_IO_ADDRESS(pa));
        else
-               return __raw_readw(OMAP2_IO_ADDRESS(pa));
+               return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
 }
 EXPORT_SYMBOL(omap_readw);
 
@@ -160,7 +160,7 @@ u32 omap_readl(u32 pa)
        if (cpu_class_is_omap1())
                return __raw_readl(OMAP1_IO_ADDRESS(pa));
        else
-               return __raw_readl(OMAP2_IO_ADDRESS(pa));
+               return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
 }
 EXPORT_SYMBOL(omap_readl);
 
@@ -169,7 +169,7 @@ void omap_writeb(u8 v, u32 pa)
        if (cpu_class_is_omap1())
                __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
        else
-               __raw_writeb(v, OMAP2_IO_ADDRESS(pa));
+               __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
 }
 EXPORT_SYMBOL(omap_writeb);
 
@@ -178,7 +178,7 @@ void omap_writew(u16 v, u32 pa)
        if (cpu_class_is_omap1())
                __raw_writew(v, OMAP1_IO_ADDRESS(pa));
        else
-               __raw_writew(v, OMAP2_IO_ADDRESS(pa));
+               __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
 }
 EXPORT_SYMBOL(omap_writew);
 
@@ -187,6 +187,6 @@ void omap_writel(u32 v, u32 pa)
        if (cpu_class_is_omap1())
                __raw_writel(v, OMAP1_IO_ADDRESS(pa));
        else
-               __raw_writel(v, OMAP2_IO_ADDRESS(pa));
+               __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
 }
 EXPORT_SYMBOL(omap_writel);
index 75d1f26e5b177055f352bfd2dc428eca39ee09ed..93bdbaf7b3a447b7f2d76b8d8be1fca0e1720ed0 100644 (file)
 #define SRAM_BOOTLOADER_SZ     0x80
 #endif
 
-#define OMAP24XX_VA_REQINFOPERM0       OMAP2_IO_ADDRESS(0x68005048)
-#define OMAP24XX_VA_READPERM0          OMAP2_IO_ADDRESS(0x68005050)
-#define OMAP24XX_VA_WRITEPERM0         OMAP2_IO_ADDRESS(0x68005058)
-
-#define OMAP34XX_VA_REQINFOPERM0       OMAP2_IO_ADDRESS(0x68012848)
-#define OMAP34XX_VA_READPERM0          OMAP2_IO_ADDRESS(0x68012850)
-#define OMAP34XX_VA_WRITEPERM0         OMAP2_IO_ADDRESS(0x68012858)
-#define OMAP34XX_VA_ADDR_MATCH2                OMAP2_IO_ADDRESS(0x68012880)
-#define OMAP34XX_VA_SMS_RG_ATT0                OMAP2_IO_ADDRESS(0x6C000048)
-#define OMAP34XX_VA_CONTROL_STAT       OMAP2_IO_ADDRESS(0x480022F0)
+#define OMAP24XX_VA_REQINFOPERM0       OMAP2_L3_IO_ADDRESS(0x68005048)
+#define OMAP24XX_VA_READPERM0          OMAP2_L3_IO_ADDRESS(0x68005050)
+#define OMAP24XX_VA_WRITEPERM0         OMAP2_L3_IO_ADDRESS(0x68005058)
+
+#define OMAP34XX_VA_REQINFOPERM0       OMAP2_L3_IO_ADDRESS(0x68012848)
+#define OMAP34XX_VA_READPERM0          OMAP2_L3_IO_ADDRESS(0x68012850)
+#define OMAP34XX_VA_WRITEPERM0         OMAP2_L3_IO_ADDRESS(0x68012858)
+#define OMAP34XX_VA_ADDR_MATCH2                OMAP2_L3_IO_ADDRESS(0x68012880)
+#define OMAP34XX_VA_SMS_RG_ATT0                OMAP2_L3_IO_ADDRESS(0x6C000048)
+#define OMAP34XX_VA_CONTROL_STAT       OMAP2_L4_IO_ADDRESS(0x480022F0)
 
 #define GP_DEVICE              0x300