]> bbs.cooldavid.org Git - net-next-2.6.git/commitdiff
sh: mach-dreamcast: irq_data conversion.
authorPaul Mundt <lethal@linux-sh.org>
Wed, 27 Oct 2010 05:36:28 +0000 (14:36 +0900)
committerPaul Mundt <lethal@linux-sh.org>
Wed, 27 Oct 2010 05:36:28 +0000 (14:36 +0900)
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/boards/mach-dreamcast/irq.c

index d932667410ab9f79533f10be378e5b4218c37e4c..72e7ac9549dacd7da513d06f72aa6bb4caec35b1 100644 (file)
@@ -60,8 +60,9 @@
  */
 
 /* Disable the hardware event by masking its bit in its EMR */
-static inline void disable_systemasic_irq(unsigned int irq)
+static inline void disable_systemasic_irq(struct irq_data *data)
 {
+       unsigned int irq = data->irq;
        __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
        __u32 mask;
 
@@ -71,8 +72,9 @@ static inline void disable_systemasic_irq(unsigned int irq)
 }
 
 /* Enable the hardware event by setting its bit in its EMR */
-static inline void enable_systemasic_irq(unsigned int irq)
+static inline void enable_systemasic_irq(struct irq_data *data)
 {
+       unsigned int irq = data->irq;
        __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
        __u32 mask;
 
@@ -82,18 +84,19 @@ static inline void enable_systemasic_irq(unsigned int irq)
 }
 
 /* Acknowledge a hardware event by writing its bit back to its ESR */
-static void mask_ack_systemasic_irq(unsigned int irq)
+static void mask_ack_systemasic_irq(struct irq_data *data)
 {
+       unsigned int irq = data->irq;
        __u32 esr = ESR_BASE + (LEVEL(irq) << 2);
-       disable_systemasic_irq(irq);
+       disable_systemasic_irq(data);
        outl((1 << EVENT_BIT(irq)), esr);
 }
 
 struct irq_chip systemasic_int = {
        .name           = "System ASIC",
-       .mask           = disable_systemasic_irq,
-       .mask_ack       = mask_ack_systemasic_irq,
-       .unmask         = enable_systemasic_irq,
+       .irq_mask       = disable_systemasic_irq,
+       .irq_mask_ack   = mask_ack_systemasic_irq,
+       .irq_unmask     = enable_systemasic_irq,
 };
 
 /*