drivers/usb/host/oxu210hp-hcd.c

   1 /*
   2  * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it>
   3  * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it>
   4  *
   5  * This code is *strongly* based on EHCI-HCD code by David Brownell since
   6  * the chip is a quasi-EHCI compatible.
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/slab.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/timer.h>
  34 #include <linux/list.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/moduleparam.h>
  39 #include <linux/dma-mapping.h>
  40 #include <linux/io.h>
  41
  42 #include <asm/irq.h>
  43 #include <asm/system.h>
  44 #include <asm/unaligned.h>
  45
  46 #include <linux/irq.h>
  47 #include <linux/platform_device.h>
  48
  49 #include "oxu210hp.h"
  50
  51 #define DRIVER_VERSION "0.0.50"
  52
  53 /*
  54  * Main defines
  55  */
  56
  57 #define oxu_dbg(oxu, fmt, args...) \
  58                 dev_dbg(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
  59 #define oxu_err(oxu, fmt, args...) \
  60                 dev_err(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
  61 #define oxu_info(oxu, fmt, args...) \
  62                 dev_info(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
  63
  64 static inline struct usb_hcd *oxu_to_hcd(struct oxu_hcd *oxu)
  65 {
  66         return container_of((void *) oxu, struct usb_hcd, hcd_priv);
  67 }
  68
  69 static inline struct oxu_hcd *hcd_to_oxu(struct usb_hcd *hcd)
  70 {
  71         return (struct oxu_hcd *) (hcd->hcd_priv);
  72 }
  73
  74 /*
  75  * Debug stuff
  76  */
  77
  78 #undef OXU_URB_TRACE
  79 #undef OXU_VERBOSE_DEBUG
  80
  81 #ifdef OXU_VERBOSE_DEBUG
  82 #define oxu_vdbg                        oxu_dbg
  83 #else
  84 #define oxu_vdbg(oxu, fmt, args...)     /* Nop */
  85 #endif
  86
  87 #ifdef DEBUG
  88
  89 static int __attribute__((__unused__))
  90 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
  91 {
  92         return scnprintf(buf, len, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
  93                 label, label[0] ? " " : "", status,
  94                 (status & STS_ASS) ? " Async" : "",
  95                 (status & STS_PSS) ? " Periodic" : "",
  96                 (status & STS_RECL) ? " Recl" : "",
  97                 (status & STS_HALT) ? " Halt" : "",
  98                 (status & STS_IAA) ? " IAA" : "",
  99                 (status & STS_FATAL) ? " FATAL" : "",
 100                 (status & STS_FLR) ? " FLR" : "",
 101                 (status & STS_PCD) ? " PCD" : "",
 102                 (status & STS_ERR) ? " ERR" : "",
 103                 (status & STS_INT) ? " INT" : ""
 104                 );
 105 }
 106
 107 static int __attribute__((__unused__))
 108 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
 109 {
 110         return scnprintf(buf, len, "%s%sintrenable %02x%s%s%s%s%s%s",
 111                 label, label[0] ? " " : "", enable,
 112                 (enable & STS_IAA) ? " IAA" : "",
 113                 (enable & STS_FATAL) ? " FATAL" : "",
 114                 (enable & STS_FLR) ? " FLR" : "",
 115                 (enable & STS_PCD) ? " PCD" : "",
 116                 (enable & STS_ERR) ? " ERR" : "",
 117                 (enable & STS_INT) ? " INT" : ""
 118                 );
 119 }
 120
 121 static const char *const fls_strings[] =
 122     { "1024", "512", "256", "??" };
 123
 124 static int dbg_command_buf(char *buf, unsigned len,
 125                                 const char *label, u32 command)
 126 {
 127         return scnprintf(buf, len,
 128                 "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
 129                 label, label[0] ? " " : "", command,
 130                 (command & CMD_PARK) ? "park" : "(park)",
 131                 CMD_PARK_CNT(command),
 132                 (command >> 16) & 0x3f,
 133                 (command & CMD_LRESET) ? " LReset" : "",
 134                 (command & CMD_IAAD) ? " IAAD" : "",
 135                 (command & CMD_ASE) ? " Async" : "",
 136                 (command & CMD_PSE) ? " Periodic" : "",
 137                 fls_strings[(command >> 2) & 0x3],
 138                 (command & CMD_RESET) ? " Reset" : "",
 139                 (command & CMD_RUN) ? "RUN" : "HALT"
 140                 );
 141 }
 142
 143 static int dbg_port_buf(char *buf, unsigned len, const char *label,
 144                                 int port, u32 status)
 145 {
 146         char    *sig;
 147
 148         /* signaling state */
 149         switch (status & (3 << 10)) {
 150         case 0 << 10:
 151                 sig = "se0";
 152                 break;
 153         case 1 << 10:
 154                 sig = "k";      /* low speed */
 155                 break;
 156         case 2 << 10:
 157                 sig = "j";
 158                 break;
 159         default:
 160                 sig = "?";
 161                 break;
 162         }
 163
 164         return scnprintf(buf, len,
 165                 "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
 166                 label, label[0] ? " " : "", port, status,
 167                 (status & PORT_POWER) ? " POWER" : "",
 168                 (status & PORT_OWNER) ? " OWNER" : "",
 169                 sig,
 170                 (status & PORT_RESET) ? " RESET" : "",
 171                 (status & PORT_SUSPEND) ? " SUSPEND" : "",
 172                 (status & PORT_RESUME) ? " RESUME" : "",
 173                 (status & PORT_OCC) ? " OCC" : "",
 174                 (status & PORT_OC) ? " OC" : "",
 175                 (status & PORT_PEC) ? " PEC" : "",
 176                 (status & PORT_PE) ? " PE" : "",
 177                 (status & PORT_CSC) ? " CSC" : "",
 178                 (status & PORT_CONNECT) ? " CONNECT" : ""
 179             );
 180 }
 181
 182 #else
 183
 184 static inline int __attribute__((__unused__))
 185 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
 186 { return 0; }
 187
 188 static inline int __attribute__((__unused__))
 189 dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
 190 { return 0; }
 191
 192 static inline int __attribute__((__unused__))
 193 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
 194 { return 0; }
 195
 196 static inline int __attribute__((__unused__))
 197 dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
 198 { return 0; }
 199
 200 #endif /* DEBUG */
 201
 202 /* functions have the "wrong" filename when they're output... */
 203 #define dbg_status(oxu, label, status) { \
 204         char _buf[80]; \
 205         dbg_status_buf(_buf, sizeof _buf, label, status); \
 206         oxu_dbg(oxu, "%s\n", _buf); \
 207 }
 208
 209 #define dbg_cmd(oxu, label, command) { \
 210         char _buf[80]; \
 211         dbg_command_buf(_buf, sizeof _buf, label, command); \
 212         oxu_dbg(oxu, "%s\n", _buf); \
 213 }
 214
 215 #define dbg_port(oxu, label, port, status) { \
 216         char _buf[80]; \
 217         dbg_port_buf(_buf, sizeof _buf, label, port, status); \
 218         oxu_dbg(oxu, "%s\n", _buf); \
 219 }
 220
 221 /*
 222  * Module parameters
 223  */
 224
 225 /* Initial IRQ latency: faster than hw default */
 226 static int log2_irq_thresh;                     /* 0 to 6 */
 227 module_param(log2_irq_thresh, int, S_IRUGO);
 228 MODULE_PARM_DESC(log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
 229
 230 /* Initial park setting: slower than hw default */
 231 static unsigned park;
 232 module_param(park, uint, S_IRUGO);
 233 MODULE_PARM_DESC(park, "park setting; 1-3 back-to-back async packets");
 234
 235 /* For flakey hardware, ignore overcurrent indicators */
 236 static int ignore_oc;
 237 module_param(ignore_oc, bool, S_IRUGO);
 238 MODULE_PARM_DESC(ignore_oc, "ignore bogus hardware overcurrent indications");
 239
 240
 241 static void ehci_work(struct oxu_hcd *oxu);
 242 static int oxu_hub_control(struct usb_hcd *hcd,
 243                                 u16 typeReq, u16 wValue, u16 wIndex,
 244                                 char *buf, u16 wLength);
 245
 246 /*
 247  * Local functions
 248  */
 249
 250 /* Low level read/write registers functions */
 251 static inline u32 oxu_readl(void *base, u32 reg)
 252 {
 253         return readl(base + reg);
 254 }
 255
 256 static inline void oxu_writel(void *base, u32 reg, u32 val)
 257 {
 258         writel(val, base + reg);
 259 }
 260
 261 static inline void timer_action_done(struct oxu_hcd *oxu,
 262                                         enum ehci_timer_action action)
 263 {
 264         clear_bit(action, &oxu->actions);
 265 }
 266
 267 static inline void timer_action(struct oxu_hcd *oxu,
 268                                         enum ehci_timer_action action)
 269 {
 270         if (!test_and_set_bit(action, &oxu->actions)) {
 271                 unsigned long t;
 272
 273                 switch (action) {
 274                 case TIMER_IAA_WATCHDOG:
 275                         t = EHCI_IAA_JIFFIES;
 276                         break;
 277                 case TIMER_IO_WATCHDOG:
 278                         t = EHCI_IO_JIFFIES;
 279                         break;
 280                 case TIMER_ASYNC_OFF:
 281                         t = EHCI_ASYNC_JIFFIES;
 282                         break;
 283                 case TIMER_ASYNC_SHRINK:
 284                 default:
 285                         t = EHCI_SHRINK_JIFFIES;
 286                         break;
 287                 }
 288                 t += jiffies;
 289                 /* all timings except IAA watchdog can be overridden.
 290                  * async queue SHRINK often precedes IAA.  while it's ready
 291                  * to go OFF neither can matter, and afterwards the IO
 292                  * watchdog stops unless there's still periodic traffic.
 293                  */
 294                 if (action != TIMER_IAA_WATCHDOG
 295                                 && t > oxu->watchdog.expires
 296                                 && timer_pending(&oxu->watchdog))
 297                         return;
 298                 mod_timer(&oxu->watchdog, t);
 299         }
 300 }
 301
 302 /*
 303  * handshake - spin reading hc until handshake completes or fails
 304  * @ptr: address of hc register to be read
 305  * @mask: bits to look at in result of read
 306  * @done: value of those bits when handshake succeeds
 307  * @usec: timeout in microseconds
 308  *
 309  * Returns negative errno, or zero on success
 310  *
 311  * Success happens when the "mask" bits have the specified value (hardware
 312  * handshake done).  There are two failure modes:  "usec" have passed (major
 313  * hardware flakeout), or the register reads as all-ones (hardware removed).
 314  *
 315  * That last failure should_only happen in cases like physical cardbus eject
 316  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 317  * bridge shutdown:  shutting down the bridge before the devices using it.
 318  */
 319 static int handshake(struct oxu_hcd *oxu, void __iomem *ptr,
 320                                         u32 mask, u32 done, int usec)
 321 {
 322         u32 result;
 323
 324         do {
 325                 result = readl(ptr);
 326                 if (result == ~(u32)0)          /* card removed */
 327                         return -ENODEV;
 328                 result &= mask;
 329                 if (result == done)
 330                         return 0;
 331                 udelay(1);
 332                 usec--;
 333         } while (usec > 0);
 334         return -ETIMEDOUT;
 335 }
 336
 337 /* Force HC to halt state from unknown (EHCI spec section 2.3) */
 338 static int ehci_halt(struct oxu_hcd *oxu)
 339 {
 340         u32     temp = readl(&oxu->regs->status);
 341
 342         /* disable any irqs left enabled by previous code */
 343         writel(0, &oxu->regs->intr_enable);
 344
 345         if ((temp & STS_HALT) != 0)
 346                 return 0;
 347
 348         temp = readl(&oxu->regs->command);
 349         temp &= ~CMD_RUN;
 350         writel(temp, &oxu->regs->command);
 351         return handshake(oxu, &oxu->regs->status,
 352                           STS_HALT, STS_HALT, 16 * 125);
 353 }
 354
 355 /* Put TDI/ARC silicon into EHCI mode */
 356 static void tdi_reset(struct oxu_hcd *oxu)
 357 {
 358         u32 __iomem *reg_ptr;
 359         u32 tmp;
 360
 361         reg_ptr = (u32 __iomem *)(((u8 __iomem *)oxu->regs) + 0x68);
 362         tmp = readl(reg_ptr);
 363         tmp |= 0x3;
 364         writel(tmp, reg_ptr);
 365 }
 366
 367 /* Reset a non-running (STS_HALT == 1) controller */
 368 static int ehci_reset(struct oxu_hcd *oxu)
 369 {
 370         int     retval;
 371         u32     command = readl(&oxu->regs->command);
 372
 373         command |= CMD_RESET;
 374         dbg_cmd(oxu, "reset", command);
 375         writel(command, &oxu->regs->command);
 376         oxu_to_hcd(oxu)->state = HC_STATE_HALT;
 377         oxu->next_statechange = jiffies;
 378         retval = handshake(oxu, &oxu->regs->command,
 379                             CMD_RESET, 0, 250 * 1000);
 380
 381         if (retval)
 382                 return retval;
 383
 384         tdi_reset(oxu);
 385
 386         return retval;
 387 }
 388
 389 /* Idle the controller (from running) */
 390 static void ehci_quiesce(struct oxu_hcd *oxu)
 391 {
 392         u32     temp;
 393
 394 #ifdef DEBUG
 395         if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
 396                 BUG();
 397 #endif
 398
 399         /* wait for any schedule enables/disables to take effect */
 400         temp = readl(&oxu->regs->command) << 10;
 401         temp &= STS_ASS | STS_PSS;
 402         if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
 403                                 temp, 16 * 125) != 0) {
 404                 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
 405                 return;
 406         }
 407
 408         /* then disable anything that's still active */
 409         temp = readl(&oxu->regs->command);
 410         temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
 411         writel(temp, &oxu->regs->command);
 412
 413         /* hardware can take 16 microframes to turn off ... */
 414         if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
 415                                 0, 16 * 125) != 0) {
 416                 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
 417                 return;
 418         }
 419 }
 420
 421 static int check_reset_complete(struct oxu_hcd *oxu, int index,
 422                                 u32 __iomem *status_reg, int port_status)
 423 {
 424         if (!(port_status & PORT_CONNECT)) {
 425                 oxu->reset_done[index] = 0;
 426                 return port_status;
 427         }
 428
 429         /* if reset finished and it's still not enabled -- handoff */
 430         if (!(port_status & PORT_PE)) {
 431                 oxu_dbg(oxu, "Failed to enable port %d on root hub TT\n",
 432                                 index+1);
 433                 return port_status;
 434         } else
 435                 oxu_dbg(oxu, "port %d high speed\n", index + 1);
 436
 437         return port_status;
 438 }
 439
 440 static void ehci_hub_descriptor(struct oxu_hcd *oxu,
 441                                 struct usb_hub_descriptor *desc)
 442 {
 443         int ports = HCS_N_PORTS(oxu->hcs_params);
 444         u16 temp;
 445
 446         desc->bDescriptorType = 0x29;
 447         desc->bPwrOn2PwrGood = 10;      /* oxu 1.0, 2.3.9 says 20ms max */
 448         desc->bHubContrCurrent = 0;
 449
 450         desc->bNbrPorts = ports;
 451         temp = 1 + (ports / 8);
 452         desc->bDescLength = 7 + 2 * temp;
 453
 454         /* two bitmaps:  ports removable, and usb 1.0 legacy PortPwrCtrlMask */
 455         memset(&desc->bitmap[0], 0, temp);
 456         memset(&desc->bitmap[temp], 0xff, temp);
 457
 458         temp = 0x0008;                  /* per-port overcurrent reporting */
 459         if (HCS_PPC(oxu->hcs_params))
 460                 temp |= 0x0001;         /* per-port power control */
 461         else
 462                 temp |= 0x0002;         /* no power switching */
 463         desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp);
 464 }
 465
 466
 467 /* Allocate an OXU210HP on-chip memory data buffer
 468  *
 469  * An on-chip memory data buffer is required for each OXU210HP USB transfer.
 470  * Each transfer descriptor has one or more on-chip memory data buffers.
 471  *
 472  * Data buffers are allocated from a fix sized pool of data blocks.
 473  * To minimise fragmentation and give reasonable memory utlisation,
 474  * data buffers are allocated with sizes the power of 2 multiples of
 475  * the block size, starting on an address a multiple of the allocated size.
 476  *
 477  * FIXME: callers of this function require a buffer to be allocated for
 478  * len=0. This is a waste of on-chip memory and should be fix. Then this
 479  * function should be changed to not allocate a buffer for len=0.
 480  */
 481 static int oxu_buf_alloc(struct oxu_hcd *oxu, struct ehci_qtd *qtd, int len)
 482 {
 483         int n_blocks;   /* minium blocks needed to hold len */
 484         int a_blocks;   /* blocks allocated */
 485         int i, j;
 486
 487         /* Don't allocte bigger than supported */
 488         if (len > BUFFER_SIZE * BUFFER_NUM) {
 489                 oxu_err(oxu, "buffer too big (%d)\n", len);
 490                 return -ENOMEM;
 491         }
 492
 493         spin_lock(&oxu->mem_lock);
 494
 495         /* Number of blocks needed to hold len */
 496         n_blocks = (len + BUFFER_SIZE - 1) / BUFFER_SIZE;
 497
 498         /* Round the number of blocks up to the power of 2 */
 499         for (a_blocks = 1; a_blocks < n_blocks; a_blocks <<= 1)
 500                 ;
 501
 502         /* Find a suitable available data buffer */
 503         for (i = 0; i < BUFFER_NUM;
 504                         i += max(a_blocks, (int)oxu->db_used[i])) {
 505
 506                 /* Check all the required blocks are available */
 507                 for (j = 0; j < a_blocks; j++)
 508                         if (oxu->db_used[i + j])
 509                                 break;
 510
 511                 if (j != a_blocks)
 512                         continue;
 513
 514                 /* Allocate blocks found! */
 515                 qtd->buffer = (void *) &oxu->mem->db_pool[i];
 516                 qtd->buffer_dma = virt_to_phys(qtd->buffer);
 517
 518                 qtd->qtd_buffer_len = BUFFER_SIZE * a_blocks;
 519                 oxu->db_used[i] = a_blocks;
 520
 521                 spin_unlock(&oxu->mem_lock);
 522
 523                 return 0;
 524         }
 525
 526         /* Failed */
 527
 528         spin_unlock(&oxu->mem_lock);
 529
 530         return -ENOMEM;
 531 }
 532
 533 static void oxu_buf_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
 534 {
 535         int index;
 536
 537         spin_lock(&oxu->mem_lock);
 538
 539         index = (qtd->buffer - (void *) &oxu->mem->db_pool[0])
 540                                                          / BUFFER_SIZE;
 541         oxu->db_used[index] = 0;
 542         qtd->qtd_buffer_len = 0;
 543         qtd->buffer_dma = 0;
 544         qtd->buffer = NULL;
 545
 546         spin_unlock(&oxu->mem_lock);
 547
 548         return;
 549 }
 550
 551 static inline void ehci_qtd_init(struct ehci_qtd *qtd, dma_addr_t dma)
 552 {
 553         memset(qtd, 0, sizeof *qtd);
 554         qtd->qtd_dma = dma;
 555         qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
 556         qtd->hw_next = EHCI_LIST_END;
 557         qtd->hw_alt_next = EHCI_LIST_END;
 558         INIT_LIST_HEAD(&qtd->qtd_list);
 559 }
 560
 561 static inline void oxu_qtd_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
 562 {
 563         int index;
 564
 565         if (qtd->buffer)
 566                 oxu_buf_free(oxu, qtd);
 567
 568         spin_lock(&oxu->mem_lock);
 569
 570         index = qtd - &oxu->mem->qtd_pool[0];
 571         oxu->qtd_used[index] = 0;
 572
 573         spin_unlock(&oxu->mem_lock);
 574
 575         return;
 576 }
 577
 578 static struct ehci_qtd *ehci_qtd_alloc(struct oxu_hcd *oxu)
 579 {
 580         int i;
 581         struct ehci_qtd *qtd = NULL;
 582
 583         spin_lock(&oxu->mem_lock);
 584
 585         for (i = 0; i < QTD_NUM; i++)
 586                 if (!oxu->qtd_used[i])
 587                         break;
 588
 589         if (i < QTD_NUM) {
 590                 qtd = (struct ehci_qtd *) &oxu->mem->qtd_pool[i];
 591                 memset(qtd, 0, sizeof *qtd);
 592
 593                 qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
 594                 qtd->hw_next = EHCI_LIST_END;
 595                 qtd->hw_alt_next = EHCI_LIST_END;
 596                 INIT_LIST_HEAD(&qtd->qtd_list);
 597
 598                 qtd->qtd_dma = virt_to_phys(qtd);
 599
 600                 oxu->qtd_used[i] = 1;
 601         }
 602
 603         spin_unlock(&oxu->mem_lock);
 604
 605         return qtd;
 606 }
 607
 608 static void oxu_qh_free(struct oxu_hcd *oxu, struct ehci_qh *qh)
 609 {
 610         int index;
 611
 612         spin_lock(&oxu->mem_lock);
 613
 614         index = qh - &oxu->mem->qh_pool[0];
 615         oxu->qh_used[index] = 0;
 616
 617         spin_unlock(&oxu->mem_lock);
 618
 619         return;
 620 }
 621
 622 static void qh_destroy(struct kref *kref)
 623 {
 624         struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref);
 625         struct oxu_hcd *oxu = qh->oxu;
 626
 627         /* clean qtds first, and know this is not linked */
 628         if (!list_empty(&qh->qtd_list) || qh->qh_next.ptr) {
 629                 oxu_dbg(oxu, "unused qh not empty!\n");
 630                 BUG();
 631         }
 632         if (qh->dummy)
 633                 oxu_qtd_free(oxu, qh->dummy);
 634         oxu_qh_free(oxu, qh);
 635 }
 636
 637 static struct ehci_qh *oxu_qh_alloc(struct oxu_hcd *oxu)
 638 {
 639         int i;
 640         struct ehci_qh *qh = NULL;
 641
 642         spin_lock(&oxu->mem_lock);
 643
 644         for (i = 0; i < QHEAD_NUM; i++)
 645                 if (!oxu->qh_used[i])
 646                         break;
 647
 648         if (i < QHEAD_NUM) {
 649                 qh = (struct ehci_qh *) &oxu->mem->qh_pool[i];
 650                 memset(qh, 0, sizeof *qh);
 651
 652                 kref_init(&qh->kref);
 653                 qh->oxu = oxu;
 654                 qh->qh_dma = virt_to_phys(qh);
 655                 INIT_LIST_HEAD(&qh->qtd_list);
 656
 657                 /* dummy td enables safe urb queuing */
 658                 qh->dummy = ehci_qtd_alloc(oxu);
 659                 if (qh->dummy == NULL) {
 660                         oxu_dbg(oxu, "no dummy td\n");
 661                         oxu->qh_used[i] = 0;
 662                         qh = NULL;
 663                         goto unlock;
 664                 }
 665
 666                 oxu->qh_used[i] = 1;
 667         }
 668 unlock:
 669         spin_unlock(&oxu->mem_lock);
 670
 671         return qh;
 672 }
 673
 674 /* to share a qh (cpu threads, or hc) */
 675 static inline struct ehci_qh *qh_get(struct ehci_qh *qh)
 676 {
 677         kref_get(&qh->kref);
 678         return qh;
 679 }
 680
 681 static inline void qh_put(struct ehci_qh *qh)
 682 {
 683         kref_put(&qh->kref, qh_destroy);
 684 }
 685
 686 static void oxu_murb_free(struct oxu_hcd *oxu, struct oxu_murb *murb)
 687 {
 688         int index;
 689
 690         spin_lock(&oxu->mem_lock);
 691
 692         index = murb - &oxu->murb_pool[0];
 693         oxu->murb_used[index] = 0;
 694
 695         spin_unlock(&oxu->mem_lock);
 696
 697         return;
 698 }
 699
 700 static struct oxu_murb *oxu_murb_alloc(struct oxu_hcd *oxu)
 701
 702 {
 703         int i;
 704         struct oxu_murb *murb = NULL;
 705
 706         spin_lock(&oxu->mem_lock);
 707
 708         for (i = 0; i < MURB_NUM; i++)
 709                 if (!oxu->murb_used[i])
 710                         break;
 711
 712         if (i < MURB_NUM) {
 713                 murb = &(oxu->murb_pool)[i];
 714
 715                 oxu->murb_used[i] = 1;
 716         }
 717
 718         spin_unlock(&oxu->mem_lock);
 719
 720         return murb;
 721 }
 722
 723 /* The queue heads and transfer descriptors are managed from pools tied
 724  * to each of the "per device" structures.
 725  * This is the initialisation and cleanup code.
 726  */
 727 static void ehci_mem_cleanup(struct oxu_hcd *oxu)
 728 {
 729         kfree(oxu->murb_pool);
 730         oxu->murb_pool = NULL;
 731
 732         if (oxu->async)
 733                 qh_put(oxu->async);
 734         oxu->async = NULL;
 735
 736         del_timer(&oxu->urb_timer);
 737
 738         oxu->periodic = NULL;
 739
 740         /* shadow periodic table */
 741         kfree(oxu->pshadow);
 742         oxu->pshadow = NULL;
 743 }
 744
 745 /* Remember to add cleanup code (above) if you add anything here.
 746  */
 747 static int ehci_mem_init(struct oxu_hcd *oxu, gfp_t flags)
 748 {
 749         int i;
 750
 751         for (i = 0; i < oxu->periodic_size; i++)
 752                 oxu->mem->frame_list[i] = EHCI_LIST_END;
 753         for (i = 0; i < QHEAD_NUM; i++)
 754                 oxu->qh_used[i] = 0;
 755         for (i = 0; i < QTD_NUM; i++)
 756                 oxu->qtd_used[i] = 0;
 757
 758         oxu->murb_pool = kcalloc(MURB_NUM, sizeof(struct oxu_murb), flags);
 759         if (!oxu->murb_pool)
 760                 goto fail;
 761
 762         for (i = 0; i < MURB_NUM; i++)
 763                 oxu->murb_used[i] = 0;
 764
 765         oxu->async = oxu_qh_alloc(oxu);
 766         if (!oxu->async)
 767                 goto fail;
 768
 769         oxu->periodic = (__le32 *) &oxu->mem->frame_list;
 770         oxu->periodic_dma = virt_to_phys(oxu->periodic);
 771
 772         for (i = 0; i < oxu->periodic_size; i++)
 773                 oxu->periodic[i] = EHCI_LIST_END;
 774
 775         /* software shadow of hardware table */
 776         oxu->pshadow = kcalloc(oxu->periodic_size, sizeof(void *), flags);
 777         if (oxu->pshadow != NULL)
 778                 return 0;
 779
 780 fail:
 781         oxu_dbg(oxu, "couldn't init memory\n");
 782         ehci_mem_cleanup(oxu);
 783         return -ENOMEM;
 784 }
 785
 786 /* Fill a qtd, returning how much of the buffer we were able to queue up.
 787  */
 788 static int qtd_fill(struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
 789                                 int token, int maxpacket)
 790 {
 791         int i, count;
 792         u64 addr = buf;
 793
 794         /* one buffer entry per 4K ... first might be short or unaligned */
 795         qtd->hw_buf[0] = cpu_to_le32((u32)addr);
 796         qtd->hw_buf_hi[0] = cpu_to_le32((u32)(addr >> 32));
 797         count = 0x1000 - (buf & 0x0fff);        /* rest of that page */
 798         if (likely(len < count))                /* ... iff needed */
 799                 count = len;
 800         else {
 801                 buf +=  0x1000;
 802                 buf &= ~0x0fff;
 803
 804                 /* per-qtd limit: from 16K to 20K (best alignment) */
 805                 for (i = 1; count < len && i < 5; i++) {
 806                         addr = buf;
 807                         qtd->hw_buf[i] = cpu_to_le32((u32)addr);
 808                         qtd->hw_buf_hi[i] = cpu_to_le32((u32)(addr >> 32));
 809                         buf += 0x1000;
 810                         if ((count + 0x1000) < len)
 811                                 count += 0x1000;
 812                         else
 813                                 count = len;
 814                 }
 815
 816                 /* short packets may only terminate transfers */
 817                 if (count != len)
 818                         count -= (count % maxpacket);
 819         }
 820         qtd->hw_token = cpu_to_le32((count << 16) | token);
 821         qtd->length = count;
 822
 823         return count;
 824 }
 825
 826 static inline void qh_update(struct oxu_hcd *oxu,
 827                                 struct ehci_qh *qh, struct ehci_qtd *qtd)
 828 {
 829         /* writes to an active overlay are unsafe */
 830         BUG_ON(qh->qh_state != QH_STATE_IDLE);
 831
 832         qh->hw_qtd_next = QTD_NEXT(qtd->qtd_dma);
 833         qh->hw_alt_next = EHCI_LIST_END;
 834
 835         /* Except for control endpoints, we make hardware maintain data
 836          * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
 837          * and set the pseudo-toggle in udev. Only usb_clear_halt() will
 838          * ever clear it.
 839          */
 840         if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) {
 841                 unsigned        is_out, epnum;
 842
 843                 is_out = !(qtd->hw_token & cpu_to_le32(1 << 8));
 844                 epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f;
 845                 if (unlikely(!usb_gettoggle(qh->dev, epnum, is_out))) {
 846                         qh->hw_token &= ~cpu_to_le32(QTD_TOGGLE);
 847                         usb_settoggle(qh->dev, epnum, is_out, 1);
 848                 }
 849         }
 850
 851         /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
 852         wmb();
 853         qh->hw_token &= cpu_to_le32(QTD_TOGGLE | QTD_STS_PING);
 854 }
 855
 856 /* If it weren't for a common silicon quirk (writing the dummy into the qh
 857  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
 858  * recovery (including urb dequeue) would need software changes to a QH...
 859  */
 860 static void qh_refresh(struct oxu_hcd *oxu, struct ehci_qh *qh)
 861 {
 862         struct ehci_qtd *qtd;
 863
 864         if (list_empty(&qh->qtd_list))
 865                 qtd = qh->dummy;
 866         else {
 867                 qtd = list_entry(qh->qtd_list.next,
 868                                 struct ehci_qtd, qtd_list);
 869                 /* first qtd may already be partially processed */
 870                 if (cpu_to_le32(qtd->qtd_dma) == qh->hw_current)
 871                         qtd = NULL;
 872         }
 873
 874         if (qtd)
 875                 qh_update(oxu, qh, qtd);
 876 }
 877
 878 static void qtd_copy_status(struct oxu_hcd *oxu, struct urb *urb,
 879                                 size_t length, u32 token)
 880 {
 881         /* count IN/OUT bytes, not SETUP (even short packets) */
 882         if (likely(QTD_PID(token) != 2))
 883                 urb->actual_length += length - QTD_LENGTH(token);
 884
 885         /* don't modify error codes */
 886         if (unlikely(urb->status != -EINPROGRESS))
 887                 return;
 888
 889         /* force cleanup after short read; not always an error */
 890         if (unlikely(IS_SHORT_READ(token)))
 891                 urb->status = -EREMOTEIO;
 892
 893         /* serious "can't proceed" faults reported by the hardware */
 894         if (token & QTD_STS_HALT) {
 895                 if (token & QTD_STS_BABBLE) {
 896                         /* FIXME "must" disable babbling device's port too */
 897                         urb->status = -EOVERFLOW;
 898                 } else if (token & QTD_STS_MMF) {
 899                         /* fs/ls interrupt xfer missed the complete-split */
 900                         urb->status = -EPROTO;
 901                 } else if (token & QTD_STS_DBE) {
 902                         urb->status = (QTD_PID(token) == 1) /* IN ? */
 903                                 ? -ENOSR  /* hc couldn't read data */
 904                                 : -ECOMM; /* hc couldn't write data */
 905                 } else if (token & QTD_STS_XACT) {
 906                         /* timeout, bad crc, wrong PID, etc; retried */
 907                         if (QTD_CERR(token))
 908                                 urb->status = -EPIPE;
 909                         else {
 910                                 oxu_dbg(oxu, "devpath %s ep%d%s 3strikes\n",
 911                                         urb->dev->devpath,
 912                                         usb_pipeendpoint(urb->pipe),
 913                                         usb_pipein(urb->pipe) ? "in" : "out");
 914                                 urb->status = -EPROTO;
 915                         }
 916                 /* CERR nonzero + no errors + halt --> stall */
 917                 } else if (QTD_CERR(token))
 918                         urb->status = -EPIPE;
 919                 else    /* unknown */
 920                         urb->status = -EPROTO;
 921
 922                 oxu_vdbg(oxu, "dev%d ep%d%s qtd token %08x --> status %d\n",
 923                         usb_pipedevice(urb->pipe),
 924                         usb_pipeendpoint(urb->pipe),
 925                         usb_pipein(urb->pipe) ? "in" : "out",
 926                         token, urb->status);
 927         }
 928 }
 929
 930 static void ehci_urb_done(struct oxu_hcd *oxu, struct urb *urb)
 931 __releases(oxu->lock)
 932 __acquires(oxu->lock)
 933 {
 934         if (likely(urb->hcpriv != NULL)) {
 935                 struct ehci_qh  *qh = (struct ehci_qh *) urb->hcpriv;
 936
 937                 /* S-mask in a QH means it's an interrupt urb */
 938                 if ((qh->hw_info2 & cpu_to_le32(QH_SMASK)) != 0) {
 939
 940                         /* ... update hc-wide periodic stats (for usbfs) */
 941                         oxu_to_hcd(oxu)->self.bandwidth_int_reqs--;
 942                 }
 943                 qh_put(qh);
 944         }
 945
 946         urb->hcpriv = NULL;
 947         switch (urb->status) {
 948         case -EINPROGRESS:              /* success */
 949                 urb->status = 0;
 950         default:                        /* fault */
 951                 break;
 952         case -EREMOTEIO:                /* fault or normal */
 953                 if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
 954                         urb->status = 0;
 955                 break;
 956         case -ECONNRESET:               /* canceled */
 957         case -ENOENT:
 958                 break;
 959         }
 960
 961 #ifdef OXU_URB_TRACE
 962         oxu_dbg(oxu, "%s %s urb %p ep%d%s status %d len %d/%d\n",
 963                 __func__, urb->dev->devpath, urb,
 964                 usb_pipeendpoint(urb->pipe),
 965                 usb_pipein(urb->pipe) ? "in" : "out",
 966                 urb->status,
 967                 urb->actual_length, urb->transfer_buffer_length);
 968 #endif
 969
 970         /* complete() can reenter this HCD */
 971         spin_unlock(&oxu->lock);
 972         usb_hcd_giveback_urb(oxu_to_hcd(oxu), urb, urb->status);
 973         spin_lock(&oxu->lock);
 974 }
 975
 976 static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
 977 static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
 978
 979 static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
 980 static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
 981
 982 #define HALT_BIT cpu_to_le32(QTD_STS_HALT)
 983
 984 /* Process and free completed qtds for a qh, returning URBs to drivers.
 985  * Chases up to qh->hw_current.  Returns number of completions called,
 986  * indicating how much "real" work we did.
 987  */
 988 static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh)
 989 {
 990         struct ehci_qtd *last = NULL, *end = qh->dummy;
 991         struct list_head *entry, *tmp;
 992         int stopped;
 993         unsigned count = 0;
 994         int do_status = 0;
 995         u8 state;
 996         struct oxu_murb *murb = NULL;
 997
 998         if (unlikely(list_empty(&qh->qtd_list)))
 999                 return count;
1000
1001         /* completions (or tasks on other cpus) must never clobber HALT
1002          * till we've gone through and cleaned everything up, even when
1003          * they add urbs to this qh's queue or mark them for unlinking.
1004          *
1005          * NOTE:  unlinking expects to be done in queue order.
1006          */
1007         state = qh->qh_state;
1008         qh->qh_state = QH_STATE_COMPLETING;
1009         stopped = (state == QH_STATE_IDLE);
1010
1011         /* remove de-activated QTDs from front of queue.
1012          * after faults (including short reads), cleanup this urb
1013          * then let the queue advance.
1014          * if queue is stopped, handles unlinks.
1015          */
1016         list_for_each_safe(entry, tmp, &qh->qtd_list) {
1017                 struct ehci_qtd *qtd;
1018                 struct urb *urb;
1019                 u32 token = 0;
1020
1021                 qtd = list_entry(entry, struct ehci_qtd, qtd_list);
1022                 urb = qtd->urb;
1023
1024                 /* Clean up any state from previous QTD ...*/
1025                 if (last) {
1026                         if (likely(last->urb != urb)) {
1027                                 if (last->urb->complete == NULL) {
1028                                         murb = (struct oxu_murb *) last->urb;
1029                                         last->urb = murb->main;
1030                                         if (murb->last) {
1031                                                 ehci_urb_done(oxu, last->urb);
1032                                                 count++;
1033                                         }
1034                                         oxu_murb_free(oxu, murb);
1035                                 } else {
1036                                         ehci_urb_done(oxu, last->urb);
1037                                         count++;
1038                                 }
1039                         }
1040                         oxu_qtd_free(oxu, last);
1041                         last = NULL;
1042                 }
1043
1044                 /* ignore urbs submitted during completions we reported */
1045                 if (qtd == end)
1046                         break;
1047
1048                 /* hardware copies qtd out of qh overlay */
1049                 rmb();
1050                 token = le32_to_cpu(qtd->hw_token);
1051
1052                 /* always clean up qtds the hc de-activated */
1053                 if ((token & QTD_STS_ACTIVE) == 0) {
1054
1055                         if ((token & QTD_STS_HALT) != 0) {
1056                                 stopped = 1;
1057
1058                         /* magic dummy for some short reads; qh won't advance.
1059                          * that silicon quirk can kick in with this dummy too.
1060                          */
1061                         } else if (IS_SHORT_READ(token) &&
1062                                         !(qtd->hw_alt_next & EHCI_LIST_END)) {
1063                                 stopped = 1;
1064                                 goto halt;
1065                         }
1066
1067                 /* stop scanning when we reach qtds the hc is using */
1068                 } else if (likely(!stopped &&
1069                                 HC_IS_RUNNING(oxu_to_hcd(oxu)->state))) {
1070                         break;
1071
1072                 } else {
1073                         stopped = 1;
1074
1075                         if (unlikely(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state)))
1076                                 urb->status = -ESHUTDOWN;
1077
1078                         /* ignore active urbs unless some previous qtd
1079                          * for the urb faulted (including short read) or
1080                          * its urb was canceled.  we may patch qh or qtds.
1081                          */
1082                         if (likely(urb->status == -EINPROGRESS))
1083                                 continue;
1084
1085                         /* issue status after short control reads */
1086                         if (unlikely(do_status != 0)
1087                                         && QTD_PID(token) == 0 /* OUT */) {
1088                                 do_status = 0;
1089                                 continue;
1090                         }
1091
1092                         /* token in overlay may be most current */
1093                         if (state == QH_STATE_IDLE
1094                                         && cpu_to_le32(qtd->qtd_dma)
1095                                                 == qh->hw_current)
1096                                 token = le32_to_cpu(qh->hw_token);
1097
1098                         /* force halt for unlinked or blocked qh, so we'll
1099                          * patch the qh later and so that completions can't
1100                          * activate it while we "know" it's stopped.
1101                          */
1102                         if ((HALT_BIT & qh->hw_token) == 0) {
1103 halt:
1104                                 qh->hw_token |= HALT_BIT;
1105                                 wmb();
1106                         }
1107                 }
1108
1109                 /* Remove it from the queue */
1110                 qtd_copy_status(oxu, urb->complete ?
1111                                         urb : ((struct oxu_murb *) urb)->main,
1112                                 qtd->length, token);
1113                 if ((usb_pipein(qtd->urb->pipe)) &&
1114                                 (NULL != qtd->transfer_buffer))
1115                         memcpy(qtd->transfer_buffer, qtd->buffer, qtd->length);
1116                 do_status = (urb->status == -EREMOTEIO)
1117                                 && usb_pipecontrol(urb->pipe);
1118
1119                 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
1120                         last = list_entry(qtd->qtd_list.prev,
1121                                         struct ehci_qtd, qtd_list);
1122                         last->hw_next = qtd->hw_next;
1123                 }
1124                 list_del(&qtd->qtd_list);
1125                 last = qtd;
1126         }
1127
1128         /* last urb's completion might still need calling */
1129         if (likely(last != NULL)) {
1130                 if (last->urb->complete == NULL) {
1131                         murb = (struct oxu_murb *) last->urb;
1132                         last->urb = murb->main;
1133                         if (murb->last) {
1134                                 ehci_urb_done(oxu, last->urb);
1135                                 count++;
1136                         }
1137                         oxu_murb_free(oxu, murb);
1138                 } else {
1139                         ehci_urb_done(oxu, last->urb);
1140                         count++;
1141                 }
1142                 oxu_qtd_free(oxu, last);
1143         }
1144
1145         /* restore original state; caller must unlink or relink */
1146         qh->qh_state = state;
1147
1148         /* be sure the hardware's done with the qh before refreshing
1149          * it after fault cleanup, or recovering from silicon wrongly
1150          * overlaying the dummy qtd (which reduces DMA chatter).
1151          */
1152         if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) {
1153                 switch (state) {
1154                 case QH_STATE_IDLE:
1155                         qh_refresh(oxu, qh);
1156                         break;
1157                 case QH_STATE_LINKED:
1158                         /* should be rare for periodic transfers,
1159                          * except maybe high bandwidth ...
1160                          */
1161                         if ((cpu_to_le32(QH_SMASK)
1162                                         & qh->hw_info2) != 0) {
1163                                 intr_deschedule(oxu, qh);
1164                                 (void) qh_schedule(oxu, qh);
1165                         } else
1166                                 unlink_async(oxu, qh);
1167                         break;
1168                 /* otherwise, unlink already started */
1169                 }
1170         }
1171
1172         return count;
1173 }
1174
1175 /* High bandwidth multiplier, as encoded in highspeed endpoint descriptors */
1176 #define hb_mult(wMaxPacketSize)         (1 + (((wMaxPacketSize) >> 11) & 0x03))
1177 /* ... and packet size, for any kind of endpoint descriptor */
1178 #define max_packet(wMaxPacketSize)      ((wMaxPacketSize) & 0x07ff)
1179
1180 /* Reverse of qh_urb_transaction: free a list of TDs.
1181  * used for cleanup after errors, before HC sees an URB's TDs.
1182  */
1183 static void qtd_list_free(struct oxu_hcd *oxu,
1184                                 struct urb *urb, struct list_head *qtd_list)
1185 {
1186         struct list_head *entry, *temp;
1187
1188         list_for_each_safe(entry, temp, qtd_list) {
1189                 struct ehci_qtd *qtd;
1190
1191                 qtd = list_entry(entry, struct ehci_qtd, qtd_list);
1192                 list_del(&qtd->qtd_list);
1193                 oxu_qtd_free(oxu, qtd);
1194         }
1195 }
1196
1197 /* Create a list of filled qtds for this URB; won't link into qh.
1198  */
1199 static struct list_head *qh_urb_transaction(struct oxu_hcd *oxu,
1200                                                 struct urb *urb,
1201                                                 struct list_head *head,
1202                                                 gfp_t flags)
1203 {
1204         struct ehci_qtd *qtd, *qtd_prev;
1205         dma_addr_t buf;
1206         int len, maxpacket;
1207         int is_input;
1208         u32 token;
1209         void *transfer_buf = NULL;
1210         int ret;
1211
1212         /*
1213          * URBs map to sequences of QTDs: one logical transaction
1214          */
1215         qtd = ehci_qtd_alloc(oxu);
1216         if (unlikely(!qtd))
1217                 return NULL;
1218         list_add_tail(&qtd->qtd_list, head);
1219         qtd->urb = urb;
1220
1221         token = QTD_STS_ACTIVE;
1222         token |= (EHCI_TUNE_CERR << 10);
1223         /* for split transactions, SplitXState initialized to zero */
1224
1225         len = urb->transfer_buffer_length;
1226         is_input = usb_pipein(urb->pipe);
1227         if (!urb->transfer_buffer && urb->transfer_buffer_length && is_input)
1228                 urb->transfer_buffer = phys_to_virt(urb->transfer_dma);
1229
1230         if (usb_pipecontrol(urb->pipe)) {
1231                 /* SETUP pid */
1232                 ret = oxu_buf_alloc(oxu, qtd, sizeof(struct usb_ctrlrequest));
1233                 if (ret)
1234                         goto cleanup;
1235
1236                 qtd_fill(qtd, qtd->buffer_dma, sizeof(struct usb_ctrlrequest),
1237                                 token | (2 /* "setup" */ << 8), 8);
1238                 memcpy(qtd->buffer, qtd->urb->setup_packet,
1239                                 sizeof(struct usb_ctrlrequest));
1240
1241                 /* ... and always at least one more pid */
1242                 token ^= QTD_TOGGLE;
1243                 qtd_prev = qtd;
1244                 qtd = ehci_qtd_alloc(oxu);
1245                 if (unlikely(!qtd))
1246                         goto cleanup;
1247                 qtd->urb = urb;
1248                 qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1249                 list_add_tail(&qtd->qtd_list, head);
1250
1251                 /* for zero length DATA stages, STATUS is always IN */
1252                 if (len == 0)
1253                         token |= (1 /* "in" */ << 8);
1254         }
1255
1256         /*
1257          * Data transfer stage: buffer setup
1258          */
1259
1260         ret = oxu_buf_alloc(oxu, qtd, len);
1261         if (ret)
1262                 goto cleanup;
1263
1264         buf = qtd->buffer_dma;
1265         transfer_buf = urb->transfer_buffer;
1266
1267         if (!is_input)
1268                 memcpy(qtd->buffer, qtd->urb->transfer_buffer, len);
1269
1270         if (is_input)
1271                 token |= (1 /* "in" */ << 8);
1272         /* else it's already initted to "out" pid (0 << 8) */
1273
1274         maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1275
1276         /*
1277          * buffer gets wrapped in one or more qtds;
1278          * last one may be "short" (including zero len)
1279          * and may serve as a control status ack
1280          */
1281         for (;;) {
1282                 int this_qtd_len;
1283
1284                 this_qtd_len = qtd_fill(qtd, buf, len, token, maxpacket);
1285                 qtd->transfer_buffer = transfer_buf;
1286                 len -= this_qtd_len;
1287                 buf += this_qtd_len;
1288                 transfer_buf += this_qtd_len;
1289                 if (is_input)
1290                         qtd->hw_alt_next = oxu->async->hw_alt_next;
1291
1292                 /* qh makes control packets use qtd toggle; maybe switch it */
1293                 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1294                         token ^= QTD_TOGGLE;
1295
1296                 if (likely(len <= 0))
1297                         break;
1298
1299                 qtd_prev = qtd;
1300                 qtd = ehci_qtd_alloc(oxu);
1301                 if (unlikely(!qtd))
1302                         goto cleanup;
1303                 if (likely(len > 0)) {
1304                         ret = oxu_buf_alloc(oxu, qtd, len);
1305                         if (ret)
1306                                 goto cleanup;
1307                 }
1308                 qtd->urb = urb;
1309                 qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1310                 list_add_tail(&qtd->qtd_list, head);
1311         }
1312
1313         /* unless the bulk/interrupt caller wants a chance to clean
1314          * up after short reads, hc should advance qh past this urb
1315          */
1316         if (likely((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
1317                                 || usb_pipecontrol(urb->pipe)))
1318                 qtd->hw_alt_next = EHCI_LIST_END;
1319
1320         /*
1321          * control requests may need a terminating data "status" ack;
1322          * bulk ones may need a terminating short packet (zero length).
1323          */
1324         if (likely(urb->transfer_buffer_length != 0)) {
1325                 int     one_more = 0;
1326
1327                 if (usb_pipecontrol(urb->pipe)) {
1328                         one_more = 1;
1329                         token ^= 0x0100;        /* "in" <--> "out"  */
1330                         token |= QTD_TOGGLE;    /* force DATA1 */
1331                 } else if (usb_pipebulk(urb->pipe)
1332                                 && (urb->transfer_flags & URB_ZERO_PACKET)
1333                                 && !(urb->transfer_buffer_length % maxpacket)) {
1334                         one_more = 1;
1335                 }
1336                 if (one_more) {
1337                         qtd_prev = qtd;
1338                         qtd = ehci_qtd_alloc(oxu);
1339                         if (unlikely(!qtd))
1340                                 goto cleanup;
1341                         qtd->urb = urb;
1342                         qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1343                         list_add_tail(&qtd->qtd_list, head);
1344
1345                         /* never any data in such packets */
1346                         qtd_fill(qtd, 0, 0, token, 0);
1347                 }
1348         }
1349
1350         /* by default, enable interrupt on urb completion */
1351                 qtd->hw_token |= cpu_to_le32(QTD_IOC);
1352         return head;
1353
1354 cleanup:
1355         qtd_list_free(oxu, urb, head);
1356         return NULL;
1357 }
1358
1359 /* Each QH holds a qtd list; a QH is used for everything except iso.
1360  *
1361  * For interrupt urbs, the scheduler must set the microframe scheduling
1362  * mask(s) each time the QH gets scheduled.  For highspeed, that's
1363  * just one microframe in the s-mask.  For split interrupt transactions
1364  * there are additional complications: c-mask, maybe FSTNs.
1365  */
1366 static struct ehci_qh *qh_make(struct oxu_hcd *oxu,
1367                                 struct urb *urb, gfp_t flags)
1368 {
1369         struct ehci_qh *qh = oxu_qh_alloc(oxu);
1370         u32 info1 = 0, info2 = 0;
1371         int is_input, type;
1372         int maxp = 0;
1373
1374         if (!qh)
1375                 return qh;
1376
1377         /*
1378          * init endpoint/device data for this QH
1379          */
1380         info1 |= usb_pipeendpoint(urb->pipe) << 8;
1381         info1 |= usb_pipedevice(urb->pipe) << 0;
1382
1383         is_input = usb_pipein(urb->pipe);
1384         type = usb_pipetype(urb->pipe);
1385         maxp = usb_maxpacket(urb->dev, urb->pipe, !is_input);
1386
1387         /* Compute interrupt scheduling parameters just once, and save.
1388          * - allowing for high bandwidth, how many nsec/uframe are used?
1389          * - split transactions need a second CSPLIT uframe; same question
1390          * - splits also need a schedule gap (for full/low speed I/O)
1391          * - qh has a polling interval
1392          *
1393          * For control/bulk requests, the HC or TT handles these.
1394          */
1395         if (type == PIPE_INTERRUPT) {
1396                 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
1397                                                                 is_input, 0,
1398                                 hb_mult(maxp) * max_packet(maxp)));
1399                 qh->start = NO_FRAME;
1400
1401                 if (urb->dev->speed == USB_SPEED_HIGH) {
1402                         qh->c_usecs = 0;
1403                         qh->gap_uf = 0;
1404
1405                         qh->period = urb->interval >> 3;
1406                         if (qh->period == 0 && urb->interval != 1) {
1407                                 /* NOTE interval 2 or 4 uframes could work.
1408                                  * But interval 1 scheduling is simpler, and
1409                                  * includes high bandwidth.
1410                                  */
1411                                 dbg("intr period %d uframes, NYET!",
1412                                                 urb->interval);
1413                                 goto done;
1414                         }
1415                 } else {
1416                         struct usb_tt   *tt = urb->dev->tt;
1417                         int             think_time;
1418
1419                         /* gap is f(FS/LS transfer times) */
1420                         qh->gap_uf = 1 + usb_calc_bus_time(urb->dev->speed,
1421                                         is_input, 0, maxp) / (125 * 1000);
1422
1423                         /* FIXME this just approximates SPLIT/CSPLIT times */
1424                         if (is_input) {         /* SPLIT, gap, CSPLIT+DATA */
1425                                 qh->c_usecs = qh->usecs + HS_USECS(0);
1426                                 qh->usecs = HS_USECS(1);
1427                         } else {                /* SPLIT+DATA, gap, CSPLIT */
1428                                 qh->usecs += HS_USECS(1);
1429                                 qh->c_usecs = HS_USECS(0);
1430                         }
1431
1432                         think_time = tt ? tt->think_time : 0;
1433                         qh->tt_usecs = NS_TO_US(think_time +
1434                                         usb_calc_bus_time(urb->dev->speed,
1435                                         is_input, 0, max_packet(maxp)));
1436                         qh->period = urb->interval;
1437                 }
1438         }
1439
1440         /* support for tt scheduling, and access to toggles */
1441         qh->dev = urb->dev;
1442
1443         /* using TT? */
1444         switch (urb->dev->speed) {
1445         case USB_SPEED_LOW:
1446                 info1 |= (1 << 12);     /* EPS "low" */
1447                 /* FALL THROUGH */
1448
1449         case USB_SPEED_FULL:
1450                 /* EPS 0 means "full" */
1451                 if (type != PIPE_INTERRUPT)
1452                         info1 |= (EHCI_TUNE_RL_TT << 28);
1453                 if (type == PIPE_CONTROL) {
1454                         info1 |= (1 << 27);     /* for TT */
1455                         info1 |= 1 << 14;       /* toggle from qtd */
1456                 }
1457                 info1 |= maxp << 16;
1458
1459                 info2 |= (EHCI_TUNE_MULT_TT << 30);
1460                 info2 |= urb->dev->ttport << 23;
1461
1462                 /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
1463
1464                 break;
1465
1466         case USB_SPEED_HIGH:            /* no TT involved */
1467                 info1 |= (2 << 12);     /* EPS "high" */
1468                 if (type == PIPE_CONTROL) {
1469                         info1 |= (EHCI_TUNE_RL_HS << 28);
1470                         info1 |= 64 << 16;      /* usb2 fixed maxpacket */
1471                         info1 |= 1 << 14;       /* toggle from qtd */
1472                         info2 |= (EHCI_TUNE_MULT_HS << 30);
1473                 } else if (type == PIPE_BULK) {
1474                         info1 |= (EHCI_TUNE_RL_HS << 28);
1475                         info1 |= 512 << 16;     /* usb2 fixed maxpacket */
1476                         info2 |= (EHCI_TUNE_MULT_HS << 30);
1477                 } else {                /* PIPE_INTERRUPT */
1478                         info1 |= max_packet(maxp) << 16;
1479                         info2 |= hb_mult(maxp) << 30;
1480                 }
1481                 break;
1482         default:
1483                 dbg("bogus dev %p speed %d", urb->dev, urb->dev->speed);
1484 done:
1485                 qh_put(qh);
1486                 return NULL;
1487         }
1488
1489         /* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
1490
1491         /* init as live, toggle clear, advance to dummy */
1492         qh->qh_state = QH_STATE_IDLE;
1493         qh->hw_info1 = cpu_to_le32(info1);
1494         qh->hw_info2 = cpu_to_le32(info2);
1495         usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1);
1496         qh_refresh(oxu, qh);
1497         return qh;
1498 }
1499
1500 /* Move qh (and its qtds) onto async queue; maybe enable queue.
1501  */
1502 static void qh_link_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1503 {
1504         __le32 dma = QH_NEXT(qh->qh_dma);
1505         struct ehci_qh *head;
1506
1507         /* (re)start the async schedule? */
1508         head = oxu->async;
1509         timer_action_done(oxu, TIMER_ASYNC_OFF);
1510         if (!head->qh_next.qh) {
1511                 u32     cmd = readl(&oxu->regs->command);
1512
1513                 if (!(cmd & CMD_ASE)) {
1514                         /* in case a clear of CMD_ASE didn't take yet */
1515                         (void)handshake(oxu, &oxu->regs->status,
1516                                         STS_ASS, 0, 150);
1517                         cmd |= CMD_ASE | CMD_RUN;
1518                         writel(cmd, &oxu->regs->command);
1519                         oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1520                         /* posted write need not be known to HC yet ... */
1521                 }
1522         }
1523
1524         /* clear halt and/or toggle; and maybe recover from silicon quirk */
1525         if (qh->qh_state == QH_STATE_IDLE)
1526                 qh_refresh(oxu, qh);
1527
1528         /* splice right after start */
1529         qh->qh_next = head->qh_next;
1530         qh->hw_next = head->hw_next;
1531         wmb();
1532
1533         head->qh_next.qh = qh;
1534         head->hw_next = dma;
1535
1536         qh->qh_state = QH_STATE_LINKED;
1537         /* qtd completions reported later by interrupt */
1538 }
1539
1540 #define QH_ADDR_MASK    cpu_to_le32(0x7f)
1541
1542 /*
1543  * For control/bulk/interrupt, return QH with these TDs appended.
1544  * Allocates and initializes the QH if necessary.
1545  * Returns null if it can't allocate a QH it needs to.
1546  * If the QH has TDs (urbs) already, that's great.
1547  */
1548 static struct ehci_qh *qh_append_tds(struct oxu_hcd *oxu,
1549                                 struct urb *urb, struct list_head *qtd_list,
1550                                 int epnum, void **ptr)
1551 {
1552         struct ehci_qh *qh = NULL;
1553
1554         qh = (struct ehci_qh *) *ptr;
1555         if (unlikely(qh == NULL)) {
1556                 /* can't sleep here, we have oxu->lock... */
1557                 qh = qh_make(oxu, urb, GFP_ATOMIC);
1558                 *ptr = qh;
1559         }
1560         if (likely(qh != NULL)) {
1561                 struct ehci_qtd *qtd;
1562
1563                 if (unlikely(list_empty(qtd_list)))
1564                         qtd = NULL;
1565                 else
1566                         qtd = list_entry(qtd_list->next, struct ehci_qtd,
1567                                         qtd_list);
1568
1569                 /* control qh may need patching ... */
1570                 if (unlikely(epnum == 0)) {
1571
1572                         /* usb_reset_device() briefly reverts to address 0 */
1573                         if (usb_pipedevice(urb->pipe) == 0)
1574                                 qh->hw_info1 &= ~QH_ADDR_MASK;
1575                 }
1576
1577                 /* just one way to queue requests: swap with the dummy qtd.
1578                  * only hc or qh_refresh() ever modify the overlay.
1579                  */
1580                 if (likely(qtd != NULL)) {
1581                         struct ehci_qtd *dummy;
1582                         dma_addr_t dma;
1583                         __le32 token;
1584
1585                         /* to avoid racing the HC, use the dummy td instead of
1586                          * the first td of our list (becomes new dummy).  both
1587                          * tds stay deactivated until we're done, when the
1588                          * HC is allowed to fetch the old dummy (4.10.2).
1589                          */
1590                         token = qtd->hw_token;
1591                         qtd->hw_token = HALT_BIT;
1592                         wmb();
1593                         dummy = qh->dummy;
1594
1595                         dma = dummy->qtd_dma;
1596                         *dummy = *qtd;
1597                         dummy->qtd_dma = dma;
1598
1599                         list_del(&qtd->qtd_list);
1600                         list_add(&dummy->qtd_list, qtd_list);
1601                         list_splice(qtd_list, qh->qtd_list.prev);
1602
1603                         ehci_qtd_init(qtd, qtd->qtd_dma);
1604                         qh->dummy = qtd;
1605
1606                         /* hc must see the new dummy at list end */
1607                         dma = qtd->qtd_dma;
1608                         qtd = list_entry(qh->qtd_list.prev,
1609                                         struct ehci_qtd, qtd_list);
1610                         qtd->hw_next = QTD_NEXT(dma);
1611
1612                         /* let the hc process these next qtds */
1613                         dummy->hw_token = (token & ~(0x80));
1614                         wmb();
1615                         dummy->hw_token = token;
1616
1617                         urb->hcpriv = qh_get(qh);
1618                 }
1619         }
1620         return qh;
1621 }
1622
1623 static int submit_async(struct oxu_hcd  *oxu, struct urb *urb,
1624                         struct list_head *qtd_list, gfp_t mem_flags)
1625 {
1626         struct ehci_qtd *qtd;
1627         int epnum;
1628         unsigned long flags;
1629         struct ehci_qh *qh = NULL;
1630         int rc = 0;
1631
1632         qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1633         epnum = urb->ep->desc.bEndpointAddress;
1634
1635 #ifdef OXU_URB_TRACE
1636         oxu_dbg(oxu, "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1637                 __func__, urb->dev->devpath, urb,
1638                 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1639                 urb->transfer_buffer_length,
1640                 qtd, urb->ep->hcpriv);
1641 #endif
1642
1643         spin_lock_irqsave(&oxu->lock, flags);
1644         if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
1645                 rc = -ESHUTDOWN;
1646                 goto done;
1647         }
1648
1649         qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
1650         if (unlikely(qh == NULL)) {
1651                 rc = -ENOMEM;
1652                 goto done;
1653         }
1654
1655         /* Control/bulk operations through TTs don't need scheduling,
1656          * the HC and TT handle it when the TT has a buffer ready.
1657          */
1658         if (likely(qh->qh_state == QH_STATE_IDLE))
1659                 qh_link_async(oxu, qh_get(qh));
1660 done:
1661         spin_unlock_irqrestore(&oxu->lock, flags);
1662         if (unlikely(qh == NULL))
1663                 qtd_list_free(oxu, urb, qtd_list);
1664         return rc;
1665 }
1666
1667 /* The async qh for the qtds being reclaimed are now unlinked from the HC */
1668
1669 static void end_unlink_async(struct oxu_hcd *oxu)
1670 {
1671         struct ehci_qh *qh = oxu->reclaim;
1672         struct ehci_qh *next;
1673
1674         timer_action_done(oxu, TIMER_IAA_WATCHDOG);
1675
1676         qh->qh_state = QH_STATE_IDLE;
1677         qh->qh_next.qh = NULL;
1678         qh_put(qh);                     /* refcount from reclaim */
1679
1680         /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1681         next = qh->reclaim;
1682         oxu->reclaim = next;
1683         oxu->reclaim_ready = 0;
1684         qh->reclaim = NULL;
1685
1686         qh_completions(oxu, qh);
1687
1688         if (!list_empty(&qh->qtd_list)
1689                         && HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
1690                 qh_link_async(oxu, qh);
1691         else {
1692                 qh_put(qh);             /* refcount from async list */
1693
1694                 /* it's not free to turn the async schedule on/off; leave it
1695                  * active but idle for a while once it empties.
1696                  */
1697                 if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state)
1698                                 && oxu->async->qh_next.qh == NULL)
1699                         timer_action(oxu, TIMER_ASYNC_OFF);
1700         }
1701
1702         if (next) {
1703                 oxu->reclaim = NULL;
1704                 start_unlink_async(oxu, next);
1705         }
1706 }
1707
1708 /* makes sure the async qh will become idle */
1709 /* caller must own oxu->lock */
1710
1711 static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1712 {
1713         int cmd = readl(&oxu->regs->command);
1714         struct ehci_qh *prev;
1715
1716 #ifdef DEBUG
1717         assert_spin_locked(&oxu->lock);
1718         if (oxu->reclaim || (qh->qh_state != QH_STATE_LINKED
1719                                 && qh->qh_state != QH_STATE_UNLINK_WAIT))
1720                 BUG();
1721 #endif
1722
1723         /* stop async schedule right now? */
1724         if (unlikely(qh == oxu->async)) {
1725                 /* can't get here without STS_ASS set */
1726                 if (oxu_to_hcd(oxu)->state != HC_STATE_HALT
1727                                 && !oxu->reclaim) {
1728                         /* ... and CMD_IAAD clear */
1729                         writel(cmd & ~CMD_ASE, &oxu->regs->command);
1730                         wmb();
1731                         /* handshake later, if we need to */
1732                         timer_action_done(oxu, TIMER_ASYNC_OFF);
1733                 }
1734                 return;
1735         }
1736
1737         qh->qh_state = QH_STATE_UNLINK;
1738         oxu->reclaim = qh = qh_get(qh);
1739
1740         prev = oxu->async;
1741         while (prev->qh_next.qh != qh)
1742                 prev = prev->qh_next.qh;
1743
1744         prev->hw_next = qh->hw_next;
1745         prev->qh_next = qh->qh_next;
1746         wmb();
1747
1748         if (unlikely(oxu_to_hcd(oxu)->state == HC_STATE_HALT)) {
1749                 /* if (unlikely(qh->reclaim != 0))
1750                  *      this will recurse, probably not much
1751                  */
1752                 end_unlink_async(oxu);
1753                 return;
1754         }
1755
1756         oxu->reclaim_ready = 0;
1757         cmd |= CMD_IAAD;
1758         writel(cmd, &oxu->regs->command);
1759         (void) readl(&oxu->regs->command);
1760         timer_action(oxu, TIMER_IAA_WATCHDOG);
1761 }
1762
1763 static void scan_async(struct oxu_hcd *oxu)
1764 {
1765         struct ehci_qh *qh;
1766         enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1767
1768         if (!++(oxu->stamp))
1769                 oxu->stamp++;
1770         timer_action_done(oxu, TIMER_ASYNC_SHRINK);
1771 rescan:
1772         qh = oxu->async->qh_next.qh;
1773         if (likely(qh != NULL)) {
1774                 do {
1775                         /* clean any finished work for this qh */
1776                         if (!list_empty(&qh->qtd_list)
1777                                         && qh->stamp != oxu->stamp) {
1778                                 int temp;
1779
1780                                 /* unlinks could happen here; completion
1781                                  * reporting drops the lock.  rescan using
1782                                  * the latest schedule, but don't rescan
1783                                  * qhs we already finished (no looping).
1784                                  */
1785                                 qh = qh_get(qh);
1786                                 qh->stamp = oxu->stamp;
1787                                 temp = qh_completions(oxu, qh);
1788                                 qh_put(qh);
1789                                 if (temp != 0)
1790                                         goto rescan;
1791                         }
1792
1793                         /* unlink idle entries, reducing HC PCI usage as well
1794                          * as HCD schedule-scanning costs.  delay for any qh
1795                          * we just scanned, there's a not-unusual case that it
1796                          * doesn't stay idle for long.
1797                          * (plus, avoids some kind of re-activation race.)
1798                          */
1799                         if (list_empty(&qh->qtd_list)) {
1800                                 if (qh->stamp == oxu->stamp)
1801                                         action = TIMER_ASYNC_SHRINK;
1802                                 else if (!oxu->reclaim
1803                                             && qh->qh_state == QH_STATE_LINKED)
1804                                         start_unlink_async(oxu, qh);
1805                         }
1806
1807                         qh = qh->qh_next.qh;
1808                 } while (qh);
1809         }
1810         if (action == TIMER_ASYNC_SHRINK)
1811                 timer_action(oxu, TIMER_ASYNC_SHRINK);
1812 }
1813
1814 /*
1815  * periodic_next_shadow - return "next" pointer on shadow list
1816  * @periodic: host pointer to qh/itd/sitd
1817  * @tag: hardware tag for type of this record
1818  */
1819 static union ehci_shadow *periodic_next_shadow(union ehci_shadow *periodic,
1820                                                 __le32 tag)
1821 {
1822         switch (tag) {
1823         default:
1824         case Q_TYPE_QH:
1825                 return &periodic->qh->qh_next;
1826         }
1827 }
1828
1829 /* caller must hold oxu->lock */
1830 static void periodic_unlink(struct oxu_hcd *oxu, unsigned frame, void *ptr)
1831 {
1832         union ehci_shadow *prev_p = &oxu->pshadow[frame];
1833         __le32 *hw_p = &oxu->periodic[frame];
1834         union ehci_shadow here = *prev_p;
1835
1836         /* find predecessor of "ptr"; hw and shadow lists are in sync */
1837         while (here.ptr && here.ptr != ptr) {
1838                 prev_p = periodic_next_shadow(prev_p, Q_NEXT_TYPE(*hw_p));
1839                 hw_p = here.hw_next;
1840                 here = *prev_p;
1841         }
1842         /* an interrupt entry (at list end) could have been shared */
1843         if (!here.ptr)
1844                 return;
1845
1846         /* update shadow and hardware lists ... the old "next" pointers
1847          * from ptr may still be in use, the caller updates them.
1848          */
1849         *prev_p = *periodic_next_shadow(&here, Q_NEXT_TYPE(*hw_p));
1850         *hw_p = *here.hw_next;
1851 }
1852
1853 /* how many of the uframe's 125 usecs are allocated? */
1854 static unsigned short periodic_usecs(struct oxu_hcd *oxu,
1855                                         unsigned frame, unsigned uframe)
1856 {
1857         __le32 *hw_p = &oxu->periodic[frame];
1858         union ehci_shadow *q = &oxu->pshadow[frame];
1859         unsigned usecs = 0;
1860
1861         while (q->ptr) {
1862                 switch (Q_NEXT_TYPE(*hw_p)) {
1863                 case Q_TYPE_QH:
1864                 default:
1865                         /* is it in the S-mask? */
1866                         if (q->qh->hw_info2 & cpu_to_le32(1 << uframe))
1867                                 usecs += q->qh->usecs;
1868                         /* ... or C-mask? */
1869                         if (q->qh->hw_info2 & cpu_to_le32(1 << (8 + uframe)))
1870                                 usecs += q->qh->c_usecs;
1871                         hw_p = &q->qh->hw_next;
1872                         q = &q->qh->qh_next;
1873                         break;
1874                 }
1875         }
1876 #ifdef DEBUG
1877         if (usecs > 100)
1878                 oxu_err(oxu, "uframe %d sched overrun: %d usecs\n",
1879                                                 frame * 8 + uframe, usecs);
1880 #endif
1881         return usecs;
1882 }
1883
1884 static int enable_periodic(struct oxu_hcd *oxu)
1885 {
1886         u32 cmd;
1887         int status;
1888
1889         /* did clearing PSE did take effect yet?
1890          * takes effect only at frame boundaries...
1891          */
1892         status = handshake(oxu, &oxu->regs->status, STS_PSS, 0, 9 * 125);
1893         if (status != 0) {
1894                 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1895                 return status;
1896         }
1897
1898         cmd = readl(&oxu->regs->command) | CMD_PSE;
1899         writel(cmd, &oxu->regs->command);
1900         /* posted write ... PSS happens later */
1901         oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1902
1903         /* make sure ehci_work scans these */
1904         oxu->next_uframe = readl(&oxu->regs->frame_index)
1905                 % (oxu->periodic_size << 3);
1906         return 0;
1907 }
1908
1909 static int disable_periodic(struct oxu_hcd *oxu)
1910 {
1911         u32 cmd;
1912         int status;
1913
1914         /* did setting PSE not take effect yet?
1915          * takes effect only at frame boundaries...
1916          */
1917         status = handshake(oxu, &oxu->regs->status, STS_PSS, STS_PSS, 9 * 125);
1918         if (status != 0) {
1919                 oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1920                 return status;
1921         }
1922
1923         cmd = readl(&oxu->regs->command) & ~CMD_PSE;
1924         writel(cmd, &oxu->regs->command);
1925         /* posted write ... */
1926
1927         oxu->next_uframe = -1;
1928         return 0;
1929 }
1930
1931 /* periodic schedule slots have iso tds (normal or split) first, then a
1932  * sparse tree for active interrupt transfers.
1933  *
1934  * this just links in a qh; caller guarantees uframe masks are set right.
1935  * no FSTN support (yet; oxu 0.96+)
1936  */
1937 static int qh_link_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
1938 {
1939         unsigned i;
1940         unsigned period = qh->period;
1941
1942         dev_dbg(&qh->dev->dev,
1943                 "link qh%d-%04x/%p start %d [%d/%d us]\n",
1944                 period, le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
1945                 qh, qh->start, qh->usecs, qh->c_usecs);
1946
1947         /* high bandwidth, or otherwise every microframe */
1948         if (period == 0)
1949                 period = 1;
1950
1951         for (i = qh->start; i < oxu->periodic_size; i += period) {
1952                 union ehci_shadow       *prev = &oxu->pshadow[i];
1953                 __le32                  *hw_p = &oxu->periodic[i];
1954                 union ehci_shadow       here = *prev;
1955                 __le32                  type = 0;
1956
1957                 /* skip the iso nodes at list head */
1958                 while (here.ptr) {
1959                         type = Q_NEXT_TYPE(*hw_p);
1960                         if (type == Q_TYPE_QH)
1961                                 break;
1962                         prev = periodic_next_shadow(prev, type);
1963                         hw_p = &here.qh->hw_next;
1964                         here = *prev;
1965                 }
1966
1967                 /* sorting each branch by period (slow-->fast)
1968                  * enables sharing interior tree nodes
1969                  */
1970                 while (here.ptr && qh != here.qh) {
1971                         if (qh->period > here.qh->period)
1972                                 break;
1973                         prev = &here.qh->qh_next;
1974                         hw_p = &here.qh->hw_next;
1975                         here = *prev;
1976                 }
1977                 /* link in this qh, unless some earlier pass did that */
1978                 if (qh != here.qh) {
1979                         qh->qh_next = here;
1980                         if (here.qh)
1981                                 qh->hw_next = *hw_p;
1982                         wmb();
1983                         prev->qh = qh;
1984                         *hw_p = QH_NEXT(qh->qh_dma);
1985                 }
1986         }
1987         qh->qh_state = QH_STATE_LINKED;
1988         qh_get(qh);
1989
1990         /* update per-qh bandwidth for usbfs */
1991         oxu_to_hcd(oxu)->self.bandwidth_allocated += qh->period
1992                 ? ((qh->usecs + qh->c_usecs) / qh->period)
1993                 : (qh->usecs * 8);
1994
1995         /* maybe enable periodic schedule processing */
1996         if (!oxu->periodic_sched++)
1997                 return enable_periodic(oxu);
1998
1999         return 0;
2000 }
2001
2002 static void qh_unlink_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
2003 {
2004         unsigned i;
2005         unsigned period;
2006
2007         /* FIXME:
2008          *   IF this isn't high speed
2009          *   and this qh is active in the current uframe
2010          *   (and overlay token SplitXstate is false?)
2011          * THEN
2012          *   qh->hw_info1 |= cpu_to_le32(1 << 7 "ignore");
2013          */
2014
2015         /* high bandwidth, or otherwise part of every microframe */
2016         period = qh->period;
2017         if (period == 0)
2018                 period = 1;
2019
2020         for (i = qh->start; i < oxu->periodic_size; i += period)
2021                 periodic_unlink(oxu, i, qh);
2022
2023         /* update per-qh bandwidth for usbfs */
2024         oxu_to_hcd(oxu)->self.bandwidth_allocated -= qh->period
2025                 ? ((qh->usecs + qh->c_usecs) / qh->period)
2026                 : (qh->usecs * 8);
2027
2028         dev_dbg(&qh->dev->dev,
2029                 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
2030                 qh->period,
2031                 le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
2032                 qh, qh->start, qh->usecs, qh->c_usecs);
2033
2034         /* qh->qh_next still "live" to HC */
2035         qh->qh_state = QH_STATE_UNLINK;
2036         qh->qh_next.ptr = NULL;
2037         qh_put(qh);
2038
2039         /* maybe turn off periodic schedule */
2040         oxu->periodic_sched--;
2041         if (!oxu->periodic_sched)
2042                 (void) disable_periodic(oxu);
2043 }
2044
2045 static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2046 {
2047         unsigned wait;
2048
2049         qh_unlink_periodic(oxu, qh);
2050
2051         /* simple/paranoid:  always delay, expecting the HC needs to read
2052          * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
2053          * expect khubd to clean up after any CSPLITs we won't issue.
2054          * active high speed queues may need bigger delays...
2055          */
2056         if (list_empty(&qh->qtd_list)
2057                 || (cpu_to_le32(QH_CMASK) & qh->hw_info2) != 0)
2058                 wait = 2;
2059         else
2060                 wait = 55;      /* worst case: 3 * 1024 */
2061
2062         udelay(wait);
2063         qh->qh_state = QH_STATE_IDLE;
2064         qh->hw_next = EHCI_LIST_END;
2065         wmb();
2066 }
2067
2068 static int check_period(struct oxu_hcd *oxu,
2069                         unsigned frame, unsigned uframe,
2070                         unsigned period, unsigned usecs)
2071 {
2072         int claimed;
2073
2074         /* complete split running into next frame?
2075          * given FSTN support, we could sometimes check...
2076          */
2077         if (uframe >= 8)
2078                 return 0;
2079
2080         /*
2081          * 80% periodic == 100 usec/uframe available
2082          * convert "usecs we need" to "max already claimed"
2083          */
2084         usecs = 100 - usecs;
2085
2086         /* we "know" 2 and 4 uframe intervals were rejected; so
2087          * for period 0, check _every_ microframe in the schedule.
2088          */
2089         if (unlikely(period == 0)) {
2090                 do {
2091                         for (uframe = 0; uframe < 7; uframe++) {
2092                                 claimed = periodic_usecs(oxu, frame, uframe);
2093                                 if (claimed > usecs)
2094                                         return 0;
2095                         }
2096                 } while ((frame += 1) < oxu->periodic_size);
2097
2098         /* just check the specified uframe, at that period */
2099         } else {
2100                 do {
2101                         claimed = periodic_usecs(oxu, frame, uframe);
2102                         if (claimed > usecs)
2103                                 return 0;
2104                 } while ((frame += period) < oxu->periodic_size);
2105         }
2106
2107         return 1;
2108 }
2109
2110 static int check_intr_schedule(struct oxu_hcd   *oxu,
2111                                 unsigned frame, unsigned uframe,
2112                                 const struct ehci_qh *qh, __le32 *c_maskp)
2113 {
2114         int retval = -ENOSPC;
2115
2116         if (qh->c_usecs && uframe >= 6)         /* FSTN territory? */
2117                 goto done;
2118
2119         if (!check_period(oxu, frame, uframe, qh->period, qh->usecs))
2120                 goto done;
2121         if (!qh->c_usecs) {
2122                 retval = 0;
2123                 *c_maskp = 0;
2124                 goto done;
2125         }
2126
2127 done:
2128         return retval;
2129 }
2130
2131 /* "first fit" scheduling policy used the first time through,
2132  * or when the previous schedule slot can't be re-used.
2133  */
2134 static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2135 {
2136         int             status;
2137         unsigned        uframe;
2138         __le32          c_mask;
2139         unsigned        frame;          /* 0..(qh->period - 1), or NO_FRAME */
2140
2141         qh_refresh(oxu, qh);
2142         qh->hw_next = EHCI_LIST_END;
2143         frame = qh->start;
2144
2145         /* reuse the previous schedule slots, if we can */
2146         if (frame < qh->period) {
2147                 uframe = ffs(le32_to_cpup(&qh->hw_info2) & QH_SMASK);
2148                 status = check_intr_schedule(oxu, frame, --uframe,
2149                                 qh, &c_mask);
2150         } else {
2151                 uframe = 0;
2152                 c_mask = 0;
2153                 status = -ENOSPC;
2154         }
2155
2156         /* else scan the schedule to find a group of slots such that all
2157          * uframes have enough periodic bandwidth available.
2158          */
2159         if (status) {
2160                 /* "normal" case, uframing flexible except with splits */
2161                 if (qh->period) {
2162                         frame = qh->period - 1;
2163                         do {
2164                                 for (uframe = 0; uframe < 8; uframe++) {
2165                                         status = check_intr_schedule(oxu,
2166                                                         frame, uframe, qh,
2167                                                         &c_mask);
2168                                         if (status == 0)
2169                                                 break;
2170                                 }
2171                         } while (status && frame--);
2172
2173                 /* qh->period == 0 means every uframe */
2174                 } else {
2175                         frame = 0;
2176                         status = check_intr_schedule(oxu, 0, 0, qh, &c_mask);
2177                 }
2178                 if (status)
2179                         goto done;
2180                 qh->start = frame;
2181
2182                 /* reset S-frame and (maybe) C-frame masks */
2183                 qh->hw_info2 &= cpu_to_le32(~(QH_CMASK | QH_SMASK));
2184                 qh->hw_info2 |= qh->period
2185                         ? cpu_to_le32(1 << uframe)
2186                         : cpu_to_le32(QH_SMASK);
2187                 qh->hw_info2 |= c_mask;
2188         } else
2189                 oxu_dbg(oxu, "reused qh %p schedule\n", qh);
2190
2191         /* stuff into the periodic schedule */
2192         status = qh_link_periodic(oxu, qh);
2193 done:
2194         return status;
2195 }
2196
2197 static int intr_submit(struct oxu_hcd *oxu, struct urb *urb,
2198                         struct list_head *qtd_list, gfp_t mem_flags)
2199 {
2200         unsigned epnum;
2201         unsigned long flags;
2202         struct ehci_qh *qh;
2203         int status = 0;
2204         struct list_head        empty;
2205
2206         /* get endpoint and transfer/schedule data */
2207         epnum = urb->ep->desc.bEndpointAddress;
2208
2209         spin_lock_irqsave(&oxu->lock, flags);
2210
2211         if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
2212                 status = -ESHUTDOWN;
2213                 goto done;
2214         }
2215
2216         /* get qh and force any scheduling errors */
2217         INIT_LIST_HEAD(&empty);
2218         qh = qh_append_tds(oxu, urb, &empty, epnum, &urb->ep->hcpriv);
2219         if (qh == NULL) {
2220                 status = -ENOMEM;
2221                 goto done;
2222         }
2223         if (qh->qh_state == QH_STATE_IDLE) {
2224                 status = qh_schedule(oxu, qh);
2225                 if (status != 0)
2226                         goto done;
2227         }
2228
2229         /* then queue the urb's tds to the qh */
2230         qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
2231         BUG_ON(qh == NULL);
2232
2233         /* ... update usbfs periodic stats */
2234         oxu_to_hcd(oxu)->self.bandwidth_int_reqs++;
2235
2236 done:
2237         spin_unlock_irqrestore(&oxu->lock, flags);
2238         if (status)
2239                 qtd_list_free(oxu, urb, qtd_list);
2240
2241         return status;
2242 }
2243
2244 static inline int itd_submit(struct oxu_hcd *oxu, struct urb *urb,
2245                                                 gfp_t mem_flags)
2246 {
2247         oxu_dbg(oxu, "iso support is missing!\n");
2248         return -ENOSYS;
2249 }
2250
2251 static inline int sitd_submit(struct oxu_hcd *oxu, struct urb *urb,
2252                                                 gfp_t mem_flags)
2253 {
2254         oxu_dbg(oxu, "split iso support is missing!\n");
2255         return -ENOSYS;
2256 }
2257
2258 static void scan_periodic(struct oxu_hcd *oxu)
2259 {
2260         unsigned frame, clock, now_uframe, mod;
2261         unsigned modified;
2262
2263         mod = oxu->periodic_size << 3;
2264
2265         /*
2266          * When running, scan from last scan point up to "now"
2267          * else clean up by scanning everything that's left.
2268          * Touches as few pages as possible:  cache-friendly.
2269          */
2270         now_uframe = oxu->next_uframe;
2271         if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2272                 clock = readl(&oxu->regs->frame_index);
2273         else
2274                 clock = now_uframe + mod - 1;
2275         clock %= mod;
2276
2277         for (;;) {
2278                 union ehci_shadow       q, *q_p;
2279                 __le32                  type, *hw_p;
2280                 unsigned                uframes;
2281
2282                 /* don't scan past the live uframe */
2283                 frame = now_uframe >> 3;
2284                 if (frame == (clock >> 3))
2285                         uframes = now_uframe & 0x07;
2286                 else {
2287                         /* safe to scan the whole frame at once */
2288                         now_uframe |= 0x07;
2289                         uframes = 8;
2290                 }
2291
2292 restart:
2293                 /* scan each element in frame's queue for completions */
2294                 q_p = &oxu->pshadow[frame];
2295                 hw_p = &oxu->periodic[frame];
2296                 q.ptr = q_p->ptr;
2297                 type = Q_NEXT_TYPE(*hw_p);
2298                 modified = 0;
2299
2300                 while (q.ptr != NULL) {
2301                         union ehci_shadow temp;
2302                         int live;
2303
2304                         live = HC_IS_RUNNING(oxu_to_hcd(oxu)->state);
2305                         switch (type) {
2306                         case Q_TYPE_QH:
2307                                 /* handle any completions */
2308                                 temp.qh = qh_get(q.qh);
2309                                 type = Q_NEXT_TYPE(q.qh->hw_next);
2310                                 q = q.qh->qh_next;
2311                                 modified = qh_completions(oxu, temp.qh);
2312                                 if (unlikely(list_empty(&temp.qh->qtd_list)))
2313                                         intr_deschedule(oxu, temp.qh);
2314                                 qh_put(temp.qh);
2315                                 break;
2316                         default:
2317                                 dbg("corrupt type %d frame %d shadow %p",
2318                                         type, frame, q.ptr);
2319                                 q.ptr = NULL;
2320                         }
2321
2322                         /* assume completion callbacks modify the queue */
2323                         if (unlikely(modified))
2324                                 goto restart;
2325                 }
2326
2327                 /* Stop when we catch up to the HC */
2328
2329                 /* FIXME:  this assumes we won't get lapped when
2330                  * latencies climb; that should be rare, but...
2331                  * detect it, and just go all the way around.
2332                  * FLR might help detect this case, so long as latencies
2333                  * don't exceed periodic_size msec (default 1.024 sec).
2334                  */
2335
2336                 /* FIXME: likewise assumes HC doesn't halt mid-scan */
2337
2338                 if (now_uframe == clock) {
2339                         unsigned        now;
2340
2341                         if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2342                                 break;
2343                         oxu->next_uframe = now_uframe;
2344                         now = readl(&oxu->regs->frame_index) % mod;
2345                         if (now_uframe == now)
2346                                 break;
2347
2348                         /* rescan the rest of this frame, then ... */
2349                         clock = now;
2350                 } else {
2351                         now_uframe++;
2352                         now_uframe %= mod;
2353                 }
2354         }
2355 }
2356
2357 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
2358  * The firmware seems to think that powering off is a wakeup event!
2359  * This routine turns off remote wakeup and everything else, on all ports.
2360  */
2361 static void ehci_turn_off_all_ports(struct oxu_hcd *oxu)
2362 {
2363         int port = HCS_N_PORTS(oxu->hcs_params);
2364
2365         while (port--)
2366                 writel(PORT_RWC_BITS, &oxu->regs->port_status[port]);
2367 }
2368
2369 static void ehci_port_power(struct oxu_hcd *oxu, int is_on)
2370 {
2371         unsigned port;
2372
2373         if (!HCS_PPC(oxu->hcs_params))
2374                 return;
2375
2376         oxu_dbg(oxu, "...power%s ports...\n", is_on ? "up" : "down");
2377         for (port = HCS_N_PORTS(oxu->hcs_params); port > 0; )
2378                 (void) oxu_hub_control(oxu_to_hcd(oxu),
2379                                 is_on ? SetPortFeature : ClearPortFeature,
2380                                 USB_PORT_FEAT_POWER,
2381                                 port--, NULL, 0);
2382         msleep(20);
2383 }
2384
2385 /* Called from some interrupts, timers, and so on.
2386  * It calls driver completion functions, after dropping oxu->lock.
2387  */
2388 static void ehci_work(struct oxu_hcd *oxu)
2389 {
2390         timer_action_done(oxu, TIMER_IO_WATCHDOG);
2391         if (oxu->reclaim_ready)
2392                 end_unlink_async(oxu);
2393
2394         /* another CPU may drop oxu->lock during a schedule scan while
2395          * it reports urb completions.  this flag guards against bogus
2396          * attempts at re-entrant schedule scanning.
2397          */
2398         if (oxu->scanning)
2399                 return;
2400         oxu->scanning = 1;
2401         scan_async(oxu);
2402         if (oxu->next_uframe != -1)
2403                 scan_periodic(oxu);
2404         oxu->scanning = 0;
2405
2406         /* the IO watchdog guards against hardware or driver bugs that
2407          * misplace IRQs, and should let us run completely without IRQs.
2408          * such lossage has been observed on both VT6202 and VT8235.
2409          */
2410         if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state) &&
2411                         (oxu->async->qh_next.ptr != NULL ||
2412                          oxu->periodic_sched != 0))
2413                 timer_action(oxu, TIMER_IO_WATCHDOG);
2414 }
2415
2416 static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
2417 {
2418         /* if we need to use IAA and it's busy, defer */
2419         if (qh->qh_state == QH_STATE_LINKED
2420                         && oxu->reclaim
2421                         && HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) {
2422                 struct ehci_qh          *last;
2423
2424                 for (last = oxu->reclaim;
2425                                 last->reclaim;
2426                                 last = last->reclaim)
2427                         continue;
2428                 qh->qh_state = QH_STATE_UNLINK_WAIT;
2429                 last->reclaim = qh;
2430
2431         /* bypass IAA if the hc can't care */
2432         } else if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state) && oxu->reclaim)
2433                 end_unlink_async(oxu);
2434
2435         /* something else might have unlinked the qh by now */
2436         if (qh->qh_state == QH_STATE_LINKED)
2437                 start_unlink_async(oxu, qh);
2438 }
2439
2440 /*
2441  * USB host controller methods
2442  */
2443
2444 static irqreturn_t oxu210_hcd_irq(struct usb_hcd *hcd)
2445 {
2446         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2447         u32 status, pcd_status = 0;
2448         int bh;
2449
2450         spin_lock(&oxu->lock);
2451
2452         status = readl(&oxu->regs->status);
2453
2454         /* e.g. cardbus physical eject */
2455         if (status == ~(u32) 0) {
2456                 oxu_dbg(oxu, "device removed\n");
2457                 goto dead;
2458         }
2459
2460         status &= INTR_MASK;
2461         if (!status) {                  /* irq sharing? */
2462                 spin_unlock(&oxu->lock);
2463                 return IRQ_NONE;
2464         }
2465
2466         /* clear (just) interrupts */
2467         writel(status, &oxu->regs->status);
2468         readl(&oxu->regs->command);     /* unblock posted write */
2469         bh = 0;
2470
2471 #ifdef OXU_VERBOSE_DEBUG
2472         /* unrequested/ignored: Frame List Rollover */
2473         dbg_status(oxu, "irq", status);
2474 #endif
2475
2476         /* INT, ERR, and IAA interrupt rates can be throttled */
2477
2478         /* normal [4.15.1.2] or error [4.15.1.1] completion */
2479         if (likely((status & (STS_INT|STS_ERR)) != 0))
2480                 bh = 1;
2481
2482         /* complete the unlinking of some qh [4.15.2.3] */
2483         if (status & STS_IAA) {
2484                 oxu->reclaim_ready = 1;
2485                 bh = 1;
2486         }
2487
2488         /* remote wakeup [4.3.1] */
2489         if (status & STS_PCD) {
2490                 unsigned i = HCS_N_PORTS(oxu->hcs_params);
2491                 pcd_status = status;
2492
2493                 /* resume root hub? */
2494                 if (!(readl(&oxu->regs->command) & CMD_RUN))
2495                         usb_hcd_resume_root_hub(hcd);
2496
2497                 while (i--) {
2498                         int pstatus = readl(&oxu->regs->port_status[i]);
2499
2500                         if (pstatus & PORT_OWNER)
2501                                 continue;
2502                         if (!(pstatus & PORT_RESUME)
2503                                         || oxu->reset_done[i] != 0)
2504                                 continue;
2505
2506                         /* start 20 msec resume signaling from this port,
2507                          * and make khubd collect PORT_STAT_C_SUSPEND to
2508                          * stop that signaling.
2509                          */
2510                         oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
2511                         oxu_dbg(oxu, "port %d remote wakeup\n", i + 1);
2512                         mod_timer(&hcd->rh_timer, oxu->reset_done[i]);
2513                 }
2514         }
2515
2516         /* PCI errors [4.15.2.4] */
2517         if (unlikely((status & STS_FATAL) != 0)) {
2518                 /* bogus "fatal" IRQs appear on some chips... why?  */
2519                 status = readl(&oxu->regs->status);
2520                 dbg_cmd(oxu, "fatal", readl(&oxu->regs->command));
2521                 dbg_status(oxu, "fatal", status);
2522                 if (status & STS_HALT) {
2523                         oxu_err(oxu, "fatal error\n");
2524 dead:
2525                         ehci_reset(oxu);
2526                         writel(0, &oxu->regs->configured_flag);
2527                         /* generic layer kills/unlinks all urbs, then
2528                          * uses oxu_stop to clean up the rest
2529                          */
2530                         bh = 1;
2531                 }
2532         }
2533
2534         if (bh)
2535                 ehci_work(oxu);
2536         spin_unlock(&oxu->lock);
2537         if (pcd_status & STS_PCD)
2538                 usb_hcd_poll_rh_status(hcd);
2539         return IRQ_HANDLED;
2540 }
2541
2542 static irqreturn_t oxu_irq(struct usb_hcd *hcd)
2543 {
2544         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2545         int ret = IRQ_HANDLED;
2546
2547         u32 status = oxu_readl(hcd->regs, OXU_CHIPIRQSTATUS);
2548         u32 enable = oxu_readl(hcd->regs, OXU_CHIPIRQEN_SET);
2549
2550         /* Disable all interrupt */
2551         oxu_writel(hcd->regs, OXU_CHIPIRQEN_CLR, enable);
2552
2553         if ((oxu->is_otg && (status & OXU_USBOTGI)) ||
2554                 (!oxu->is_otg && (status & OXU_USBSPHI)))
2555                 oxu210_hcd_irq(hcd);
2556         else
2557                 ret = IRQ_NONE;
2558
2559         /* Enable all interrupt back */
2560         oxu_writel(hcd->regs, OXU_CHIPIRQEN_SET, enable);
2561
2562         return ret;
2563 }
2564
2565 static void oxu_watchdog(unsigned long param)
2566 {
2567         struct oxu_hcd  *oxu = (struct oxu_hcd *) param;
2568         unsigned long flags;
2569
2570         spin_lock_irqsave(&oxu->lock, flags);
2571
2572         /* lost IAA irqs wedge things badly; seen with a vt8235 */
2573         if (oxu->reclaim) {
2574                 u32 status = readl(&oxu->regs->status);
2575                 if (status & STS_IAA) {
2576                         oxu_vdbg(oxu, "lost IAA\n");
2577                         writel(STS_IAA, &oxu->regs->status);
2578                         oxu->reclaim_ready = 1;
2579                 }
2580         }
2581
2582         /* stop async processing after it's idled a bit */
2583         if (test_bit(TIMER_ASYNC_OFF, &oxu->actions))
2584                 start_unlink_async(oxu, oxu->async);
2585
2586         /* oxu could run by timer, without IRQs ... */
2587         ehci_work(oxu);
2588
2589         spin_unlock_irqrestore(&oxu->lock, flags);
2590 }
2591
2592 /* One-time init, only for memory state.
2593  */
2594 static int oxu_hcd_init(struct usb_hcd *hcd)
2595 {
2596         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2597         u32 temp;
2598         int retval;
2599         u32 hcc_params;
2600
2601         spin_lock_init(&oxu->lock);
2602
2603         init_timer(&oxu->watchdog);
2604         oxu->watchdog.function = oxu_watchdog;
2605         oxu->watchdog.data = (unsigned long) oxu;
2606
2607         /*
2608          * hw default: 1K periodic list heads, one per frame.
2609          * periodic_size can shrink by USBCMD update if hcc_params allows.
2610          */
2611         oxu->periodic_size = DEFAULT_I_TDPS;
2612         retval = ehci_mem_init(oxu, GFP_KERNEL);
2613         if (retval < 0)
2614                 return retval;
2615
2616         /* controllers may cache some of the periodic schedule ... */
2617         hcc_params = readl(&oxu->caps->hcc_params);
2618         if (HCC_ISOC_CACHE(hcc_params))         /* full frame cache */
2619                 oxu->i_thresh = 8;
2620         else                                    /* N microframes cached */
2621                 oxu->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
2622
2623         oxu->reclaim = NULL;
2624         oxu->reclaim_ready = 0;
2625         oxu->next_uframe = -1;
2626
2627         /*
2628          * dedicate a qh for the async ring head, since we couldn't unlink
2629          * a 'real' qh without stopping the async schedule [4.8].  use it
2630          * as the 'reclamation list head' too.
2631          * its dummy is used in hw_alt_next of many tds, to prevent the qh
2632          * from automatically advancing to the next td after short reads.
2633          */
2634         oxu->async->qh_next.qh = NULL;
2635         oxu->async->hw_next = QH_NEXT(oxu->async->qh_dma);
2636         oxu->async->hw_info1 = cpu_to_le32(QH_HEAD);
2637         oxu->async->hw_token = cpu_to_le32(QTD_STS_HALT);
2638         oxu->async->hw_qtd_next = EHCI_LIST_END;
2639         oxu->async->qh_state = QH_STATE_LINKED;
2640         oxu->async->hw_alt_next = QTD_NEXT(oxu->async->dummy->qtd_dma);
2641
2642         /* clear interrupt enables, set irq latency */
2643         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
2644                 log2_irq_thresh = 0;
2645         temp = 1 << (16 + log2_irq_thresh);
2646         if (HCC_CANPARK(hcc_params)) {
2647                 /* HW default park == 3, on hardware that supports it (like
2648                  * NVidia and ALI silicon), maximizes throughput on the async
2649                  * schedule by avoiding QH fetches between transfers.
2650                  *
2651                  * With fast usb storage devices and NForce2, "park" seems to
2652                  * make problems:  throughput reduction (!), data errors...
2653                  */
2654                 if (park) {
2655                         park = min(park, (unsigned) 3);
2656                         temp |= CMD_PARK;
2657                         temp |= park << 8;
2658                 }
2659                 oxu_dbg(oxu, "park %d\n", park);
2660         }
2661         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
2662                 /* periodic schedule size can be smaller than default */
2663                 temp &= ~(3 << 2);
2664                 temp |= (EHCI_TUNE_FLS << 2);
2665         }
2666         oxu->command = temp;
2667
2668         return 0;
2669 }
2670
2671 /* Called during probe() after chip reset completes.
2672  */
2673 static int oxu_reset(struct usb_hcd *hcd)
2674 {
2675         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2676         int ret;
2677
2678         spin_lock_init(&oxu->mem_lock);
2679         INIT_LIST_HEAD(&oxu->urb_list);
2680         oxu->urb_len = 0;
2681
2682         /* FIMXE */
2683         hcd->self.controller->dma_mask = NULL;
2684
2685         if (oxu->is_otg) {
2686                 oxu->caps = hcd->regs + OXU_OTG_CAP_OFFSET;
2687                 oxu->regs = hcd->regs + OXU_OTG_CAP_OFFSET + \
2688                         HC_LENGTH(readl(&oxu->caps->hc_capbase));
2689
2690                 oxu->mem = hcd->regs + OXU_SPH_MEM;
2691         } else {
2692                 oxu->caps = hcd->regs + OXU_SPH_CAP_OFFSET;
2693                 oxu->regs = hcd->regs + OXU_SPH_CAP_OFFSET + \
2694                         HC_LENGTH(readl(&oxu->caps->hc_capbase));
2695
2696                 oxu->mem = hcd->regs + OXU_OTG_MEM;
2697         }
2698
2699         oxu->hcs_params = readl(&oxu->caps->hcs_params);
2700         oxu->sbrn = 0x20;
2701
2702         ret = oxu_hcd_init(hcd);
2703         if (ret)
2704                 return ret;
2705
2706         return 0;
2707 }
2708
2709 static int oxu_run(struct usb_hcd *hcd)
2710 {
2711         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2712         int retval;
2713         u32 temp, hcc_params;
2714
2715         hcd->uses_new_polling = 1;
2716
2717         /* EHCI spec section 4.1 */
2718         retval = ehci_reset(oxu);
2719         if (retval != 0) {
2720                 ehci_mem_cleanup(oxu);
2721                 return retval;
2722         }
2723         writel(oxu->periodic_dma, &oxu->regs->frame_list);
2724         writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
2725
2726         /* hcc_params controls whether oxu->regs->segment must (!!!)
2727          * be used; it constrains QH/ITD/SITD and QTD locations.
2728          * pci_pool consistent memory always uses segment zero.
2729          * streaming mappings for I/O buffers, like pci_map_single(),
2730          * can return segments above 4GB, if the device allows.
2731          *
2732          * NOTE:  the dma mask is visible through dma_supported(), so
2733          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
2734          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
2735          * host side drivers though.
2736          */
2737         hcc_params = readl(&oxu->caps->hcc_params);
2738         if (HCC_64BIT_ADDR(hcc_params))
2739                 writel(0, &oxu->regs->segment);
2740
2741         oxu->command &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE |
2742                                 CMD_ASE | CMD_RESET);
2743         oxu->command |= CMD_RUN;
2744         writel(oxu->command, &oxu->regs->command);
2745         dbg_cmd(oxu, "init", oxu->command);
2746
2747         /*
2748          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
2749          * are explicitly handed to companion controller(s), so no TT is
2750          * involved with the root hub.  (Except where one is integrated,
2751          * and there's no companion controller unless maybe for USB OTG.)
2752          */
2753         hcd->state = HC_STATE_RUNNING;
2754         writel(FLAG_CF, &oxu->regs->configured_flag);
2755         readl(&oxu->regs->command);     /* unblock posted writes */
2756
2757         temp = HC_VERSION(readl(&oxu->caps->hc_capbase));
2758         oxu_info(oxu, "USB %x.%x started, quasi-EHCI %x.%02x, driver %s%s\n",
2759                 ((oxu->sbrn & 0xf0)>>4), (oxu->sbrn & 0x0f),
2760                 temp >> 8, temp & 0xff, DRIVER_VERSION,
2761                 ignore_oc ? ", overcurrent ignored" : "");
2762
2763         writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
2764
2765         return 0;
2766 }
2767
2768 static void oxu_stop(struct usb_hcd *hcd)
2769 {
2770         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2771
2772         /* Turn off port power on all root hub ports. */
2773         ehci_port_power(oxu, 0);
2774
2775         /* no more interrupts ... */
2776         del_timer_sync(&oxu->watchdog);
2777
2778         spin_lock_irq(&oxu->lock);
2779         if (HC_IS_RUNNING(hcd->state))
2780                 ehci_quiesce(oxu);
2781
2782         ehci_reset(oxu);
2783         writel(0, &oxu->regs->intr_enable);
2784         spin_unlock_irq(&oxu->lock);
2785
2786         /* let companion controllers work when we aren't */
2787         writel(0, &oxu->regs->configured_flag);
2788
2789         /* root hub is shut down separately (first, when possible) */
2790         spin_lock_irq(&oxu->lock);
2791         if (oxu->async)
2792                 ehci_work(oxu);
2793         spin_unlock_irq(&oxu->lock);
2794         ehci_mem_cleanup(oxu);
2795
2796         dbg_status(oxu, "oxu_stop completed", readl(&oxu->regs->status));
2797 }
2798
2799 /* Kick in for silicon on any bus (not just pci, etc).
2800  * This forcibly disables dma and IRQs, helping kexec and other cases
2801  * where the next system software may expect clean state.
2802  */
2803 static void oxu_shutdown(struct usb_hcd *hcd)
2804 {
2805         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2806
2807         (void) ehci_halt(oxu);
2808         ehci_turn_off_all_ports(oxu);
2809
2810         /* make BIOS/etc use companion controller during reboot */
2811         writel(0, &oxu->regs->configured_flag);
2812
2813         /* unblock posted writes */
2814         readl(&oxu->regs->configured_flag);
2815 }
2816
2817 /* Non-error returns are a promise to giveback() the urb later
2818  * we drop ownership so next owner (or urb unlink) can get it
2819  *
2820  * urb + dev is in hcd.self.controller.urb_list
2821  * we're queueing TDs onto software and hardware lists
2822  *
2823  * hcd-specific init for hcpriv hasn't been done yet
2824  *
2825  * NOTE:  control, bulk, and interrupt share the same code to append TDs
2826  * to a (possibly active) QH, and the same QH scanning code.
2827  */
2828 static int __oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2829                                 gfp_t mem_flags)
2830 {
2831         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2832         struct list_head qtd_list;
2833
2834         INIT_LIST_HEAD(&qtd_list);
2835
2836         switch (usb_pipetype(urb->pipe)) {
2837         case PIPE_CONTROL:
2838         case PIPE_BULK:
2839         default:
2840                 if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2841                         return -ENOMEM;
2842                 return submit_async(oxu, urb, &qtd_list, mem_flags);
2843
2844         case PIPE_INTERRUPT:
2845                 if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2846                         return -ENOMEM;
2847                 return intr_submit(oxu, urb, &qtd_list, mem_flags);
2848
2849         case PIPE_ISOCHRONOUS:
2850                 if (urb->dev->speed == USB_SPEED_HIGH)
2851                         return itd_submit(oxu, urb, mem_flags);
2852                 else
2853                         return sitd_submit(oxu, urb, mem_flags);
2854         }
2855 }
2856
2857 /* This function is responsible for breaking URBs with big data size
2858  * into smaller size and processing small urbs in sequence.
2859  */
2860 static int oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2861                                 gfp_t mem_flags)
2862 {
2863         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2864         int num, rem;
2865         int transfer_buffer_length;
2866         void *transfer_buffer;
2867         struct urb *murb;
2868         int i, ret;
2869
2870         /* If not bulk pipe just enqueue the URB */
2871         if (!usb_pipebulk(urb->pipe))
2872                 return __oxu_urb_enqueue(hcd, urb, mem_flags);
2873
2874         /* Otherwise we should verify the USB transfer buffer size! */
2875         transfer_buffer = urb->transfer_buffer;
2876         transfer_buffer_length = urb->transfer_buffer_length;
2877
2878         num = urb->transfer_buffer_length / 4096;
2879         rem = urb->transfer_buffer_length % 4096;
2880         if (rem != 0)
2881                 num++;
2882
2883         /* If URB is smaller than 4096 bytes just enqueue it! */
2884         if (num == 1)
2885                 return __oxu_urb_enqueue(hcd, urb, mem_flags);
2886
2887         /* Ok, we have more job to do! :) */
2888
2889         for (i = 0; i < num - 1; i++) {
2890                 /* Get free micro URB poll till a free urb is recieved */
2891
2892                 do {
2893                         murb = (struct urb *) oxu_murb_alloc(oxu);
2894                         if (!murb)
2895                                 schedule();
2896                 } while (!murb);
2897
2898                 /* Coping the urb */
2899                 memcpy(murb, urb, sizeof(struct urb));
2900
2901                 murb->transfer_buffer_length = 4096;
2902                 murb->transfer_buffer = transfer_buffer + i * 4096;
2903
2904                 /* Null pointer for the encodes that this is a micro urb */
2905                 murb->complete = NULL;
2906
2907                 ((struct oxu_murb *) murb)->main = urb;
2908                 ((struct oxu_murb *) murb)->last = 0;
2909
2910                 /* This loop is to guarantee urb to be processed when there's
2911                  * not enough resources at a particular time by retrying.
2912                  */
2913                 do {
2914                         ret  = __oxu_urb_enqueue(hcd, murb, mem_flags);
2915                         if (ret)
2916                                 schedule();
2917                 } while (ret);
2918         }
2919
2920         /* Last urb requires special handling  */
2921
2922         /* Get free micro URB poll till a free urb is recieved */
2923         do {
2924                 murb = (struct urb *) oxu_murb_alloc(oxu);
2925                 if (!murb)
2926                         schedule();
2927         } while (!murb);
2928
2929         /* Coping the urb */
2930         memcpy(murb, urb, sizeof(struct urb));
2931
2932         murb->transfer_buffer_length = rem > 0 ? rem : 4096;
2933         murb->transfer_buffer = transfer_buffer + (num - 1) * 4096;
2934
2935         /* Null pointer for the encodes that this is a micro urb */
2936         murb->complete = NULL;
2937
2938         ((struct oxu_murb *) murb)->main = urb;
2939         ((struct oxu_murb *) murb)->last = 1;
2940
2941         do {
2942                 ret = __oxu_urb_enqueue(hcd, murb, mem_flags);
2943                 if (ret)
2944                         schedule();
2945         } while (ret);
2946
2947         return ret;
2948 }
2949
2950 /* Remove from hardware lists.
2951  * Completions normally happen asynchronously
2952  */
2953 static int oxu_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
2954 {
2955         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2956         struct ehci_qh *qh;
2957         unsigned long flags;
2958
2959         spin_lock_irqsave(&oxu->lock, flags);
2960         switch (usb_pipetype(urb->pipe)) {
2961         case PIPE_CONTROL:
2962         case PIPE_BULK:
2963         default:
2964                 qh = (struct ehci_qh *) urb->hcpriv;
2965                 if (!qh)
2966                         break;
2967                 unlink_async(oxu, qh);
2968                 break;
2969
2970         case PIPE_INTERRUPT:
2971                 qh = (struct ehci_qh *) urb->hcpriv;
2972                 if (!qh)
2973                         break;
2974                 switch (qh->qh_state) {
2975                 case QH_STATE_LINKED:
2976                         intr_deschedule(oxu, qh);
2977                         /* FALL THROUGH */
2978                 case QH_STATE_IDLE:
2979                         qh_completions(oxu, qh);
2980                         break;
2981                 default:
2982                         oxu_dbg(oxu, "bogus qh %p state %d\n",
2983                                         qh, qh->qh_state);
2984                         goto done;
2985                 }
2986
2987                 /* reschedule QH iff another request is queued */
2988                 if (!list_empty(&qh->qtd_list)
2989                                 && HC_IS_RUNNING(hcd->state)) {
2990                         int status;
2991
2992                         status = qh_schedule(oxu, qh);
2993                         spin_unlock_irqrestore(&oxu->lock, flags);
2994
2995                         if (status != 0) {
2996                                 /* shouldn't happen often, but ...
2997                                  * FIXME kill those tds' urbs
2998                                  */
2999                                 err("can't reschedule qh %p, err %d",
3000                                         qh, status);
3001                         }
3002                         return status;
3003                 }
3004                 break;
3005         }
3006 done:
3007         spin_unlock_irqrestore(&oxu->lock, flags);
3008         return 0;
3009 }
3010
3011 /* Bulk qh holds the data toggle */
3012 static void oxu_endpoint_disable(struct usb_hcd *hcd,
3013                                         struct usb_host_endpoint *ep)
3014 {
3015         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3016         unsigned long           flags;
3017         struct ehci_qh          *qh, *tmp;
3018
3019         /* ASSERT:  any requests/urbs are being unlinked */
3020         /* ASSERT:  nobody can be submitting urbs for this any more */
3021
3022 rescan:
3023         spin_lock_irqsave(&oxu->lock, flags);
3024         qh = ep->hcpriv;
3025         if (!qh)
3026                 goto done;
3027
3028         /* endpoints can be iso streams.  for now, we don't
3029          * accelerate iso completions ... so spin a while.
3030          */
3031         if (qh->hw_info1 == 0) {
3032                 oxu_vdbg(oxu, "iso delay\n");
3033                 goto idle_timeout;
3034         }
3035
3036         if (!HC_IS_RUNNING(hcd->state))
3037                 qh->qh_state = QH_STATE_IDLE;
3038         switch (qh->qh_state) {
3039         case QH_STATE_LINKED:
3040                 for (tmp = oxu->async->qh_next.qh;
3041                                 tmp && tmp != qh;
3042                                 tmp = tmp->qh_next.qh)
3043                         continue;
3044                 /* periodic qh self-unlinks on empty */
3045                 if (!tmp)
3046                         goto nogood;
3047                 unlink_async(oxu, qh);
3048                 /* FALL THROUGH */
3049         case QH_STATE_UNLINK:           /* wait for hw to finish? */
3050 idle_timeout:
3051                 spin_unlock_irqrestore(&oxu->lock, flags);
3052                 schedule_timeout_uninterruptible(1);
3053                 goto rescan;
3054         case QH_STATE_IDLE:             /* fully unlinked */
3055                 if (list_empty(&qh->qtd_list)) {
3056                         qh_put(qh);
3057                         break;
3058                 }
3059                 /* else FALL THROUGH */
3060         default:
3061 nogood:
3062                 /* caller was supposed to have unlinked any requests;
3063                  * that's not our job.  just leak this memory.
3064                  */
3065                 oxu_err(oxu, "qh %p (#%02x) state %d%s\n",
3066                         qh, ep->desc.bEndpointAddress, qh->qh_state,
3067                         list_empty(&qh->qtd_list) ? "" : "(has tds)");
3068                 break;
3069         }
3070         ep->hcpriv = NULL;
3071 done:
3072         spin_unlock_irqrestore(&oxu->lock, flags);
3073         return;
3074 }
3075
3076 static int oxu_get_frame(struct usb_hcd *hcd)
3077 {
3078         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3079
3080         return (readl(&oxu->regs->frame_index) >> 3) %
3081                 oxu->periodic_size;
3082 }
3083
3084 /* Build "status change" packet (one or two bytes) from HC registers */
3085 static int oxu_hub_status_data(struct usb_hcd *hcd, char *buf)
3086 {
3087         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3088         u32 temp, mask, status = 0;
3089         int ports, i, retval = 1;
3090         unsigned long flags;
3091
3092         /* if !USB_SUSPEND, root hub timers won't get shut down ... */
3093         if (!HC_IS_RUNNING(hcd->state))
3094                 return 0;
3095
3096         /* init status to no-changes */
3097         buf[0] = 0;
3098         ports = HCS_N_PORTS(oxu->hcs_params);
3099         if (ports > 7) {
3100                 buf[1] = 0;
3101                 retval++;
3102         }
3103
3104         /* Some boards (mostly VIA?) report bogus overcurrent indications,
3105          * causing massive log spam unless we completely ignore them.  It
3106          * may be relevant that VIA VT8235 controlers, where PORT_POWER is
3107          * always set, seem to clear PORT_OCC and PORT_CSC when writing to
3108          * PORT_POWER; that's surprising, but maybe within-spec.
3109          */
3110         if (!ignore_oc)
3111                 mask = PORT_CSC | PORT_PEC | PORT_OCC;
3112         else
3113                 mask = PORT_CSC | PORT_PEC;
3114
3115         /* no hub change reports (bit 0) for now (power, ...) */
3116
3117         /* port N changes (bit N)? */
3118         spin_lock_irqsave(&oxu->lock, flags);
3119         for (i = 0; i < ports; i++) {
3120                 temp = readl(&oxu->regs->port_status[i]);
3121
3122                 /*
3123                  * Return status information even for ports with OWNER set.
3124                  * Otherwise khubd wouldn't see the disconnect event when a
3125                  * high-speed device is switched over to the companion
3126                  * controller by the user.
3127                  */
3128
3129                 if (!(temp & PORT_CONNECT))
3130                         oxu->reset_done[i] = 0;
3131                 if ((temp & mask) != 0 || ((temp & PORT_RESUME) != 0 &&
3132                                 time_after_eq(jiffies, oxu->reset_done[i]))) {
3133                         if (i < 7)
3134                                 buf[0] |= 1 << (i + 1);
3135                         else
3136                                 buf[1] |= 1 << (i - 7);
3137                         status = STS_PCD;
3138                 }
3139         }
3140         /* FIXME autosuspend idle root hubs */
3141         spin_unlock_irqrestore(&oxu->lock, flags);
3142         return status ? retval : 0;
3143 }
3144
3145 /* Returns the speed of a device attached to a port on the root hub. */
3146 static inline unsigned int oxu_port_speed(struct oxu_hcd *oxu,
3147                                                 unsigned int portsc)
3148 {
3149         switch ((portsc >> 26) & 3) {
3150         case 0:
3151                 return 0;
3152         case 1:
3153                 return USB_PORT_STAT_LOW_SPEED;
3154         case 2:
3155         default:
3156                 return USB_PORT_STAT_HIGH_SPEED;
3157         }
3158 }
3159
3160 #define PORT_WAKE_BITS  (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
3161 static int oxu_hub_control(struct usb_hcd *hcd, u16 typeReq,
3162                                 u16 wValue, u16 wIndex, char *buf, u16 wLength)
3163 {
3164         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3165         int ports = HCS_N_PORTS(oxu->hcs_params);
3166         u32 __iomem *status_reg = &oxu->regs->port_status[wIndex - 1];
3167         u32 temp, status;
3168         unsigned long   flags;
3169         int retval = 0;
3170         unsigned selector;
3171
3172         /*
3173          * FIXME:  support SetPortFeatures USB_PORT_FEAT_INDICATOR.
3174          * HCS_INDICATOR may say we can change LEDs to off/amber/green.
3175          * (track current state ourselves) ... blink for diagnostics,
3176          * power, "this is the one", etc.  EHCI spec supports this.
3177          */
3178
3179         spin_lock_irqsave(&oxu->lock, flags);
3180         switch (typeReq) {
3181         case ClearHubFeature:
3182                 switch (wValue) {
3183                 case C_HUB_LOCAL_POWER:
3184                 case C_HUB_OVER_CURRENT:
3185                         /* no hub-wide feature/status flags */
3186                         break;
3187                 default:
3188                         goto error;
3189                 }
3190                 break;
3191         case ClearPortFeature:
3192                 if (!wIndex || wIndex > ports)
3193                         goto error;
3194                 wIndex--;
3195                 temp = readl(status_reg);
3196
3197                 /*
3198                  * Even if OWNER is set, so the port is owned by the
3199                  * companion controller, khubd needs to be able to clear
3200                  * the port-change status bits (especially
3201                  * USB_PORT_STAT_C_CONNECTION).
3202                  */
3203
3204                 switch (wValue) {
3205                 case USB_PORT_FEAT_ENABLE:
3206                         writel(temp & ~PORT_PE, status_reg);
3207                         break;
3208                 case USB_PORT_FEAT_C_ENABLE:
3209                         writel((temp & ~PORT_RWC_BITS) | PORT_PEC, status_reg);
3210                         break;
3211                 case USB_PORT_FEAT_SUSPEND:
3212                         if (temp & PORT_RESET)
3213                                 goto error;
3214                         if (temp & PORT_SUSPEND) {
3215                                 if ((temp & PORT_PE) == 0)
3216                                         goto error;
3217                                 /* resume signaling for 20 msec */
3218                                 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
3219                                 writel(temp | PORT_RESUME, status_reg);
3220                                 oxu->reset_done[wIndex] = jiffies
3221                                                 + msecs_to_jiffies(20);
3222                         }
3223                         break;
3224                 case USB_PORT_FEAT_C_SUSPEND:
3225                         /* we auto-clear this feature */
3226                         break;
3227                 case USB_PORT_FEAT_POWER:
3228                         if (HCS_PPC(oxu->hcs_params))
3229                                 writel(temp & ~(PORT_RWC_BITS | PORT_POWER),
3230                                           status_reg);
3231                         break;
3232                 case USB_PORT_FEAT_C_CONNECTION:
3233                         writel((temp & ~PORT_RWC_BITS) | PORT_CSC, status_reg);
3234                         break;
3235                 case USB_PORT_FEAT_C_OVER_CURRENT:
3236                         writel((temp & ~PORT_RWC_BITS) | PORT_OCC, status_reg);
3237                         break;
3238                 case USB_PORT_FEAT_C_RESET:
3239                         /* GetPortStatus clears reset */
3240                         break;
3241                 default:
3242                         goto error;
3243                 }
3244                 readl(&oxu->regs->command);     /* unblock posted write */
3245                 break;
3246         case GetHubDescriptor:
3247                 ehci_hub_descriptor(oxu, (struct usb_hub_descriptor *)
3248                         buf);
3249                 break;
3250         case GetHubStatus:
3251                 /* no hub-wide feature/status flags */
3252                 memset(buf, 0, 4);
3253                 break;
3254         case GetPortStatus:
3255                 if (!wIndex || wIndex > ports)
3256                         goto error;
3257                 wIndex--;
3258                 status = 0;
3259                 temp = readl(status_reg);
3260
3261                 /* wPortChange bits */
3262                 if (temp & PORT_CSC)
3263                         status |= USB_PORT_STAT_C_CONNECTION << 16;
3264                 if (temp & PORT_PEC)
3265                         status |= USB_PORT_STAT_C_ENABLE << 16;
3266                 if ((temp & PORT_OCC) && !ignore_oc)
3267                         status |= USB_PORT_STAT_C_OVERCURRENT << 16;
3268
3269                 /* whoever resumes must GetPortStatus to complete it!! */
3270                 if (temp & PORT_RESUME) {
3271
3272                         /* Remote Wakeup received? */
3273                         if (!oxu->reset_done[wIndex]) {
3274                                 /* resume signaling for 20 msec */
3275                                 oxu->reset_done[wIndex] = jiffies
3276                                                 + msecs_to_jiffies(20);
3277                                 /* check the port again */
3278                                 mod_timer(&oxu_to_hcd(oxu)->rh_timer,
3279                                                 oxu->reset_done[wIndex]);
3280                         }
3281
3282                         /* resume completed? */
3283                         else if (time_after_eq(jiffies,
3284                                         oxu->reset_done[wIndex])) {
3285                                 status |= USB_PORT_STAT_C_SUSPEND << 16;
3286                                 oxu->reset_done[wIndex] = 0;
3287
3288                                 /* stop resume signaling */
3289                                 temp = readl(status_reg);
3290                                 writel(temp & ~(PORT_RWC_BITS | PORT_RESUME),
3291                                         status_reg);
3292                                 retval = handshake(oxu, status_reg,
3293                                            PORT_RESUME, 0, 2000 /* 2msec */);
3294                                 if (retval != 0) {
3295                                         oxu_err(oxu,
3296                                                 "port %d resume error %d\n",
3297                                                 wIndex + 1, retval);
3298                                         goto error;
3299                                 }
3300                                 temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
3301                         }
3302                 }
3303
3304                 /* whoever resets must GetPortStatus to complete it!! */
3305                 if ((temp & PORT_RESET)
3306                                 && time_after_eq(jiffies,
3307                                         oxu->reset_done[wIndex])) {
3308                         status |= USB_PORT_STAT_C_RESET << 16;
3309                         oxu->reset_done[wIndex] = 0;
3310
3311                         /* force reset to complete */
3312                         writel(temp & ~(PORT_RWC_BITS | PORT_RESET),
3313                                         status_reg);
3314                         /* REVISIT:  some hardware needs 550+ usec to clear
3315                          * this bit; seems too long to spin routinely...
3316                          */
3317                         retval = handshake(oxu, status_reg,
3318                                         PORT_RESET, 0, 750);
3319                         if (retval != 0) {
3320                                 oxu_err(oxu, "port %d reset error %d\n",
3321                                         wIndex + 1, retval);
3322                                 goto error;
3323                         }
3324
3325                         /* see what we found out */
3326                         temp = check_reset_complete(oxu, wIndex, status_reg,
3327                                         readl(status_reg));
3328                 }
3329
3330                 /* transfer dedicated ports to the companion hc */
3331                 if ((temp & PORT_CONNECT) &&
3332                                 test_bit(wIndex, &oxu->companion_ports)) {
3333                         temp &= ~PORT_RWC_BITS;
3334                         temp |= PORT_OWNER;
3335                         writel(temp, status_reg);
3336                         oxu_dbg(oxu, "port %d --> companion\n", wIndex + 1);
3337                         temp = readl(status_reg);
3338                 }
3339
3340                 /*
3341                  * Even if OWNER is set, there's no harm letting khubd
3342                  * see the wPortStatus values (they should all be 0 except
3343                  * for PORT_POWER anyway).
3344                  */
3345
3346                 if (temp & PORT_CONNECT) {
3347                         status |= USB_PORT_STAT_CONNECTION;
3348                         /* status may be from integrated TT */
3349                         status |= oxu_port_speed(oxu, temp);
3350                 }
3351                 if (temp & PORT_PE)
3352                         status |= USB_PORT_STAT_ENABLE;
3353                 if (temp & (PORT_SUSPEND|PORT_RESUME))
3354                         status |= USB_PORT_STAT_SUSPEND;
3355                 if (temp & PORT_OC)
3356                         status |= USB_PORT_STAT_OVERCURRENT;
3357                 if (temp & PORT_RESET)
3358                         status |= USB_PORT_STAT_RESET;
3359                 if (temp & PORT_POWER)
3360                         status |= USB_PORT_STAT_POWER;
3361
3362 #ifndef OXU_VERBOSE_DEBUG
3363         if (status & ~0xffff)   /* only if wPortChange is interesting */
3364 #endif
3365                 dbg_port(oxu, "GetStatus", wIndex + 1, temp);
3366                 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
3367                 break;
3368         case SetHubFeature:
3369                 switch (wValue) {
3370                 case C_HUB_LOCAL_POWER:
3371                 case C_HUB_OVER_CURRENT:
3372                         /* no hub-wide feature/status flags */
3373                         break;
3374                 default:
3375                         goto error;
3376                 }
3377                 break;
3378         case SetPortFeature:
3379                 selector = wIndex >> 8;
3380                 wIndex &= 0xff;
3381                 if (!wIndex || wIndex > ports)
3382                         goto error;
3383                 wIndex--;
3384                 temp = readl(status_reg);
3385                 if (temp & PORT_OWNER)
3386                         break;
3387
3388                 temp &= ~PORT_RWC_BITS;
3389                 switch (wValue) {
3390                 case USB_PORT_FEAT_SUSPEND:
3391                         if ((temp & PORT_PE) == 0
3392                                         || (temp & PORT_RESET) != 0)
3393                                 goto error;
3394                         if (device_may_wakeup(&hcd->self.root_hub->dev))
3395                                 temp |= PORT_WAKE_BITS;
3396                         writel(temp | PORT_SUSPEND, status_reg);
3397                         break;
3398                 case USB_PORT_FEAT_POWER:
3399                         if (HCS_PPC(oxu->hcs_params))
3400                                 writel(temp | PORT_POWER, status_reg);
3401                         break;
3402                 case USB_PORT_FEAT_RESET:
3403                         if (temp & PORT_RESUME)
3404                                 goto error;
3405                         /* line status bits may report this as low speed,
3406                          * which can be fine if this root hub has a
3407                          * transaction translator built in.
3408                          */
3409                         oxu_vdbg(oxu, "port %d reset\n", wIndex + 1);
3410                         temp |= PORT_RESET;
3411                         temp &= ~PORT_PE;
3412
3413                         /*
3414                          * caller must wait, then call GetPortStatus
3415                          * usb 2.0 spec says 50 ms resets on root
3416                          */
3417                         oxu->reset_done[wIndex] = jiffies
3418                                         + msecs_to_jiffies(50);
3419                         writel(temp, status_reg);
3420                         break;
3421
3422                 /* For downstream facing ports (these):  one hub port is put
3423                  * into test mode according to USB2 11.24.2.13, then the hub
3424                  * must be reset (which for root hub now means rmmod+modprobe,
3425                  * or else system reboot).  See EHCI 2.3.9 and 4.14 for info
3426                  * about the EHCI-specific stuff.
3427                  */
3428                 case USB_PORT_FEAT_TEST:
3429                         if (!selector || selector > 5)
3430                                 goto error;
3431                         ehci_quiesce(oxu);
3432                         ehci_halt(oxu);
3433                         temp |= selector << 16;
3434                         writel(temp, status_reg);
3435                         break;
3436
3437                 default:
3438                         goto error;
3439                 }
3440                 readl(&oxu->regs->command);     /* unblock posted writes */
3441                 break;
3442
3443         default:
3444 error:
3445                 /* "stall" on error */
3446                 retval = -EPIPE;
3447         }
3448         spin_unlock_irqrestore(&oxu->lock, flags);
3449         return retval;
3450 }
3451
3452 #ifdef CONFIG_PM
3453
3454 static int oxu_bus_suspend(struct usb_hcd *hcd)
3455 {
3456         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3457         int port;
3458         int mask;
3459
3460         oxu_dbg(oxu, "suspend root hub\n");
3461
3462         if (time_before(jiffies, oxu->next_statechange))
3463                 msleep(5);
3464
3465         port = HCS_N_PORTS(oxu->hcs_params);
3466         spin_lock_irq(&oxu->lock);
3467
3468         /* stop schedules, clean any completed work */
3469         if (HC_IS_RUNNING(hcd->state)) {
3470                 ehci_quiesce(oxu);
3471                 hcd->state = HC_STATE_QUIESCING;
3472         }
3473         oxu->command = readl(&oxu->regs->command);
3474         if (oxu->reclaim)
3475                 oxu->reclaim_ready = 1;
3476         ehci_work(oxu);
3477
3478         /* Unlike other USB host controller types, EHCI doesn't have
3479          * any notion of "global" or bus-wide suspend.  The driver has
3480          * to manually suspend all the active unsuspended ports, and
3481          * then manually resume them in the bus_resume() routine.
3482          */
3483         oxu->bus_suspended = 0;
3484         while (port--) {
3485                 u32 __iomem *reg = &oxu->regs->port_status[port];
3486                 u32 t1 = readl(reg) & ~PORT_RWC_BITS;
3487                 u32 t2 = t1;
3488
3489                 /* keep track of which ports we suspend */
3490                 if ((t1 & PORT_PE) && !(t1 & PORT_OWNER) &&
3491                                 !(t1 & PORT_SUSPEND)) {
3492                         t2 |= PORT_SUSPEND;
3493                         set_bit(port, &oxu->bus_suspended);
3494                 }
3495
3496                 /* enable remote wakeup on all ports */
3497                 if (device_may_wakeup(&hcd->self.root_hub->dev))
3498                         t2 |= PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E;
3499                 else
3500                         t2 &= ~(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E);
3501
3502                 if (t1 != t2) {
3503                         oxu_vdbg(oxu, "port %d, %08x -> %08x\n",
3504                                 port + 1, t1, t2);
3505                         writel(t2, reg);
3506                 }
3507         }
3508
3509         /* turn off now-idle HC */
3510         del_timer_sync(&oxu->watchdog);
3511         ehci_halt(oxu);
3512         hcd->state = HC_STATE_SUSPENDED;
3513
3514         /* allow remote wakeup */
3515         mask = INTR_MASK;
3516         if (!device_may_wakeup(&hcd->self.root_hub->dev))
3517                 mask &= ~STS_PCD;
3518         writel(mask, &oxu->regs->intr_enable);
3519         readl(&oxu->regs->intr_enable);
3520
3521         oxu->next_statechange = jiffies + msecs_to_jiffies(10);
3522         spin_unlock_irq(&oxu->lock);
3523         return 0;
3524 }
3525
3526 /* Caller has locked the root hub, and should reset/reinit on error */
3527 static int oxu_bus_resume(struct usb_hcd *hcd)
3528 {
3529         struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3530         u32 temp;
3531         int i;
3532
3533         if (time_before(jiffies, oxu->next_statechange))
3534                 msleep(5);
3535         spin_lock_irq(&oxu->lock);
3536
3537         /* Ideally and we've got a real resume here, and no port's power
3538          * was lost.  (For PCI, that means Vaux was maintained.)  But we
3539          * could instead be restoring a swsusp snapshot -- so that BIOS was
3540          * the last user of the controller, not reset/pm hardware keeping
3541          * state we gave to it.
3542          */
3543         temp = readl(&oxu->regs->intr_enable);
3544         oxu_dbg(oxu, "resume root hub%s\n", temp ? "" : " after power loss");
3545
3546         /* at least some APM implementations will try to deliver
3547          * IRQs right away, so delay them until we're ready.
3548          */
3549         writel(0, &oxu->regs->intr_enable);
3550
3551         /* re-init operational registers */
3552         writel(0, &oxu->regs->segment);
3553         writel(oxu->periodic_dma, &oxu->regs->frame_list);
3554         writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
3555
3556         /* restore CMD_RUN, framelist size, and irq threshold */
3557         writel(oxu->command, &oxu->regs->command);
3558
3559         /* Some controller/firmware combinations need a delay during which
3560          * they set up the port statuses.  See Bugzilla #8190. */
3561         mdelay(8);
3562
3563         /* manually resume the ports we suspended during bus_suspend() */
3564         i = HCS_N_PORTS(oxu->hcs_params);
3565         while (i--) {
3566                 temp = readl(&oxu->regs->port_status[i]);
3567                 temp &= ~(PORT_RWC_BITS
3568                         | PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E);
3569                 if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3570                         oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
3571                         temp |= PORT_RESUME;
3572                 }
3573                 writel(temp, &oxu->regs->port_status[i]);
3574         }
3575         i = HCS_N_PORTS(oxu->hcs_params);
3576         mdelay(20);
3577         while (i--) {
3578                 temp = readl(&oxu->regs->port_status[i]);
3579                 if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3580                         temp &= ~(PORT_RWC_BITS | PORT_RESUME);
3581                         writel(temp, &oxu->regs->port_status[i]);
3582                         oxu_vdbg(oxu, "resumed port %d\n", i + 1);
3583                 }
3584         }
3585         (void) readl(&oxu->regs->command);
3586
3587         /* maybe re-activate the schedule(s) */
3588         temp = 0;
3589         if (oxu->async->qh_next.qh)
3590                 temp |= CMD_ASE;
3591         if (oxu->periodic_sched)
3592                 temp |= CMD_PSE;
3593         if (temp) {
3594                 oxu->command |= temp;
3595                 writel(oxu->command, &oxu->regs->command);
3596         }
3597
3598         oxu->next_statechange = jiffies + msecs_to_jiffies(5);
3599         hcd->state = HC_STATE_RUNNING;
3600
3601         /* Now we can safely re-enable irqs */
3602         writel(INTR_MASK, &oxu->regs->intr_enable);
3603
3604         spin_unlock_irq(&oxu->lock);
3605         return 0;
3606 }
3607
3608 #else
3609
3610 static int oxu_bus_suspend(struct usb_hcd *hcd)
3611 {
3612         return 0;
3613 }
3614
3615 static int oxu_bus_resume(struct usb_hcd *hcd)
3616 {
3617         return 0;
3618 }
3619
3620 #endif  /* CONFIG_PM */
3621
3622 static const struct hc_driver oxu_hc_driver = {
3623         .description =          "oxu210hp_hcd",
3624         .product_desc =         "oxu210hp HCD",
3625         .hcd_priv_size =        sizeof(struct oxu_hcd),
3626
3627         /*
3628          * Generic hardware linkage
3629          */
3630         .irq =                  oxu_irq,
3631         .flags =                HCD_MEMORY | HCD_USB2,
3632
3633         /*
3634          * Basic lifecycle operations
3635          */
3636         .reset =                oxu_reset,
3637         .start =                oxu_run,
3638         .stop =                 oxu_stop,
3639         .shutdown =             oxu_shutdown,
3640
3641         /*
3642          * Managing i/o requests and associated device resources
3643          */
3644         .urb_enqueue =          oxu_urb_enqueue,
3645         .urb_dequeue =          oxu_urb_dequeue,
3646         .endpoint_disable =     oxu_endpoint_disable,
3647
3648         /*
3649          * Scheduling support
3650          */
3651         .get_frame_number =     oxu_get_frame,
3652
3653         /*
3654          * Root hub support
3655          */
3656         .hub_status_data =      oxu_hub_status_data,
3657         .hub_control =          oxu_hub_control,
3658         .bus_suspend =          oxu_bus_suspend,
3659         .bus_resume =           oxu_bus_resume,
3660 };
3661
3662 /*
3663  * Module stuff
3664  */
3665
3666 static void oxu_configuration(struct platform_device *pdev, void *base)
3667 {
3668         u32 tmp;
3669
3670         /* Initialize top level registers.
3671          * First write ever
3672          */
3673         oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3674         oxu_writel(base, OXU_SOFTRESET, OXU_SRESET);
3675         oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3676
3677         tmp = oxu_readl(base, OXU_PIOBURSTREADCTRL);
3678         oxu_writel(base, OXU_PIOBURSTREADCTRL, tmp | 0x0040);
3679
3680         oxu_writel(base, OXU_ASO, OXU_SPHPOEN | OXU_OVRCCURPUPDEN |
3681                                         OXU_COMPARATOR | OXU_ASO_OP);
3682
3683         tmp = oxu_readl(base, OXU_CLKCTRL_SET);
3684         oxu_writel(base, OXU_CLKCTRL_SET, tmp | OXU_SYSCLKEN | OXU_USBOTGCLKEN);
3685
3686         /* Clear all top interrupt enable */
3687         oxu_writel(base, OXU_CHIPIRQEN_CLR, 0xff);
3688
3689         /* Clear all top interrupt status */
3690         oxu_writel(base, OXU_CHIPIRQSTATUS, 0xff);
3691
3692         /* Enable all needed top interrupt except OTG SPH core */
3693         oxu_writel(base, OXU_CHIPIRQEN_SET, OXU_USBSPHLPWUI | OXU_USBOTGLPWUI);
3694 }
3695
3696 static int oxu_verify_id(struct platform_device *pdev, void *base)
3697 {
3698         u32 id;
3699         static const char * const bo[] = {
3700                 "reserved",
3701                 "128-pin LQFP",
3702                 "84-pin TFBGA",
3703                 "reserved",
3704         };
3705
3706         /* Read controller signature register to find a match */
3707         id = oxu_readl(base, OXU_DEVICEID);
3708         dev_info(&pdev->dev, "device ID %x\n", id);
3709         if ((id & OXU_REV_MASK) != (OXU_REV_2100 << OXU_REV_SHIFT))
3710                 return -1;
3711
3712         dev_info(&pdev->dev, "found device %x %s (%04x:%04x)\n",
3713                 id >> OXU_REV_SHIFT,
3714                 bo[(id & OXU_BO_MASK) >> OXU_BO_SHIFT],
3715                 (id & OXU_MAJ_REV_MASK) >> OXU_MAJ_REV_SHIFT,
3716                 (id & OXU_MIN_REV_MASK) >> OXU_MIN_REV_SHIFT);
3717
3718         return 0;
3719 }
3720
3721 static const struct hc_driver oxu_hc_driver;
3722 static struct usb_hcd *oxu_create(struct platform_device *pdev,
3723                                 unsigned long memstart, unsigned long memlen,
3724                                 void *base, int irq, int otg)
3725 {
3726         struct device *dev = &pdev->dev;
3727
3728         struct usb_hcd *hcd;
3729         struct oxu_hcd *oxu;
3730         int ret;
3731
3732         /* Set endian mode and host mode */
3733         oxu_writel(base + (otg ? OXU_OTG_CORE_OFFSET : OXU_SPH_CORE_OFFSET),
3734                                 OXU_USBMODE,
3735                                 OXU_CM_HOST_ONLY | OXU_ES_LITTLE | OXU_VBPS);
3736
3737         hcd = usb_create_hcd(&oxu_hc_driver, dev,
3738                                 otg ? "oxu210hp_otg" : "oxu210hp_sph");
3739         if (!hcd)
3740                 return ERR_PTR(-ENOMEM);
3741
3742         hcd->rsrc_start = memstart;
3743         hcd->rsrc_len = memlen;
3744         hcd->regs = base;
3745         hcd->irq = irq;
3746         hcd->state = HC_STATE_HALT;
3747
3748         oxu = hcd_to_oxu(hcd);
3749         oxu->is_otg = otg;
3750
3751         ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
3752         if (ret < 0)
3753                 return ERR_PTR(ret);
3754
3755         return hcd;
3756 }
3757
3758 static int oxu_init(struct platform_device *pdev,
3759                                 unsigned long memstart, unsigned long memlen,
3760                                 void *base, int irq)
3761 {
3762         struct oxu_info *info = platform_get_drvdata(pdev);
3763         struct usb_hcd *hcd;
3764         int ret;
3765
3766         /* First time configuration at start up */
3767         oxu_configuration(pdev, base);
3768
3769         ret = oxu_verify_id(pdev, base);
3770         if (ret) {
3771                 dev_err(&pdev->dev, "no devices found!\n");
3772                 return -ENODEV;
3773         }
3774
3775         /* Create the OTG controller */
3776         hcd = oxu_create(pdev, memstart, memlen, base, irq, 1);
3777         if (IS_ERR(hcd)) {
3778                 dev_err(&pdev->dev, "cannot create OTG controller!\n");
3779                 ret = PTR_ERR(hcd);
3780                 goto error_create_otg;
3781         }
3782         info->hcd[0] = hcd;
3783
3784         /* Create the SPH host controller */
3785         hcd = oxu_create(pdev, memstart, memlen, base, irq, 0);
3786         if (IS_ERR(hcd)) {
3787                 dev_err(&pdev->dev, "cannot create SPH controller!\n");
3788                 ret = PTR_ERR(hcd);
3789                 goto error_create_sph;
3790         }
3791         info->hcd[1] = hcd;
3792
3793         oxu_writel(base, OXU_CHIPIRQEN_SET,
3794                 oxu_readl(base, OXU_CHIPIRQEN_SET) | 3);
3795
3796         return 0;
3797
3798 error_create_sph:
3799         usb_remove_hcd(info->hcd[0]);
3800         usb_put_hcd(info->hcd[0]);
3801
3802 error_create_otg:
3803         return ret;
3804 }
3805
3806 static int oxu_drv_probe(struct platform_device *pdev)
3807 {
3808         struct resource *res;
3809         void *base;
3810         unsigned long memstart, memlen;
3811         int irq, ret;
3812         struct oxu_info *info;
3813
3814         if (usb_disabled())
3815                 return -ENODEV;
3816
3817         /*
3818          * Get the platform resources
3819          */
3820         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
3821         if (!res) {
3822                 dev_err(&pdev->dev,
3823                         "no IRQ! Check %s setup!\n", dev_name(&pdev->dev));
3824                 return -ENODEV;
3825         }
3826         irq = res->start;
3827         dev_dbg(&pdev->dev, "IRQ resource %d\n", irq);
3828
3829         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3830         if (!res) {
3831                 dev_err(&pdev->dev, "no registers address! Check %s setup!\n",
3832                         dev_name(&pdev->dev));
3833                 return -ENODEV;
3834         }
3835         memstart = res->start;
3836         memlen = res->end - res->start + 1;
3837         dev_dbg(&pdev->dev, "MEM resource %lx-%lx\n", memstart, memlen);
3838         if (!request_mem_region(memstart, memlen,
3839                                 oxu_hc_driver.description)) {
3840                 dev_dbg(&pdev->dev, "memory area already in use\n");
3841                 return -EBUSY;
3842         }
3843
3844         ret = set_irq_type(irq, IRQF_TRIGGER_FALLING);
3845         if (ret) {
3846                 dev_err(&pdev->dev, "error setting irq type\n");
3847                 ret = -EFAULT;
3848                 goto error_set_irq_type;
3849         }
3850
3851         base = ioremap(memstart, memlen);
3852         if (!base) {
3853                 dev_dbg(&pdev->dev, "error mapping memory\n");
3854                 ret = -EFAULT;
3855                 goto error_ioremap;
3856         }
3857
3858         /* Allocate a driver data struct to hold useful info for both
3859          * SPH & OTG devices
3860          */
3861         info = kzalloc(sizeof(struct oxu_info), GFP_KERNEL);
3862         if (!info) {
3863                 dev_dbg(&pdev->dev, "error allocating memory\n");
3864                 ret = -EFAULT;
3865                 goto error_alloc;
3866         }
3867         platform_set_drvdata(pdev, info);
3868
3869         ret = oxu_init(pdev, memstart, memlen, base, irq);
3870         if (ret < 0) {
3871                 dev_dbg(&pdev->dev, "cannot init USB devices\n");
3872                 goto error_init;
3873         }
3874
3875         dev_info(&pdev->dev, "devices enabled and running\n");
3876         platform_set_drvdata(pdev, info);
3877
3878         return 0;
3879
3880 error_init:
3881         kfree(info);
3882         platform_set_drvdata(pdev, NULL);
3883
3884 error_alloc:
3885         iounmap(base);
3886
3887 error_set_irq_type:
3888 error_ioremap:
3889         release_mem_region(memstart, memlen);
3890
3891         dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), ret);
3892         return ret;
3893 }
3894
3895 static void oxu_remove(struct platform_device *pdev, struct usb_hcd *hcd)
3896 {
3897         usb_remove_hcd(hcd);
3898         usb_put_hcd(hcd);
3899 }
3900
3901 static int oxu_drv_remove(struct platform_device *pdev)
3902 {
3903         struct oxu_info *info = platform_get_drvdata(pdev);
3904         unsigned long memstart = info->hcd[0]->rsrc_start,
3905                         memlen = info->hcd[0]->rsrc_len;
3906         void *base = info->hcd[0]->regs;
3907
3908         oxu_remove(pdev, info->hcd[0]);
3909         oxu_remove(pdev, info->hcd[1]);
3910
3911         iounmap(base);
3912         release_mem_region(memstart, memlen);
3913
3914         kfree(info);
3915         platform_set_drvdata(pdev, NULL);
3916
3917         return 0;
3918 }
3919
3920 static void oxu_drv_shutdown(struct platform_device *pdev)
3921 {
3922         oxu_drv_remove(pdev);
3923 }
3924
3925 #if 0
3926 /* FIXME: TODO */
3927 static int oxu_drv_suspend(struct device *dev)
3928 {
3929         struct platform_device *pdev = to_platform_device(dev);
3930         struct usb_hcd *hcd = dev_get_drvdata(dev);
3931
3932         return 0;
3933 }
3934
3935 static int oxu_drv_resume(struct device *dev)
3936 {
3937         struct platform_device *pdev = to_platform_device(dev);
3938         struct usb_hcd *hcd = dev_get_drvdata(dev);
3939
3940         return 0;
3941 }
3942 #else
3943 #define oxu_drv_suspend NULL
3944 #define oxu_drv_resume  NULL
3945 #endif
3946
3947 static struct platform_driver oxu_driver = {
3948         .probe          = oxu_drv_probe,
3949         .remove         = oxu_drv_remove,
3950         .shutdown       = oxu_drv_shutdown,
3951         .suspend        = oxu_drv_suspend,
3952         .resume         = oxu_drv_resume,
3953         .driver = {
3954                 .name = "oxu210hp-hcd",
3955                 .bus = &platform_bus_type
3956         }
3957 };
3958
3959 static int __init oxu_module_init(void)
3960 {
3961         int retval = 0;
3962
3963         retval = platform_driver_register(&oxu_driver);
3964         if (retval < 0)
3965                 return retval;
3966
3967         return retval;
3968 }
3969
3970 static void __exit oxu_module_cleanup(void)
3971 {
3972         platform_driver_unregister(&oxu_driver);
3973 }
3974
3975 module_init(oxu_module_init);
3976 module_exit(oxu_module_cleanup);
3977
3978 MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION);
3979 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
3980 MODULE_LICENSE("GPL");