drivers/staging/rtl8187se/r8180_core.c

   1 /*
   2    This is part of rtl818x pci OpenSource driver - v 0.1
   3    Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
   4    Released under the terms of GPL (General Public License)
   5
   6    Parts of this driver are based on the GPL part of the official
   7    Realtek driver.
   8
   9    Parts of this driver are based on the rtl8180 driver skeleton
  10    from Patric Schenke & Andres Salomon.
  11
  12    Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
  13
  14    Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
  15
  16    RSSI calc function from 'The Deuce'
  17
  18    Some ideas borrowed from the 8139too.c driver included in linux kernel.
  19
  20    We (I?) want to thanks the Authors of those projecs and also the
  21    Ndiswrapper's project Authors.
  22
  23    A big big thanks goes also to Realtek corp. for their help in my attempt to
  24    add RTL8185 and RTL8225 support, and to David Young also.
  25
  26    Power management interface routines.
  27    Written by Mariusz Matuszek.
  28 */
  29
  30 #undef RX_DONT_PASS_UL
  31 #undef DUMMY_RX
  32
  33 #include <linux/slab.h>
  34 #include <linux/syscalls.h>
  35 #include <linux/eeprom_93cx6.h>
  36
  37 #include "r8180_hw.h"
  38 #include "r8180.h"
  39 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
  40 #include "r8180_93cx6.h"   /* Card EEPROM */
  41 #include "r8180_wx.h"
  42 #include "r8180_dm.h"
  43
  44 #include "ieee80211/dot11d.h"
  45
  46 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
  47         {
  48                 .vendor = PCI_VENDOR_ID_REALTEK,
  49                 .device = 0x8199,
  50                 .subvendor = PCI_ANY_ID,
  51                 .subdevice = PCI_ANY_ID,
  52                 .driver_data = 0,
  53         },
  54         {
  55                 .vendor = 0,
  56                 .device = 0,
  57                 .subvendor = 0,
  58                 .subdevice = 0,
  59                 .driver_data = 0,
  60         }
  61 };
  62
  63
  64 static char *ifname = "wlan%d";
  65 static int hwseqnum = 0;
  66 static int hwwep = 0;
  67 static int channels = 0x3fff;
  68
  69 #define eqMacAddr(a, b)         (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0)
  70 #define cpMacAddr(des, src)             ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5])
  71 MODULE_LICENSE("GPL");
  72 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
  73 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  74 MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
  75
  76
  77 module_param(ifname, charp, S_IRUGO|S_IWUSR);
  78 module_param(hwseqnum, int, S_IRUGO|S_IWUSR);
  79 module_param(hwwep, int, S_IRUGO|S_IWUSR);
  80 module_param(channels, int, S_IRUGO|S_IWUSR);
  81
  82 MODULE_PARM_DESC(devname, " Net interface name, wlan%d=default");
  83 MODULE_PARM_DESC(hwseqnum, " Try to use hardware 802.11 header sequence numbers. Zero=default");
  84 MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
  85 MODULE_PARM_DESC(channels, " Channel bitmask for specific locales. NYI");
  86
  87
  88 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
  89                                        const struct pci_device_id *id);
  90
  91 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
  92
  93 static void rtl8180_shutdown(struct pci_dev *pdev)
  94 {
  95         struct net_device *dev = pci_get_drvdata(pdev);
  96         if (dev->netdev_ops->ndo_stop)
  97                 dev->netdev_ops->ndo_stop(dev);
  98         pci_disable_device(pdev);
  99 }
 100
 101 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
 102 {
 103         struct net_device *dev = pci_get_drvdata(pdev);
 104
 105         if (!netif_running(dev))
 106                 goto out_pci_suspend;
 107
 108         if (dev->netdev_ops->ndo_stop)
 109                 dev->netdev_ops->ndo_stop(dev);
 110
 111         netif_device_detach(dev);
 112
 113 out_pci_suspend:
 114         pci_save_state(pdev);
 115         pci_disable_device(pdev);
 116         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 117         return 0;
 118 }
 119
 120 static int rtl8180_resume(struct pci_dev *pdev)
 121 {
 122         struct net_device *dev = pci_get_drvdata(pdev);
 123         int err;
 124         u32 val;
 125
 126         pci_set_power_state(pdev, PCI_D0);
 127
 128         err = pci_enable_device(pdev);
 129         if (err) {
 130                 printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
 131                                 dev->name);
 132
 133                 return err;
 134         }
 135
 136         pci_restore_state(pdev);
 137
 138         /*
 139          * Suspend/Resume resets the PCI configuration space, so we have to
 140          * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
 141          * from interfering with C3 CPU state. pci_restore_state won't help
 142          * here since it only restores the first 64 bytes pci config header.
 143          */
 144         pci_read_config_dword(pdev, 0x40, &val);
 145         if ((val & 0x0000ff00) != 0)
 146                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
 147
 148         if (!netif_running(dev))
 149                 goto out;
 150
 151         if (dev->netdev_ops->ndo_open)
 152                 dev->netdev_ops->ndo_open(dev);
 153
 154         netif_device_attach(dev);
 155 out:
 156         return 0;
 157 }
 158
 159 static struct pci_driver rtl8180_pci_driver = {
 160         .name           = RTL8180_MODULE_NAME,
 161         .id_table       = rtl8180_pci_id_tbl,
 162         .probe          = rtl8180_pci_probe,
 163         .remove         = __devexit_p(rtl8180_pci_remove),
 164         .suspend        = rtl8180_suspend,
 165         .resume         = rtl8180_resume,
 166         .shutdown       = rtl8180_shutdown,
 167 };
 168
 169 u8 read_nic_byte(struct net_device *dev, int x)
 170 {
 171         return 0xff&readb((u8 *)dev->mem_start + x);
 172 }
 173
 174 u32 read_nic_dword(struct net_device *dev, int x)
 175 {
 176         return readl((u8 *)dev->mem_start + x);
 177 }
 178
 179 u16 read_nic_word(struct net_device *dev, int x)
 180 {
 181         return readw((u8 *)dev->mem_start + x);
 182 }
 183
 184 void write_nic_byte(struct net_device *dev, int x, u8 y)
 185 {
 186         writeb(y, (u8 *)dev->mem_start + x);
 187         udelay(20);
 188 }
 189
 190 void write_nic_dword(struct net_device *dev, int x, u32 y)
 191 {
 192         writel(y, (u8 *)dev->mem_start + x);
 193         udelay(20);
 194 }
 195
 196 void write_nic_word(struct net_device *dev, int x, u16 y)
 197 {
 198         writew(y, (u8 *)dev->mem_start + x);
 199         udelay(20);
 200 }
 201
 202 inline void force_pci_posting(struct net_device *dev)
 203 {
 204         read_nic_byte(dev, EPROM_CMD);
 205         mb();
 206 }
 207
 208 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
 209 void set_nic_rxring(struct net_device *dev);
 210 void set_nic_txring(struct net_device *dev);
 211 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
 212 void rtl8180_commit(struct net_device *dev);
 213 void rtl8180_start_tx_beacon(struct net_device *dev);
 214
 215 static struct proc_dir_entry *rtl8180_proc = NULL;
 216
 217 static int proc_get_registers(char *page, char **start,
 218                           off_t offset, int count,
 219                           int *eof, void *data)
 220 {
 221         struct net_device *dev = data;
 222         int len = 0;
 223         int i, n;
 224         int max = 0xff;
 225
 226         /* This dump the current register page */
 227         for (n = 0; n <= max;) {
 228                 len += snprintf(page + len, count - len, "\nD:  %2x > ", n);
 229
 230                 for (i = 0; i < 16 && n <= max; i++, n++)
 231                         len += snprintf(page + len, count - len, "%2x ",
 232                                         read_nic_byte(dev, n));
 233         }
 234         len += snprintf(page + len, count - len, "\n");
 235
 236         *eof = 1;
 237         return len;
 238 }
 239
 240 int get_curr_tx_free_desc(struct net_device *dev, int priority);
 241
 242 static int proc_get_stats_hw(char *page, char **start,
 243                           off_t offset, int count,
 244                           int *eof, void *data)
 245 {
 246         int len = 0;
 247
 248         *eof = 1;
 249         return len;
 250 }
 251
 252 static int proc_get_stats_rx(char *page, char **start,
 253                           off_t offset, int count,
 254                           int *eof, void *data)
 255 {
 256         struct net_device *dev = data;
 257         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 258
 259         int len = 0;
 260
 261         len += snprintf(page + len, count - len,
 262                 "RX OK: %lu\n"
 263                 "RX Retry: %lu\n"
 264                 "RX CRC Error(0-500): %lu\n"
 265                 "RX CRC Error(500-1000): %lu\n"
 266                 "RX CRC Error(>1000): %lu\n"
 267                 "RX ICV Error: %lu\n",
 268                 priv->stats.rxint,
 269                 priv->stats.rxerr,
 270                 priv->stats.rxcrcerrmin,
 271                 priv->stats.rxcrcerrmid,
 272                 priv->stats.rxcrcerrmax,
 273                 priv->stats.rxicverr
 274                 );
 275
 276         *eof = 1;
 277         return len;
 278 }
 279
 280 static int proc_get_stats_tx(char *page, char **start,
 281                           off_t offset, int count,
 282                           int *eof, void *data)
 283 {
 284         struct net_device *dev = data;
 285         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 286
 287         int len = 0;
 288         unsigned long totalOK;
 289
 290         totalOK = priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
 291         len += snprintf(page + len, count - len,
 292                 "TX OK: %lu\n"
 293                 "TX Error: %lu\n"
 294                 "TX Retry: %lu\n"
 295                 "TX beacon OK: %lu\n"
 296                 "TX beacon error: %lu\n",
 297                 totalOK,
 298                 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
 299                 priv->stats.txretry,
 300                 priv->stats.txbeacon,
 301                 priv->stats.txbeaconerr
 302         );
 303
 304         *eof = 1;
 305         return len;
 306 }
 307
 308 void rtl8180_proc_module_init(void)
 309 {
 310         DMESG("Initializing proc filesystem");
 311         rtl8180_proc = create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
 312 }
 313
 314 void rtl8180_proc_module_remove(void)
 315 {
 316         remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
 317 }
 318
 319 void rtl8180_proc_remove_one(struct net_device *dev)
 320 {
 321         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 322         if (priv->dir_dev) {
 323                 remove_proc_entry("stats-hw", priv->dir_dev);
 324                 remove_proc_entry("stats-tx", priv->dir_dev);
 325                 remove_proc_entry("stats-rx", priv->dir_dev);
 326                 remove_proc_entry("registers", priv->dir_dev);
 327                 remove_proc_entry(dev->name, rtl8180_proc);
 328                 priv->dir_dev = NULL;
 329         }
 330 }
 331
 332 void rtl8180_proc_init_one(struct net_device *dev)
 333 {
 334         struct proc_dir_entry *e;
 335         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 336
 337         priv->dir_dev = rtl8180_proc;
 338         if (!priv->dir_dev) {
 339                 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
 340                       dev->name);
 341                 return;
 342         }
 343
 344         e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
 345                                    priv->dir_dev, proc_get_stats_hw, dev);
 346         if (!e) {
 347                 DMESGE("Unable to initialize "
 348                       "/proc/net/r8180/%s/stats-hw\n",
 349                       dev->name);
 350         }
 351
 352         e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
 353                                    priv->dir_dev, proc_get_stats_rx, dev);
 354         if (!e) {
 355                 DMESGE("Unable to initialize "
 356                       "/proc/net/r8180/%s/stats-rx\n",
 357                       dev->name);
 358         }
 359
 360
 361         e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
 362                                    priv->dir_dev, proc_get_stats_tx, dev);
 363         if (!e) {
 364                 DMESGE("Unable to initialize "
 365                       "/proc/net/r8180/%s/stats-tx\n",
 366                       dev->name);
 367         }
 368
 369         e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
 370                                    priv->dir_dev, proc_get_registers, dev);
 371         if (!e) {
 372                 DMESGE("Unable to initialize "
 373                       "/proc/net/r8180/%s/registers\n",
 374                       dev->name);
 375         }
 376 }
 377
 378 /*
 379   FIXME: check if we can use some standard already-existent
 380   data type+functions in kernel
 381 */
 382
 383 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
 384                 struct buffer **bufferhead)
 385 {
 386         struct buffer *tmp;
 387
 388         if (!*buffer) {
 389
 390                 *buffer = kmalloc(sizeof(struct buffer), GFP_KERNEL);
 391
 392                 if (*buffer == NULL) {
 393                         DMESGE("Failed to kmalloc head of TX/RX struct");
 394                         return -1;
 395                 }
 396                 (*buffer)->next = *buffer;
 397                 (*buffer)->buf = buf;
 398                 (*buffer)->dma = dma;
 399                 if (bufferhead != NULL)
 400                         (*bufferhead) = (*buffer);
 401                 return 0;
 402         }
 403         tmp = *buffer;
 404
 405         while (tmp->next != (*buffer))
 406                 tmp = tmp->next;
 407         tmp->next = kmalloc(sizeof(struct buffer), GFP_KERNEL);
 408         if (tmp->next == NULL) {
 409                 DMESGE("Failed to kmalloc TX/RX struct");
 410                 return -1;
 411         }
 412         tmp->next->buf = buf;
 413         tmp->next->dma = dma;
 414         tmp->next->next = *buffer;
 415
 416         return 0;
 417 }
 418
 419 void buffer_free(struct net_device *dev, struct buffer **buffer, int len, short consistent)
 420 {
 421
 422         struct buffer *tmp, *next;
 423         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 424         struct pci_dev *pdev = priv->pdev;
 425
 426         if (!*buffer)
 427                 return;
 428
 429         tmp = *buffer;
 430
 431         do {
 432                 next = tmp->next;
 433                 if (consistent) {
 434                         pci_free_consistent(pdev, len,
 435                                     tmp->buf, tmp->dma);
 436                 } else {
 437                         pci_unmap_single(pdev, tmp->dma,
 438                         len, PCI_DMA_FROMDEVICE);
 439                         kfree(tmp->buf);
 440                 }
 441                 kfree(tmp);
 442                 tmp = next;
 443         }
 444         while (next != *buffer);
 445
 446         *buffer = NULL;
 447 }
 448
 449 void print_buffer(u32 *buffer, int len)
 450 {
 451         int i;
 452         u8 *buf = (u8 *)buffer;
 453
 454         printk("ASCII BUFFER DUMP (len: %x):\n", len);
 455
 456         for (i = 0; i < len; i++)
 457                 printk("%c", buf[i]);
 458
 459         printk("\nBINARY BUFFER DUMP (len: %x):\n", len);
 460
 461         for (i = 0; i < len; i++)
 462                 printk("%02x", buf[i]);
 463
 464         printk("\n");
 465 }
 466
 467 int get_curr_tx_free_desc(struct net_device *dev, int priority)
 468 {
 469         struct r8180_priv *priv = ieee80211_priv(dev);
 470         u32 *tail;
 471         u32 *head;
 472         int ret;
 473
 474         switch (priority) {
 475         case MANAGE_PRIORITY:
 476                 head = priv->txmapringhead;
 477                 tail = priv->txmapringtail;
 478                 break;
 479         case BK_PRIORITY:
 480                 head = priv->txbkpringhead;
 481                 tail = priv->txbkpringtail;
 482                 break;
 483         case BE_PRIORITY:
 484                 head = priv->txbepringhead;
 485                 tail = priv->txbepringtail;
 486                 break;
 487         case VI_PRIORITY:
 488                 head = priv->txvipringhead;
 489                 tail = priv->txvipringtail;
 490                 break;
 491         case VO_PRIORITY:
 492                 head = priv->txvopringhead;
 493                 tail = priv->txvopringtail;
 494                 break;
 495         case HI_PRIORITY:
 496                 head = priv->txhpringhead;
 497                 tail = priv->txhpringtail;
 498                 break;
 499         default:
 500                 return -1;
 501         }
 502
 503         if (head <= tail)
 504                 ret = priv->txringcount - (tail - head)/8;
 505         else
 506                 ret = (head - tail)/8;
 507
 508         if (ret > priv->txringcount)
 509                 DMESG("BUG");
 510
 511         return ret;
 512 }
 513
 514 short check_nic_enought_desc(struct net_device *dev, int priority)
 515 {
 516         struct r8180_priv *priv = ieee80211_priv(dev);
 517         struct ieee80211_device *ieee = netdev_priv(dev);
 518         int requiredbyte, required;
 519
 520         requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
 521
 522         if (ieee->current_network.QoS_Enable)
 523                 requiredbyte += 2;
 524
 525         required = requiredbyte / (priv->txbuffsize-4);
 526
 527         if (requiredbyte % priv->txbuffsize)
 528                 required++;
 529
 530         /* for now we keep two free descriptor as a safety boundary
 531          * between the tail and the head
 532          */
 533
 534         return (required+2 < get_curr_tx_free_desc(dev, priority));
 535 }
 536
 537 void fix_tx_fifo(struct net_device *dev)
 538 {
 539         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 540         u32 *tmp;
 541         int i;
 542
 543         for (tmp = priv->txmapring, i = 0;
 544              i < priv->txringcount;
 545              tmp += 8, i++) {
 546                 *tmp = *tmp & ~(1<<31);
 547         }
 548
 549         for (tmp = priv->txbkpring, i = 0;
 550              i < priv->txringcount;
 551              tmp += 8, i++) {
 552                 *tmp = *tmp & ~(1<<31);
 553         }
 554
 555         for (tmp = priv->txbepring, i = 0;
 556              i < priv->txringcount;
 557              tmp += 8, i++) {
 558                 *tmp = *tmp & ~(1<<31);
 559         }
 560         for (tmp = priv->txvipring, i = 0;
 561              i < priv->txringcount;
 562              tmp += 8, i++) {
 563                 *tmp = *tmp & ~(1<<31);
 564         }
 565
 566         for (tmp = priv->txvopring, i = 0;
 567              i < priv->txringcount;
 568              tmp += 8, i++) {
 569                 *tmp = *tmp & ~(1<<31);
 570         }
 571
 572         for (tmp = priv->txhpring, i = 0;
 573              i < priv->txringcount;
 574              tmp += 8, i++) {
 575                 *tmp = *tmp & ~(1<<31);
 576         }
 577
 578         for (tmp = priv->txbeaconring, i = 0;
 579              i < priv->txbeaconcount;
 580              tmp += 8, i++) {
 581                 *tmp = *tmp & ~(1<<31);
 582         }
 583
 584         priv->txmapringtail = priv->txmapring;
 585         priv->txmapringhead = priv->txmapring;
 586         priv->txmapbufstail = priv->txmapbufs;
 587
 588         priv->txbkpringtail = priv->txbkpring;
 589         priv->txbkpringhead = priv->txbkpring;
 590         priv->txbkpbufstail = priv->txbkpbufs;
 591
 592         priv->txbepringtail = priv->txbepring;
 593         priv->txbepringhead = priv->txbepring;
 594         priv->txbepbufstail = priv->txbepbufs;
 595
 596         priv->txvipringtail = priv->txvipring;
 597         priv->txvipringhead = priv->txvipring;
 598         priv->txvipbufstail = priv->txvipbufs;
 599
 600         priv->txvopringtail = priv->txvopring;
 601         priv->txvopringhead = priv->txvopring;
 602         priv->txvopbufstail = priv->txvopbufs;
 603
 604         priv->txhpringtail = priv->txhpring;
 605         priv->txhpringhead = priv->txhpring;
 606         priv->txhpbufstail = priv->txhpbufs;
 607
 608         priv->txbeaconringtail = priv->txbeaconring;
 609         priv->txbeaconbufstail = priv->txbeaconbufs;
 610         set_nic_txring(dev);
 611
 612         ieee80211_reset_queue(priv->ieee80211);
 613         priv->ack_tx_to_ieee = 0;
 614 }
 615
 616 void fix_rx_fifo(struct net_device *dev)
 617 {
 618         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 619         u32 *tmp;
 620         struct buffer *rxbuf;
 621         u8 rx_desc_size;
 622
 623         rx_desc_size = 8; /* 4*8 = 32 bytes */
 624
 625         for (tmp = priv->rxring, rxbuf = priv->rxbufferhead;
 626              (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
 627              tmp += rx_desc_size, rxbuf = rxbuf->next) {
 628                 *(tmp+2) = rxbuf->dma;
 629                 *tmp = *tmp & ~0xfff;
 630                 *tmp = *tmp | priv->rxbuffersize;
 631                 *tmp |= (1<<31);
 632         }
 633
 634         priv->rxringtail = priv->rxring;
 635         priv->rxbuffer = priv->rxbufferhead;
 636         priv->rx_skb_complete = 1;
 637         set_nic_rxring(dev);
 638 }
 639
 640 unsigned char QUALITY_MAP[] = {
 641         0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
 642         0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
 643         0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
 644         0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
 645         0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
 646         0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
 647         0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
 648         0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
 649         0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
 650         0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
 651 };
 652
 653 unsigned char STRENGTH_MAP[] = {
 654         0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
 655         0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
 656         0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
 657         0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
 658         0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
 659         0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
 660         0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
 661         0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
 662         0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
 663         0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
 664 };
 665
 666 void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual)
 667 {
 668         u32 temp;
 669         u32 temp2;
 670         u32 q;
 671         u32 orig_qual;
 672         u8  _rssi;
 673
 674         q = *qual;
 675         orig_qual = *qual;
 676         _rssi = 0; /* avoid gcc complains.. */
 677
 678         if (q <= 0x4e) {
 679                 temp = QUALITY_MAP[q];
 680         } else {
 681                 if (q & 0x80)
 682                         temp = 0x32;
 683                 else
 684                         temp = 1;
 685         }
 686
 687         *qual = temp;
 688         temp2 = *rssi;
 689
 690         if (_rssi < 0x64) {
 691                 if (_rssi == 0)
 692                         *rssi = 1;
 693         } else {
 694                 *rssi = 0x64;
 695         }
 696
 697         return;
 698 }
 699
 700 void rtl8180_irq_enable(struct net_device *dev)
 701 {
 702         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 703
 704         priv->irq_enabled = 1;
 705         write_nic_word(dev, INTA_MASK, priv->irq_mask);
 706 }
 707
 708 void rtl8180_irq_disable(struct net_device *dev)
 709 {
 710         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 711
 712         write_nic_dword(dev, IMR, 0);
 713         force_pci_posting(dev);
 714         priv->irq_enabled = 0;
 715 }
 716
 717 void rtl8180_set_mode(struct net_device *dev, int mode)
 718 {
 719         u8 ecmd;
 720
 721         ecmd = read_nic_byte(dev, EPROM_CMD);
 722         ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
 723         ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
 724         ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
 725         ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
 726         write_nic_byte(dev, EPROM_CMD, ecmd);
 727 }
 728
 729 void rtl8180_adapter_start(struct net_device *dev);
 730 void rtl8180_beacon_tx_enable(struct net_device *dev);
 731
 732 void rtl8180_update_msr(struct net_device *dev)
 733 {
 734         struct r8180_priv *priv = ieee80211_priv(dev);
 735         u8 msr;
 736         u32 rxconf;
 737
 738         msr  = read_nic_byte(dev, MSR);
 739         msr &= ~MSR_LINK_MASK;
 740
 741         rxconf = read_nic_dword(dev, RX_CONF);
 742
 743         if (priv->ieee80211->state == IEEE80211_LINKED) {
 744                 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
 745                         msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
 746                 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
 747                         msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
 748                 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
 749                         msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
 750                 else
 751                         msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 752                 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
 753
 754         } else {
 755                 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 756                 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
 757         }
 758
 759         write_nic_byte(dev, MSR, msr);
 760         write_nic_dword(dev, RX_CONF, rxconf);
 761 }
 762
 763 void rtl8180_set_chan(struct net_device *dev, short ch)
 764 {
 765         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 766
 767         if ((ch > 14) || (ch < 1)) {
 768                 printk("In %s: Invalid chnanel %d\n", __func__, ch);
 769                 return;
 770         }
 771
 772         priv->chan = ch;
 773         priv->rf_set_chan(dev, priv->chan);
 774 }
 775
 776 void rtl8180_rx_enable(struct net_device *dev)
 777 {
 778         u8 cmd;
 779         u32 rxconf;
 780         /* for now we accept data, management & ctl frame*/
 781         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 782
 783         rxconf = read_nic_dword(dev, RX_CONF);
 784         rxconf = rxconf & ~MAC_FILTER_MASK;
 785         rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
 786         rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
 787         rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
 788         rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
 789         if (dev->flags & IFF_PROMISC)
 790                 DMESG("NIC in promisc mode");
 791
 792         if (priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
 793            dev->flags & IFF_PROMISC) {
 794                 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
 795         } else {
 796                 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
 797         }
 798
 799         if (priv->ieee80211->iw_mode == IW_MODE_MONITOR) {
 800                 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
 801                 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
 802                 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
 803         }
 804
 805         if (priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
 806                 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
 807
 808         rxconf = rxconf & ~RX_FIFO_THRESHOLD_MASK;
 809         rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE << RX_FIFO_THRESHOLD_SHIFT);
 810
 811         rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
 812         rxconf = rxconf & ~MAX_RX_DMA_MASK;
 813         rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
 814
 815         rxconf = rxconf | RCR_ONLYERLPKT;
 816
 817         rxconf = rxconf & ~RCR_CS_MASK;
 818
 819         write_nic_dword(dev, RX_CONF, rxconf);
 820
 821         fix_rx_fifo(dev);
 822
 823         cmd = read_nic_byte(dev, CMD);
 824         write_nic_byte(dev, CMD, cmd | (1<<CMD_RX_ENABLE_SHIFT));
 825 }
 826
 827 void set_nic_txring(struct net_device *dev)
 828 {
 829         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 830
 831         write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
 832         write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
 833         write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
 834         write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
 835         write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
 836         write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
 837         write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
 838 }
 839
 840 void rtl8180_conttx_enable(struct net_device *dev)
 841 {
 842         u32 txconf;
 843
 844         txconf = read_nic_dword(dev, TX_CONF);
 845         txconf = txconf & ~TX_LOOPBACK_MASK;
 846         txconf = txconf | (TX_LOOPBACK_CONTINUE<<TX_LOOPBACK_SHIFT);
 847         write_nic_dword(dev, TX_CONF, txconf);
 848 }
 849
 850 void rtl8180_conttx_disable(struct net_device *dev)
 851 {
 852         u32 txconf;
 853
 854         txconf = read_nic_dword(dev, TX_CONF);
 855         txconf = txconf & ~TX_LOOPBACK_MASK;
 856         txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
 857         write_nic_dword(dev, TX_CONF, txconf);
 858 }
 859
 860 void rtl8180_tx_enable(struct net_device *dev)
 861 {
 862         u8 cmd;
 863         u8 tx_agc_ctl;
 864         u8 byte;
 865         u32 txconf;
 866         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 867
 868         txconf = read_nic_dword(dev, TX_CONF);
 869
 870         byte = read_nic_byte(dev, CW_CONF);
 871         byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
 872         byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
 873         write_nic_byte(dev, CW_CONF, byte);
 874
 875         tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
 876         tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
 877         tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
 878         tx_agc_ctl |= (1<<TX_AGC_CTL_FEEDBACK_ANT);
 879         write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
 880         write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
 881
 882         txconf = txconf & ~(1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
 883
 884         txconf = txconf & ~TX_LOOPBACK_MASK;
 885         txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
 886         txconf = txconf & ~TCR_DPRETRY_MASK;
 887         txconf = txconf & ~TCR_RTSRETRY_MASK;
 888         txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
 889         txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
 890         txconf = txconf & ~(1<<TX_NOCRC_SHIFT);
 891
 892         if (priv->hw_plcp_len)
 893                 txconf = txconf & ~TCR_PLCP_LEN;
 894         else
 895                 txconf = txconf | TCR_PLCP_LEN;
 896
 897         txconf = txconf & ~TCR_MXDMA_MASK;
 898         txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
 899         txconf = txconf | TCR_CWMIN;
 900         txconf = txconf | TCR_DISCW;
 901
 902         txconf = txconf | (1 << TX_NOICV_SHIFT);
 903
 904         write_nic_dword(dev, TX_CONF, txconf);
 905
 906         fix_tx_fifo(dev);
 907
 908         cmd = read_nic_byte(dev, CMD);
 909         write_nic_byte(dev, CMD, cmd | (1<<CMD_TX_ENABLE_SHIFT));
 910
 911         write_nic_dword(dev, TX_CONF, txconf);
 912 }
 913
 914 void rtl8180_beacon_tx_enable(struct net_device *dev)
 915 {
 916         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 917
 918         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
 919         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
 920         write_nic_byte(dev, TPPollStop, priv->dma_poll_mask);
 921         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
 922 }
 923
 924 void rtl8180_beacon_tx_disable(struct net_device *dev)
 925 {
 926         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 927
 928         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
 929         priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
 930         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
 931         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
 932
 933 }
 934
 935 void rtl8180_rtx_disable(struct net_device *dev)
 936 {
 937         u8 cmd;
 938         struct r8180_priv *priv = ieee80211_priv(dev);
 939
 940         cmd = read_nic_byte(dev, CMD);
 941         write_nic_byte(dev, CMD, cmd & ~\
 942                        ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
 943         force_pci_posting(dev);
 944         mdelay(10);
 945
 946         if (!priv->rx_skb_complete)
 947                 dev_kfree_skb_any(priv->rx_skb);
 948 }
 949
 950 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
 951                          int addr)
 952 {
 953         int i;
 954         u32 *desc;
 955         u32 *tmp;
 956         dma_addr_t dma_desc, dma_tmp;
 957         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 958         struct pci_dev *pdev = priv->pdev;
 959         void *buf;
 960
 961         if ((bufsize & 0xfff) != bufsize) {
 962                 DMESGE("TX buffer allocation too large");
 963                 return 0;
 964         }
 965         desc = (u32 *)pci_alloc_consistent(pdev,
 966                                           sizeof(u32)*8*count+256, &dma_desc);
 967         if (desc == NULL)
 968                 return -1;
 969
 970         if (dma_desc & 0xff)
 971                 /*
 972                  * descriptor's buffer must be 256 byte aligned
 973                  * we shouldn't be here, since we set DMA mask !
 974                  */
 975                 WARN(1, "DMA buffer is not aligned\n");
 976
 977         tmp = desc;
 978
 979         for (i = 0; i < count; i++) {
 980                 buf = (void *)pci_alloc_consistent(pdev, bufsize, &dma_tmp);
 981                 if (buf == NULL)
 982                         return -ENOMEM;
 983
 984                 switch (addr) {
 985                 case TX_MANAGEPRIORITY_RING_ADDR:
 986                         if (-1 == buffer_add(&(priv->txmapbufs), buf, dma_tmp, NULL)) {
 987                                 DMESGE("Unable to allocate mem for buffer NP");
 988                                 return -ENOMEM;
 989                         }
 990                         break;
 991                 case TX_BKPRIORITY_RING_ADDR:
 992                         if (-1 == buffer_add(&(priv->txbkpbufs), buf, dma_tmp, NULL)) {
 993                                 DMESGE("Unable to allocate mem for buffer LP");
 994                                 return -ENOMEM;
 995                         }
 996                         break;
 997                 case TX_BEPRIORITY_RING_ADDR:
 998                         if (-1 == buffer_add(&(priv->txbepbufs), buf, dma_tmp, NULL)) {
 999                                 DMESGE("Unable to allocate mem for buffer NP");
1000                                 return -ENOMEM;
1001                         }
1002                         break;
1003                 case TX_VIPRIORITY_RING_ADDR:
1004                         if (-1 == buffer_add(&(priv->txvipbufs), buf, dma_tmp, NULL)) {
1005                                 DMESGE("Unable to allocate mem for buffer LP");
1006                                 return -ENOMEM;
1007                         }
1008                         break;
1009                 case TX_VOPRIORITY_RING_ADDR:
1010                         if (-1 == buffer_add(&(priv->txvopbufs), buf, dma_tmp, NULL)) {
1011                                 DMESGE("Unable to allocate mem for buffer NP");
1012                                 return -ENOMEM;
1013                         }
1014                         break;
1015                 case TX_HIGHPRIORITY_RING_ADDR:
1016                         if (-1 == buffer_add(&(priv->txhpbufs), buf, dma_tmp, NULL)) {
1017                                 DMESGE("Unable to allocate mem for buffer HP");
1018                                 return -ENOMEM;
1019                         }
1020                         break;
1021                 case TX_BEACON_RING_ADDR:
1022                         if (-1 == buffer_add(&(priv->txbeaconbufs), buf, dma_tmp, NULL)) {
1023                                 DMESGE("Unable to allocate mem for buffer BP");
1024                                 return -ENOMEM;
1025                         }
1026                         break;
1027                 }
1028                 *tmp = *tmp & ~(1<<31); /* descriptor empty, owned by the drv */
1029                 *(tmp+2) = (u32)dma_tmp;
1030                 *(tmp+3) = bufsize;
1031
1032                 if (i+1 < count)
1033                         *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1034                 else
1035                         *(tmp+4) = (u32)dma_desc;
1036
1037                 tmp = tmp+8;
1038         }
1039
1040         switch (addr) {
1041         case TX_MANAGEPRIORITY_RING_ADDR:
1042                 priv->txmapringdma = dma_desc;
1043                 priv->txmapring = desc;
1044                 break;
1045         case TX_BKPRIORITY_RING_ADDR:
1046                 priv->txbkpringdma = dma_desc;
1047                 priv->txbkpring = desc;
1048                 break;
1049         case TX_BEPRIORITY_RING_ADDR:
1050                 priv->txbepringdma = dma_desc;
1051                 priv->txbepring = desc;
1052                 break;
1053         case TX_VIPRIORITY_RING_ADDR:
1054                 priv->txvipringdma = dma_desc;
1055                 priv->txvipring = desc;
1056                 break;
1057         case TX_VOPRIORITY_RING_ADDR:
1058                 priv->txvopringdma = dma_desc;
1059                 priv->txvopring = desc;
1060                 break;
1061         case TX_HIGHPRIORITY_RING_ADDR:
1062                 priv->txhpringdma = dma_desc;
1063                 priv->txhpring = desc;
1064                 break;
1065         case TX_BEACON_RING_ADDR:
1066                 priv->txbeaconringdma = dma_desc;
1067                 priv->txbeaconring = desc;
1068                 break;
1069
1070         }
1071
1072         return 0;
1073 }
1074
1075 void free_tx_desc_rings(struct net_device *dev)
1076 {
1077         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1078         struct pci_dev *pdev = priv->pdev;
1079         int count = priv->txringcount;
1080
1081         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1082                             priv->txmapring, priv->txmapringdma);
1083         buffer_free(dev, &(priv->txmapbufs), priv->txbuffsize, 1);
1084
1085         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1086                             priv->txbkpring, priv->txbkpringdma);
1087         buffer_free(dev, &(priv->txbkpbufs), priv->txbuffsize, 1);
1088
1089         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1090                             priv->txbepring, priv->txbepringdma);
1091         buffer_free(dev, &(priv->txbepbufs), priv->txbuffsize, 1);
1092
1093         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1094                             priv->txvipring, priv->txvipringdma);
1095         buffer_free(dev, &(priv->txvipbufs), priv->txbuffsize, 1);
1096
1097         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1098                             priv->txvopring, priv->txvopringdma);
1099         buffer_free(dev, &(priv->txvopbufs), priv->txbuffsize, 1);
1100
1101         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1102                             priv->txhpring, priv->txhpringdma);
1103         buffer_free(dev, &(priv->txhpbufs), priv->txbuffsize, 1);
1104
1105         count = priv->txbeaconcount;
1106         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1107                             priv->txbeaconring, priv->txbeaconringdma);
1108         buffer_free(dev, &(priv->txbeaconbufs), priv->txbuffsize, 1);
1109 }
1110
1111 void free_rx_desc_ring(struct net_device *dev)
1112 {
1113         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1114         struct pci_dev *pdev = priv->pdev;
1115         int count = priv->rxringcount;
1116
1117         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1118                             priv->rxring, priv->rxringdma);
1119
1120         buffer_free(dev, &(priv->rxbuffer), priv->rxbuffersize, 0);
1121 }
1122
1123 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1124 {
1125         int i;
1126         u32 *desc;
1127         u32 *tmp;
1128         dma_addr_t dma_desc, dma_tmp;
1129         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1130         struct pci_dev *pdev = priv->pdev;
1131         void *buf;
1132         u8 rx_desc_size;
1133
1134         rx_desc_size = 8; /* 4*8 = 32 bytes */
1135
1136         if ((bufsize & 0xfff) != bufsize) {
1137                 DMESGE("RX buffer allocation too large");
1138                 return -1;
1139         }
1140
1141         desc = (u32 *)pci_alloc_consistent(pdev, sizeof(u32)*rx_desc_size*count+256,
1142                                           &dma_desc);
1143
1144         if (dma_desc & 0xff)
1145                 /*
1146                  * descriptor's buffer must be 256 byte aligned
1147                  * should never happen since we specify the DMA mask
1148                  */
1149                 WARN(1, "DMA buffer is not aligned\n");
1150
1151         priv->rxring = desc;
1152         priv->rxringdma = dma_desc;
1153         tmp = desc;
1154
1155         for (i = 0; i < count; i++) {
1156                 buf = kmalloc(bufsize * sizeof(u8), GFP_ATOMIC);
1157                 if (buf == NULL) {
1158                         DMESGE("Failed to kmalloc RX buffer");
1159                         return -1;
1160                 }
1161
1162                 dma_tmp = pci_map_single(pdev, buf, bufsize * sizeof(u8),
1163                                          PCI_DMA_FROMDEVICE);
1164
1165                 if (-1 == buffer_add(&(priv->rxbuffer), buf, dma_tmp,
1166                            &(priv->rxbufferhead))) {
1167                         DMESGE("Unable to allocate mem RX buf");
1168                         return -1;
1169                 }
1170                 *tmp = 0; /* zero pads the header of the descriptor */
1171                 *tmp = *tmp | (bufsize&0xfff);
1172                 *(tmp+2) = (u32)dma_tmp;
1173                 *tmp = *tmp | (1<<31); /* descriptor void, owned by the NIC */
1174
1175                 tmp = tmp+rx_desc_size;
1176         }
1177
1178         *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); /* this is the last descriptor */
1179
1180         return 0;
1181 }
1182
1183
1184 void set_nic_rxring(struct net_device *dev)
1185 {
1186         u8 pgreg;
1187         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1188
1189         pgreg = read_nic_byte(dev, PGSELECT);
1190         write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
1191
1192         write_nic_dword(dev, RXRING_ADDR, priv->rxringdma);
1193 }
1194
1195 void rtl8180_reset(struct net_device *dev)
1196 {
1197         u8 cr;
1198
1199         rtl8180_irq_disable(dev);
1200
1201         cr = read_nic_byte(dev, CMD);
1202         cr = cr & 2;
1203         cr = cr | (1<<CMD_RST_SHIFT);
1204         write_nic_byte(dev, CMD, cr);
1205
1206         force_pci_posting(dev);
1207
1208         mdelay(200);
1209
1210         if (read_nic_byte(dev, CMD) & (1<<CMD_RST_SHIFT))
1211                 DMESGW("Card reset timeout!");
1212         else
1213                 DMESG("Card successfully reset");
1214
1215         rtl8180_set_mode(dev, EPROM_CMD_LOAD);
1216         force_pci_posting(dev);
1217         mdelay(200);
1218 }
1219
1220 inline u16 ieeerate2rtlrate(int rate)
1221 {
1222         switch (rate) {
1223         case 10:
1224                 return 0;
1225         case 20:
1226                 return 1;
1227         case 55:
1228                 return 2;
1229         case 110:
1230                 return 3;
1231         case 60:
1232                 return 4;
1233         case 90:
1234                 return 5;
1235         case 120:
1236                 return 6;
1237         case 180:
1238                 return 7;
1239         case 240:
1240                 return 8;
1241         case 360:
1242                 return 9;
1243         case 480:
1244                 return 10;
1245         case 540:
1246                 return 11;
1247         default:
1248                 return 3;
1249         }
1250 }
1251
1252 static u16 rtl_rate[] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540, 720};
1253
1254 inline u16 rtl8180_rate2rate(short rate)
1255 {
1256         if (rate > 12)
1257                 return 10;
1258         return rtl_rate[rate];
1259 }
1260
1261 inline u8 rtl8180_IsWirelessBMode(u16 rate)
1262 {
1263         if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
1264                 return 1;
1265         else
1266                 return 0;
1267 }
1268
1269 u16 N_DBPSOfRate(u16 DataRate);
1270
1271 u16 ComputeTxTime(u16 FrameLength, u16 DataRate, u8 bManagementFrame,
1272                   u8 bShortPreamble)
1273 {
1274         u16     FrameTime;
1275         u16     N_DBPS;
1276         u16     Ceiling;
1277
1278         if (rtl8180_IsWirelessBMode(DataRate)) {
1279                 if (bManagementFrame || !bShortPreamble || DataRate == 10)
1280                         /* long preamble */
1281                         FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1282                 else
1283                         /* short preamble */
1284                         FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1285
1286                 if ((FrameLength*8 % (DataRate/10)) != 0) /* get the ceilling */
1287                         FrameTime++;
1288         } else {        /* 802.11g DSSS-OFDM PLCP length field calculation. */
1289                 N_DBPS = N_DBPSOfRate(DataRate);
1290                 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1291                                 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1292                 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1293         }
1294         return FrameTime;
1295 }
1296
1297 u16 N_DBPSOfRate(u16 DataRate)
1298 {
1299          u16 N_DBPS = 24;
1300
1301         switch (DataRate) {
1302         case 60:
1303                 N_DBPS = 24;
1304                 break;
1305         case 90:
1306                 N_DBPS = 36;
1307                 break;
1308         case 120:
1309                 N_DBPS = 48;
1310                 break;
1311         case 180:
1312                 N_DBPS = 72;
1313                 break;
1314         case 240:
1315                 N_DBPS = 96;
1316                 break;
1317         case 360:
1318                 N_DBPS = 144;
1319                 break;
1320         case 480:
1321                 N_DBPS = 192;
1322                 break;
1323         case 540:
1324                 N_DBPS = 216;
1325                 break;
1326         default:
1327                 break;
1328         }
1329
1330         return N_DBPS;
1331 }
1332
1333 /*
1334  * For Netgear case, they want good-looking singal strength.
1335  */
1336 long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1337 {
1338         long RetSS;
1339
1340         /* Step 1. Scale mapping. */
1341         if (CurrSS >= 71 && CurrSS <= 100)
1342                 RetSS = 90 + ((CurrSS - 70) / 3);
1343         else if (CurrSS >= 41 && CurrSS <= 70)
1344                 RetSS = 78 + ((CurrSS - 40) / 3);
1345         else if (CurrSS >= 31 && CurrSS <= 40)
1346                 RetSS = 66 + (CurrSS - 30);
1347         else if (CurrSS >= 21 && CurrSS <= 30)
1348                 RetSS = 54 + (CurrSS - 20);
1349         else if (CurrSS >= 5 && CurrSS <= 20)
1350                 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1351         else if (CurrSS == 4)
1352                 RetSS = 36;
1353         else if (CurrSS == 3)
1354                 RetSS = 27;
1355         else if (CurrSS == 2)
1356                 RetSS = 18;
1357         else if (CurrSS == 1)
1358                 RetSS = 9;
1359         else
1360                 RetSS = CurrSS;
1361
1362         /* Step 2. Smoothing. */
1363         if (LastSS > 0)
1364                 RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
1365
1366         return RetSS;
1367 }
1368
1369 /*
1370  * Translate 0-100 signal strength index into dBm.
1371  */
1372 long TranslateToDbm8185(u8 SignalStrengthIndex)
1373 {
1374         long SignalPower;
1375
1376         /* Translate to dBm (x=0.5y-95). */
1377         SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1378         SignalPower -= 95;
1379
1380         return SignalPower;
1381 }
1382
1383 /*
1384  * Perform signal smoothing for dynamic mechanism.
1385  * This is different with PerformSignalSmoothing8185 in smoothing fomula.
1386  * No dramatic adjustion is apply because dynamic mechanism need some degree
1387  * of correctness. Ported from 8187B.
1388  */
1389 void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1390                                            bool bCckRate)
1391 {
1392         /* Determin the current packet is CCK rate. */
1393         priv->bCurCCKPkt = bCckRate;
1394
1395         if (priv->UndecoratedSmoothedSS >= 0)
1396                 priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10)) / 6;
1397         else
1398                 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1399
1400         priv->UndercorateSmoothedRxPower = ((priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower * 11)) / 60;
1401
1402         if (bCckRate)
1403                 priv->CurCCKRSSI = priv->RSSI;
1404         else
1405                 priv->CurCCKRSSI = 0;
1406 }
1407
1408
1409 /*
1410  * This is rough RX isr handling routine
1411  */
1412 void rtl8180_rx(struct net_device *dev)
1413 {
1414         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1415         struct sk_buff *tmp_skb;
1416         short first, last;
1417         u32 len;
1418         int lastlen;
1419         unsigned char quality, signal;
1420         u8 rate;
1421         u32 *tmp, *tmp2;
1422         u8 rx_desc_size;
1423         u8 padding;
1424         char rxpower = 0;
1425         u32 RXAGC = 0;
1426         long RxAGC_dBm = 0;
1427         u8      LNA = 0, BB = 0;
1428         u8      LNA_gain[4] = {02, 17, 29, 39};
1429         u8  Antenna = 0;
1430         struct ieee80211_hdr_4addr *hdr;
1431         u16 fc, type;
1432         u8 bHwError = 0, bCRC = 0, bICV = 0;
1433         bool    bCckRate = false;
1434         u8     RSSI = 0;
1435         long    SignalStrengthIndex = 0;
1436         struct ieee80211_rx_stats stats = {
1437                 .signal = 0,
1438                 .noise = -98,
1439                 .rate = 0,
1440                 .freq = IEEE80211_24GHZ_BAND,
1441         };
1442
1443         stats.nic_type = NIC_8185B;
1444         rx_desc_size = 8;
1445
1446         if ((*(priv->rxringtail)) & (1<<31)) {
1447                 /* we have got an RX int, but the descriptor
1448                  * we are pointing is empty */
1449
1450                 priv->stats.rxnodata++;
1451                 priv->ieee80211->stats.rx_errors++;
1452
1453                 tmp2 = NULL;
1454                 tmp = priv->rxringtail;
1455                 do {
1456                         if (tmp == priv->rxring)
1457                                 tmp  = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
1458                         else
1459                                 tmp -= rx_desc_size;
1460
1461                         if (!(*tmp & (1<<31)))
1462                                 tmp2 = tmp;
1463                 } while (tmp != priv->rxring);
1464
1465                 if (tmp2)
1466                         priv->rxringtail = tmp2;
1467         }
1468
1469         /* while there are filled descriptors */
1470         while (!(*(priv->rxringtail) & (1<<31))) {
1471                 if (*(priv->rxringtail) & (1<<26))
1472                         DMESGW("RX buffer overflow");
1473                 if (*(priv->rxringtail) & (1<<12))
1474                         priv->stats.rxicverr++;
1475
1476                 if (*(priv->rxringtail) & (1<<27)) {
1477                         priv->stats.rxdmafail++;
1478                         /* DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail); */
1479                         goto drop;
1480                 }
1481
1482                 pci_dma_sync_single_for_cpu(priv->pdev,
1483                                     priv->rxbuffer->dma,
1484                                     priv->rxbuffersize * \
1485                                     sizeof(u8),
1486                                     PCI_DMA_FROMDEVICE);
1487
1488                 first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
1489                 if (first)
1490                         priv->rx_prevlen = 0;
1491
1492                 last = *(priv->rxringtail) & (1<<28) ? 1 : 0;
1493                 if (last) {
1494                         lastlen = ((*priv->rxringtail) & 0xfff);
1495
1496                         /* if the last descriptor (that should
1497                          * tell us the total packet len) tell
1498                          * us something less than the descriptors
1499                          * len we had until now, then there is some
1500                          * problem..
1501                          * workaround to prevent kernel panic
1502                          */
1503                         if (lastlen < priv->rx_prevlen)
1504                                 len = 0;
1505                         else
1506                                 len = lastlen-priv->rx_prevlen;
1507
1508                         if (*(priv->rxringtail) & (1<<13)) {
1509                                 if ((*(priv->rxringtail) & 0xfff) < 500)
1510                                         priv->stats.rxcrcerrmin++;
1511                                 else if ((*(priv->rxringtail) & 0x0fff) > 1000)
1512                                         priv->stats.rxcrcerrmax++;
1513                                 else
1514                                         priv->stats.rxcrcerrmid++;
1515
1516                         }
1517
1518                 } else {
1519                         len = priv->rxbuffersize;
1520                 }
1521
1522                 if (first && last) {
1523                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1524                 } else if (first) {
1525                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1526                         if (padding)
1527                                 len -= 2;
1528                 } else {
1529                         padding = 0;
1530                 }
1531                 padding = 0;
1532                 priv->rx_prevlen += len;
1533
1534                 if (priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100) {
1535                         /* HW is probably passing several buggy frames
1536                         * without FD or LD flag set.
1537                         * Throw this garbage away to prevent skb
1538                         * memory exausting
1539                         */
1540                         if (!priv->rx_skb_complete)
1541                                 dev_kfree_skb_any(priv->rx_skb);
1542                         priv->rx_skb_complete = 1;
1543                 }
1544
1545                 signal = (unsigned char)(((*(priv->rxringtail+3)) & (0x00ff0000))>>16);
1546                 signal = (signal & 0xfe) >> 1;
1547
1548                 quality = (unsigned char)((*(priv->rxringtail+3)) & (0xff));
1549
1550                 stats.mac_time[0] = *(priv->rxringtail+1);
1551                 stats.mac_time[1] = *(priv->rxringtail+2);
1552                 rxpower = ((char)(((*(priv->rxringtail+4)) & (0x00ff0000))>>16))/2 - 42;
1553                 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>>8)) & (0x7f);
1554
1555                 rate = ((*(priv->rxringtail)) &
1556                         ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1557
1558                 stats.rate = rtl8180_rate2rate(rate);
1559                 Antenna = (((*(priv->rxringtail+3)) & (0x00008000)) == 0) ? 0 : 1;
1560                 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1561                         RxAGC_dBm = rxpower+1;  /* bias */
1562                 } else { /* CCK rate. */
1563                         RxAGC_dBm = signal; /* bit 0 discard */
1564
1565                         LNA = (u8) (RxAGC_dBm & 0x60) >> 5; /* bit 6~ bit 5 */
1566                         BB  = (u8) (RxAGC_dBm & 0x1F); /* bit 4 ~ bit 0 */
1567
1568                         RxAGC_dBm = -(LNA_gain[LNA] + (BB*2)); /* Pin_11b=-(LNA_gain+BB_gain) (dBm) */
1569
1570                         RxAGC_dBm += 4; /* bias */
1571                 }
1572
1573                 if (RxAGC_dBm & 0x80) /* absolute value */
1574                         RXAGC = ~(RxAGC_dBm)+1;
1575                 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
1576                 /* Translate RXAGC into 1-100. */
1577                 if (!rtl8180_IsWirelessBMode(stats.rate)) { /* OFDM rate. */
1578                         if (RXAGC > 90)
1579                                 RXAGC = 90;
1580                         else if (RXAGC < 25)
1581                                 RXAGC = 25;
1582                         RXAGC = (90-RXAGC)*100/65;
1583                 } else { /* CCK rate. */
1584                         if (RXAGC > 95)
1585                                 RXAGC = 95;
1586                         else if (RXAGC < 30)
1587                                 RXAGC = 30;
1588                         RXAGC = (95-RXAGC)*100/65;
1589                 }
1590                 priv->SignalStrength = (u8)RXAGC;
1591                 priv->RecvSignalPower = RxAGC_dBm;
1592                 priv->RxPower = rxpower;
1593                 priv->RSSI = RSSI;
1594                 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1595                 if (quality >= 127)
1596                         quality = 1; /*0; */ /* 0 will cause epc to show signal zero , walk aroud now; */
1597                 else if (quality < 27)
1598                         quality = 100;
1599                 else
1600                         quality = 127 - quality;
1601                 priv->SignalQuality = quality;
1602
1603                 stats.signal = (u8)quality; /*priv->wstats.qual.level = priv->SignalStrength; */
1604                 stats.signalstrength = RXAGC;
1605                 if (stats.signalstrength > 100)
1606                         stats.signalstrength = 100;
1607                 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
1608                 /* printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength); */
1609                 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1610                 stats.noise = priv->wstats.qual.noise = 100 - priv->wstats.qual.qual;
1611                 bHwError = (((*(priv->rxringtail)) & (0x00000fff)) == 4080) | (((*(priv->rxringtail)) & (0x04000000)) != 0)
1612                         | (((*(priv->rxringtail)) & (0x08000000)) != 0) | (((~(*(priv->rxringtail))) & (0x10000000)) != 0) | (((~(*(priv->rxringtail))) & (0x20000000)) != 0);
1613                 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
1614                 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
1615                 hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
1616                     fc = le16_to_cpu(hdr->frame_ctl);
1617                 type = WLAN_FC_GET_TYPE(fc);
1618
1619                         if ((IEEE80211_FTYPE_CTL != type) &&
1620                                 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS) ? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 : hdr->addr3))
1621                                  && (!bHwError) && (!bCRC) && (!bICV)) {
1622                                 /* Perform signal smoothing for dynamic
1623                                  * mechanism on demand. This is different
1624                                  * with PerformSignalSmoothing8185 in smoothing
1625                                  * fomula. No dramatic adjustion is apply
1626                                  * because dynamic mechanism need some degree
1627                                  * of correctness. */
1628                                 PerformUndecoratedSignalSmoothing8185(priv, bCckRate);
1629
1630                                 /* For good-looking singal strength. */
1631                                 SignalStrengthIndex = NetgearSignalStrengthTranslate(
1632                                                                 priv->LastSignalStrengthInPercent,
1633                                                                 priv->SignalStrength);
1634
1635                                 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
1636                                 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
1637                 /*
1638                  * We need more correct power of received packets and the  "SignalStrength" of RxStats is beautified,
1639                  * so we record the correct power here.
1640                  */
1641                                 priv->Stats_SignalQuality = (long)(priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
1642                                 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower - 1) / 6;
1643
1644                 /* Figure out which antenna that received the lasted packet. */
1645                                 priv->LastRxPktAntenna = Antenna ? 1 : 0; /* 0: aux, 1: main. */
1646                                 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1647                         }
1648
1649                 if (first) {
1650                         if (!priv->rx_skb_complete) {
1651                                 /* seems that HW sometimes fails to reiceve and
1652                                    doesn't provide the last descriptor */
1653                                 dev_kfree_skb_any(priv->rx_skb);
1654                                 priv->stats.rxnolast++;
1655                         }
1656                         /* support for prism header has been originally added by Christian */
1657                         if (priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR) {
1658
1659                         } else {
1660                                 priv->rx_skb = dev_alloc_skb(len+2);
1661                                 if (!priv->rx_skb)
1662                                         goto drop;
1663                         }
1664
1665                         priv->rx_skb_complete = 0;
1666                         priv->rx_skb->dev = dev;
1667                 } else {
1668                         /* if we are here we should  have already RXed
1669                         * the first frame.
1670                         * If we get here and the skb is not allocated then
1671                         * we have just throw out garbage (skb not allocated)
1672                         * and we are still rxing garbage....
1673                         */
1674                         if (!priv->rx_skb_complete) {
1675
1676                                 tmp_skb = dev_alloc_skb(priv->rx_skb->len+len+2);
1677
1678                                 if (!tmp_skb)
1679                                         goto drop;
1680
1681                                 tmp_skb->dev = dev;
1682
1683                                 memcpy(skb_put(tmp_skb, priv->rx_skb->len),
1684                                         priv->rx_skb->data,
1685                                         priv->rx_skb->len);
1686
1687                                 dev_kfree_skb_any(priv->rx_skb);
1688
1689                                 priv->rx_skb = tmp_skb;
1690                         }
1691                 }
1692
1693                 if (!priv->rx_skb_complete) {
1694                         if (padding) {
1695                                 memcpy(skb_put(priv->rx_skb, len),
1696                                         (((unsigned char *)priv->rxbuffer->buf) + 2), len);
1697                         } else {
1698                                 memcpy(skb_put(priv->rx_skb, len),
1699                                         priv->rxbuffer->buf, len);
1700                         }
1701                 }
1702
1703                 if (last && !priv->rx_skb_complete) {
1704                         if (priv->rx_skb->len > 4)
1705                                 skb_trim(priv->rx_skb, priv->rx_skb->len-4);
1706                         if (!ieee80211_rtl_rx(priv->ieee80211,
1707                                          priv->rx_skb, &stats))
1708                                 dev_kfree_skb_any(priv->rx_skb);
1709                         priv->rx_skb_complete = 1;
1710                 }
1711
1712                 pci_dma_sync_single_for_device(priv->pdev,
1713                                     priv->rxbuffer->dma,
1714                                     priv->rxbuffersize * \
1715                                     sizeof(u8),
1716                                     PCI_DMA_FROMDEVICE);
1717
1718 drop: /* this is used when we have not enough mem */
1719                 /* restore the descriptor */
1720                 *(priv->rxringtail+2) = priv->rxbuffer->dma;
1721                 *(priv->rxringtail) = *(priv->rxringtail) & ~0xfff;
1722                 *(priv->rxringtail) =
1723                         *(priv->rxringtail) | priv->rxbuffersize;
1724
1725                 *(priv->rxringtail) =
1726                         *(priv->rxringtail) | (1<<31);
1727
1728                 priv->rxringtail += rx_desc_size;
1729                 if (priv->rxringtail >=
1730                    (priv->rxring)+(priv->rxringcount)*rx_desc_size)
1731                         priv->rxringtail = priv->rxring;
1732
1733                 priv->rxbuffer = (priv->rxbuffer->next);
1734         }
1735 }
1736
1737
1738 void rtl8180_dma_kick(struct net_device *dev, int priority)
1739 {
1740         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1741
1742         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1743         write_nic_byte(dev, TX_DMA_POLLING,
1744                         (1 << (priority + 1)) | priv->dma_poll_mask);
1745         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1746
1747         force_pci_posting(dev);
1748 }
1749
1750 void rtl8180_data_hard_stop(struct net_device *dev)
1751 {
1752         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1753
1754         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1755         priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
1756         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1757         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1758 }
1759
1760 void rtl8180_data_hard_resume(struct net_device *dev)
1761 {
1762         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1763
1764         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1765         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
1766         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1767         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1768 }
1769
1770 /*
1771  * This function TX data frames when the ieee80211 stack requires this.
1772  * It checks also if we need to stop the ieee tx queue, eventually do it
1773  */
1774 void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int
1775 rate) {
1776         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1777         int mode;
1778         struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
1779         short morefrag = (h->frame_control) & IEEE80211_FCTL_MOREFRAGS;
1780         unsigned long flags;
1781         int priority;
1782
1783         mode = priv->ieee80211->iw_mode;
1784
1785         rate = ieeerate2rtlrate(rate);
1786         /*
1787          * This function doesn't require lock because we make
1788          * sure it's called with the tx_lock already acquired.
1789          * this come from the kernel's hard_xmit callback (through
1790          * the ieee stack, or from the try_wake_queue (again through
1791          * the ieee stack.
1792          */
1793         priority = AC2Q(skb->priority);
1794         spin_lock_irqsave(&priv->tx_lock, flags);
1795
1796         if (priv->ieee80211->bHwRadioOff) {
1797                 spin_unlock_irqrestore(&priv->tx_lock, flags);
1798
1799                 return;
1800         }
1801
1802         if (!check_nic_enought_desc(dev, priority)) {
1803                 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1804                         get_curr_tx_free_desc(dev, priority));
1805                 ieee80211_rtl_stop_queue(priv->ieee80211);
1806         }
1807         rtl8180_tx(dev, skb->data, skb->len, priority, morefrag, 0, rate);
1808         if (!check_nic_enought_desc(dev, priority))
1809                 ieee80211_rtl_stop_queue(priv->ieee80211);
1810
1811         spin_unlock_irqrestore(&priv->tx_lock, flags);
1812 }
1813
1814 /*
1815  * This is a rough attempt to TX a frame
1816  * This is called by the ieee 80211 stack to TX management frames.
1817  * If the ring is full packet are dropped (for data frame the queue
1818  * is stopped before this can happen). For this reason it is better
1819  * if the descriptors are larger than the largest management frame
1820  * we intend to TX: i'm unsure what the HW does if it will not found
1821  * the last fragment of a frame because it has been dropped...
1822  * Since queues for Management and Data frames are different we
1823  * might use a different lock than tx_lock (for example mgmt_tx_lock)
1824  */
1825 /* these function may loops if invoked with 0 descriptors or 0 len buffer */
1826 int rtl8180_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1827 {
1828         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1829         unsigned long flags;
1830         int priority;
1831
1832         priority = MANAGE_PRIORITY;
1833
1834         spin_lock_irqsave(&priv->tx_lock, flags);
1835
1836         if (priv->ieee80211->bHwRadioOff) {
1837                 spin_unlock_irqrestore(&priv->tx_lock, flags);
1838                 dev_kfree_skb_any(skb);
1839                 return NETDEV_TX_OK;
1840         }
1841
1842         rtl8180_tx(dev, skb->data, skb->len, priority,
1843                 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1844
1845         priv->ieee80211->stats.tx_bytes += skb->len;
1846         priv->ieee80211->stats.tx_packets++;
1847         spin_unlock_irqrestore(&priv->tx_lock, flags);
1848
1849         dev_kfree_skb_any(skb);
1850         return NETDEV_TX_OK;
1851 }
1852
1853 /* longpre 144+48 shortpre 72+24 */
1854 u16 rtl8180_len2duration(u32 len, short rate, short *ext)
1855 {
1856         u16 duration;
1857         u16 drift;
1858         *ext = 0;
1859
1860         switch (rate) {
1861         case 0: /* 1mbps */
1862                 *ext = 0;
1863                 duration = ((len+4)<<4) / 0x2;
1864                 drift = ((len+4)<<4) % 0x2;
1865                 if (drift == 0)
1866                         break;
1867                 duration++;
1868                 break;
1869         case 1: /* 2mbps */
1870                 *ext = 0;
1871                 duration = ((len+4)<<4) / 0x4;
1872                 drift = ((len+4)<<4) % 0x4;
1873                 if (drift == 0)
1874                         break;
1875                 duration++;
1876                 break;
1877         case 2: /* 5.5mbps */
1878                 *ext = 0;
1879                 duration = ((len+4)<<4) / 0xb;
1880                 drift = ((len+4)<<4) % 0xb;
1881                 if (drift == 0)
1882                         break;
1883                 duration++;
1884                 break;
1885         default:
1886         case 3: /* 11mbps */
1887                 *ext = 0;
1888                 duration = ((len+4)<<4) / 0x16;
1889                 drift = ((len+4)<<4) % 0x16;
1890                 if (drift == 0)
1891                         break;
1892                 duration++;
1893                 if (drift > 6)
1894                         break;
1895                 *ext = 1;
1896                 break;
1897         }
1898
1899         return duration;
1900 }
1901
1902 void rtl8180_prepare_beacon(struct net_device *dev)
1903 {
1904         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1905         struct sk_buff *skb;
1906
1907         u16 word  = read_nic_word(dev, BcnItv);
1908         word &= ~BcnItv_BcnItv; /* clear Bcn_Itv */
1909         word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval); /* 0x64; */
1910         write_nic_word(dev, BcnItv, word);
1911
1912         skb = ieee80211_get_beacon(priv->ieee80211);
1913         if (skb) {
1914                 rtl8180_tx(dev, skb->data, skb->len, BEACON_PRIORITY,
1915                         0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1916                 dev_kfree_skb_any(skb);
1917         }
1918 }
1919
1920 /*
1921  * This function do the real dirty work: it enqueues a TX command
1922  * descriptor in the ring buffer, copyes the frame in a TX buffer
1923  * and kicks the NIC to ensure it does the DMA transfer.
1924  */
1925 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
1926                  short morefrag, short descfrag, int rate)
1927 {
1928         struct r8180_priv *priv = ieee80211_priv(dev);
1929         u32 *tail, *temp_tail;
1930         u32 *begin;
1931         u32 *buf;
1932         int i;
1933         int remain;
1934         int buflen;
1935         int count;
1936         u16 duration;
1937         short ext;
1938         struct buffer *buflist;
1939         struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
1940         u8 dest[ETH_ALEN];
1941         u8                      bUseShortPreamble = 0;
1942         u8                      bCTSEnable = 0;
1943         u8                      bRTSEnable = 0;
1944         u16                     Duration = 0;
1945         u16                     RtsDur = 0;
1946         u16                     ThisFrameTime = 0;
1947         u16                     TxDescDuration = 0;
1948         u8                      ownbit_flag = false;
1949
1950         switch (priority) {
1951         case MANAGE_PRIORITY:
1952                 tail = priv->txmapringtail;
1953                 begin = priv->txmapring;
1954                 buflist = priv->txmapbufstail;
1955                 count = priv->txringcount;
1956                 break;
1957         case BK_PRIORITY:
1958                 tail = priv->txbkpringtail;
1959                 begin = priv->txbkpring;
1960                 buflist = priv->txbkpbufstail;
1961                 count = priv->txringcount;
1962                 break;
1963         case BE_PRIORITY:
1964                 tail = priv->txbepringtail;
1965                 begin = priv->txbepring;
1966                 buflist = priv->txbepbufstail;
1967                 count = priv->txringcount;
1968                 break;
1969         case VI_PRIORITY:
1970                 tail = priv->txvipringtail;
1971                 begin = priv->txvipring;
1972                 buflist = priv->txvipbufstail;
1973                 count = priv->txringcount;
1974                 break;
1975         case VO_PRIORITY:
1976                 tail = priv->txvopringtail;
1977                 begin = priv->txvopring;
1978                 buflist = priv->txvopbufstail;
1979                 count = priv->txringcount;
1980                 break;
1981         case HI_PRIORITY:
1982                 tail = priv->txhpringtail;
1983                 begin = priv->txhpring;
1984                 buflist = priv->txhpbufstail;
1985                 count = priv->txringcount;
1986                 break;
1987         case BEACON_PRIORITY:
1988                 tail = priv->txbeaconringtail;
1989                 begin = priv->txbeaconring;
1990                 buflist = priv->txbeaconbufstail;
1991                 count = priv->txbeaconcount;
1992                 break;
1993         default:
1994                 return -1;
1995                 break;
1996         }
1997
1998                 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
1999                 if (is_multicast_ether_addr(dest) ||
2000                                 is_broadcast_ether_addr(dest)) {
2001                         Duration = 0;
2002                         RtsDur = 0;
2003                         bRTSEnable = 0;
2004                         bCTSEnable = 0;
2005
2006                         ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2007                         TxDescDuration = ThisFrameTime;
2008                 } else { /* Unicast packet */
2009                         u16 AckTime;
2010
2011                         /* YJ,add,080828,for Keep alive */
2012                         priv->NumTxUnicast++;
2013
2014                         /* Figure out ACK rate according to BSS basic rate
2015                          * and Tx rate. */
2016                         AckTime = ComputeTxTime(14, 10, 0, 0);  /* AckCTSLng = 14 use 1M bps send */
2017
2018                         if (((len + sCrcLng) > priv->rts) && priv->rts) { /* RTS/CTS. */
2019                                 u16 RtsTime, CtsTime;
2020                                 /* u16 CtsRate; */
2021                                 bRTSEnable = 1;
2022                                 bCTSEnable = 0;
2023
2024                                 /* Rate and time required for RTS. */
2025                                 RtsTime = ComputeTxTime(sAckCtsLng/8, priv->ieee80211->basic_rate, 0, 0);
2026                                 /* Rate and time required for CTS. */
2027                                 CtsTime = ComputeTxTime(14, 10, 0, 0);  /* AckCTSLng = 14 use 1M bps send */
2028
2029                                 /* Figure out time required to transmit this frame. */
2030                                 ThisFrameTime = ComputeTxTime(len + sCrcLng,
2031                                                 rtl8180_rate2rate(rate),
2032                                                 0,
2033                                                 bUseShortPreamble);
2034
2035                                 /* RTS-CTS-ThisFrame-ACK. */
2036                                 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
2037
2038                                 TxDescDuration = RtsTime + RtsDur;
2039                         } else { /* Normal case. */
2040                                 bCTSEnable = 0;
2041                                 bRTSEnable = 0;
2042                                 RtsDur = 0;
2043
2044                                 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2045                                 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
2046                         }
2047
2048                         if (!(frag_hdr->frame_control & IEEE80211_FCTL_MOREFRAGS)) {
2049                                 /* ThisFrame-ACK. */
2050                                 Duration = aSifsTime + AckTime;
2051                         } else { /* One or more fragments remained. */
2052                                 u16 NextFragTime;
2053                                 NextFragTime = ComputeTxTime(len + sCrcLng, /* pretend following packet length equal current packet */
2054                                                 rtl8180_rate2rate(rate),
2055                                                 0,
2056                                                 bUseShortPreamble);
2057
2058                                 /* ThisFrag-ACk-NextFrag-ACK. */
2059                                 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
2060                         }
2061
2062                 } /* End of Unicast packet */
2063
2064                 frag_hdr->duration_id = Duration;
2065
2066         buflen = priv->txbuffsize;
2067         remain = len;
2068         temp_tail = tail;
2069
2070         while (remain != 0) {
2071                 mb();
2072                 if (!buflist) {
2073                         DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
2074                         return -1;
2075                 }
2076                 buf = buflist->buf;
2077
2078                 if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
2079                         DMESGW("No more TX desc, returning %x of %x",
2080                                remain, len);
2081                         priv->stats.txrdu++;
2082                         return remain;
2083                 }
2084
2085                 *tail = 0; /* zeroes header */
2086                 *(tail+1) = 0;
2087                 *(tail+3) = 0;
2088                 *(tail+5) = 0;
2089                 *(tail+6) = 0;
2090                 *(tail+7) = 0;
2091
2092                 /* FIXME: this should be triggered by HW encryption parameters.*/
2093                 *tail |= (1<<15); /* no encrypt */
2094
2095                 if (remain == len && !descfrag) {
2096                         ownbit_flag = false;
2097                         *tail = *tail | (1<<29) ; /* fist segment of the packet */
2098                         *tail = *tail | (len);
2099                 } else {
2100                         ownbit_flag = true;
2101                 }
2102
2103                 for (i = 0; i < buflen && remain > 0; i++, remain--) {
2104                         ((u8 *)buf)[i] = txbuf[i]; /* copy data into descriptor pointed DMAble buffer */
2105                         if (remain == 4 && i+4 >= buflen)
2106                                 break;
2107                         /* ensure the last desc has at least 4 bytes payload */
2108
2109                 }
2110                 txbuf = txbuf + i;
2111                 *(tail+3) = *(tail+3) & ~0xfff;
2112                 *(tail+3) = *(tail+3) | i; /* buffer length */
2113                 /* Use short preamble or not */
2114                 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
2115                         if (priv->plcp_preamble_mode == 1 && rate != 0) /*  short mode now, not long! */
2116                         ; /* *tail |= (1<<16); */                               /* enable short preamble mode. */
2117
2118                 if (bCTSEnable)
2119                         *tail |= (1<<18);
2120
2121                 if (bRTSEnable) { /* rts enable */
2122                         *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19); /* RTS RATE */
2123                         *tail |= (1<<23); /* rts enable */
2124                         *(tail+1) |= (RtsDur&0xffff); /* RTS Duration */
2125                 }
2126                 *(tail+3) |= ((TxDescDuration&0xffff)<<16); /* DURATION */
2127                 /* *(tail+3) |= (0xe6<<16); */
2128                 *(tail+5) |= (11<<8); /* (priv->retry_data<<8); */ /* retry lim; */
2129
2130                 *tail = *tail | ((rate&0xf) << 24);
2131
2132                 /* hw_plcp_len is not used for rtl8180 chip */
2133                 /* FIXME */
2134                 if (!priv->hw_plcp_len) {
2135                         duration = rtl8180_len2duration(len, rate, &ext);
2136                         *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
2137                         if (ext)
2138                                 *(tail+1) = *(tail+1) | (1<<31); /* plcp length extension */
2139                 }
2140
2141                 if (morefrag)
2142                         *tail = (*tail) | (1<<17); /* more fragment */
2143                 if (!remain)
2144                         *tail = (*tail) | (1<<28); /* last segment of frame */
2145
2146                 *(tail+5) = *(tail+5)|(2<<27);
2147                 *(tail+7) = *(tail+7)|(1<<4);
2148
2149                 wmb();
2150                 if (ownbit_flag)
2151                         *tail = *tail | (1<<31); /* descriptor ready to be txed */
2152
2153                 if ((tail - begin)/8 == count-1)
2154                         tail = begin;
2155                 else
2156                         tail = tail+8;
2157
2158                 buflist = buflist->next;
2159
2160                 mb();
2161
2162                 switch (priority) {
2163                 case MANAGE_PRIORITY:
2164                         priv->txmapringtail = tail;
2165                         priv->txmapbufstail = buflist;
2166                         break;
2167                 case BK_PRIORITY:
2168                         priv->txbkpringtail = tail;
2169                         priv->txbkpbufstail = buflist;
2170                         break;
2171                 case BE_PRIORITY:
2172                         priv->txbepringtail = tail;
2173                         priv->txbepbufstail = buflist;
2174                         break;
2175                 case VI_PRIORITY:
2176                         priv->txvipringtail = tail;
2177                         priv->txvipbufstail = buflist;
2178                         break;
2179                 case VO_PRIORITY:
2180                         priv->txvopringtail = tail;
2181                         priv->txvopbufstail = buflist;
2182                         break;
2183                 case HI_PRIORITY:
2184                         priv->txhpringtail = tail;
2185                         priv->txhpbufstail = buflist;
2186                         break;
2187                 case BEACON_PRIORITY:
2188                         /*
2189                          * The HW seems to be happy with the 1st
2190                          * descriptor filled and the 2nd empty...
2191                          * So always update descriptor 1 and never
2192                          * touch 2nd
2193                          */
2194                         break;
2195                 }
2196         }
2197         *temp_tail = *temp_tail | (1<<31); /* descriptor ready to be txed */
2198         rtl8180_dma_kick(dev, priority);
2199
2200         return 0;
2201 }
2202
2203 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
2204
2205 void rtl8180_link_change(struct net_device *dev)
2206 {
2207         struct r8180_priv *priv = ieee80211_priv(dev);
2208         u16 beacon_interval;
2209         struct ieee80211_network *net = &priv->ieee80211->current_network;
2210
2211         rtl8180_update_msr(dev);
2212
2213         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2214
2215         write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
2216         write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
2217
2218         beacon_interval  = read_nic_dword(dev, BEACON_INTERVAL);
2219         beacon_interval &= ~BEACON_INTERVAL_MASK;
2220         beacon_interval |= net->beacon_interval;
2221         write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
2222
2223         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2224
2225         rtl8180_set_chan(dev, priv->chan);
2226 }
2227
2228 void rtl8180_rq_tx_ack(struct net_device *dev)
2229 {
2230
2231         struct r8180_priv *priv = ieee80211_priv(dev);
2232
2233         write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) | CONFIG4_PWRMGT);
2234         priv->ack_tx_to_ieee = 1;
2235 }
2236
2237 short rtl8180_is_tx_queue_empty(struct net_device *dev)
2238 {
2239
2240         struct r8180_priv *priv = ieee80211_priv(dev);
2241         u32 *d;
2242
2243         for (d = priv->txmapring;
2244                 d < priv->txmapring + priv->txringcount; d += 8)
2245                         if (*d & (1<<31))
2246                                 return 0;
2247
2248         for (d = priv->txbkpring;
2249                 d < priv->txbkpring + priv->txringcount; d += 8)
2250                         if (*d & (1<<31))
2251                                 return 0;
2252
2253         for (d = priv->txbepring;
2254                 d < priv->txbepring + priv->txringcount; d += 8)
2255                         if (*d & (1<<31))
2256                                 return 0;
2257
2258         for (d = priv->txvipring;
2259                 d < priv->txvipring + priv->txringcount; d += 8)
2260                         if (*d & (1<<31))
2261                                 return 0;
2262
2263         for (d = priv->txvopring;
2264                 d < priv->txvopring + priv->txringcount; d += 8)
2265                         if (*d & (1<<31))
2266                                 return 0;
2267
2268         for (d = priv->txhpring;
2269                 d < priv->txhpring + priv->txringcount; d += 8)
2270                         if (*d & (1<<31))
2271                                 return 0;
2272         return 1;
2273 }
2274 /* FIXME FIXME 5msecs is random */
2275 #define HW_WAKE_DELAY 5
2276
2277 void rtl8180_hw_wakeup(struct net_device *dev)
2278 {
2279         unsigned long flags;
2280         struct r8180_priv *priv = ieee80211_priv(dev);
2281
2282         spin_lock_irqsave(&priv->ps_lock, flags);
2283         write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) & ~CONFIG4_PWRMGT);
2284         if (priv->rf_wakeup)
2285                 priv->rf_wakeup(dev);
2286         spin_unlock_irqrestore(&priv->ps_lock, flags);
2287 }
2288
2289 void rtl8180_hw_sleep_down(struct net_device *dev)
2290 {
2291         unsigned long flags;
2292         struct r8180_priv *priv = ieee80211_priv(dev);
2293
2294         spin_lock_irqsave(&priv->ps_lock, flags);
2295         if (priv->rf_sleep)
2296                 priv->rf_sleep(dev);
2297         spin_unlock_irqrestore(&priv->ps_lock, flags);
2298 }
2299
2300 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2301 {
2302         struct r8180_priv *priv = ieee80211_priv(dev);
2303         u32 rb = jiffies;
2304         unsigned long flags;
2305
2306         spin_lock_irqsave(&priv->ps_lock, flags);
2307
2308         /*
2309          * Writing HW register with 0 equals to disable
2310          * the timer, that is not really what we want
2311          */
2312         tl -= MSECS(4+16+7);
2313
2314         /*
2315          * If the interval in witch we are requested to sleep is too
2316          * short then give up and remain awake
2317          */
2318         if (((tl >= rb) && (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2319                 || ((rb > tl) && (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2320                 spin_unlock_irqrestore(&priv->ps_lock, flags);
2321                 printk("too short to sleep\n");
2322                 return;
2323         }
2324
2325         {
2326                 u32 tmp = (tl > rb) ? (tl-rb) : (rb-tl);
2327
2328                 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2329
2330                 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); /* as tl may be less than rb */
2331         }
2332         /*
2333          * If we suspect the TimerInt is gone beyond tl
2334          * while setting it, then give up
2335          */
2336
2337         if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME))) ||
2338                 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2339                 spin_unlock_irqrestore(&priv->ps_lock, flags);
2340                 return;
2341         }
2342
2343         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2344         spin_unlock_irqrestore(&priv->ps_lock, flags);
2345 }
2346
2347 void rtl8180_wmm_param_update(struct work_struct *work)
2348 {
2349         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wmm_param_update_wq);
2350         struct net_device *dev = ieee->dev;
2351         u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2352         u8 mode = ieee->current_network.mode;
2353         AC_CODING       eACI;
2354         AC_PARAM        AcParam;
2355         PAC_PARAM       pAcParam;
2356         u8 i;
2357
2358         if (!ieee->current_network.QoS_Enable) {
2359                 /* legacy ac_xx_param update */
2360                 AcParam.longData = 0;
2361                 AcParam.f.AciAifsn.f.AIFSN = 2; /* Follow 802.11 DIFS. */
2362                 AcParam.f.AciAifsn.f.ACM = 0;
2363                 AcParam.f.Ecw.f.ECWmin = 3; /* Follow 802.11 CWmin. */
2364                 AcParam.f.Ecw.f.ECWmax = 7; /* Follow 802.11 CWmax. */
2365                 AcParam.f.TXOPLimit = 0;
2366                 for (eACI = 0; eACI < AC_MAX; eACI++) {
2367                         AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2368                         {
2369                                 u8              u1bAIFS;
2370                                 u32             u4bAcParam;
2371                                 pAcParam = (PAC_PARAM)(&AcParam);
2372                                 /* Retrive paramters to udpate. */
2373                                 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2374                                 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
2375                                               (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
2376                                               (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
2377                                                (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2378                                 switch (eACI) {
2379                                 case AC1_BK:
2380                                         write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2381                                         break;
2382                                 case AC0_BE:
2383                                         write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2384                                         break;
2385                                 case AC2_VI:
2386                                         write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2387                                         break;
2388                                 case AC3_VO:
2389                                         write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2390                                         break;
2391                                 default:
2392                                         printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
2393                                         break;
2394                                 }
2395                         }
2396                 }
2397                 return;
2398         }
2399
2400         for (i = 0; i < AC_MAX; i++) {
2401                 /* AcParam.longData = 0; */
2402                 pAcParam = (AC_PARAM *)ac_param;
2403                 {
2404                         AC_CODING       eACI;
2405                         u8              u1bAIFS;
2406                         u32             u4bAcParam;
2407
2408                         /* Retrive paramters to udpate. */
2409                         eACI = pAcParam->f.AciAifsn.f.ACI;
2410                         /* Mode G/A: slotTimeTimer = 9; Mode B: 20 */
2411                         u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2412                         u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)    |
2413                                         (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)  |
2414                                         (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)  |
2415                                         (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2416
2417                         switch (eACI) {
2418                         case AC1_BK:
2419                                 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2420                                 break;
2421                         case AC0_BE:
2422                                 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2423                                 break;
2424                         case AC2_VI:
2425                                 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2426                                 break;
2427                         case AC3_VO:
2428                                 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2429                                 break;
2430                         default:
2431                                 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
2432                                 break;
2433                         }
2434                 }
2435                 ac_param += (sizeof(AC_PARAM));
2436         }
2437 }
2438
2439 void rtl8180_tx_irq_wq(struct work_struct *work);
2440 void rtl8180_restart_wq(struct work_struct *work);
2441 /* void rtl8180_rq_tx_ack(struct work_struct *work); */
2442 void rtl8180_watch_dog_wq(struct work_struct *work);
2443 void rtl8180_hw_wakeup_wq(struct work_struct *work);
2444 void rtl8180_hw_sleep_wq(struct work_struct *work);
2445 void rtl8180_sw_antenna_wq(struct work_struct *work);
2446 void rtl8180_watch_dog(struct net_device *dev);
2447
2448 void watch_dog_adaptive(unsigned long data)
2449 {
2450         struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
2451
2452         if (!priv->up) {
2453                 DMESG("<----watch_dog_adaptive():driver is not up!\n");
2454                 return;
2455         }
2456
2457         /* Tx High Power Mechanism. */
2458         if (CheckHighPower((struct net_device *)data))
2459                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
2460
2461         /* Tx Power Tracking on 87SE. */
2462         if (CheckTxPwrTracking((struct net_device *)data))
2463                 TxPwrTracking87SE((struct net_device *)data);
2464
2465         /* Perform DIG immediately. */
2466         if (CheckDig((struct net_device *)data) == true)
2467                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
2468         rtl8180_watch_dog((struct net_device *)data);
2469
2470         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
2471
2472         priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
2473         add_timer(&priv->watch_dog_timer);
2474 }
2475
2476 static CHANNEL_LIST ChannelPlan[] = {
2477         {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},         /* FCC */
2478         {{1,2,3,4,5,6,7,8,9,10,11},11},                                 /* IC */
2479         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* ETSI */
2480         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* Spain. Change to ETSI. */
2481         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* France. Change to ETSI. */
2482         {{14,36,40,44,48,52,56,60,64},9},                               /* MKK */
2483         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},/* MKK1 */
2484         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   /* Israel. */
2485         {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},               /* For 11a , TELEC */
2486         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},  /* For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626 */
2487         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} /* world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826 */
2488 };
2489
2490 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
2491 {
2492         int i;
2493
2494         /* lzm add 080826 */
2495         ieee->MinPassiveChnlNum = MAX_CHANNEL_NUMBER+1;
2496         ieee->IbssStartChnl = 0;
2497
2498         switch (channel_plan) {
2499         case COUNTRY_CODE_FCC:
2500         case COUNTRY_CODE_IC:
2501         case COUNTRY_CODE_ETSI:
2502         case COUNTRY_CODE_SPAIN:
2503         case COUNTRY_CODE_FRANCE:
2504         case COUNTRY_CODE_MKK:
2505         case COUNTRY_CODE_MKK1:
2506         case COUNTRY_CODE_ISRAEL:
2507         case COUNTRY_CODE_TELEC:
2508                 {
2509                         Dot11d_Init(ieee);
2510                         ieee->bGlobalDomain = false;
2511                         if (ChannelPlan[channel_plan].Len != 0) {
2512                                 /* Clear old channel map */
2513                                 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2514                                 /* Set new channel map */
2515                                 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
2516                                         if (ChannelPlan[channel_plan].Channel[i] <= 14)
2517                                                 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
2518                                 }
2519                         }
2520                         break;
2521                 }
2522         case COUNTRY_CODE_GLOBAL_DOMAIN:
2523                 {
2524                         GET_DOT11D_INFO(ieee)->bEnabled = 0;
2525                         Dot11d_Reset(ieee);
2526                         ieee->bGlobalDomain = true;
2527                         break;
2528                 }
2529         case COUNTRY_CODE_WORLD_WIDE_13_INDEX:/* lzm add 080826 */
2530                 {
2531                         ieee->MinPassiveChnlNum = 12;
2532                         ieee->IbssStartChnl = 10;
2533                         break;
2534                 }
2535         default:
2536                 {
2537                         Dot11d_Init(ieee);
2538                         ieee->bGlobalDomain = false;
2539                         memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2540                         for (i = 1; i <= 14; i++)
2541                                 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
2542                         break;
2543                 }
2544         }
2545 }
2546
2547 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
2548
2549 /* YJ,add,080828 */
2550 static void rtl8180_statistics_init(struct Stats *pstats)
2551 {
2552         memset(pstats, 0, sizeof(struct Stats));
2553 }
2554
2555 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
2556 {
2557         memset(plink_detect, 0, sizeof(link_detect_t));
2558         plink_detect->SlotNum = DEFAULT_SLOT_NUM;
2559 }
2560
2561 /* YJ,add,080828,end */
2562 static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
2563 {
2564         struct net_device *dev = eeprom->data;
2565         u8 reg = read_nic_byte(dev, EPROM_CMD);
2566
2567         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
2568         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
2569         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
2570         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
2571 }
2572
2573 static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
2574 {
2575         struct net_device *dev = eeprom->data;
2576         u8 reg = 2 << 6;
2577
2578         if (eeprom->reg_data_in)
2579                 reg |= RTL818X_EEPROM_CMD_WRITE;
2580         if (eeprom->reg_data_out)
2581                 reg |= RTL818X_EEPROM_CMD_READ;
2582         if (eeprom->reg_data_clock)
2583                 reg |= RTL818X_EEPROM_CMD_CK;
2584         if (eeprom->reg_chip_select)
2585                 reg |= RTL818X_EEPROM_CMD_CS;
2586
2587         write_nic_byte(dev, EPROM_CMD, reg);
2588         read_nic_byte(dev, EPROM_CMD);
2589         udelay(10);
2590 }
2591
2592 short rtl8180_init(struct net_device *dev)
2593 {
2594         struct r8180_priv *priv = ieee80211_priv(dev);
2595         u16 word;
2596         u16 version;
2597         u32 usValue;
2598         u16 tmpu16;
2599         int i, j;
2600         struct eeprom_93cx6 eeprom;
2601         u16 eeprom_val;
2602
2603         eeprom.data = dev;
2604         eeprom.register_read = rtl8187se_eeprom_register_read;
2605         eeprom.register_write = rtl8187se_eeprom_register_write;
2606         eeprom.width = PCI_EEPROM_WIDTH_93C46;
2607
2608         eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
2609         priv->channel_plan = eeprom_val & 0xFF;
2610         if (priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN) {
2611                 printk("rtl8180_init:Error channel plan! Set to default.\n");
2612                 priv->channel_plan = 0;
2613         }
2614
2615         DMESG("Channel plan is %d\n", priv->channel_plan);
2616         rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
2617
2618         /* FIXME: these constants are placed in a bad pleace. */
2619         priv->txbuffsize = 2048;        /* 1024; */
2620         priv->txringcount = 32;         /* 32; */
2621         priv->rxbuffersize = 2048;      /* 1024; */
2622         priv->rxringcount = 64;         /* 32; */
2623         priv->txbeaconcount = 2;
2624         priv->rx_skb_complete = 1;
2625
2626         priv->RFChangeInProgress = false;
2627         priv->SetRFPowerStateInProgress = false;
2628         priv->RFProgType = 0;
2629         priv->bInHctTest = false;
2630
2631         priv->irq_enabled = 0;
2632
2633         rtl8180_statistics_init(&priv->stats);
2634         rtl8180_link_detect_init(&priv->link_detect);
2635
2636         priv->ack_tx_to_ieee = 0;
2637         priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2638         priv->ieee80211->iw_mode = IW_MODE_INFRA;
2639         priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
2640                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2641                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
2642         priv->ieee80211->active_scan = 1;
2643         priv->ieee80211->rate = 110; /* 11 mbps */
2644         priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
2645         priv->ieee80211->host_encrypt = 1;
2646         priv->ieee80211->host_decrypt = 1;
2647         priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
2648         priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
2649         priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
2650         priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2651
2652         priv->hw_wep = hwwep;
2653         priv->prism_hdr = 0;
2654         priv->dev = dev;
2655         priv->retry_rts = DEFAULT_RETRY_RTS;
2656         priv->retry_data = DEFAULT_RETRY_DATA;
2657         priv->RFChangeInProgress = false;
2658         priv->SetRFPowerStateInProgress = false;
2659         priv->RFProgType = 0;
2660         priv->bInHctTest = false;
2661         priv->bInactivePs = true; /* false; */
2662         priv->ieee80211->bInactivePs = priv->bInactivePs;
2663         priv->bSwRfProcessing = false;
2664         priv->eRFPowerState = eRfOff;
2665         priv->RfOffReason = 0;
2666         priv->LedStrategy = SW_LED_MODE0;
2667         priv->TxPollingTimes = 0; /* lzm add 080826 */
2668         priv->bLeisurePs = true;
2669         priv->dot11PowerSaveMode = eActive;
2670         priv->AdMinCheckPeriod = 5;
2671         priv->AdMaxCheckPeriod = 10;
2672         priv->AdMaxRxSsThreshold = 30;  /* 60->30 */
2673         priv->AdRxSsThreshold = 20;     /* 50->20 */
2674         priv->AdCheckPeriod = priv->AdMinCheckPeriod;
2675         priv->AdTickCount = 0;
2676         priv->AdRxSignalStrength = -1;
2677         priv->RegSwAntennaDiversityMechanism = 0;
2678         priv->RegDefaultAntenna = 0;
2679         priv->SignalStrength = 0;
2680         priv->AdRxOkCnt = 0;
2681         priv->CurrAntennaIndex = 0;
2682         priv->AdRxSsBeforeSwitched = 0;
2683         init_timer(&priv->SwAntennaDiversityTimer);
2684         priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
2685         priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
2686         priv->bDigMechanism = 1;
2687         priv->InitialGain = 6;
2688         priv->bXtalCalibration = false;
2689         priv->XtalCal_Xin = 0;
2690         priv->XtalCal_Xout = 0;
2691         priv->bTxPowerTrack = false;
2692         priv->ThermalMeter = 0;
2693         priv->FalseAlarmRegValue = 0;
2694         priv->RegDigOfdmFaUpTh = 0xc; /* Upper threhold of OFDM false alarm, which is used in DIG. */
2695         priv->DIG_NumberFallbackVote = 0;
2696         priv->DIG_NumberUpgradeVote = 0;
2697         priv->LastSignalStrengthInPercent = 0;
2698         priv->Stats_SignalStrength = 0;
2699         priv->LastRxPktAntenna = 0;
2700         priv->SignalQuality = 0; /* in 0-100 index. */
2701         priv->Stats_SignalQuality = 0;
2702         priv->RecvSignalPower = 0; /* in dBm. */
2703         priv->Stats_RecvSignalPower = 0;
2704         priv->AdMainAntennaRxOkCnt = 0;
2705         priv->AdAuxAntennaRxOkCnt = 0;
2706         priv->bHWAdSwitched = false;
2707         priv->bRegHighPowerMechanism = true;
2708         priv->RegHiPwrUpperTh = 77;
2709         priv->RegHiPwrLowerTh = 75;
2710         priv->RegRSSIHiPwrUpperTh = 70;
2711         priv->RegRSSIHiPwrLowerTh = 20;
2712         priv->bCurCCKPkt = false;
2713         priv->UndecoratedSmoothedSS = -1;
2714         priv->bToUpdateTxPwr = false;
2715         priv->CurCCKRSSI = 0;
2716         priv->RxPower = 0;
2717         priv->RSSI = 0;
2718         priv->NumTxOkTotal = 0;
2719         priv->NumTxUnicast = 0;
2720         priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2721         priv->PowerProfile = POWER_PROFILE_AC;
2722         priv->CurrRetryCnt = 0;
2723         priv->LastRetryCnt = 0;
2724         priv->LastTxokCnt = 0;
2725         priv->LastRxokCnt = 0;
2726         priv->LastRetryRate = 0;
2727         priv->bTryuping = 0;
2728         priv->CurrTxRate = 0;
2729         priv->CurrRetryRate = 0;
2730         priv->TryupingCount = 0;
2731         priv->TryupingCountNoData = 0;
2732         priv->TryDownCountLowData = 0;
2733         priv->LastTxOKBytes = 0;
2734         priv->LastFailTxRate = 0;
2735         priv->LastFailTxRateSS = 0;
2736         priv->FailTxRateCount = 0;
2737         priv->LastTxThroughput = 0;
2738         priv->NumTxOkBytesTotal = 0;
2739         priv->ForcedDataRate = 0;
2740         priv->RegBModeGainStage = 1;
2741
2742         priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2743         spin_lock_init(&priv->irq_lock);
2744         spin_lock_init(&priv->irq_th_lock);
2745         spin_lock_init(&priv->tx_lock);
2746         spin_lock_init(&priv->ps_lock);
2747         spin_lock_init(&priv->rf_ps_lock);
2748         sema_init(&priv->wx_sem, 1);
2749         sema_init(&priv->rf_state, 1);
2750         INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2751         INIT_WORK(&priv->tx_irq_wq, (void *)rtl8180_tx_irq_wq);
2752         INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2753                           (void *)rtl8180_hw_wakeup_wq);
2754         INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
2755                           (void *)rtl8180_hw_sleep_wq);
2756         INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
2757                   (void *)rtl8180_wmm_param_update);
2758         INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
2759                           (void *)rtl8180_rate_adapter);
2760         INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
2761                          (void *)rtl8180_hw_dig_wq);
2762         INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
2763                          (void *)rtl8180_tx_pw_wq);
2764         INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
2765                          (void *) GPIOChangeRFWorkItemCallBack);
2766         tasklet_init(&priv->irq_rx_tasklet,
2767                      (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
2768                      (unsigned long)priv);
2769
2770         init_timer(&priv->watch_dog_timer);
2771         priv->watch_dog_timer.data = (unsigned long)dev;
2772         priv->watch_dog_timer.function = watch_dog_adaptive;
2773
2774         init_timer(&priv->rateadapter_timer);
2775         priv->rateadapter_timer.data = (unsigned long)dev;
2776         priv->rateadapter_timer.function = timer_rate_adaptive;
2777         priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
2778         priv->bEnhanceTxPwr = false;
2779
2780         priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
2781         priv->ieee80211->set_chan = rtl8180_set_chan;
2782         priv->ieee80211->link_change = rtl8180_link_change;
2783         priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
2784         priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
2785         priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
2786
2787         priv->ieee80211->init_wmmparam_flag = 0;
2788
2789         priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
2790         priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
2791         priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2792
2793         priv->MWIEnable = 0;
2794
2795         priv->ShortRetryLimit = 7;
2796         priv->LongRetryLimit = 7;
2797         priv->EarlyRxThreshold = 7;
2798
2799         priv->CSMethod = (0x01 << 29);
2800
2801         priv->TransmitConfig =  TCR_DurProcMode_OFFSET |
2802                                 (7<<TCR_MXDMA_OFFSET) |
2803                                 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2804                                 (priv->LongRetryLimit<<TCR_LRL_OFFSET) |
2805                                 (0 ? TCR_SAT : 0);
2806
2807         priv->ReceiveConfig =   RCR_AMF | RCR_ADF | RCR_ACF |
2808                                 RCR_AB | RCR_AM | RCR_APM |
2809                                 (7<<RCR_MXDMA_OFFSET) |
2810                                 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
2811                                 (priv->EarlyRxThreshold == 7 ?
2812                                          RCR_ONLYERLPKT : 0);
2813
2814         priv->IntrMask          = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
2815                                   IMR_THPDER | IMR_THPDOK |
2816                                   IMR_TVODER | IMR_TVODOK |
2817                                   IMR_TVIDER | IMR_TVIDOK |
2818                                   IMR_TBEDER | IMR_TBEDOK |
2819                                   IMR_TBKDER | IMR_TBKDOK |
2820                                   IMR_RDU |
2821                                   IMR_RER | IMR_ROK |
2822                                   IMR_RQoSOK;
2823
2824         priv->InitialGain = 6;
2825
2826         DMESG("MAC controller is a RTL8187SE b/g");
2827         priv->phy_ver = 2;
2828
2829         priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2830         priv->ieee80211->short_slot = 1;
2831
2832         /* just for sync 85 */
2833         priv->enable_gpio0 = 0;
2834
2835         eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &eeprom_val);
2836         usValue = eeprom_val;
2837         DMESG("usValue is 0x%x\n", usValue);
2838         /* 3Read AntennaDiversity */
2839
2840         /* SW Antenna Diversity. */
2841         if ((usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE)
2842                 priv->EEPROMSwAntennaDiversity = false;
2843         else
2844                 priv->EEPROMSwAntennaDiversity = true;
2845
2846         /* Default Antenna to use. */
2847         if ((usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1)
2848                 priv->EEPROMDefaultAntenna1 = false;
2849         else
2850                 priv->EEPROMDefaultAntenna1 = true;
2851
2852         if (priv->RegSwAntennaDiversityMechanism == 0) /* Auto */
2853                 /* 0: default from EEPROM. */
2854                 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2855         else
2856                 /* 1:disable antenna diversity, 2: enable antenna diversity. */
2857                 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1) ? false : true);
2858
2859         if (priv->RegDefaultAntenna == 0)
2860                 /* 0: default from EEPROM. */
2861                 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2862         else
2863                 /* 1: main, 2: aux. */
2864                 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna == 2) ? true : false);
2865
2866         /* rtl8185 can calc plcp len in HW. */
2867         priv->hw_plcp_len = 1;
2868
2869         priv->plcp_preamble_mode = 2;
2870         /* the eeprom type is stored in RCR register bit #6 */
2871         if (RCR_9356SEL & read_nic_dword(dev, RCR))
2872                 priv->epromtype = EPROM_93c56;
2873         else
2874                 priv->epromtype = EPROM_93c46;
2875
2876         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
2877                                dev->dev_addr, 3);
2878
2879         for (i = 1, j = 0; i < 14; i += 2, j++) {
2880                 eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
2881                 priv->chtxpwr[i] = word & 0xff;
2882                 priv->chtxpwr[i+1] = (word & 0xff00)>>8;
2883         }
2884         for (i = 1, j = 0; i < 14; i += 2, j++) {
2885                 eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
2886                 priv->chtxpwr_ofdm[i] = word & 0xff;
2887                 priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2888         }
2889
2890         /* 3Read crystal calibtration and thermal meter indication on 87SE. */
2891         eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
2892
2893         /* Crystal calibration for Xin and Xout resp. */
2894         priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
2895         priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
2896         if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
2897                 priv->bXtalCalibration = true;
2898
2899         /* Thermal meter reference indication. */
2900         priv->ThermalMeter =  (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
2901         if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2902                 priv->bTxPowerTrack = true;
2903
2904         eeprom_93cx6_read(&eeprom, EPROM_TXPW_BASE, &word);
2905         priv->cck_txpwr_base = word & 0xf;
2906         priv->ofdm_txpwr_base = (word>>4) & 0xf;
2907
2908         eeprom_93cx6_read(&eeprom, EPROM_VERSION, &version);
2909         DMESG("EEPROM version %x", version);
2910         priv->rcr_csense = 3;
2911
2912         eeprom_93cx6_read(&eeprom, ENERGY_TRESHOLD, &eeprom_val);
2913         priv->cs_treshold = (eeprom_val & 0xff00) >> 8;
2914
2915         eeprom_93cx6_read(&eeprom, RFCHIPID, &eeprom_val);
2916         priv->rf_sleep = rtl8225z4_rf_sleep;
2917         priv->rf_wakeup = rtl8225z4_rf_wakeup;
2918         DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
2919
2920         priv->rf_close = rtl8225z2_rf_close;
2921         priv->rf_init = rtl8225z2_rf_init;
2922         priv->rf_set_chan = rtl8225z2_rf_set_chan;
2923         priv->rf_set_sens = NULL;
2924
2925         if (0 != alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
2926                 return -ENOMEM;
2927
2928         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2929                                   TX_MANAGEPRIORITY_RING_ADDR))
2930                 return -ENOMEM;
2931
2932         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2933                                  TX_BKPRIORITY_RING_ADDR))
2934                 return -ENOMEM;
2935
2936         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2937                                  TX_BEPRIORITY_RING_ADDR))
2938                 return -ENOMEM;
2939
2940         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2941                                   TX_VIPRIORITY_RING_ADDR))
2942                 return -ENOMEM;
2943
2944         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2945                                   TX_VOPRIORITY_RING_ADDR))
2946                 return -ENOMEM;
2947
2948         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2949                                   TX_HIGHPRIORITY_RING_ADDR))
2950                 return -ENOMEM;
2951
2952         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
2953                                   TX_BEACON_RING_ADDR))
2954                 return -ENOMEM;
2955
2956         if (request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)) {
2957                 DMESGE("Error allocating IRQ %d", dev->irq);
2958                 return -1;
2959         } else {
2960                 priv->irq = dev->irq;
2961                 DMESG("IRQ %d", dev->irq);
2962         }
2963
2964         return 0;
2965 }
2966
2967 void rtl8180_no_hw_wep(struct net_device *dev)
2968 {
2969 }
2970
2971 void rtl8180_set_hw_wep(struct net_device *dev)
2972 {
2973         struct r8180_priv *priv = ieee80211_priv(dev);
2974         u8 pgreg;
2975         u8 security;
2976         u32 key0_word4;
2977
2978         pgreg = read_nic_byte(dev, PGSELECT);
2979         write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
2980
2981         key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
2982         key0_word4 &= ~0xff;
2983         key0_word4 |= priv->key0[3] & 0xff;
2984         write_nic_dword(dev, KEY0, (priv->key0[0]));
2985         write_nic_dword(dev, KEY0+4, (priv->key0[1]));
2986         write_nic_dword(dev, KEY0+4+4, (priv->key0[2]));
2987         write_nic_dword(dev, KEY0+4+4+4, (key0_word4));
2988
2989         security  = read_nic_byte(dev, SECURITY);
2990         security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
2991         security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
2992         security &= ~SECURITY_ENCRYP_MASK;
2993         security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
2994
2995         write_nic_byte(dev, SECURITY, security);
2996
2997         DMESG("key %x %x %x %x", read_nic_dword(dev, KEY0+4+4+4),
2998               read_nic_dword(dev, KEY0+4+4), read_nic_dword(dev, KEY0+4),
2999               read_nic_dword(dev, KEY0));
3000 }
3001
3002
3003 void rtl8185_rf_pins_enable(struct net_device *dev)
3004 {
3005         /* u16 tmp; */
3006         /* tmp = read_nic_word(dev, RFPinsEnable); */
3007         write_nic_word(dev, RFPinsEnable, 0x1fff); /* | tmp); */
3008 }
3009
3010 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
3011 {
3012         u8 conf3;
3013
3014         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3015
3016         conf3 = read_nic_byte(dev, CONFIG3);
3017         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
3018         write_nic_dword(dev, ANAPARAM2, a);
3019
3020         conf3 = read_nic_byte(dev, CONFIG3);
3021         write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3022         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3023 }
3024
3025 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
3026 {
3027         u8 conf3;
3028
3029         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3030
3031         conf3 = read_nic_byte(dev, CONFIG3);
3032         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
3033         write_nic_dword(dev, ANAPARAM, a);
3034
3035         conf3 = read_nic_byte(dev, CONFIG3);
3036         write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3037         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3038 }
3039
3040 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
3041 {
3042         write_nic_byte(dev, TX_ANTENNA, ant);
3043         force_pci_posting(dev);
3044         mdelay(1);
3045 }
3046
3047 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
3048 {
3049         u32 phyw;
3050
3051         adr |= 0x80;
3052
3053         phyw = ((data<<8) | adr);
3054
3055         /* Note that, we must write 0xff7c after 0x7d-0x7f to write BB register. */
3056         write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
3057         write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
3058         write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
3059         write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff)));
3060
3061         /* this is ok to fail when we write AGC table. check for AGC table might be
3062          * done by masking with 0x7f instead of 0xff
3063          */
3064         /* if (phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data, adr); */
3065 }
3066
3067 inline void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data)
3068 {
3069         data = data & 0xff;
3070         rtl8185_write_phy(dev, adr, data);
3071 }
3072
3073 void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
3074 {
3075         data = data & 0xff;
3076         rtl8185_write_phy(dev, adr, data | 0x10000);
3077 }
3078
3079 void rtl8185_set_rate(struct net_device *dev)
3080 {
3081         int i;
3082         u16 word;
3083         int basic_rate, min_rr_rate, max_rr_rate;
3084
3085         basic_rate = ieeerate2rtlrate(240);
3086         min_rr_rate = ieeerate2rtlrate(60);
3087         max_rr_rate = ieeerate2rtlrate(240);
3088
3089         write_nic_byte(dev, RESP_RATE,
3090                         max_rr_rate<<MAX_RESP_RATE_SHIFT | min_rr_rate<<MIN_RESP_RATE_SHIFT);
3091
3092         word  = read_nic_word(dev, BRSR);
3093         word &= ~BRSR_MBR_8185;
3094
3095         for (i = 0; i <= basic_rate; i++)
3096                 word |= (1<<i);
3097
3098         write_nic_word(dev, BRSR, word);
3099 }
3100
3101 void rtl8180_adapter_start(struct net_device *dev)
3102 {
3103         struct r8180_priv *priv = ieee80211_priv(dev);
3104
3105         rtl8180_rtx_disable(dev);
3106         rtl8180_reset(dev);
3107
3108         /* enable beacon timeout, beacon TX ok and err
3109          * LP tx ok and err, HP TX ok and err, NP TX ok and err,
3110          * RX ok and ERR, and GP timer
3111          */
3112         priv->irq_mask = 0x6fcf;
3113
3114         priv->dma_poll_mask = 0;
3115
3116         rtl8180_beacon_tx_disable(dev);
3117
3118         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3119         write_nic_dword(dev, MAC0, ((u32 *)dev->dev_addr)[0]);
3120         write_nic_word(dev, MAC4, ((u32 *)dev->dev_addr)[1] & 0xffff);
3121         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3122
3123         rtl8180_update_msr(dev);
3124
3125         /* These might be unnecessary since we do in rx_enable / tx_enable */
3126         fix_rx_fifo(dev);
3127         fix_tx_fifo(dev);
3128
3129         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3130
3131         /*
3132          * The following is very strange. seems to be that 1 means test mode,
3133          * but we need to acknolwledges the nic when a packet is ready
3134          * although we set it to 0
3135          */
3136
3137         write_nic_byte(dev,
3138                        CONFIG2, read_nic_byte(dev, CONFIG2) & ~\
3139                        (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
3140         /* ^the nic isn't in test mode */
3141         write_nic_byte(dev,
3142                        CONFIG2, read_nic_byte(dev, CONFIG2)|(1<<4));
3143
3144         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3145
3146         write_nic_dword(dev, INT_TIMEOUT, 0);
3147
3148         write_nic_byte(dev, WPA_CONFIG, 0);
3149
3150         rtl8180_no_hw_wep(dev);
3151
3152         rtl8185_set_rate(dev);
3153         write_nic_byte(dev, RATE_FALLBACK, 0x81);
3154
3155         write_nic_byte(dev, GP_ENABLE, read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
3156
3157         /* FIXME cfg 3 ClkRun enable - isn't it ReadOnly ? */
3158         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3159         write_nic_byte(dev, CONFIG3, read_nic_byte(dev, CONFIG3)
3160                        | (1 << CONFIG3_CLKRUN_SHIFT));
3161         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3162
3163         priv->rf_init(dev);
3164
3165         if (priv->rf_set_sens != NULL)
3166                 priv->rf_set_sens(dev, priv->sens);
3167         rtl8180_irq_enable(dev);
3168
3169         netif_start_queue(dev);
3170 }
3171
3172 /*
3173  * This configures registers for beacon tx and enables it via
3174  * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
3175  * be used to stop beacon transmission
3176  */
3177 void rtl8180_start_tx_beacon(struct net_device *dev)
3178 {
3179         u16 word;
3180
3181         DMESG("Enabling beacon TX");
3182         rtl8180_prepare_beacon(dev);
3183         rtl8180_irq_disable(dev);
3184         rtl8180_beacon_tx_enable(dev);
3185
3186         word = read_nic_word(dev, AtimWnd) & ~AtimWnd_AtimWnd;
3187         write_nic_word(dev, AtimWnd, word); /* word |= */
3188
3189         word  = read_nic_word(dev, BintrItv);
3190         word &= ~BintrItv_BintrItv;
3191         word |= 1000; /* priv->ieee80211->current_network.beacon_interval *
3192                 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
3193         // FIXME: check if correct ^^ worked with 0x3e8;
3194         */
3195         write_nic_word(dev, BintrItv, word);
3196
3197         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3198
3199         rtl8185b_irq_enable(dev);
3200 }
3201
3202 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
3203 {
3204         struct r8180_priv *priv = ieee80211_priv(dev);
3205
3206         return &priv->ieee80211->stats;
3207 }
3208
3209 /*
3210  * Change current and default preamble mode.
3211  */
3212 bool
3213 MgntActSet_802_11_PowerSaveMode(
3214         struct r8180_priv *priv,
3215         RT_PS_MODE              rtPsMode
3216 )
3217 {
3218         /* Currently, we do not change power save mode on IBSS mode. */
3219         if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3220                 return false;
3221
3222         priv->ieee80211->ps = rtPsMode;
3223
3224         return true;
3225 }
3226
3227 void LeisurePSEnter(struct r8180_priv *priv)
3228 {
3229         if (priv->bLeisurePs) {
3230                 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
3231                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST); /* IEEE80211_PS_ENABLE */
3232         }
3233 }
3234
3235 void LeisurePSLeave(struct r8180_priv *priv)
3236 {
3237         if (priv->bLeisurePs) {
3238                 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
3239                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
3240         }
3241 }
3242
3243 void rtl8180_hw_wakeup_wq(struct work_struct *work)
3244 {
3245         struct delayed_work *dwork = to_delayed_work(work);
3246         struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_wakeup_wq);
3247         struct net_device *dev = ieee->dev;
3248
3249         rtl8180_hw_wakeup(dev);
3250 }
3251
3252 void rtl8180_hw_sleep_wq(struct work_struct *work)
3253 {
3254         struct delayed_work *dwork = to_delayed_work(work);
3255         struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_sleep_wq);
3256         struct net_device *dev = ieee->dev;
3257
3258         rtl8180_hw_sleep_down(dev);
3259 }
3260
3261 static void MgntLinkKeepAlive(struct r8180_priv *priv)
3262 {
3263         if (priv->keepAliveLevel == 0)
3264                 return;
3265
3266         if (priv->ieee80211->state == IEEE80211_LINKED) {
3267                 /*
3268                  * Keep-Alive.
3269                  */
3270
3271                 if ((priv->keepAliveLevel == 2) ||
3272                         (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
3273                         priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast)
3274                         ) {
3275                         priv->link_detect.IdleCount++;
3276
3277                         /*
3278                          * Send a Keep-Alive packet packet to AP if we had been idle for a while.
3279                          */
3280                         if (priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1)) {
3281                                 priv->link_detect.IdleCount = 0;
3282                                 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
3283                         }
3284                 } else {
3285                         priv->link_detect.IdleCount = 0;
3286                 }
3287                 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
3288                 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
3289         }
3290 }
3291
3292 static u8 read_acadapter_file(char *filename);
3293
3294 void rtl8180_watch_dog(struct net_device *dev)
3295 {
3296         struct r8180_priv *priv = ieee80211_priv(dev);
3297         bool bEnterPS = false;
3298         bool bBusyTraffic = false;
3299         u32 TotalRxNum = 0;
3300         u16 SlotIndex = 0;
3301         u16 i = 0;
3302         if (priv->ieee80211->actscanning == false) {
3303                 if ((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn))
3304                         IPSEnter(dev);
3305         }
3306         /* YJ,add,080828,for link state check */
3307         if ((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)) {
3308                 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
3309                 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
3310                 for (i = 0; i < priv->link_detect.SlotNum; i++)
3311                         TotalRxNum += priv->link_detect.RxFrameNum[i];
3312
3313                 if (TotalRxNum == 0) {
3314                         priv->ieee80211->state = IEEE80211_ASSOCIATING;
3315                         queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
3316                 }
3317         }
3318
3319         /* YJ,add,080828,for KeepAlive */
3320         MgntLinkKeepAlive(priv);
3321
3322         /* YJ,add,080828,for LPS */
3323         if (priv->PowerProfile == POWER_PROFILE_BATTERY)
3324                 priv->bLeisurePs = true;
3325         else if (priv->PowerProfile == POWER_PROFILE_AC) {
3326                 LeisurePSLeave(priv);
3327                 priv->bLeisurePs = false;
3328         }
3329
3330         if (priv->ieee80211->state == IEEE80211_LINKED) {
3331                 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
3332                 if (priv->link_detect.NumRxOkInPeriod > 666 ||
3333                         priv->link_detect.NumTxOkInPeriod > 666) {
3334                         bBusyTraffic = true;
3335                 }
3336                 if (((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
3337                         || (priv->link_detect.NumRxOkInPeriod > 2)) {
3338                         bEnterPS = false;
3339                 } else
3340                         bEnterPS = true;
3341
3342                 if (bEnterPS)
3343                         LeisurePSEnter(priv);
3344                 else
3345                         LeisurePSLeave(priv);
3346         } else
3347                 LeisurePSLeave(priv);
3348         priv->link_detect.bBusyTraffic = bBusyTraffic;
3349         priv->link_detect.NumRxOkInPeriod = 0;
3350         priv->link_detect.NumTxOkInPeriod = 0;
3351         priv->ieee80211->NumRxDataInPeriod = 0;
3352         priv->ieee80211->NumRxBcnInPeriod = 0;
3353 }
3354
3355 int _rtl8180_up(struct net_device *dev)
3356 {
3357         struct r8180_priv *priv = ieee80211_priv(dev);
3358
3359         priv->up = 1;
3360
3361         DMESG("Bringing up iface");
3362         rtl8185b_adapter_start(dev);
3363         rtl8185b_rx_enable(dev);
3364         rtl8185b_tx_enable(dev);
3365         if (priv->bInactivePs) {
3366                 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3367                         IPSLeave(dev);
3368         }
3369         timer_rate_adaptive((unsigned long)dev);
3370         watch_dog_adaptive((unsigned long)dev);
3371         if (priv->bSwAntennaDiverity)
3372                         SwAntennaDiversityTimerCallback(dev);
3373         ieee80211_softmac_start_protocol(priv->ieee80211);
3374         return 0;
3375 }
3376
3377 int rtl8180_open(struct net_device *dev)
3378 {
3379         struct r8180_priv *priv = ieee80211_priv(dev);
3380         int ret;
3381
3382         down(&priv->wx_sem);
3383         ret = rtl8180_up(dev);
3384         up(&priv->wx_sem);
3385         return ret;
3386 }
3387
3388 int rtl8180_up(struct net_device *dev)
3389 {
3390         struct r8180_priv *priv = ieee80211_priv(dev);
3391
3392         if (priv->up == 1)
3393                 return -1;
3394
3395         return _rtl8180_up(dev);
3396 }
3397
3398 int rtl8180_close(struct net_device *dev)
3399 {
3400         struct r8180_priv *priv = ieee80211_priv(dev);
3401         int ret;
3402
3403         down(&priv->wx_sem);
3404         ret = rtl8180_down(dev);
3405         up(&priv->wx_sem);
3406
3407         return ret;
3408 }
3409
3410 int rtl8180_down(struct net_device *dev)
3411 {
3412         struct r8180_priv *priv = ieee80211_priv(dev);
3413
3414         if (priv->up == 0)
3415                 return -1;
3416
3417         priv->up = 0;
3418
3419         ieee80211_softmac_stop_protocol(priv->ieee80211);
3420         /* FIXME */
3421         if (!netif_queue_stopped(dev))
3422                 netif_stop_queue(dev);
3423         rtl8180_rtx_disable(dev);
3424         rtl8180_irq_disable(dev);
3425         del_timer_sync(&priv->watch_dog_timer);
3426         del_timer_sync(&priv->rateadapter_timer);
3427         cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3428         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3429         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3430         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3431         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3432         del_timer_sync(&priv->SwAntennaDiversityTimer);
3433         SetZebraRFPowerState8185(dev, eRfOff);
3434         memset(&(priv->ieee80211->current_network), 0, sizeof(struct ieee80211_network));
3435         priv->ieee80211->state = IEEE80211_NOLINK;
3436         return 0;
3437 }
3438
3439 void rtl8180_restart_wq(struct work_struct *work)
3440 {
3441         struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
3442         struct net_device *dev = priv->dev;
3443
3444         down(&priv->wx_sem);
3445
3446         rtl8180_commit(dev);
3447
3448         up(&priv->wx_sem);
3449 }
3450
3451 void rtl8180_restart(struct net_device *dev)
3452 {
3453         struct r8180_priv *priv = ieee80211_priv(dev);
3454
3455         schedule_work(&priv->reset_wq);
3456 }
3457
3458 void rtl8180_commit(struct net_device *dev)
3459 {
3460         struct r8180_priv *priv = ieee80211_priv(dev);
3461
3462         if (priv->up == 0)
3463                 return ;
3464
3465         del_timer_sync(&priv->watch_dog_timer);
3466         del_timer_sync(&priv->rateadapter_timer);
3467         cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3468         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3469         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3470         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3471         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3472         del_timer_sync(&priv->SwAntennaDiversityTimer);
3473         ieee80211_softmac_stop_protocol(priv->ieee80211);
3474         rtl8180_irq_disable(dev);
3475         rtl8180_rtx_disable(dev);
3476         _rtl8180_up(dev);
3477 }
3478
3479 static void r8180_set_multicast(struct net_device *dev)
3480 {
3481         struct r8180_priv *priv = ieee80211_priv(dev);
3482         short promisc;
3483
3484         promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3485
3486         if (promisc != priv->promisc)
3487                 rtl8180_restart(dev);
3488
3489         priv->promisc = promisc;
3490 }
3491
3492 int r8180_set_mac_adr(struct net_device *dev, void *mac)
3493 {
3494         struct r8180_priv *priv = ieee80211_priv(dev);
3495         struct sockaddr *addr = mac;
3496
3497         down(&priv->wx_sem);
3498
3499         memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3500
3501         if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
3502                 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
3503
3504         if (priv->up) {
3505                 rtl8180_down(dev);
3506                 rtl8180_up(dev);
3507         }
3508
3509         up(&priv->wx_sem);
3510
3511         return 0;
3512 }
3513
3514 /* based on ipw2200 driver */
3515 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3516 {
3517         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3518         struct iwreq *wrq = (struct iwreq *) rq;
3519         int ret = -1;
3520
3521         switch (cmd) {
3522         case RTL_IOCTL_WPA_SUPPLICANT:
3523                 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3524                 return ret;
3525         default:
3526                 return -EOPNOTSUPP;
3527         }
3528
3529         return -EOPNOTSUPP;
3530 }
3531
3532 static const struct net_device_ops rtl8180_netdev_ops = {
3533         .ndo_open               = rtl8180_open,
3534         .ndo_stop               = rtl8180_close,
3535         .ndo_get_stats          = rtl8180_stats,
3536         .ndo_tx_timeout         = rtl8180_restart,
3537         .ndo_do_ioctl           = rtl8180_ioctl,
3538         .ndo_set_multicast_list = r8180_set_multicast,
3539         .ndo_set_mac_address    = r8180_set_mac_adr,
3540         .ndo_validate_addr      = eth_validate_addr,
3541         .ndo_change_mtu         = eth_change_mtu,
3542         .ndo_start_xmit         = ieee80211_rtl_xmit,
3543 };
3544
3545 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
3546                                        const struct pci_device_id *id)
3547 {
3548         unsigned long ioaddr = 0;
3549         struct net_device *dev = NULL;
3550         struct r8180_priv *priv = NULL;
3551         u8 unit = 0;
3552
3553         unsigned long pmem_start, pmem_len, pmem_flags;
3554
3555         DMESG("Configuring chip resources");
3556
3557         if (pci_enable_device(pdev)) {
3558                 DMESG("Failed to enable PCI device");
3559                 return -EIO;
3560         }
3561
3562         pci_set_master(pdev);
3563         pci_set_dma_mask(pdev, 0xffffff00ULL);
3564         pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
3565         dev = alloc_ieee80211(sizeof(struct r8180_priv));
3566         if (!dev)
3567                 return -ENOMEM;
3568         priv = ieee80211_priv(dev);
3569         priv->ieee80211 = netdev_priv(dev);
3570
3571         pci_set_drvdata(pdev, dev);
3572         SET_NETDEV_DEV(dev, &pdev->dev);
3573
3574         priv = ieee80211_priv(dev);
3575         priv->pdev = pdev;
3576
3577         pmem_start = pci_resource_start(pdev, 1);
3578         pmem_len = pci_resource_len(pdev, 1);
3579         pmem_flags = pci_resource_flags(pdev, 1);
3580
3581         if (!(pmem_flags & IORESOURCE_MEM)) {
3582                 DMESG("region #1 not a MMIO resource, aborting");
3583                 goto fail;
3584         }
3585
3586         if (!request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
3587                 DMESG("request_mem_region failed!");
3588                 goto fail;
3589         }
3590
3591         ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len);
3592         if (ioaddr == (unsigned long)NULL) {
3593                 DMESG("ioremap failed!");
3594                 goto fail1;
3595         }
3596
3597         dev->mem_start = ioaddr; /* shared mem start */
3598         dev->mem_end = ioaddr + pci_resource_len(pdev, 0); /* shared mem end */
3599
3600         pci_read_config_byte(pdev, 0x05, &unit);
3601         pci_write_config_byte(pdev, 0x05, unit & (~0x04));
3602
3603         dev->irq = pdev->irq;
3604         priv->irq = 0;
3605
3606         dev->netdev_ops = &rtl8180_netdev_ops;
3607         dev->wireless_handlers = &r8180_wx_handlers_def;
3608
3609         dev->type = ARPHRD_ETHER;
3610         dev->watchdog_timeo = HZ*3;
3611
3612         if (dev_alloc_name(dev, ifname) < 0) {
3613                 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
3614                 ifname = "wlan%d";
3615                 dev_alloc_name(dev, ifname);
3616         }
3617
3618         if (rtl8180_init(dev) != 0) {
3619                 DMESG("Initialization failed");
3620                 goto fail1;
3621         }
3622
3623         netif_carrier_off(dev);
3624
3625         register_netdev(dev);
3626
3627         rtl8180_proc_init_one(dev);
3628
3629         DMESG("Driver probe completed\n");
3630         return 0;
3631 fail1:
3632         if (dev->mem_start != (unsigned long)NULL) {
3633                 iounmap((void *)dev->mem_start);
3634                 release_mem_region(pci_resource_start(pdev, 1),
3635                                    pci_resource_len(pdev, 1));
3636         }
3637 fail:
3638         if (dev) {
3639                 if (priv->irq) {
3640                         free_irq(dev->irq, dev);
3641                         dev->irq = 0;
3642                 }
3643                 free_ieee80211(dev);
3644         }
3645
3646         pci_disable_device(pdev);
3647
3648         DMESG("wlan driver load failed\n");
3649         pci_set_drvdata(pdev, NULL);
3650         return -ENODEV;
3651 }
3652
3653 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
3654 {
3655         struct r8180_priv *priv;
3656         struct net_device *dev = pci_get_drvdata(pdev);
3657
3658         if (dev) {
3659                 unregister_netdev(dev);
3660
3661                 priv = ieee80211_priv(dev);
3662
3663                 rtl8180_proc_remove_one(dev);
3664                 rtl8180_down(dev);
3665                 priv->rf_close(dev);
3666                 rtl8180_reset(dev);
3667                 mdelay(10);
3668
3669                 if (priv->irq) {
3670                         DMESG("Freeing irq %d", dev->irq);
3671                         free_irq(dev->irq, dev);
3672                         priv->irq = 0;
3673                 }
3674
3675                 free_rx_desc_ring(dev);
3676                 free_tx_desc_rings(dev);
3677
3678                 if (dev->mem_start != (unsigned long)NULL) {
3679                         iounmap((void *)dev->mem_start);
3680                         release_mem_region(pci_resource_start(pdev, 1),
3681                                            pci_resource_len(pdev, 1));
3682                 }
3683
3684                 free_ieee80211(dev);
3685         }
3686         pci_disable_device(pdev);
3687
3688         DMESG("wlan driver removed\n");
3689 }
3690
3691 /* fun with the built-in ieee80211 stack... */
3692 extern int ieee80211_crypto_init(void);
3693 extern void ieee80211_crypto_deinit(void);
3694 extern int ieee80211_crypto_tkip_init(void);
3695 extern void ieee80211_crypto_tkip_exit(void);
3696 extern int ieee80211_crypto_ccmp_init(void);
3697 extern void ieee80211_crypto_ccmp_exit(void);
3698 extern int ieee80211_crypto_wep_init(void);
3699 extern void ieee80211_crypto_wep_exit(void);
3700
3701 static int __init rtl8180_pci_module_init(void)
3702 {
3703         int ret;
3704
3705         ret = ieee80211_crypto_init();
3706         if (ret) {
3707                 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
3708                 return ret;
3709         }
3710         ret = ieee80211_crypto_tkip_init();
3711         if (ret) {
3712                 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
3713                 return ret;
3714         }
3715         ret = ieee80211_crypto_ccmp_init();
3716         if (ret) {
3717                 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
3718                 return ret;
3719         }
3720         ret = ieee80211_crypto_wep_init();
3721         if (ret) {
3722                 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
3723                 return ret;
3724         }
3725
3726         printk(KERN_INFO "\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3727         printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
3728         DMESG("Initializing module");
3729         DMESG("Wireless extensions version %d", WIRELESS_EXT);
3730         rtl8180_proc_module_init();
3731
3732       if (pci_register_driver(&rtl8180_pci_driver)) {
3733                 DMESG("No device found");
3734                 return -ENODEV;
3735         }
3736         return 0;
3737 }
3738
3739 static void __exit rtl8180_pci_module_exit(void)
3740 {
3741         pci_unregister_driver(&rtl8180_pci_driver);
3742         rtl8180_proc_module_remove();
3743         ieee80211_crypto_tkip_exit();
3744         ieee80211_crypto_ccmp_exit();
3745         ieee80211_crypto_wep_exit();
3746         ieee80211_crypto_deinit();
3747         DMESG("Exiting");
3748 }
3749
3750 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3751 {
3752         unsigned long flags;
3753         short enough_desc;
3754         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3755
3756         spin_lock_irqsave(&priv->tx_lock, flags);
3757         enough_desc = check_nic_enought_desc(dev, pri);
3758         spin_unlock_irqrestore(&priv->tx_lock, flags);
3759
3760         if (enough_desc)
3761                 ieee80211_rtl_wake_queue(priv->ieee80211);
3762 }
3763
3764 void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3765 {
3766         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3767         u32 *tail; /* tail virtual addr */
3768         u32 *head; /* head virtual addr */
3769         u32 *begin; /* start of ring virtual addr */
3770         u32 *nicv; /* nic pointer virtual addr */
3771         u32 nic; /* nic pointer physical addr */
3772         u32 nicbegin; /* start of ring physical addr */
3773         unsigned long flag;
3774         /* physical addr are ok on 32 bits since we set DMA mask */
3775         int offs;
3776         int j, i;
3777         int hd;
3778         if (error)
3779                 priv->stats.txretry++; /* tony 20060601 */
3780         spin_lock_irqsave(&priv->tx_lock, flag);
3781         switch (pri) {
3782         case MANAGE_PRIORITY:
3783                 tail = priv->txmapringtail;
3784                 begin = priv->txmapring;
3785                 head = priv->txmapringhead;
3786                 nic = read_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR);
3787                 nicbegin = priv->txmapringdma;
3788                 break;
3789         case BK_PRIORITY:
3790                 tail = priv->txbkpringtail;
3791                 begin = priv->txbkpring;
3792                 head = priv->txbkpringhead;
3793                 nic = read_nic_dword(dev, TX_BKPRIORITY_RING_ADDR);
3794                 nicbegin = priv->txbkpringdma;
3795                 break;
3796         case BE_PRIORITY:
3797                 tail = priv->txbepringtail;
3798                 begin = priv->txbepring;
3799                 head = priv->txbepringhead;
3800                 nic = read_nic_dword(dev, TX_BEPRIORITY_RING_ADDR);
3801                 nicbegin = priv->txbepringdma;
3802                 break;
3803         case VI_PRIORITY:
3804                 tail = priv->txvipringtail;
3805                 begin = priv->txvipring;
3806                 head = priv->txvipringhead;
3807                 nic = read_nic_dword(dev, TX_VIPRIORITY_RING_ADDR);
3808                 nicbegin = priv->txvipringdma;
3809                 break;
3810         case VO_PRIORITY:
3811                 tail = priv->txvopringtail;
3812                 begin = priv->txvopring;
3813                 head = priv->txvopringhead;
3814                 nic = read_nic_dword(dev, TX_VOPRIORITY_RING_ADDR);
3815                 nicbegin = priv->txvopringdma;
3816                 break;
3817         case HI_PRIORITY:
3818                 tail = priv->txhpringtail;
3819                 begin = priv->txhpring;
3820                 head = priv->txhpringhead;
3821                 nic = read_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR);
3822                 nicbegin = priv->txhpringdma;
3823                 break;
3824
3825         default:
3826                 spin_unlock_irqrestore(&priv->tx_lock, flag);
3827                 return ;
3828         }
3829
3830         nicv = (u32 *)((nic - nicbegin) + (u8*)begin);
3831         if ((head <= tail && (nicv > tail || nicv < head)) ||
3832                 (head > tail && (nicv > tail && nicv < head))) {
3833                         DMESGW("nic has lost pointer");
3834                         spin_unlock_irqrestore(&priv->tx_lock, flag);
3835                         rtl8180_restart(dev);
3836                         return;
3837                 }
3838
3839         /*
3840          * We check all the descriptors between the head and the nic,
3841          * but not the currently pointed by the nic (the next to be txed)
3842          * and the previous of the pointed (might be in process ??)
3843          */
3844         offs = (nic - nicbegin);
3845         offs = offs / 8 / 4;
3846         hd = (head - begin) / 8;
3847
3848         if (offs >= hd)
3849                 j = offs - hd;
3850         else
3851                 j = offs + (priv->txringcount-1-hd);
3852
3853         j -= 2;
3854         if (j < 0)
3855                 j = 0;
3856
3857         for (i = 0; i < j; i++) {
3858                 if ((*head) & (1<<31))
3859                         break;
3860                 if (((*head)&(0x10000000)) != 0) {
3861                         priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
3862                         if (!error)
3863                                 priv->NumTxOkTotal++;
3864                 }
3865
3866                 if (!error)
3867                         priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
3868
3869                 *head = *head & ~(1<<31);
3870
3871                 if ((head - begin)/8 == priv->txringcount-1)
3872                         head = begin;
3873                 else
3874                         head += 8;
3875         }
3876
3877         /*
3878          * The head has been moved to the last certainly TXed
3879          * (or at least processed by the nic) packet.
3880          * The driver take forcefully owning of all these packets
3881          * If the packet previous of the nic pointer has been
3882          * processed this doesn't matter: it will be checked
3883          * here at the next round. Anyway if no more packet are
3884          * TXed no memory leak occour at all.
3885          */
3886
3887         switch (pri) {
3888         case MANAGE_PRIORITY:
3889                 priv->txmapringhead = head;
3890
3891                 if (priv->ack_tx_to_ieee) {
3892                         if (rtl8180_is_tx_queue_empty(dev)) {
3893                                 priv->ack_tx_to_ieee = 0;
3894                                 ieee80211_ps_tx_ack(priv->ieee80211, !error);
3895                         }
3896                 }
3897                 break;
3898         case BK_PRIORITY:
3899                 priv->txbkpringhead = head;
3900                 break;
3901         case BE_PRIORITY:
3902                 priv->txbepringhead = head;
3903                 break;
3904         case VI_PRIORITY:
3905                 priv->txvipringhead = head;
3906                 break;
3907         case VO_PRIORITY:
3908                 priv->txvopringhead = head;
3909                 break;
3910         case HI_PRIORITY:
3911                 priv->txhpringhead = head;
3912                 break;
3913         }
3914
3915         spin_unlock_irqrestore(&priv->tx_lock, flag);
3916 }
3917
3918 void rtl8180_tx_irq_wq(struct work_struct *work)
3919 {
3920         struct delayed_work *dwork = to_delayed_work(work);
3921         struct ieee80211_device * ieee = (struct ieee80211_device *)
3922                 container_of(dwork, struct ieee80211_device, watch_dog_wq);
3923         struct net_device *dev = ieee->dev;
3924
3925         rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3926 }
3927 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3928 {
3929         struct net_device *dev = (struct net_device *) netdev;
3930         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3931         unsigned long flags;
3932         u32 inta;
3933
3934         /* We should return IRQ_NONE, but for now let me keep this */
3935         if (priv->irq_enabled == 0)
3936                 return IRQ_HANDLED;
3937
3938         spin_lock_irqsave(&priv->irq_th_lock, flags);
3939
3940         /* ISR: 4bytes */
3941         inta = read_nic_dword(dev, ISR); /* & priv->IntrMask; */
3942         write_nic_dword(dev, ISR, inta); /* reset int situation */
3943
3944         priv->stats.shints++;
3945
3946         if (!inta) {
3947                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3948                 return IRQ_HANDLED;
3949         /*
3950          * most probably we can safely return IRQ_NONE,
3951          * but for now is better to avoid problems
3952          */
3953         }
3954
3955         if (inta == 0xffff) {
3956                 /* HW disappared */
3957                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3958                 return IRQ_HANDLED;
3959         }
3960
3961         priv->stats.ints++;
3962
3963         if (!netif_running(dev)) {
3964                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3965                 return IRQ_HANDLED;
3966         }
3967
3968         if (inta & ISR_TimeOut)
3969                 write_nic_dword(dev, TimerInt, 0);
3970
3971         if (inta & ISR_TBDOK)
3972                 priv->stats.txbeacon++;
3973
3974         if (inta & ISR_TBDER)
3975                 priv->stats.txbeaconerr++;
3976
3977         if (inta & IMR_TMGDOK)
3978                 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3979
3980         if (inta & ISR_THPDER) {
3981                 priv->stats.txhperr++;
3982                 rtl8180_tx_isr(dev, HI_PRIORITY, 1);
3983                 priv->ieee80211->stats.tx_errors++;
3984         }
3985
3986         if (inta & ISR_THPDOK) { /* High priority tx ok */
3987                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
3988                 priv->stats.txhpokint++;
3989                 rtl8180_tx_isr(dev, HI_PRIORITY, 0);
3990         }
3991
3992         if (inta & ISR_RER)
3993                 priv->stats.rxerr++;
3994
3995         if (inta & ISR_TBKDER) { /* corresponding to BK_PRIORITY */
3996                 priv->stats.txbkperr++;
3997                 priv->ieee80211->stats.tx_errors++;
3998                 rtl8180_tx_isr(dev, BK_PRIORITY, 1);
3999                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4000         }
4001
4002         if (inta & ISR_TBEDER) { /* corresponding to BE_PRIORITY */
4003                 priv->stats.txbeperr++;
4004                 priv->ieee80211->stats.tx_errors++;
4005                 rtl8180_tx_isr(dev, BE_PRIORITY, 1);
4006                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4007         }
4008         if (inta & ISR_TNPDER) { /* corresponding to VO_PRIORITY */
4009                 priv->stats.txnperr++;
4010                 priv->ieee80211->stats.tx_errors++;
4011                 rtl8180_tx_isr(dev, NORM_PRIORITY, 1);
4012                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
4013         }
4014
4015         if (inta & ISR_TLPDER) { /* corresponding to VI_PRIORITY */
4016                 priv->stats.txlperr++;
4017                 priv->ieee80211->stats.tx_errors++;
4018                 rtl8180_tx_isr(dev, LOW_PRIORITY, 1);
4019                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
4020         }
4021
4022         if (inta & ISR_ROK) {
4023                 priv->stats.rxint++;
4024                 tasklet_schedule(&priv->irq_rx_tasklet);
4025         }
4026
4027         if (inta & ISR_RQoSOK) {
4028                 priv->stats.rxint++;
4029                 tasklet_schedule(&priv->irq_rx_tasklet);
4030         }
4031
4032         if (inta & ISR_BcnInt)
4033                 rtl8180_prepare_beacon(dev);
4034
4035         if (inta & ISR_RDU) {
4036                 DMESGW("No RX descriptor available");
4037                 priv->stats.rxrdu++;
4038                 tasklet_schedule(&priv->irq_rx_tasklet);
4039         }
4040
4041         if (inta & ISR_RXFOVW) {
4042                 priv->stats.rxoverflow++;
4043                 tasklet_schedule(&priv->irq_rx_tasklet);
4044         }
4045
4046         if (inta & ISR_TXFOVW)
4047                 priv->stats.txoverflow++;
4048
4049         if (inta & ISR_TNPDOK) { /* Normal priority tx ok */
4050                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4051                 priv->stats.txnpokint++;
4052                 rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
4053         }
4054
4055         if (inta & ISR_TLPDOK) { /* Low priority tx ok */
4056                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4057                 priv->stats.txlpokint++;
4058                 rtl8180_tx_isr(dev, LOW_PRIORITY, 0);
4059                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
4060         }
4061
4062         if (inta & ISR_TBKDOK) { /* corresponding to BK_PRIORITY */
4063                 priv->stats.txbkpokint++;
4064                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4065                 rtl8180_tx_isr(dev, BK_PRIORITY, 0);
4066                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4067         }
4068
4069         if (inta & ISR_TBEDOK) { /* corresponding to BE_PRIORITY */
4070                 priv->stats.txbeperr++;
4071                 priv->link_detect.NumTxOkInPeriod++; /* YJ,add,080828 */
4072                 rtl8180_tx_isr(dev, BE_PRIORITY, 0);
4073                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4074         }
4075         force_pci_posting(dev);
4076         spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4077
4078         return IRQ_HANDLED;
4079 }
4080
4081 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
4082 {
4083         rtl8180_rx(priv->dev);
4084 }
4085
4086 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
4087 {
4088         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
4089         struct net_device *dev = ieee->dev;
4090         struct r8180_priv *priv = ieee80211_priv(dev);
4091         u8 btPSR;
4092         u8 btConfig0;
4093         RT_RF_POWER_STATE       eRfPowerStateToSet;
4094         bool bActuallySet = false;
4095
4096         char *argv[3];
4097         static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
4098         static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
4099         static int readf_count = 0;
4100
4101         if (readf_count % 10 == 0)
4102                 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
4103
4104         readf_count = (readf_count+1)%0xffff;
4105         /* We should turn off LED before polling FF51[4]. */
4106
4107         /* Turn off LED. */
4108         btPSR = read_nic_byte(dev, PSR);
4109         write_nic_byte(dev, PSR, (btPSR & ~BIT3));
4110
4111         /* It need to delay 4us suggested by Jong, 2008-01-16 */
4112         udelay(4);
4113
4114         /* HW radio On/Off according to the value of FF51[4](config0) */
4115         btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
4116
4117         eRfPowerStateToSet = (btConfig0 & BIT4) ?  eRfOn : eRfOff;
4118
4119         /* Turn LED back on when radio enabled */
4120         if (eRfPowerStateToSet == eRfOn)
4121                 write_nic_byte(dev, PSR, btPSR | BIT3);
4122
4123         if ((priv->ieee80211->bHwRadioOff == true) &&
4124            (eRfPowerStateToSet == eRfOn)) {
4125                 priv->ieee80211->bHwRadioOff = false;
4126                 bActuallySet = true;
4127         } else if ((priv->ieee80211->bHwRadioOff == false) &&
4128                   (eRfPowerStateToSet == eRfOff)) {
4129                 priv->ieee80211->bHwRadioOff = true;
4130                 bActuallySet = true;
4131         }
4132
4133         if (bActuallySet) {
4134                 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
4135
4136                 /* To update the UI status for Power status changed */
4137                 if (priv->ieee80211->bHwRadioOff == true)
4138                         argv[1] = "RFOFF";
4139                 else
4140                         argv[1] = "RFON";
4141                 argv[0] = RadioPowerPath;
4142                 argv[2] = NULL;
4143
4144                 call_usermodehelper(RadioPowerPath, argv, envp, 1);
4145         }
4146 }
4147
4148 static u8 read_acadapter_file(char *filename)
4149 {
4150         return 0;
4151 }
4152
4153 module_init(rtl8180_pci_module_init);
4154 module_exit(rtl8180_pci_module_exit);