drivers/staging/rtl8187se/r8180_core.c

   1 /*
   2    This is part of rtl818x pci OpenSource driver - v 0.1
   3    Copyright (C) Andrea Merello 2004-2005  <andreamrl@tiscali.it>
   4    Released under the terms of GPL (General Public License)
   5
   6    Parts of this driver are based on the GPL part of the official
   7    Realtek driver.
   8
   9    Parts of this driver are based on the rtl8180 driver skeleton
  10    from Patric Schenke & Andres Salomon.
  11
  12    Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver.
  13
  14    Parts of BB/RF code are derived from David Young rtl8180 netbsd driver.
  15
  16    RSSI calc function from 'The Deuce'
  17
  18    Some ideas borrowed from the 8139too.c driver included in linux kernel.
  19
  20    We (I?) want to thanks the Authors of those projecs and also the
  21    Ndiswrapper's project Authors.
  22
  23    A big big thanks goes also to Realtek corp. for their help in my attempt to
  24    add RTL8185 and RTL8225 support, and to David Young also.
  25
  26    Power management interface routines.
  27    Written by Mariusz Matuszek.
  28 */
  29
  30 #undef RX_DONT_PASS_UL
  31 #undef DUMMY_RX
  32
  33 #include <linux/slab.h>
  34 #include <linux/syscalls.h>
  35 #include <linux/eeprom_93cx6.h>
  36
  37 #include "r8180_hw.h"
  38 #include "r8180.h"
  39 #include "r8180_rtl8225.h" /* RTL8225 Radio frontend */
  40 #include "r8180_93cx6.h"   /* Card EEPROM */
  41 #include "r8180_wx.h"
  42 #include "r8180_dm.h"
  43
  44 #include "ieee80211/dot11d.h"
  45
  46 static struct pci_device_id rtl8180_pci_id_tbl[] __devinitdata = {
  47         {
  48                 .vendor = PCI_VENDOR_ID_REALTEK,
  49                 .device = 0x8199,
  50                 .subvendor = PCI_ANY_ID,
  51                 .subdevice = PCI_ANY_ID,
  52                 .driver_data = 0,
  53         },
  54         {
  55                 .vendor = 0,
  56                 .device = 0,
  57                 .subvendor = 0,
  58                 .subdevice = 0,
  59                 .driver_data = 0,
  60         }
  61 };
  62
  63
  64 static char *ifname = "wlan%d";
  65 static int hwseqnum = 0;
  66 static int hwwep = 0;
  67 static int channels = 0x3fff;
  68
  69 #define eqMacAddr(a, b)         (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0)
  70 #define cpMacAddr(des, src)             ((des)[0] = (src)[0], (des)[1] = (src)[1], (des)[2] = (src)[2], (des)[3] = (src)[3], (des)[4] = (src)[4], (des)[5] = (src)[5])
  71 MODULE_LICENSE("GPL");
  72 MODULE_DEVICE_TABLE(pci, rtl8180_pci_id_tbl);
  73 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  74 MODULE_DESCRIPTION("Linux driver for Realtek RTL8180 / RTL8185 WiFi cards");
  75
  76
  77 module_param(ifname, charp, S_IRUGO|S_IWUSR);
  78 module_param(hwseqnum, int, S_IRUGO|S_IWUSR);
  79 module_param(hwwep, int, S_IRUGO|S_IWUSR);
  80 module_param(channels, int, S_IRUGO|S_IWUSR);
  81
  82 MODULE_PARM_DESC(devname, " Net interface name, wlan%d=default");
  83 MODULE_PARM_DESC(hwseqnum, " Try to use hardware 802.11 header sequence numbers. Zero=default");
  84 MODULE_PARM_DESC(hwwep, " Try to use hardware WEP support. Still broken and not available on all cards");
  85 MODULE_PARM_DESC(channels, " Channel bitmask for specific locales. NYI");
  86
  87
  88 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
  89                                        const struct pci_device_id *id);
  90
  91 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev);
  92
  93 static void rtl8180_shutdown(struct pci_dev *pdev)
  94 {
  95         struct net_device *dev = pci_get_drvdata(pdev);
  96         if (dev->netdev_ops->ndo_stop)
  97                 dev->netdev_ops->ndo_stop(dev);
  98         pci_disable_device(pdev);
  99 }
 100
 101 static int rtl8180_suspend(struct pci_dev *pdev, pm_message_t state)
 102 {
 103         struct net_device *dev = pci_get_drvdata(pdev);
 104
 105         if (!netif_running(dev))
 106                 goto out_pci_suspend;
 107
 108         if (dev->netdev_ops->ndo_stop)
 109                 dev->netdev_ops->ndo_stop(dev);
 110
 111         netif_device_detach(dev);
 112
 113 out_pci_suspend:
 114         pci_save_state(pdev);
 115         pci_disable_device(pdev);
 116         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 117         return 0;
 118 }
 119
 120 static int rtl8180_resume(struct pci_dev *pdev)
 121 {
 122         struct net_device *dev = pci_get_drvdata(pdev);
 123         int err;
 124         u32 val;
 125
 126         pci_set_power_state(pdev, PCI_D0);
 127
 128         err = pci_enable_device(pdev);
 129         if (err) {
 130                 printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
 131                                 dev->name);
 132
 133                 return err;
 134         }
 135
 136         pci_restore_state(pdev);
 137
 138         /*
 139          * Suspend/Resume resets the PCI configuration space, so we have to
 140          * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
 141          * from interfering with C3 CPU state. pci_restore_state won't help
 142          * here since it only restores the first 64 bytes pci config header.
 143          */
 144         pci_read_config_dword(pdev, 0x40, &val);
 145         if ((val & 0x0000ff00) != 0)
 146                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
 147
 148         if (!netif_running(dev))
 149                 goto out;
 150
 151         if (dev->netdev_ops->ndo_open)
 152                 dev->netdev_ops->ndo_open(dev);
 153
 154         netif_device_attach(dev);
 155 out:
 156         return 0;
 157 }
 158
 159 static struct pci_driver rtl8180_pci_driver = {
 160         .name           = RTL8180_MODULE_NAME,
 161         .id_table       = rtl8180_pci_id_tbl,
 162         .probe          = rtl8180_pci_probe,
 163         .remove         = __devexit_p(rtl8180_pci_remove),
 164         .suspend        = rtl8180_suspend,
 165         .resume         = rtl8180_resume,
 166         .shutdown       = rtl8180_shutdown,
 167 };
 168
 169 u8 read_nic_byte(struct net_device *dev, int x)
 170 {
 171         return 0xff&readb((u8 *)dev->mem_start + x);
 172 }
 173
 174 u32 read_nic_dword(struct net_device *dev, int x)
 175 {
 176         return readl((u8 *)dev->mem_start + x);
 177 }
 178
 179 u16 read_nic_word(struct net_device *dev, int x)
 180 {
 181         return readw((u8 *)dev->mem_start + x);
 182 }
 183
 184 void write_nic_byte(struct net_device *dev, int x, u8 y)
 185 {
 186         writeb(y, (u8 *)dev->mem_start + x);
 187         udelay(20);
 188 }
 189
 190 void write_nic_dword(struct net_device *dev, int x, u32 y)
 191 {
 192         writel(y, (u8 *)dev->mem_start + x);
 193         udelay(20);
 194 }
 195
 196 void write_nic_word(struct net_device *dev, int x, u16 y)
 197 {
 198         writew(y, (u8 *)dev->mem_start + x);
 199         udelay(20);
 200 }
 201
 202 inline void force_pci_posting(struct net_device *dev)
 203 {
 204         read_nic_byte(dev, EPROM_CMD);
 205         mb();
 206 }
 207
 208 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs);
 209 void set_nic_rxring(struct net_device *dev);
 210 void set_nic_txring(struct net_device *dev);
 211 static struct net_device_stats *rtl8180_stats(struct net_device *dev);
 212 void rtl8180_commit(struct net_device *dev);
 213 void rtl8180_start_tx_beacon(struct net_device *dev);
 214
 215 static struct proc_dir_entry *rtl8180_proc = NULL;
 216
 217 static int proc_get_registers(char *page, char **start,
 218                           off_t offset, int count,
 219                           int *eof, void *data)
 220 {
 221         struct net_device *dev = data;
 222         int len = 0;
 223         int i, n;
 224         int max = 0xff;
 225
 226         /* This dump the current register page */
 227         for (n = 0; n <= max;) {
 228                 len += snprintf(page + len, count - len, "\nD:  %2x > ", n);
 229
 230                 for (i = 0; i < 16 && n <= max; i++, n++)
 231                         len += snprintf(page + len, count - len, "%2x ",
 232                                         read_nic_byte(dev, n));
 233         }
 234         len += snprintf(page + len, count - len, "\n");
 235
 236         *eof = 1;
 237         return len;
 238 }
 239
 240 int get_curr_tx_free_desc(struct net_device *dev, int priority);
 241
 242 static int proc_get_stats_hw(char *page, char **start,
 243                           off_t offset, int count,
 244                           int *eof, void *data)
 245 {
 246         int len = 0;
 247
 248         *eof = 1;
 249         return len;
 250 }
 251
 252 static int proc_get_stats_rx(char *page, char **start,
 253                           off_t offset, int count,
 254                           int *eof, void *data)
 255 {
 256         struct net_device *dev = data;
 257         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 258
 259         int len = 0;
 260
 261         len += snprintf(page + len, count - len,
 262                 "RX OK: %lu\n"
 263                 "RX Retry: %lu\n"
 264                 "RX CRC Error(0-500): %lu\n"
 265                 "RX CRC Error(500-1000): %lu\n"
 266                 "RX CRC Error(>1000): %lu\n"
 267                 "RX ICV Error: %lu\n",
 268                 priv->stats.rxint,
 269                 priv->stats.rxerr,
 270                 priv->stats.rxcrcerrmin,
 271                 priv->stats.rxcrcerrmid,
 272                 priv->stats.rxcrcerrmax,
 273                 priv->stats.rxicverr
 274                 );
 275
 276         *eof = 1;
 277         return len;
 278 }
 279
 280 static int proc_get_stats_tx(char *page, char **start,
 281                           off_t offset, int count,
 282                           int *eof, void *data)
 283 {
 284         struct net_device *dev = data;
 285         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 286
 287         int len = 0;
 288         unsigned long totalOK;
 289
 290         totalOK = priv->stats.txnpokint+priv->stats.txhpokint+priv->stats.txlpokint;
 291         len += snprintf(page + len, count - len,
 292                 "TX OK: %lu\n"
 293                 "TX Error: %lu\n"
 294                 "TX Retry: %lu\n"
 295                 "TX beacon OK: %lu\n"
 296                 "TX beacon error: %lu\n",
 297                 totalOK,
 298                 priv->stats.txnperr+priv->stats.txhperr+priv->stats.txlperr,
 299                 priv->stats.txretry,
 300                 priv->stats.txbeacon,
 301                 priv->stats.txbeaconerr
 302         );
 303
 304         *eof = 1;
 305         return len;
 306 }
 307
 308 void rtl8180_proc_module_init(void)
 309 {
 310         DMESG("Initializing proc filesystem");
 311         rtl8180_proc = create_proc_entry(RTL8180_MODULE_NAME, S_IFDIR, init_net.proc_net);
 312 }
 313
 314 void rtl8180_proc_module_remove(void)
 315 {
 316         remove_proc_entry(RTL8180_MODULE_NAME, init_net.proc_net);
 317 }
 318
 319 void rtl8180_proc_remove_one(struct net_device *dev)
 320 {
 321         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 322         if (priv->dir_dev) {
 323                 remove_proc_entry("stats-hw", priv->dir_dev);
 324                 remove_proc_entry("stats-tx", priv->dir_dev);
 325                 remove_proc_entry("stats-rx", priv->dir_dev);
 326                 remove_proc_entry("registers", priv->dir_dev);
 327                 remove_proc_entry(dev->name, rtl8180_proc);
 328                 priv->dir_dev = NULL;
 329         }
 330 }
 331
 332 void rtl8180_proc_init_one(struct net_device *dev)
 333 {
 334         struct proc_dir_entry *e;
 335         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 336
 337         priv->dir_dev = rtl8180_proc;
 338         if (!priv->dir_dev) {
 339                 DMESGE("Unable to initialize /proc/net/r8180/%s\n",
 340                       dev->name);
 341                 return;
 342         }
 343
 344         e = create_proc_read_entry("stats-hw", S_IFREG | S_IRUGO,
 345                                    priv->dir_dev, proc_get_stats_hw, dev);
 346         if (!e) {
 347                 DMESGE("Unable to initialize "
 348                       "/proc/net/r8180/%s/stats-hw\n",
 349                       dev->name);
 350         }
 351
 352         e = create_proc_read_entry("stats-rx", S_IFREG | S_IRUGO,
 353                                    priv->dir_dev, proc_get_stats_rx, dev);
 354         if (!e) {
 355                 DMESGE("Unable to initialize "
 356                       "/proc/net/r8180/%s/stats-rx\n",
 357                       dev->name);
 358         }
 359
 360
 361         e = create_proc_read_entry("stats-tx", S_IFREG | S_IRUGO,
 362                                    priv->dir_dev, proc_get_stats_tx, dev);
 363         if (!e) {
 364                 DMESGE("Unable to initialize "
 365                       "/proc/net/r8180/%s/stats-tx\n",
 366                       dev->name);
 367         }
 368
 369         e = create_proc_read_entry("registers", S_IFREG | S_IRUGO,
 370                                    priv->dir_dev, proc_get_registers, dev);
 371         if (!e) {
 372                 DMESGE("Unable to initialize "
 373                       "/proc/net/r8180/%s/registers\n",
 374                       dev->name);
 375         }
 376 }
 377
 378 /*
 379   FIXME: check if we can use some standard already-existent
 380   data type+functions in kernel
 381 */
 382
 383 short buffer_add(struct buffer **buffer, u32 *buf, dma_addr_t dma,
 384                 struct buffer **bufferhead)
 385 {
 386         struct buffer *tmp;
 387
 388         if (!*buffer) {
 389
 390                 *buffer = kmalloc(sizeof(struct buffer), GFP_KERNEL);
 391
 392                 if (*buffer == NULL) {
 393                         DMESGE("Failed to kmalloc head of TX/RX struct");
 394                         return -1;
 395                 }
 396                 (*buffer)->next = *buffer;
 397                 (*buffer)->buf = buf;
 398                 (*buffer)->dma = dma;
 399                 if (bufferhead != NULL)
 400                         (*bufferhead) = (*buffer);
 401                 return 0;
 402         }
 403         tmp = *buffer;
 404
 405         while (tmp->next != (*buffer))
 406                 tmp = tmp->next;
 407         tmp->next = kmalloc(sizeof(struct buffer), GFP_KERNEL);
 408         if (tmp->next == NULL) {
 409                 DMESGE("Failed to kmalloc TX/RX struct");
 410                 return -1;
 411         }
 412         tmp->next->buf = buf;
 413         tmp->next->dma = dma;
 414         tmp->next->next = *buffer;
 415
 416         return 0;
 417 }
 418
 419 void buffer_free(struct net_device *dev, struct buffer **buffer, int len, short consistent)
 420 {
 421
 422         struct buffer *tmp, *next;
 423         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 424         struct pci_dev *pdev = priv->pdev;
 425
 426         if (!*buffer)
 427                 return;
 428
 429         tmp = *buffer;
 430
 431         do {
 432                 next = tmp->next;
 433                 if (consistent) {
 434                         pci_free_consistent(pdev, len,
 435                                     tmp->buf, tmp->dma);
 436                 } else {
 437                         pci_unmap_single(pdev, tmp->dma,
 438                         len, PCI_DMA_FROMDEVICE);
 439                         kfree(tmp->buf);
 440                 }
 441                 kfree(tmp);
 442                 tmp = next;
 443         }
 444         while (next != *buffer);
 445
 446         *buffer = NULL;
 447 }
 448
 449 void print_buffer(u32 *buffer, int len)
 450 {
 451         int i;
 452         u8 *buf = (u8 *)buffer;
 453
 454         printk("ASCII BUFFER DUMP (len: %x):\n", len);
 455
 456         for (i = 0; i < len; i++)
 457                 printk("%c", buf[i]);
 458
 459         printk("\nBINARY BUFFER DUMP (len: %x):\n", len);
 460
 461         for (i = 0; i < len; i++)
 462                 printk("%02x", buf[i]);
 463
 464         printk("\n");
 465 }
 466
 467 int get_curr_tx_free_desc(struct net_device *dev, int priority)
 468 {
 469         struct r8180_priv *priv = ieee80211_priv(dev);
 470         u32 *tail;
 471         u32 *head;
 472         int ret;
 473
 474         switch (priority) {
 475         case MANAGE_PRIORITY:
 476                 head = priv->txmapringhead;
 477                 tail = priv->txmapringtail;
 478                 break;
 479         case BK_PRIORITY:
 480                 head = priv->txbkpringhead;
 481                 tail = priv->txbkpringtail;
 482                 break;
 483         case BE_PRIORITY:
 484                 head = priv->txbepringhead;
 485                 tail = priv->txbepringtail;
 486                 break;
 487         case VI_PRIORITY:
 488                 head = priv->txvipringhead;
 489                 tail = priv->txvipringtail;
 490                 break;
 491         case VO_PRIORITY:
 492                 head = priv->txvopringhead;
 493                 tail = priv->txvopringtail;
 494                 break;
 495         case HI_PRIORITY:
 496                 head = priv->txhpringhead;
 497                 tail = priv->txhpringtail;
 498                 break;
 499         default:
 500                 return -1;
 501         }
 502
 503         if (head <= tail)
 504                 ret = priv->txringcount - (tail - head)/8;
 505         else
 506                 ret = (head - tail)/8;
 507
 508         if (ret > priv->txringcount)
 509                 DMESG("BUG");
 510
 511         return ret;
 512 }
 513
 514 short check_nic_enought_desc(struct net_device *dev, int priority)
 515 {
 516         struct r8180_priv *priv = ieee80211_priv(dev);
 517         struct ieee80211_device *ieee = netdev_priv(dev);
 518         int requiredbyte, required;
 519
 520         requiredbyte = priv->ieee80211->fts + sizeof(struct ieee80211_header_data);
 521
 522         if (ieee->current_network.QoS_Enable)
 523                 requiredbyte += 2;
 524
 525         required = requiredbyte / (priv->txbuffsize-4);
 526
 527         if (requiredbyte % priv->txbuffsize)
 528                 required++;
 529
 530         /* for now we keep two free descriptor as a safety boundary
 531          * between the tail and the head
 532          */
 533
 534         return (required+2 < get_curr_tx_free_desc(dev, priority));
 535 }
 536
 537 void fix_tx_fifo(struct net_device *dev)
 538 {
 539         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 540         u32 *tmp;
 541         int i;
 542
 543         for (tmp = priv->txmapring, i = 0;
 544              i < priv->txringcount;
 545              tmp += 8, i++) {
 546                 *tmp = *tmp & ~(1<<31);
 547         }
 548
 549         for (tmp = priv->txbkpring, i = 0;
 550              i < priv->txringcount;
 551              tmp += 8, i++) {
 552                 *tmp = *tmp & ~(1<<31);
 553         }
 554
 555         for (tmp = priv->txbepring, i = 0;
 556              i < priv->txringcount;
 557              tmp += 8, i++) {
 558                 *tmp = *tmp & ~(1<<31);
 559         }
 560         for (tmp = priv->txvipring, i = 0;
 561              i < priv->txringcount;
 562              tmp += 8, i++) {
 563                 *tmp = *tmp & ~(1<<31);
 564         }
 565
 566         for (tmp = priv->txvopring, i = 0;
 567              i < priv->txringcount;
 568              tmp += 8, i++) {
 569                 *tmp = *tmp & ~(1<<31);
 570         }
 571
 572         for (tmp = priv->txhpring, i = 0;
 573              i < priv->txringcount;
 574              tmp += 8, i++) {
 575                 *tmp = *tmp & ~(1<<31);
 576         }
 577
 578         for (tmp = priv->txbeaconring, i = 0;
 579              i < priv->txbeaconcount;
 580              tmp += 8, i++) {
 581                 *tmp = *tmp & ~(1<<31);
 582         }
 583
 584         priv->txmapringtail = priv->txmapring;
 585         priv->txmapringhead = priv->txmapring;
 586         priv->txmapbufstail = priv->txmapbufs;
 587
 588         priv->txbkpringtail = priv->txbkpring;
 589         priv->txbkpringhead = priv->txbkpring;
 590         priv->txbkpbufstail = priv->txbkpbufs;
 591
 592         priv->txbepringtail = priv->txbepring;
 593         priv->txbepringhead = priv->txbepring;
 594         priv->txbepbufstail = priv->txbepbufs;
 595
 596         priv->txvipringtail = priv->txvipring;
 597         priv->txvipringhead = priv->txvipring;
 598         priv->txvipbufstail = priv->txvipbufs;
 599
 600         priv->txvopringtail = priv->txvopring;
 601         priv->txvopringhead = priv->txvopring;
 602         priv->txvopbufstail = priv->txvopbufs;
 603
 604         priv->txhpringtail = priv->txhpring;
 605         priv->txhpringhead = priv->txhpring;
 606         priv->txhpbufstail = priv->txhpbufs;
 607
 608         priv->txbeaconringtail = priv->txbeaconring;
 609         priv->txbeaconbufstail = priv->txbeaconbufs;
 610         set_nic_txring(dev);
 611
 612         ieee80211_reset_queue(priv->ieee80211);
 613         priv->ack_tx_to_ieee = 0;
 614 }
 615
 616 void fix_rx_fifo(struct net_device *dev)
 617 {
 618         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 619         u32 *tmp;
 620         struct buffer *rxbuf;
 621         u8 rx_desc_size;
 622
 623         rx_desc_size = 8; // 4*8 = 32 bytes
 624
 625         for (tmp = priv->rxring, rxbuf = priv->rxbufferhead;
 626              (tmp < (priv->rxring)+(priv->rxringcount)*rx_desc_size);
 627              tmp += rx_desc_size, rxbuf = rxbuf->next) {
 628                 *(tmp+2) = rxbuf->dma;
 629                 *tmp = *tmp & ~0xfff;
 630                 *tmp = *tmp | priv->rxbuffersize;
 631                 *tmp |= (1<<31);
 632         }
 633
 634         priv->rxringtail = priv->rxring;
 635         priv->rxbuffer = priv->rxbufferhead;
 636         priv->rx_skb_complete = 1;
 637         set_nic_rxring(dev);
 638 }
 639
 640 unsigned char QUALITY_MAP[] = {
 641         0x64, 0x64, 0x64, 0x63, 0x63, 0x62, 0x62, 0x61,
 642         0x61, 0x60, 0x60, 0x5f, 0x5f, 0x5e, 0x5d, 0x5c,
 643         0x5b, 0x5a, 0x59, 0x57, 0x56, 0x54, 0x52, 0x4f,
 644         0x4c, 0x49, 0x45, 0x41, 0x3c, 0x37, 0x31, 0x29,
 645         0x24, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
 646         0x22, 0x22, 0x21, 0x21, 0x21, 0x21, 0x21, 0x20,
 647         0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1e, 0x1e, 0x1e,
 648         0x1d, 0x1d, 0x1c, 0x1c, 0x1b, 0x1a, 0x19, 0x19,
 649         0x18, 0x17, 0x16, 0x15, 0x14, 0x12, 0x11, 0x0f,
 650         0x0e, 0x0c, 0x0a, 0x08, 0x06, 0x04, 0x01, 0x00
 651 };
 652
 653 unsigned char STRENGTH_MAP[] = {
 654         0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
 655         0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
 656         0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
 657         0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
 658         0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
 659         0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
 660         0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
 661         0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
 662         0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
 663         0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02, 0x00
 664 };
 665
 666 void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual)
 667 {
 668         u32 temp;
 669         u32 temp2;
 670         u32 q;
 671         u32 orig_qual;
 672         u8  _rssi;
 673
 674         q = *qual;
 675         orig_qual = *qual;
 676         _rssi = 0; // avoid gcc complains..
 677
 678         if (q <= 0x4e) {
 679                 temp = QUALITY_MAP[q];
 680         } else {
 681                 if (q & 0x80)
 682                         temp = 0x32;
 683                 else
 684                         temp = 1;
 685         }
 686
 687         *qual = temp;
 688         temp2 = *rssi;
 689
 690         if (_rssi < 0x64) {
 691                 if (_rssi == 0)
 692                         *rssi = 1;
 693         } else {
 694                 *rssi = 0x64;
 695         }
 696
 697         return;
 698 }
 699
 700 void rtl8180_irq_enable(struct net_device *dev)
 701 {
 702         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 703
 704         priv->irq_enabled = 1;
 705         write_nic_word(dev, INTA_MASK, priv->irq_mask);
 706 }
 707
 708 void rtl8180_irq_disable(struct net_device *dev)
 709 {
 710         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 711
 712         write_nic_dword(dev, IMR, 0);
 713         force_pci_posting(dev);
 714         priv->irq_enabled = 0;
 715 }
 716
 717 void rtl8180_set_mode(struct net_device *dev, int mode)
 718 {
 719         u8 ecmd;
 720
 721         ecmd = read_nic_byte(dev, EPROM_CMD);
 722         ecmd = ecmd & ~EPROM_CMD_OPERATING_MODE_MASK;
 723         ecmd = ecmd | (mode<<EPROM_CMD_OPERATING_MODE_SHIFT);
 724         ecmd = ecmd & ~(1<<EPROM_CS_SHIFT);
 725         ecmd = ecmd & ~(1<<EPROM_CK_SHIFT);
 726         write_nic_byte(dev, EPROM_CMD, ecmd);
 727 }
 728
 729 void rtl8180_adapter_start(struct net_device *dev);
 730 void rtl8180_beacon_tx_enable(struct net_device *dev);
 731
 732 void rtl8180_update_msr(struct net_device *dev)
 733 {
 734         struct r8180_priv *priv = ieee80211_priv(dev);
 735         u8 msr;
 736         u32 rxconf;
 737
 738         msr  = read_nic_byte(dev, MSR);
 739         msr &= ~MSR_LINK_MASK;
 740
 741         rxconf = read_nic_dword(dev, RX_CONF);
 742
 743         if (priv->ieee80211->state == IEEE80211_LINKED) {
 744                 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
 745                         msr |= (MSR_LINK_ADHOC<<MSR_LINK_SHIFT);
 746                 else if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
 747                         msr |= (MSR_LINK_MASTER<<MSR_LINK_SHIFT);
 748                 else if (priv->ieee80211->iw_mode == IW_MODE_INFRA)
 749                         msr |= (MSR_LINK_MANAGED<<MSR_LINK_SHIFT);
 750                 else
 751                         msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 752                 rxconf |= (1<<RX_CHECK_BSSID_SHIFT);
 753
 754         } else {
 755                 msr |= (MSR_LINK_NONE<<MSR_LINK_SHIFT);
 756                 rxconf &= ~(1<<RX_CHECK_BSSID_SHIFT);
 757         }
 758
 759         write_nic_byte(dev, MSR, msr);
 760         write_nic_dword(dev, RX_CONF, rxconf);
 761 }
 762
 763 void rtl8180_set_chan(struct net_device *dev, short ch)
 764 {
 765         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 766
 767         if ((ch > 14) || (ch < 1)) {
 768                 printk("In %s: Invalid chnanel %d\n", __func__, ch);
 769                 return;
 770         }
 771
 772         priv->chan = ch;
 773         priv->rf_set_chan(dev, priv->chan);
 774 }
 775
 776 void rtl8180_rx_enable(struct net_device *dev)
 777 {
 778         u8 cmd;
 779         u32 rxconf;
 780         /* for now we accept data, management & ctl frame*/
 781         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 782
 783         rxconf = read_nic_dword(dev, RX_CONF);
 784         rxconf = rxconf & ~MAC_FILTER_MASK;
 785         rxconf = rxconf | (1<<ACCEPT_MNG_FRAME_SHIFT);
 786         rxconf = rxconf | (1<<ACCEPT_DATA_FRAME_SHIFT);
 787         rxconf = rxconf | (1<<ACCEPT_BCAST_FRAME_SHIFT);
 788         rxconf = rxconf | (1<<ACCEPT_MCAST_FRAME_SHIFT);
 789         if (dev->flags & IFF_PROMISC)
 790                 DMESG("NIC in promisc mode");
 791
 792         if (priv->ieee80211->iw_mode == IW_MODE_MONITOR || \
 793            dev->flags & IFF_PROMISC) {
 794                 rxconf = rxconf | (1<<ACCEPT_ALLMAC_FRAME_SHIFT);
 795         } else {
 796                 rxconf = rxconf | (1<<ACCEPT_NICMAC_FRAME_SHIFT);
 797         }
 798
 799         if (priv->ieee80211->iw_mode == IW_MODE_MONITOR) {
 800                 rxconf = rxconf | (1<<ACCEPT_CTL_FRAME_SHIFT);
 801                 rxconf = rxconf | (1<<ACCEPT_ICVERR_FRAME_SHIFT);
 802                 rxconf = rxconf | (1<<ACCEPT_PWR_FRAME_SHIFT);
 803         }
 804
 805         if (priv->crcmon == 1 && priv->ieee80211->iw_mode == IW_MODE_MONITOR)
 806                 rxconf = rxconf | (1<<ACCEPT_CRCERR_FRAME_SHIFT);
 807
 808         rxconf = rxconf & ~RX_FIFO_THRESHOLD_MASK;
 809         rxconf = rxconf | (RX_FIFO_THRESHOLD_NONE << RX_FIFO_THRESHOLD_SHIFT);
 810
 811         rxconf = rxconf | (1<<RX_AUTORESETPHY_SHIFT);
 812         rxconf = rxconf & ~MAX_RX_DMA_MASK;
 813         rxconf = rxconf | (MAX_RX_DMA_2048<<MAX_RX_DMA_SHIFT);
 814
 815         rxconf = rxconf | RCR_ONLYERLPKT;
 816
 817         rxconf = rxconf & ~RCR_CS_MASK;
 818
 819         write_nic_dword(dev, RX_CONF, rxconf);
 820
 821         fix_rx_fifo(dev);
 822
 823         cmd = read_nic_byte(dev, CMD);
 824         write_nic_byte(dev, CMD, cmd | (1<<CMD_RX_ENABLE_SHIFT));
 825 }
 826
 827 void set_nic_txring(struct net_device *dev)
 828 {
 829         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 830
 831         write_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR, priv->txmapringdma);
 832         write_nic_dword(dev, TX_BKPRIORITY_RING_ADDR, priv->txbkpringdma);
 833         write_nic_dword(dev, TX_BEPRIORITY_RING_ADDR, priv->txbepringdma);
 834         write_nic_dword(dev, TX_VIPRIORITY_RING_ADDR, priv->txvipringdma);
 835         write_nic_dword(dev, TX_VOPRIORITY_RING_ADDR, priv->txvopringdma);
 836         write_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR, priv->txhpringdma);
 837         write_nic_dword(dev, TX_BEACON_RING_ADDR, priv->txbeaconringdma);
 838 }
 839
 840 void rtl8180_conttx_enable(struct net_device *dev)
 841 {
 842         u32 txconf;
 843
 844         txconf = read_nic_dword(dev, TX_CONF);
 845         txconf = txconf & ~TX_LOOPBACK_MASK;
 846         txconf = txconf | (TX_LOOPBACK_CONTINUE<<TX_LOOPBACK_SHIFT);
 847         write_nic_dword(dev, TX_CONF, txconf);
 848 }
 849
 850 void rtl8180_conttx_disable(struct net_device *dev)
 851 {
 852         u32 txconf;
 853
 854         txconf = read_nic_dword(dev, TX_CONF);
 855         txconf = txconf & ~TX_LOOPBACK_MASK;
 856         txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
 857         write_nic_dword(dev, TX_CONF, txconf);
 858 }
 859
 860 void rtl8180_tx_enable(struct net_device *dev)
 861 {
 862         u8 cmd;
 863         u8 tx_agc_ctl;
 864         u8 byte;
 865         u32 txconf;
 866         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 867
 868         txconf = read_nic_dword(dev, TX_CONF);
 869
 870         byte = read_nic_byte(dev, CW_CONF);
 871         byte &= ~(1<<CW_CONF_PERPACKET_CW_SHIFT);
 872         byte &= ~(1<<CW_CONF_PERPACKET_RETRY_SHIFT);
 873         write_nic_byte(dev, CW_CONF, byte);
 874
 875         tx_agc_ctl = read_nic_byte(dev, TX_AGC_CTL);
 876         tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_GAIN_SHIFT);
 877         tx_agc_ctl &= ~(1<<TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT);
 878         tx_agc_ctl |= (1<<TX_AGC_CTL_FEEDBACK_ANT);
 879         write_nic_byte(dev, TX_AGC_CTL, tx_agc_ctl);
 880         write_nic_byte(dev, 0xec, 0x3f); /* Disable early TX */
 881
 882         txconf = txconf & ~(1<<TCR_PROBE_NOTIMESTAMP_SHIFT);
 883
 884         txconf = txconf & ~TX_LOOPBACK_MASK;
 885         txconf = txconf | (TX_LOOPBACK_NONE<<TX_LOOPBACK_SHIFT);
 886         txconf = txconf & ~TCR_DPRETRY_MASK;
 887         txconf = txconf & ~TCR_RTSRETRY_MASK;
 888         txconf = txconf | (priv->retry_data<<TX_DPRETRY_SHIFT);
 889         txconf = txconf | (priv->retry_rts<<TX_RTSRETRY_SHIFT);
 890         txconf = txconf & ~(1<<TX_NOCRC_SHIFT);
 891
 892         if (priv->hw_plcp_len)
 893                 txconf = txconf & ~TCR_PLCP_LEN;
 894         else
 895                 txconf = txconf | TCR_PLCP_LEN;
 896
 897         txconf = txconf & ~TCR_MXDMA_MASK;
 898         txconf = txconf | (TCR_MXDMA_2048<<TCR_MXDMA_SHIFT);
 899         txconf = txconf | TCR_CWMIN;
 900         txconf = txconf | TCR_DISCW;
 901
 902         txconf = txconf | (1 << TX_NOICV_SHIFT);
 903
 904         write_nic_dword(dev, TX_CONF, txconf);
 905
 906         fix_tx_fifo(dev);
 907
 908         cmd = read_nic_byte(dev, CMD);
 909         write_nic_byte(dev, CMD, cmd | (1<<CMD_TX_ENABLE_SHIFT));
 910
 911         write_nic_dword(dev, TX_CONF, txconf);
 912 }
 913
 914 void rtl8180_beacon_tx_enable(struct net_device *dev)
 915 {
 916         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 917
 918         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
 919         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_BQ);
 920         write_nic_byte(dev, TPPollStop, priv->dma_poll_mask);
 921         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
 922 }
 923
 924 void rtl8180_beacon_tx_disable(struct net_device *dev)
 925 {
 926         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 927
 928         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
 929         priv->dma_poll_stop_mask |= TPPOLLSTOP_BQ;
 930         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
 931         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
 932
 933 }
 934
 935 void rtl8180_rtx_disable(struct net_device *dev)
 936 {
 937         u8 cmd;
 938         struct r8180_priv *priv = ieee80211_priv(dev);
 939
 940         cmd = read_nic_byte(dev, CMD);
 941         write_nic_byte(dev, CMD, cmd & ~\
 942                        ((1<<CMD_RX_ENABLE_SHIFT)|(1<<CMD_TX_ENABLE_SHIFT)));
 943         force_pci_posting(dev);
 944         mdelay(10);
 945
 946         if (!priv->rx_skb_complete)
 947                 dev_kfree_skb_any(priv->rx_skb);
 948 }
 949
 950 short alloc_tx_desc_ring(struct net_device *dev, int bufsize, int count,
 951                          int addr)
 952 {
 953         int i;
 954         u32 *desc;
 955         u32 *tmp;
 956         dma_addr_t dma_desc, dma_tmp;
 957         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
 958         struct pci_dev *pdev = priv->pdev;
 959         void *buf;
 960
 961         if ((bufsize & 0xfff) != bufsize) {
 962                 DMESGE("TX buffer allocation too large");
 963                 return 0;
 964         }
 965         desc = (u32 *)pci_alloc_consistent(pdev,
 966                                           sizeof(u32)*8*count+256, &dma_desc);
 967         if (desc == NULL)
 968                 return -1;
 969
 970         if (dma_desc & 0xff)
 971                 /*
 972                  * descriptor's buffer must be 256 byte aligned
 973                  * we shouldn't be here, since we set DMA mask !
 974                  */
 975                 WARN(1, "DMA buffer is not aligned\n");
 976
 977         tmp = desc;
 978
 979         for (i = 0; i < count; i++) {
 980                 buf = (void *)pci_alloc_consistent(pdev, bufsize, &dma_tmp);
 981                 if (buf == NULL)
 982                         return -ENOMEM;
 983
 984                 switch (addr) {
 985                 case TX_MANAGEPRIORITY_RING_ADDR:
 986                         if (-1 == buffer_add(&(priv->txmapbufs), buf, dma_tmp, NULL)) {
 987                                 DMESGE("Unable to allocate mem for buffer NP");
 988                                 return -ENOMEM;
 989                         }
 990                         break;
 991                 case TX_BKPRIORITY_RING_ADDR:
 992                         if (-1 == buffer_add(&(priv->txbkpbufs), buf, dma_tmp, NULL)) {
 993                                 DMESGE("Unable to allocate mem for buffer LP");
 994                                 return -ENOMEM;
 995                         }
 996                         break;
 997                 case TX_BEPRIORITY_RING_ADDR:
 998                         if (-1 == buffer_add(&(priv->txbepbufs), buf, dma_tmp, NULL)) {
 999                                 DMESGE("Unable to allocate mem for buffer NP");
1000                                 return -ENOMEM;
1001                         }
1002                         break;
1003                 case TX_VIPRIORITY_RING_ADDR:
1004                         if (-1 == buffer_add(&(priv->txvipbufs), buf, dma_tmp, NULL)) {
1005                                 DMESGE("Unable to allocate mem for buffer LP");
1006                                 return -ENOMEM;
1007                         }
1008                         break;
1009                 case TX_VOPRIORITY_RING_ADDR:
1010                         if (-1 == buffer_add(&(priv->txvopbufs), buf, dma_tmp, NULL)) {
1011                                 DMESGE("Unable to allocate mem for buffer NP");
1012                                 return -ENOMEM;
1013                         }
1014                         break;
1015                 case TX_HIGHPRIORITY_RING_ADDR:
1016                         if (-1 == buffer_add(&(priv->txhpbufs), buf, dma_tmp, NULL)) {
1017                                 DMESGE("Unable to allocate mem for buffer HP");
1018                                 return -ENOMEM;
1019                         }
1020                         break;
1021                 case TX_BEACON_RING_ADDR:
1022                         if (-1 == buffer_add(&(priv->txbeaconbufs), buf, dma_tmp, NULL)) {
1023                                 DMESGE("Unable to allocate mem for buffer BP");
1024                                 return -ENOMEM;
1025                         }
1026                         break;
1027                 }
1028                 *tmp = *tmp & ~(1<<31); // descriptor empty, owned by the drv
1029                 *(tmp+2) = (u32)dma_tmp;
1030                 *(tmp+3) = bufsize;
1031
1032                 if (i+1 < count)
1033                         *(tmp+4) = (u32)dma_desc+((i+1)*8*4);
1034                 else
1035                         *(tmp+4) = (u32)dma_desc;
1036
1037                 tmp = tmp+8;
1038         }
1039
1040         switch (addr) {
1041         case TX_MANAGEPRIORITY_RING_ADDR:
1042                 priv->txmapringdma = dma_desc;
1043                 priv->txmapring = desc;
1044                 break;
1045         case TX_BKPRIORITY_RING_ADDR:
1046                 priv->txbkpringdma = dma_desc;
1047                 priv->txbkpring = desc;
1048                 break;
1049         case TX_BEPRIORITY_RING_ADDR:
1050                 priv->txbepringdma = dma_desc;
1051                 priv->txbepring = desc;
1052                 break;
1053         case TX_VIPRIORITY_RING_ADDR:
1054                 priv->txvipringdma = dma_desc;
1055                 priv->txvipring = desc;
1056                 break;
1057         case TX_VOPRIORITY_RING_ADDR:
1058                 priv->txvopringdma = dma_desc;
1059                 priv->txvopring = desc;
1060                 break;
1061         case TX_HIGHPRIORITY_RING_ADDR:
1062                 priv->txhpringdma = dma_desc;
1063                 priv->txhpring = desc;
1064                 break;
1065         case TX_BEACON_RING_ADDR:
1066                 priv->txbeaconringdma = dma_desc;
1067                 priv->txbeaconring = desc;
1068                 break;
1069
1070         }
1071
1072         return 0;
1073 }
1074
1075 void free_tx_desc_rings(struct net_device *dev)
1076 {
1077         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1078         struct pci_dev *pdev = priv->pdev;
1079         int count = priv->txringcount;
1080
1081         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1082                             priv->txmapring, priv->txmapringdma);
1083         buffer_free(dev, &(priv->txmapbufs), priv->txbuffsize, 1);
1084
1085         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1086                             priv->txbkpring, priv->txbkpringdma);
1087         buffer_free(dev, &(priv->txbkpbufs), priv->txbuffsize, 1);
1088
1089         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1090                             priv->txbepring, priv->txbepringdma);
1091         buffer_free(dev, &(priv->txbepbufs), priv->txbuffsize, 1);
1092
1093         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1094                             priv->txvipring, priv->txvipringdma);
1095         buffer_free(dev, &(priv->txvipbufs), priv->txbuffsize, 1);
1096
1097         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1098                             priv->txvopring, priv->txvopringdma);
1099         buffer_free(dev, &(priv->txvopbufs), priv->txbuffsize, 1);
1100
1101         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1102                             priv->txhpring, priv->txhpringdma);
1103         buffer_free(dev, &(priv->txhpbufs), priv->txbuffsize, 1);
1104
1105         count = priv->txbeaconcount;
1106         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1107                             priv->txbeaconring, priv->txbeaconringdma);
1108         buffer_free(dev, &(priv->txbeaconbufs), priv->txbuffsize, 1);
1109 }
1110
1111 void free_rx_desc_ring(struct net_device *dev)
1112 {
1113         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1114         struct pci_dev *pdev = priv->pdev;
1115         int count = priv->rxringcount;
1116
1117         pci_free_consistent(pdev, sizeof(u32)*8*count+256,
1118                             priv->rxring, priv->rxringdma);
1119
1120         buffer_free(dev, &(priv->rxbuffer), priv->rxbuffersize, 0);
1121 }
1122
1123 short alloc_rx_desc_ring(struct net_device *dev, u16 bufsize, int count)
1124 {
1125         int i;
1126         u32 *desc;
1127         u32 *tmp;
1128         dma_addr_t dma_desc, dma_tmp;
1129         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1130         struct pci_dev *pdev = priv->pdev;
1131         void *buf;
1132         u8 rx_desc_size;
1133
1134         rx_desc_size = 8; // 4*8 = 32 bytes
1135
1136         if ((bufsize & 0xfff) != bufsize) {
1137                 DMESGE("RX buffer allocation too large");
1138                 return -1;
1139         }
1140
1141         desc = (u32 *)pci_alloc_consistent(pdev, sizeof(u32)*rx_desc_size*count+256,
1142                                           &dma_desc);
1143
1144         if (dma_desc & 0xff)
1145                 /*
1146                  * descriptor's buffer must be 256 byte aligned
1147                  * should never happen since we specify the DMA mask
1148                  */
1149                 WARN(1, "DMA buffer is not aligned\n");
1150
1151         priv->rxring = desc;
1152         priv->rxringdma = dma_desc;
1153         tmp = desc;
1154
1155         for (i = 0; i < count; i++) {
1156                 buf = kmalloc(bufsize * sizeof(u8), GFP_ATOMIC);
1157                 if (buf == NULL) {
1158                         DMESGE("Failed to kmalloc RX buffer");
1159                         return -1;
1160                 }
1161
1162                 dma_tmp = pci_map_single(pdev, buf, bufsize * sizeof(u8),
1163                                          PCI_DMA_FROMDEVICE);
1164
1165                 if (-1 == buffer_add(&(priv->rxbuffer), buf, dma_tmp,
1166                            &(priv->rxbufferhead))) {
1167                         DMESGE("Unable to allocate mem RX buf");
1168                         return -1;
1169                 }
1170                 *tmp = 0; // zero pads the header of the descriptor
1171                 *tmp = *tmp | (bufsize&0xfff);
1172                 *(tmp+2) = (u32)dma_tmp;
1173                 *tmp = *tmp | (1<<31); // descriptor void, owned by the NIC
1174
1175                 tmp = tmp+rx_desc_size;
1176         }
1177
1178         *(tmp-rx_desc_size) = *(tmp-rx_desc_size) | (1<<30); // this is the last descriptor
1179
1180         return 0;
1181 }
1182
1183
1184 void set_nic_rxring(struct net_device *dev)
1185 {
1186         u8 pgreg;
1187         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1188
1189         pgreg = read_nic_byte(dev, PGSELECT);
1190         write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
1191
1192         write_nic_dword(dev, RXRING_ADDR, priv->rxringdma);
1193 }
1194
1195 void rtl8180_reset(struct net_device *dev)
1196 {
1197         u8 cr;
1198
1199         rtl8180_irq_disable(dev);
1200
1201         cr = read_nic_byte(dev, CMD);
1202         cr = cr & 2;
1203         cr = cr | (1<<CMD_RST_SHIFT);
1204         write_nic_byte(dev, CMD, cr);
1205
1206         force_pci_posting(dev);
1207
1208         mdelay(200);
1209
1210         if (read_nic_byte(dev, CMD) & (1<<CMD_RST_SHIFT))
1211                 DMESGW("Card reset timeout!");
1212         else
1213                 DMESG("Card successfully reset");
1214
1215         rtl8180_set_mode(dev, EPROM_CMD_LOAD);
1216         force_pci_posting(dev);
1217         mdelay(200);
1218 }
1219
1220 inline u16 ieeerate2rtlrate(int rate)
1221 {
1222         switch (rate) {
1223         case 10:
1224                 return 0;
1225         case 20:
1226                 return 1;
1227         case 55:
1228                 return 2;
1229         case 110:
1230                 return 3;
1231         case 60:
1232                 return 4;
1233         case 90:
1234                 return 5;
1235         case 120:
1236                 return 6;
1237         case 180:
1238                 return 7;
1239         case 240:
1240                 return 8;
1241         case 360:
1242                 return 9;
1243         case 480:
1244                 return 10;
1245         case 540:
1246                 return 11;
1247         default:
1248                 return 3;
1249         }
1250 }
1251
1252 static u16 rtl_rate[] = {10, 20, 55, 110, 60, 90, 120, 180, 240, 360, 480, 540, 720};
1253
1254 inline u16 rtl8180_rate2rate(short rate)
1255 {
1256         if (rate > 12)
1257                 return 10;
1258         return rtl_rate[rate];
1259 }
1260
1261 inline u8 rtl8180_IsWirelessBMode(u16 rate)
1262 {
1263         if (((rate <= 110) && (rate != 60) && (rate != 90)) || (rate == 220))
1264                 return 1;
1265         else
1266                 return 0;
1267 }
1268
1269 u16 N_DBPSOfRate(u16 DataRate);
1270
1271 u16 ComputeTxTime(u16 FrameLength, u16 DataRate, u8 bManagementFrame,
1272                   u8 bShortPreamble)
1273 {
1274         u16     FrameTime;
1275         u16     N_DBPS;
1276         u16     Ceiling;
1277
1278         if (rtl8180_IsWirelessBMode(DataRate)) {
1279                 if (bManagementFrame || !bShortPreamble || DataRate == 10)
1280                         /* long preamble */
1281                         FrameTime = (u16)(144+48+(FrameLength*8/(DataRate/10)));
1282                 else
1283                         /* short preamble */
1284                         FrameTime = (u16)(72+24+(FrameLength*8/(DataRate/10)));
1285
1286                 if ((FrameLength*8 % (DataRate/10)) != 0) /* get the ceilling */
1287                         FrameTime++;
1288         } else {        /* 802.11g DSSS-OFDM PLCP length field calculation. */
1289                 N_DBPS = N_DBPSOfRate(DataRate);
1290                 Ceiling = (16 + 8*FrameLength + 6) / N_DBPS
1291                                 + (((16 + 8*FrameLength + 6) % N_DBPS) ? 1 : 0);
1292                 FrameTime = (u16)(16 + 4 + 4*Ceiling + 6);
1293         }
1294         return FrameTime;
1295 }
1296
1297 u16 N_DBPSOfRate(u16 DataRate)
1298 {
1299          u16 N_DBPS = 24;
1300
1301         switch (DataRate) {
1302         case 60:
1303                 N_DBPS = 24;
1304                 break;
1305         case 90:
1306                 N_DBPS = 36;
1307                 break;
1308         case 120:
1309                 N_DBPS = 48;
1310                 break;
1311         case 180:
1312                 N_DBPS = 72;
1313                 break;
1314         case 240:
1315                 N_DBPS = 96;
1316                 break;
1317         case 360:
1318                 N_DBPS = 144;
1319                 break;
1320         case 480:
1321                 N_DBPS = 192;
1322                 break;
1323         case 540:
1324                 N_DBPS = 216;
1325                 break;
1326         default:
1327                 break;
1328         }
1329
1330         return N_DBPS;
1331 }
1332
1333 //
1334 //      Description:
1335 //      For Netgear case, they want good-looking singal strength.
1336 //
1337 long NetgearSignalStrengthTranslate(long LastSS, long CurrSS)
1338 {
1339         long RetSS;
1340
1341         // Step 1. Scale mapping.
1342         if (CurrSS >= 71 && CurrSS <= 100)
1343                 RetSS = 90 + ((CurrSS - 70) / 3);
1344         else if (CurrSS >= 41 && CurrSS <= 70)
1345                 RetSS = 78 + ((CurrSS - 40) / 3);
1346         else if (CurrSS >= 31 && CurrSS <= 40)
1347                 RetSS = 66 + (CurrSS - 30);
1348         else if (CurrSS >= 21 && CurrSS <= 30)
1349                 RetSS = 54 + (CurrSS - 20);
1350         else if (CurrSS >= 5 && CurrSS <= 20)
1351                 RetSS = 42 + (((CurrSS - 5) * 2) / 3);
1352         else if (CurrSS == 4)
1353                 RetSS = 36;
1354         else if (CurrSS == 3)
1355                 RetSS = 27;
1356         else if (CurrSS == 2)
1357                 RetSS = 18;
1358         else if (CurrSS == 1)
1359                 RetSS = 9;
1360         else
1361                 RetSS = CurrSS;
1362
1363         // Step 2. Smoothing.
1364         if (LastSS > 0)
1365                 RetSS = ((LastSS * 5) + (RetSS) + 5) / 6;
1366
1367         return RetSS;
1368 }
1369
1370 //
1371 //      Description:
1372 //              Translate 0-100 signal strength index into dBm.
1373 //
1374 long TranslateToDbm8185(u8 SignalStrengthIndex)
1375 {
1376         long SignalPower;
1377
1378         // Translate to dBm (x=0.5y-95).
1379         SignalPower = (long)((SignalStrengthIndex + 1) >> 1);
1380         SignalPower -= 95;
1381
1382         return SignalPower;
1383 }
1384
1385 //
1386 //      Description:
1387 //              Perform signal smoothing for dynamic mechanism.
1388 //              This is different with PerformSignalSmoothing8185 in smoothing fomula.
1389 //              No dramatic adjustion is apply because dynamic mechanism need some degree
1390 //              of correctness. Ported from 8187B.
1391 //
1392 void PerformUndecoratedSignalSmoothing8185(struct r8180_priv *priv,
1393                                            bool bCckRate)
1394 {
1395         // Determin the current packet is CCK rate.
1396         priv->bCurCCKPkt = bCckRate;
1397
1398         if (priv->UndecoratedSmoothedSS >= 0)
1399                 priv->UndecoratedSmoothedSS = ((priv->UndecoratedSmoothedSS * 5) + (priv->SignalStrength * 10)) / 6;
1400         else
1401                 priv->UndecoratedSmoothedSS = priv->SignalStrength * 10;
1402
1403         priv->UndercorateSmoothedRxPower = ((priv->UndercorateSmoothedRxPower * 50) + (priv->RxPower * 11)) / 60;
1404
1405         if (bCckRate)
1406                 priv->CurCCKRSSI = priv->RSSI;
1407         else
1408                 priv->CurCCKRSSI = 0;
1409 }
1410
1411
1412 /* This is rough RX isr handling routine*/
1413 void rtl8180_rx(struct net_device *dev)
1414 {
1415         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1416         struct sk_buff *tmp_skb;
1417         short first, last;
1418         u32 len;
1419         int lastlen;
1420         unsigned char quality, signal;
1421         u8 rate;
1422         u32 *tmp, *tmp2;
1423         u8 rx_desc_size;
1424         u8 padding;
1425         char rxpower = 0;
1426         u32 RXAGC = 0;
1427         long RxAGC_dBm = 0;
1428         u8      LNA = 0, BB = 0;
1429         u8      LNA_gain[4] = {02, 17, 29, 39};
1430         u8  Antenna = 0;
1431         struct ieee80211_hdr_4addr *hdr;
1432         u16 fc, type;
1433         u8 bHwError = 0, bCRC = 0, bICV = 0;
1434         bool    bCckRate = false;
1435         u8     RSSI = 0;
1436         long    SignalStrengthIndex = 0;
1437         struct ieee80211_rx_stats stats = {
1438                 .signal = 0,
1439                 .noise = -98,
1440                 .rate = 0,
1441                 .freq = IEEE80211_24GHZ_BAND,
1442         };
1443
1444         stats.nic_type = NIC_8185B;
1445         rx_desc_size = 8;
1446
1447         if ((*(priv->rxringtail)) & (1<<31)) {
1448                 /* we have got an RX int, but the descriptor
1449                  * we are pointing is empty*/
1450
1451                 priv->stats.rxnodata++;
1452                 priv->ieee80211->stats.rx_errors++;
1453
1454                 tmp2 = NULL;
1455                 tmp = priv->rxringtail;
1456                 do {
1457                         if (tmp == priv->rxring)
1458                                 tmp  = priv->rxring + (priv->rxringcount - 1)*rx_desc_size;
1459                         else
1460                                 tmp -= rx_desc_size;
1461
1462                         if (!(*tmp & (1<<31)))
1463                                 tmp2 = tmp;
1464                 } while (tmp != priv->rxring);
1465
1466                 if (tmp2)
1467                         priv->rxringtail = tmp2;
1468         }
1469
1470         /* while there are filled descriptors */
1471         while (!(*(priv->rxringtail) & (1<<31))) {
1472                 if (*(priv->rxringtail) & (1<<26))
1473                         DMESGW("RX buffer overflow");
1474                 if (*(priv->rxringtail) & (1<<12))
1475                         priv->stats.rxicverr++;
1476
1477                 if (*(priv->rxringtail) & (1<<27)) {
1478                         priv->stats.rxdmafail++;
1479                         //DMESG("EE: RX DMA FAILED at buffer pointed by descriptor %x",(u32)priv->rxringtail);
1480                         goto drop;
1481                 }
1482
1483                 pci_dma_sync_single_for_cpu(priv->pdev,
1484                                     priv->rxbuffer->dma,
1485                                     priv->rxbuffersize * \
1486                                     sizeof(u8),
1487                                     PCI_DMA_FROMDEVICE);
1488
1489                 first = *(priv->rxringtail) & (1<<29) ? 1 : 0;
1490                 if (first)
1491                         priv->rx_prevlen = 0;
1492
1493                 last = *(priv->rxringtail) & (1<<28) ? 1 : 0;
1494                 if (last) {
1495                         lastlen = ((*priv->rxringtail) & 0xfff);
1496
1497                         /* if the last descriptor (that should
1498                          * tell us the total packet len) tell
1499                          * us something less than the descriptors
1500                          * len we had until now, then there is some
1501                          * problem..
1502                          * workaround to prevent kernel panic
1503                          */
1504                         if (lastlen < priv->rx_prevlen)
1505                                 len = 0;
1506                         else
1507                                 len = lastlen-priv->rx_prevlen;
1508
1509                         if (*(priv->rxringtail) & (1<<13)) {
1510                                 if ((*(priv->rxringtail) & 0xfff) < 500)
1511                                         priv->stats.rxcrcerrmin++;
1512                                 else if ((*(priv->rxringtail) & 0x0fff) > 1000)
1513                                         priv->stats.rxcrcerrmax++;
1514                                 else
1515                                         priv->stats.rxcrcerrmid++;
1516
1517                         }
1518
1519                 } else {
1520                         len = priv->rxbuffersize;
1521                 }
1522
1523                 if (first && last) {
1524                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1525                 } else if (first) {
1526                         padding = ((*(priv->rxringtail+3))&(0x04000000))>>26;
1527                         if (padding)
1528                                 len -= 2;
1529                 } else {
1530                         padding = 0;
1531                 }
1532                 padding = 0;
1533                 priv->rx_prevlen += len;
1534
1535                 if (priv->rx_prevlen > MAX_FRAG_THRESHOLD + 100) {
1536                         /* HW is probably passing several buggy frames
1537                         * without FD or LD flag set.
1538                         * Throw this garbage away to prevent skb
1539                         * memory exausting
1540                         */
1541                         if (!priv->rx_skb_complete)
1542                                 dev_kfree_skb_any(priv->rx_skb);
1543                         priv->rx_skb_complete = 1;
1544                 }
1545
1546                 signal = (unsigned char)(((*(priv->rxringtail+3)) & (0x00ff0000))>>16);
1547                 signal = (signal & 0xfe) >> 1;
1548
1549                 quality = (unsigned char)((*(priv->rxringtail+3)) & (0xff));
1550
1551                 stats.mac_time[0] = *(priv->rxringtail+1);
1552                 stats.mac_time[1] = *(priv->rxringtail+2);
1553                 rxpower = ((char)(((*(priv->rxringtail+4)) & (0x00ff0000))>>16))/2 - 42;
1554                 RSSI = ((u8)(((*(priv->rxringtail+3)) & (0x0000ff00))>>8)) & (0x7f);
1555
1556                 rate = ((*(priv->rxringtail)) &
1557                         ((1<<23)|(1<<22)|(1<<21)|(1<<20)))>>20;
1558
1559                 stats.rate = rtl8180_rate2rate(rate);
1560                 Antenna = (((*(priv->rxringtail+3)) & (0x00008000)) == 0) ? 0 : 1;
1561                 if (!rtl8180_IsWirelessBMode(stats.rate)) { // OFDM rate.
1562                         RxAGC_dBm = rxpower+1;  //bias
1563                 } else { // CCK rate.
1564                         RxAGC_dBm = signal; //bit 0 discard
1565
1566                         LNA = (u8) (RxAGC_dBm & 0x60) >> 5 ; //bit 6~ bit 5
1567                         BB  = (u8) (RxAGC_dBm & 0x1F);  // bit 4 ~ bit 0
1568
1569                         RxAGC_dBm = -(LNA_gain[LNA] + (BB*2)); //Pin_11b=-(LNA_gain+BB_gain) (dBm)
1570
1571                         RxAGC_dBm += 4; //bias
1572                 }
1573
1574                 if (RxAGC_dBm & 0x80) //absolute value
1575                         RXAGC = ~(RxAGC_dBm)+1;
1576                 bCckRate = rtl8180_IsWirelessBMode(stats.rate);
1577                 // Translate RXAGC into 1-100.
1578                 if (!rtl8180_IsWirelessBMode(stats.rate)) { // OFDM rate.
1579                         if (RXAGC > 90)
1580                                 RXAGC = 90;
1581                         else if (RXAGC < 25)
1582                                 RXAGC = 25;
1583                         RXAGC = (90-RXAGC)*100/65;
1584                 } else { // CCK rate.
1585                         if (RXAGC > 95)
1586                                 RXAGC = 95;
1587                         else if (RXAGC < 30)
1588                                 RXAGC = 30;
1589                         RXAGC = (95-RXAGC)*100/65;
1590                 }
1591                 priv->SignalStrength = (u8)RXAGC;
1592                 priv->RecvSignalPower = RxAGC_dBm;
1593                 priv->RxPower = rxpower;
1594                 priv->RSSI = RSSI;
1595                 /* SQ translation formula is provided by SD3 DZ. 2006.06.27 */
1596                 if (quality >= 127)
1597                         quality = 1;//0; //0 will cause epc to show signal zero , walk aroud now;
1598                 else if (quality < 27)
1599                         quality = 100;
1600                 else
1601                         quality = 127 - quality;
1602                 priv->SignalQuality = quality;
1603
1604                 stats.signal = (u8)quality;//priv->wstats.qual.level = priv->SignalStrength;
1605                 stats.signalstrength = RXAGC;
1606                 if (stats.signalstrength > 100)
1607                         stats.signalstrength = 100;
1608                 stats.signalstrength = (stats.signalstrength * 70)/100 + 30;
1609         //      printk("==========================>rx : RXAGC is %d,signalstrength is %d\n",RXAGC,stats.signalstrength);
1610                 stats.rssi = priv->wstats.qual.qual = priv->SignalQuality;
1611                 stats.noise = priv->wstats.qual.noise = 100 - priv->wstats.qual.qual;
1612                 bHwError = (((*(priv->rxringtail)) & (0x00000fff)) == 4080) | (((*(priv->rxringtail)) & (0x04000000)) != 0)
1613                         | (((*(priv->rxringtail)) & (0x08000000)) != 0) | (((~(*(priv->rxringtail))) & (0x10000000)) != 0) | (((~(*(priv->rxringtail))) & (0x20000000)) != 0);
1614                 bCRC = ((*(priv->rxringtail)) & (0x00002000)) >> 13;
1615                 bICV = ((*(priv->rxringtail)) & (0x00001000)) >> 12;
1616                 hdr = (struct ieee80211_hdr_4addr *)priv->rxbuffer->buf;
1617                     fc = le16_to_cpu(hdr->frame_ctl);
1618                 type = WLAN_FC_GET_TYPE(fc);
1619
1620                         if ((IEEE80211_FTYPE_CTL != type) &&
1621                                 (eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS) ? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 : hdr->addr3))
1622                                  && (!bHwError) && (!bCRC) && (!bICV)) {
1623                                 /* Perform signal smoothing for dynamic
1624                                  * mechanism on demand. This is different
1625                                  * with PerformSignalSmoothing8185 in smoothing
1626                                  * fomula. No dramatic adjustion is apply
1627                                  * because dynamic mechanism need some degree
1628                                  * of correctness. */
1629                                 PerformUndecoratedSignalSmoothing8185(priv, bCckRate);
1630                                 //
1631                                 // For good-looking singal strength.
1632                                 //
1633                                 SignalStrengthIndex = NetgearSignalStrengthTranslate(
1634                                                                 priv->LastSignalStrengthInPercent,
1635                                                                 priv->SignalStrength);
1636
1637                                 priv->LastSignalStrengthInPercent = SignalStrengthIndex;
1638                                 priv->Stats_SignalStrength = TranslateToDbm8185((u8)SignalStrengthIndex);
1639                 //
1640                 // We need more correct power of received packets and the  "SignalStrength" of RxStats is beautified,
1641                 // so we record the correct power here.
1642                 //
1643                                 priv->Stats_SignalQuality = (long)(priv->Stats_SignalQuality * 5 + (long)priv->SignalQuality + 5) / 6;
1644                                 priv->Stats_RecvSignalPower = (long)(priv->Stats_RecvSignalPower * 5 + priv->RecvSignalPower - 1) / 6;
1645
1646                 // Figure out which antenna that received the lasted packet.
1647                                 priv->LastRxPktAntenna = Antenna ? 1 : 0; // 0: aux, 1: main.
1648                                 SwAntennaDiversityRxOk8185(dev, priv->SignalStrength);
1649                         }
1650
1651                 if (first) {
1652                         if (!priv->rx_skb_complete) {
1653                                 /* seems that HW sometimes fails to reiceve and
1654                                    doesn't provide the last descriptor */
1655                                 dev_kfree_skb_any(priv->rx_skb);
1656                                 priv->stats.rxnolast++;
1657                         }
1658                         /* support for prism header has been originally added by Christian */
1659                         if (priv->prism_hdr && priv->ieee80211->iw_mode == IW_MODE_MONITOR) {
1660
1661                         } else {
1662                                 priv->rx_skb = dev_alloc_skb(len+2);
1663                                 if (!priv->rx_skb)
1664                                         goto drop;
1665                         }
1666
1667                         priv->rx_skb_complete = 0;
1668                         priv->rx_skb->dev = dev;
1669                 } else {
1670                         /* if we are here we should  have already RXed
1671                         * the first frame.
1672                         * If we get here and the skb is not allocated then
1673                         * we have just throw out garbage (skb not allocated)
1674                         * and we are still rxing garbage....
1675                         */
1676                         if (!priv->rx_skb_complete) {
1677
1678                                 tmp_skb = dev_alloc_skb(priv->rx_skb->len+len+2);
1679
1680                                 if (!tmp_skb)
1681                                         goto drop;
1682
1683                                 tmp_skb->dev = dev;
1684
1685                                 memcpy(skb_put(tmp_skb, priv->rx_skb->len),
1686                                         priv->rx_skb->data,
1687                                         priv->rx_skb->len);
1688
1689                                 dev_kfree_skb_any(priv->rx_skb);
1690
1691                                 priv->rx_skb = tmp_skb;
1692                         }
1693                 }
1694
1695                 if (!priv->rx_skb_complete) {
1696                         if (padding) {
1697                                 memcpy(skb_put(priv->rx_skb, len),
1698                                         (((unsigned char *)priv->rxbuffer->buf) + 2), len);
1699                         } else {
1700                                 memcpy(skb_put(priv->rx_skb, len),
1701                                         priv->rxbuffer->buf, len);
1702                         }
1703                 }
1704
1705                 if (last && !priv->rx_skb_complete) {
1706                         if (priv->rx_skb->len > 4)
1707                                 skb_trim(priv->rx_skb, priv->rx_skb->len-4);
1708                         if (!ieee80211_rtl_rx(priv->ieee80211,
1709                                          priv->rx_skb, &stats))
1710                                 dev_kfree_skb_any(priv->rx_skb);
1711                         priv->rx_skb_complete = 1;
1712                 }
1713
1714                 pci_dma_sync_single_for_device(priv->pdev,
1715                                     priv->rxbuffer->dma,
1716                                     priv->rxbuffersize * \
1717                                     sizeof(u8),
1718                                     PCI_DMA_FROMDEVICE);
1719
1720 drop: // this is used when we have not enough mem
1721                 /* restore the descriptor */
1722                 *(priv->rxringtail+2) = priv->rxbuffer->dma;
1723                 *(priv->rxringtail) = *(priv->rxringtail) & ~0xfff;
1724                 *(priv->rxringtail) =
1725                         *(priv->rxringtail) | priv->rxbuffersize;
1726
1727                 *(priv->rxringtail) =
1728                         *(priv->rxringtail) | (1<<31);
1729
1730                 priv->rxringtail += rx_desc_size;
1731                 if (priv->rxringtail >=
1732                    (priv->rxring)+(priv->rxringcount)*rx_desc_size)
1733                         priv->rxringtail = priv->rxring;
1734
1735                 priv->rxbuffer = (priv->rxbuffer->next);
1736         }
1737 }
1738
1739
1740 void rtl8180_dma_kick(struct net_device *dev, int priority)
1741 {
1742         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1743
1744         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1745         write_nic_byte(dev, TX_DMA_POLLING,
1746                         (1 << (priority + 1)) | priv->dma_poll_mask);
1747         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1748
1749         force_pci_posting(dev);
1750 }
1751
1752 void rtl8180_data_hard_stop(struct net_device *dev)
1753 {
1754         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1755
1756         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1757         priv->dma_poll_stop_mask |= TPPOLLSTOP_AC_VIQ;
1758         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1759         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1760 }
1761
1762 void rtl8180_data_hard_resume(struct net_device *dev)
1763 {
1764         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1765
1766         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
1767         priv->dma_poll_stop_mask &= ~(TPPOLLSTOP_AC_VIQ);
1768         write_nic_byte(dev, TPPollStop, priv->dma_poll_stop_mask);
1769         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
1770 }
1771
1772 /* this function TX data frames when the ieee80211 stack requires this.
1773  * It checks also if we need to stop the ieee tx queue, eventually do it
1774  */
1775 void rtl8180_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int
1776 rate) {
1777         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1778         int mode;
1779         struct ieee80211_hdr_3addr *h = (struct ieee80211_hdr_3addr *) skb->data;
1780         short morefrag = (h->frame_control) & IEEE80211_FCTL_MOREFRAGS;
1781         unsigned long flags;
1782         int priority;
1783
1784         mode = priv->ieee80211->iw_mode;
1785
1786         rate = ieeerate2rtlrate(rate);
1787         /*
1788         * This function doesn't require lock because we make
1789         * sure it's called with the tx_lock already acquired.
1790         * this come from the kernel's hard_xmit callback (through
1791         * the ieee stack, or from the try_wake_queue (again through
1792         * the ieee stack.
1793         */
1794         priority = AC2Q(skb->priority);
1795         spin_lock_irqsave(&priv->tx_lock, flags);
1796
1797         if (priv->ieee80211->bHwRadioOff) {
1798                 spin_unlock_irqrestore(&priv->tx_lock, flags);
1799
1800                 return;
1801         }
1802
1803         if (!check_nic_enought_desc(dev, priority)) {
1804                 DMESGW("Error: no descriptor left by previous TX (avail %d) ",
1805                         get_curr_tx_free_desc(dev, priority));
1806                 ieee80211_rtl_stop_queue(priv->ieee80211);
1807         }
1808         rtl8180_tx(dev, skb->data, skb->len, priority, morefrag, 0, rate);
1809         if (!check_nic_enought_desc(dev, priority))
1810                 ieee80211_rtl_stop_queue(priv->ieee80211);
1811
1812         spin_unlock_irqrestore(&priv->tx_lock, flags);
1813 }
1814
1815 /* This is a rough attempt to TX a frame
1816  * This is called by the ieee 80211 stack to TX management frames.
1817  * If the ring is full packet are dropped (for data frame the queue
1818  * is stopped before this can happen). For this reason it is better
1819  * if the descriptors are larger than the largest management frame
1820  * we intend to TX: i'm unsure what the HW does if it will not found
1821  * the last fragment of a frame because it has been dropped...
1822  * Since queues for Management and Data frames are different we
1823  * might use a different lock than tx_lock (for example mgmt_tx_lock)
1824  */
1825 /* these function may loops if invoked with 0 descriptors or 0 len buffer*/
1826 int rtl8180_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1827 {
1828         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1829         unsigned long flags;
1830         int priority;
1831
1832         priority = MANAGE_PRIORITY;
1833
1834         spin_lock_irqsave(&priv->tx_lock, flags);
1835
1836         if (priv->ieee80211->bHwRadioOff) {
1837                 spin_unlock_irqrestore(&priv->tx_lock, flags);
1838                 dev_kfree_skb_any(skb);
1839                 return NETDEV_TX_OK;
1840         }
1841
1842         rtl8180_tx(dev, skb->data, skb->len, priority,
1843                 0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1844
1845         priv->ieee80211->stats.tx_bytes += skb->len;
1846         priv->ieee80211->stats.tx_packets++;
1847         spin_unlock_irqrestore(&priv->tx_lock, flags);
1848
1849         dev_kfree_skb_any(skb);
1850         return NETDEV_TX_OK;
1851 }
1852
1853 // longpre 144+48 shortpre 72+24
1854 u16 rtl8180_len2duration(u32 len, short rate, short *ext)
1855 {
1856         u16 duration;
1857         u16 drift;
1858         *ext = 0;
1859
1860         switch (rate) {
1861         case 0://1mbps
1862                 *ext = 0;
1863                 duration = ((len+4)<<4) / 0x2;
1864                 drift = ((len+4)<<4) % 0x2;
1865                 if (drift == 0)
1866                         break;
1867                 duration++;
1868                 break;
1869         case 1://2mbps
1870                 *ext = 0;
1871                 duration = ((len+4)<<4) / 0x4;
1872                 drift = ((len+4)<<4) % 0x4;
1873                 if (drift == 0)
1874                         break;
1875                 duration++;
1876                 break;
1877         case 2: //5.5mbps
1878                 *ext = 0;
1879                 duration = ((len+4)<<4) / 0xb;
1880                 drift = ((len+4)<<4) % 0xb;
1881                 if (drift == 0)
1882                         break;
1883                 duration++;
1884                 break;
1885         default:
1886         case 3://11mbps
1887                 *ext = 0;
1888                 duration = ((len+4)<<4) / 0x16;
1889                 drift = ((len+4)<<4) % 0x16;
1890                 if (drift == 0)
1891                         break;
1892                 duration++;
1893                 if (drift > 6)
1894                         break;
1895                 *ext = 1;
1896                 break;
1897         }
1898
1899         return duration;
1900 }
1901
1902 void rtl8180_prepare_beacon(struct net_device *dev)
1903 {
1904         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
1905         struct sk_buff *skb;
1906
1907         u16 word  = read_nic_word(dev, BcnItv);
1908         word &= ~BcnItv_BcnItv; // clear Bcn_Itv
1909         word |= cpu_to_le16(priv->ieee80211->current_network.beacon_interval); //0x64;
1910         write_nic_word(dev, BcnItv, word);
1911
1912         skb = ieee80211_get_beacon(priv->ieee80211);
1913         if (skb) {
1914                 rtl8180_tx(dev, skb->data, skb->len, BEACON_PRIORITY,
1915                         0, 0, ieeerate2rtlrate(priv->ieee80211->basic_rate));
1916                 dev_kfree_skb_any(skb);
1917         }
1918 }
1919
1920 /* This function do the real dirty work: it enqueues a TX command
1921  * descriptor in the ring buffer, copyes the frame in a TX buffer
1922  * and kicks the NIC to ensure it does the DMA transfer.
1923  */
1924 short rtl8180_tx(struct net_device *dev, u8* txbuf, int len, int priority,
1925                  short morefrag, short descfrag, int rate)
1926 {
1927         struct r8180_priv *priv = ieee80211_priv(dev);
1928         u32 *tail, *temp_tail;
1929         u32 *begin;
1930         u32 *buf;
1931         int i;
1932         int remain;
1933         int buflen;
1934         int count;
1935         u16 duration;
1936         short ext;
1937         struct buffer *buflist;
1938         struct ieee80211_hdr_3addr *frag_hdr = (struct ieee80211_hdr_3addr *)txbuf;
1939         u8 dest[ETH_ALEN];
1940         u8                      bUseShortPreamble = 0;
1941         u8                      bCTSEnable = 0;
1942         u8                      bRTSEnable = 0;
1943         u16                     Duration = 0;
1944         u16                     RtsDur = 0;
1945         u16                     ThisFrameTime = 0;
1946         u16                     TxDescDuration = 0;
1947         u8                      ownbit_flag = false;
1948
1949         switch (priority) {
1950         case MANAGE_PRIORITY:
1951                 tail = priv->txmapringtail;
1952                 begin = priv->txmapring;
1953                 buflist = priv->txmapbufstail;
1954                 count = priv->txringcount;
1955                 break;
1956         case BK_PRIORITY:
1957                 tail = priv->txbkpringtail;
1958                 begin = priv->txbkpring;
1959                 buflist = priv->txbkpbufstail;
1960                 count = priv->txringcount;
1961                 break;
1962         case BE_PRIORITY:
1963                 tail = priv->txbepringtail;
1964                 begin = priv->txbepring;
1965                 buflist = priv->txbepbufstail;
1966                 count = priv->txringcount;
1967                 break;
1968         case VI_PRIORITY:
1969                 tail = priv->txvipringtail;
1970                 begin = priv->txvipring;
1971                 buflist = priv->txvipbufstail;
1972                 count = priv->txringcount;
1973                 break;
1974         case VO_PRIORITY:
1975                 tail = priv->txvopringtail;
1976                 begin = priv->txvopring;
1977                 buflist = priv->txvopbufstail;
1978                 count = priv->txringcount;
1979                 break;
1980         case HI_PRIORITY:
1981                 tail = priv->txhpringtail;
1982                 begin = priv->txhpring;
1983                 buflist = priv->txhpbufstail;
1984                 count = priv->txringcount;
1985                 break;
1986         case BEACON_PRIORITY:
1987                 tail = priv->txbeaconringtail;
1988                 begin = priv->txbeaconring;
1989                 buflist = priv->txbeaconbufstail;
1990                 count = priv->txbeaconcount;
1991                 break;
1992         default:
1993                 return -1;
1994                 break;
1995         }
1996
1997                 memcpy(&dest, frag_hdr->addr1, ETH_ALEN);
1998                 if (is_multicast_ether_addr(dest) ||
1999                                 is_broadcast_ether_addr(dest)) {
2000                         Duration = 0;
2001                         RtsDur = 0;
2002                         bRTSEnable = 0;
2003                         bCTSEnable = 0;
2004
2005                         ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2006                         TxDescDuration = ThisFrameTime;
2007                 } else {// Unicast packet
2008                         u16 AckTime;
2009
2010                         //YJ,add,080828,for Keep alive
2011                         priv->NumTxUnicast++;
2012
2013                         /* Figure out ACK rate according to BSS basic rate
2014                          * and Tx rate. */
2015                         AckTime = ComputeTxTime(14, 10, 0, 0);  // AckCTSLng = 14 use 1M bps send
2016
2017                         if (((len + sCrcLng) > priv->rts) && priv->rts) { // RTS/CTS.
2018                                 u16 RtsTime, CtsTime;
2019                                 //u16 CtsRate;
2020                                 bRTSEnable = 1;
2021                                 bCTSEnable = 0;
2022
2023                                 // Rate and time required for RTS.
2024                                 RtsTime = ComputeTxTime(sAckCtsLng/8, priv->ieee80211->basic_rate, 0, 0);
2025                                 // Rate and time required for CTS.
2026                                 CtsTime = ComputeTxTime(14, 10, 0, 0);  // AckCTSLng = 14 use 1M bps send
2027
2028                                 // Figure out time required to transmit this frame.
2029                                 ThisFrameTime = ComputeTxTime(len + sCrcLng,
2030                                                 rtl8180_rate2rate(rate),
2031                                                 0,
2032                                                 bUseShortPreamble);
2033
2034                                 // RTS-CTS-ThisFrame-ACK.
2035                                 RtsDur = CtsTime + ThisFrameTime + AckTime + 3*aSifsTime;
2036
2037                                 TxDescDuration = RtsTime + RtsDur;
2038                         } else {// Normal case.
2039                                 bCTSEnable = 0;
2040                                 bRTSEnable = 0;
2041                                 RtsDur = 0;
2042
2043                                 ThisFrameTime = ComputeTxTime(len + sCrcLng, rtl8180_rate2rate(rate), 0, bUseShortPreamble);
2044                                 TxDescDuration = ThisFrameTime + aSifsTime + AckTime;
2045                         }
2046
2047                         if (!(frag_hdr->frame_control & IEEE80211_FCTL_MOREFRAGS)) {
2048                                 // ThisFrame-ACK.
2049                                 Duration = aSifsTime + AckTime;
2050                         } else { // One or more fragments remained.
2051                                 u16 NextFragTime;
2052                                 NextFragTime = ComputeTxTime(len + sCrcLng, //pretend following packet length equal current packet
2053                                                 rtl8180_rate2rate(rate),
2054                                                 0,
2055                                                 bUseShortPreamble);
2056
2057                                 //ThisFrag-ACk-NextFrag-ACK.
2058                                 Duration = NextFragTime + 3*aSifsTime + 2*AckTime;
2059                         }
2060
2061                 } // End of Unicast packet
2062
2063                 frag_hdr->duration_id = Duration;
2064
2065         buflen = priv->txbuffsize;
2066         remain = len;
2067         temp_tail = tail;
2068
2069         while (remain != 0) {
2070                 mb();
2071                 if (!buflist) {
2072                         DMESGE("TX buffer error, cannot TX frames. pri %d.", priority);
2073                         return -1;
2074                 }
2075                 buf = buflist->buf;
2076
2077                 if ((*tail & (1 << 31)) && (priority != BEACON_PRIORITY)) {
2078                         DMESGW("No more TX desc, returning %x of %x",
2079                                remain, len);
2080                         priv->stats.txrdu++;
2081                         return remain;
2082                 }
2083
2084                 *tail = 0; // zeroes header
2085                 *(tail+1) = 0;
2086                 *(tail+3) = 0;
2087                 *(tail+5) = 0;
2088                 *(tail+6) = 0;
2089                 *(tail+7) = 0;
2090
2091                 /*FIXME: this should be triggered by HW encryption parameters.*/
2092                 *tail |= (1<<15); /* no encrypt */
2093
2094                 if (remain == len && !descfrag) {
2095                         ownbit_flag = false;
2096                         *tail = *tail | (1<<29) ; //fist segment of the packet
2097                         *tail = *tail | (len);
2098                 } else {
2099                         ownbit_flag = true;
2100                 }
2101
2102                 for (i = 0; i < buflen && remain > 0; i++, remain--) {
2103                         ((u8 *)buf)[i] = txbuf[i]; //copy data into descriptor pointed DMAble buffer
2104                         if (remain == 4 && i+4 >= buflen)
2105                                 break;
2106                         /* ensure the last desc has at least 4 bytes payload */
2107
2108                 }
2109                 txbuf = txbuf + i;
2110                 *(tail+3) = *(tail+3) & ~0xfff;
2111                 *(tail+3) = *(tail+3) | i; // buffer lenght
2112                 // Use short preamble or not
2113                 if (priv->ieee80211->current_network.capability&WLAN_CAPABILITY_SHORT_PREAMBLE)
2114                         if (priv->plcp_preamble_mode == 1 && rate != 0) //  short mode now, not long!
2115                         ;//     *tail |= (1<<16);                               // enable short preamble mode.
2116
2117                 if (bCTSEnable)
2118                         *tail |= (1<<18);
2119
2120                 if (bRTSEnable) { //rts enable
2121                         *tail |= ((ieeerate2rtlrate(priv->ieee80211->basic_rate))<<19);//RTS RATE
2122                         *tail |= (1<<23);//rts enable
2123                         *(tail+1) |= (RtsDur&0xffff);//RTS Duration
2124                 }
2125                 *(tail+3) |= ((TxDescDuration&0xffff)<<16); //DURATION
2126 //              *(tail+3) |= (0xe6<<16);
2127                 *(tail+5) |= (11<<8);//(priv->retry_data<<8); //retry lim ;
2128
2129                 *tail = *tail | ((rate&0xf) << 24);
2130
2131                 /* hw_plcp_len is not used for rtl8180 chip */
2132                 /* FIXME */
2133                 if (!priv->hw_plcp_len) {
2134                         duration = rtl8180_len2duration(len, rate, &ext);
2135                         *(tail+1) = *(tail+1) | ((duration & 0x7fff)<<16);
2136                         if (ext)
2137                                 *(tail+1) = *(tail+1) | (1<<31); //plcp length extension
2138                 }
2139
2140                 if (morefrag)
2141                         *tail = (*tail) | (1<<17); // more fragment
2142                 if (!remain)
2143                         *tail = (*tail) | (1<<28); // last segment of frame
2144
2145                 *(tail+5) = *(tail+5)|(2<<27);
2146                 *(tail+7) = *(tail+7)|(1<<4);
2147
2148                 wmb();
2149                 if (ownbit_flag)
2150                         *tail = *tail | (1<<31); // descriptor ready to be txed
2151
2152                 if ((tail - begin)/8 == count-1)
2153                         tail = begin;
2154                 else
2155                         tail = tail+8;
2156
2157                 buflist = buflist->next;
2158
2159                 mb();
2160
2161                 switch (priority) {
2162                 case MANAGE_PRIORITY:
2163                         priv->txmapringtail = tail;
2164                         priv->txmapbufstail = buflist;
2165                         break;
2166                 case BK_PRIORITY:
2167                         priv->txbkpringtail = tail;
2168                         priv->txbkpbufstail = buflist;
2169                         break;
2170                 case BE_PRIORITY:
2171                         priv->txbepringtail = tail;
2172                         priv->txbepbufstail = buflist;
2173                         break;
2174                 case VI_PRIORITY:
2175                         priv->txvipringtail = tail;
2176                         priv->txvipbufstail = buflist;
2177                         break;
2178                 case VO_PRIORITY:
2179                         priv->txvopringtail = tail;
2180                         priv->txvopbufstail = buflist;
2181                         break;
2182                 case HI_PRIORITY:
2183                         priv->txhpringtail = tail;
2184                         priv->txhpbufstail = buflist;
2185                         break;
2186                 case BEACON_PRIORITY:
2187                         /* the HW seems to be happy with the 1st
2188                          * descriptor filled and the 2nd empty...
2189                          * So always update descriptor 1 and never
2190                          * touch 2nd
2191                          */
2192                         break;
2193                 }
2194         }
2195         *temp_tail = *temp_tail | (1<<31); // descriptor ready to be txed
2196         rtl8180_dma_kick(dev, priority);
2197
2198         return 0;
2199 }
2200
2201 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv);
2202
2203 void rtl8180_link_change(struct net_device *dev)
2204 {
2205         struct r8180_priv *priv = ieee80211_priv(dev);
2206         u16 beacon_interval;
2207         struct ieee80211_network *net = &priv->ieee80211->current_network;
2208
2209         rtl8180_update_msr(dev);
2210
2211         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
2212
2213         write_nic_dword(dev, BSSID, ((u32 *)net->bssid)[0]);
2214         write_nic_word(dev, BSSID+4, ((u16 *)net->bssid)[2]);
2215
2216         beacon_interval  = read_nic_dword(dev, BEACON_INTERVAL);
2217         beacon_interval &= ~BEACON_INTERVAL_MASK;
2218         beacon_interval |= net->beacon_interval;
2219         write_nic_dword(dev, BEACON_INTERVAL, beacon_interval);
2220
2221         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
2222
2223         rtl8180_set_chan(dev, priv->chan);
2224 }
2225
2226 void rtl8180_rq_tx_ack(struct net_device *dev)
2227 {
2228
2229         struct r8180_priv *priv = ieee80211_priv(dev);
2230
2231         write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) | CONFIG4_PWRMGT);
2232         priv->ack_tx_to_ieee = 1;
2233 }
2234
2235 short rtl8180_is_tx_queue_empty(struct net_device *dev)
2236 {
2237
2238         struct r8180_priv *priv = ieee80211_priv(dev);
2239         u32 *d;
2240
2241         for (d = priv->txmapring;
2242                 d < priv->txmapring + priv->txringcount; d += 8)
2243                         if (*d & (1<<31))
2244                                 return 0;
2245
2246         for (d = priv->txbkpring;
2247                 d < priv->txbkpring + priv->txringcount; d += 8)
2248                         if (*d & (1<<31))
2249                                 return 0;
2250
2251         for (d = priv->txbepring;
2252                 d < priv->txbepring + priv->txringcount; d += 8)
2253                         if (*d & (1<<31))
2254                                 return 0;
2255
2256         for (d = priv->txvipring;
2257                 d < priv->txvipring + priv->txringcount; d += 8)
2258                         if (*d & (1<<31))
2259                                 return 0;
2260
2261         for (d = priv->txvopring;
2262                 d < priv->txvopring + priv->txringcount; d += 8)
2263                         if (*d & (1<<31))
2264                                 return 0;
2265
2266         for (d = priv->txhpring;
2267                 d < priv->txhpring + priv->txringcount; d += 8)
2268                         if (*d & (1<<31))
2269                                 return 0;
2270         return 1;
2271 }
2272 /* FIXME FIXME 5msecs is random */
2273 #define HW_WAKE_DELAY 5
2274
2275 void rtl8180_hw_wakeup(struct net_device *dev)
2276 {
2277         unsigned long flags;
2278         struct r8180_priv *priv = ieee80211_priv(dev);
2279
2280         spin_lock_irqsave(&priv->ps_lock, flags);
2281         write_nic_byte(dev, CONFIG4, read_nic_byte(dev, CONFIG4) & ~CONFIG4_PWRMGT);
2282         if (priv->rf_wakeup)
2283                 priv->rf_wakeup(dev);
2284         spin_unlock_irqrestore(&priv->ps_lock, flags);
2285 }
2286
2287 void rtl8180_hw_sleep_down(struct net_device *dev)
2288 {
2289         unsigned long flags;
2290         struct r8180_priv *priv = ieee80211_priv(dev);
2291
2292         spin_lock_irqsave(&priv->ps_lock, flags);
2293         if (priv->rf_sleep)
2294                 priv->rf_sleep(dev);
2295         spin_unlock_irqrestore(&priv->ps_lock, flags);
2296 }
2297
2298 void rtl8180_hw_sleep(struct net_device *dev, u32 th, u32 tl)
2299 {
2300         struct r8180_priv *priv = ieee80211_priv(dev);
2301         u32 rb = jiffies;
2302         unsigned long flags;
2303
2304         spin_lock_irqsave(&priv->ps_lock, flags);
2305
2306         /* Writing HW register with 0 equals to disable
2307          * the timer, that is not really what we want
2308          */
2309         tl -= MSECS(4+16+7);
2310
2311         /* If the interval in witch we are requested to sleep is too
2312          * short then give up and remain awake
2313          */
2314         if (((tl >= rb) && (tl-rb) <= MSECS(MIN_SLEEP_TIME))
2315                 || ((rb > tl) && (rb-tl) < MSECS(MIN_SLEEP_TIME))) {
2316                 spin_unlock_irqrestore(&priv->ps_lock, flags);
2317                 printk("too short to sleep\n");
2318                 return;
2319         }
2320
2321         {
2322                 u32 tmp = (tl > rb) ? (tl-rb) : (rb-tl);
2323
2324                 priv->DozePeriodInPast2Sec += jiffies_to_msecs(tmp);
2325
2326                 queue_delayed_work(priv->ieee80211->wq, &priv->ieee80211->hw_wakeup_wq, tmp); //as tl may be less than rb
2327         }
2328         /* if we suspect the TimerInt is gone beyond tl
2329          * while setting it, then give up
2330          */
2331
2332         if (((tl > rb) && ((tl-rb) > MSECS(MAX_SLEEP_TIME))) ||
2333                 ((tl < rb) && ((rb-tl) > MSECS(MAX_SLEEP_TIME)))) {
2334                 spin_unlock_irqrestore(&priv->ps_lock, flags);
2335                 return;
2336         }
2337
2338         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_sleep_wq);
2339         spin_unlock_irqrestore(&priv->ps_lock, flags);
2340 }
2341
2342 void rtl8180_wmm_param_update(struct work_struct *work)
2343 {
2344         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, wmm_param_update_wq);
2345         struct net_device *dev = ieee->dev;
2346         u8 *ac_param = (u8 *)(ieee->current_network.wmm_param);
2347         u8 mode = ieee->current_network.mode;
2348         AC_CODING       eACI;
2349         AC_PARAM        AcParam;
2350         PAC_PARAM       pAcParam;
2351         u8 i;
2352
2353         if (!ieee->current_network.QoS_Enable) {
2354                 //legacy ac_xx_param update
2355                 AcParam.longData = 0;
2356                 AcParam.f.AciAifsn.f.AIFSN = 2; // Follow 802.11 DIFS.
2357                 AcParam.f.AciAifsn.f.ACM = 0;
2358                 AcParam.f.Ecw.f.ECWmin = 3; // Follow 802.11 CWmin.
2359                 AcParam.f.Ecw.f.ECWmax = 7; // Follow 802.11 CWmax.
2360                 AcParam.f.TXOPLimit = 0;
2361                 for (eACI = 0; eACI < AC_MAX; eACI++) {
2362                         AcParam.f.AciAifsn.f.ACI = (u8)eACI;
2363                         {
2364                                 u8              u1bAIFS;
2365                                 u32             u4bAcParam;
2366                                 pAcParam = (PAC_PARAM)(&AcParam);
2367                                 // Retrive paramters to udpate.
2368                                 u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2369                                 u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit))<<AC_PARAM_TXOP_LIMIT_OFFSET)|
2370                                               (((u32)(pAcParam->f.Ecw.f.ECWmax))<<AC_PARAM_ECW_MAX_OFFSET)|
2371                                               (((u32)(pAcParam->f.Ecw.f.ECWmin))<<AC_PARAM_ECW_MIN_OFFSET)|
2372                                                (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2373                                 switch (eACI) {
2374                                 case AC1_BK:
2375                                         write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2376                                         break;
2377                                 case AC0_BE:
2378                                         write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2379                                         break;
2380                                 case AC2_VI:
2381                                         write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2382                                         break;
2383                                 case AC3_VO:
2384                                         write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2385                                         break;
2386                                 default:
2387                                         printk(KERN_WARNING "SetHwReg8185():invalid ACI: %d!\n", eACI);
2388                                         break;
2389                                 }
2390                         }
2391                 }
2392                 return;
2393         }
2394
2395         for (i = 0; i < AC_MAX; i++) {
2396                 //AcParam.longData = 0;
2397                 pAcParam = (AC_PARAM *)ac_param;
2398                 {
2399                         AC_CODING       eACI;
2400                         u8              u1bAIFS;
2401                         u32             u4bAcParam;
2402
2403                         // Retrive paramters to udpate.
2404                         eACI = pAcParam->f.AciAifsn.f.ACI;
2405                         //Mode G/A: slotTimeTimer = 9; Mode B: 20
2406                         u1bAIFS = pAcParam->f.AciAifsn.f.AIFSN * (((mode&IEEE_G) == IEEE_G) ? 9 : 20) + aSifsTime;
2407                         u4bAcParam = ((((u32)(pAcParam->f.TXOPLimit)) << AC_PARAM_TXOP_LIMIT_OFFSET)    |
2408                                         (((u32)(pAcParam->f.Ecw.f.ECWmax)) << AC_PARAM_ECW_MAX_OFFSET)  |
2409                                         (((u32)(pAcParam->f.Ecw.f.ECWmin)) << AC_PARAM_ECW_MIN_OFFSET)  |
2410                                         (((u32)u1bAIFS) << AC_PARAM_AIFS_OFFSET));
2411
2412                         switch (eACI) {
2413                         case AC1_BK:
2414                                 write_nic_dword(dev, AC_BK_PARAM, u4bAcParam);
2415                                 break;
2416                         case AC0_BE:
2417                                 write_nic_dword(dev, AC_BE_PARAM, u4bAcParam);
2418                                 break;
2419                         case AC2_VI:
2420                                 write_nic_dword(dev, AC_VI_PARAM, u4bAcParam);
2421                                 break;
2422                         case AC3_VO:
2423                                 write_nic_dword(dev, AC_VO_PARAM, u4bAcParam);
2424                                 break;
2425                         default:
2426                                 printk(KERN_WARNING "SetHwReg8185(): invalid ACI: %d !\n", eACI);
2427                                 break;
2428                         }
2429                 }
2430                 ac_param += (sizeof(AC_PARAM));
2431         }
2432 }
2433
2434 void rtl8180_tx_irq_wq(struct work_struct *work);
2435 void rtl8180_restart_wq(struct work_struct *work);
2436 //void rtl8180_rq_tx_ack(struct work_struct *work);
2437 void rtl8180_watch_dog_wq(struct work_struct *work);
2438 void rtl8180_hw_wakeup_wq(struct work_struct *work);
2439 void rtl8180_hw_sleep_wq(struct work_struct *work);
2440 void rtl8180_sw_antenna_wq(struct work_struct *work);
2441 void rtl8180_watch_dog(struct net_device *dev);
2442
2443 void watch_dog_adaptive(unsigned long data)
2444 {
2445         struct r8180_priv* priv = ieee80211_priv((struct net_device *)data);
2446
2447         if (!priv->up) {
2448                 DMESG("<----watch_dog_adaptive():driver is not up!\n");
2449                 return;
2450         }
2451
2452         // Tx High Power Mechanism.
2453         if (CheckHighPower((struct net_device *)data))
2454                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->tx_pw_wq);
2455
2456         // Tx Power Tracking on 87SE.
2457         if (CheckTxPwrTracking((struct net_device *)data))
2458                 TxPwrTracking87SE((struct net_device *)data);
2459
2460         // Perform DIG immediately.
2461         if (CheckDig((struct net_device *)data) == true)
2462                 queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->hw_dig_wq);
2463         rtl8180_watch_dog((struct net_device *)data);
2464
2465         queue_work(priv->ieee80211->wq, (void *)&priv->ieee80211->GPIOChangeRFWorkItem);
2466
2467         priv->watch_dog_timer.expires = jiffies + MSECS(IEEE80211_WATCH_DOG_TIME);
2468         add_timer(&priv->watch_dog_timer);
2469 }
2470
2471 static CHANNEL_LIST ChannelPlan[] = {
2472         {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19},         //FCC
2473         {{1,2,3,4,5,6,7,8,9,10,11},11},                                 //IC
2474         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //ETSI
2475         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //Spain. Change to ETSI.
2476         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //France. Change to ETSI.
2477         {{14,36,40,44,48,52,56,60,64},9},                               //MKK
2478         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14, 36,40,44,48,52,56,60,64},22},//MKK1
2479         {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21},   //Israel.
2480         {{1,2,3,4,5,6,7,8,9,10,11,12,13,34,38,42,46},17},               // For 11a , TELEC
2481         {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14},  //For Global Domain. 1-11:active scan, 12-14 passive scan. //+YJ, 080626
2482         {{1,2,3,4,5,6,7,8,9,10,11,12,13},13} //world wide 13: ch1~ch11 active scan, ch12~13 passive //lzm add 080826
2483 };
2484
2485 static void rtl8180_set_channel_map(u8 channel_plan, struct ieee80211_device *ieee)
2486 {
2487         int i;
2488
2489         //lzm add 080826
2490         ieee->MinPassiveChnlNum = MAX_CHANNEL_NUMBER+1;
2491         ieee->IbssStartChnl = 0;
2492
2493         switch (channel_plan) {
2494         case COUNTRY_CODE_FCC:
2495         case COUNTRY_CODE_IC:
2496         case COUNTRY_CODE_ETSI:
2497         case COUNTRY_CODE_SPAIN:
2498         case COUNTRY_CODE_FRANCE:
2499         case COUNTRY_CODE_MKK:
2500         case COUNTRY_CODE_MKK1:
2501         case COUNTRY_CODE_ISRAEL:
2502         case COUNTRY_CODE_TELEC:
2503                 {
2504                         Dot11d_Init(ieee);
2505                         ieee->bGlobalDomain = false;
2506                         if (ChannelPlan[channel_plan].Len != 0) {
2507                                 // Clear old channel map
2508                                 memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2509                                 // Set new channel map
2510                                 for (i = 0; i < ChannelPlan[channel_plan].Len; i++) {
2511                                         if (ChannelPlan[channel_plan].Channel[i] <= 14)
2512                                                 GET_DOT11D_INFO(ieee)->channel_map[ChannelPlan[channel_plan].Channel[i]] = 1;
2513                                 }
2514                         }
2515                         break;
2516                 }
2517         case COUNTRY_CODE_GLOBAL_DOMAIN:
2518                 {
2519                         GET_DOT11D_INFO(ieee)->bEnabled = 0;
2520                         Dot11d_Reset(ieee);
2521                         ieee->bGlobalDomain = true;
2522                         break;
2523                 }
2524         case COUNTRY_CODE_WORLD_WIDE_13_INDEX://lzm add 080826
2525                 {
2526                         ieee->MinPassiveChnlNum = 12;
2527                         ieee->IbssStartChnl = 10;
2528                         break;
2529                 }
2530         default:
2531                 {
2532                         Dot11d_Init(ieee);
2533                         ieee->bGlobalDomain = false;
2534                         memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
2535                         for (i = 1; i <= 14; i++)
2536                                 GET_DOT11D_INFO(ieee)->channel_map[i] = 1;
2537                         break;
2538                 }
2539         }
2540 }
2541
2542 void GPIOChangeRFWorkItemCallBack(struct work_struct *work);
2543
2544 //YJ,add,080828
2545 static void rtl8180_statistics_init(struct Stats *pstats)
2546 {
2547         memset(pstats, 0, sizeof(struct Stats));
2548 }
2549
2550 static void rtl8180_link_detect_init(plink_detect_t plink_detect)
2551 {
2552         memset(plink_detect, 0, sizeof(link_detect_t));
2553         plink_detect->SlotNum = DEFAULT_SLOT_NUM;
2554 }
2555 //YJ,add,080828,end
2556
2557 static void rtl8187se_eeprom_register_read(struct eeprom_93cx6 *eeprom)
2558 {
2559         struct net_device *dev = eeprom->data;
2560         u8 reg = read_nic_byte(dev, EPROM_CMD);
2561
2562         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
2563         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
2564         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
2565         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
2566 }
2567
2568 static void rtl8187se_eeprom_register_write(struct eeprom_93cx6 *eeprom)
2569 {
2570         struct net_device *dev = eeprom->data;
2571         u8 reg = 2 << 6;
2572
2573         if (eeprom->reg_data_in)
2574                 reg |= RTL818X_EEPROM_CMD_WRITE;
2575         if (eeprom->reg_data_out)
2576                 reg |= RTL818X_EEPROM_CMD_READ;
2577         if (eeprom->reg_data_clock)
2578                 reg |= RTL818X_EEPROM_CMD_CK;
2579         if (eeprom->reg_chip_select)
2580                 reg |= RTL818X_EEPROM_CMD_CS;
2581
2582         write_nic_byte(dev, EPROM_CMD, reg);
2583         read_nic_byte(dev, EPROM_CMD);
2584         udelay(10);
2585 }
2586
2587 short rtl8180_init(struct net_device *dev)
2588 {
2589         struct r8180_priv *priv = ieee80211_priv(dev);
2590         u16 word;
2591         u16 version;
2592         u32 usValue;
2593         u16 tmpu16;
2594         int i, j;
2595         struct eeprom_93cx6 eeprom;
2596         u16 eeprom_val;
2597
2598         eeprom.data = dev;
2599         eeprom.register_read = rtl8187se_eeprom_register_read;
2600         eeprom.register_write = rtl8187se_eeprom_register_write;
2601         eeprom.width = PCI_EEPROM_WIDTH_93C46;
2602
2603         eeprom_93cx6_read(&eeprom, EEPROM_COUNTRY_CODE>>1, &eeprom_val);
2604         priv->channel_plan = eeprom_val & 0xFF;
2605         if (priv->channel_plan > COUNTRY_CODE_GLOBAL_DOMAIN) {
2606                 printk("rtl8180_init:Error channel plan! Set to default.\n");
2607                 priv->channel_plan = 0;
2608         }
2609
2610         DMESG("Channel plan is %d\n", priv->channel_plan);
2611         rtl8180_set_channel_map(priv->channel_plan, priv->ieee80211);
2612
2613         //FIXME: these constants are placed in a bad pleace.
2614         priv->txbuffsize = 2048;//1024;
2615         priv->txringcount = 32;//32;
2616         priv->rxbuffersize = 2048;//1024;
2617         priv->rxringcount = 64;//32;
2618         priv->txbeaconcount = 2;
2619         priv->rx_skb_complete = 1;
2620
2621         priv->RFChangeInProgress = false;
2622         priv->SetRFPowerStateInProgress = false;
2623         priv->RFProgType = 0;
2624         priv->bInHctTest = false;
2625
2626         priv->irq_enabled = 0;
2627
2628         rtl8180_statistics_init(&priv->stats);
2629         rtl8180_link_detect_init(&priv->link_detect);
2630
2631         priv->ack_tx_to_ieee = 0;
2632         priv->ieee80211->current_network.beacon_interval = DEFAULT_BEACONINTERVAL;
2633         priv->ieee80211->iw_mode = IW_MODE_INFRA;
2634         priv->ieee80211->softmac_features  = IEEE_SOFTMAC_SCAN |
2635                 IEEE_SOFTMAC_ASSOCIATE | IEEE_SOFTMAC_PROBERQ |
2636                 IEEE_SOFTMAC_PROBERS | IEEE_SOFTMAC_TX_QUEUE;
2637         priv->ieee80211->active_scan = 1;
2638         priv->ieee80211->rate = 110; //11 mbps
2639         priv->ieee80211->modulation = IEEE80211_CCK_MODULATION;
2640         priv->ieee80211->host_encrypt = 1;
2641         priv->ieee80211->host_decrypt = 1;
2642         priv->ieee80211->sta_wake_up = rtl8180_hw_wakeup;
2643         priv->ieee80211->ps_request_tx_ack = rtl8180_rq_tx_ack;
2644         priv->ieee80211->enter_sleep_state = rtl8180_hw_sleep;
2645         priv->ieee80211->ps_is_queue_empty = rtl8180_is_tx_queue_empty;
2646
2647         priv->hw_wep = hwwep;
2648         priv->prism_hdr = 0;
2649         priv->dev = dev;
2650         priv->retry_rts = DEFAULT_RETRY_RTS;
2651         priv->retry_data = DEFAULT_RETRY_DATA;
2652         priv->RFChangeInProgress = false;
2653         priv->SetRFPowerStateInProgress = false;
2654         priv->RFProgType = 0;
2655         priv->bInHctTest = false;
2656         priv->bInactivePs = true;//false;
2657         priv->ieee80211->bInactivePs = priv->bInactivePs;
2658         priv->bSwRfProcessing = false;
2659         priv->eRFPowerState = eRfOff;
2660         priv->RfOffReason = 0;
2661         priv->LedStrategy = SW_LED_MODE0;
2662         priv->TxPollingTimes = 0;//lzm add 080826
2663         priv->bLeisurePs = true;
2664         priv->dot11PowerSaveMode = eActive;
2665         priv->AdMinCheckPeriod = 5;
2666         priv->AdMaxCheckPeriod = 10;
2667         priv->AdMaxRxSsThreshold = 30;//60->30
2668         priv->AdRxSsThreshold = 20;//50->20
2669         priv->AdCheckPeriod = priv->AdMinCheckPeriod;
2670         priv->AdTickCount = 0;
2671         priv->AdRxSignalStrength = -1;
2672         priv->RegSwAntennaDiversityMechanism = 0;
2673         priv->RegDefaultAntenna = 0;
2674         priv->SignalStrength = 0;
2675         priv->AdRxOkCnt = 0;
2676         priv->CurrAntennaIndex = 0;
2677         priv->AdRxSsBeforeSwitched = 0;
2678         init_timer(&priv->SwAntennaDiversityTimer);
2679         priv->SwAntennaDiversityTimer.data = (unsigned long)dev;
2680         priv->SwAntennaDiversityTimer.function = (void *)SwAntennaDiversityTimerCallback;
2681         priv->bDigMechanism = 1;
2682         priv->InitialGain = 6;
2683         priv->bXtalCalibration = false;
2684         priv->XtalCal_Xin = 0;
2685         priv->XtalCal_Xout = 0;
2686         priv->bTxPowerTrack = false;
2687         priv->ThermalMeter = 0;
2688         priv->FalseAlarmRegValue = 0;
2689         priv->RegDigOfdmFaUpTh = 0xc; // Upper threhold of OFDM false alarm, which is used in DIG.
2690         priv->DIG_NumberFallbackVote = 0;
2691         priv->DIG_NumberUpgradeVote = 0;
2692         priv->LastSignalStrengthInPercent = 0;
2693         priv->Stats_SignalStrength = 0;
2694         priv->LastRxPktAntenna = 0;
2695         priv->SignalQuality = 0; // in 0-100 index.
2696         priv->Stats_SignalQuality = 0;
2697         priv->RecvSignalPower = 0; // in dBm.
2698         priv->Stats_RecvSignalPower = 0;
2699         priv->AdMainAntennaRxOkCnt = 0;
2700         priv->AdAuxAntennaRxOkCnt = 0;
2701         priv->bHWAdSwitched = false;
2702         priv->bRegHighPowerMechanism = true;
2703         priv->RegHiPwrUpperTh = 77;
2704         priv->RegHiPwrLowerTh = 75;
2705         priv->RegRSSIHiPwrUpperTh = 70;
2706         priv->RegRSSIHiPwrLowerTh = 20;
2707         priv->bCurCCKPkt = false;
2708         priv->UndecoratedSmoothedSS = -1;
2709         priv->bToUpdateTxPwr = false;
2710         priv->CurCCKRSSI = 0;
2711         priv->RxPower = 0;
2712         priv->RSSI = 0;
2713         priv->NumTxOkTotal = 0;
2714         priv->NumTxUnicast = 0;
2715         priv->keepAliveLevel = DEFAULT_KEEP_ALIVE_LEVEL;
2716         priv->PowerProfile = POWER_PROFILE_AC;
2717         priv->CurrRetryCnt = 0;
2718         priv->LastRetryCnt = 0;
2719         priv->LastTxokCnt = 0;
2720         priv->LastRxokCnt = 0;
2721         priv->LastRetryRate = 0;
2722         priv->bTryuping = 0;
2723         priv->CurrTxRate = 0;
2724         priv->CurrRetryRate = 0;
2725         priv->TryupingCount = 0;
2726         priv->TryupingCountNoData = 0;
2727         priv->TryDownCountLowData = 0;
2728         priv->LastTxOKBytes = 0;
2729         priv->LastFailTxRate = 0;
2730         priv->LastFailTxRateSS = 0;
2731         priv->FailTxRateCount = 0;
2732         priv->LastTxThroughput = 0;
2733         priv->NumTxOkBytesTotal = 0;
2734         priv->ForcedDataRate = 0;
2735         priv->RegBModeGainStage = 1;
2736
2737         priv->promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
2738         spin_lock_init(&priv->irq_lock);
2739         spin_lock_init(&priv->irq_th_lock);
2740         spin_lock_init(&priv->tx_lock);
2741         spin_lock_init(&priv->ps_lock);
2742         spin_lock_init(&priv->rf_ps_lock);
2743         sema_init(&priv->wx_sem, 1);
2744         sema_init(&priv->rf_state, 1);
2745         INIT_WORK(&priv->reset_wq, (void *)rtl8180_restart_wq);
2746         INIT_WORK(&priv->tx_irq_wq, (void *)rtl8180_tx_irq_wq);
2747         INIT_DELAYED_WORK(&priv->ieee80211->hw_wakeup_wq,
2748                           (void *)rtl8180_hw_wakeup_wq);
2749         INIT_DELAYED_WORK(&priv->ieee80211->hw_sleep_wq,
2750                           (void *)rtl8180_hw_sleep_wq);
2751         INIT_WORK(&priv->ieee80211->wmm_param_update_wq,
2752                   (void *)rtl8180_wmm_param_update);
2753         INIT_DELAYED_WORK(&priv->ieee80211->rate_adapter_wq,
2754                           (void *)rtl8180_rate_adapter);
2755         INIT_DELAYED_WORK(&priv->ieee80211->hw_dig_wq,
2756                          (void *)rtl8180_hw_dig_wq);
2757         INIT_DELAYED_WORK(&priv->ieee80211->tx_pw_wq,
2758                          (void *)rtl8180_tx_pw_wq);
2759         INIT_DELAYED_WORK(&priv->ieee80211->GPIOChangeRFWorkItem,
2760                          (void *) GPIOChangeRFWorkItemCallBack);
2761         tasklet_init(&priv->irq_rx_tasklet,
2762                      (void(*)(unsigned long)) rtl8180_irq_rx_tasklet,
2763                      (unsigned long)priv);
2764
2765         init_timer(&priv->watch_dog_timer);
2766         priv->watch_dog_timer.data = (unsigned long)dev;
2767         priv->watch_dog_timer.function = watch_dog_adaptive;
2768
2769         init_timer(&priv->rateadapter_timer);
2770         priv->rateadapter_timer.data = (unsigned long)dev;
2771         priv->rateadapter_timer.function = timer_rate_adaptive;
2772         priv->RateAdaptivePeriod = RATE_ADAPTIVE_TIMER_PERIOD;
2773         priv->bEnhanceTxPwr = false;
2774
2775         priv->ieee80211->softmac_hard_start_xmit = rtl8180_hard_start_xmit;
2776         priv->ieee80211->set_chan = rtl8180_set_chan;
2777         priv->ieee80211->link_change = rtl8180_link_change;
2778         priv->ieee80211->softmac_data_hard_start_xmit = rtl8180_hard_data_xmit;
2779         priv->ieee80211->data_hard_stop = rtl8180_data_hard_stop;
2780         priv->ieee80211->data_hard_resume = rtl8180_data_hard_resume;
2781
2782         priv->ieee80211->init_wmmparam_flag = 0;
2783
2784         priv->ieee80211->start_send_beacons = rtl8180_start_tx_beacon;
2785         priv->ieee80211->stop_send_beacons = rtl8180_beacon_tx_disable;
2786         priv->ieee80211->fts = DEFAULT_FRAG_THRESHOLD;
2787
2788         priv->MWIEnable = 0;
2789
2790         priv->ShortRetryLimit = 7;
2791         priv->LongRetryLimit = 7;
2792         priv->EarlyRxThreshold = 7;
2793
2794         priv->CSMethod = (0x01 << 29);
2795
2796         priv->TransmitConfig =  TCR_DurProcMode_OFFSET |
2797                                 (7<<TCR_MXDMA_OFFSET) |
2798                                 (priv->ShortRetryLimit<<TCR_SRL_OFFSET) |
2799                                 (priv->LongRetryLimit<<TCR_LRL_OFFSET) |
2800                                 (0 ? TCR_SAT : 0);
2801
2802         priv->ReceiveConfig =   RCR_AMF | RCR_ADF | RCR_ACF |
2803                                 RCR_AB | RCR_AM | RCR_APM |
2804                                 (7<<RCR_MXDMA_OFFSET) |
2805                                 (priv->EarlyRxThreshold<<RCR_FIFO_OFFSET) |
2806                                 (priv->EarlyRxThreshold == 7 ?
2807                                          RCR_ONLYERLPKT : 0);
2808
2809         priv->IntrMask          = IMR_TMGDOK | IMR_TBDER | IMR_THPDER |
2810                                   IMR_THPDER | IMR_THPDOK |
2811                                   IMR_TVODER | IMR_TVODOK |
2812                                   IMR_TVIDER | IMR_TVIDOK |
2813                                   IMR_TBEDER | IMR_TBEDOK |
2814                                   IMR_TBKDER | IMR_TBKDOK |
2815                                   IMR_RDU |
2816                                   IMR_RER | IMR_ROK |
2817                                   IMR_RQoSOK;
2818
2819         priv->InitialGain = 6;
2820
2821         DMESG("MAC controller is a RTL8187SE b/g");
2822         priv->phy_ver = 2;
2823
2824         priv->ieee80211->modulation |= IEEE80211_OFDM_MODULATION;
2825         priv->ieee80211->short_slot = 1;
2826
2827         // just for sync 85
2828         priv->enable_gpio0 = 0;
2829
2830         eeprom_93cx6_read(&eeprom, EEPROM_SW_REVD_OFFSET, &eeprom_val);
2831         usValue = eeprom_val;
2832         DMESG("usValue is 0x%x\n", usValue);
2833         //3Read AntennaDiversity
2834
2835         // SW Antenna Diversity.
2836         if ((usValue & EEPROM_SW_AD_MASK) != EEPROM_SW_AD_ENABLE)
2837                 priv->EEPROMSwAntennaDiversity = false;
2838         else
2839                 priv->EEPROMSwAntennaDiversity = true;
2840
2841         // Default Antenna to use.
2842         if ((usValue & EEPROM_DEF_ANT_MASK) != EEPROM_DEF_ANT_1)
2843                 priv->EEPROMDefaultAntenna1 = false;
2844         else
2845                 priv->EEPROMDefaultAntenna1 = true;
2846
2847         if (priv->RegSwAntennaDiversityMechanism == 0) // Auto
2848                 /* 0: default from EEPROM. */
2849                 priv->bSwAntennaDiverity = priv->EEPROMSwAntennaDiversity;
2850         else
2851                 /* 1:disable antenna diversity, 2: enable antenna diversity. */
2852                 priv->bSwAntennaDiverity = ((priv->RegSwAntennaDiversityMechanism == 1) ? false : true);
2853
2854         if (priv->RegDefaultAntenna == 0)
2855                 /* 0: default from EEPROM. */
2856                 priv->bDefaultAntenna1 = priv->EEPROMDefaultAntenna1;
2857         else
2858                 /* 1: main, 2: aux. */
2859                 priv->bDefaultAntenna1 = ((priv->RegDefaultAntenna == 2) ? true : false);
2860
2861         /* rtl8185 can calc plcp len in HW.*/
2862         priv->hw_plcp_len = 1;
2863
2864         priv->plcp_preamble_mode = 2;
2865         /*the eeprom type is stored in RCR register bit #6 */
2866         if (RCR_9356SEL & read_nic_dword(dev, RCR))
2867                 priv->epromtype = EPROM_93c56;
2868         else
2869                 priv->epromtype = EPROM_93c46;
2870
2871         eeprom_93cx6_multiread(&eeprom, 0x7, (__le16 *)
2872                                dev->dev_addr, 3);
2873
2874         for (i = 1, j = 0; i < 14; i += 2, j++) {
2875                 eeprom_93cx6_read(&eeprom, EPROM_TXPW_CH1_2 + j, &word);
2876                 priv->chtxpwr[i] = word & 0xff;
2877                 priv->chtxpwr[i+1] = (word & 0xff00)>>8;
2878         }
2879         for (i = 1, j = 0; i < 14; i += 2, j++) {
2880                 eeprom_93cx6_read(&eeprom, EPROM_TXPW_OFDM_CH1_2 + j, &word);
2881                 priv->chtxpwr_ofdm[i] = word & 0xff;
2882                 priv->chtxpwr_ofdm[i+1] = (word & 0xff00) >> 8;
2883         }
2884
2885         /* 3Read crystal calibtration and thermal meter indication on 87SE. */
2886         eeprom_93cx6_read(&eeprom, EEPROM_RSV>>1, &tmpu16);
2887
2888         /* Crystal calibration for Xin and Xout resp. */
2889         priv->XtalCal_Xout = tmpu16 & EEPROM_XTAL_CAL_XOUT_MASK;
2890         priv->XtalCal_Xin = (tmpu16 & EEPROM_XTAL_CAL_XIN_MASK) >> 4;
2891         if ((tmpu16 & EEPROM_XTAL_CAL_ENABLE) >> 12)
2892                 priv->bXtalCalibration = true;
2893
2894         /* Thermal meter reference indication. */
2895         priv->ThermalMeter =  (u8)((tmpu16 & EEPROM_THERMAL_METER_MASK) >> 8);
2896         if ((tmpu16 & EEPROM_THERMAL_METER_ENABLE) >> 13)
2897                 priv->bTxPowerTrack = true;
2898
2899         eeprom_93cx6_read(&eeprom, EPROM_TXPW_BASE, &word);
2900         priv->cck_txpwr_base = word & 0xf;
2901         priv->ofdm_txpwr_base = (word>>4) & 0xf;
2902
2903         eeprom_93cx6_read(&eeprom, EPROM_VERSION, &version);
2904         DMESG("EEPROM version %x", version);
2905         priv->rcr_csense = 3;
2906
2907         eeprom_93cx6_read(&eeprom, ENERGY_TRESHOLD, &eeprom_val);
2908         priv->cs_treshold = (eeprom_val & 0xff00) >> 8;
2909
2910         eeprom_93cx6_read(&eeprom, RFCHIPID, &eeprom_val);
2911         priv->rf_sleep = rtl8225z4_rf_sleep;
2912         priv->rf_wakeup = rtl8225z4_rf_wakeup;
2913         DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
2914
2915         priv->rf_close = rtl8225z2_rf_close;
2916         priv->rf_init = rtl8225z2_rf_init;
2917         priv->rf_set_chan = rtl8225z2_rf_set_chan;
2918         priv->rf_set_sens = NULL;
2919
2920         if (0 != alloc_rx_desc_ring(dev, priv->rxbuffersize, priv->rxringcount))
2921                 return -ENOMEM;
2922
2923         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2924                                   TX_MANAGEPRIORITY_RING_ADDR))
2925                 return -ENOMEM;
2926
2927         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2928                                  TX_BKPRIORITY_RING_ADDR))
2929                 return -ENOMEM;
2930
2931         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2932                                  TX_BEPRIORITY_RING_ADDR))
2933                 return -ENOMEM;
2934
2935         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2936                                   TX_VIPRIORITY_RING_ADDR))
2937                 return -ENOMEM;
2938
2939         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2940                                   TX_VOPRIORITY_RING_ADDR))
2941                 return -ENOMEM;
2942
2943         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txringcount,
2944                                   TX_HIGHPRIORITY_RING_ADDR))
2945                 return -ENOMEM;
2946
2947         if (0 != alloc_tx_desc_ring(dev, priv->txbuffsize, priv->txbeaconcount,
2948                                   TX_BEACON_RING_ADDR))
2949                 return -ENOMEM;
2950
2951         if (request_irq(dev->irq, (void *)rtl8180_interrupt, IRQF_SHARED, dev->name, dev)) {
2952                 DMESGE("Error allocating IRQ %d", dev->irq);
2953                 return -1;
2954         } else {
2955                 priv->irq = dev->irq;
2956                 DMESG("IRQ %d", dev->irq);
2957         }
2958
2959         return 0;
2960 }
2961
2962 void rtl8180_no_hw_wep(struct net_device *dev)
2963 {
2964 }
2965
2966 void rtl8180_set_hw_wep(struct net_device *dev)
2967 {
2968         struct r8180_priv *priv = ieee80211_priv(dev);
2969         u8 pgreg;
2970         u8 security;
2971         u32 key0_word4;
2972
2973         pgreg = read_nic_byte(dev, PGSELECT);
2974         write_nic_byte(dev, PGSELECT, pgreg & ~(1<<PGSELECT_PG_SHIFT));
2975
2976         key0_word4 = read_nic_dword(dev, KEY0+4+4+4);
2977         key0_word4 &= ~0xff;
2978         key0_word4 |= priv->key0[3] & 0xff;
2979         write_nic_dword(dev, KEY0, (priv->key0[0]));
2980         write_nic_dword(dev, KEY0+4, (priv->key0[1]));
2981         write_nic_dword(dev, KEY0+4+4, (priv->key0[2]));
2982         write_nic_dword(dev, KEY0+4+4+4, (key0_word4));
2983
2984         security  = read_nic_byte(dev, SECURITY);
2985         security |= (1<<SECURITY_WEP_TX_ENABLE_SHIFT);
2986         security |= (1<<SECURITY_WEP_RX_ENABLE_SHIFT);
2987         security &= ~SECURITY_ENCRYP_MASK;
2988         security |= (SECURITY_ENCRYP_104<<SECURITY_ENCRYP_SHIFT);
2989
2990         write_nic_byte(dev, SECURITY, security);
2991
2992         DMESG("key %x %x %x %x", read_nic_dword(dev, KEY0+4+4+4),
2993               read_nic_dword(dev, KEY0+4+4), read_nic_dword(dev, KEY0+4),
2994               read_nic_dword(dev, KEY0));
2995 }
2996
2997
2998 void rtl8185_rf_pins_enable(struct net_device *dev)
2999 {
3000 //      u16 tmp;
3001 //      tmp = read_nic_word(dev, RFPinsEnable);
3002         write_nic_word(dev, RFPinsEnable, 0x1fff);// | tmp);
3003 }
3004
3005 void rtl8185_set_anaparam2(struct net_device *dev, u32 a)
3006 {
3007         u8 conf3;
3008
3009         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3010
3011         conf3 = read_nic_byte(dev, CONFIG3);
3012         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
3013         write_nic_dword(dev, ANAPARAM2, a);
3014
3015         conf3 = read_nic_byte(dev, CONFIG3);
3016         write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3017         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3018 }
3019
3020 void rtl8180_set_anaparam(struct net_device *dev, u32 a)
3021 {
3022         u8 conf3;
3023
3024         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3025
3026         conf3 = read_nic_byte(dev, CONFIG3);
3027         write_nic_byte(dev, CONFIG3, conf3 | (1<<CONFIG3_ANAPARAM_W_SHIFT));
3028         write_nic_dword(dev, ANAPARAM, a);
3029
3030         conf3 = read_nic_byte(dev, CONFIG3);
3031         write_nic_byte(dev, CONFIG3, conf3 & ~(1<<CONFIG3_ANAPARAM_W_SHIFT));
3032         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3033 }
3034
3035 void rtl8185_tx_antenna(struct net_device *dev, u8 ant)
3036 {
3037         write_nic_byte(dev, TX_ANTENNA, ant);
3038         force_pci_posting(dev);
3039         mdelay(1);
3040 }
3041
3042 void rtl8185_write_phy(struct net_device *dev, u8 adr, u32 data)
3043 {
3044         u32 phyw;
3045
3046         adr |= 0x80;
3047
3048         phyw = ((data<<8) | adr);
3049
3050         // Note that, we must write 0xff7c after 0x7d-0x7f to write BB register.
3051         write_nic_byte(dev, 0x7f, ((phyw & 0xff000000) >> 24));
3052         write_nic_byte(dev, 0x7e, ((phyw & 0x00ff0000) >> 16));
3053         write_nic_byte(dev, 0x7d, ((phyw & 0x0000ff00) >> 8));
3054         write_nic_byte(dev, 0x7c, ((phyw & 0x000000ff)));
3055
3056         /* this is ok to fail when we write AGC table. check for AGC table might be
3057          * done by masking with 0x7f instead of 0xff
3058          */
3059         //if(phyr != (data&0xff)) DMESGW("Phy write timeout %x %x %x", phyr, data,adr);
3060 }
3061
3062 inline void write_phy_ofdm(struct net_device *dev, u8 adr, u32 data)
3063 {
3064         data = data & 0xff;
3065         rtl8185_write_phy(dev, adr, data);
3066 }
3067
3068 void write_phy_cck(struct net_device *dev, u8 adr, u32 data)
3069 {
3070         data = data & 0xff;
3071         rtl8185_write_phy(dev, adr, data | 0x10000);
3072 }
3073
3074 void rtl8185_set_rate(struct net_device *dev)
3075 {
3076         int i;
3077         u16 word;
3078         int basic_rate, min_rr_rate, max_rr_rate;
3079
3080         basic_rate = ieeerate2rtlrate(240);
3081         min_rr_rate = ieeerate2rtlrate(60);
3082         max_rr_rate = ieeerate2rtlrate(240);
3083
3084         write_nic_byte(dev, RESP_RATE,
3085                         max_rr_rate<<MAX_RESP_RATE_SHIFT | min_rr_rate<<MIN_RESP_RATE_SHIFT);
3086
3087         word  = read_nic_word(dev, BRSR);
3088         word &= ~BRSR_MBR_8185;
3089
3090         for (i = 0; i <= basic_rate; i++)
3091                 word |= (1<<i);
3092
3093         write_nic_word(dev, BRSR, word);
3094 }
3095
3096 void rtl8180_adapter_start(struct net_device *dev)
3097 {
3098         struct r8180_priv *priv = ieee80211_priv(dev);
3099
3100         rtl8180_rtx_disable(dev);
3101         rtl8180_reset(dev);
3102
3103         /* enable beacon timeout, beacon TX ok and err
3104          * LP tx ok and err, HP TX ok and err, NP TX ok and err,
3105          * RX ok and ERR, and GP timer */
3106         priv->irq_mask = 0x6fcf;
3107
3108         priv->dma_poll_mask = 0;
3109
3110         rtl8180_beacon_tx_disable(dev);
3111
3112         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3113         write_nic_dword(dev, MAC0, ((u32 *)dev->dev_addr)[0]);
3114         write_nic_word(dev, MAC4, ((u32 *)dev->dev_addr)[1] & 0xffff);
3115         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3116
3117         rtl8180_update_msr(dev);
3118
3119         /* These might be unnecessary since we do in rx_enable / tx_enable */
3120         fix_rx_fifo(dev);
3121         fix_tx_fifo(dev);
3122
3123         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3124
3125         /*
3126            The following is very strange. seems to be that 1 means test mode,
3127            but we need to acknolwledges the nic when a packet is ready
3128            although we set it to 0
3129         */
3130
3131         write_nic_byte(dev,
3132                        CONFIG2, read_nic_byte(dev, CONFIG2) & ~\
3133                        (1<<CONFIG2_DMA_POLLING_MODE_SHIFT));
3134         //^the nic isn't in test mode
3135         write_nic_byte(dev,
3136                        CONFIG2, read_nic_byte(dev, CONFIG2)|(1<<4));
3137
3138         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3139
3140         write_nic_dword(dev, INT_TIMEOUT, 0);
3141
3142         write_nic_byte(dev, WPA_CONFIG, 0);
3143
3144         rtl8180_no_hw_wep(dev);
3145
3146         rtl8185_set_rate(dev);
3147         write_nic_byte(dev, RATE_FALLBACK, 0x81);
3148
3149         write_nic_byte(dev, GP_ENABLE, read_nic_byte(dev, GP_ENABLE) & ~(1<<6));
3150
3151         /*FIXME cfg 3 ClkRun enable - isn't it ReadOnly ? */
3152         rtl8180_set_mode(dev, EPROM_CMD_CONFIG);
3153         write_nic_byte(dev, CONFIG3, read_nic_byte(dev, CONFIG3)
3154                        | (1 << CONFIG3_CLKRUN_SHIFT));
3155         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3156
3157         priv->rf_init(dev);
3158
3159         if (priv->rf_set_sens != NULL)
3160                 priv->rf_set_sens(dev, priv->sens);
3161         rtl8180_irq_enable(dev);
3162
3163         netif_start_queue(dev);
3164 }
3165
3166 /* this configures registers for beacon tx and enables it via
3167  * rtl8180_beacon_tx_enable(). rtl8180_beacon_tx_disable() might
3168  * be used to stop beacon transmission
3169  */
3170 void rtl8180_start_tx_beacon(struct net_device *dev)
3171 {
3172         u16 word;
3173
3174         DMESG("Enabling beacon TX");
3175         rtl8180_prepare_beacon(dev);
3176         rtl8180_irq_disable(dev);
3177         rtl8180_beacon_tx_enable(dev);
3178
3179         word = read_nic_word(dev, AtimWnd) & ~AtimWnd_AtimWnd;
3180         write_nic_word(dev, AtimWnd, word); // word |=
3181
3182         word  = read_nic_word(dev, BintrItv);
3183         word &= ~BintrItv_BintrItv;
3184         word |= 1000;/*priv->ieee80211->current_network.beacon_interval *
3185                 ((priv->txbeaconcount > 1)?(priv->txbeaconcount-1):1);
3186         // FIXME: check if correct ^^ worked with 0x3e8;
3187         */
3188         write_nic_word(dev, BintrItv, word);
3189
3190         rtl8180_set_mode(dev, EPROM_CMD_NORMAL);
3191
3192         rtl8185b_irq_enable(dev);
3193 }
3194
3195 static struct net_device_stats *rtl8180_stats(struct net_device *dev)
3196 {
3197         struct r8180_priv *priv = ieee80211_priv(dev);
3198
3199         return &priv->ieee80211->stats;
3200 }
3201 //
3202 // Change current and default preamble mode.
3203 //
3204 bool
3205 MgntActSet_802_11_PowerSaveMode(
3206         struct r8180_priv *priv,
3207         RT_PS_MODE              rtPsMode
3208 )
3209 {
3210         // Currently, we do not change power save mode on IBSS mode.
3211         if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3212                 return false;
3213
3214         priv->ieee80211->ps = rtPsMode;
3215
3216         return true;
3217 }
3218
3219 void LeisurePSEnter(struct r8180_priv *priv)
3220 {
3221         if (priv->bLeisurePs) {
3222                 if (priv->ieee80211->ps == IEEE80211_PS_DISABLED)
3223                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_MBCAST|IEEE80211_PS_UNICAST);//IEEE80211_PS_ENABLE
3224         }
3225 }
3226
3227 void LeisurePSLeave(struct r8180_priv *priv)
3228 {
3229         if (priv->bLeisurePs) {
3230                 if (priv->ieee80211->ps != IEEE80211_PS_DISABLED)
3231                         MgntActSet_802_11_PowerSaveMode(priv, IEEE80211_PS_DISABLED);
3232         }
3233 }
3234
3235 void rtl8180_hw_wakeup_wq(struct work_struct *work)
3236 {
3237         struct delayed_work *dwork = to_delayed_work(work);
3238         struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_wakeup_wq);
3239         struct net_device *dev = ieee->dev;
3240
3241         rtl8180_hw_wakeup(dev);
3242 }
3243
3244 void rtl8180_hw_sleep_wq(struct work_struct *work)
3245 {
3246         struct delayed_work *dwork = to_delayed_work(work);
3247         struct ieee80211_device *ieee = container_of(dwork, struct ieee80211_device, hw_sleep_wq);
3248         struct net_device *dev = ieee->dev;
3249
3250         rtl8180_hw_sleep_down(dev);
3251 }
3252
3253 static void MgntLinkKeepAlive(struct r8180_priv *priv)
3254 {
3255         if (priv->keepAliveLevel == 0)
3256                 return;
3257
3258         if (priv->ieee80211->state == IEEE80211_LINKED) {
3259                 //
3260                 // Keep-Alive.
3261                 //
3262
3263                 if ((priv->keepAliveLevel == 2) ||
3264                         (priv->link_detect.LastNumTxUnicast == priv->NumTxUnicast &&
3265                         priv->link_detect.LastNumRxUnicast == priv->ieee80211->NumRxUnicast)
3266                         ) {
3267                         priv->link_detect.IdleCount++;
3268
3269                         //
3270                         // Send a Keep-Alive packet packet to AP if we had been idle for a while.
3271                         //
3272                         if (priv->link_detect.IdleCount >= ((KEEP_ALIVE_INTERVAL / CHECK_FOR_HANG_PERIOD)-1)) {
3273                                 priv->link_detect.IdleCount = 0;
3274                                 ieee80211_sta_ps_send_null_frame(priv->ieee80211, false);
3275                         }
3276                 } else {
3277                         priv->link_detect.IdleCount = 0;
3278                 }
3279                 priv->link_detect.LastNumTxUnicast = priv->NumTxUnicast;
3280                 priv->link_detect.LastNumRxUnicast = priv->ieee80211->NumRxUnicast;
3281         }
3282 }
3283
3284 static u8 read_acadapter_file(char *filename);
3285
3286 void rtl8180_watch_dog(struct net_device *dev)
3287 {
3288         struct r8180_priv *priv = ieee80211_priv(dev);
3289         bool bEnterPS = false;
3290         bool bBusyTraffic = false;
3291         u32 TotalRxNum = 0;
3292         u16 SlotIndex = 0;
3293         u16 i = 0;
3294         if (priv->ieee80211->actscanning == false) {
3295                 if ((priv->ieee80211->iw_mode != IW_MODE_ADHOC) && (priv->ieee80211->state == IEEE80211_NOLINK) && (priv->ieee80211->beinretry == false) && (priv->eRFPowerState == eRfOn))
3296                         IPSEnter(dev);
3297         }
3298         //YJ,add,080828,for link state check
3299         if ((priv->ieee80211->state == IEEE80211_LINKED) && (priv->ieee80211->iw_mode == IW_MODE_INFRA)) {
3300                 SlotIndex = (priv->link_detect.SlotIndex++) % priv->link_detect.SlotNum;
3301                 priv->link_detect.RxFrameNum[SlotIndex] = priv->ieee80211->NumRxDataInPeriod + priv->ieee80211->NumRxBcnInPeriod;
3302                 for (i = 0; i < priv->link_detect.SlotNum; i++)
3303                         TotalRxNum += priv->link_detect.RxFrameNum[i];
3304
3305                 if (TotalRxNum == 0) {
3306                         priv->ieee80211->state = IEEE80211_ASSOCIATING;
3307                         queue_work(priv->ieee80211->wq, &priv->ieee80211->associate_procedure_wq);
3308                 }
3309         }
3310
3311         //YJ,add,080828,for KeepAlive
3312         MgntLinkKeepAlive(priv);
3313
3314         //YJ,add,080828,for LPS
3315         if (priv->PowerProfile == POWER_PROFILE_BATTERY)
3316                 priv->bLeisurePs = true;
3317         else if (priv->PowerProfile == POWER_PROFILE_AC) {
3318                 LeisurePSLeave(priv);
3319                 priv->bLeisurePs = false;
3320         }
3321
3322         if (priv->ieee80211->state == IEEE80211_LINKED) {
3323                 priv->link_detect.NumRxOkInPeriod = priv->ieee80211->NumRxDataInPeriod;
3324                 if (priv->link_detect.NumRxOkInPeriod > 666 ||
3325                         priv->link_detect.NumTxOkInPeriod > 666) {
3326                         bBusyTraffic = true;
3327                 }
3328                 if (((priv->link_detect.NumRxOkInPeriod + priv->link_detect.NumTxOkInPeriod) > 8)
3329                         || (priv->link_detect.NumRxOkInPeriod > 2)) {
3330                         bEnterPS = false;
3331                 } else
3332                         bEnterPS = true;
3333
3334                 if (bEnterPS)
3335                         LeisurePSEnter(priv);
3336                 else
3337                         LeisurePSLeave(priv);
3338         } else
3339                 LeisurePSLeave(priv);
3340         priv->link_detect.bBusyTraffic = bBusyTraffic;
3341         priv->link_detect.NumRxOkInPeriod = 0;
3342         priv->link_detect.NumTxOkInPeriod = 0;
3343         priv->ieee80211->NumRxDataInPeriod = 0;
3344         priv->ieee80211->NumRxBcnInPeriod = 0;
3345 }
3346
3347 int _rtl8180_up(struct net_device *dev)
3348 {
3349         struct r8180_priv *priv = ieee80211_priv(dev);
3350
3351         priv->up = 1;
3352
3353         DMESG("Bringing up iface");
3354         rtl8185b_adapter_start(dev);
3355         rtl8185b_rx_enable(dev);
3356         rtl8185b_tx_enable(dev);
3357         if (priv->bInactivePs) {
3358                 if (priv->ieee80211->iw_mode == IW_MODE_ADHOC)
3359                         IPSLeave(dev);
3360         }
3361         timer_rate_adaptive((unsigned long)dev);
3362         watch_dog_adaptive((unsigned long)dev);
3363         if (priv->bSwAntennaDiverity)
3364                         SwAntennaDiversityTimerCallback(dev);
3365         ieee80211_softmac_start_protocol(priv->ieee80211);
3366         return 0;
3367 }
3368
3369 int rtl8180_open(struct net_device *dev)
3370 {
3371         struct r8180_priv *priv = ieee80211_priv(dev);
3372         int ret;
3373
3374         down(&priv->wx_sem);
3375         ret = rtl8180_up(dev);
3376         up(&priv->wx_sem);
3377         return ret;
3378 }
3379
3380 int rtl8180_up(struct net_device *dev)
3381 {
3382         struct r8180_priv *priv = ieee80211_priv(dev);
3383
3384         if (priv->up == 1)
3385                 return -1;
3386
3387         return _rtl8180_up(dev);
3388 }
3389
3390 int rtl8180_close(struct net_device *dev)
3391 {
3392         struct r8180_priv *priv = ieee80211_priv(dev);
3393         int ret;
3394
3395         down(&priv->wx_sem);
3396         ret = rtl8180_down(dev);
3397         up(&priv->wx_sem);
3398
3399         return ret;
3400 }
3401
3402 int rtl8180_down(struct net_device *dev)
3403 {
3404         struct r8180_priv *priv = ieee80211_priv(dev);
3405
3406         if (priv->up == 0)
3407                 return -1;
3408
3409         priv->up = 0;
3410
3411         ieee80211_softmac_stop_protocol(priv->ieee80211);
3412         /* FIXME */
3413         if (!netif_queue_stopped(dev))
3414                 netif_stop_queue(dev);
3415         rtl8180_rtx_disable(dev);
3416         rtl8180_irq_disable(dev);
3417         del_timer_sync(&priv->watch_dog_timer);
3418         del_timer_sync(&priv->rateadapter_timer);
3419         cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3420         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3421         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3422         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3423         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3424         del_timer_sync(&priv->SwAntennaDiversityTimer);
3425         SetZebraRFPowerState8185(dev, eRfOff);
3426         memset(&(priv->ieee80211->current_network), 0, sizeof(struct ieee80211_network));
3427         priv->ieee80211->state = IEEE80211_NOLINK;
3428         return 0;
3429 }
3430
3431 void rtl8180_restart_wq(struct work_struct *work)
3432 {
3433         struct r8180_priv *priv = container_of(work, struct r8180_priv, reset_wq);
3434         struct net_device *dev = priv->dev;
3435
3436         down(&priv->wx_sem);
3437
3438         rtl8180_commit(dev);
3439
3440         up(&priv->wx_sem);
3441 }
3442
3443 void rtl8180_restart(struct net_device *dev)
3444 {
3445         struct r8180_priv *priv = ieee80211_priv(dev);
3446
3447         schedule_work(&priv->reset_wq);
3448 }
3449
3450 void rtl8180_commit(struct net_device *dev)
3451 {
3452         struct r8180_priv *priv = ieee80211_priv(dev);
3453
3454         if (priv->up == 0)
3455                 return ;
3456
3457         del_timer_sync(&priv->watch_dog_timer);
3458         del_timer_sync(&priv->rateadapter_timer);
3459         cancel_delayed_work(&priv->ieee80211->rate_adapter_wq);
3460         cancel_delayed_work(&priv->ieee80211->hw_wakeup_wq);
3461         cancel_delayed_work(&priv->ieee80211->hw_sleep_wq);
3462         cancel_delayed_work(&priv->ieee80211->hw_dig_wq);
3463         cancel_delayed_work(&priv->ieee80211->tx_pw_wq);
3464         del_timer_sync(&priv->SwAntennaDiversityTimer);
3465         ieee80211_softmac_stop_protocol(priv->ieee80211);
3466         rtl8180_irq_disable(dev);
3467         rtl8180_rtx_disable(dev);
3468         _rtl8180_up(dev);
3469 }
3470
3471 static void r8180_set_multicast(struct net_device *dev)
3472 {
3473         struct r8180_priv *priv = ieee80211_priv(dev);
3474         short promisc;
3475
3476         promisc = (dev->flags & IFF_PROMISC) ? 1 : 0;
3477
3478         if (promisc != priv->promisc)
3479                 rtl8180_restart(dev);
3480
3481         priv->promisc = promisc;
3482 }
3483
3484 int r8180_set_mac_adr(struct net_device *dev, void *mac)
3485 {
3486         struct r8180_priv *priv = ieee80211_priv(dev);
3487         struct sockaddr *addr = mac;
3488
3489         down(&priv->wx_sem);
3490
3491         memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
3492
3493         if (priv->ieee80211->iw_mode == IW_MODE_MASTER)
3494                 memcpy(priv->ieee80211->current_network.bssid, dev->dev_addr, ETH_ALEN);
3495
3496         if (priv->up) {
3497                 rtl8180_down(dev);
3498                 rtl8180_up(dev);
3499         }
3500
3501         up(&priv->wx_sem);
3502
3503         return 0;
3504 }
3505
3506 /* based on ipw2200 driver */
3507 int rtl8180_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3508 {
3509         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3510         struct iwreq *wrq = (struct iwreq *) rq;
3511         int ret = -1;
3512
3513         switch (cmd) {
3514         case RTL_IOCTL_WPA_SUPPLICANT:
3515                 ret = ieee80211_wpa_supplicant_ioctl(priv->ieee80211, &wrq->u.data);
3516                 return ret;
3517         default:
3518                 return -EOPNOTSUPP;
3519         }
3520
3521         return -EOPNOTSUPP;
3522 }
3523
3524 static const struct net_device_ops rtl8180_netdev_ops = {
3525         .ndo_open               = rtl8180_open,
3526         .ndo_stop               = rtl8180_close,
3527         .ndo_get_stats          = rtl8180_stats,
3528         .ndo_tx_timeout         = rtl8180_restart,
3529         .ndo_do_ioctl           = rtl8180_ioctl,
3530         .ndo_set_multicast_list = r8180_set_multicast,
3531         .ndo_set_mac_address    = r8180_set_mac_adr,
3532         .ndo_validate_addr      = eth_validate_addr,
3533         .ndo_change_mtu         = eth_change_mtu,
3534         .ndo_start_xmit         = ieee80211_rtl_xmit,
3535 };
3536
3537 static int __devinit rtl8180_pci_probe(struct pci_dev *pdev,
3538                                        const struct pci_device_id *id)
3539 {
3540         unsigned long ioaddr = 0;
3541         struct net_device *dev = NULL;
3542         struct r8180_priv *priv = NULL;
3543         u8 unit = 0;
3544
3545         unsigned long pmem_start, pmem_len, pmem_flags;
3546
3547         DMESG("Configuring chip resources");
3548
3549         if (pci_enable_device(pdev)) {
3550                 DMESG("Failed to enable PCI device");
3551                 return -EIO;
3552         }
3553
3554         pci_set_master(pdev);
3555         pci_set_dma_mask(pdev, 0xffffff00ULL);
3556         pci_set_consistent_dma_mask(pdev, 0xffffff00ULL);
3557         dev = alloc_ieee80211(sizeof(struct r8180_priv));
3558         if (!dev)
3559                 return -ENOMEM;
3560         priv = ieee80211_priv(dev);
3561         priv->ieee80211 = netdev_priv(dev);
3562
3563         pci_set_drvdata(pdev, dev);
3564         SET_NETDEV_DEV(dev, &pdev->dev);
3565
3566         priv = ieee80211_priv(dev);
3567         priv->pdev = pdev;
3568
3569         pmem_start = pci_resource_start(pdev, 1);
3570         pmem_len = pci_resource_len(pdev, 1);
3571         pmem_flags = pci_resource_flags(pdev, 1);
3572
3573         if (!(pmem_flags & IORESOURCE_MEM)) {
3574                 DMESG("region #1 not a MMIO resource, aborting");
3575                 goto fail;
3576         }
3577
3578         if (!request_mem_region(pmem_start, pmem_len, RTL8180_MODULE_NAME)) {
3579                 DMESG("request_mem_region failed!");
3580                 goto fail;
3581         }
3582
3583         ioaddr = (unsigned long)ioremap_nocache(pmem_start, pmem_len);
3584         if (ioaddr == (unsigned long)NULL) {
3585                 DMESG("ioremap failed!");
3586                 goto fail1;
3587         }
3588
3589         dev->mem_start = ioaddr; // shared mem start
3590         dev->mem_end = ioaddr + pci_resource_len(pdev, 0); // shared mem end
3591
3592         pci_read_config_byte(pdev, 0x05, &unit);
3593         pci_write_config_byte(pdev, 0x05, unit & (~0x04));
3594
3595         dev->irq = pdev->irq;
3596         priv->irq = 0;
3597
3598         dev->netdev_ops = &rtl8180_netdev_ops;
3599         dev->wireless_handlers = &r8180_wx_handlers_def;
3600
3601         dev->type = ARPHRD_ETHER;
3602         dev->watchdog_timeo = HZ*3;
3603
3604         if (dev_alloc_name(dev, ifname) < 0) {
3605                 DMESG("Oops: devname already taken! Trying wlan%%d...\n");
3606                 ifname = "wlan%d";
3607                 dev_alloc_name(dev, ifname);
3608         }
3609
3610         if (rtl8180_init(dev) != 0) {
3611                 DMESG("Initialization failed");
3612                 goto fail1;
3613         }
3614
3615         netif_carrier_off(dev);
3616
3617         register_netdev(dev);
3618
3619         rtl8180_proc_init_one(dev);
3620
3621         DMESG("Driver probe completed\n");
3622         return 0;
3623 fail1:
3624         if (dev->mem_start != (unsigned long)NULL) {
3625                 iounmap((void *)dev->mem_start);
3626                 release_mem_region(pci_resource_start(pdev, 1),
3627                                    pci_resource_len(pdev, 1));
3628         }
3629 fail:
3630         if (dev) {
3631                 if (priv->irq) {
3632                         free_irq(dev->irq, dev);
3633                         dev->irq = 0;
3634                 }
3635                 free_ieee80211(dev);
3636         }
3637
3638         pci_disable_device(pdev);
3639
3640         DMESG("wlan driver load failed\n");
3641         pci_set_drvdata(pdev, NULL);
3642         return -ENODEV;
3643 }
3644
3645 static void __devexit rtl8180_pci_remove(struct pci_dev *pdev)
3646 {
3647         struct r8180_priv *priv;
3648         struct net_device *dev = pci_get_drvdata(pdev);
3649
3650         if (dev) {
3651                 unregister_netdev(dev);
3652
3653                 priv = ieee80211_priv(dev);
3654
3655                 rtl8180_proc_remove_one(dev);
3656                 rtl8180_down(dev);
3657                 priv->rf_close(dev);
3658                 rtl8180_reset(dev);
3659                 mdelay(10);
3660
3661                 if (priv->irq) {
3662                         DMESG("Freeing irq %d", dev->irq);
3663                         free_irq(dev->irq, dev);
3664                         priv->irq = 0;
3665                 }
3666
3667                 free_rx_desc_ring(dev);
3668                 free_tx_desc_rings(dev);
3669
3670                 if (dev->mem_start != (unsigned long)NULL) {
3671                         iounmap((void *)dev->mem_start);
3672                         release_mem_region(pci_resource_start(pdev, 1),
3673                                            pci_resource_len(pdev, 1));
3674                 }
3675
3676                 free_ieee80211(dev);
3677         }
3678         pci_disable_device(pdev);
3679
3680         DMESG("wlan driver removed\n");
3681 }
3682
3683 /* fun with the built-in ieee80211 stack... */
3684 extern int ieee80211_crypto_init(void);
3685 extern void ieee80211_crypto_deinit(void);
3686 extern int ieee80211_crypto_tkip_init(void);
3687 extern void ieee80211_crypto_tkip_exit(void);
3688 extern int ieee80211_crypto_ccmp_init(void);
3689 extern void ieee80211_crypto_ccmp_exit(void);
3690 extern int ieee80211_crypto_wep_init(void);
3691 extern void ieee80211_crypto_wep_exit(void);
3692
3693 static int __init rtl8180_pci_module_init(void)
3694 {
3695         int ret;
3696
3697         ret = ieee80211_crypto_init();
3698         if (ret) {
3699                 printk(KERN_ERR "ieee80211_crypto_init() failed %d\n", ret);
3700                 return ret;
3701         }
3702         ret = ieee80211_crypto_tkip_init();
3703         if (ret) {
3704                 printk(KERN_ERR "ieee80211_crypto_tkip_init() failed %d\n", ret);
3705                 return ret;
3706         }
3707         ret = ieee80211_crypto_ccmp_init();
3708         if (ret) {
3709                 printk(KERN_ERR "ieee80211_crypto_ccmp_init() failed %d\n", ret);
3710                 return ret;
3711         }
3712         ret = ieee80211_crypto_wep_init();
3713         if (ret) {
3714                 printk(KERN_ERR "ieee80211_crypto_wep_init() failed %d\n", ret);
3715                 return ret;
3716         }
3717
3718         printk(KERN_INFO "\nLinux kernel driver for RTL8180 / RTL8185 based WLAN cards\n");
3719         printk(KERN_INFO "Copyright (c) 2004-2005, Andrea Merello\n");
3720         DMESG("Initializing module");
3721         DMESG("Wireless extensions version %d", WIRELESS_EXT);
3722         rtl8180_proc_module_init();
3723
3724       if (pci_register_driver(&rtl8180_pci_driver)) {
3725                 DMESG("No device found");
3726                 return -ENODEV;
3727         }
3728         return 0;
3729 }
3730
3731 static void __exit rtl8180_pci_module_exit(void)
3732 {
3733         pci_unregister_driver(&rtl8180_pci_driver);
3734         rtl8180_proc_module_remove();
3735         ieee80211_crypto_tkip_exit();
3736         ieee80211_crypto_ccmp_exit();
3737         ieee80211_crypto_wep_exit();
3738         ieee80211_crypto_deinit();
3739         DMESG("Exiting");
3740 }
3741
3742 void rtl8180_try_wake_queue(struct net_device *dev, int pri)
3743 {
3744         unsigned long flags;
3745         short enough_desc;
3746         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3747
3748         spin_lock_irqsave(&priv->tx_lock, flags);
3749         enough_desc = check_nic_enought_desc(dev, pri);
3750         spin_unlock_irqrestore(&priv->tx_lock, flags);
3751
3752         if (enough_desc)
3753                 ieee80211_rtl_wake_queue(priv->ieee80211);
3754 }
3755
3756 void rtl8180_tx_isr(struct net_device *dev, int pri, short error)
3757 {
3758         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3759         u32 *tail; //tail virtual addr
3760         u32 *head; //head virtual addr
3761         u32 *begin;//start of ring virtual addr
3762         u32 *nicv; //nic pointer virtual addr
3763         u32 nic; //nic pointer physical addr
3764         u32 nicbegin;// start of ring physical addr
3765         unsigned long flag;
3766         /* physical addr are ok on 32 bits since we set DMA mask*/
3767         int offs;
3768         int j, i;
3769         int hd;
3770         if (error)
3771                 priv->stats.txretry++; //tony 20060601
3772         spin_lock_irqsave(&priv->tx_lock, flag);
3773         switch (pri) {
3774         case MANAGE_PRIORITY:
3775                 tail = priv->txmapringtail;
3776                 begin = priv->txmapring;
3777                 head = priv->txmapringhead;
3778                 nic = read_nic_dword(dev, TX_MANAGEPRIORITY_RING_ADDR);
3779                 nicbegin = priv->txmapringdma;
3780                 break;
3781         case BK_PRIORITY:
3782                 tail = priv->txbkpringtail;
3783                 begin = priv->txbkpring;
3784                 head = priv->txbkpringhead;
3785                 nic = read_nic_dword(dev, TX_BKPRIORITY_RING_ADDR);
3786                 nicbegin = priv->txbkpringdma;
3787                 break;
3788         case BE_PRIORITY:
3789                 tail = priv->txbepringtail;
3790                 begin = priv->txbepring;
3791                 head = priv->txbepringhead;
3792                 nic = read_nic_dword(dev, TX_BEPRIORITY_RING_ADDR);
3793                 nicbegin = priv->txbepringdma;
3794                 break;
3795         case VI_PRIORITY:
3796                 tail = priv->txvipringtail;
3797                 begin = priv->txvipring;
3798                 head = priv->txvipringhead;
3799                 nic = read_nic_dword(dev, TX_VIPRIORITY_RING_ADDR);
3800                 nicbegin = priv->txvipringdma;
3801                 break;
3802         case VO_PRIORITY:
3803                 tail = priv->txvopringtail;
3804                 begin = priv->txvopring;
3805                 head = priv->txvopringhead;
3806                 nic = read_nic_dword(dev, TX_VOPRIORITY_RING_ADDR);
3807                 nicbegin = priv->txvopringdma;
3808                 break;
3809         case HI_PRIORITY:
3810                 tail = priv->txhpringtail;
3811                 begin = priv->txhpring;
3812                 head = priv->txhpringhead;
3813                 nic = read_nic_dword(dev, TX_HIGHPRIORITY_RING_ADDR);
3814                 nicbegin = priv->txhpringdma;
3815                 break;
3816
3817         default:
3818                 spin_unlock_irqrestore(&priv->tx_lock, flag);
3819                 return ;
3820         }
3821
3822         nicv = (u32 *)((nic - nicbegin) + (u8*)begin);
3823         if ((head <= tail && (nicv > tail || nicv < head)) ||
3824                 (head > tail && (nicv > tail && nicv < head))) {
3825                         DMESGW("nic has lost pointer");
3826                         spin_unlock_irqrestore(&priv->tx_lock, flag);
3827                         rtl8180_restart(dev);
3828                         return;
3829                 }
3830
3831         /* we check all the descriptors between the head and the nic,
3832          * but not the currently pointed by the nic (the next to be txed)
3833          * and the previous of the pointed (might be in process ??)
3834         */
3835         offs = (nic - nicbegin);
3836         offs = offs / 8 / 4;
3837         hd = (head - begin) / 8;
3838
3839         if (offs >= hd)
3840                 j = offs - hd;
3841         else
3842                 j = offs + (priv->txringcount-1-hd);
3843
3844         j -= 2;
3845         if (j < 0)
3846                 j = 0;
3847
3848         for (i = 0; i < j; i++) {
3849                 if ((*head) & (1<<31))
3850                         break;
3851                 if (((*head)&(0x10000000)) != 0) {
3852                         priv->CurrRetryCnt += (u16)((*head) & (0x000000ff));
3853                         if (!error)
3854                                 priv->NumTxOkTotal++;
3855                 }
3856
3857                 if (!error)
3858                         priv->NumTxOkBytesTotal += (*(head+3)) & (0x00000fff);
3859
3860                 *head = *head & ~(1<<31);
3861
3862                 if ((head - begin)/8 == priv->txringcount-1)
3863                         head = begin;
3864                 else
3865                         head += 8;
3866         }
3867
3868         /* the head has been moved to the last certainly TXed
3869          * (or at least processed by the nic) packet.
3870          * The driver take forcefully owning of all these packets
3871          * If the packet previous of the nic pointer has been
3872          * processed this doesn't matter: it will be checked
3873          * here at the next round. Anyway if no more packet are
3874          * TXed no memory leak occour at all.
3875          */
3876
3877         switch (pri) {
3878         case MANAGE_PRIORITY:
3879                 priv->txmapringhead = head;
3880
3881                 if (priv->ack_tx_to_ieee) {
3882                         if (rtl8180_is_tx_queue_empty(dev)) {
3883                                 priv->ack_tx_to_ieee = 0;
3884                                 ieee80211_ps_tx_ack(priv->ieee80211, !error);
3885                         }
3886                 }
3887                 break;
3888         case BK_PRIORITY:
3889                 priv->txbkpringhead = head;
3890                 break;
3891         case BE_PRIORITY:
3892                 priv->txbepringhead = head;
3893                 break;
3894         case VI_PRIORITY:
3895                 priv->txvipringhead = head;
3896                 break;
3897         case VO_PRIORITY:
3898                 priv->txvopringhead = head;
3899                 break;
3900         case HI_PRIORITY:
3901                 priv->txhpringhead = head;
3902                 break;
3903         }
3904
3905         spin_unlock_irqrestore(&priv->tx_lock, flag);
3906 }
3907
3908 void rtl8180_tx_irq_wq(struct work_struct *work)
3909 {
3910         struct delayed_work *dwork = to_delayed_work(work);
3911         struct ieee80211_device * ieee = (struct ieee80211_device *)
3912                 container_of(dwork, struct ieee80211_device, watch_dog_wq);
3913         struct net_device *dev = ieee->dev;
3914
3915         rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3916 }
3917 irqreturn_t rtl8180_interrupt(int irq, void *netdev, struct pt_regs *regs)
3918 {
3919         struct net_device *dev = (struct net_device *) netdev;
3920         struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
3921         unsigned long flags;
3922         u32 inta;
3923
3924         /* We should return IRQ_NONE, but for now let me keep this */
3925         if (priv->irq_enabled == 0)
3926                 return IRQ_HANDLED;
3927
3928         spin_lock_irqsave(&priv->irq_th_lock, flags);
3929
3930         //ISR: 4bytes
3931         inta = read_nic_dword(dev, ISR);// & priv->IntrMask;
3932         write_nic_dword(dev, ISR, inta); // reset int situation
3933
3934         priv->stats.shints++;
3935
3936         if (!inta) {
3937                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3938                 return IRQ_HANDLED;
3939         /*
3940            most probably we can safely return IRQ_NONE,
3941            but for now is better to avoid problems
3942         */
3943         }
3944
3945         if (inta == 0xffff) {
3946                 /* HW disappared */
3947                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3948                 return IRQ_HANDLED;
3949         }
3950
3951         priv->stats.ints++;
3952
3953         if (!netif_running(dev)) {
3954                 spin_unlock_irqrestore(&priv->irq_th_lock, flags);
3955                 return IRQ_HANDLED;
3956         }
3957
3958         if (inta & ISR_TimeOut)
3959                 write_nic_dword(dev, TimerInt, 0);
3960
3961         if (inta & ISR_TBDOK)
3962                 priv->stats.txbeacon++;
3963
3964         if (inta & ISR_TBDER)
3965                 priv->stats.txbeaconerr++;
3966
3967         if (inta & IMR_TMGDOK)
3968                 rtl8180_tx_isr(dev, MANAGE_PRIORITY, 0);
3969
3970         if (inta & ISR_THPDER) {
3971                 priv->stats.txhperr++;
3972                 rtl8180_tx_isr(dev, HI_PRIORITY, 1);
3973                 priv->ieee80211->stats.tx_errors++;
3974         }
3975
3976         if (inta & ISR_THPDOK) { //High priority tx ok
3977                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
3978                 priv->stats.txhpokint++;
3979                 rtl8180_tx_isr(dev, HI_PRIORITY, 0);
3980         }
3981
3982         if (inta & ISR_RER)
3983                 priv->stats.rxerr++;
3984
3985         if (inta & ISR_TBKDER) { //corresponding to BK_PRIORITY
3986                 priv->stats.txbkperr++;
3987                 priv->ieee80211->stats.tx_errors++;
3988                 rtl8180_tx_isr(dev, BK_PRIORITY, 1);
3989                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3990         }
3991
3992         if (inta & ISR_TBEDER) { //corresponding to BE_PRIORITY
3993                 priv->stats.txbeperr++;
3994                 priv->ieee80211->stats.tx_errors++;
3995                 rtl8180_tx_isr(dev, BE_PRIORITY, 1);
3996                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
3997         }
3998         if (inta & ISR_TNPDER) { //corresponding to VO_PRIORITY
3999                 priv->stats.txnperr++;
4000                 priv->ieee80211->stats.tx_errors++;
4001                 rtl8180_tx_isr(dev, NORM_PRIORITY, 1);
4002                 rtl8180_try_wake_queue(dev, NORM_PRIORITY);
4003         }
4004
4005         if (inta & ISR_TLPDER) { //corresponding to VI_PRIORITY
4006                 priv->stats.txlperr++;
4007                 priv->ieee80211->stats.tx_errors++;
4008                 rtl8180_tx_isr(dev, LOW_PRIORITY, 1);
4009                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
4010         }
4011
4012         if (inta & ISR_ROK) {
4013                 priv->stats.rxint++;
4014                 tasklet_schedule(&priv->irq_rx_tasklet);
4015         }
4016
4017         if (inta & ISR_RQoSOK) {
4018                 priv->stats.rxint++;
4019                 tasklet_schedule(&priv->irq_rx_tasklet);
4020         }
4021
4022         if (inta & ISR_BcnInt)
4023                 rtl8180_prepare_beacon(dev);
4024
4025         if (inta & ISR_RDU) {
4026                 DMESGW("No RX descriptor available");
4027                 priv->stats.rxrdu++;
4028                 tasklet_schedule(&priv->irq_rx_tasklet);
4029         }
4030
4031         if (inta & ISR_RXFOVW) {
4032                 priv->stats.rxoverflow++;
4033                 tasklet_schedule(&priv->irq_rx_tasklet);
4034         }
4035
4036         if (inta & ISR_TXFOVW)
4037                 priv->stats.txoverflow++;
4038
4039         if (inta & ISR_TNPDOK) { //Normal priority tx ok
4040                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
4041                 priv->stats.txnpokint++;
4042                 rtl8180_tx_isr(dev, NORM_PRIORITY, 0);
4043         }
4044
4045         if (inta & ISR_TLPDOK) { //Low priority tx ok
4046                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
4047                 priv->stats.txlpokint++;
4048                 rtl8180_tx_isr(dev, LOW_PRIORITY, 0);
4049                 rtl8180_try_wake_queue(dev, LOW_PRIORITY);
4050         }
4051
4052         if (inta & ISR_TBKDOK) { //corresponding to BK_PRIORITY
4053                 priv->stats.txbkpokint++;
4054                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
4055                 rtl8180_tx_isr(dev, BK_PRIORITY, 0);
4056                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4057         }
4058
4059         if (inta & ISR_TBEDOK) { //corresponding to BE_PRIORITY
4060                 priv->stats.txbeperr++;
4061                 priv->link_detect.NumTxOkInPeriod++; //YJ,add,080828
4062                 rtl8180_tx_isr(dev, BE_PRIORITY, 0);
4063                 rtl8180_try_wake_queue(dev, BE_PRIORITY);
4064         }
4065         force_pci_posting(dev);
4066         spin_unlock_irqrestore(&priv->irq_th_lock, flags);
4067
4068         return IRQ_HANDLED;
4069 }
4070
4071 void rtl8180_irq_rx_tasklet(struct r8180_priv *priv)
4072 {
4073         rtl8180_rx(priv->dev);
4074 }
4075
4076 void GPIOChangeRFWorkItemCallBack(struct work_struct *work)
4077 {
4078         struct ieee80211_device *ieee = container_of(work, struct ieee80211_device, GPIOChangeRFWorkItem.work);
4079         struct net_device *dev = ieee->dev;
4080         struct r8180_priv *priv = ieee80211_priv(dev);
4081         u8 btPSR;
4082         u8 btConfig0;
4083         RT_RF_POWER_STATE       eRfPowerStateToSet;
4084         bool bActuallySet = false;
4085
4086         char *argv[3];
4087         static char *RadioPowerPath = "/etc/acpi/events/RadioPower.sh";
4088         static char *envp[] = {"HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL};
4089         static int readf_count = 0;
4090
4091         if (readf_count % 10 == 0)
4092                 priv->PowerProfile = read_acadapter_file("/proc/acpi/ac_adapter/AC0/state");
4093
4094         readf_count = (readf_count+1)%0xffff;
4095         /* We should turn off LED before polling FF51[4]. */
4096
4097         /* Turn off LED. */
4098         btPSR = read_nic_byte(dev, PSR);
4099         write_nic_byte(dev, PSR, (btPSR & ~BIT3));
4100
4101         /* It need to delay 4us suggested by Jong, 2008-01-16 */
4102         udelay(4);
4103
4104         /* HW radio On/Off according to the value of FF51[4](config0) */
4105         btConfig0 = btPSR = read_nic_byte(dev, CONFIG0);
4106
4107         eRfPowerStateToSet = (btConfig0 & BIT4) ?  eRfOn : eRfOff;
4108
4109         /* Turn LED back on when radio enabled */
4110         if (eRfPowerStateToSet == eRfOn)
4111                 write_nic_byte(dev, PSR, btPSR | BIT3);
4112
4113         if ((priv->ieee80211->bHwRadioOff == true) &&
4114            (eRfPowerStateToSet == eRfOn)) {
4115                 priv->ieee80211->bHwRadioOff = false;
4116                 bActuallySet = true;
4117         } else if ((priv->ieee80211->bHwRadioOff == false) &&
4118                   (eRfPowerStateToSet == eRfOff)) {
4119                 priv->ieee80211->bHwRadioOff = true;
4120                 bActuallySet = true;
4121         }
4122
4123         if (bActuallySet) {
4124                 MgntActSet_RF_State(dev, eRfPowerStateToSet, RF_CHANGE_BY_HW);
4125
4126                 /* To update the UI status for Power status changed */
4127                 if (priv->ieee80211->bHwRadioOff == true)
4128                         argv[1] = "RFOFF";
4129                 else
4130                         argv[1] = "RFON";
4131                 argv[0] = RadioPowerPath;
4132                 argv[2] = NULL;
4133
4134                 call_usermodehelper(RadioPowerPath, argv, envp, 1);
4135         }
4136 }
4137
4138 static u8 read_acadapter_file(char *filename)
4139 {
4140         return 0;
4141 }
4142
4143 module_init(rtl8180_pci_module_init);
4144 module_exit(rtl8180_pci_module_exit);