drivers/staging/lirc/lirc_it87.c

   1 /*
   2  * LIRC driver for ITE IT8712/IT8705 CIR port
   3  *
   4  * Copyright (C) 2001 Hans-Gunter Lutke Uphues <hg_lu@web.de>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of the
   9  * License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
  19  * USA
  20  *
  21  * ITE IT8705 and IT8712(not tested) and IT8720 CIR-port support for lirc based
  22  * via cut and paste from lirc_sir.c (C) 2000 Milan Pikula
  23  *
  24  * Attention: Sendmode only tested with debugging logs
  25  *
  26  * 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
  27  *   reimplemented read function
  28  * 2005/06/05 Andrew Calkin implemented support for Asus Digimatrix,
  29  *   based on work of the following member of the Outertrack Digimatrix
  30  *   Forum: Art103 <r_tay@hotmail.com>
  31  * 2009/12/24 James Edwards <jimbo-lirc@edwardsclan.net> implemeted support
  32  *   for ITE8704/ITE8718, on my machine, the DSDT reports 8704, but the
  33  *   chip identifies as 18.
  34  */
  35
  36 #include <linux/module.h>
  37 #include <linux/sched.h>
  38 #include <linux/errno.h>
  39 #include <linux/signal.h>
  40 #include <linux/fs.h>
  41 #include <linux/interrupt.h>
  42 #include <linux/ioport.h>
  43 #include <linux/kernel.h>
  44 #include <linux/time.h>
  45 #include <linux/string.h>
  46 #include <linux/types.h>
  47 #include <linux/wait.h>
  48 #include <linux/mm.h>
  49 #include <linux/delay.h>
  50 #include <linux/poll.h>
  51 #include <asm/system.h>
  52 #include <linux/io.h>
  53 #include <linux/irq.h>
  54 #include <linux/fcntl.h>
  55
  56 #include <linux/timer.h>
  57 #include <linux/pnp.h>
  58
  59 #include <media/lirc.h>
  60 #include <media/lirc_dev.h>
  61
  62 #include "lirc_it87.h"
  63
  64 #ifdef LIRC_IT87_DIGIMATRIX
  65 static int digimatrix = 1;
  66 static int it87_freq = 36; /* kHz */
  67 static int irq = 9;
  68 #else
  69 static int digimatrix;
  70 static int it87_freq = 38; /* kHz */
  71 static int irq = IT87_CIR_DEFAULT_IRQ;
  72 #endif
  73
  74 static unsigned long it87_bits_in_byte_out;
  75 static unsigned long it87_send_counter;
  76 static unsigned char it87_RXEN_mask = IT87_CIR_RCR_RXEN;
  77
  78 #define RBUF_LEN 1024
  79
  80 #define LIRC_DRIVER_NAME "lirc_it87"
  81
  82 /* timeout for sequences in jiffies (=5/100s) */
  83 /* must be longer than TIME_CONST */
  84 #define IT87_TIMEOUT    (HZ*5/100)
  85
  86 /* module parameters */
  87 static int debug;
  88 #define dprintk(fmt, args...)                                   \
  89         do {                                                    \
  90                 if (debug)                                      \
  91                         printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
  92                                fmt, ## args);                   \
  93         } while (0)
  94
  95 static int io = IT87_CIR_DEFAULT_IOBASE;
  96 /* receiver demodulator default: off */
  97 static int it87_enable_demodulator;
  98
  99 static int timer_enabled;
 100 static DEFINE_SPINLOCK(timer_lock);
 101 static struct timer_list timerlist;
 102 /* time of last signal change detected */
 103 static struct timeval last_tv = {0, 0};
 104 /* time of last UART data ready interrupt */
 105 static struct timeval last_intr_tv = {0, 0};
 106 static int last_value;
 107
 108 static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue);
 109
 110 static DEFINE_SPINLOCK(hardware_lock);
 111 static DEFINE_SPINLOCK(dev_lock);
 112 static bool device_open;
 113
 114 static int rx_buf[RBUF_LEN];
 115 unsigned int rx_tail, rx_head;
 116
 117 static struct pnp_driver it87_pnp_driver;
 118
 119 /* SECTION: Prototypes */
 120
 121 /* Communication with user-space */
 122 static int lirc_open(struct inode *inode, struct file *file);
 123 static int lirc_close(struct inode *inode, struct file *file);
 124 static unsigned int lirc_poll(struct file *file, poll_table *wait);
 125 static ssize_t lirc_read(struct file *file, char *buf,
 126                          size_t count, loff_t *ppos);
 127 static ssize_t lirc_write(struct file *file, const char *buf,
 128                           size_t n, loff_t *pos);
 129 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg);
 130 static void add_read_queue(int flag, unsigned long val);
 131 static int init_chrdev(void);
 132 static void drop_chrdev(void);
 133 /* Hardware */
 134 static irqreturn_t it87_interrupt(int irq, void *dev_id);
 135 static void send_space(unsigned long len);
 136 static void send_pulse(unsigned long len);
 137 static void init_send(void);
 138 static void terminate_send(unsigned long len);
 139 static int init_hardware(void);
 140 static void drop_hardware(void);
 141 /* Initialisation */
 142 static int init_port(void);
 143 static void drop_port(void);
 144
 145
 146 /* SECTION: Communication with user-space */
 147
 148 static int lirc_open(struct inode *inode, struct file *file)
 149 {
 150         spin_lock(&dev_lock);
 151         if (device_open) {
 152                 spin_unlock(&dev_lock);
 153                 return -EBUSY;
 154         }
 155         device_open = true;
 156         spin_unlock(&dev_lock);
 157         return 0;
 158 }
 159
 160
 161 static int lirc_close(struct inode *inode, struct file *file)
 162 {
 163         spin_lock(&dev_lock);
 164         device_open = false;
 165         spin_unlock(&dev_lock);
 166         return 0;
 167 }
 168
 169
 170 static unsigned int lirc_poll(struct file *file, poll_table *wait)
 171 {
 172         poll_wait(file, &lirc_read_queue, wait);
 173         if (rx_head != rx_tail)
 174                 return POLLIN | POLLRDNORM;
 175         return 0;
 176 }
 177
 178
 179 static ssize_t lirc_read(struct file *file, char *buf,
 180                          size_t count, loff_t *ppos)
 181 {
 182         int n = 0;
 183         int retval = 0;
 184
 185         while (n < count) {
 186                 if (file->f_flags & O_NONBLOCK && rx_head == rx_tail) {
 187                         retval = -EAGAIN;
 188                         break;
 189                 }
 190                 retval = wait_event_interruptible(lirc_read_queue,
 191                                                   rx_head != rx_tail);
 192                 if (retval)
 193                         break;
 194
 195                 if (copy_to_user((void *) buf + n, (void *) (rx_buf + rx_head),
 196                                  sizeof(int))) {
 197                         retval = -EFAULT;
 198                         break;
 199                 }
 200                 rx_head = (rx_head + 1) & (RBUF_LEN - 1);
 201                 n += sizeof(int);
 202         }
 203         if (n)
 204                 return n;
 205         return retval;
 206 }
 207
 208
 209 static ssize_t lirc_write(struct file *file, const char *buf,
 210                           size_t n, loff_t *pos)
 211 {
 212         int i = 0;
 213         int *tx_buf;
 214
 215         if (n % sizeof(int))
 216                 return -EINVAL;
 217         tx_buf = memdup_user(buf, n);
 218         if (IS_ERR(tx_buf))
 219                 return PTR_ERR(tx_buf);
 220         n /= sizeof(int);
 221         init_send();
 222         while (1) {
 223                 if (i >= n)
 224                         break;
 225                 if (tx_buf[i])
 226                         send_pulse(tx_buf[i]);
 227                 i++;
 228                 if (i >= n)
 229                         break;
 230                 if (tx_buf[i])
 231                         send_space(tx_buf[i]);
 232                 i++;
 233         }
 234         terminate_send(tx_buf[i - 1]);
 235         return n;
 236 }
 237
 238
 239 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
 240 {
 241         int retval = 0;
 242         __u32 value = 0;
 243         unsigned long hw_flags;
 244
 245         if (cmd == LIRC_GET_FEATURES)
 246                 value = LIRC_CAN_SEND_PULSE |
 247                         LIRC_CAN_SET_SEND_CARRIER |
 248                         LIRC_CAN_REC_MODE2;
 249         else if (cmd == LIRC_GET_SEND_MODE)
 250                 value = LIRC_MODE_PULSE;
 251         else if (cmd == LIRC_GET_REC_MODE)
 252                 value = LIRC_MODE_MODE2;
 253
 254         switch (cmd) {
 255         case LIRC_GET_FEATURES:
 256         case LIRC_GET_SEND_MODE:
 257         case LIRC_GET_REC_MODE:
 258                 retval = put_user(value, (__u32 *) arg);
 259                 break;
 260
 261         case LIRC_SET_SEND_MODE:
 262         case LIRC_SET_REC_MODE:
 263                 retval = get_user(value, (__u32 *) arg);
 264                 break;
 265
 266         case LIRC_SET_SEND_CARRIER:
 267                 retval = get_user(value, (__u32 *) arg);
 268                 if (retval)
 269                         return retval;
 270                 value /= 1000;
 271                 if (value > IT87_CIR_FREQ_MAX ||
 272                     value < IT87_CIR_FREQ_MIN)
 273                         return -EINVAL;
 274
 275                 it87_freq = value;
 276
 277                 spin_lock_irqsave(&hardware_lock, hw_flags);
 278                 outb(((inb(io + IT87_CIR_TCR2) & IT87_CIR_TCR2_TXMPW) |
 279                       (it87_freq - IT87_CIR_FREQ_MIN) << 3),
 280                       io + IT87_CIR_TCR2);
 281                 spin_unlock_irqrestore(&hardware_lock, hw_flags);
 282                 dprintk("demodulation frequency: %d kHz\n", it87_freq);
 283
 284                 break;
 285
 286         default:
 287                 retval = -EINVAL;
 288         }
 289
 290         if (retval)
 291                 return retval;
 292
 293         if (cmd == LIRC_SET_REC_MODE) {
 294                 if (value != LIRC_MODE_MODE2)
 295                         retval = -ENOSYS;
 296         } else if (cmd == LIRC_SET_SEND_MODE) {
 297                 if (value != LIRC_MODE_PULSE)
 298                         retval = -ENOSYS;
 299         }
 300         return retval;
 301 }
 302
 303 static void add_read_queue(int flag, unsigned long val)
 304 {
 305         unsigned int new_rx_tail;
 306         int newval;
 307
 308         dprintk("add flag %d with val %lu\n", flag, val);
 309
 310         newval = val & PULSE_MASK;
 311
 312         /*
 313          * statistically, pulses are ~TIME_CONST/2 too long. we could
 314          * maybe make this more exact, but this is good enough
 315          */
 316         if (flag) {
 317                 /* pulse */
 318                 if (newval > TIME_CONST / 2)
 319                         newval -= TIME_CONST / 2;
 320                 else /* should not ever happen */
 321                         newval = 1;
 322                 newval |= PULSE_BIT;
 323         } else
 324                 newval += TIME_CONST / 2;
 325         new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1);
 326         if (new_rx_tail == rx_head) {
 327                 dprintk("Buffer overrun.\n");
 328                 return;
 329         }
 330         rx_buf[rx_tail] = newval;
 331         rx_tail = new_rx_tail;
 332         wake_up_interruptible(&lirc_read_queue);
 333 }
 334
 335
 336 static const struct file_operations lirc_fops = {
 337         .owner          = THIS_MODULE,
 338         .read           = lirc_read,
 339         .write          = lirc_write,
 340         .poll           = lirc_poll,
 341         .unlocked_ioctl = lirc_ioctl,
 342 #ifdef CONFIG_COMPAT
 343         .compat_ioctl   = lirc_ioctl,
 344 #endif
 345         .open           = lirc_open,
 346         .release        = lirc_close,
 347 };
 348
 349 static int set_use_inc(void *data)
 350 {
 351        return 0;
 352 }
 353
 354 static void set_use_dec(void *data)
 355 {
 356 }
 357
 358 static struct lirc_driver driver = {
 359        .name            = LIRC_DRIVER_NAME,
 360        .minor           = -1,
 361        .code_length     = 1,
 362        .sample_rate     = 0,
 363        .data            = NULL,
 364        .add_to_buf      = NULL,
 365        .set_use_inc     = set_use_inc,
 366        .set_use_dec     = set_use_dec,
 367        .fops            = &lirc_fops,
 368        .dev             = NULL,
 369        .owner           = THIS_MODULE,
 370 };
 371
 372
 373 static int init_chrdev(void)
 374 {
 375         driver.minor = lirc_register_driver(&driver);
 376
 377         if (driver.minor < 0) {
 378                 printk(KERN_ERR LIRC_DRIVER_NAME ": init_chrdev() failed.\n");
 379                 return -EIO;
 380         }
 381         return 0;
 382 }
 383
 384
 385 static void drop_chrdev(void)
 386 {
 387         lirc_unregister_driver(driver.minor);
 388 }
 389
 390
 391 /* SECTION: Hardware */
 392 static long delta(struct timeval *tv1, struct timeval *tv2)
 393 {
 394         unsigned long deltv;
 395
 396         deltv = tv2->tv_sec - tv1->tv_sec;
 397         if (deltv > 15)
 398                 deltv = 0xFFFFFF;
 399         else
 400                 deltv = deltv*1000000 + tv2->tv_usec - tv1->tv_usec;
 401         return deltv;
 402 }
 403
 404 static void it87_timeout(unsigned long data)
 405 {
 406         unsigned long flags;
 407
 408         /* avoid interference with interrupt */
 409         spin_lock_irqsave(&timer_lock, flags);
 410
 411         if (digimatrix) {
 412                 /* We have timed out. Disable the RX mechanism. */
 413
 414                 outb((inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN) |
 415                      IT87_CIR_RCR_RXACT, io + IT87_CIR_RCR);
 416                 if (it87_RXEN_mask)
 417                         outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN,
 418                              io + IT87_CIR_RCR);
 419                 dprintk(" TIMEOUT\n");
 420                 timer_enabled = 0;
 421
 422                 /* fifo clear */
 423                 outb(inb(io + IT87_CIR_TCR1) | IT87_CIR_TCR1_FIFOCLR,
 424                      io+IT87_CIR_TCR1);
 425
 426         } else {
 427                 /*
 428                  * if last received signal was a pulse, but receiving stopped
 429                  * within the 9 bit frame, we need to finish this pulse and
 430                  * simulate a signal change to from pulse to space. Otherwise
 431                  * upper layers will receive two sequences next time.
 432                  */
 433
 434                 if (last_value) {
 435                         unsigned long pulse_end;
 436
 437                         /* determine 'virtual' pulse end: */
 438                         pulse_end = delta(&last_tv, &last_intr_tv);
 439                         dprintk("timeout add %d for %lu usec\n",
 440                                 last_value, pulse_end);
 441                         add_read_queue(last_value, pulse_end);
 442                         last_value = 0;
 443                         last_tv = last_intr_tv;
 444                 }
 445         }
 446         spin_unlock_irqrestore(&timer_lock, flags);
 447 }
 448
 449 static irqreturn_t it87_interrupt(int irq, void *dev_id)
 450 {
 451         unsigned char data;
 452         struct timeval curr_tv;
 453         static unsigned long deltv;
 454         unsigned long deltintrtv;
 455         unsigned long flags, hw_flags;
 456         int iir, lsr;
 457         int fifo = 0;
 458         static char lastbit;
 459         char bit;
 460
 461         /* Bit duration in microseconds */
 462         const unsigned long bit_duration = 1000000ul /
 463                 (115200 / IT87_CIR_BAUDRATE_DIVISOR);
 464
 465
 466         iir = inb(io + IT87_CIR_IIR);
 467
 468         switch (iir & IT87_CIR_IIR_IID) {
 469         case 0x4:
 470         case 0x6:
 471                 lsr = inb(io + IT87_CIR_RSR) & (IT87_CIR_RSR_RXFTO |
 472                                                 IT87_CIR_RSR_RXFBC);
 473                 fifo = lsr & IT87_CIR_RSR_RXFBC;
 474                 dprintk("iir: 0x%x fifo: 0x%x\n", iir, lsr);
 475
 476                 /* avoid interference with timer */
 477                 spin_lock_irqsave(&timer_lock, flags);
 478                 spin_lock_irqsave(&hardware_lock, hw_flags);
 479                 if (digimatrix) {
 480                         static unsigned long acc_pulse;
 481                         static unsigned long acc_space;
 482
 483                         do {
 484                                 data = inb(io + IT87_CIR_DR);
 485                                 data = ~data;
 486                                 fifo--;
 487                                 if (data != 0x00) {
 488                                         if (timer_enabled)
 489                                                 del_timer(&timerlist);
 490                                         /*
 491                                          * start timer for end of
 492                                          * sequence detection
 493                                          */
 494                                         timerlist.expires = jiffies +
 495                                                             IT87_TIMEOUT;
 496                                         add_timer(&timerlist);
 497                                         timer_enabled = 1;
 498                                 }
 499                                 /* Loop through */
 500                                 for (bit = 0; bit < 8; ++bit) {
 501                                         if ((data >> bit) & 1) {
 502                                                 ++acc_pulse;
 503                                                 if (lastbit == 0) {
 504                                                         add_read_queue(0,
 505                                                                 acc_space *
 506                                                                  bit_duration);
 507                                                         acc_space = 0;
 508                                                 }
 509                                         } else {
 510                                                 ++acc_space;
 511                                                 if (lastbit == 1) {
 512                                                         add_read_queue(1,
 513                                                                 acc_pulse *
 514                                                                  bit_duration);
 515                                                         acc_pulse = 0;
 516                                                 }
 517                                         }
 518                                         lastbit = (data >> bit) & 1;
 519                                 }
 520
 521                         } while (fifo != 0);
 522                 } else { /* Normal Operation */
 523                         do {
 524                                 del_timer(&timerlist);
 525                                 data = inb(io + IT87_CIR_DR);
 526
 527                                 dprintk("data=%02x\n", data);
 528                                 do_gettimeofday(&curr_tv);
 529                                 deltv = delta(&last_tv, &curr_tv);
 530                                 deltintrtv = delta(&last_intr_tv, &curr_tv);
 531
 532                                 dprintk("t %lu , d %d\n",
 533                                         deltintrtv, (int)data);
 534
 535                                 /*
 536                                  * if nothing came in last 2 cycles,
 537                                  * it was gap
 538                                  */
 539                                 if (deltintrtv > TIME_CONST * 2) {
 540                                         if (last_value) {
 541                                                 dprintk("GAP\n");
 542
 543                                                 /* simulate signal change */
 544                                                 add_read_queue(last_value,
 545                                                                deltv -
 546                                                                deltintrtv);
 547                                                 last_value = 0;
 548                                                 last_tv.tv_sec =
 549                                                         last_intr_tv.tv_sec;
 550                                                 last_tv.tv_usec =
 551                                                         last_intr_tv.tv_usec;
 552                                                 deltv = deltintrtv;
 553                                         }
 554                                 }
 555                                 data = 1;
 556                                 if (data ^ last_value) {
 557                                         /*
 558                                          * deltintrtv > 2*TIME_CONST,
 559                                          * remember ? the other case is
 560                                          * timeout
 561                                          */
 562                                         add_read_queue(last_value,
 563                                                        deltv-TIME_CONST);
 564                                         last_value = data;
 565                                         last_tv = curr_tv;
 566                                         if (last_tv.tv_usec >= TIME_CONST)
 567                                                 last_tv.tv_usec -= TIME_CONST;
 568                                         else {
 569                                                 last_tv.tv_sec--;
 570                                                 last_tv.tv_usec += 1000000 -
 571                                                         TIME_CONST;
 572                                         }
 573                                 }
 574                                 last_intr_tv = curr_tv;
 575                                 if (data) {
 576                                         /*
 577                                          * start timer for end of
 578                                          * sequence detection
 579                                          */
 580                                         timerlist.expires =
 581                                                 jiffies + IT87_TIMEOUT;
 582                                         add_timer(&timerlist);
 583                                 }
 584                                 outb((inb(io + IT87_CIR_RCR) &
 585                                      ~IT87_CIR_RCR_RXEN) |
 586                                      IT87_CIR_RCR_RXACT,
 587                                      io + IT87_CIR_RCR);
 588                                 if (it87_RXEN_mask)
 589                                         outb(inb(io + IT87_CIR_RCR) |
 590                                              IT87_CIR_RCR_RXEN,
 591                                              io + IT87_CIR_RCR);
 592                                 fifo--;
 593                         } while (fifo != 0);
 594                 }
 595                 spin_unlock_irqrestore(&hardware_lock, hw_flags);
 596                 spin_unlock_irqrestore(&timer_lock, flags);
 597
 598                 return IRQ_RETVAL(IRQ_HANDLED);
 599
 600         default:
 601                 /* not our irq */
 602                 dprintk("unknown IRQ (shouldn't happen) !!\n");
 603                 return IRQ_RETVAL(IRQ_NONE);
 604         }
 605 }
 606
 607
 608 static void send_it87(unsigned long len, unsigned long stime,
 609                       unsigned char send_byte, unsigned int count_bits)
 610 {
 611         long count = len / stime;
 612         long time_left = 0;
 613         static unsigned char byte_out;
 614         unsigned long hw_flags;
 615
 616         dprintk("%s: len=%ld, sb=%d\n", __func__, len, send_byte);
 617
 618         time_left = (long)len - (long)count * (long)stime;
 619         count += ((2 * time_left) / stime);
 620         while (count) {
 621                 long i = 0;
 622                 for (i = 0; i < count_bits; i++) {
 623                         byte_out = (byte_out << 1) | (send_byte & 1);
 624                         it87_bits_in_byte_out++;
 625                 }
 626                 if (it87_bits_in_byte_out == 8) {
 627                         dprintk("out=0x%x, tsr_txfbc: 0x%x\n",
 628                                 byte_out,
 629                                 inb(io + IT87_CIR_TSR) &
 630                                 IT87_CIR_TSR_TXFBC);
 631
 632                         while ((inb(io + IT87_CIR_TSR) &
 633                                 IT87_CIR_TSR_TXFBC) >= IT87_CIR_FIFO_SIZE)
 634                                 ;
 635
 636                         spin_lock_irqsave(&hardware_lock, hw_flags);
 637                         outb(byte_out, io + IT87_CIR_DR);
 638                         spin_unlock_irqrestore(&hardware_lock, hw_flags);
 639
 640                         it87_bits_in_byte_out = 0;
 641                         it87_send_counter++;
 642                         byte_out = 0;
 643                 }
 644                 count--;
 645         }
 646 }
 647
 648
 649 /*TODO: maybe exchange space and pulse because it8705 only modulates 0-bits */
 650
 651 static void send_space(unsigned long len)
 652 {
 653         send_it87(len, TIME_CONST, IT87_CIR_SPACE, IT87_CIR_BAUDRATE_DIVISOR);
 654 }
 655
 656 static void send_pulse(unsigned long len)
 657 {
 658         send_it87(len, TIME_CONST, IT87_CIR_PULSE, IT87_CIR_BAUDRATE_DIVISOR);
 659 }
 660
 661
 662 static void init_send()
 663 {
 664         unsigned long flags;
 665
 666         spin_lock_irqsave(&hardware_lock, flags);
 667         /* RXEN=0: receiver disable */
 668         it87_RXEN_mask = 0;
 669         outb(inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN,
 670              io + IT87_CIR_RCR);
 671         spin_unlock_irqrestore(&hardware_lock, flags);
 672         it87_bits_in_byte_out = 0;
 673         it87_send_counter = 0;
 674 }
 675
 676
 677 static void terminate_send(unsigned long len)
 678 {
 679         unsigned long flags;
 680         unsigned long last = 0;
 681
 682         last = it87_send_counter;
 683         /* make sure all necessary data has been sent */
 684         while (last == it87_send_counter)
 685                 send_space(len);
 686         /* wait until all data sent */
 687         while ((inb(io + IT87_CIR_TSR) & IT87_CIR_TSR_TXFBC) != 0)
 688                 ;
 689         /* then re-enable receiver */
 690         spin_lock_irqsave(&hardware_lock, flags);
 691         it87_RXEN_mask = IT87_CIR_RCR_RXEN;
 692         outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN,
 693              io + IT87_CIR_RCR);
 694         spin_unlock_irqrestore(&hardware_lock, flags);
 695 }
 696
 697
 698 static int init_hardware(void)
 699 {
 700         unsigned long flags;
 701         unsigned char it87_rcr = 0;
 702
 703         spin_lock_irqsave(&hardware_lock, flags);
 704         /* init cir-port */
 705         /* enable r/w-access to Baudrate-Register */
 706         outb(IT87_CIR_IER_BR, io + IT87_CIR_IER);
 707         outb(IT87_CIR_BAUDRATE_DIVISOR % 0x100, io+IT87_CIR_BDLR);
 708         outb(IT87_CIR_BAUDRATE_DIVISOR / 0x100, io+IT87_CIR_BDHR);
 709         /* Baudrate Register off, define IRQs: Input only */
 710         if (digimatrix) {
 711                 outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RFOIE, io + IT87_CIR_IER);
 712                 /* RX: HCFS=0, RXDCR = 001b (33,75..38,25 kHz), RXEN=1 */
 713         } else {
 714                 outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RDAIE, io + IT87_CIR_IER);
 715                 /* RX: HCFS=0, RXDCR = 001b (35,6..40,3 kHz), RXEN=1 */
 716         }
 717         it87_rcr = (IT87_CIR_RCR_RXEN & it87_RXEN_mask) | 0x1;
 718         if (it87_enable_demodulator)
 719                 it87_rcr |= IT87_CIR_RCR_RXEND;
 720         outb(it87_rcr, io + IT87_CIR_RCR);
 721         if (digimatrix) {
 722                 /* Set FIFO depth to 1 byte, and disable TX */
 723                 outb(inb(io + IT87_CIR_TCR1) |  0x00,
 724                      io + IT87_CIR_TCR1);
 725
 726                 /*
 727                  * TX: it87_freq (36kHz), 'reserved' sensitivity
 728                  * setting (0x00)
 729                  */
 730                 outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x00,
 731                      io + IT87_CIR_TCR2);
 732         } else {
 733                 /* TX: 38kHz, 13,3us (pulse-width) */
 734                 outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x06,
 735                      io + IT87_CIR_TCR2);
 736         }
 737         spin_unlock_irqrestore(&hardware_lock, flags);
 738         return 0;
 739 }
 740
 741
 742 static void drop_hardware(void)
 743 {
 744         unsigned long flags;
 745
 746         spin_lock_irqsave(&hardware_lock, flags);
 747         disable_irq(irq);
 748         /* receiver disable */
 749         it87_RXEN_mask = 0;
 750         outb(0x1, io + IT87_CIR_RCR);
 751         /* turn off irqs */
 752         outb(0, io + IT87_CIR_IER);
 753         /* fifo clear */
 754         outb(IT87_CIR_TCR1_FIFOCLR, io+IT87_CIR_TCR1);
 755         /* reset */
 756         outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER);
 757         enable_irq(irq);
 758         spin_unlock_irqrestore(&hardware_lock, flags);
 759 }
 760
 761
 762 static unsigned char it87_read(unsigned char port)
 763 {
 764         outb(port, IT87_ADRPORT);
 765         return inb(IT87_DATAPORT);
 766 }
 767
 768
 769 static void it87_write(unsigned char port, unsigned char data)
 770 {
 771         outb(port, IT87_ADRPORT);
 772         outb(data, IT87_DATAPORT);
 773 }
 774
 775
 776 /* SECTION: Initialisation */
 777
 778 static int init_port(void)
 779 {
 780         unsigned long hw_flags;
 781         int retval = 0;
 782
 783         unsigned char init_bytes[4] = IT87_INIT;
 784         unsigned char it87_chipid = 0;
 785         unsigned char ldn = 0;
 786         unsigned int  it87_io = 0;
 787         unsigned int  it87_irq = 0;
 788
 789         /* Enter MB PnP Mode */
 790         outb(init_bytes[0], IT87_ADRPORT);
 791         outb(init_bytes[1], IT87_ADRPORT);
 792         outb(init_bytes[2], IT87_ADRPORT);
 793         outb(init_bytes[3], IT87_ADRPORT);
 794
 795         /* 8712 or 8705 ? */
 796         it87_chipid = it87_read(IT87_CHIP_ID1);
 797         if (it87_chipid != 0x87) {
 798                 retval = -ENXIO;
 799                 return retval;
 800         }
 801         it87_chipid = it87_read(IT87_CHIP_ID2);
 802         if ((it87_chipid != 0x05) &&
 803                 (it87_chipid != 0x12) &&
 804                 (it87_chipid != 0x18) &&
 805                 (it87_chipid != 0x20)) {
 806                 printk(KERN_INFO LIRC_DRIVER_NAME
 807                        ": no IT8704/05/12/18/20 found (claimed IT87%02x), "
 808                        "exiting..\n", it87_chipid);
 809                 retval = -ENXIO;
 810                 return retval;
 811         }
 812         printk(KERN_INFO LIRC_DRIVER_NAME
 813                ": found IT87%02x.\n",
 814                it87_chipid);
 815
 816         /* get I/O-Port and IRQ */
 817         if (it87_chipid == 0x12 || it87_chipid == 0x18)
 818                 ldn = IT8712_CIR_LDN;
 819         else
 820                 ldn = IT8705_CIR_LDN;
 821         it87_write(IT87_LDN, ldn);
 822
 823         it87_io = it87_read(IT87_CIR_BASE_MSB) * 256 +
 824                   it87_read(IT87_CIR_BASE_LSB);
 825         if (it87_io == 0) {
 826                 if (io == 0)
 827                         io = IT87_CIR_DEFAULT_IOBASE;
 828                 printk(KERN_INFO LIRC_DRIVER_NAME
 829                        ": set default io 0x%x\n",
 830                        io);
 831                 it87_write(IT87_CIR_BASE_MSB, io / 0x100);
 832                 it87_write(IT87_CIR_BASE_LSB, io % 0x100);
 833         } else
 834                 io = it87_io;
 835
 836         it87_irq = it87_read(IT87_CIR_IRQ);
 837         if (digimatrix || it87_irq == 0) {
 838                 if (irq == 0)
 839                         irq = IT87_CIR_DEFAULT_IRQ;
 840                 printk(KERN_INFO LIRC_DRIVER_NAME
 841                        ": set default irq 0x%x\n",
 842                        irq);
 843                 it87_write(IT87_CIR_IRQ, irq);
 844         } else
 845                 irq = it87_irq;
 846
 847         spin_lock_irqsave(&hardware_lock, hw_flags);
 848         /* reset */
 849         outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER);
 850         /* fifo clear */
 851         outb(IT87_CIR_TCR1_FIFOCLR |
 852              /*      IT87_CIR_TCR1_ILE | */
 853              IT87_CIR_TCR1_TXRLE |
 854              IT87_CIR_TCR1_TXENDF, io+IT87_CIR_TCR1);
 855         spin_unlock_irqrestore(&hardware_lock, hw_flags);
 856
 857         /* get I/O port access and IRQ line */
 858         if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
 859                 printk(KERN_ERR LIRC_DRIVER_NAME
 860                        ": i/o port 0x%.4x already in use.\n", io);
 861                 /* Leaving MB PnP Mode */
 862                 it87_write(IT87_CFGCTRL, 0x2);
 863                 return -EBUSY;
 864         }
 865
 866         /* activate CIR-Device */
 867         it87_write(IT87_CIR_ACT, 0x1);
 868
 869         /* Leaving MB PnP Mode */
 870         it87_write(IT87_CFGCTRL, 0x2);
 871
 872         retval = request_irq(irq, it87_interrupt, 0 /*IRQF_DISABLED*/,
 873                              LIRC_DRIVER_NAME, NULL);
 874         if (retval < 0) {
 875                 printk(KERN_ERR LIRC_DRIVER_NAME
 876                        ": IRQ %d already in use.\n",
 877                        irq);
 878                 release_region(io, 8);
 879                 return retval;
 880         }
 881
 882         printk(KERN_INFO LIRC_DRIVER_NAME
 883                ": I/O port 0x%.4x, IRQ %d.\n", io, irq);
 884
 885         init_timer(&timerlist);
 886         timerlist.function = it87_timeout;
 887         timerlist.data = 0xabadcafe;
 888
 889         return 0;
 890 }
 891
 892
 893 static void drop_port(void)
 894 {
 895 #if 0
 896         unsigned char init_bytes[4] = IT87_INIT;
 897
 898         /* Enter MB PnP Mode */
 899         outb(init_bytes[0], IT87_ADRPORT);
 900         outb(init_bytes[1], IT87_ADRPORT);
 901         outb(init_bytes[2], IT87_ADRPORT);
 902         outb(init_bytes[3], IT87_ADRPORT);
 903
 904         /* deactivate CIR-Device */
 905         it87_write(IT87_CIR_ACT, 0x0);
 906
 907         /* Leaving MB PnP Mode */
 908         it87_write(IT87_CFGCTRL, 0x2);
 909 #endif
 910
 911         del_timer_sync(&timerlist);
 912         free_irq(irq, NULL);
 913         release_region(io, 8);
 914 }
 915
 916
 917 static int init_lirc_it87(void)
 918 {
 919         int retval;
 920
 921         init_waitqueue_head(&lirc_read_queue);
 922         retval = init_port();
 923         if (retval < 0)
 924                 return retval;
 925         init_hardware();
 926         printk(KERN_INFO LIRC_DRIVER_NAME ": Installed.\n");
 927         return 0;
 928 }
 929
 930 static int it87_probe(struct pnp_dev *pnp_dev,
 931                       const struct pnp_device_id *dev_id)
 932 {
 933         int retval;
 934
 935         driver.dev = &pnp_dev->dev;
 936
 937         retval = init_chrdev();
 938         if (retval < 0)
 939                 return retval;
 940
 941         retval = init_lirc_it87();
 942         if (retval)
 943                 goto init_lirc_it87_failed;
 944
 945         return 0;
 946
 947 init_lirc_it87_failed:
 948         drop_chrdev();
 949
 950         return retval;
 951 }
 952
 953 static int __init lirc_it87_init(void)
 954 {
 955         return pnp_register_driver(&it87_pnp_driver);
 956 }
 957
 958
 959 static void __exit lirc_it87_exit(void)
 960 {
 961         drop_hardware();
 962         drop_chrdev();
 963         drop_port();
 964         pnp_unregister_driver(&it87_pnp_driver);
 965         printk(KERN_INFO LIRC_DRIVER_NAME ": Uninstalled.\n");
 966 }
 967
 968 /* SECTION: PNP for ITE8704/13/18 */
 969
 970 static const struct pnp_device_id pnp_dev_table[] = {
 971         {"ITE8704", 0},
 972         {"ITE8713", 0},
 973         {}
 974 };
 975
 976 MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
 977
 978 static struct pnp_driver it87_pnp_driver = {
 979         .name           = LIRC_DRIVER_NAME,
 980         .id_table       = pnp_dev_table,
 981         .probe          = it87_probe,
 982 };
 983
 984 module_init(lirc_it87_init);
 985 module_exit(lirc_it87_exit);
 986
 987 MODULE_DESCRIPTION("LIRC driver for ITE IT8704/05/12/18/20 CIR port");
 988 MODULE_AUTHOR("Hans-Gunter Lutke Uphues");
 989 MODULE_LICENSE("GPL");
 990
 991 module_param(io, int, S_IRUGO);
 992 MODULE_PARM_DESC(io, "I/O base address (default: 0x310)");
 993
 994 module_param(irq, int, S_IRUGO);
 995 #ifdef LIRC_IT87_DIGIMATRIX
 996 MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 9)");
 997 #else
 998 MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 7)");
 999 #endif
1000
1001 module_param(it87_enable_demodulator, bool, S_IRUGO);
1002 MODULE_PARM_DESC(it87_enable_demodulator,
1003                  "Receiver demodulator enable/disable (1/0), default: 0");
1004
1005 module_param(debug, bool, S_IRUGO | S_IWUSR);
1006 MODULE_PARM_DESC(debug, "Enable debugging messages");
1007
1008 module_param(digimatrix, bool, S_IRUGO | S_IWUSR);
1009 #ifdef LIRC_IT87_DIGIMATRIX
1010 MODULE_PARM_DESC(digimatrix,
1011         "Asus Digimatrix it87 compat. enable/disable (1/0), default: 1");
1012 #else
1013 MODULE_PARM_DESC(digimatrix,
1014         "Asus Digimatrix it87 compat. enable/disable (1/0), default: 0");
1015 #endif
1016
1017
1018 module_param(it87_freq, int, S_IRUGO);
1019 #ifdef LIRC_IT87_DIGIMATRIX
1020 MODULE_PARM_DESC(it87_freq,
1021     "Carrier demodulator frequency (kHz), (default: 36)");
1022 #else
1023 MODULE_PARM_DESC(it87_freq,
1024     "Carrier demodulator frequency (kHz), (default: 38)");
1025 #endif