drivers/net/wireless/ath/ath9k/recv.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "ath9k.h"
  18 #include "ar9003_mac.h"
  19
  20 #define SKB_CB_ATHBUF(__skb)    (*((struct ath_buf **)__skb->cb))
  21
  22 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
  23                                                int mindelta, int main_rssi_avg,
  24                                                int alt_rssi_avg, int pkt_count)
  25 {
  26         return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
  27                 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
  28                 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
  29 }
  30
  31 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
  32 {
  33         return sc->ps_enabled &&
  34                (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
  35 }
  36
  37 static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
  38                                              struct ieee80211_hdr *hdr)
  39 {
  40         struct ieee80211_hw *hw = sc->pri_wiphy->hw;
  41         int i;
  42
  43         spin_lock_bh(&sc->wiphy_lock);
  44         for (i = 0; i < sc->num_sec_wiphy; i++) {
  45                 struct ath_wiphy *aphy = sc->sec_wiphy[i];
  46                 if (aphy == NULL)
  47                         continue;
  48                 if (compare_ether_addr(hdr->addr1, aphy->hw->wiphy->perm_addr)
  49                     == 0) {
  50                         hw = aphy->hw;
  51                         break;
  52                 }
  53         }
  54         spin_unlock_bh(&sc->wiphy_lock);
  55         return hw;
  56 }
  57
  58 /*
  59  * Setup and link descriptors.
  60  *
  61  * 11N: we can no longer afford to self link the last descriptor.
  62  * MAC acknowledges BA status as long as it copies frames to host
  63  * buffer (or rx fifo). This can incorrectly acknowledge packets
  64  * to a sender if last desc is self-linked.
  65  */
  66 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
  67 {
  68         struct ath_hw *ah = sc->sc_ah;
  69         struct ath_common *common = ath9k_hw_common(ah);
  70         struct ath_desc *ds;
  71         struct sk_buff *skb;
  72
  73         ATH_RXBUF_RESET(bf);
  74
  75         ds = bf->bf_desc;
  76         ds->ds_link = 0; /* link to null */
  77         ds->ds_data = bf->bf_buf_addr;
  78
  79         /* virtual addr of the beginning of the buffer. */
  80         skb = bf->bf_mpdu;
  81         BUG_ON(skb == NULL);
  82         ds->ds_vdata = skb->data;
  83
  84         /*
  85          * setup rx descriptors. The rx_bufsize here tells the hardware
  86          * how much data it can DMA to us and that we are prepared
  87          * to process
  88          */
  89         ath9k_hw_setuprxdesc(ah, ds,
  90                              common->rx_bufsize,
  91                              0);
  92
  93         if (sc->rx.rxlink == NULL)
  94                 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
  95         else
  96                 *sc->rx.rxlink = bf->bf_daddr;
  97
  98         sc->rx.rxlink = &ds->ds_link;
  99         ath9k_hw_rxena(ah);
 100 }
 101
 102 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
 103 {
 104         /* XXX block beacon interrupts */
 105         ath9k_hw_setantenna(sc->sc_ah, antenna);
 106         sc->rx.defant = antenna;
 107         sc->rx.rxotherant = 0;
 108 }
 109
 110 static void ath_opmode_init(struct ath_softc *sc)
 111 {
 112         struct ath_hw *ah = sc->sc_ah;
 113         struct ath_common *common = ath9k_hw_common(ah);
 114
 115         u32 rfilt, mfilt[2];
 116
 117         /* configure rx filter */
 118         rfilt = ath_calcrxfilter(sc);
 119         ath9k_hw_setrxfilter(ah, rfilt);
 120
 121         /* configure bssid mask */
 122         ath_hw_setbssidmask(common);
 123
 124         /* configure operational mode */
 125         ath9k_hw_setopmode(ah);
 126
 127         /* calculate and install multicast filter */
 128         mfilt[0] = mfilt[1] = ~0;
 129         ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
 130 }
 131
 132 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
 133                                  enum ath9k_rx_qtype qtype)
 134 {
 135         struct ath_hw *ah = sc->sc_ah;
 136         struct ath_rx_edma *rx_edma;
 137         struct sk_buff *skb;
 138         struct ath_buf *bf;
 139
 140         rx_edma = &sc->rx.rx_edma[qtype];
 141         if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
 142                 return false;
 143
 144         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 145         list_del_init(&bf->list);
 146
 147         skb = bf->bf_mpdu;
 148
 149         ATH_RXBUF_RESET(bf);
 150         memset(skb->data, 0, ah->caps.rx_status_len);
 151         dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 152                                 ah->caps.rx_status_len, DMA_TO_DEVICE);
 153
 154         SKB_CB_ATHBUF(skb) = bf;
 155         ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
 156         skb_queue_tail(&rx_edma->rx_fifo, skb);
 157
 158         return true;
 159 }
 160
 161 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
 162                                   enum ath9k_rx_qtype qtype, int size)
 163 {
 164         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 165         u32 nbuf = 0;
 166
 167         if (list_empty(&sc->rx.rxbuf)) {
 168                 ath_print(common, ATH_DBG_QUEUE, "No free rx buf available\n");
 169                 return;
 170         }
 171
 172         while (!list_empty(&sc->rx.rxbuf)) {
 173                 nbuf++;
 174
 175                 if (!ath_rx_edma_buf_link(sc, qtype))
 176                         break;
 177
 178                 if (nbuf >= size)
 179                         break;
 180         }
 181 }
 182
 183 static void ath_rx_remove_buffer(struct ath_softc *sc,
 184                                  enum ath9k_rx_qtype qtype)
 185 {
 186         struct ath_buf *bf;
 187         struct ath_rx_edma *rx_edma;
 188         struct sk_buff *skb;
 189
 190         rx_edma = &sc->rx.rx_edma[qtype];
 191
 192         while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
 193                 bf = SKB_CB_ATHBUF(skb);
 194                 BUG_ON(!bf);
 195                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 196         }
 197 }
 198
 199 static void ath_rx_edma_cleanup(struct ath_softc *sc)
 200 {
 201         struct ath_buf *bf;
 202
 203         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 204         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 205
 206         list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 207                 if (bf->bf_mpdu)
 208                         dev_kfree_skb_any(bf->bf_mpdu);
 209         }
 210
 211         INIT_LIST_HEAD(&sc->rx.rxbuf);
 212
 213         kfree(sc->rx.rx_bufptr);
 214         sc->rx.rx_bufptr = NULL;
 215 }
 216
 217 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
 218 {
 219         skb_queue_head_init(&rx_edma->rx_fifo);
 220         skb_queue_head_init(&rx_edma->rx_buffers);
 221         rx_edma->rx_fifo_hwsize = size;
 222 }
 223
 224 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
 225 {
 226         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 227         struct ath_hw *ah = sc->sc_ah;
 228         struct sk_buff *skb;
 229         struct ath_buf *bf;
 230         int error = 0, i;
 231         u32 size;
 232
 233
 234         common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN +
 235                                      ah->caps.rx_status_len,
 236                                      min(common->cachelsz, (u16)64));
 237
 238         ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
 239                                     ah->caps.rx_status_len);
 240
 241         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
 242                                ah->caps.rx_lp_qdepth);
 243         ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
 244                                ah->caps.rx_hp_qdepth);
 245
 246         size = sizeof(struct ath_buf) * nbufs;
 247         bf = kzalloc(size, GFP_KERNEL);
 248         if (!bf)
 249                 return -ENOMEM;
 250
 251         INIT_LIST_HEAD(&sc->rx.rxbuf);
 252         sc->rx.rx_bufptr = bf;
 253
 254         for (i = 0; i < nbufs; i++, bf++) {
 255                 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
 256                 if (!skb) {
 257                         error = -ENOMEM;
 258                         goto rx_init_fail;
 259                 }
 260
 261                 memset(skb->data, 0, common->rx_bufsize);
 262                 bf->bf_mpdu = skb;
 263
 264                 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 265                                                  common->rx_bufsize,
 266                                                  DMA_BIDIRECTIONAL);
 267                 if (unlikely(dma_mapping_error(sc->dev,
 268                                                 bf->bf_buf_addr))) {
 269                                 dev_kfree_skb_any(skb);
 270                                 bf->bf_mpdu = NULL;
 271                                 bf->bf_buf_addr = 0;
 272                                 ath_print(common, ATH_DBG_FATAL,
 273                                         "dma_mapping_error() on RX init\n");
 274                                 error = -ENOMEM;
 275                                 goto rx_init_fail;
 276                 }
 277
 278                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 279         }
 280
 281         return 0;
 282
 283 rx_init_fail:
 284         ath_rx_edma_cleanup(sc);
 285         return error;
 286 }
 287
 288 static void ath_edma_start_recv(struct ath_softc *sc)
 289 {
 290         spin_lock_bh(&sc->rx.rxbuflock);
 291
 292         ath9k_hw_rxena(sc->sc_ah);
 293
 294         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
 295                               sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
 296
 297         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
 298                               sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
 299
 300         ath_opmode_init(sc);
 301
 302         ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
 303
 304         spin_unlock_bh(&sc->rx.rxbuflock);
 305 }
 306
 307 static void ath_edma_stop_recv(struct ath_softc *sc)
 308 {
 309         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
 310         ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
 311 }
 312
 313 int ath_rx_init(struct ath_softc *sc, int nbufs)
 314 {
 315         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 316         struct sk_buff *skb;
 317         struct ath_buf *bf;
 318         int error = 0;
 319
 320         spin_lock_init(&sc->sc_pcu_lock);
 321         sc->sc_flags &= ~SC_OP_RXFLUSH;
 322         spin_lock_init(&sc->rx.rxbuflock);
 323
 324         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 325                 return ath_rx_edma_init(sc, nbufs);
 326         } else {
 327                 common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
 328                                 min(common->cachelsz, (u16)64));
 329
 330                 ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
 331                                 common->cachelsz, common->rx_bufsize);
 332
 333                 /* Initialize rx descriptors */
 334
 335                 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
 336                                 "rx", nbufs, 1, 0);
 337                 if (error != 0) {
 338                         ath_print(common, ATH_DBG_FATAL,
 339                                   "failed to allocate rx descriptors: %d\n",
 340                                   error);
 341                         goto err;
 342                 }
 343
 344                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 345                         skb = ath_rxbuf_alloc(common, common->rx_bufsize,
 346                                               GFP_KERNEL);
 347                         if (skb == NULL) {
 348                                 error = -ENOMEM;
 349                                 goto err;
 350                         }
 351
 352                         bf->bf_mpdu = skb;
 353                         bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
 354                                         common->rx_bufsize,
 355                                         DMA_FROM_DEVICE);
 356                         if (unlikely(dma_mapping_error(sc->dev,
 357                                                         bf->bf_buf_addr))) {
 358                                 dev_kfree_skb_any(skb);
 359                                 bf->bf_mpdu = NULL;
 360                                 bf->bf_buf_addr = 0;
 361                                 ath_print(common, ATH_DBG_FATAL,
 362                                           "dma_mapping_error() on RX init\n");
 363                                 error = -ENOMEM;
 364                                 goto err;
 365                         }
 366                 }
 367                 sc->rx.rxlink = NULL;
 368         }
 369
 370 err:
 371         if (error)
 372                 ath_rx_cleanup(sc);
 373
 374         return error;
 375 }
 376
 377 void ath_rx_cleanup(struct ath_softc *sc)
 378 {
 379         struct ath_hw *ah = sc->sc_ah;
 380         struct ath_common *common = ath9k_hw_common(ah);
 381         struct sk_buff *skb;
 382         struct ath_buf *bf;
 383
 384         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 385                 ath_rx_edma_cleanup(sc);
 386                 return;
 387         } else {
 388                 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
 389                         skb = bf->bf_mpdu;
 390                         if (skb) {
 391                                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
 392                                                 common->rx_bufsize,
 393                                                 DMA_FROM_DEVICE);
 394                                 dev_kfree_skb(skb);
 395                                 bf->bf_buf_addr = 0;
 396                                 bf->bf_mpdu = NULL;
 397                         }
 398                 }
 399
 400                 if (sc->rx.rxdma.dd_desc_len != 0)
 401                         ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
 402         }
 403 }
 404
 405 /*
 406  * Calculate the receive filter according to the
 407  * operating mode and state:
 408  *
 409  * o always accept unicast, broadcast, and multicast traffic
 410  * o maintain current state of phy error reception (the hal
 411  *   may enable phy error frames for noise immunity work)
 412  * o probe request frames are accepted only when operating in
 413  *   hostap, adhoc, or monitor modes
 414  * o enable promiscuous mode according to the interface state
 415  * o accept beacons:
 416  *   - when operating in adhoc mode so the 802.11 layer creates
 417  *     node table entries for peers,
 418  *   - when operating in station mode for collecting rssi data when
 419  *     the station is otherwise quiet, or
 420  *   - when operating as a repeater so we see repeater-sta beacons
 421  *   - when scanning
 422  */
 423
 424 u32 ath_calcrxfilter(struct ath_softc *sc)
 425 {
 426 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
 427
 428         u32 rfilt;
 429
 430         rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
 431                 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
 432                 | ATH9K_RX_FILTER_MCAST;
 433
 434         if (sc->rx.rxfilter & FIF_PROBE_REQ)
 435                 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
 436
 437         /*
 438          * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
 439          * mode interface or when in monitor mode. AP mode does not need this
 440          * since it receives all in-BSS frames anyway.
 441          */
 442         if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) &&
 443              (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) ||
 444             (sc->sc_ah->is_monitoring))
 445                 rfilt |= ATH9K_RX_FILTER_PROM;
 446
 447         if (sc->rx.rxfilter & FIF_CONTROL)
 448                 rfilt |= ATH9K_RX_FILTER_CONTROL;
 449
 450         if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
 451             (sc->nvifs <= 1) &&
 452             !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
 453                 rfilt |= ATH9K_RX_FILTER_MYBEACON;
 454         else
 455                 rfilt |= ATH9K_RX_FILTER_BEACON;
 456
 457         if ((AR_SREV_9280_20_OR_LATER(sc->sc_ah) ||
 458             AR_SREV_9285_12_OR_LATER(sc->sc_ah)) &&
 459             (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
 460             (sc->rx.rxfilter & FIF_PSPOLL))
 461                 rfilt |= ATH9K_RX_FILTER_PSPOLL;
 462
 463         if (conf_is_ht(&sc->hw->conf))
 464                 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
 465
 466         if (sc->sec_wiphy || (sc->nvifs > 1) ||
 467             (sc->rx.rxfilter & FIF_OTHER_BSS)) {
 468                 /* The following may also be needed for other older chips */
 469                 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
 470                         rfilt |= ATH9K_RX_FILTER_PROM;
 471                 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
 472         }
 473
 474         return rfilt;
 475
 476 #undef RX_FILTER_PRESERVE
 477 }
 478
 479 int ath_startrecv(struct ath_softc *sc)
 480 {
 481         struct ath_hw *ah = sc->sc_ah;
 482         struct ath_buf *bf, *tbf;
 483
 484         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 485                 ath_edma_start_recv(sc);
 486                 return 0;
 487         }
 488
 489         spin_lock_bh(&sc->rx.rxbuflock);
 490         if (list_empty(&sc->rx.rxbuf))
 491                 goto start_recv;
 492
 493         sc->rx.rxlink = NULL;
 494         list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
 495                 ath_rx_buf_link(sc, bf);
 496         }
 497
 498         /* We could have deleted elements so the list may be empty now */
 499         if (list_empty(&sc->rx.rxbuf))
 500                 goto start_recv;
 501
 502         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 503         ath9k_hw_putrxbuf(ah, bf->bf_daddr);
 504         ath9k_hw_rxena(ah);
 505
 506 start_recv:
 507         ath_opmode_init(sc);
 508         ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
 509
 510         spin_unlock_bh(&sc->rx.rxbuflock);
 511
 512         return 0;
 513 }
 514
 515 bool ath_stoprecv(struct ath_softc *sc)
 516 {
 517         struct ath_hw *ah = sc->sc_ah;
 518         bool stopped;
 519
 520         spin_lock_bh(&sc->rx.rxbuflock);
 521         ath9k_hw_stoppcurecv(ah);
 522         ath9k_hw_setrxfilter(ah, 0);
 523         stopped = ath9k_hw_stopdmarecv(ah);
 524
 525         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 526                 ath_edma_stop_recv(sc);
 527         else
 528                 sc->rx.rxlink = NULL;
 529         spin_unlock_bh(&sc->rx.rxbuflock);
 530
 531         ATH_DBG_WARN(!stopped, "Could not stop RX, we could be "
 532                      "confusing the DMA engine when we start RX up\n");
 533         return stopped;
 534 }
 535
 536 void ath_flushrecv(struct ath_softc *sc)
 537 {
 538         sc->sc_flags |= SC_OP_RXFLUSH;
 539         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 540                 ath_rx_tasklet(sc, 1, true);
 541         ath_rx_tasklet(sc, 1, false);
 542         sc->sc_flags &= ~SC_OP_RXFLUSH;
 543 }
 544
 545 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
 546 {
 547         /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
 548         struct ieee80211_mgmt *mgmt;
 549         u8 *pos, *end, id, elen;
 550         struct ieee80211_tim_ie *tim;
 551
 552         mgmt = (struct ieee80211_mgmt *)skb->data;
 553         pos = mgmt->u.beacon.variable;
 554         end = skb->data + skb->len;
 555
 556         while (pos + 2 < end) {
 557                 id = *pos++;
 558                 elen = *pos++;
 559                 if (pos + elen > end)
 560                         break;
 561
 562                 if (id == WLAN_EID_TIM) {
 563                         if (elen < sizeof(*tim))
 564                                 break;
 565                         tim = (struct ieee80211_tim_ie *) pos;
 566                         if (tim->dtim_count != 0)
 567                                 break;
 568                         return tim->bitmap_ctrl & 0x01;
 569                 }
 570
 571                 pos += elen;
 572         }
 573
 574         return false;
 575 }
 576
 577 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
 578 {
 579         struct ieee80211_mgmt *mgmt;
 580         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 581
 582         if (skb->len < 24 + 8 + 2 + 2)
 583                 return;
 584
 585         mgmt = (struct ieee80211_mgmt *)skb->data;
 586         if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
 587                 return; /* not from our current AP */
 588
 589         sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
 590
 591         if (sc->ps_flags & PS_BEACON_SYNC) {
 592                 sc->ps_flags &= ~PS_BEACON_SYNC;
 593                 ath_print(common, ATH_DBG_PS,
 594                           "Reconfigure Beacon timers based on "
 595                           "timestamp from the AP\n");
 596                 ath_beacon_config(sc, NULL);
 597         }
 598
 599         if (ath_beacon_dtim_pending_cab(skb)) {
 600                 /*
 601                  * Remain awake waiting for buffered broadcast/multicast
 602                  * frames. If the last broadcast/multicast frame is not
 603                  * received properly, the next beacon frame will work as
 604                  * a backup trigger for returning into NETWORK SLEEP state,
 605                  * so we are waiting for it as well.
 606                  */
 607                 ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
 608                           "buffered broadcast/multicast frame(s)\n");
 609                 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
 610                 return;
 611         }
 612
 613         if (sc->ps_flags & PS_WAIT_FOR_CAB) {
 614                 /*
 615                  * This can happen if a broadcast frame is dropped or the AP
 616                  * fails to send a frame indicating that all CAB frames have
 617                  * been delivered.
 618                  */
 619                 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
 620                 ath_print(common, ATH_DBG_PS,
 621                           "PS wait for CAB frames timed out\n");
 622         }
 623 }
 624
 625 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
 626 {
 627         struct ieee80211_hdr *hdr;
 628         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 629
 630         hdr = (struct ieee80211_hdr *)skb->data;
 631
 632         /* Process Beacon and CAB receive in PS state */
 633         if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
 634             && ieee80211_is_beacon(hdr->frame_control))
 635                 ath_rx_ps_beacon(sc, skb);
 636         else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
 637                  (ieee80211_is_data(hdr->frame_control) ||
 638                   ieee80211_is_action(hdr->frame_control)) &&
 639                  is_multicast_ether_addr(hdr->addr1) &&
 640                  !ieee80211_has_moredata(hdr->frame_control)) {
 641                 /*
 642                  * No more broadcast/multicast frames to be received at this
 643                  * point.
 644                  */
 645                 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
 646                 ath_print(common, ATH_DBG_PS,
 647                           "All PS CAB frames received, back to sleep\n");
 648         } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
 649                    !is_multicast_ether_addr(hdr->addr1) &&
 650                    !ieee80211_has_morefrags(hdr->frame_control)) {
 651                 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
 652                 ath_print(common, ATH_DBG_PS,
 653                           "Going back to sleep after having received "
 654                           "PS-Poll data (0x%lx)\n",
 655                         sc->ps_flags & (PS_WAIT_FOR_BEACON |
 656                                         PS_WAIT_FOR_CAB |
 657                                         PS_WAIT_FOR_PSPOLL_DATA |
 658                                         PS_WAIT_FOR_TX_ACK));
 659         }
 660 }
 661
 662 static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
 663                                     struct ath_softc *sc, struct sk_buff *skb,
 664                                     struct ieee80211_rx_status *rxs)
 665 {
 666         struct ieee80211_hdr *hdr;
 667
 668         hdr = (struct ieee80211_hdr *)skb->data;
 669
 670         /* Send the frame to mac80211 */
 671         if (is_multicast_ether_addr(hdr->addr1)) {
 672                 int i;
 673                 /*
 674                  * Deliver broadcast/multicast frames to all suitable
 675                  * virtual wiphys.
 676                  */
 677                 /* TODO: filter based on channel configuration */
 678                 for (i = 0; i < sc->num_sec_wiphy; i++) {
 679                         struct ath_wiphy *aphy = sc->sec_wiphy[i];
 680                         struct sk_buff *nskb;
 681                         if (aphy == NULL)
 682                                 continue;
 683                         nskb = skb_copy(skb, GFP_ATOMIC);
 684                         if (!nskb)
 685                                 continue;
 686                         ieee80211_rx(aphy->hw, nskb);
 687                 }
 688                 ieee80211_rx(sc->hw, skb);
 689         } else
 690                 /* Deliver unicast frames based on receiver address */
 691                 ieee80211_rx(hw, skb);
 692 }
 693
 694 static bool ath_edma_get_buffers(struct ath_softc *sc,
 695                                  enum ath9k_rx_qtype qtype)
 696 {
 697         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 698         struct ath_hw *ah = sc->sc_ah;
 699         struct ath_common *common = ath9k_hw_common(ah);
 700         struct sk_buff *skb;
 701         struct ath_buf *bf;
 702         int ret;
 703
 704         skb = skb_peek(&rx_edma->rx_fifo);
 705         if (!skb)
 706                 return false;
 707
 708         bf = SKB_CB_ATHBUF(skb);
 709         BUG_ON(!bf);
 710
 711         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
 712                                 common->rx_bufsize, DMA_FROM_DEVICE);
 713
 714         ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
 715         if (ret == -EINPROGRESS) {
 716                 /*let device gain the buffer again*/
 717                 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
 718                                 common->rx_bufsize, DMA_FROM_DEVICE);
 719                 return false;
 720         }
 721
 722         __skb_unlink(skb, &rx_edma->rx_fifo);
 723         if (ret == -EINVAL) {
 724                 /* corrupt descriptor, skip this one and the following one */
 725                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 726                 ath_rx_edma_buf_link(sc, qtype);
 727                 skb = skb_peek(&rx_edma->rx_fifo);
 728                 if (!skb)
 729                         return true;
 730
 731                 bf = SKB_CB_ATHBUF(skb);
 732                 BUG_ON(!bf);
 733
 734                 __skb_unlink(skb, &rx_edma->rx_fifo);
 735                 list_add_tail(&bf->list, &sc->rx.rxbuf);
 736                 ath_rx_edma_buf_link(sc, qtype);
 737                 return true;
 738         }
 739         skb_queue_tail(&rx_edma->rx_buffers, skb);
 740
 741         return true;
 742 }
 743
 744 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
 745                                                 struct ath_rx_status *rs,
 746                                                 enum ath9k_rx_qtype qtype)
 747 {
 748         struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
 749         struct sk_buff *skb;
 750         struct ath_buf *bf;
 751
 752         while (ath_edma_get_buffers(sc, qtype));
 753         skb = __skb_dequeue(&rx_edma->rx_buffers);
 754         if (!skb)
 755                 return NULL;
 756
 757         bf = SKB_CB_ATHBUF(skb);
 758         ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
 759         return bf;
 760 }
 761
 762 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
 763                                            struct ath_rx_status *rs)
 764 {
 765         struct ath_hw *ah = sc->sc_ah;
 766         struct ath_common *common = ath9k_hw_common(ah);
 767         struct ath_desc *ds;
 768         struct ath_buf *bf;
 769         int ret;
 770
 771         if (list_empty(&sc->rx.rxbuf)) {
 772                 sc->rx.rxlink = NULL;
 773                 return NULL;
 774         }
 775
 776         bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
 777         ds = bf->bf_desc;
 778
 779         /*
 780          * Must provide the virtual address of the current
 781          * descriptor, the physical address, and the virtual
 782          * address of the next descriptor in the h/w chain.
 783          * This allows the HAL to look ahead to see if the
 784          * hardware is done with a descriptor by checking the
 785          * done bit in the following descriptor and the address
 786          * of the current descriptor the DMA engine is working
 787          * on.  All this is necessary because of our use of
 788          * a self-linked list to avoid rx overruns.
 789          */
 790         ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
 791         if (ret == -EINPROGRESS) {
 792                 struct ath_rx_status trs;
 793                 struct ath_buf *tbf;
 794                 struct ath_desc *tds;
 795
 796                 memset(&trs, 0, sizeof(trs));
 797                 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
 798                         sc->rx.rxlink = NULL;
 799                         return NULL;
 800                 }
 801
 802                 tbf = list_entry(bf->list.next, struct ath_buf, list);
 803
 804                 /*
 805                  * On some hardware the descriptor status words could
 806                  * get corrupted, including the done bit. Because of
 807                  * this, check if the next descriptor's done bit is
 808                  * set or not.
 809                  *
 810                  * If the next descriptor's done bit is set, the current
 811                  * descriptor has been corrupted. Force s/w to discard
 812                  * this descriptor and continue...
 813                  */
 814
 815                 tds = tbf->bf_desc;
 816                 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
 817                 if (ret == -EINPROGRESS)
 818                         return NULL;
 819         }
 820
 821         if (!bf->bf_mpdu)
 822                 return bf;
 823
 824         /*
 825          * Synchronize the DMA transfer with CPU before
 826          * 1. accessing the frame
 827          * 2. requeueing the same buffer to h/w
 828          */
 829         dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
 830                         common->rx_bufsize,
 831                         DMA_FROM_DEVICE);
 832
 833         return bf;
 834 }
 835
 836 /* Assumes you've already done the endian to CPU conversion */
 837 static bool ath9k_rx_accept(struct ath_common *common,
 838                             struct ieee80211_hdr *hdr,
 839                             struct ieee80211_rx_status *rxs,
 840                             struct ath_rx_status *rx_stats,
 841                             bool *decrypt_error)
 842 {
 843         struct ath_hw *ah = common->ah;
 844         __le16 fc;
 845         u8 rx_status_len = ah->caps.rx_status_len;
 846
 847         fc = hdr->frame_control;
 848
 849         if (!rx_stats->rs_datalen)
 850                 return false;
 851         /*
 852          * rs_status follows rs_datalen so if rs_datalen is too large
 853          * we can take a hint that hardware corrupted it, so ignore
 854          * those frames.
 855          */
 856         if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
 857                 return false;
 858
 859         /*
 860          * rs_more indicates chained descriptors which can be used
 861          * to link buffers together for a sort of scatter-gather
 862          * operation.
 863          * reject the frame, we don't support scatter-gather yet and
 864          * the frame is probably corrupt anyway
 865          */
 866         if (rx_stats->rs_more)
 867                 return false;
 868
 869         /*
 870          * The rx_stats->rs_status will not be set until the end of the
 871          * chained descriptors so it can be ignored if rs_more is set. The
 872          * rs_more will be false at the last element of the chained
 873          * descriptors.
 874          */
 875         if (rx_stats->rs_status != 0) {
 876                 if (rx_stats->rs_status & ATH9K_RXERR_CRC)
 877                         rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
 878                 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
 879                         return false;
 880
 881                 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
 882                         *decrypt_error = true;
 883                 } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
 884                         /*
 885                          * The MIC error bit is only valid if the frame
 886                          * is not a control frame or fragment, and it was
 887                          * decrypted using a valid TKIP key.
 888                          */
 889                         if (!ieee80211_is_ctl(fc) &&
 890                             !ieee80211_has_morefrags(fc) &&
 891                             !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
 892                             test_bit(rx_stats->rs_keyix, common->tkip_keymap))
 893                                 rxs->flag |= RX_FLAG_MMIC_ERROR;
 894                         else
 895                                 rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
 896                 }
 897                 /*
 898                  * Reject error frames with the exception of
 899                  * decryption and MIC failures. For monitor mode,
 900                  * we also ignore the CRC error.
 901                  */
 902                 if (ah->is_monitoring) {
 903                         if (rx_stats->rs_status &
 904                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
 905                               ATH9K_RXERR_CRC))
 906                                 return false;
 907                 } else {
 908                         if (rx_stats->rs_status &
 909                             ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
 910                                 return false;
 911                         }
 912                 }
 913         }
 914         return true;
 915 }
 916
 917 static int ath9k_process_rate(struct ath_common *common,
 918                               struct ieee80211_hw *hw,
 919                               struct ath_rx_status *rx_stats,
 920                               struct ieee80211_rx_status *rxs)
 921 {
 922         struct ieee80211_supported_band *sband;
 923         enum ieee80211_band band;
 924         unsigned int i = 0;
 925
 926         band = hw->conf.channel->band;
 927         sband = hw->wiphy->bands[band];
 928
 929         if (rx_stats->rs_rate & 0x80) {
 930                 /* HT rate */
 931                 rxs->flag |= RX_FLAG_HT;
 932                 if (rx_stats->rs_flags & ATH9K_RX_2040)
 933                         rxs->flag |= RX_FLAG_40MHZ;
 934                 if (rx_stats->rs_flags & ATH9K_RX_GI)
 935                         rxs->flag |= RX_FLAG_SHORT_GI;
 936                 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
 937                 return 0;
 938         }
 939
 940         for (i = 0; i < sband->n_bitrates; i++) {
 941                 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
 942                         rxs->rate_idx = i;
 943                         return 0;
 944                 }
 945                 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
 946                         rxs->flag |= RX_FLAG_SHORTPRE;
 947                         rxs->rate_idx = i;
 948                         return 0;
 949                 }
 950         }
 951
 952         /*
 953          * No valid hardware bitrate found -- we should not get here
 954          * because hardware has already validated this frame as OK.
 955          */
 956         ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected "
 957                   "0x%02x using 1 Mbit\n", rx_stats->rs_rate);
 958
 959         return -EINVAL;
 960 }
 961
 962 static void ath9k_process_rssi(struct ath_common *common,
 963                                struct ieee80211_hw *hw,
 964                                struct ieee80211_hdr *hdr,
 965                                struct ath_rx_status *rx_stats)
 966 {
 967         struct ath_wiphy *aphy = hw->priv;
 968         struct ath_hw *ah = common->ah;
 969         int last_rssi;
 970         __le16 fc;
 971
 972         if (ah->opmode != NL80211_IFTYPE_STATION)
 973                 return;
 974
 975         fc = hdr->frame_control;
 976         if (!ieee80211_is_beacon(fc) ||
 977             compare_ether_addr(hdr->addr3, common->curbssid))
 978                 return;
 979
 980         if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
 981                 ATH_RSSI_LPF(aphy->last_rssi, rx_stats->rs_rssi);
 982
 983         last_rssi = aphy->last_rssi;
 984         if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
 985                 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
 986                                               ATH_RSSI_EP_MULTIPLIER);
 987         if (rx_stats->rs_rssi < 0)
 988                 rx_stats->rs_rssi = 0;
 989
 990         /* Update Beacon RSSI, this is used by ANI. */
 991         ah->stats.avgbrssi = rx_stats->rs_rssi;
 992 }
 993
 994 /*
 995  * For Decrypt or Demic errors, we only mark packet status here and always push
 996  * up the frame up to let mac80211 handle the actual error case, be it no
 997  * decryption key or real decryption error. This let us keep statistics there.
 998  */
 999 static int ath9k_rx_skb_preprocess(struct ath_common *common,
1000                                    struct ieee80211_hw *hw,
1001                                    struct ieee80211_hdr *hdr,
1002                                    struct ath_rx_status *rx_stats,
1003                                    struct ieee80211_rx_status *rx_status,
1004                                    bool *decrypt_error)
1005 {
1006         memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
1007
1008         /*
1009          * everything but the rate is checked here, the rate check is done
1010          * separately to avoid doing two lookups for a rate for each frame.
1011          */
1012         if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
1013                 return -EINVAL;
1014
1015         ath9k_process_rssi(common, hw, hdr, rx_stats);
1016
1017         if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1018                 return -EINVAL;
1019
1020         rx_status->band = hw->conf.channel->band;
1021         rx_status->freq = hw->conf.channel->center_freq;
1022         rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
1023         rx_status->antenna = rx_stats->rs_antenna;
1024         rx_status->flag |= RX_FLAG_TSFT;
1025
1026         return 0;
1027 }
1028
1029 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1030                                      struct sk_buff *skb,
1031                                      struct ath_rx_status *rx_stats,
1032                                      struct ieee80211_rx_status *rxs,
1033                                      bool decrypt_error)
1034 {
1035         struct ath_hw *ah = common->ah;
1036         struct ieee80211_hdr *hdr;
1037         int hdrlen, padpos, padsize;
1038         u8 keyix;
1039         __le16 fc;
1040
1041         /* see if any padding is done by the hw and remove it */
1042         hdr = (struct ieee80211_hdr *) skb->data;
1043         hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1044         fc = hdr->frame_control;
1045         padpos = ath9k_cmn_padpos(hdr->frame_control);
1046
1047         /* The MAC header is padded to have 32-bit boundary if the
1048          * packet payload is non-zero. The general calculation for
1049          * padsize would take into account odd header lengths:
1050          * padsize = (4 - padpos % 4) % 4; However, since only
1051          * even-length headers are used, padding can only be 0 or 2
1052          * bytes and we can optimize this a bit. In addition, we must
1053          * not try to remove padding from short control frames that do
1054          * not have payload. */
1055         padsize = padpos & 3;
1056         if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1057                 memmove(skb->data + padsize, skb->data, padpos);
1058                 skb_pull(skb, padsize);
1059         }
1060
1061         keyix = rx_stats->rs_keyix;
1062
1063         if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1064             ieee80211_has_protected(fc)) {
1065                 rxs->flag |= RX_FLAG_DECRYPTED;
1066         } else if (ieee80211_has_protected(fc)
1067                    && !decrypt_error && skb->len >= hdrlen + 4) {
1068                 keyix = skb->data[hdrlen + 3] >> 6;
1069
1070                 if (test_bit(keyix, common->keymap))
1071                         rxs->flag |= RX_FLAG_DECRYPTED;
1072         }
1073         if (ah->sw_mgmt_crypto &&
1074             (rxs->flag & RX_FLAG_DECRYPTED) &&
1075             ieee80211_is_mgmt(fc))
1076                 /* Use software decrypt for management frames. */
1077                 rxs->flag &= ~RX_FLAG_DECRYPTED;
1078 }
1079
1080 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1081                                       struct ath_hw_antcomb_conf ant_conf,
1082                                       int main_rssi_avg)
1083 {
1084         antcomb->quick_scan_cnt = 0;
1085
1086         if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1087                 antcomb->rssi_lna2 = main_rssi_avg;
1088         else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1089                 antcomb->rssi_lna1 = main_rssi_avg;
1090
1091         switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1092         case (0x10): /* LNA2 A-B */
1093                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1094                 antcomb->first_quick_scan_conf =
1095                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1096                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1097                 break;
1098         case (0x20): /* LNA1 A-B */
1099                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1100                 antcomb->first_quick_scan_conf =
1101                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1102                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1103                 break;
1104         case (0x21): /* LNA1 LNA2 */
1105                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1106                 antcomb->first_quick_scan_conf =
1107                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1108                 antcomb->second_quick_scan_conf =
1109                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1110                 break;
1111         case (0x12): /* LNA2 LNA1 */
1112                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1113                 antcomb->first_quick_scan_conf =
1114                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1115                 antcomb->second_quick_scan_conf =
1116                         ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1117                 break;
1118         case (0x13): /* LNA2 A+B */
1119                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1120                 antcomb->first_quick_scan_conf =
1121                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1122                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1123                 break;
1124         case (0x23): /* LNA1 A+B */
1125                 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1126                 antcomb->first_quick_scan_conf =
1127                         ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1128                 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1129                 break;
1130         default:
1131                 break;
1132         }
1133 }
1134
1135 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1136                                 struct ath_hw_antcomb_conf *div_ant_conf,
1137                                 int main_rssi_avg, int alt_rssi_avg,
1138                                 int alt_ratio)
1139 {
1140         /* alt_good */
1141         switch (antcomb->quick_scan_cnt) {
1142         case 0:
1143                 /* set alt to main, and alt to first conf */
1144                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1145                 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1146                 break;
1147         case 1:
1148                 /* set alt to main, and alt to first conf */
1149                 div_ant_conf->main_lna_conf = antcomb->main_conf;
1150                 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1151                 antcomb->rssi_first = main_rssi_avg;
1152                 antcomb->rssi_second = alt_rssi_avg;
1153
1154                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1155                         /* main is LNA1 */
1156                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1157                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1158                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1159                                                 main_rssi_avg, alt_rssi_avg,
1160                                                 antcomb->total_pkt_count))
1161                                 antcomb->first_ratio = true;
1162                         else
1163                                 antcomb->first_ratio = false;
1164                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1165                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1166                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1167                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1168                                                 main_rssi_avg, alt_rssi_avg,
1169                                                 antcomb->total_pkt_count))
1170                                 antcomb->first_ratio = true;
1171                         else
1172                                 antcomb->first_ratio = false;
1173                 } else {
1174                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1175                             (alt_rssi_avg > main_rssi_avg +
1176                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1177                             (alt_rssi_avg > main_rssi_avg)) &&
1178                             (antcomb->total_pkt_count > 50))
1179                                 antcomb->first_ratio = true;
1180                         else
1181                                 antcomb->first_ratio = false;
1182                 }
1183                 break;
1184         case 2:
1185                 antcomb->alt_good = false;
1186                 antcomb->scan_not_start = false;
1187                 antcomb->scan = false;
1188                 antcomb->rssi_first = main_rssi_avg;
1189                 antcomb->rssi_third = alt_rssi_avg;
1190
1191                 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1192                         antcomb->rssi_lna1 = alt_rssi_avg;
1193                 else if (antcomb->second_quick_scan_conf ==
1194                          ATH_ANT_DIV_COMB_LNA2)
1195                         antcomb->rssi_lna2 = alt_rssi_avg;
1196                 else if (antcomb->second_quick_scan_conf ==
1197                          ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1198                         if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1199                                 antcomb->rssi_lna2 = main_rssi_avg;
1200                         else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1201                                 antcomb->rssi_lna1 = main_rssi_avg;
1202                 }
1203
1204                 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1205                     ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1206                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1207                 else
1208                         div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1209
1210                 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1211                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1212                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1213                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1214                                                 main_rssi_avg, alt_rssi_avg,
1215                                                 antcomb->total_pkt_count))
1216                                 antcomb->second_ratio = true;
1217                         else
1218                                 antcomb->second_ratio = false;
1219                 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1220                         if (ath_is_alt_ant_ratio_better(alt_ratio,
1221                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1222                                                 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1223                                                 main_rssi_avg, alt_rssi_avg,
1224                                                 antcomb->total_pkt_count))
1225                                 antcomb->second_ratio = true;
1226                         else
1227                                 antcomb->second_ratio = false;
1228                 } else {
1229                         if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1230                             (alt_rssi_avg > main_rssi_avg +
1231                             ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1232                             (alt_rssi_avg > main_rssi_avg)) &&
1233                             (antcomb->total_pkt_count > 50))
1234                                 antcomb->second_ratio = true;
1235                         else
1236                                 antcomb->second_ratio = false;
1237                 }
1238
1239                 /* set alt to the conf with maximun ratio */
1240                 if (antcomb->first_ratio && antcomb->second_ratio) {
1241                         if (antcomb->rssi_second > antcomb->rssi_third) {
1242                                 /* first alt*/
1243                                 if ((antcomb->first_quick_scan_conf ==
1244                                     ATH_ANT_DIV_COMB_LNA1) ||
1245                                     (antcomb->first_quick_scan_conf ==
1246                                     ATH_ANT_DIV_COMB_LNA2))
1247                                         /* Set alt LNA1 or LNA2*/
1248                                         if (div_ant_conf->main_lna_conf ==
1249                                             ATH_ANT_DIV_COMB_LNA2)
1250                                                 div_ant_conf->alt_lna_conf =
1251                                                         ATH_ANT_DIV_COMB_LNA1;
1252                                         else
1253                                                 div_ant_conf->alt_lna_conf =
1254                                                         ATH_ANT_DIV_COMB_LNA2;
1255                                 else
1256                                         /* Set alt to A+B or A-B */
1257                                         div_ant_conf->alt_lna_conf =
1258                                                 antcomb->first_quick_scan_conf;
1259                         } else if ((antcomb->second_quick_scan_conf ==
1260                                    ATH_ANT_DIV_COMB_LNA1) ||
1261                                    (antcomb->second_quick_scan_conf ==
1262                                    ATH_ANT_DIV_COMB_LNA2)) {
1263                                 /* Set alt LNA1 or LNA2 */
1264                                 if (div_ant_conf->main_lna_conf ==
1265                                     ATH_ANT_DIV_COMB_LNA2)
1266                                         div_ant_conf->alt_lna_conf =
1267                                                 ATH_ANT_DIV_COMB_LNA1;
1268                                 else
1269                                         div_ant_conf->alt_lna_conf =
1270                                                 ATH_ANT_DIV_COMB_LNA2;
1271                         } else {
1272                                 /* Set alt to A+B or A-B */
1273                                 div_ant_conf->alt_lna_conf =
1274                                         antcomb->second_quick_scan_conf;
1275                         }
1276                 } else if (antcomb->first_ratio) {
1277                         /* first alt */
1278                         if ((antcomb->first_quick_scan_conf ==
1279                             ATH_ANT_DIV_COMB_LNA1) ||
1280                             (antcomb->first_quick_scan_conf ==
1281                             ATH_ANT_DIV_COMB_LNA2))
1282                                         /* Set alt LNA1 or LNA2 */
1283                                 if (div_ant_conf->main_lna_conf ==
1284                                     ATH_ANT_DIV_COMB_LNA2)
1285                                         div_ant_conf->alt_lna_conf =
1286                                                         ATH_ANT_DIV_COMB_LNA1;
1287                                 else
1288                                         div_ant_conf->alt_lna_conf =
1289                                                         ATH_ANT_DIV_COMB_LNA2;
1290                         else
1291                                 /* Set alt to A+B or A-B */
1292                                 div_ant_conf->alt_lna_conf =
1293                                                 antcomb->first_quick_scan_conf;
1294                 } else if (antcomb->second_ratio) {
1295                                 /* second alt */
1296                         if ((antcomb->second_quick_scan_conf ==
1297                             ATH_ANT_DIV_COMB_LNA1) ||
1298                             (antcomb->second_quick_scan_conf ==
1299                             ATH_ANT_DIV_COMB_LNA2))
1300                                 /* Set alt LNA1 or LNA2 */
1301                                 if (div_ant_conf->main_lna_conf ==
1302                                     ATH_ANT_DIV_COMB_LNA2)
1303                                         div_ant_conf->alt_lna_conf =
1304                                                 ATH_ANT_DIV_COMB_LNA1;
1305                                 else
1306                                         div_ant_conf->alt_lna_conf =
1307                                                 ATH_ANT_DIV_COMB_LNA2;
1308                         else
1309                                 /* Set alt to A+B or A-B */
1310                                 div_ant_conf->alt_lna_conf =
1311                                                 antcomb->second_quick_scan_conf;
1312                 } else {
1313                         /* main is largest */
1314                         if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1315                             (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1316                                 /* Set alt LNA1 or LNA2 */
1317                                 if (div_ant_conf->main_lna_conf ==
1318                                     ATH_ANT_DIV_COMB_LNA2)
1319                                         div_ant_conf->alt_lna_conf =
1320                                                         ATH_ANT_DIV_COMB_LNA1;
1321                                 else
1322                                         div_ant_conf->alt_lna_conf =
1323                                                         ATH_ANT_DIV_COMB_LNA2;
1324                         else
1325                                 /* Set alt to A+B or A-B */
1326                                 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1327                 }
1328                 break;
1329         default:
1330                 break;
1331         }
1332 }
1333
1334 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf)
1335 {
1336         /* Adjust the fast_div_bias based on main and alt lna conf */
1337         switch ((ant_conf->main_lna_conf << 4) | ant_conf->alt_lna_conf) {
1338         case (0x01): /* A-B LNA2 */
1339                 ant_conf->fast_div_bias = 0x3b;
1340                 break;
1341         case (0x02): /* A-B LNA1 */
1342                 ant_conf->fast_div_bias = 0x3d;
1343                 break;
1344         case (0x03): /* A-B A+B */
1345                 ant_conf->fast_div_bias = 0x1;
1346                 break;
1347         case (0x10): /* LNA2 A-B */
1348                 ant_conf->fast_div_bias = 0x7;
1349                 break;
1350         case (0x12): /* LNA2 LNA1 */
1351                 ant_conf->fast_div_bias = 0x2;
1352                 break;
1353         case (0x13): /* LNA2 A+B */
1354                 ant_conf->fast_div_bias = 0x7;
1355                 break;
1356         case (0x20): /* LNA1 A-B */
1357                 ant_conf->fast_div_bias = 0x6;
1358                 break;
1359         case (0x21): /* LNA1 LNA2 */
1360                 ant_conf->fast_div_bias = 0x0;
1361                 break;
1362         case (0x23): /* LNA1 A+B */
1363                 ant_conf->fast_div_bias = 0x6;
1364                 break;
1365         case (0x30): /* A+B A-B */
1366                 ant_conf->fast_div_bias = 0x1;
1367                 break;
1368         case (0x31): /* A+B LNA2 */
1369                 ant_conf->fast_div_bias = 0x3b;
1370                 break;
1371         case (0x32): /* A+B LNA1 */
1372                 ant_conf->fast_div_bias = 0x3d;
1373                 break;
1374         default:
1375                 break;
1376         }
1377 }
1378
1379 /* Antenna diversity and combining */
1380 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1381 {
1382         struct ath_hw_antcomb_conf div_ant_conf;
1383         struct ath_ant_comb *antcomb = &sc->ant_comb;
1384         int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1385         int curr_main_set, curr_bias;
1386         int main_rssi = rs->rs_rssi_ctl0;
1387         int alt_rssi = rs->rs_rssi_ctl1;
1388         int rx_ant_conf,  main_ant_conf;
1389         bool short_scan = false;
1390
1391         rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1392                        ATH_ANT_RX_MASK;
1393         main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1394                          ATH_ANT_RX_MASK;
1395
1396         /* Record packet only when alt_rssi is positive */
1397         if (alt_rssi > 0) {
1398                 antcomb->total_pkt_count++;
1399                 antcomb->main_total_rssi += main_rssi;
1400                 antcomb->alt_total_rssi  += alt_rssi;
1401                 if (main_ant_conf == rx_ant_conf)
1402                         antcomb->main_recv_cnt++;
1403                 else
1404                         antcomb->alt_recv_cnt++;
1405         }
1406
1407         /* Short scan check */
1408         if (antcomb->scan && antcomb->alt_good) {
1409                 if (time_after(jiffies, antcomb->scan_start_time +
1410                     msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1411                         short_scan = true;
1412                 else
1413                         if (antcomb->total_pkt_count ==
1414                             ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1415                                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1416                                             antcomb->total_pkt_count);
1417                                 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1418                                         short_scan = true;
1419                         }
1420         }
1421
1422         if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1423             rs->rs_moreaggr) && !short_scan)
1424                 return;
1425
1426         if (antcomb->total_pkt_count) {
1427                 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1428                              antcomb->total_pkt_count);
1429                 main_rssi_avg = (antcomb->main_total_rssi /
1430                                  antcomb->total_pkt_count);
1431                 alt_rssi_avg = (antcomb->alt_total_rssi /
1432                                  antcomb->total_pkt_count);
1433         }
1434
1435
1436         ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1437         curr_alt_set = div_ant_conf.alt_lna_conf;
1438         curr_main_set = div_ant_conf.main_lna_conf;
1439         curr_bias = div_ant_conf.fast_div_bias;
1440
1441         antcomb->count++;
1442
1443         if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1444                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1445                         ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1446                                                   main_rssi_avg);
1447                         antcomb->alt_good = true;
1448                 } else {
1449                         antcomb->alt_good = false;
1450                 }
1451
1452                 antcomb->count = 0;
1453                 antcomb->scan = true;
1454                 antcomb->scan_not_start = true;
1455         }
1456
1457         if (!antcomb->scan) {
1458                 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1459                         if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1460                                 /* Switch main and alt LNA */
1461                                 div_ant_conf.main_lna_conf =
1462                                                 ATH_ANT_DIV_COMB_LNA2;
1463                                 div_ant_conf.alt_lna_conf  =
1464                                                 ATH_ANT_DIV_COMB_LNA1;
1465                         } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1466                                 div_ant_conf.main_lna_conf =
1467                                                 ATH_ANT_DIV_COMB_LNA1;
1468                                 div_ant_conf.alt_lna_conf  =
1469                                                 ATH_ANT_DIV_COMB_LNA2;
1470                         }
1471
1472                         goto div_comb_done;
1473                 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1474                            (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1475                         /* Set alt to another LNA */
1476                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1477                                 div_ant_conf.alt_lna_conf =
1478                                                 ATH_ANT_DIV_COMB_LNA1;
1479                         else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1480                                 div_ant_conf.alt_lna_conf =
1481                                                 ATH_ANT_DIV_COMB_LNA2;
1482
1483                         goto div_comb_done;
1484                 }
1485
1486                 if ((alt_rssi_avg < (main_rssi_avg +
1487                     ATH_ANT_DIV_COMB_LNA1_LNA2_DELTA)))
1488                         goto div_comb_done;
1489         }
1490
1491         if (!antcomb->scan_not_start) {
1492                 switch (curr_alt_set) {
1493                 case ATH_ANT_DIV_COMB_LNA2:
1494                         antcomb->rssi_lna2 = alt_rssi_avg;
1495                         antcomb->rssi_lna1 = main_rssi_avg;
1496                         antcomb->scan = true;
1497                         /* set to A+B */
1498                         div_ant_conf.main_lna_conf =
1499                                 ATH_ANT_DIV_COMB_LNA1;
1500                         div_ant_conf.alt_lna_conf  =
1501                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1502                         break;
1503                 case ATH_ANT_DIV_COMB_LNA1:
1504                         antcomb->rssi_lna1 = alt_rssi_avg;
1505                         antcomb->rssi_lna2 = main_rssi_avg;
1506                         antcomb->scan = true;
1507                         /* set to A+B */
1508                         div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1509                         div_ant_conf.alt_lna_conf  =
1510                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1511                         break;
1512                 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1513                         antcomb->rssi_add = alt_rssi_avg;
1514                         antcomb->scan = true;
1515                         /* set to A-B */
1516                         div_ant_conf.alt_lna_conf =
1517                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1518                         break;
1519                 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1520                         antcomb->rssi_sub = alt_rssi_avg;
1521                         antcomb->scan = false;
1522                         if (antcomb->rssi_lna2 >
1523                             (antcomb->rssi_lna1 +
1524                             ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1525                                 /* use LNA2 as main LNA */
1526                                 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1527                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1528                                         /* set to A+B */
1529                                         div_ant_conf.main_lna_conf =
1530                                                 ATH_ANT_DIV_COMB_LNA2;
1531                                         div_ant_conf.alt_lna_conf  =
1532                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1533                                 } else if (antcomb->rssi_sub >
1534                                            antcomb->rssi_lna1) {
1535                                         /* set to A-B */
1536                                         div_ant_conf.main_lna_conf =
1537                                                 ATH_ANT_DIV_COMB_LNA2;
1538                                         div_ant_conf.alt_lna_conf =
1539                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1540                                 } else {
1541                                         /* set to LNA1 */
1542                                         div_ant_conf.main_lna_conf =
1543                                                 ATH_ANT_DIV_COMB_LNA2;
1544                                         div_ant_conf.alt_lna_conf =
1545                                                 ATH_ANT_DIV_COMB_LNA1;
1546                                 }
1547                         } else {
1548                                 /* use LNA1 as main LNA */
1549                                 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1550                                     (antcomb->rssi_add > antcomb->rssi_sub)) {
1551                                         /* set to A+B */
1552                                         div_ant_conf.main_lna_conf =
1553                                                 ATH_ANT_DIV_COMB_LNA1;
1554                                         div_ant_conf.alt_lna_conf  =
1555                                                 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1556                                 } else if (antcomb->rssi_sub >
1557                                            antcomb->rssi_lna1) {
1558                                         /* set to A-B */
1559                                         div_ant_conf.main_lna_conf =
1560                                                 ATH_ANT_DIV_COMB_LNA1;
1561                                         div_ant_conf.alt_lna_conf =
1562                                                 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1563                                 } else {
1564                                         /* set to LNA2 */
1565                                         div_ant_conf.main_lna_conf =
1566                                                 ATH_ANT_DIV_COMB_LNA1;
1567                                         div_ant_conf.alt_lna_conf =
1568                                                 ATH_ANT_DIV_COMB_LNA2;
1569                                 }
1570                         }
1571                         break;
1572                 default:
1573                         break;
1574                 }
1575         } else {
1576                 if (!antcomb->alt_good) {
1577                         antcomb->scan_not_start = false;
1578                         /* Set alt to another LNA */
1579                         if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1580                                 div_ant_conf.main_lna_conf =
1581                                                 ATH_ANT_DIV_COMB_LNA2;
1582                                 div_ant_conf.alt_lna_conf =
1583                                                 ATH_ANT_DIV_COMB_LNA1;
1584                         } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1585                                 div_ant_conf.main_lna_conf =
1586                                                 ATH_ANT_DIV_COMB_LNA1;
1587                                 div_ant_conf.alt_lna_conf =
1588                                                 ATH_ANT_DIV_COMB_LNA2;
1589                         }
1590                         goto div_comb_done;
1591                 }
1592         }
1593
1594         ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1595                                            main_rssi_avg, alt_rssi_avg,
1596                                            alt_ratio);
1597
1598         antcomb->quick_scan_cnt++;
1599
1600 div_comb_done:
1601         ath_ant_div_conf_fast_divbias(&div_ant_conf);
1602
1603         ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1604
1605         antcomb->scan_start_time = jiffies;
1606         antcomb->total_pkt_count = 0;
1607         antcomb->main_total_rssi = 0;
1608         antcomb->alt_total_rssi = 0;
1609         antcomb->main_recv_cnt = 0;
1610         antcomb->alt_recv_cnt = 0;
1611 }
1612
1613 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1614 {
1615         struct ath_buf *bf;
1616         struct sk_buff *skb = NULL, *requeue_skb;
1617         struct ieee80211_rx_status *rxs;
1618         struct ath_hw *ah = sc->sc_ah;
1619         struct ath_common *common = ath9k_hw_common(ah);
1620         /*
1621          * The hw can techncically differ from common->hw when using ath9k
1622          * virtual wiphy so to account for that we iterate over the active
1623          * wiphys and find the appropriate wiphy and therefore hw.
1624          */
1625         struct ieee80211_hw *hw = NULL;
1626         struct ieee80211_hdr *hdr;
1627         int retval;
1628         bool decrypt_error = false;
1629         struct ath_rx_status rs;
1630         enum ath9k_rx_qtype qtype;
1631         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1632         int dma_type;
1633         u8 rx_status_len = ah->caps.rx_status_len;
1634         u64 tsf = 0;
1635         u32 tsf_lower = 0;
1636         unsigned long flags;
1637
1638         if (edma)
1639                 dma_type = DMA_BIDIRECTIONAL;
1640         else
1641                 dma_type = DMA_FROM_DEVICE;
1642
1643         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1644         spin_lock_bh(&sc->rx.rxbuflock);
1645
1646         tsf = ath9k_hw_gettsf64(ah);
1647         tsf_lower = tsf & 0xffffffff;
1648
1649         do {
1650                 /* If handling rx interrupt and flush is in progress => exit */
1651                 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1652                         break;
1653
1654                 memset(&rs, 0, sizeof(rs));
1655                 if (edma)
1656                         bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1657                 else
1658                         bf = ath_get_next_rx_buf(sc, &rs);
1659
1660                 if (!bf)
1661                         break;
1662
1663                 skb = bf->bf_mpdu;
1664                 if (!skb)
1665                         continue;
1666
1667                 hdr = (struct ieee80211_hdr *) (skb->data + rx_status_len);
1668                 rxs =  IEEE80211_SKB_RXCB(skb);
1669
1670                 hw = ath_get_virt_hw(sc, hdr);
1671
1672                 ath_debug_stat_rx(sc, &rs);
1673
1674                 /*
1675                  * If we're asked to flush receive queue, directly
1676                  * chain it back at the queue without processing it.
1677                  */
1678                 if (flush)
1679                         goto requeue;
1680
1681                 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1682                                                  rxs, &decrypt_error);
1683                 if (retval)
1684                         goto requeue;
1685
1686                 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1687                 if (rs.rs_tstamp > tsf_lower &&
1688                     unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1689                         rxs->mactime -= 0x100000000ULL;
1690
1691                 if (rs.rs_tstamp < tsf_lower &&
1692                     unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1693                         rxs->mactime += 0x100000000ULL;
1694
1695                 /* Ensure we always have an skb to requeue once we are done
1696                  * processing the current buffer's skb */
1697                 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1698
1699                 /* If there is no memory we ignore the current RX'd frame,
1700                  * tell hardware it can give us a new frame using the old
1701                  * skb and put it at the tail of the sc->rx.rxbuf list for
1702                  * processing. */
1703                 if (!requeue_skb)
1704                         goto requeue;
1705
1706                 /* Unmap the frame */
1707                 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1708                                  common->rx_bufsize,
1709                                  dma_type);
1710
1711                 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1712                 if (ah->caps.rx_status_len)
1713                         skb_pull(skb, ah->caps.rx_status_len);
1714
1715                 ath9k_rx_skb_postprocess(common, skb, &rs,
1716                                          rxs, decrypt_error);
1717
1718                 /* We will now give hardware our shiny new allocated skb */
1719                 bf->bf_mpdu = requeue_skb;
1720                 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1721                                                  common->rx_bufsize,
1722                                                  dma_type);
1723                 if (unlikely(dma_mapping_error(sc->dev,
1724                           bf->bf_buf_addr))) {
1725                         dev_kfree_skb_any(requeue_skb);
1726                         bf->bf_mpdu = NULL;
1727                         bf->bf_buf_addr = 0;
1728                         ath_print(common, ATH_DBG_FATAL,
1729                                   "dma_mapping_error() on RX\n");
1730                         ath_rx_send_to_mac80211(hw, sc, skb, rxs);
1731                         break;
1732                 }
1733
1734                 /*
1735                  * change the default rx antenna if rx diversity chooses the
1736                  * other antenna 3 times in a row.
1737                  */
1738                 if (sc->rx.defant != rs.rs_antenna) {
1739                         if (++sc->rx.rxotherant >= 3)
1740                                 ath_setdefantenna(sc, rs.rs_antenna);
1741                 } else {
1742                         sc->rx.rxotherant = 0;
1743                 }
1744
1745                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1746                 if (unlikely(ath9k_check_auto_sleep(sc) ||
1747                              (sc->ps_flags & (PS_WAIT_FOR_BEACON |
1748                                               PS_WAIT_FOR_CAB |
1749                                               PS_WAIT_FOR_PSPOLL_DATA))))
1750                         ath_rx_ps(sc, skb);
1751                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1752
1753                 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
1754                         ath_ant_comb_scan(sc, &rs);
1755
1756                 ath_rx_send_to_mac80211(hw, sc, skb, rxs);
1757
1758 requeue:
1759                 if (edma) {
1760                         list_add_tail(&bf->list, &sc->rx.rxbuf);
1761                         ath_rx_edma_buf_link(sc, qtype);
1762                 } else {
1763                         list_move_tail(&bf->list, &sc->rx.rxbuf);
1764                         ath_rx_buf_link(sc, bf);
1765                 }
1766         } while (1);
1767
1768         spin_unlock_bh(&sc->rx.rxbuflock);
1769
1770         return 0;
1771 }