2 * Linux driver for VMware's vmxnet3 ethernet NIC.
4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
27 #include <net/ip6_checksum.h>
29 #include "vmxnet3_int.h"
31 char vmxnet3_driver_name[] = "vmxnet3";
32 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
36 * Last entry must be all 0s
38 static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = {
39 {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
43 MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
45 static atomic_t devices_found;
49 * Enable/Disable the given intr
52 vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
54 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
59 vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
61 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
66 * Enable/Disable all intrs used by the device
69 vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
73 for (i = 0; i < adapter->intr.num_intrs; i++)
74 vmxnet3_enable_intr(adapter, i);
75 adapter->shared->devRead.intrConf.intrCtrl &=
76 cpu_to_le32(~VMXNET3_IC_DISABLE_ALL);
81 vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
85 adapter->shared->devRead.intrConf.intrCtrl |=
86 cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
87 for (i = 0; i < adapter->intr.num_intrs; i++)
88 vmxnet3_disable_intr(adapter, i);
93 vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
95 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
100 vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
102 return netif_queue_stopped(adapter->netdev);
107 vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
110 netif_start_queue(adapter->netdev);
115 vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
118 netif_wake_queue(adapter->netdev);
123 vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
127 netif_stop_queue(adapter->netdev);
132 * Check the link state. This may start or stop the tx queue.
135 vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
139 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
140 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
141 adapter->link_speed = ret >> 16;
142 if (ret & 1) { /* Link is up. */
143 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n",
144 adapter->netdev->name, adapter->link_speed);
145 if (!netif_carrier_ok(adapter->netdev))
146 netif_carrier_on(adapter->netdev);
149 vmxnet3_tq_start(&adapter->tx_queue, adapter);
151 printk(KERN_INFO "%s: NIC Link is Down\n",
152 adapter->netdev->name);
153 if (netif_carrier_ok(adapter->netdev))
154 netif_carrier_off(adapter->netdev);
157 vmxnet3_tq_stop(&adapter->tx_queue, adapter);
162 vmxnet3_process_events(struct vmxnet3_adapter *adapter)
164 u32 events = le32_to_cpu(adapter->shared->ecr);
168 vmxnet3_ack_events(adapter, events);
170 /* Check if link state has changed */
171 if (events & VMXNET3_ECR_LINK)
172 vmxnet3_check_link(adapter, true);
174 /* Check if there is an error on xmit/recv queues */
175 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
176 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
177 VMXNET3_CMD_GET_QUEUE_STATUS);
179 if (adapter->tqd_start->status.stopped) {
180 printk(KERN_ERR "%s: tq error 0x%x\n",
181 adapter->netdev->name,
182 le32_to_cpu(adapter->tqd_start->status.error));
184 if (adapter->rqd_start->status.stopped) {
185 printk(KERN_ERR "%s: rq error 0x%x\n",
186 adapter->netdev->name,
187 adapter->rqd_start->status.error);
190 schedule_work(&adapter->work);
194 #ifdef __BIG_ENDIAN_BITFIELD
196 * The device expects the bitfields in shared structures to be written in
197 * little endian. When CPU is big endian, the following routines are used to
198 * correctly read and write into ABI.
199 * The general technique used here is : double word bitfields are defined in
200 * opposite order for big endian architecture. Then before reading them in
201 * driver the complete double word is translated using le32_to_cpu. Similarly
202 * After the driver writes into bitfields, cpu_to_le32 is used to translate the
203 * double words into required format.
204 * In order to avoid touching bits in shared structure more than once, temporary
205 * descriptors are used. These are passed as srcDesc to following functions.
207 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc,
208 struct Vmxnet3_RxDesc *dstDesc)
210 u32 *src = (u32 *)srcDesc + 2;
211 u32 *dst = (u32 *)dstDesc + 2;
212 dstDesc->addr = le64_to_cpu(srcDesc->addr);
213 *dst = le32_to_cpu(*src);
214 dstDesc->ext1 = le32_to_cpu(srcDesc->ext1);
217 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc,
218 struct Vmxnet3_TxDesc *dstDesc)
221 u32 *src = (u32 *)(srcDesc + 1);
222 u32 *dst = (u32 *)(dstDesc + 1);
224 /* Working backwards so that the gen bit is set at the end. */
225 for (i = 2; i > 0; i--) {
228 *dst = cpu_to_le32(*src);
233 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc,
234 struct Vmxnet3_RxCompDesc *dstDesc)
237 u32 *src = (u32 *)srcDesc;
238 u32 *dst = (u32 *)dstDesc;
239 for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) {
240 *dst = le32_to_cpu(*src);
247 /* Used to read bitfield values from double words. */
248 static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size)
250 u32 temp = le32_to_cpu(*bitfield);
251 u32 mask = ((1 << size) - 1) << pos;
259 #endif /* __BIG_ENDIAN_BITFIELD */
261 #ifdef __BIG_ENDIAN_BITFIELD
263 # define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
264 txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
265 VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
266 # define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
267 txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
268 VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
269 # define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
270 VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
271 VMXNET3_TCD_GEN_SIZE)
272 # define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
273 VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
274 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
276 vmxnet3_RxCompToCPU((rcd), (tmp)); \
278 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
280 vmxnet3_RxDescToCPU((rxd), (tmp)); \
285 # define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
286 # define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
287 # define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
288 # define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
289 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
290 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
292 #endif /* __BIG_ENDIAN_BITFIELD */
296 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
297 struct pci_dev *pdev)
299 if (tbi->map_type == VMXNET3_MAP_SINGLE)
300 pci_unmap_single(pdev, tbi->dma_addr, tbi->len,
302 else if (tbi->map_type == VMXNET3_MAP_PAGE)
303 pci_unmap_page(pdev, tbi->dma_addr, tbi->len,
306 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
308 tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
313 vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
314 struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
319 /* no out of order completion */
320 BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
321 BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1);
323 skb = tq->buf_info[eop_idx].skb;
325 tq->buf_info[eop_idx].skb = NULL;
327 VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
329 while (tq->tx_ring.next2comp != eop_idx) {
330 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
333 /* update next2comp w/o tx_lock. Since we are marking more,
334 * instead of less, tx ring entries avail, the worst case is
335 * that the tx routine incorrectly re-queues a pkt due to
336 * insufficient tx ring entries.
338 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
342 dev_kfree_skb_any(skb);
348 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
349 struct vmxnet3_adapter *adapter)
352 union Vmxnet3_GenericDesc *gdesc;
354 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
355 while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) {
356 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
357 &gdesc->tcd), tq, adapter->pdev,
360 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
361 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
365 spin_lock(&tq->tx_lock);
366 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
367 vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
368 VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
369 netif_carrier_ok(adapter->netdev))) {
370 vmxnet3_tq_wake(tq, adapter);
372 spin_unlock(&tq->tx_lock);
379 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
380 struct vmxnet3_adapter *adapter)
384 while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
385 struct vmxnet3_tx_buf_info *tbi;
386 union Vmxnet3_GenericDesc *gdesc;
388 tbi = tq->buf_info + tq->tx_ring.next2comp;
389 gdesc = tq->tx_ring.base + tq->tx_ring.next2comp;
391 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
393 dev_kfree_skb_any(tbi->skb);
396 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
399 /* sanity check, verify all buffers are indeed unmapped and freed */
400 for (i = 0; i < tq->tx_ring.size; i++) {
401 BUG_ON(tq->buf_info[i].skb != NULL ||
402 tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
405 tq->tx_ring.gen = VMXNET3_INIT_GEN;
406 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
408 tq->comp_ring.gen = VMXNET3_INIT_GEN;
409 tq->comp_ring.next2proc = 0;
414 vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
415 struct vmxnet3_adapter *adapter)
417 if (tq->tx_ring.base) {
418 pci_free_consistent(adapter->pdev, tq->tx_ring.size *
419 sizeof(struct Vmxnet3_TxDesc),
420 tq->tx_ring.base, tq->tx_ring.basePA);
421 tq->tx_ring.base = NULL;
423 if (tq->data_ring.base) {
424 pci_free_consistent(adapter->pdev, tq->data_ring.size *
425 sizeof(struct Vmxnet3_TxDataDesc),
426 tq->data_ring.base, tq->data_ring.basePA);
427 tq->data_ring.base = NULL;
429 if (tq->comp_ring.base) {
430 pci_free_consistent(adapter->pdev, tq->comp_ring.size *
431 sizeof(struct Vmxnet3_TxCompDesc),
432 tq->comp_ring.base, tq->comp_ring.basePA);
433 tq->comp_ring.base = NULL;
441 vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
442 struct vmxnet3_adapter *adapter)
446 /* reset the tx ring contents to 0 and reset the tx ring states */
447 memset(tq->tx_ring.base, 0, tq->tx_ring.size *
448 sizeof(struct Vmxnet3_TxDesc));
449 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
450 tq->tx_ring.gen = VMXNET3_INIT_GEN;
452 memset(tq->data_ring.base, 0, tq->data_ring.size *
453 sizeof(struct Vmxnet3_TxDataDesc));
455 /* reset the tx comp ring contents to 0 and reset comp ring states */
456 memset(tq->comp_ring.base, 0, tq->comp_ring.size *
457 sizeof(struct Vmxnet3_TxCompDesc));
458 tq->comp_ring.next2proc = 0;
459 tq->comp_ring.gen = VMXNET3_INIT_GEN;
461 /* reset the bookkeeping data */
462 memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
463 for (i = 0; i < tq->tx_ring.size; i++)
464 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
466 /* stats are not reset */
471 vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
472 struct vmxnet3_adapter *adapter)
474 BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
475 tq->comp_ring.base || tq->buf_info);
477 tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size
478 * sizeof(struct Vmxnet3_TxDesc),
479 &tq->tx_ring.basePA);
480 if (!tq->tx_ring.base) {
481 printk(KERN_ERR "%s: failed to allocate tx ring\n",
482 adapter->netdev->name);
486 tq->data_ring.base = pci_alloc_consistent(adapter->pdev,
488 sizeof(struct Vmxnet3_TxDataDesc),
489 &tq->data_ring.basePA);
490 if (!tq->data_ring.base) {
491 printk(KERN_ERR "%s: failed to allocate data ring\n",
492 adapter->netdev->name);
496 tq->comp_ring.base = pci_alloc_consistent(adapter->pdev,
498 sizeof(struct Vmxnet3_TxCompDesc),
499 &tq->comp_ring.basePA);
500 if (!tq->comp_ring.base) {
501 printk(KERN_ERR "%s: failed to allocate tx comp ring\n",
502 adapter->netdev->name);
506 tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]),
509 printk(KERN_ERR "%s: failed to allocate tx bufinfo\n",
510 adapter->netdev->name);
517 vmxnet3_tq_destroy(tq, adapter);
523 * starting from ring->next2fill, allocate rx buffers for the given ring
524 * of the rx queue and update the rx desc. stop after @num_to_alloc buffers
525 * are allocated or allocation fails
529 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
530 int num_to_alloc, struct vmxnet3_adapter *adapter)
532 int num_allocated = 0;
533 struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
534 struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
537 while (num_allocated < num_to_alloc) {
538 struct vmxnet3_rx_buf_info *rbi;
539 union Vmxnet3_GenericDesc *gd;
541 rbi = rbi_base + ring->next2fill;
542 gd = ring->base + ring->next2fill;
544 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
545 if (rbi->skb == NULL) {
546 rbi->skb = dev_alloc_skb(rbi->len +
548 if (unlikely(rbi->skb == NULL)) {
549 rq->stats.rx_buf_alloc_failure++;
552 rbi->skb->dev = adapter->netdev;
554 skb_reserve(rbi->skb, NET_IP_ALIGN);
555 rbi->dma_addr = pci_map_single(adapter->pdev,
556 rbi->skb->data, rbi->len,
559 /* rx buffer skipped by the device */
561 val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
563 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
564 rbi->len != PAGE_SIZE);
566 if (rbi->page == NULL) {
567 rbi->page = alloc_page(GFP_ATOMIC);
568 if (unlikely(rbi->page == NULL)) {
569 rq->stats.rx_buf_alloc_failure++;
572 rbi->dma_addr = pci_map_page(adapter->pdev,
573 rbi->page, 0, PAGE_SIZE,
576 /* rx buffers skipped by the device */
578 val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
581 BUG_ON(rbi->dma_addr == 0);
582 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
583 gd->dword[2] = cpu_to_le32((ring->gen << VMXNET3_RXD_GEN_SHIFT)
587 vmxnet3_cmd_ring_adv_next2fill(ring);
589 rq->uncommitted[ring_idx] += num_allocated;
591 dev_dbg(&adapter->netdev->dev,
592 "alloc_rx_buf: %d allocated, next2fill %u, next2comp "
593 "%u, uncommited %u\n", num_allocated, ring->next2fill,
594 ring->next2comp, rq->uncommitted[ring_idx]);
596 /* so that the device can distinguish a full ring and an empty ring */
597 BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
599 return num_allocated;
604 vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
605 struct vmxnet3_rx_buf_info *rbi)
607 struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
608 skb_shinfo(skb)->nr_frags;
610 BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
612 frag->page = rbi->page;
613 frag->page_offset = 0;
614 frag->size = rcd->len;
615 skb->data_len += frag->size;
616 skb_shinfo(skb)->nr_frags++;
621 vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
622 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
623 struct vmxnet3_adapter *adapter)
626 unsigned long buf_offset;
628 union Vmxnet3_GenericDesc *gdesc;
629 struct vmxnet3_tx_buf_info *tbi = NULL;
631 BUG_ON(ctx->copy_size > skb_headlen(skb));
633 /* use the previous gen bit for the SOP desc */
634 dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
636 ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
637 gdesc = ctx->sop_txd; /* both loops below can be skipped */
639 /* no need to map the buffer if headers are copied */
640 if (ctx->copy_size) {
641 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA +
642 tq->tx_ring.next2fill *
643 sizeof(struct Vmxnet3_TxDataDesc));
644 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size);
645 ctx->sop_txd->dword[3] = 0;
647 tbi = tq->buf_info + tq->tx_ring.next2fill;
648 tbi->map_type = VMXNET3_MAP_NONE;
650 dev_dbg(&adapter->netdev->dev,
651 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
652 tq->tx_ring.next2fill,
653 le64_to_cpu(ctx->sop_txd->txd.addr),
654 ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
655 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
657 /* use the right gen for non-SOP desc */
658 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
661 /* linear part can use multiple tx desc if it's big */
662 len = skb_headlen(skb) - ctx->copy_size;
663 buf_offset = ctx->copy_size;
667 buf_size = len > VMXNET3_MAX_TX_BUF_SIZE ?
668 VMXNET3_MAX_TX_BUF_SIZE : len;
670 tbi = tq->buf_info + tq->tx_ring.next2fill;
671 tbi->map_type = VMXNET3_MAP_SINGLE;
672 tbi->dma_addr = pci_map_single(adapter->pdev,
673 skb->data + buf_offset, buf_size,
676 tbi->len = buf_size; /* this automatically convert 2^14 to 0 */
678 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
679 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
681 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
682 gdesc->dword[2] = cpu_to_le32(dw2 | buf_size);
685 dev_dbg(&adapter->netdev->dev,
686 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
687 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
688 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
689 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
690 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
693 buf_offset += buf_size;
696 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
697 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
699 tbi = tq->buf_info + tq->tx_ring.next2fill;
700 tbi->map_type = VMXNET3_MAP_PAGE;
701 tbi->dma_addr = pci_map_page(adapter->pdev, frag->page,
702 frag->page_offset, frag->size,
705 tbi->len = frag->size;
707 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
708 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
710 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
711 gdesc->dword[2] = cpu_to_le32(dw2 | frag->size);
714 dev_dbg(&adapter->netdev->dev,
715 "txd[%u]: 0x%llu %u %u\n",
716 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
717 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
718 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
719 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
722 ctx->eop_txd = gdesc;
724 /* set the last buf_info for the pkt */
726 tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
731 * parse and copy relevant protocol headers:
732 * For a tso pkt, relevant headers are L2/3/4 including options
733 * For a pkt requesting csum offloading, they are L2/3 and may include L4
734 * if it's a TCP/UDP pkt
737 * -1: error happens during parsing
738 * 0: protocol headers parsed, but too big to be copied
739 * 1: protocol headers parsed and copied
742 * 1. related *ctx fields are updated.
743 * 2. ctx->copy_size is # of bytes copied
744 * 3. the portion copied is guaranteed to be in the linear part
748 vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
749 struct vmxnet3_tx_ctx *ctx,
750 struct vmxnet3_adapter *adapter)
752 struct Vmxnet3_TxDataDesc *tdd;
755 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
756 ctx->l4_hdr_size = ((struct tcphdr *)
757 skb_transport_header(skb))->doff * 4;
758 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
760 unsigned int pull_size;
762 if (skb->ip_summed == CHECKSUM_PARTIAL) {
763 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
766 struct iphdr *iph = (struct iphdr *)
767 skb_network_header(skb);
768 if (iph->protocol == IPPROTO_TCP) {
769 pull_size = ctx->eth_ip_hdr_size +
770 sizeof(struct tcphdr);
772 if (unlikely(!pskb_may_pull(skb,
776 ctx->l4_hdr_size = ((struct tcphdr *)
777 skb_transport_header(skb))->doff * 4;
778 } else if (iph->protocol == IPPROTO_UDP) {
780 sizeof(struct udphdr);
782 ctx->l4_hdr_size = 0;
785 /* for simplicity, don't copy L4 headers */
786 ctx->l4_hdr_size = 0;
788 ctx->copy_size = ctx->eth_ip_hdr_size +
791 ctx->eth_ip_hdr_size = 0;
792 ctx->l4_hdr_size = 0;
793 /* copy as much as allowed */
794 ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE
798 /* make sure headers are accessible directly */
799 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
803 if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) {
804 tq->stats.oversized_hdr++;
809 tdd = tq->data_ring.base + tq->tx_ring.next2fill;
811 memcpy(tdd->data, skb->data, ctx->copy_size);
812 dev_dbg(&adapter->netdev->dev,
813 "copy %u bytes to dataRing[%u]\n",
814 ctx->copy_size, tq->tx_ring.next2fill);
823 vmxnet3_prepare_tso(struct sk_buff *skb,
824 struct vmxnet3_tx_ctx *ctx)
826 struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb);
828 struct iphdr *iph = (struct iphdr *)skb_network_header(skb);
830 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
833 struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb);
834 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
841 * Transmits a pkt thru a given tq
843 * NETDEV_TX_OK: descriptors are setup successfully
844 * NETDEV_TX_OK: error occured, the pkt is dropped
845 * NETDEV_TX_BUSY: tx ring is full, queue is stopped
848 * 1. tx ring may be changed
849 * 2. tq stats may be updated accordingly
850 * 3. shared->txNumDeferred may be updated
854 vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
855 struct vmxnet3_adapter *adapter, struct net_device *netdev)
860 struct vmxnet3_tx_ctx ctx;
861 union Vmxnet3_GenericDesc *gdesc;
862 #ifdef __BIG_ENDIAN_BITFIELD
863 /* Use temporary descriptor to avoid touching bits multiple times */
864 union Vmxnet3_GenericDesc tempTxDesc;
867 /* conservatively estimate # of descriptors to use */
868 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) +
869 skb_shinfo(skb)->nr_frags + 1;
871 ctx.ipv4 = (skb->protocol == __constant_ntohs(ETH_P_IP));
873 ctx.mss = skb_shinfo(skb)->gso_size;
875 if (skb_header_cloned(skb)) {
876 if (unlikely(pskb_expand_head(skb, 0, 0,
878 tq->stats.drop_tso++;
881 tq->stats.copy_skb_header++;
883 vmxnet3_prepare_tso(skb, &ctx);
885 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
887 /* non-tso pkts must not use more than
888 * VMXNET3_MAX_TXD_PER_PKT entries
890 if (skb_linearize(skb) != 0) {
891 tq->stats.drop_too_many_frags++;
894 tq->stats.linearized++;
896 /* recalculate the # of descriptors to use */
897 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
901 ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter);
903 BUG_ON(ret <= 0 && ctx.copy_size != 0);
904 /* hdrs parsed, check against other limits */
906 if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
907 VMXNET3_MAX_TX_BUF_SIZE)) {
911 if (skb->ip_summed == CHECKSUM_PARTIAL) {
912 if (unlikely(ctx.eth_ip_hdr_size +
914 VMXNET3_MAX_CSUM_OFFSET)) {
920 tq->stats.drop_hdr_inspect_err++;
924 spin_lock_irqsave(&tq->tx_lock, flags);
926 if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
927 tq->stats.tx_ring_full++;
928 dev_dbg(&adapter->netdev->dev,
929 "tx queue stopped on %s, next2comp %u"
930 " next2fill %u\n", adapter->netdev->name,
931 tq->tx_ring.next2comp, tq->tx_ring.next2fill);
933 vmxnet3_tq_stop(tq, adapter);
934 spin_unlock_irqrestore(&tq->tx_lock, flags);
935 return NETDEV_TX_BUSY;
938 /* fill tx descs related to addr & len */
939 vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter);
941 /* setup the EOP desc */
942 ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP);
944 /* setup the SOP desc */
945 #ifdef __BIG_ENDIAN_BITFIELD
947 gdesc->dword[2] = ctx.sop_txd->dword[2];
948 gdesc->dword[3] = ctx.sop_txd->dword[3];
953 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
954 gdesc->txd.om = VMXNET3_OM_TSO;
955 gdesc->txd.msscof = ctx.mss;
956 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len -
957 gdesc->txd.hlen + ctx.mss - 1) / ctx.mss);
959 if (skb->ip_summed == CHECKSUM_PARTIAL) {
960 gdesc->txd.hlen = ctx.eth_ip_hdr_size;
961 gdesc->txd.om = VMXNET3_OM_CSUM;
962 gdesc->txd.msscof = ctx.eth_ip_hdr_size +
966 gdesc->txd.msscof = 0;
968 le32_add_cpu(&tq->shared->txNumDeferred, 1);
971 if (vlan_tx_tag_present(skb)) {
973 gdesc->txd.tci = vlan_tx_tag_get(skb);
976 /* finally flips the GEN bit of the SOP desc. */
977 gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^
979 #ifdef __BIG_ENDIAN_BITFIELD
980 /* Finished updating in bitfields of Tx Desc, so write them in original
983 vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc,
984 (struct Vmxnet3_TxDesc *)ctx.sop_txd);
987 dev_dbg(&adapter->netdev->dev,
988 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
989 (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd -
990 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr),
991 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3]));
993 spin_unlock_irqrestore(&tq->tx_lock, flags);
995 if (le32_to_cpu(tq->shared->txNumDeferred) >=
996 le32_to_cpu(tq->shared->txThreshold)) {
997 tq->shared->txNumDeferred = 0;
998 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_TXPROD,
999 tq->tx_ring.next2fill);
1002 return NETDEV_TX_OK;
1005 tq->stats.drop_oversized_hdr++;
1007 tq->stats.drop_total++;
1009 return NETDEV_TX_OK;
1014 vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1016 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1018 return vmxnet3_tq_xmit(skb, &adapter->tx_queue, adapter, netdev);
1023 vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
1024 struct sk_buff *skb,
1025 union Vmxnet3_GenericDesc *gdesc)
1027 if (!gdesc->rcd.cnc && adapter->rxcsum) {
1028 /* typical case: TCP/UDP over IP and both csums are correct */
1029 if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) ==
1030 VMXNET3_RCD_CSUM_OK) {
1031 skb->ip_summed = CHECKSUM_UNNECESSARY;
1032 BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1033 BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6));
1034 BUG_ON(gdesc->rcd.frg);
1036 if (gdesc->rcd.csum) {
1037 skb->csum = htons(gdesc->rcd.csum);
1038 skb->ip_summed = CHECKSUM_PARTIAL;
1040 skb->ip_summed = CHECKSUM_NONE;
1044 skb->ip_summed = CHECKSUM_NONE;
1050 vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
1051 struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter)
1053 rq->stats.drop_err++;
1055 rq->stats.drop_fcs++;
1057 rq->stats.drop_total++;
1060 * We do not unmap and chain the rx buffer to the skb.
1061 * We basically pretend this buffer is not used and will be recycled
1062 * by vmxnet3_rq_alloc_rx_buf()
1066 * ctx->skb may be NULL if this is the first and the only one
1070 dev_kfree_skb_irq(ctx->skb);
1077 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1078 struct vmxnet3_adapter *adapter, int quota)
1080 static u32 rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2};
1082 struct Vmxnet3_RxCompDesc *rcd;
1083 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
1084 #ifdef __BIG_ENDIAN_BITFIELD
1085 struct Vmxnet3_RxDesc rxCmdDesc;
1086 struct Vmxnet3_RxCompDesc rxComp;
1088 vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd,
1090 while (rcd->gen == rq->comp_ring.gen) {
1091 struct vmxnet3_rx_buf_info *rbi;
1092 struct sk_buff *skb;
1094 struct Vmxnet3_RxDesc *rxd;
1097 if (num_rxd >= quota) {
1098 /* we may stop even before we see the EOP desc of
1106 ring_idx = rcd->rqID == rq->qid ? 0 : 1;
1107 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1109 rbi = rq->buf_info[ring_idx] + idx;
1111 BUG_ON(rxd->addr != rbi->dma_addr ||
1112 rxd->len != rbi->len);
1114 if (unlikely(rcd->eop && rcd->err)) {
1115 vmxnet3_rx_error(rq, rcd, ctx, adapter);
1119 if (rcd->sop) { /* first buf of the pkt */
1120 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
1121 rcd->rqID != rq->qid);
1123 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
1124 BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
1126 if (unlikely(rcd->len == 0)) {
1127 /* Pretend the rx buffer is skipped. */
1128 BUG_ON(!(rcd->sop && rcd->eop));
1129 dev_dbg(&adapter->netdev->dev,
1130 "rxRing[%u][%u] 0 length\n",
1135 ctx->skb = rbi->skb;
1138 pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len,
1139 PCI_DMA_FROMDEVICE);
1141 skb_put(ctx->skb, rcd->len);
1143 BUG_ON(ctx->skb == NULL);
1144 /* non SOP buffer must be type 1 in most cases */
1145 if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) {
1146 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1149 pci_unmap_page(adapter->pdev,
1150 rbi->dma_addr, rbi->len,
1151 PCI_DMA_FROMDEVICE);
1153 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1158 * The only time a non-SOP buffer is type 0 is
1159 * when it's EOP and error flag is raised, which
1160 * has already been handled.
1168 skb->len += skb->data_len;
1169 skb->truesize += skb->data_len;
1171 vmxnet3_rx_csum(adapter, skb,
1172 (union Vmxnet3_GenericDesc *)rcd);
1173 skb->protocol = eth_type_trans(skb, adapter->netdev);
1175 if (unlikely(adapter->vlan_grp && rcd->ts)) {
1176 vlan_hwaccel_receive_skb(skb,
1177 adapter->vlan_grp, rcd->tci);
1179 netif_receive_skb(skb);
1186 /* device may skip some rx descs */
1187 rq->rx_ring[ring_idx].next2comp = idx;
1188 VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp,
1189 rq->rx_ring[ring_idx].size);
1191 /* refill rx buffers frequently to avoid starving the h/w */
1192 num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring +
1194 if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq,
1195 ring_idx, adapter))) {
1196 vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc,
1199 /* if needed, update the register */
1200 if (unlikely(rq->shared->updateRxProd)) {
1201 VMXNET3_WRITE_BAR0_REG(adapter,
1202 rxprod_reg[ring_idx] + rq->qid * 8,
1203 rq->rx_ring[ring_idx].next2fill);
1204 rq->uncommitted[ring_idx] = 0;
1208 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
1209 vmxnet3_getRxComp(rcd,
1210 &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp);
1218 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1219 struct vmxnet3_adapter *adapter)
1222 struct Vmxnet3_RxDesc *rxd;
1224 for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1225 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
1226 #ifdef __BIG_ENDIAN_BITFIELD
1227 struct Vmxnet3_RxDesc rxDesc;
1229 vmxnet3_getRxDesc(rxd,
1230 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc);
1232 if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1233 rq->buf_info[ring_idx][i].skb) {
1234 pci_unmap_single(adapter->pdev, rxd->addr,
1235 rxd->len, PCI_DMA_FROMDEVICE);
1236 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1237 rq->buf_info[ring_idx][i].skb = NULL;
1238 } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1239 rq->buf_info[ring_idx][i].page) {
1240 pci_unmap_page(adapter->pdev, rxd->addr,
1241 rxd->len, PCI_DMA_FROMDEVICE);
1242 put_page(rq->buf_info[ring_idx][i].page);
1243 rq->buf_info[ring_idx][i].page = NULL;
1247 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1248 rq->rx_ring[ring_idx].next2fill =
1249 rq->rx_ring[ring_idx].next2comp = 0;
1250 rq->uncommitted[ring_idx] = 0;
1253 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1254 rq->comp_ring.next2proc = 0;
1258 void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1259 struct vmxnet3_adapter *adapter)
1264 /* all rx buffers must have already been freed */
1265 for (i = 0; i < 2; i++) {
1266 if (rq->buf_info[i]) {
1267 for (j = 0; j < rq->rx_ring[i].size; j++)
1268 BUG_ON(rq->buf_info[i][j].page != NULL);
1273 kfree(rq->buf_info[0]);
1275 for (i = 0; i < 2; i++) {
1276 if (rq->rx_ring[i].base) {
1277 pci_free_consistent(adapter->pdev, rq->rx_ring[i].size
1278 * sizeof(struct Vmxnet3_RxDesc),
1279 rq->rx_ring[i].base,
1280 rq->rx_ring[i].basePA);
1281 rq->rx_ring[i].base = NULL;
1283 rq->buf_info[i] = NULL;
1286 if (rq->comp_ring.base) {
1287 pci_free_consistent(adapter->pdev, rq->comp_ring.size *
1288 sizeof(struct Vmxnet3_RxCompDesc),
1289 rq->comp_ring.base, rq->comp_ring.basePA);
1290 rq->comp_ring.base = NULL;
1296 vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1297 struct vmxnet3_adapter *adapter)
1301 /* initialize buf_info */
1302 for (i = 0; i < rq->rx_ring[0].size; i++) {
1304 /* 1st buf for a pkt is skbuff */
1305 if (i % adapter->rx_buf_per_pkt == 0) {
1306 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1307 rq->buf_info[0][i].len = adapter->skb_buf_size;
1308 } else { /* subsequent bufs for a pkt is frag */
1309 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1310 rq->buf_info[0][i].len = PAGE_SIZE;
1313 for (i = 0; i < rq->rx_ring[1].size; i++) {
1314 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1315 rq->buf_info[1][i].len = PAGE_SIZE;
1318 /* reset internal state and allocate buffers for both rings */
1319 for (i = 0; i < 2; i++) {
1320 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1321 rq->uncommitted[i] = 0;
1323 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1324 sizeof(struct Vmxnet3_RxDesc));
1325 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1327 if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1329 /* at least has 1 rx buffer for the 1st ring */
1332 vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1334 /* reset the comp ring */
1335 rq->comp_ring.next2proc = 0;
1336 memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1337 sizeof(struct Vmxnet3_RxCompDesc));
1338 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1341 rq->rx_ctx.skb = NULL;
1343 /* stats are not reset */
1349 vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1353 struct vmxnet3_rx_buf_info *bi;
1355 for (i = 0; i < 2; i++) {
1357 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1358 rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz,
1359 &rq->rx_ring[i].basePA);
1360 if (!rq->rx_ring[i].base) {
1361 printk(KERN_ERR "%s: failed to allocate rx ring %d\n",
1362 adapter->netdev->name, i);
1367 sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1368 rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz,
1369 &rq->comp_ring.basePA);
1370 if (!rq->comp_ring.base) {
1371 printk(KERN_ERR "%s: failed to allocate rx comp ring\n",
1372 adapter->netdev->name);
1376 sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1377 rq->rx_ring[1].size);
1378 bi = kzalloc(sz, GFP_KERNEL);
1380 printk(KERN_ERR "%s: failed to allocate rx bufinfo\n",
1381 adapter->netdev->name);
1384 rq->buf_info[0] = bi;
1385 rq->buf_info[1] = bi + rq->rx_ring[0].size;
1390 vmxnet3_rq_destroy(rq, adapter);
1396 vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1398 if (unlikely(adapter->shared->ecr))
1399 vmxnet3_process_events(adapter);
1401 vmxnet3_tq_tx_complete(&adapter->tx_queue, adapter);
1402 return vmxnet3_rq_rx_complete(&adapter->rx_queue, adapter, budget);
1407 vmxnet3_poll(struct napi_struct *napi, int budget)
1409 struct vmxnet3_adapter *adapter = container_of(napi,
1410 struct vmxnet3_adapter, napi);
1413 rxd_done = vmxnet3_do_poll(adapter, budget);
1415 if (rxd_done < budget) {
1416 napi_complete(napi);
1417 vmxnet3_enable_intr(adapter, 0);
1423 /* Interrupt handler for vmxnet3 */
1425 vmxnet3_intr(int irq, void *dev_id)
1427 struct net_device *dev = dev_id;
1428 struct vmxnet3_adapter *adapter = netdev_priv(dev);
1430 if (unlikely(adapter->intr.type == VMXNET3_IT_INTX)) {
1431 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
1432 if (unlikely(icr == 0))
1438 /* disable intr if needed */
1439 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1440 vmxnet3_disable_intr(adapter, 0);
1442 napi_schedule(&adapter->napi);
1447 #ifdef CONFIG_NET_POLL_CONTROLLER
1450 /* netpoll callback. */
1452 vmxnet3_netpoll(struct net_device *netdev)
1454 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1457 #ifdef CONFIG_PCI_MSI
1458 if (adapter->intr.type == VMXNET3_IT_MSIX)
1459 irq = adapter->intr.msix_entries[0].vector;
1462 irq = adapter->pdev->irq;
1465 vmxnet3_intr(irq, netdev);
1471 vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
1475 #ifdef CONFIG_PCI_MSI
1476 if (adapter->intr.type == VMXNET3_IT_MSIX) {
1477 /* we only use 1 MSI-X vector */
1478 err = request_irq(adapter->intr.msix_entries[0].vector,
1479 vmxnet3_intr, 0, adapter->netdev->name,
1481 } else if (adapter->intr.type == VMXNET3_IT_MSI) {
1482 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
1483 adapter->netdev->name, adapter->netdev);
1487 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
1488 IRQF_SHARED, adapter->netdev->name,
1493 printk(KERN_ERR "Failed to request irq %s (intr type:%d), error"
1494 ":%d\n", adapter->netdev->name, adapter->intr.type, err);
1499 /* init our intr settings */
1500 for (i = 0; i < adapter->intr.num_intrs; i++)
1501 adapter->intr.mod_levels[i] = UPT1_IML_ADAPTIVE;
1503 /* next setup intr index for all intr sources */
1504 adapter->tx_queue.comp_ring.intr_idx = 0;
1505 adapter->rx_queue.comp_ring.intr_idx = 0;
1506 adapter->intr.event_intr_idx = 0;
1508 printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors "
1509 "allocated\n", adapter->netdev->name, adapter->intr.type,
1510 adapter->intr.mask_mode, adapter->intr.num_intrs);
1518 vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
1520 BUG_ON(adapter->intr.type == VMXNET3_IT_AUTO ||
1521 adapter->intr.num_intrs <= 0);
1523 switch (adapter->intr.type) {
1524 #ifdef CONFIG_PCI_MSI
1525 case VMXNET3_IT_MSIX:
1529 for (i = 0; i < adapter->intr.num_intrs; i++)
1530 free_irq(adapter->intr.msix_entries[i].vector,
1535 case VMXNET3_IT_MSI:
1536 free_irq(adapter->pdev->irq, adapter->netdev);
1538 case VMXNET3_IT_INTX:
1539 free_irq(adapter->pdev->irq, adapter->netdev);
1547 inline void set_flag_le16(__le16 *data, u16 flag)
1549 *data = cpu_to_le16(le16_to_cpu(*data) | flag);
1552 inline void set_flag_le64(__le64 *data, u64 flag)
1554 *data = cpu_to_le64(le64_to_cpu(*data) | flag);
1557 inline void reset_flag_le64(__le64 *data, u64 flag)
1559 *data = cpu_to_le64(le64_to_cpu(*data) & ~flag);
1564 vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
1566 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1567 struct Vmxnet3_DriverShared *shared = adapter->shared;
1568 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1571 /* add vlan rx stripping. */
1572 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) {
1574 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1575 adapter->vlan_grp = grp;
1577 /* update FEATURES to device */
1578 set_flag_le64(&devRead->misc.uptFeatures,
1580 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1581 VMXNET3_CMD_UPDATE_FEATURE);
1583 * Clear entire vfTable; then enable untagged pkts.
1584 * Note: setting one entry in vfTable to non-zero turns
1585 * on VLAN rx filtering.
1587 for (i = 0; i < VMXNET3_VFT_SIZE; i++)
1590 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1591 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1592 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1594 printk(KERN_ERR "%s: vlan_rx_register when device has "
1595 "no NETIF_F_HW_VLAN_RX\n", netdev->name);
1598 /* remove vlan rx stripping. */
1599 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1600 adapter->vlan_grp = NULL;
1602 if (le64_to_cpu(devRead->misc.uptFeatures) & UPT1_F_RXVLAN) {
1605 for (i = 0; i < VMXNET3_VFT_SIZE; i++) {
1606 /* clear entire vfTable; this also disables
1611 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1612 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1614 /* update FEATURES to device */
1615 reset_flag_le64(&devRead->misc.uptFeatures,
1617 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1618 VMXNET3_CMD_UPDATE_FEATURE);
1625 vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
1627 if (adapter->vlan_grp) {
1629 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1630 bool activeVlan = false;
1632 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1633 if (vlan_group_get_device(adapter->vlan_grp, vid)) {
1634 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1639 /* continue to allow untagged pkts */
1640 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1647 vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1649 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1650 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1652 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1653 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1654 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1659 vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1661 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1662 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1664 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
1665 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1666 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1671 vmxnet3_copy_mc(struct net_device *netdev)
1674 u32 sz = netdev_mc_count(netdev) * ETH_ALEN;
1676 /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
1678 /* We may be called with BH disabled */
1679 buf = kmalloc(sz, GFP_ATOMIC);
1681 struct netdev_hw_addr *ha;
1684 netdev_for_each_mc_addr(ha, netdev)
1685 memcpy(buf + i++ * ETH_ALEN, ha->addr,
1694 vmxnet3_set_mc(struct net_device *netdev)
1696 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1697 struct Vmxnet3_RxFilterConf *rxConf =
1698 &adapter->shared->devRead.rxFilterConf;
1699 u8 *new_table = NULL;
1700 u32 new_mode = VMXNET3_RXM_UCAST;
1702 if (netdev->flags & IFF_PROMISC)
1703 new_mode |= VMXNET3_RXM_PROMISC;
1705 if (netdev->flags & IFF_BROADCAST)
1706 new_mode |= VMXNET3_RXM_BCAST;
1708 if (netdev->flags & IFF_ALLMULTI)
1709 new_mode |= VMXNET3_RXM_ALL_MULTI;
1711 if (!netdev_mc_empty(netdev)) {
1712 new_table = vmxnet3_copy_mc(netdev);
1714 new_mode |= VMXNET3_RXM_MCAST;
1715 rxConf->mfTableLen = cpu_to_le16(
1716 netdev_mc_count(netdev) * ETH_ALEN);
1717 rxConf->mfTablePA = cpu_to_le64(virt_to_phys(
1720 printk(KERN_INFO "%s: failed to copy mcast list"
1721 ", setting ALL_MULTI\n", netdev->name);
1722 new_mode |= VMXNET3_RXM_ALL_MULTI;
1727 if (!(new_mode & VMXNET3_RXM_MCAST)) {
1728 rxConf->mfTableLen = 0;
1729 rxConf->mfTablePA = 0;
1732 if (new_mode != rxConf->rxMode) {
1733 rxConf->rxMode = cpu_to_le32(new_mode);
1734 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1735 VMXNET3_CMD_UPDATE_RX_MODE);
1738 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1739 VMXNET3_CMD_UPDATE_MAC_FILTERS);
1746 * Set up driver_shared based on settings in adapter.
1750 vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
1752 struct Vmxnet3_DriverShared *shared = adapter->shared;
1753 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1754 struct Vmxnet3_TxQueueConf *tqc;
1755 struct Vmxnet3_RxQueueConf *rqc;
1758 memset(shared, 0, sizeof(*shared));
1760 /* driver settings */
1761 shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC);
1762 devRead->misc.driverInfo.version = cpu_to_le32(
1763 VMXNET3_DRIVER_VERSION_NUM);
1764 devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
1765 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
1766 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
1767 *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32(
1768 *((u32 *)&devRead->misc.driverInfo.gos));
1769 devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1);
1770 devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1);
1772 devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter));
1773 devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter));
1775 /* set up feature flags */
1776 if (adapter->rxcsum)
1777 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXCSUM);
1780 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_LRO);
1781 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
1783 if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) &&
1784 adapter->vlan_grp) {
1785 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXVLAN);
1788 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
1789 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
1790 devRead->misc.queueDescLen = cpu_to_le32(
1791 sizeof(struct Vmxnet3_TxQueueDesc) +
1792 sizeof(struct Vmxnet3_RxQueueDesc));
1794 /* tx queue settings */
1795 BUG_ON(adapter->tx_queue.tx_ring.base == NULL);
1797 devRead->misc.numTxQueues = 1;
1798 tqc = &adapter->tqd_start->conf;
1799 tqc->txRingBasePA = cpu_to_le64(adapter->tx_queue.tx_ring.basePA);
1800 tqc->dataRingBasePA = cpu_to_le64(adapter->tx_queue.data_ring.basePA);
1801 tqc->compRingBasePA = cpu_to_le64(adapter->tx_queue.comp_ring.basePA);
1802 tqc->ddPA = cpu_to_le64(virt_to_phys(
1803 adapter->tx_queue.buf_info));
1804 tqc->txRingSize = cpu_to_le32(adapter->tx_queue.tx_ring.size);
1805 tqc->dataRingSize = cpu_to_le32(adapter->tx_queue.data_ring.size);
1806 tqc->compRingSize = cpu_to_le32(adapter->tx_queue.comp_ring.size);
1807 tqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_tx_buf_info) *
1809 tqc->intrIdx = adapter->tx_queue.comp_ring.intr_idx;
1811 /* rx queue settings */
1812 devRead->misc.numRxQueues = 1;
1813 rqc = &adapter->rqd_start->conf;
1814 rqc->rxRingBasePA[0] = cpu_to_le64(adapter->rx_queue.rx_ring[0].basePA);
1815 rqc->rxRingBasePA[1] = cpu_to_le64(adapter->rx_queue.rx_ring[1].basePA);
1816 rqc->compRingBasePA = cpu_to_le64(adapter->rx_queue.comp_ring.basePA);
1817 rqc->ddPA = cpu_to_le64(virt_to_phys(
1818 adapter->rx_queue.buf_info));
1819 rqc->rxRingSize[0] = cpu_to_le32(adapter->rx_queue.rx_ring[0].size);
1820 rqc->rxRingSize[1] = cpu_to_le32(adapter->rx_queue.rx_ring[1].size);
1821 rqc->compRingSize = cpu_to_le32(adapter->rx_queue.comp_ring.size);
1822 rqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_rx_buf_info) *
1823 (rqc->rxRingSize[0] + rqc->rxRingSize[1]));
1824 rqc->intrIdx = adapter->rx_queue.comp_ring.intr_idx;
1827 devRead->intrConf.autoMask = adapter->intr.mask_mode ==
1829 devRead->intrConf.numIntrs = adapter->intr.num_intrs;
1830 for (i = 0; i < adapter->intr.num_intrs; i++)
1831 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
1833 devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
1834 devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
1836 /* rx filter settings */
1837 devRead->rxFilterConf.rxMode = 0;
1838 vmxnet3_restore_vlan(adapter);
1839 /* the rest are already zeroed */
1844 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
1849 dev_dbg(&adapter->netdev->dev,
1850 "%s: skb_buf_size %d, rx_buf_per_pkt %d, ring sizes"
1851 " %u %u %u\n", adapter->netdev->name, adapter->skb_buf_size,
1852 adapter->rx_buf_per_pkt, adapter->tx_queue.tx_ring.size,
1853 adapter->rx_queue.rx_ring[0].size,
1854 adapter->rx_queue.rx_ring[1].size);
1856 vmxnet3_tq_init(&adapter->tx_queue, adapter);
1857 err = vmxnet3_rq_init(&adapter->rx_queue, adapter);
1859 printk(KERN_ERR "Failed to init rx queue for %s: error %d\n",
1860 adapter->netdev->name, err);
1864 err = vmxnet3_request_irqs(adapter);
1866 printk(KERN_ERR "Failed to setup irq for %s: error %d\n",
1867 adapter->netdev->name, err);
1871 vmxnet3_setup_driver_shared(adapter);
1873 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
1874 adapter->shared_pa));
1875 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
1876 adapter->shared_pa));
1877 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1878 VMXNET3_CMD_ACTIVATE_DEV);
1879 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
1882 printk(KERN_ERR "Failed to activate dev %s: error %u\n",
1883 adapter->netdev->name, ret);
1887 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD,
1888 adapter->rx_queue.rx_ring[0].next2fill);
1889 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD2,
1890 adapter->rx_queue.rx_ring[1].next2fill);
1892 /* Apply the rx filter settins last. */
1893 vmxnet3_set_mc(adapter->netdev);
1896 * Check link state when first activating device. It will start the
1897 * tx queue if the link is up.
1899 vmxnet3_check_link(adapter, true);
1901 napi_enable(&adapter->napi);
1902 vmxnet3_enable_all_intrs(adapter);
1903 clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
1907 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
1908 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
1909 vmxnet3_free_irqs(adapter);
1912 /* free up buffers we allocated */
1913 vmxnet3_rq_cleanup(&adapter->rx_queue, adapter);
1919 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
1921 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
1926 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
1928 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
1932 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1933 VMXNET3_CMD_QUIESCE_DEV);
1934 vmxnet3_disable_all_intrs(adapter);
1936 napi_disable(&adapter->napi);
1937 netif_tx_disable(adapter->netdev);
1938 adapter->link_speed = 0;
1939 netif_carrier_off(adapter->netdev);
1941 vmxnet3_tq_cleanup(&adapter->tx_queue, adapter);
1942 vmxnet3_rq_cleanup(&adapter->rx_queue, adapter);
1943 vmxnet3_free_irqs(adapter);
1949 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
1954 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
1956 tmp = (mac[5] << 8) | mac[4];
1957 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
1962 vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
1964 struct sockaddr *addr = p;
1965 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1967 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1968 vmxnet3_write_mac_addr(adapter, addr->sa_data);
1974 /* ==================== initialization and cleanup routines ============ */
1977 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64)
1980 unsigned long mmio_start, mmio_len;
1981 struct pci_dev *pdev = adapter->pdev;
1983 err = pci_enable_device(pdev);
1985 printk(KERN_ERR "Failed to enable adapter %s: error %d\n",
1986 pci_name(pdev), err);
1990 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
1991 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
1992 printk(KERN_ERR "pci_set_consistent_dma_mask failed "
1993 "for adapter %s\n", pci_name(pdev));
1999 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
2000 printk(KERN_ERR "pci_set_dma_mask failed for adapter "
2001 "%s\n", pci_name(pdev));
2008 err = pci_request_selected_regions(pdev, (1 << 2) - 1,
2009 vmxnet3_driver_name);
2011 printk(KERN_ERR "Failed to request region for adapter %s: "
2012 "error %d\n", pci_name(pdev), err);
2016 pci_set_master(pdev);
2018 mmio_start = pci_resource_start(pdev, 0);
2019 mmio_len = pci_resource_len(pdev, 0);
2020 adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
2021 if (!adapter->hw_addr0) {
2022 printk(KERN_ERR "Failed to map bar0 for adapter %s\n",
2028 mmio_start = pci_resource_start(pdev, 1);
2029 mmio_len = pci_resource_len(pdev, 1);
2030 adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
2031 if (!adapter->hw_addr1) {
2032 printk(KERN_ERR "Failed to map bar1 for adapter %s\n",
2040 iounmap(adapter->hw_addr0);
2042 pci_release_selected_regions(pdev, (1 << 2) - 1);
2044 pci_disable_device(pdev);
2050 vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
2052 BUG_ON(!adapter->pdev);
2054 iounmap(adapter->hw_addr0);
2055 iounmap(adapter->hw_addr1);
2056 pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
2057 pci_disable_device(adapter->pdev);
2062 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2066 if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
2067 VMXNET3_MAX_ETH_HDR_SIZE) {
2068 adapter->skb_buf_size = adapter->netdev->mtu +
2069 VMXNET3_MAX_ETH_HDR_SIZE;
2070 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
2071 adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
2073 adapter->rx_buf_per_pkt = 1;
2075 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
2076 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
2077 VMXNET3_MAX_ETH_HDR_SIZE;
2078 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
2082 * for simplicity, force the ring0 size to be a multiple of
2083 * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2085 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2086 adapter->rx_queue.rx_ring[0].size = (adapter->rx_queue.rx_ring[0].size +
2088 adapter->rx_queue.rx_ring[0].size = min_t(u32,
2089 adapter->rx_queue.rx_ring[0].size,
2090 VMXNET3_RX_RING_MAX_SIZE / sz * sz);
2095 vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
2096 u32 rx_ring_size, u32 rx_ring2_size)
2100 adapter->tx_queue.tx_ring.size = tx_ring_size;
2101 adapter->tx_queue.data_ring.size = tx_ring_size;
2102 adapter->tx_queue.comp_ring.size = tx_ring_size;
2103 adapter->tx_queue.shared = &adapter->tqd_start->ctrl;
2104 adapter->tx_queue.stopped = true;
2105 err = vmxnet3_tq_create(&adapter->tx_queue, adapter);
2109 adapter->rx_queue.rx_ring[0].size = rx_ring_size;
2110 adapter->rx_queue.rx_ring[1].size = rx_ring2_size;
2111 vmxnet3_adjust_rx_ring_size(adapter);
2112 adapter->rx_queue.comp_ring.size = adapter->rx_queue.rx_ring[0].size +
2113 adapter->rx_queue.rx_ring[1].size;
2114 adapter->rx_queue.qid = 0;
2115 adapter->rx_queue.qid2 = 1;
2116 adapter->rx_queue.shared = &adapter->rqd_start->ctrl;
2117 err = vmxnet3_rq_create(&adapter->rx_queue, adapter);
2119 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2125 vmxnet3_open(struct net_device *netdev)
2127 struct vmxnet3_adapter *adapter;
2130 adapter = netdev_priv(netdev);
2132 spin_lock_init(&adapter->tx_queue.tx_lock);
2134 err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE,
2135 VMXNET3_DEF_RX_RING_SIZE,
2136 VMXNET3_DEF_RX_RING_SIZE);
2140 err = vmxnet3_activate_dev(adapter);
2147 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2148 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2155 vmxnet3_close(struct net_device *netdev)
2157 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2160 * Reset_work may be in the middle of resetting the device, wait for its
2163 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2166 vmxnet3_quiesce_dev(adapter);
2168 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2169 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2171 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2179 vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2182 * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2183 * vmxnet3_close() will deadlock.
2185 BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2187 /* we need to enable NAPI, otherwise dev_close will deadlock */
2188 napi_enable(&adapter->napi);
2189 dev_close(adapter->netdev);
2194 vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2196 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2199 if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU)
2202 if (new_mtu > 1500 && !adapter->jumbo_frame)
2205 netdev->mtu = new_mtu;
2208 * Reset_work may be in the middle of resetting the device, wait for its
2211 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2214 if (netif_running(netdev)) {
2215 vmxnet3_quiesce_dev(adapter);
2216 vmxnet3_reset_dev(adapter);
2218 /* we need to re-create the rx queue based on the new mtu */
2219 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2220 vmxnet3_adjust_rx_ring_size(adapter);
2221 adapter->rx_queue.comp_ring.size =
2222 adapter->rx_queue.rx_ring[0].size +
2223 adapter->rx_queue.rx_ring[1].size;
2224 err = vmxnet3_rq_create(&adapter->rx_queue, adapter);
2226 printk(KERN_ERR "%s: failed to re-create rx queue,"
2227 " error %d. Closing it.\n", netdev->name, err);
2231 err = vmxnet3_activate_dev(adapter);
2233 printk(KERN_ERR "%s: failed to re-activate, error %d. "
2234 "Closing it\n", netdev->name, err);
2240 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2242 vmxnet3_force_close(adapter);
2249 vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
2251 struct net_device *netdev = adapter->netdev;
2253 netdev->features = NETIF_F_SG |
2255 NETIF_F_HW_VLAN_TX |
2256 NETIF_F_HW_VLAN_RX |
2257 NETIF_F_HW_VLAN_FILTER |
2262 printk(KERN_INFO "features: sg csum vlan jf tso tsoIPv6 lro");
2264 adapter->rxcsum = true;
2265 adapter->jumbo_frame = true;
2266 adapter->lro = true;
2269 netdev->features |= NETIF_F_HIGHDMA;
2273 netdev->vlan_features = netdev->features;
2279 vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2283 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
2286 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
2287 mac[4] = tmp & 0xff;
2288 mac[5] = (tmp >> 8) & 0xff;
2293 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2298 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2299 VMXNET3_CMD_GET_CONF_INTR);
2300 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2301 adapter->intr.type = cfg & 0x3;
2302 adapter->intr.mask_mode = (cfg >> 2) & 0x3;
2304 if (adapter->intr.type == VMXNET3_IT_AUTO) {
2307 #ifdef CONFIG_PCI_MSI
2308 adapter->intr.msix_entries[0].entry = 0;
2309 err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries,
2310 VMXNET3_LINUX_MAX_MSIX_VECT);
2312 adapter->intr.num_intrs = 1;
2313 adapter->intr.type = VMXNET3_IT_MSIX;
2318 err = pci_enable_msi(adapter->pdev);
2320 adapter->intr.num_intrs = 1;
2321 adapter->intr.type = VMXNET3_IT_MSI;
2326 adapter->intr.type = VMXNET3_IT_INTX;
2328 /* INT-X related setting */
2329 adapter->intr.num_intrs = 1;
2334 vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
2336 if (adapter->intr.type == VMXNET3_IT_MSIX)
2337 pci_disable_msix(adapter->pdev);
2338 else if (adapter->intr.type == VMXNET3_IT_MSI)
2339 pci_disable_msi(adapter->pdev);
2341 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
2346 vmxnet3_tx_timeout(struct net_device *netdev)
2348 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2349 adapter->tx_timeout_count++;
2351 printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name);
2352 schedule_work(&adapter->work);
2357 vmxnet3_reset_work(struct work_struct *data)
2359 struct vmxnet3_adapter *adapter;
2361 adapter = container_of(data, struct vmxnet3_adapter, work);
2363 /* if another thread is resetting the device, no need to proceed */
2364 if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2367 /* if the device is closed, we must leave it alone */
2368 if (netif_running(adapter->netdev)) {
2369 printk(KERN_INFO "%s: resetting\n", adapter->netdev->name);
2370 vmxnet3_quiesce_dev(adapter);
2371 vmxnet3_reset_dev(adapter);
2372 vmxnet3_activate_dev(adapter);
2374 printk(KERN_INFO "%s: already closed\n", adapter->netdev->name);
2377 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2381 static int __devinit
2382 vmxnet3_probe_device(struct pci_dev *pdev,
2383 const struct pci_device_id *id)
2385 static const struct net_device_ops vmxnet3_netdev_ops = {
2386 .ndo_open = vmxnet3_open,
2387 .ndo_stop = vmxnet3_close,
2388 .ndo_start_xmit = vmxnet3_xmit_frame,
2389 .ndo_set_mac_address = vmxnet3_set_mac_addr,
2390 .ndo_change_mtu = vmxnet3_change_mtu,
2391 .ndo_get_stats = vmxnet3_get_stats,
2392 .ndo_tx_timeout = vmxnet3_tx_timeout,
2393 .ndo_set_multicast_list = vmxnet3_set_mc,
2394 .ndo_vlan_rx_register = vmxnet3_vlan_rx_register,
2395 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
2396 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
2397 #ifdef CONFIG_NET_POLL_CONTROLLER
2398 .ndo_poll_controller = vmxnet3_netpoll,
2402 bool dma64 = false; /* stupid gcc */
2404 struct net_device *netdev;
2405 struct vmxnet3_adapter *adapter;
2408 netdev = alloc_etherdev(sizeof(struct vmxnet3_adapter));
2410 printk(KERN_ERR "Failed to alloc ethernet device for adapter "
2411 "%s\n", pci_name(pdev));
2415 pci_set_drvdata(pdev, netdev);
2416 adapter = netdev_priv(netdev);
2417 adapter->netdev = netdev;
2418 adapter->pdev = pdev;
2420 adapter->shared = pci_alloc_consistent(adapter->pdev,
2421 sizeof(struct Vmxnet3_DriverShared),
2422 &adapter->shared_pa);
2423 if (!adapter->shared) {
2424 printk(KERN_ERR "Failed to allocate memory for %s\n",
2427 goto err_alloc_shared;
2430 adapter->tqd_start = pci_alloc_consistent(adapter->pdev,
2431 sizeof(struct Vmxnet3_TxQueueDesc) +
2432 sizeof(struct Vmxnet3_RxQueueDesc),
2433 &adapter->queue_desc_pa);
2435 if (!adapter->tqd_start) {
2436 printk(KERN_ERR "Failed to allocate memory for %s\n",
2439 goto err_alloc_queue_desc;
2441 adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start
2444 adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL);
2445 if (adapter->pm_conf == NULL) {
2446 printk(KERN_ERR "Failed to allocate memory for %s\n",
2452 err = vmxnet3_alloc_pci_resources(adapter, &dma64);
2456 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
2458 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1);
2460 printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter"
2461 " %s\n", ver, pci_name(pdev));
2466 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
2468 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
2470 printk(KERN_ERR "Incompatible upt version (0x%x) for "
2471 "adapter %s\n", ver, pci_name(pdev));
2476 vmxnet3_declare_features(adapter, dma64);
2478 adapter->dev_number = atomic_read(&devices_found);
2479 vmxnet3_alloc_intr_resources(adapter);
2481 vmxnet3_read_mac_addr(adapter, mac);
2482 memcpy(netdev->dev_addr, mac, netdev->addr_len);
2484 netdev->netdev_ops = &vmxnet3_netdev_ops;
2485 netdev->watchdog_timeo = 5 * HZ;
2486 vmxnet3_set_ethtool_ops(netdev);
2488 INIT_WORK(&adapter->work, vmxnet3_reset_work);
2490 netif_napi_add(netdev, &adapter->napi, vmxnet3_poll, 64);
2491 SET_NETDEV_DEV(netdev, &pdev->dev);
2492 err = register_netdev(netdev);
2495 printk(KERN_ERR "Failed to register adapter %s\n",
2500 set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2501 vmxnet3_check_link(adapter, false);
2502 atomic_inc(&devices_found);
2506 vmxnet3_free_intr_resources(adapter);
2508 vmxnet3_free_pci_resources(adapter);
2510 kfree(adapter->pm_conf);
2512 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) +
2513 sizeof(struct Vmxnet3_RxQueueDesc),
2514 adapter->tqd_start, adapter->queue_desc_pa);
2515 err_alloc_queue_desc:
2516 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
2517 adapter->shared, adapter->shared_pa);
2519 pci_set_drvdata(pdev, NULL);
2520 free_netdev(netdev);
2525 static void __devexit
2526 vmxnet3_remove_device(struct pci_dev *pdev)
2528 struct net_device *netdev = pci_get_drvdata(pdev);
2529 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2531 flush_scheduled_work();
2533 unregister_netdev(netdev);
2535 vmxnet3_free_intr_resources(adapter);
2536 vmxnet3_free_pci_resources(adapter);
2537 kfree(adapter->pm_conf);
2538 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) +
2539 sizeof(struct Vmxnet3_RxQueueDesc),
2540 adapter->tqd_start, adapter->queue_desc_pa);
2541 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
2542 adapter->shared, adapter->shared_pa);
2543 free_netdev(netdev);
2550 vmxnet3_suspend(struct device *device)
2552 struct pci_dev *pdev = to_pci_dev(device);
2553 struct net_device *netdev = pci_get_drvdata(pdev);
2554 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2555 struct Vmxnet3_PMConf *pmConf;
2556 struct ethhdr *ehdr;
2557 struct arphdr *ahdr;
2559 struct in_device *in_dev;
2560 struct in_ifaddr *ifa;
2563 if (!netif_running(netdev))
2566 vmxnet3_disable_all_intrs(adapter);
2567 vmxnet3_free_irqs(adapter);
2568 vmxnet3_free_intr_resources(adapter);
2570 netif_device_detach(netdev);
2571 netif_stop_queue(netdev);
2573 /* Create wake-up filters. */
2574 pmConf = adapter->pm_conf;
2575 memset(pmConf, 0, sizeof(*pmConf));
2577 if (adapter->wol & WAKE_UCAST) {
2578 pmConf->filters[i].patternSize = ETH_ALEN;
2579 pmConf->filters[i].maskSize = 1;
2580 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
2581 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
2583 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER);
2587 if (adapter->wol & WAKE_ARP) {
2588 in_dev = in_dev_get(netdev);
2592 ifa = (struct in_ifaddr *)in_dev->ifa_list;
2596 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
2597 sizeof(struct arphdr) + /* ARP header */
2598 2 * ETH_ALEN + /* 2 Ethernet addresses*/
2599 2 * sizeof(u32); /*2 IPv4 addresses */
2600 pmConf->filters[i].maskSize =
2601 (pmConf->filters[i].patternSize - 1) / 8 + 1;
2603 /* ETH_P_ARP in Ethernet header. */
2604 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
2605 ehdr->h_proto = htons(ETH_P_ARP);
2607 /* ARPOP_REQUEST in ARP header. */
2608 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
2609 ahdr->ar_op = htons(ARPOP_REQUEST);
2610 arpreq = (u8 *)(ahdr + 1);
2612 /* The Unicast IPv4 address in 'tip' field. */
2613 arpreq += 2 * ETH_ALEN + sizeof(u32);
2614 *(u32 *)arpreq = ifa->ifa_address;
2616 /* The mask for the relevant bits. */
2617 pmConf->filters[i].mask[0] = 0x00;
2618 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
2619 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
2620 pmConf->filters[i].mask[3] = 0x00;
2621 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
2622 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
2625 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER);
2630 if (adapter->wol & WAKE_MAGIC)
2631 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_MAGIC);
2633 pmConf->numFilters = i;
2635 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
2636 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
2638 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
2641 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2642 VMXNET3_CMD_UPDATE_PMCFG);
2644 pci_save_state(pdev);
2645 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
2647 pci_disable_device(pdev);
2648 pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
2655 vmxnet3_resume(struct device *device)
2658 struct pci_dev *pdev = to_pci_dev(device);
2659 struct net_device *netdev = pci_get_drvdata(pdev);
2660 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2661 struct Vmxnet3_PMConf *pmConf;
2663 if (!netif_running(netdev))
2666 /* Destroy wake-up filters. */
2667 pmConf = adapter->pm_conf;
2668 memset(pmConf, 0, sizeof(*pmConf));
2670 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
2671 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
2673 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le32(virt_to_phys(
2676 netif_device_attach(netdev);
2677 pci_set_power_state(pdev, PCI_D0);
2678 pci_restore_state(pdev);
2679 err = pci_enable_device_mem(pdev);
2683 pci_enable_wake(pdev, PCI_D0, 0);
2685 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2686 VMXNET3_CMD_UPDATE_PMCFG);
2687 vmxnet3_alloc_intr_resources(adapter);
2688 vmxnet3_request_irqs(adapter);
2689 vmxnet3_enable_all_intrs(adapter);
2694 static const struct dev_pm_ops vmxnet3_pm_ops = {
2695 .suspend = vmxnet3_suspend,
2696 .resume = vmxnet3_resume,
2700 static struct pci_driver vmxnet3_driver = {
2701 .name = vmxnet3_driver_name,
2702 .id_table = vmxnet3_pciid_table,
2703 .probe = vmxnet3_probe_device,
2704 .remove = __devexit_p(vmxnet3_remove_device),
2706 .driver.pm = &vmxnet3_pm_ops,
2712 vmxnet3_init_module(void)
2714 printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC,
2715 VMXNET3_DRIVER_VERSION_REPORT);
2716 return pci_register_driver(&vmxnet3_driver);
2719 module_init(vmxnet3_init_module);
2723 vmxnet3_exit_module(void)
2725 pci_unregister_driver(&vmxnet3_driver);
2728 module_exit(vmxnet3_exit_module);
2730 MODULE_AUTHOR("VMware, Inc.");
2731 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
2732 MODULE_LICENSE("GPL v2");
2733 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);