drivers/net/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2010 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for ixgbe */
  29
  30 #include <linux/types.h>
  31 #include <linux/module.h>
  32 #include <linux/slab.h>
  33 #include <linux/pci.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/uaccess.h>
  38
  39 #include "ixgbe.h"
  40
  41
  42 #define IXGBE_ALL_RAR_ENTRIES 16
  43
  44 enum {NETDEV_STATS, IXGBE_STATS};
  45
  46 struct ixgbe_stats {
  47         char stat_string[ETH_GSTRING_LEN];
  48         int type;
  49         int sizeof_stat;
  50         int stat_offset;
  51 };
  52
  53 #define IXGBE_STAT(m)           IXGBE_STATS, \
  54                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  55                                 offsetof(struct ixgbe_adapter, m)
  56 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  57                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  58                                 offsetof(struct rtnl_link_stats64, m)
  59
  60 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
  61         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  62         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  63         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  64         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  65         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  66         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  67         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  68         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  69         {"lsc_int", IXGBE_STAT(lsc_int)},
  70         {"tx_busy", IXGBE_STAT(tx_busy)},
  71         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  72         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  73         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  74         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  75         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  76         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  77         {"broadcast", IXGBE_STAT(stats.bprc)},
  78         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  79         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  80         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  81         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  82         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  83         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  84         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  85         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  86         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  87         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  88         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  89         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  90         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  91         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  92         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  93         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  94         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
  95         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  96         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
  97         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
  98         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
  99         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 100         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 101         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 102         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 103         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 104         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 105 #ifdef IXGBE_FCOE
 106         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 107         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 108         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 109         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 110         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 111         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 112 #endif /* IXGBE_FCOE */
 113 };
 114
 115 #define IXGBE_QUEUE_STATS_LEN \
 116         ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
 117         ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
 118         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 119 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 120 #define IXGBE_PB_STATS_LEN ( \
 121                  (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
 122                  IXGBE_FLAG_DCB_ENABLED) ? \
 123                  (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 124                   sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 125                   sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 126                   sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 127                   / sizeof(u64) : 0)
 128 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 129                          IXGBE_PB_STATS_LEN + \
 130                          IXGBE_QUEUE_STATS_LEN)
 131
 132 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 133         "Register test  (offline)", "Eeprom test    (offline)",
 134         "Interrupt test (offline)", "Loopback test  (offline)",
 135         "Link test   (on/offline)"
 136 };
 137 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 138
 139 static int ixgbe_get_settings(struct net_device *netdev,
 140                               struct ethtool_cmd *ecmd)
 141 {
 142         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 143         struct ixgbe_hw *hw = &adapter->hw;
 144         u32 link_speed = 0;
 145         bool link_up;
 146
 147         ecmd->supported = SUPPORTED_10000baseT_Full;
 148         ecmd->autoneg = AUTONEG_ENABLE;
 149         ecmd->transceiver = XCVR_EXTERNAL;
 150         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 151             (hw->phy.multispeed_fiber)) {
 152                 ecmd->supported |= (SUPPORTED_1000baseT_Full |
 153                                     SUPPORTED_Autoneg);
 154
 155                 ecmd->advertising = ADVERTISED_Autoneg;
 156                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
 157                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 158                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
 159                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 160                 /*
 161                  * It's possible that phy.autoneg_advertised may not be
 162                  * set yet.  If so display what the default would be -
 163                  * both 1G and 10G supported.
 164                  */
 165                 if (!(ecmd->advertising & (ADVERTISED_1000baseT_Full |
 166                                            ADVERTISED_10000baseT_Full)))
 167                         ecmd->advertising |= (ADVERTISED_10000baseT_Full |
 168                                               ADVERTISED_1000baseT_Full);
 169
 170                 if (hw->phy.media_type == ixgbe_media_type_copper) {
 171                         ecmd->supported |= SUPPORTED_TP;
 172                         ecmd->advertising |= ADVERTISED_TP;
 173                         ecmd->port = PORT_TP;
 174                 } else {
 175                         ecmd->supported |= SUPPORTED_FIBRE;
 176                         ecmd->advertising |= ADVERTISED_FIBRE;
 177                         ecmd->port = PORT_FIBRE;
 178                 }
 179         } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
 180                 /* Set as FIBRE until SERDES defined in kernel */
 181                 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
 182                         ecmd->supported = (SUPPORTED_1000baseT_Full |
 183                                            SUPPORTED_FIBRE);
 184                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 185                                              ADVERTISED_FIBRE);
 186                         ecmd->port = PORT_FIBRE;
 187                         ecmd->autoneg = AUTONEG_DISABLE;
 188                 } else {
 189                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 190                                             SUPPORTED_FIBRE);
 191                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 192                                              ADVERTISED_1000baseT_Full |
 193                                              ADVERTISED_FIBRE);
 194                         ecmd->port = PORT_FIBRE;
 195                 }
 196         } else {
 197                 ecmd->supported |= SUPPORTED_FIBRE;
 198                 ecmd->advertising = (ADVERTISED_10000baseT_Full |
 199                                      ADVERTISED_FIBRE);
 200                 ecmd->port = PORT_FIBRE;
 201                 ecmd->autoneg = AUTONEG_DISABLE;
 202         }
 203
 204         /* Get PHY type */
 205         switch (adapter->hw.phy.type) {
 206         case ixgbe_phy_tn:
 207         case ixgbe_phy_cu_unknown:
 208                 /* Copper 10G-BASET */
 209                 ecmd->port = PORT_TP;
 210                 break;
 211         case ixgbe_phy_qt:
 212                 ecmd->port = PORT_FIBRE;
 213                 break;
 214         case ixgbe_phy_nl:
 215         case ixgbe_phy_sfp_passive_tyco:
 216         case ixgbe_phy_sfp_passive_unknown:
 217         case ixgbe_phy_sfp_ftl:
 218         case ixgbe_phy_sfp_avago:
 219         case ixgbe_phy_sfp_intel:
 220         case ixgbe_phy_sfp_unknown:
 221                 switch (adapter->hw.phy.sfp_type) {
 222                 /* SFP+ devices, further checking needed */
 223                 case ixgbe_sfp_type_da_cu:
 224                 case ixgbe_sfp_type_da_cu_core0:
 225                 case ixgbe_sfp_type_da_cu_core1:
 226                         ecmd->port = PORT_DA;
 227                         break;
 228                 case ixgbe_sfp_type_sr:
 229                 case ixgbe_sfp_type_lr:
 230                 case ixgbe_sfp_type_srlr_core0:
 231                 case ixgbe_sfp_type_srlr_core1:
 232                         ecmd->port = PORT_FIBRE;
 233                         break;
 234                 case ixgbe_sfp_type_not_present:
 235                         ecmd->port = PORT_NONE;
 236                         break;
 237                 case ixgbe_sfp_type_1g_cu_core0:
 238                 case ixgbe_sfp_type_1g_cu_core1:
 239                         ecmd->port = PORT_TP;
 240                         ecmd->supported = SUPPORTED_TP;
 241                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 242                                              ADVERTISED_TP);
 243                         break;
 244                 case ixgbe_sfp_type_unknown:
 245                 default:
 246                         ecmd->port = PORT_OTHER;
 247                         break;
 248                 }
 249                 break;
 250         case ixgbe_phy_xaui:
 251                 ecmd->port = PORT_NONE;
 252                 break;
 253         case ixgbe_phy_unknown:
 254         case ixgbe_phy_generic:
 255         case ixgbe_phy_sfp_unsupported:
 256         default:
 257                 ecmd->port = PORT_OTHER;
 258                 break;
 259         }
 260
 261         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 262         if (link_up) {
 263                 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
 264                                SPEED_10000 : SPEED_1000;
 265                 ecmd->duplex = DUPLEX_FULL;
 266         } else {
 267                 ecmd->speed = -1;
 268                 ecmd->duplex = -1;
 269         }
 270
 271         return 0;
 272 }
 273
 274 static int ixgbe_set_settings(struct net_device *netdev,
 275                               struct ethtool_cmd *ecmd)
 276 {
 277         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 278         struct ixgbe_hw *hw = &adapter->hw;
 279         u32 advertised, old;
 280         s32 err = 0;
 281
 282         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 283             (hw->phy.multispeed_fiber)) {
 284                 /* 10000/copper and 1000/copper must autoneg
 285                  * this function does not support any duplex forcing, but can
 286                  * limit the advertising of the adapter to only 10000 or 1000 */
 287                 if (ecmd->autoneg == AUTONEG_DISABLE)
 288                         return -EINVAL;
 289
 290                 old = hw->phy.autoneg_advertised;
 291                 advertised = 0;
 292                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 293                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 294
 295                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 296                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 297
 298                 if (old == advertised)
 299                         return err;
 300                 /* this sets the link speed and restarts auto-neg */
 301                 hw->mac.autotry_restart = true;
 302                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
 303                 if (err) {
 304                         e_info(probe, "setup link failed with code %d\n", err);
 305                         hw->mac.ops.setup_link(hw, old, true, true);
 306                 }
 307         } else {
 308                 /* in this case we currently only support 10Gb/FULL */
 309                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 310                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 311                     (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 312                         return -EINVAL;
 313         }
 314
 315         return err;
 316 }
 317
 318 static void ixgbe_get_pauseparam(struct net_device *netdev,
 319                                  struct ethtool_pauseparam *pause)
 320 {
 321         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 322         struct ixgbe_hw *hw = &adapter->hw;
 323
 324         /*
 325          * Flow Control Autoneg isn't on if
 326          *  - we didn't ask for it OR
 327          *  - it failed, we know this by tx & rx being off
 328          */
 329         if (hw->fc.disable_fc_autoneg ||
 330             (hw->fc.current_mode == ixgbe_fc_none))
 331                 pause->autoneg = 0;
 332         else
 333                 pause->autoneg = 1;
 334
 335 #ifdef CONFIG_DCB
 336         if (hw->fc.current_mode == ixgbe_fc_pfc) {
 337                 pause->rx_pause = 0;
 338                 pause->tx_pause = 0;
 339         }
 340
 341 #endif
 342         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 343                 pause->rx_pause = 1;
 344         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 345                 pause->tx_pause = 1;
 346         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 347                 pause->rx_pause = 1;
 348                 pause->tx_pause = 1;
 349         }
 350 }
 351
 352 static int ixgbe_set_pauseparam(struct net_device *netdev,
 353                                 struct ethtool_pauseparam *pause)
 354 {
 355         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 356         struct ixgbe_hw *hw = &adapter->hw;
 357         struct ixgbe_fc_info fc;
 358
 359 #ifdef CONFIG_DCB
 360         if (adapter->dcb_cfg.pfc_mode_enable ||
 361                 ((hw->mac.type == ixgbe_mac_82598EB) &&
 362                 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
 363                 return -EINVAL;
 364
 365 #endif
 366
 367         fc = hw->fc;
 368
 369         if (pause->autoneg != AUTONEG_ENABLE)
 370                 fc.disable_fc_autoneg = true;
 371         else
 372                 fc.disable_fc_autoneg = false;
 373
 374         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 375                 fc.requested_mode = ixgbe_fc_full;
 376         else if (pause->rx_pause && !pause->tx_pause)
 377                 fc.requested_mode = ixgbe_fc_rx_pause;
 378         else if (!pause->rx_pause && pause->tx_pause)
 379                 fc.requested_mode = ixgbe_fc_tx_pause;
 380         else if (!pause->rx_pause && !pause->tx_pause)
 381                 fc.requested_mode = ixgbe_fc_none;
 382         else
 383                 return -EINVAL;
 384
 385 #ifdef CONFIG_DCB
 386         adapter->last_lfc_mode = fc.requested_mode;
 387 #endif
 388
 389         /* if the thing changed then we'll update and use new autoneg */
 390         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 391                 hw->fc = fc;
 392                 if (netif_running(netdev))
 393                         ixgbe_reinit_locked(adapter);
 394                 else
 395                         ixgbe_reset(adapter);
 396         }
 397
 398         return 0;
 399 }
 400
 401 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
 402 {
 403         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 404         return adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED;
 405 }
 406
 407 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
 408 {
 409         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 410         if (data)
 411                 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
 412         else
 413                 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
 414
 415         return 0;
 416 }
 417
 418 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
 419 {
 420         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 421 }
 422
 423 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
 424 {
 425         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 426
 427         if (data) {
 428                 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
 429                 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
 430                         netdev->features |= NETIF_F_SCTP_CSUM;
 431         } else {
 432                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
 433                 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
 434                         netdev->features &= ~NETIF_F_SCTP_CSUM;
 435         }
 436
 437         return 0;
 438 }
 439
 440 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
 441 {
 442         if (data) {
 443                 netdev->features |= NETIF_F_TSO;
 444                 netdev->features |= NETIF_F_TSO6;
 445         } else {
 446                 netdev->features &= ~NETIF_F_TSO;
 447                 netdev->features &= ~NETIF_F_TSO6;
 448         }
 449         return 0;
 450 }
 451
 452 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 453 {
 454         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 455         return adapter->msg_enable;
 456 }
 457
 458 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 459 {
 460         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 461         adapter->msg_enable = data;
 462 }
 463
 464 static int ixgbe_get_regs_len(struct net_device *netdev)
 465 {
 466 #define IXGBE_REGS_LEN  1128
 467         return IXGBE_REGS_LEN * sizeof(u32);
 468 }
 469
 470 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 471
 472 static void ixgbe_get_regs(struct net_device *netdev,
 473                            struct ethtool_regs *regs, void *p)
 474 {
 475         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 476         struct ixgbe_hw *hw = &adapter->hw;
 477         u32 *regs_buff = p;
 478         u8 i;
 479
 480         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 481
 482         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
 483
 484         /* General Registers */
 485         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 486         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 487         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 488         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 489         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 490         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 491         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 492         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 493
 494         /* NVM Register */
 495         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 496         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 497         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 498         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 499         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 500         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 501         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 502         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 503         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 504         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 505
 506         /* Interrupt */
 507         /* don't read EICR because it can clear interrupt causes, instead
 508          * read EICS which is a shadow but doesn't clear EICR */
 509         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 510         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 511         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 512         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 513         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 514         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 515         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 516         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 517         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 518         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 519         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 520         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 521
 522         /* Flow Control */
 523         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 524         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 525         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 526         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 527         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 528         for (i = 0; i < 8; i++)
 529                 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 530         for (i = 0; i < 8; i++)
 531                 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 532         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 533         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 534
 535         /* Receive DMA */
 536         for (i = 0; i < 64; i++)
 537                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 538         for (i = 0; i < 64; i++)
 539                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 540         for (i = 0; i < 64; i++)
 541                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 542         for (i = 0; i < 64; i++)
 543                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 544         for (i = 0; i < 64; i++)
 545                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 546         for (i = 0; i < 64; i++)
 547                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 548         for (i = 0; i < 16; i++)
 549                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 550         for (i = 0; i < 16; i++)
 551                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 552         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 553         for (i = 0; i < 8; i++)
 554                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 555         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 556         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 557
 558         /* Receive */
 559         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 560         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 561         for (i = 0; i < 16; i++)
 562                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 563         for (i = 0; i < 16; i++)
 564                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 565         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 566         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 567         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 568         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 569         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 570         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 571         for (i = 0; i < 8; i++)
 572                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 573         for (i = 0; i < 8; i++)
 574                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 575         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 576
 577         /* Transmit */
 578         for (i = 0; i < 32; i++)
 579                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 580         for (i = 0; i < 32; i++)
 581                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 582         for (i = 0; i < 32; i++)
 583                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 584         for (i = 0; i < 32; i++)
 585                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 586         for (i = 0; i < 32; i++)
 587                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 588         for (i = 0; i < 32; i++)
 589                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 590         for (i = 0; i < 32; i++)
 591                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 592         for (i = 0; i < 32; i++)
 593                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 594         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 595         for (i = 0; i < 16; i++)
 596                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 597         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 598         for (i = 0; i < 8; i++)
 599                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 600         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 601
 602         /* Wake Up */
 603         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 604         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 605         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 606         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 607         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 608         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 609         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 610         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 611         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 612
 613         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
 614         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 615         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
 616         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 617         for (i = 0; i < 8; i++)
 618                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 619         for (i = 0; i < 8; i++)
 620                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 621         for (i = 0; i < 8; i++)
 622                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 623         for (i = 0; i < 8; i++)
 624                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 625         for (i = 0; i < 8; i++)
 626                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
 627         for (i = 0; i < 8; i++)
 628                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
 629
 630         /* Statistics */
 631         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 632         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 633         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 634         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 635         for (i = 0; i < 8; i++)
 636                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 637         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 638         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 639         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 640         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 641         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 642         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 643         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 644         for (i = 0; i < 8; i++)
 645                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 646         for (i = 0; i < 8; i++)
 647                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 648         for (i = 0; i < 8; i++)
 649                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 650         for (i = 0; i < 8; i++)
 651                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 652         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 653         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 654         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 655         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 656         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 657         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 658         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 659         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 660         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 661         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 662         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 663         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 664         for (i = 0; i < 8; i++)
 665                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 666         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 667         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 668         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 669         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 670         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 671         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 672         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 673         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 674         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 675         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 676         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 677         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 678         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 679         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 680         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 681         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 682         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 683         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 684         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 685         for (i = 0; i < 16; i++)
 686                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 687         for (i = 0; i < 16; i++)
 688                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 689         for (i = 0; i < 16; i++)
 690                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 691         for (i = 0; i < 16; i++)
 692                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 693
 694         /* MAC */
 695         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 696         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 697         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 698         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 699         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 700         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 701         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 702         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 703         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 704         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 705         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 706         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 707         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 708         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 709         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 710         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 711         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 712         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 713         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 714         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 715         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 716         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 717         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 718         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 719         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 720         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 721         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 722         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 723         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 724         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 725         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 726         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 727         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 728
 729         /* Diagnostic */
 730         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 731         for (i = 0; i < 8; i++)
 732                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 733         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 734         for (i = 0; i < 4; i++)
 735                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 736         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 737         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 738         for (i = 0; i < 8; i++)
 739                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 740         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 741         for (i = 0; i < 4; i++)
 742                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 743         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 744         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 745         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 746         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 747         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 748         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 749         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 750         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 751         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 752         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 753         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 754         for (i = 0; i < 8; i++)
 755                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 756         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 757         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 758         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 759         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 760         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 761         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 762         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 763         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 764         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 765 }
 766
 767 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 768 {
 769         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 770         return adapter->hw.eeprom.word_size * 2;
 771 }
 772
 773 static int ixgbe_get_eeprom(struct net_device *netdev,
 774                             struct ethtool_eeprom *eeprom, u8 *bytes)
 775 {
 776         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 777         struct ixgbe_hw *hw = &adapter->hw;
 778         u16 *eeprom_buff;
 779         int first_word, last_word, eeprom_len;
 780         int ret_val = 0;
 781         u16 i;
 782
 783         if (eeprom->len == 0)
 784                 return -EINVAL;
 785
 786         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 787
 788         first_word = eeprom->offset >> 1;
 789         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 790         eeprom_len = last_word - first_word + 1;
 791
 792         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 793         if (!eeprom_buff)
 794                 return -ENOMEM;
 795
 796         for (i = 0; i < eeprom_len; i++) {
 797                 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
 798                     &eeprom_buff[i])))
 799                         break;
 800         }
 801
 802         /* Device's eeprom is always little-endian, word addressable */
 803         for (i = 0; i < eeprom_len; i++)
 804                 le16_to_cpus(&eeprom_buff[i]);
 805
 806         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 807         kfree(eeprom_buff);
 808
 809         return ret_val;
 810 }
 811
 812 static void ixgbe_get_drvinfo(struct net_device *netdev,
 813                               struct ethtool_drvinfo *drvinfo)
 814 {
 815         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 816         char firmware_version[32];
 817
 818         strncpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
 819         strncpy(drvinfo->version, ixgbe_driver_version,
 820                 sizeof(drvinfo->version));
 821
 822         snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
 823                  (adapter->eeprom_version & 0xF000) >> 12,
 824                  (adapter->eeprom_version & 0x0FF0) >> 4,
 825                  adapter->eeprom_version & 0x000F);
 826
 827         strncpy(drvinfo->fw_version, firmware_version,
 828                 sizeof(drvinfo->fw_version));
 829         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
 830                 sizeof(drvinfo->bus_info));
 831         drvinfo->n_stats = IXGBE_STATS_LEN;
 832         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 833         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 834 }
 835
 836 static void ixgbe_get_ringparam(struct net_device *netdev,
 837                                 struct ethtool_ringparam *ring)
 838 {
 839         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 840         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 841         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 842
 843         ring->rx_max_pending = IXGBE_MAX_RXD;
 844         ring->tx_max_pending = IXGBE_MAX_TXD;
 845         ring->rx_mini_max_pending = 0;
 846         ring->rx_jumbo_max_pending = 0;
 847         ring->rx_pending = rx_ring->count;
 848         ring->tx_pending = tx_ring->count;
 849         ring->rx_mini_pending = 0;
 850         ring->rx_jumbo_pending = 0;
 851 }
 852
 853 static int ixgbe_set_ringparam(struct net_device *netdev,
 854                                struct ethtool_ringparam *ring)
 855 {
 856         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 857         struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
 858         int i, err = 0;
 859         u32 new_rx_count, new_tx_count;
 860         bool need_update = false;
 861
 862         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 863                 return -EINVAL;
 864
 865         new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
 866         new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
 867         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 868
 869         new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
 870         new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
 871         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 872
 873         if ((new_tx_count == adapter->tx_ring[0]->count) &&
 874             (new_rx_count == adapter->rx_ring[0]->count)) {
 875                 /* nothing to do */
 876                 return 0;
 877         }
 878
 879         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 880                 msleep(1);
 881
 882         if (!netif_running(adapter->netdev)) {
 883                 for (i = 0; i < adapter->num_tx_queues; i++)
 884                         adapter->tx_ring[i]->count = new_tx_count;
 885                 for (i = 0; i < adapter->num_rx_queues; i++)
 886                         adapter->rx_ring[i]->count = new_rx_count;
 887                 adapter->tx_ring_count = new_tx_count;
 888                 adapter->rx_ring_count = new_rx_count;
 889                 goto clear_reset;
 890         }
 891
 892         temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
 893         if (!temp_tx_ring) {
 894                 err = -ENOMEM;
 895                 goto clear_reset;
 896         }
 897
 898         if (new_tx_count != adapter->tx_ring_count) {
 899                 for (i = 0; i < adapter->num_tx_queues; i++) {
 900                         memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
 901                                sizeof(struct ixgbe_ring));
 902                         temp_tx_ring[i].count = new_tx_count;
 903                         err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);
 904                         if (err) {
 905                                 while (i) {
 906                                         i--;
 907                                         ixgbe_free_tx_resources(&temp_tx_ring[i]);
 908                                 }
 909                                 goto clear_reset;
 910                         }
 911                 }
 912                 need_update = true;
 913         }
 914
 915         temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
 916         if (!temp_rx_ring) {
 917                 err = -ENOMEM;
 918                 goto err_setup;
 919         }
 920
 921         if (new_rx_count != adapter->rx_ring_count) {
 922                 for (i = 0; i < adapter->num_rx_queues; i++) {
 923                         memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
 924                                sizeof(struct ixgbe_ring));
 925                         temp_rx_ring[i].count = new_rx_count;
 926                         err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);
 927                         if (err) {
 928                                 while (i) {
 929                                         i--;
 930                                         ixgbe_free_rx_resources(&temp_rx_ring[i]);
 931                                 }
 932                                 goto err_setup;
 933                         }
 934                 }
 935                 need_update = true;
 936         }
 937
 938         /* if rings need to be updated, here's the place to do it in one shot */
 939         if (need_update) {
 940                 ixgbe_down(adapter);
 941
 942                 /* tx */
 943                 if (new_tx_count != adapter->tx_ring_count) {
 944                         for (i = 0; i < adapter->num_tx_queues; i++) {
 945                                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
 946                                 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
 947                                        sizeof(struct ixgbe_ring));
 948                         }
 949                         adapter->tx_ring_count = new_tx_count;
 950                 }
 951
 952                 /* rx */
 953                 if (new_rx_count != adapter->rx_ring_count) {
 954                         for (i = 0; i < adapter->num_rx_queues; i++) {
 955                                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
 956                                 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
 957                                        sizeof(struct ixgbe_ring));
 958                         }
 959                         adapter->rx_ring_count = new_rx_count;
 960                 }
 961                 ixgbe_up(adapter);
 962         }
 963
 964         vfree(temp_rx_ring);
 965 err_setup:
 966         vfree(temp_tx_ring);
 967 clear_reset:
 968         clear_bit(__IXGBE_RESETTING, &adapter->state);
 969         return err;
 970 }
 971
 972 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
 973 {
 974         switch (sset) {
 975         case ETH_SS_TEST:
 976                 return IXGBE_TEST_LEN;
 977         case ETH_SS_STATS:
 978                 return IXGBE_STATS_LEN;
 979         case ETH_SS_NTUPLE_FILTERS:
 980                 return ETHTOOL_MAX_NTUPLE_LIST_ENTRY *
 981                        ETHTOOL_MAX_NTUPLE_STRING_PER_ENTRY;
 982         default:
 983                 return -EOPNOTSUPP;
 984         }
 985 }
 986
 987 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
 988                                     struct ethtool_stats *stats, u64 *data)
 989 {
 990         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 991         struct rtnl_link_stats64 temp;
 992         const struct rtnl_link_stats64 *net_stats;
 993         unsigned int start;
 994         struct ixgbe_ring *ring;
 995         int i, j;
 996         char *p = NULL;
 997
 998         ixgbe_update_stats(adapter);
 999         net_stats = dev_get_stats(netdev, &temp);
1000         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1001                 switch (ixgbe_gstrings_stats[i].type) {
1002                 case NETDEV_STATS:
1003                         p = (char *) net_stats +
1004                                         ixgbe_gstrings_stats[i].stat_offset;
1005                         break;
1006                 case IXGBE_STATS:
1007                         p = (char *) adapter +
1008                                         ixgbe_gstrings_stats[i].stat_offset;
1009                         break;
1010                 }
1011
1012                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1013                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1014         }
1015         for (j = 0; j < adapter->num_tx_queues; j++) {
1016                 ring = adapter->tx_ring[j];
1017                 do {
1018                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1019                         data[i]   = ring->stats.packets;
1020                         data[i+1] = ring->stats.bytes;
1021                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1022                 i += 2;
1023         }
1024         for (j = 0; j < adapter->num_rx_queues; j++) {
1025                 ring = adapter->rx_ring[j];
1026                 do {
1027                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1028                         data[i]   = ring->stats.packets;
1029                         data[i+1] = ring->stats.bytes;
1030                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1031                 i += 2;
1032         }
1033         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1034                 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1035                         data[i++] = adapter->stats.pxontxc[j];
1036                         data[i++] = adapter->stats.pxofftxc[j];
1037                 }
1038                 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1039                         data[i++] = adapter->stats.pxonrxc[j];
1040                         data[i++] = adapter->stats.pxoffrxc[j];
1041                 }
1042         }
1043 }
1044
1045 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1046                               u8 *data)
1047 {
1048         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1049         char *p = (char *)data;
1050         int i;
1051
1052         switch (stringset) {
1053         case ETH_SS_TEST:
1054                 memcpy(data, *ixgbe_gstrings_test,
1055                        IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1056                 break;
1057         case ETH_SS_STATS:
1058                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1059                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1060                                ETH_GSTRING_LEN);
1061                         p += ETH_GSTRING_LEN;
1062                 }
1063                 for (i = 0; i < adapter->num_tx_queues; i++) {
1064                         sprintf(p, "tx_queue_%u_packets", i);
1065                         p += ETH_GSTRING_LEN;
1066                         sprintf(p, "tx_queue_%u_bytes", i);
1067                         p += ETH_GSTRING_LEN;
1068                 }
1069                 for (i = 0; i < adapter->num_rx_queues; i++) {
1070                         sprintf(p, "rx_queue_%u_packets", i);
1071                         p += ETH_GSTRING_LEN;
1072                         sprintf(p, "rx_queue_%u_bytes", i);
1073                         p += ETH_GSTRING_LEN;
1074                 }
1075                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1076                         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1077                                 sprintf(p, "tx_pb_%u_pxon", i);
1078                                 p += ETH_GSTRING_LEN;
1079                                 sprintf(p, "tx_pb_%u_pxoff", i);
1080                                 p += ETH_GSTRING_LEN;
1081                         }
1082                         for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1083                                 sprintf(p, "rx_pb_%u_pxon", i);
1084                                 p += ETH_GSTRING_LEN;
1085                                 sprintf(p, "rx_pb_%u_pxoff", i);
1086                                 p += ETH_GSTRING_LEN;
1087                         }
1088                 }
1089                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1090                 break;
1091         }
1092 }
1093
1094 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1095 {
1096         struct ixgbe_hw *hw = &adapter->hw;
1097         bool link_up;
1098         u32 link_speed = 0;
1099         *data = 0;
1100
1101         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1102         if (link_up)
1103                 return *data;
1104         else
1105                 *data = 1;
1106         return *data;
1107 }
1108
1109 /* ethtool register test data */
1110 struct ixgbe_reg_test {
1111         u16 reg;
1112         u8  array_len;
1113         u8  test_type;
1114         u32 mask;
1115         u32 write;
1116 };
1117
1118 /* In the hardware, registers are laid out either singly, in arrays
1119  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1120  * most tests take place on arrays or single registers (handled
1121  * as a single-element array) and special-case the tables.
1122  * Table tests are always pattern tests.
1123  *
1124  * We also make provision for some required setup steps by specifying
1125  * registers to be written without any read-back testing.
1126  */
1127
1128 #define PATTERN_TEST    1
1129 #define SET_READ_TEST   2
1130 #define WRITE_NO_TEST   3
1131 #define TABLE32_TEST    4
1132 #define TABLE64_TEST_LO 5
1133 #define TABLE64_TEST_HI 6
1134
1135 /* default 82599 register test */
1136 static struct ixgbe_reg_test reg_test_82599[] = {
1137         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1138         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1139         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1140         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1141         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1142         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1143         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1144         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1145         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1146         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1147         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1148         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1149         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1150         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1151         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1152         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1153         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1154         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1155         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1156         { 0, 0, 0, 0 }
1157 };
1158
1159 /* default 82598 register test */
1160 static struct ixgbe_reg_test reg_test_82598[] = {
1161         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1162         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1163         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1164         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1165         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1166         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1167         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1168         /* Enable all four RX queues before testing. */
1169         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1170         /* RDH is read-only for 82598, only test RDT. */
1171         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1172         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1173         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1174         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1175         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1176         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1177         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1178         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1179         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1180         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1181         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1182         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1183         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1184         { 0, 0, 0, 0 }
1185 };
1186
1187 #define REG_PATTERN_TEST(R, M, W)                                             \
1188 {                                                                             \
1189         u32 pat, val, before;                                                 \
1190         const u32 _test[] = {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
1191         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {                       \
1192                 before = readl(adapter->hw.hw_addr + R);                      \
1193                 writel((_test[pat] & W), (adapter->hw.hw_addr + R));          \
1194                 val = readl(adapter->hw.hw_addr + R);                         \
1195                 if (val != (_test[pat] & W & M)) {                            \
1196                         e_err(drv, "pattern test reg %04X failed: got "   \
1197                               "0x%08X expected 0x%08X\n",                     \
1198                               R, val, (_test[pat] & W & M));                \
1199                         *data = R;                                            \
1200                         writel(before, adapter->hw.hw_addr + R);              \
1201                         return 1;                                             \
1202                 }                                                             \
1203                 writel(before, adapter->hw.hw_addr + R);                      \
1204         }                                                                     \
1205 }
1206
1207 #define REG_SET_AND_CHECK(R, M, W)                                            \
1208 {                                                                             \
1209         u32 val, before;                                                      \
1210         before = readl(adapter->hw.hw_addr + R);                              \
1211         writel((W & M), (adapter->hw.hw_addr + R));                           \
1212         val = readl(adapter->hw.hw_addr + R);                                 \
1213         if ((W & M) != (val & M)) {                                           \
1214                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "  \
1215                       "expected 0x%08X\n", R, (val & M), (W & M));        \
1216                 *data = R;                                                    \
1217                 writel(before, (adapter->hw.hw_addr + R));                    \
1218                 return 1;                                                     \
1219         }                                                                     \
1220         writel(before, (adapter->hw.hw_addr + R));                            \
1221 }
1222
1223 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1224 {
1225         struct ixgbe_reg_test *test;
1226         u32 value, before, after;
1227         u32 i, toggle;
1228
1229         if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1230                 toggle = 0x7FFFF30F;
1231                 test = reg_test_82599;
1232         } else {
1233                 toggle = 0x7FFFF3FF;
1234                 test = reg_test_82598;
1235         }
1236
1237         /*
1238          * Because the status register is such a special case,
1239          * we handle it separately from the rest of the register
1240          * tests.  Some bits are read-only, some toggle, and some
1241          * are writeable on newer MACs.
1242          */
1243         before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1244         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1245         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1246         after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1247         if (value != after) {
1248                 e_err(drv, "failed STATUS register test got: 0x%08X "
1249                       "expected: 0x%08X\n", after, value);
1250                 *data = 1;
1251                 return 1;
1252         }
1253         /* restore previous status */
1254         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1255
1256         /*
1257          * Perform the remainder of the register test, looping through
1258          * the test table until we either fail or reach the null entry.
1259          */
1260         while (test->reg) {
1261                 for (i = 0; i < test->array_len; i++) {
1262                         switch (test->test_type) {
1263                         case PATTERN_TEST:
1264                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1265                                                 test->mask,
1266                                                 test->write);
1267                                 break;
1268                         case SET_READ_TEST:
1269                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1270                                                 test->mask,
1271                                                 test->write);
1272                                 break;
1273                         case WRITE_NO_TEST:
1274                                 writel(test->write,
1275                                        (adapter->hw.hw_addr + test->reg)
1276                                        + (i * 0x40));
1277                                 break;
1278                         case TABLE32_TEST:
1279                                 REG_PATTERN_TEST(test->reg + (i * 4),
1280                                                 test->mask,
1281                                                 test->write);
1282                                 break;
1283                         case TABLE64_TEST_LO:
1284                                 REG_PATTERN_TEST(test->reg + (i * 8),
1285                                                 test->mask,
1286                                                 test->write);
1287                                 break;
1288                         case TABLE64_TEST_HI:
1289                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1290                                                 test->mask,
1291                                                 test->write);
1292                                 break;
1293                         }
1294                 }
1295                 test++;
1296         }
1297
1298         *data = 0;
1299         return 0;
1300 }
1301
1302 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1303 {
1304         struct ixgbe_hw *hw = &adapter->hw;
1305         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1306                 *data = 1;
1307         else
1308                 *data = 0;
1309         return *data;
1310 }
1311
1312 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1313 {
1314         struct net_device *netdev = (struct net_device *) data;
1315         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1316
1317         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1318
1319         return IRQ_HANDLED;
1320 }
1321
1322 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1323 {
1324         struct net_device *netdev = adapter->netdev;
1325         u32 mask, i = 0, shared_int = true;
1326         u32 irq = adapter->pdev->irq;
1327
1328         *data = 0;
1329
1330         /* Hook up test interrupt handler just for this test */
1331         if (adapter->msix_entries) {
1332                 /* NOTE: we don't test MSI-X interrupts here, yet */
1333                 return 0;
1334         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1335                 shared_int = false;
1336                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1337                                 netdev)) {
1338                         *data = 1;
1339                         return -1;
1340                 }
1341         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1342                                 netdev->name, netdev)) {
1343                 shared_int = false;
1344         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1345                                netdev->name, netdev)) {
1346                 *data = 1;
1347                 return -1;
1348         }
1349         e_info(hw, "testing %s interrupt\n", shared_int ?
1350                "shared" : "unshared");
1351
1352         /* Disable all the interrupts */
1353         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1354         msleep(10);
1355
1356         /* Test each interrupt */
1357         for (; i < 10; i++) {
1358                 /* Interrupt to test */
1359                 mask = 1 << i;
1360
1361                 if (!shared_int) {
1362                         /*
1363                          * Disable the interrupts to be reported in
1364                          * the cause register and then force the same
1365                          * interrupt and see if one gets posted.  If
1366                          * an interrupt was posted to the bus, the
1367                          * test failed.
1368                          */
1369                         adapter->test_icr = 0;
1370                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1371                                         ~mask & 0x00007FFF);
1372                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1373                                         ~mask & 0x00007FFF);
1374                         msleep(10);
1375
1376                         if (adapter->test_icr & mask) {
1377                                 *data = 3;
1378                                 break;
1379                         }
1380                 }
1381
1382                 /*
1383                  * Enable the interrupt to be reported in the cause
1384                  * register and then force the same interrupt and see
1385                  * if one gets posted.  If an interrupt was not posted
1386                  * to the bus, the test failed.
1387                  */
1388                 adapter->test_icr = 0;
1389                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1390                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1391                 msleep(10);
1392
1393                 if (!(adapter->test_icr &mask)) {
1394                         *data = 4;
1395                         break;
1396                 }
1397
1398                 if (!shared_int) {
1399                         /*
1400                          * Disable the other interrupts to be reported in
1401                          * the cause register and then force the other
1402                          * interrupts and see if any get posted.  If
1403                          * an interrupt was posted to the bus, the
1404                          * test failed.
1405                          */
1406                         adapter->test_icr = 0;
1407                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1408                                         ~mask & 0x00007FFF);
1409                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1410                                         ~mask & 0x00007FFF);
1411                         msleep(10);
1412
1413                         if (adapter->test_icr) {
1414                                 *data = 5;
1415                                 break;
1416                         }
1417                 }
1418         }
1419
1420         /* Disable all the interrupts */
1421         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1422         msleep(10);
1423
1424         /* Unhook test interrupt handler */
1425         free_irq(irq, netdev);
1426
1427         return *data;
1428 }
1429
1430 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1431 {
1432         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1433         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1434         struct ixgbe_hw *hw = &adapter->hw;
1435         u32 reg_ctl;
1436
1437         /* shut down the DMA engines now so they can be reinitialized later */
1438
1439         /* first Rx */
1440         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1441         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1442         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1443         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rx_ring->reg_idx));
1444         reg_ctl &= ~IXGBE_RXDCTL_ENABLE;
1445         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rx_ring->reg_idx), reg_ctl);
1446
1447         /* now Tx */
1448         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1449         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1450         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1451
1452         if (hw->mac.type == ixgbe_mac_82599EB) {
1453                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1454                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1455                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1456         }
1457
1458         ixgbe_reset(adapter);
1459
1460         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1461         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1462 }
1463
1464 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1465 {
1466         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1467         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1468         u32 rctl, reg_data;
1469         int ret_val;
1470         int err;
1471
1472         /* Setup Tx descriptor ring and Tx buffers */
1473         tx_ring->count = IXGBE_DEFAULT_TXD;
1474         tx_ring->queue_index = 0;
1475         tx_ring->dev = &adapter->pdev->dev;
1476         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1477         tx_ring->numa_node = adapter->node;
1478
1479         err = ixgbe_setup_tx_resources(tx_ring);
1480         if (err)
1481                 return 1;
1482
1483         if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1484                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1485                 reg_data |= IXGBE_DMATXCTL_TE;
1486                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1487         }
1488
1489         ixgbe_configure_tx_ring(adapter, tx_ring);
1490
1491         /* Setup Rx Descriptor ring and Rx buffers */
1492         rx_ring->count = IXGBE_DEFAULT_RXD;
1493         rx_ring->queue_index = 0;
1494         rx_ring->dev = &adapter->pdev->dev;
1495         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1496         rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048;
1497         rx_ring->numa_node = adapter->node;
1498
1499         err = ixgbe_setup_rx_resources(rx_ring);
1500         if (err) {
1501                 ret_val = 4;
1502                 goto err_nomem;
1503         }
1504
1505         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1506         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1507
1508         ixgbe_configure_rx_ring(adapter, rx_ring);
1509
1510         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1511         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1512
1513         return 0;
1514
1515 err_nomem:
1516         ixgbe_free_desc_rings(adapter);
1517         return ret_val;
1518 }
1519
1520 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1521 {
1522         struct ixgbe_hw *hw = &adapter->hw;
1523         u32 reg_data;
1524
1525         /* right now we only support MAC loopback in the driver */
1526         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1527         /* Setup MAC loopback */
1528         reg_data |= IXGBE_HLREG0_LPBK;
1529         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1530
1531         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1532         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1533         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_data);
1534
1535         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_AUTOC);
1536         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1537         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1538         IXGBE_WRITE_REG(&adapter->hw, IXGBE_AUTOC, reg_data);
1539         IXGBE_WRITE_FLUSH(&adapter->hw);
1540         msleep(10);
1541
1542         /* Disable Atlas Tx lanes; re-enabled in reset path */
1543         if (hw->mac.type == ixgbe_mac_82598EB) {
1544                 u8 atlas;
1545
1546                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1547                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1548                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1549
1550                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1551                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1552                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1553
1554                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1555                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1556                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1557
1558                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1559                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1560                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1561         }
1562
1563         return 0;
1564 }
1565
1566 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1567 {
1568         u32 reg_data;
1569
1570         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1571         reg_data &= ~IXGBE_HLREG0_LPBK;
1572         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1573 }
1574
1575 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1576                                       unsigned int frame_size)
1577 {
1578         memset(skb->data, 0xFF, frame_size);
1579         frame_size &= ~1;
1580         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1581         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1582         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1583 }
1584
1585 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1586                                     unsigned int frame_size)
1587 {
1588         frame_size &= ~1;
1589         if (*(skb->data + 3) == 0xFF) {
1590                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1591                     (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1592                         return 0;
1593                 }
1594         }
1595         return 13;
1596 }
1597
1598 static u16 ixgbe_clean_test_rings(struct ixgbe_adapter *adapter,
1599                                   struct ixgbe_ring *rx_ring,
1600                                   struct ixgbe_ring *tx_ring,
1601                                   unsigned int size)
1602 {
1603         union ixgbe_adv_rx_desc *rx_desc;
1604         struct ixgbe_rx_buffer *rx_buffer_info;
1605         struct ixgbe_tx_buffer *tx_buffer_info;
1606         const int bufsz = rx_ring->rx_buf_len;
1607         u32 staterr;
1608         u16 rx_ntc, tx_ntc, count = 0;
1609
1610         /* initialize next to clean and descriptor values */
1611         rx_ntc = rx_ring->next_to_clean;
1612         tx_ntc = tx_ring->next_to_clean;
1613         rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1614         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1615
1616         while (staterr & IXGBE_RXD_STAT_DD) {
1617                 /* check Rx buffer */
1618                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1619
1620                 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1621                 dma_unmap_single(rx_ring->dev,
1622                                  rx_buffer_info->dma,
1623                                  bufsz,
1624                                  DMA_FROM_DEVICE);
1625                 rx_buffer_info->dma = 0;
1626
1627                 /* verify contents of skb */
1628                 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1629                         count++;
1630
1631                 /* unmap buffer on Tx side */
1632                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1633                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1634
1635                 /* increment Rx/Tx next to clean counters */
1636                 rx_ntc++;
1637                 if (rx_ntc == rx_ring->count)
1638                         rx_ntc = 0;
1639                 tx_ntc++;
1640                 if (tx_ntc == tx_ring->count)
1641                         tx_ntc = 0;
1642
1643                 /* fetch next descriptor */
1644                 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1645                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1646         }
1647
1648         /* re-map buffers to ring, store next to clean values */
1649         ixgbe_alloc_rx_buffers(adapter, rx_ring, count);
1650         rx_ring->next_to_clean = rx_ntc;
1651         tx_ring->next_to_clean = tx_ntc;
1652
1653         return count;
1654 }
1655
1656 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1657 {
1658         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1659         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1660         int i, j, lc, good_cnt, ret_val = 0;
1661         unsigned int size = 1024;
1662         netdev_tx_t tx_ret_val;
1663         struct sk_buff *skb;
1664
1665         /* allocate test skb */
1666         skb = alloc_skb(size, GFP_KERNEL);
1667         if (!skb)
1668                 return 11;
1669
1670         /* place data into test skb */
1671         ixgbe_create_lbtest_frame(skb, size);
1672         skb_put(skb, size);
1673
1674         /*
1675          * Calculate the loop count based on the largest descriptor ring
1676          * The idea is to wrap the largest ring a number of times using 64
1677          * send/receive pairs during each loop
1678          */
1679
1680         if (rx_ring->count <= tx_ring->count)
1681                 lc = ((tx_ring->count / 64) * 2) + 1;
1682         else
1683                 lc = ((rx_ring->count / 64) * 2) + 1;
1684
1685         for (j = 0; j <= lc; j++) {
1686                 /* reset count of good packets */
1687                 good_cnt = 0;
1688
1689                 /* place 64 packets on the transmit queue*/
1690                 for (i = 0; i < 64; i++) {
1691                         skb_get(skb);
1692                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1693                                                            adapter->netdev,
1694                                                            adapter,
1695                                                            tx_ring);
1696                         if (tx_ret_val == NETDEV_TX_OK)
1697                                 good_cnt++;
1698                 }
1699
1700                 if (good_cnt != 64) {
1701                         ret_val = 12;
1702                         break;
1703                 }
1704
1705                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1706                 msleep(200);
1707
1708                 good_cnt = ixgbe_clean_test_rings(adapter, rx_ring,
1709                                                   tx_ring, size);
1710                 if (good_cnt != 64) {
1711                         ret_val = 13;
1712                         break;
1713                 }
1714         }
1715
1716         /* free the original skb */
1717         kfree_skb(skb);
1718
1719         return ret_val;
1720 }
1721
1722 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1723 {
1724         *data = ixgbe_setup_desc_rings(adapter);
1725         if (*data)
1726                 goto out;
1727         *data = ixgbe_setup_loopback_test(adapter);
1728         if (*data)
1729                 goto err_loopback;
1730         *data = ixgbe_run_loopback_test(adapter);
1731         ixgbe_loopback_cleanup(adapter);
1732
1733 err_loopback:
1734         ixgbe_free_desc_rings(adapter);
1735 out:
1736         return *data;
1737 }
1738
1739 static void ixgbe_diag_test(struct net_device *netdev,
1740                             struct ethtool_test *eth_test, u64 *data)
1741 {
1742         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1743         bool if_running = netif_running(netdev);
1744
1745         set_bit(__IXGBE_TESTING, &adapter->state);
1746         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1747                 /* Offline tests */
1748
1749                 e_info(hw, "offline testing starting\n");
1750
1751                 /* Link test performed before hardware reset so autoneg doesn't
1752                  * interfere with test result */
1753                 if (ixgbe_link_test(adapter, &data[4]))
1754                         eth_test->flags |= ETH_TEST_FL_FAILED;
1755
1756                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1757                         int i;
1758                         for (i = 0; i < adapter->num_vfs; i++) {
1759                                 if (adapter->vfinfo[i].clear_to_send) {
1760                                         netdev_warn(netdev, "%s",
1761                                                     "offline diagnostic is not "
1762                                                     "supported when VFs are "
1763                                                     "present\n");
1764                                         data[0] = 1;
1765                                         data[1] = 1;
1766                                         data[2] = 1;
1767                                         data[3] = 1;
1768                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1769                                         clear_bit(__IXGBE_TESTING,
1770                                                   &adapter->state);
1771                                         goto skip_ol_tests;
1772                                 }
1773                         }
1774                 }
1775
1776                 if (if_running)
1777                         /* indicate we're in test mode */
1778                         dev_close(netdev);
1779                 else
1780                         ixgbe_reset(adapter);
1781
1782                 e_info(hw, "register testing starting\n");
1783                 if (ixgbe_reg_test(adapter, &data[0]))
1784                         eth_test->flags |= ETH_TEST_FL_FAILED;
1785
1786                 ixgbe_reset(adapter);
1787                 e_info(hw, "eeprom testing starting\n");
1788                 if (ixgbe_eeprom_test(adapter, &data[1]))
1789                         eth_test->flags |= ETH_TEST_FL_FAILED;
1790
1791                 ixgbe_reset(adapter);
1792                 e_info(hw, "interrupt testing starting\n");
1793                 if (ixgbe_intr_test(adapter, &data[2]))
1794                         eth_test->flags |= ETH_TEST_FL_FAILED;
1795
1796                 /* If SRIOV or VMDq is enabled then skip MAC
1797                  * loopback diagnostic. */
1798                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1799                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1800                         e_info(hw, "Skip MAC loopback diagnostic in VT "
1801                                "mode\n");
1802                         data[3] = 0;
1803                         goto skip_loopback;
1804                 }
1805
1806                 ixgbe_reset(adapter);
1807                 e_info(hw, "loopback testing starting\n");
1808                 if (ixgbe_loopback_test(adapter, &data[3]))
1809                         eth_test->flags |= ETH_TEST_FL_FAILED;
1810
1811 skip_loopback:
1812                 ixgbe_reset(adapter);
1813
1814                 clear_bit(__IXGBE_TESTING, &adapter->state);
1815                 if (if_running)
1816                         dev_open(netdev);
1817         } else {
1818                 e_info(hw, "online testing starting\n");
1819                 /* Online tests */
1820                 if (ixgbe_link_test(adapter, &data[4]))
1821                         eth_test->flags |= ETH_TEST_FL_FAILED;
1822
1823                 /* Online tests aren't run; pass by default */
1824                 data[0] = 0;
1825                 data[1] = 0;
1826                 data[2] = 0;
1827                 data[3] = 0;
1828
1829                 clear_bit(__IXGBE_TESTING, &adapter->state);
1830         }
1831 skip_ol_tests:
1832         msleep_interruptible(4 * 1000);
1833 }
1834
1835 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1836                                struct ethtool_wolinfo *wol)
1837 {
1838         struct ixgbe_hw *hw = &adapter->hw;
1839         int retval = 1;
1840
1841         switch(hw->device_id) {
1842         case IXGBE_DEV_ID_82599_KX4:
1843                 retval = 0;
1844                 break;
1845         default:
1846                 wol->supported = 0;
1847         }
1848
1849         return retval;
1850 }
1851
1852 static void ixgbe_get_wol(struct net_device *netdev,
1853                           struct ethtool_wolinfo *wol)
1854 {
1855         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1856
1857         wol->supported = WAKE_UCAST | WAKE_MCAST |
1858                          WAKE_BCAST | WAKE_MAGIC;
1859         wol->wolopts = 0;
1860
1861         if (ixgbe_wol_exclusion(adapter, wol) ||
1862             !device_can_wakeup(&adapter->pdev->dev))
1863                 return;
1864
1865         if (adapter->wol & IXGBE_WUFC_EX)
1866                 wol->wolopts |= WAKE_UCAST;
1867         if (adapter->wol & IXGBE_WUFC_MC)
1868                 wol->wolopts |= WAKE_MCAST;
1869         if (adapter->wol & IXGBE_WUFC_BC)
1870                 wol->wolopts |= WAKE_BCAST;
1871         if (adapter->wol & IXGBE_WUFC_MAG)
1872                 wol->wolopts |= WAKE_MAGIC;
1873 }
1874
1875 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1876 {
1877         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1878
1879         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1880                 return -EOPNOTSUPP;
1881
1882         if (ixgbe_wol_exclusion(adapter, wol))
1883                 return wol->wolopts ? -EOPNOTSUPP : 0;
1884
1885         adapter->wol = 0;
1886
1887         if (wol->wolopts & WAKE_UCAST)
1888                 adapter->wol |= IXGBE_WUFC_EX;
1889         if (wol->wolopts & WAKE_MCAST)
1890                 adapter->wol |= IXGBE_WUFC_MC;
1891         if (wol->wolopts & WAKE_BCAST)
1892                 adapter->wol |= IXGBE_WUFC_BC;
1893         if (wol->wolopts & WAKE_MAGIC)
1894                 adapter->wol |= IXGBE_WUFC_MAG;
1895
1896         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1897
1898         return 0;
1899 }
1900
1901 static int ixgbe_nway_reset(struct net_device *netdev)
1902 {
1903         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1904
1905         if (netif_running(netdev))
1906                 ixgbe_reinit_locked(adapter);
1907
1908         return 0;
1909 }
1910
1911 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
1912 {
1913         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1914         struct ixgbe_hw *hw = &adapter->hw;
1915         u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1916         u32 i;
1917
1918         if (!data || data > 300)
1919                 data = 300;
1920
1921         for (i = 0; i < (data * 1000); i += 400) {
1922                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
1923                 msleep_interruptible(200);
1924                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
1925                 msleep_interruptible(200);
1926         }
1927
1928         /* Restore LED settings */
1929         IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
1930
1931         return 0;
1932 }
1933
1934 static int ixgbe_get_coalesce(struct net_device *netdev,
1935                               struct ethtool_coalesce *ec)
1936 {
1937         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1938
1939         ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0]->work_limit;
1940
1941         /* only valid if in constant ITR mode */
1942         switch (adapter->rx_itr_setting) {
1943         case 0:
1944                 /* throttling disabled */
1945                 ec->rx_coalesce_usecs = 0;
1946                 break;
1947         case 1:
1948                 /* dynamic ITR mode */
1949                 ec->rx_coalesce_usecs = 1;
1950                 break;
1951         default:
1952                 /* fixed interrupt rate mode */
1953                 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
1954                 break;
1955         }
1956
1957         /* if in mixed tx/rx queues per vector mode, report only rx settings */
1958         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count)
1959                 return 0;
1960
1961         /* only valid if in constant ITR mode */
1962         switch (adapter->tx_itr_setting) {
1963         case 0:
1964                 /* throttling disabled */
1965                 ec->tx_coalesce_usecs = 0;
1966                 break;
1967         case 1:
1968                 /* dynamic ITR mode */
1969                 ec->tx_coalesce_usecs = 1;
1970                 break;
1971         default:
1972                 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
1973                 break;
1974         }
1975
1976         return 0;
1977 }
1978
1979 static int ixgbe_set_coalesce(struct net_device *netdev,
1980                               struct ethtool_coalesce *ec)
1981 {
1982         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1983         struct ixgbe_q_vector *q_vector;
1984         int i;
1985         bool need_reset = false;
1986
1987         /* don't accept tx specific changes if we've got mixed RxTx vectors */
1988         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count
1989            && ec->tx_coalesce_usecs)
1990                 return -EINVAL;
1991
1992         if (ec->tx_max_coalesced_frames_irq)
1993                 adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
1994
1995         if (ec->rx_coalesce_usecs > 1) {
1996                 u32 max_int;
1997                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
1998                         max_int = IXGBE_MAX_RSC_INT_RATE;
1999                 else
2000                         max_int = IXGBE_MAX_INT_RATE;
2001
2002                 /* check the limits */
2003                 if ((1000000/ec->rx_coalesce_usecs > max_int) ||
2004                     (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2005                         return -EINVAL;
2006
2007                 /* store the value in ints/second */
2008                 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2009
2010                 /* static value of interrupt rate */
2011                 adapter->rx_itr_setting = adapter->rx_eitr_param;
2012                 /* clear the lower bit as its used for dynamic state */
2013                 adapter->rx_itr_setting &= ~1;
2014         } else if (ec->rx_coalesce_usecs == 1) {
2015                 /* 1 means dynamic mode */
2016                 adapter->rx_eitr_param = 20000;
2017                 adapter->rx_itr_setting = 1;
2018         } else {
2019                 /*
2020                  * any other value means disable eitr, which is best
2021                  * served by setting the interrupt rate very high
2022                  */
2023                 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2024                 adapter->rx_itr_setting = 0;
2025
2026                 /*
2027                  * if hardware RSC is enabled, disable it when
2028                  * setting low latency mode, to avoid errata, assuming
2029                  * that when the user set low latency mode they want
2030                  * it at the cost of anything else
2031                  */
2032                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2033                         adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2034                         if (netdev->features & NETIF_F_LRO) {
2035                                 netdev->features &= ~NETIF_F_LRO;
2036                                 e_info(probe, "rx-usecs set to 0, "
2037                                        "disabling RSC\n");
2038                         }
2039                         need_reset = true;
2040                 }
2041         }
2042
2043         if (ec->tx_coalesce_usecs > 1) {
2044                 /*
2045                  * don't have to worry about max_int as above because
2046                  * tx vectors don't do hardware RSC (an rx function)
2047                  */
2048                 /* check the limits */
2049                 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2050                     (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2051                         return -EINVAL;
2052
2053                 /* store the value in ints/second */
2054                 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs;
2055
2056                 /* static value of interrupt rate */
2057                 adapter->tx_itr_setting = adapter->tx_eitr_param;
2058
2059                 /* clear the lower bit as its used for dynamic state */
2060                 adapter->tx_itr_setting &= ~1;
2061         } else if (ec->tx_coalesce_usecs == 1) {
2062                 /* 1 means dynamic mode */
2063                 adapter->tx_eitr_param = 10000;
2064                 adapter->tx_itr_setting = 1;
2065         } else {
2066                 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2067                 adapter->tx_itr_setting = 0;
2068         }
2069
2070         /* MSI/MSIx Interrupt Mode */
2071         if (adapter->flags &
2072             (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2073                 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2074                 for (i = 0; i < num_vectors; i++) {
2075                         q_vector = adapter->q_vector[i];
2076                         if (q_vector->txr_count && !q_vector->rxr_count)
2077                                 /* tx only */
2078                                 q_vector->eitr = adapter->tx_eitr_param;
2079                         else
2080                                 /* rx only or mixed */
2081                                 q_vector->eitr = adapter->rx_eitr_param;
2082                         ixgbe_write_eitr(q_vector);
2083                 }
2084         /* Legacy Interrupt Mode */
2085         } else {
2086                 q_vector = adapter->q_vector[0];
2087                 q_vector->eitr = adapter->rx_eitr_param;
2088                 ixgbe_write_eitr(q_vector);
2089         }
2090
2091         /*
2092          * do reset here at the end to make sure EITR==0 case is handled
2093          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2094          * also locks in RSC enable/disable which requires reset
2095          */
2096         if (need_reset) {
2097                 if (netif_running(netdev))
2098                         ixgbe_reinit_locked(adapter);
2099                 else
2100                         ixgbe_reset(adapter);
2101         }
2102
2103         return 0;
2104 }
2105
2106 static int ixgbe_set_flags(struct net_device *netdev, u32 data)
2107 {
2108         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2109         bool need_reset = false;
2110         int rc;
2111
2112 #ifdef CONFIG_IXGBE_DCB
2113         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
2114             !(data & ETH_FLAG_RXVLAN))
2115                 return -EINVAL;
2116 #endif
2117
2118         need_reset = (data & ETH_FLAG_RXVLAN) !=
2119                      (netdev->features & NETIF_F_HW_VLAN_RX);
2120
2121         rc = ethtool_op_set_flags(netdev, data, ETH_FLAG_LRO |
2122                                         ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN);
2123         if (rc)
2124                 return rc;
2125
2126         /* if state changes we need to update adapter->flags and reset */
2127         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) {
2128                 /*
2129                  * cast both to bool and verify if they are set the same
2130                  * but only enable RSC if itr is non-zero, as
2131                  * itr=0 and RSC are mutually exclusive
2132                  */
2133                 if (((!!(data & ETH_FLAG_LRO)) !=
2134                      (!!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) &&
2135                     adapter->rx_itr_setting) {
2136                         adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
2137                         switch (adapter->hw.mac.type) {
2138                         case ixgbe_mac_82599EB:
2139                                 need_reset = true;
2140                                 break;
2141                         default:
2142                                 break;
2143                         }
2144                 } else if (!adapter->rx_itr_setting) {
2145                         netdev->features &= ~NETIF_F_LRO;
2146                         if (data & ETH_FLAG_LRO)
2147                                 e_info(probe, "rx-usecs set to 0, "
2148                                        "LRO/RSC cannot be enabled.\n");
2149                 }
2150         }
2151
2152         /*
2153          * Check if Flow Director n-tuple support was enabled or disabled.  If
2154          * the state changed, we need to reset.
2155          */
2156         if ((adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) &&
2157             (!(data & ETH_FLAG_NTUPLE))) {
2158                 /* turn off Flow Director perfect, set hash and reset */
2159                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2160                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2161                 need_reset = true;
2162         } else if ((!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) &&
2163                    (data & ETH_FLAG_NTUPLE)) {
2164                 /* turn off Flow Director hash, enable perfect and reset */
2165                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2166                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2167                 need_reset = true;
2168         } else {
2169                 /* no state change */
2170         }
2171
2172         if (need_reset) {
2173                 if (netif_running(netdev))
2174                         ixgbe_reinit_locked(adapter);
2175                 else
2176                         ixgbe_reset(adapter);
2177         }
2178
2179         return 0;
2180 }
2181
2182 static int ixgbe_set_rx_ntuple(struct net_device *dev,
2183                                struct ethtool_rx_ntuple *cmd)
2184 {
2185         struct ixgbe_adapter *adapter = netdev_priv(dev);
2186         struct ethtool_rx_ntuple_flow_spec fs = cmd->fs;
2187         struct ixgbe_atr_input input_struct;
2188         struct ixgbe_atr_input_masks input_masks;
2189         int target_queue;
2190
2191         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
2192                 return -EOPNOTSUPP;
2193
2194         /*
2195          * Don't allow programming if the action is a queue greater than
2196          * the number of online Tx queues.
2197          */
2198         if ((fs.action >= adapter->num_tx_queues) ||
2199             (fs.action < ETHTOOL_RXNTUPLE_ACTION_DROP))
2200                 return -EINVAL;
2201
2202         memset(&input_struct, 0, sizeof(struct ixgbe_atr_input));
2203         memset(&input_masks, 0, sizeof(struct ixgbe_atr_input_masks));
2204
2205         input_masks.src_ip_mask = fs.m_u.tcp_ip4_spec.ip4src;
2206         input_masks.dst_ip_mask = fs.m_u.tcp_ip4_spec.ip4dst;
2207         input_masks.src_port_mask = fs.m_u.tcp_ip4_spec.psrc;
2208         input_masks.dst_port_mask = fs.m_u.tcp_ip4_spec.pdst;
2209         input_masks.vlan_id_mask = fs.vlan_tag_mask;
2210         /* only use the lowest 2 bytes for flex bytes */
2211         input_masks.data_mask = (fs.data_mask & 0xffff);
2212
2213         switch (fs.flow_type) {
2214         case TCP_V4_FLOW:
2215                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_TCP);
2216                 break;
2217         case UDP_V4_FLOW:
2218                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_UDP);
2219                 break;
2220         case SCTP_V4_FLOW:
2221                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_SCTP);
2222                 break;
2223         default:
2224                 return -1;
2225         }
2226
2227         /* Mask bits from the inputs based on user-supplied mask */
2228         ixgbe_atr_set_src_ipv4_82599(&input_struct,
2229                     (fs.h_u.tcp_ip4_spec.ip4src & ~fs.m_u.tcp_ip4_spec.ip4src));
2230         ixgbe_atr_set_dst_ipv4_82599(&input_struct,
2231                     (fs.h_u.tcp_ip4_spec.ip4dst & ~fs.m_u.tcp_ip4_spec.ip4dst));
2232         /* 82599 expects these to be byte-swapped for perfect filtering */
2233         ixgbe_atr_set_src_port_82599(&input_struct,
2234                ((ntohs(fs.h_u.tcp_ip4_spec.psrc)) & ~fs.m_u.tcp_ip4_spec.psrc));
2235         ixgbe_atr_set_dst_port_82599(&input_struct,
2236                ((ntohs(fs.h_u.tcp_ip4_spec.pdst)) & ~fs.m_u.tcp_ip4_spec.pdst));
2237
2238         /* VLAN and Flex bytes are either completely masked or not */
2239         if (!fs.vlan_tag_mask)
2240                 ixgbe_atr_set_vlan_id_82599(&input_struct, fs.vlan_tag);
2241
2242         if (!input_masks.data_mask)
2243                 /* make sure we only use the first 2 bytes of user data */
2244                 ixgbe_atr_set_flex_byte_82599(&input_struct,
2245                                               (fs.data & 0xffff));
2246
2247         /* determine if we need to drop or route the packet */
2248         if (fs.action == ETHTOOL_RXNTUPLE_ACTION_DROP)
2249                 target_queue = MAX_RX_QUEUES - 1;
2250         else
2251                 target_queue = fs.action;
2252
2253         spin_lock(&adapter->fdir_perfect_lock);
2254         ixgbe_fdir_add_perfect_filter_82599(&adapter->hw, &input_struct,
2255                                             &input_masks, 0, target_queue);
2256         spin_unlock(&adapter->fdir_perfect_lock);
2257
2258         return 0;
2259 }
2260
2261 static const struct ethtool_ops ixgbe_ethtool_ops = {
2262         .get_settings           = ixgbe_get_settings,
2263         .set_settings           = ixgbe_set_settings,
2264         .get_drvinfo            = ixgbe_get_drvinfo,
2265         .get_regs_len           = ixgbe_get_regs_len,
2266         .get_regs               = ixgbe_get_regs,
2267         .get_wol                = ixgbe_get_wol,
2268         .set_wol                = ixgbe_set_wol,
2269         .nway_reset             = ixgbe_nway_reset,
2270         .get_link               = ethtool_op_get_link,
2271         .get_eeprom_len         = ixgbe_get_eeprom_len,
2272         .get_eeprom             = ixgbe_get_eeprom,
2273         .get_ringparam          = ixgbe_get_ringparam,
2274         .set_ringparam          = ixgbe_set_ringparam,
2275         .get_pauseparam         = ixgbe_get_pauseparam,
2276         .set_pauseparam         = ixgbe_set_pauseparam,
2277         .get_rx_csum            = ixgbe_get_rx_csum,
2278         .set_rx_csum            = ixgbe_set_rx_csum,
2279         .get_tx_csum            = ixgbe_get_tx_csum,
2280         .set_tx_csum            = ixgbe_set_tx_csum,
2281         .get_sg                 = ethtool_op_get_sg,
2282         .set_sg                 = ethtool_op_set_sg,
2283         .get_msglevel           = ixgbe_get_msglevel,
2284         .set_msglevel           = ixgbe_set_msglevel,
2285         .get_tso                = ethtool_op_get_tso,
2286         .set_tso                = ixgbe_set_tso,
2287         .self_test              = ixgbe_diag_test,
2288         .get_strings            = ixgbe_get_strings,
2289         .phys_id                = ixgbe_phys_id,
2290         .get_sset_count         = ixgbe_get_sset_count,
2291         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2292         .get_coalesce           = ixgbe_get_coalesce,
2293         .set_coalesce           = ixgbe_set_coalesce,
2294         .get_flags              = ethtool_op_get_flags,
2295         .set_flags              = ixgbe_set_flags,
2296         .set_rx_ntuple          = ixgbe_set_rx_ntuple,
2297 };
2298
2299 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2300 {
2301         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2302 }