drivers/net/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2010 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for ixgbe */
  29
  30 #include <linux/types.h>
  31 #include <linux/module.h>
  32 #include <linux/slab.h>
  33 #include <linux/pci.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/uaccess.h>
  38
  39 #include "ixgbe.h"
  40
  41
  42 #define IXGBE_ALL_RAR_ENTRIES 16
  43
  44 enum {NETDEV_STATS, IXGBE_STATS};
  45
  46 struct ixgbe_stats {
  47         char stat_string[ETH_GSTRING_LEN];
  48         int type;
  49         int sizeof_stat;
  50         int stat_offset;
  51 };
  52
  53 #define IXGBE_STAT(m)           IXGBE_STATS, \
  54                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  55                                 offsetof(struct ixgbe_adapter, m)
  56 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  57                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  58                                 offsetof(struct rtnl_link_stats64, m)
  59
  60 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
  61         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  62         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  63         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  64         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  65         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  66         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  67         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  68         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  69         {"lsc_int", IXGBE_STAT(lsc_int)},
  70         {"tx_busy", IXGBE_STAT(tx_busy)},
  71         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  72         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  73         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  74         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  75         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  76         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  77         {"broadcast", IXGBE_STAT(stats.bprc)},
  78         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  79         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  80         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  81         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  82         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  83         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  84         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  85         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  86         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  87         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  88         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  89         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  90         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  91         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  92         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  93         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  94         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
  95         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  96         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
  97         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
  98         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
  99         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 100         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 101         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 102         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 103         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 104         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 105 #ifdef IXGBE_FCOE
 106         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 107         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 108         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 109         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 110         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 111         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 112 #endif /* IXGBE_FCOE */
 113 };
 114
 115 #define IXGBE_QUEUE_STATS_LEN \
 116         ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
 117         ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
 118         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 119 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 120 #define IXGBE_PB_STATS_LEN ( \
 121                  (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
 122                  IXGBE_FLAG_DCB_ENABLED) ? \
 123                  (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 124                   sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 125                   sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 126                   sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 127                   / sizeof(u64) : 0)
 128 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 129                          IXGBE_PB_STATS_LEN + \
 130                          IXGBE_QUEUE_STATS_LEN)
 131
 132 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 133         "Register test  (offline)", "Eeprom test    (offline)",
 134         "Interrupt test (offline)", "Loopback test  (offline)",
 135         "Link test   (on/offline)"
 136 };
 137 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 138
 139 static int ixgbe_get_settings(struct net_device *netdev,
 140                               struct ethtool_cmd *ecmd)
 141 {
 142         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 143         struct ixgbe_hw *hw = &adapter->hw;
 144         u32 link_speed = 0;
 145         bool link_up;
 146
 147         ecmd->supported = SUPPORTED_10000baseT_Full;
 148         ecmd->autoneg = AUTONEG_ENABLE;
 149         ecmd->transceiver = XCVR_EXTERNAL;
 150         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 151             (hw->phy.multispeed_fiber)) {
 152                 ecmd->supported |= (SUPPORTED_1000baseT_Full |
 153                                     SUPPORTED_Autoneg);
 154
 155                 ecmd->advertising = ADVERTISED_Autoneg;
 156                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
 157                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 158                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
 159                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 160                 /*
 161                  * It's possible that phy.autoneg_advertised may not be
 162                  * set yet.  If so display what the default would be -
 163                  * both 1G and 10G supported.
 164                  */
 165                 if (!(ecmd->advertising & (ADVERTISED_1000baseT_Full |
 166                                            ADVERTISED_10000baseT_Full)))
 167                         ecmd->advertising |= (ADVERTISED_10000baseT_Full |
 168                                               ADVERTISED_1000baseT_Full);
 169
 170                 if (hw->phy.media_type == ixgbe_media_type_copper) {
 171                         ecmd->supported |= SUPPORTED_TP;
 172                         ecmd->advertising |= ADVERTISED_TP;
 173                         ecmd->port = PORT_TP;
 174                 } else {
 175                         ecmd->supported |= SUPPORTED_FIBRE;
 176                         ecmd->advertising |= ADVERTISED_FIBRE;
 177                         ecmd->port = PORT_FIBRE;
 178                 }
 179         } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
 180                 /* Set as FIBRE until SERDES defined in kernel */
 181                 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
 182                         ecmd->supported = (SUPPORTED_1000baseT_Full |
 183                                            SUPPORTED_FIBRE);
 184                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 185                                              ADVERTISED_FIBRE);
 186                         ecmd->port = PORT_FIBRE;
 187                         ecmd->autoneg = AUTONEG_DISABLE;
 188                 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE) ||
 189                            (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
 190                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 191                                             SUPPORTED_Autoneg |
 192                                             SUPPORTED_FIBRE);
 193                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 194                                              ADVERTISED_1000baseT_Full |
 195                                              ADVERTISED_Autoneg |
 196                                              ADVERTISED_FIBRE);
 197                         ecmd->port = PORT_FIBRE;
 198                 } else {
 199                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 200                                             SUPPORTED_FIBRE);
 201                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 202                                              ADVERTISED_1000baseT_Full |
 203                                              ADVERTISED_FIBRE);
 204                         ecmd->port = PORT_FIBRE;
 205                 }
 206         } else {
 207                 ecmd->supported |= SUPPORTED_FIBRE;
 208                 ecmd->advertising = (ADVERTISED_10000baseT_Full |
 209                                      ADVERTISED_FIBRE);
 210                 ecmd->port = PORT_FIBRE;
 211                 ecmd->autoneg = AUTONEG_DISABLE;
 212         }
 213
 214         /* Get PHY type */
 215         switch (adapter->hw.phy.type) {
 216         case ixgbe_phy_tn:
 217         case ixgbe_phy_aq:
 218         case ixgbe_phy_cu_unknown:
 219                 /* Copper 10G-BASET */
 220                 ecmd->port = PORT_TP;
 221                 break;
 222         case ixgbe_phy_qt:
 223                 ecmd->port = PORT_FIBRE;
 224                 break;
 225         case ixgbe_phy_nl:
 226         case ixgbe_phy_sfp_passive_tyco:
 227         case ixgbe_phy_sfp_passive_unknown:
 228         case ixgbe_phy_sfp_ftl:
 229         case ixgbe_phy_sfp_avago:
 230         case ixgbe_phy_sfp_intel:
 231         case ixgbe_phy_sfp_unknown:
 232                 switch (adapter->hw.phy.sfp_type) {
 233                 /* SFP+ devices, further checking needed */
 234                 case ixgbe_sfp_type_da_cu:
 235                 case ixgbe_sfp_type_da_cu_core0:
 236                 case ixgbe_sfp_type_da_cu_core1:
 237                         ecmd->port = PORT_DA;
 238                         break;
 239                 case ixgbe_sfp_type_sr:
 240                 case ixgbe_sfp_type_lr:
 241                 case ixgbe_sfp_type_srlr_core0:
 242                 case ixgbe_sfp_type_srlr_core1:
 243                         ecmd->port = PORT_FIBRE;
 244                         break;
 245                 case ixgbe_sfp_type_not_present:
 246                         ecmd->port = PORT_NONE;
 247                         break;
 248                 case ixgbe_sfp_type_1g_cu_core0:
 249                 case ixgbe_sfp_type_1g_cu_core1:
 250                         ecmd->port = PORT_TP;
 251                         ecmd->supported = SUPPORTED_TP;
 252                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 253                                              ADVERTISED_TP);
 254                         break;
 255                 case ixgbe_sfp_type_unknown:
 256                 default:
 257                         ecmd->port = PORT_OTHER;
 258                         break;
 259                 }
 260                 break;
 261         case ixgbe_phy_xaui:
 262                 ecmd->port = PORT_NONE;
 263                 break;
 264         case ixgbe_phy_unknown:
 265         case ixgbe_phy_generic:
 266         case ixgbe_phy_sfp_unsupported:
 267         default:
 268                 ecmd->port = PORT_OTHER;
 269                 break;
 270         }
 271
 272         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 273         if (link_up) {
 274                 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
 275                                SPEED_10000 : SPEED_1000;
 276                 ecmd->duplex = DUPLEX_FULL;
 277         } else {
 278                 ecmd->speed = -1;
 279                 ecmd->duplex = -1;
 280         }
 281
 282         return 0;
 283 }
 284
 285 static int ixgbe_set_settings(struct net_device *netdev,
 286                               struct ethtool_cmd *ecmd)
 287 {
 288         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 289         struct ixgbe_hw *hw = &adapter->hw;
 290         u32 advertised, old;
 291         s32 err = 0;
 292
 293         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 294             (hw->phy.multispeed_fiber)) {
 295                 /* 10000/copper and 1000/copper must autoneg
 296                  * this function does not support any duplex forcing, but can
 297                  * limit the advertising of the adapter to only 10000 or 1000 */
 298                 if (ecmd->autoneg == AUTONEG_DISABLE)
 299                         return -EINVAL;
 300
 301                 old = hw->phy.autoneg_advertised;
 302                 advertised = 0;
 303                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 304                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 305
 306                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 307                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 308
 309                 if (old == advertised)
 310                         return err;
 311                 /* this sets the link speed and restarts auto-neg */
 312                 hw->mac.autotry_restart = true;
 313                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
 314                 if (err) {
 315                         e_info(probe, "setup link failed with code %d\n", err);
 316                         hw->mac.ops.setup_link(hw, old, true, true);
 317                 }
 318         } else {
 319                 /* in this case we currently only support 10Gb/FULL */
 320                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 321                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 322                     (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 323                         return -EINVAL;
 324         }
 325
 326         return err;
 327 }
 328
 329 static void ixgbe_get_pauseparam(struct net_device *netdev,
 330                                  struct ethtool_pauseparam *pause)
 331 {
 332         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 333         struct ixgbe_hw *hw = &adapter->hw;
 334
 335         /*
 336          * Flow Control Autoneg isn't on if
 337          *  - we didn't ask for it OR
 338          *  - it failed, we know this by tx & rx being off
 339          */
 340         if (hw->fc.disable_fc_autoneg ||
 341             (hw->fc.current_mode == ixgbe_fc_none))
 342                 pause->autoneg = 0;
 343         else
 344                 pause->autoneg = 1;
 345
 346         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 347                 pause->rx_pause = 1;
 348         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 349                 pause->tx_pause = 1;
 350         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 351                 pause->rx_pause = 1;
 352                 pause->tx_pause = 1;
 353 #ifdef CONFIG_DCB
 354         } else if (hw->fc.current_mode == ixgbe_fc_pfc) {
 355                 pause->rx_pause = 0;
 356                 pause->tx_pause = 0;
 357 #endif
 358         }
 359 }
 360
 361 static int ixgbe_set_pauseparam(struct net_device *netdev,
 362                                 struct ethtool_pauseparam *pause)
 363 {
 364         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 365         struct ixgbe_hw *hw = &adapter->hw;
 366         struct ixgbe_fc_info fc;
 367
 368 #ifdef CONFIG_DCB
 369         if (adapter->dcb_cfg.pfc_mode_enable ||
 370                 ((hw->mac.type == ixgbe_mac_82598EB) &&
 371                 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
 372                 return -EINVAL;
 373
 374 #endif
 375         fc = hw->fc;
 376
 377         if (pause->autoneg != AUTONEG_ENABLE)
 378                 fc.disable_fc_autoneg = true;
 379         else
 380                 fc.disable_fc_autoneg = false;
 381
 382         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 383                 fc.requested_mode = ixgbe_fc_full;
 384         else if (pause->rx_pause && !pause->tx_pause)
 385                 fc.requested_mode = ixgbe_fc_rx_pause;
 386         else if (!pause->rx_pause && pause->tx_pause)
 387                 fc.requested_mode = ixgbe_fc_tx_pause;
 388         else if (!pause->rx_pause && !pause->tx_pause)
 389                 fc.requested_mode = ixgbe_fc_none;
 390         else
 391                 return -EINVAL;
 392
 393 #ifdef CONFIG_DCB
 394         adapter->last_lfc_mode = fc.requested_mode;
 395 #endif
 396
 397         /* if the thing changed then we'll update and use new autoneg */
 398         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 399                 hw->fc = fc;
 400                 if (netif_running(netdev))
 401                         ixgbe_reinit_locked(adapter);
 402                 else
 403                         ixgbe_reset(adapter);
 404         }
 405
 406         return 0;
 407 }
 408
 409 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
 410 {
 411         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 412         return adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED;
 413 }
 414
 415 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
 416 {
 417         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 418         if (data)
 419                 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
 420         else
 421                 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
 422
 423         return 0;
 424 }
 425
 426 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
 427 {
 428         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 429 }
 430
 431 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
 432 {
 433         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 434
 435         if (data) {
 436                 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
 437                 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
 438                         netdev->features |= NETIF_F_SCTP_CSUM;
 439         } else {
 440                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
 441                                       NETIF_F_SCTP_CSUM);
 442         }
 443
 444         return 0;
 445 }
 446
 447 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
 448 {
 449         if (data) {
 450                 netdev->features |= NETIF_F_TSO;
 451                 netdev->features |= NETIF_F_TSO6;
 452         } else {
 453                 netdev->features &= ~NETIF_F_TSO;
 454                 netdev->features &= ~NETIF_F_TSO6;
 455         }
 456         return 0;
 457 }
 458
 459 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 460 {
 461         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 462         return adapter->msg_enable;
 463 }
 464
 465 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 466 {
 467         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 468         adapter->msg_enable = data;
 469 }
 470
 471 static int ixgbe_get_regs_len(struct net_device *netdev)
 472 {
 473 #define IXGBE_REGS_LEN  1128
 474         return IXGBE_REGS_LEN * sizeof(u32);
 475 }
 476
 477 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 478
 479 static void ixgbe_get_regs(struct net_device *netdev,
 480                            struct ethtool_regs *regs, void *p)
 481 {
 482         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 483         struct ixgbe_hw *hw = &adapter->hw;
 484         u32 *regs_buff = p;
 485         u8 i;
 486
 487         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 488
 489         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
 490
 491         /* General Registers */
 492         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 493         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 494         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 495         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 496         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 497         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 498         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 499         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 500
 501         /* NVM Register */
 502         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 503         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 504         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 505         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 506         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 507         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 508         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 509         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 510         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 511         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 512
 513         /* Interrupt */
 514         /* don't read EICR because it can clear interrupt causes, instead
 515          * read EICS which is a shadow but doesn't clear EICR */
 516         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 517         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 518         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 519         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 520         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 521         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 522         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 523         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 524         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 525         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 526         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 527         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 528
 529         /* Flow Control */
 530         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 531         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 532         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 533         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 534         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 535         for (i = 0; i < 8; i++) {
 536                 switch (hw->mac.type) {
 537                 case ixgbe_mac_82598EB:
 538                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 539                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 540                         break;
 541                 case ixgbe_mac_82599EB:
 542                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 543                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 544                         break;
 545                 default:
 546                         break;
 547                 }
 548         }
 549         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 550         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 551
 552         /* Receive DMA */
 553         for (i = 0; i < 64; i++)
 554                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 555         for (i = 0; i < 64; i++)
 556                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 557         for (i = 0; i < 64; i++)
 558                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 559         for (i = 0; i < 64; i++)
 560                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 561         for (i = 0; i < 64; i++)
 562                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 563         for (i = 0; i < 64; i++)
 564                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 565         for (i = 0; i < 16; i++)
 566                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 567         for (i = 0; i < 16; i++)
 568                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 569         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 570         for (i = 0; i < 8; i++)
 571                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 572         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 573         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 574
 575         /* Receive */
 576         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 577         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 578         for (i = 0; i < 16; i++)
 579                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 580         for (i = 0; i < 16; i++)
 581                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 582         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 583         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 584         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 585         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 586         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 587         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 588         for (i = 0; i < 8; i++)
 589                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 590         for (i = 0; i < 8; i++)
 591                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 592         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 593
 594         /* Transmit */
 595         for (i = 0; i < 32; i++)
 596                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 597         for (i = 0; i < 32; i++)
 598                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 599         for (i = 0; i < 32; i++)
 600                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 601         for (i = 0; i < 32; i++)
 602                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 603         for (i = 0; i < 32; i++)
 604                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 605         for (i = 0; i < 32; i++)
 606                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 607         for (i = 0; i < 32; i++)
 608                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 609         for (i = 0; i < 32; i++)
 610                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 611         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 612         for (i = 0; i < 16; i++)
 613                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 614         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 615         for (i = 0; i < 8; i++)
 616                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 617         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 618
 619         /* Wake Up */
 620         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 621         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 622         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 623         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 624         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 625         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 626         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 627         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 628         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 629
 630         /* DCB */
 631         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
 632         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 633         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
 634         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 635         for (i = 0; i < 8; i++)
 636                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 637         for (i = 0; i < 8; i++)
 638                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 639         for (i = 0; i < 8; i++)
 640                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 641         for (i = 0; i < 8; i++)
 642                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 643         for (i = 0; i < 8; i++)
 644                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
 645         for (i = 0; i < 8; i++)
 646                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
 647
 648         /* Statistics */
 649         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 650         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 651         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 652         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 653         for (i = 0; i < 8; i++)
 654                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 655         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 656         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 657         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 658         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 659         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 660         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 661         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 662         for (i = 0; i < 8; i++)
 663                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 664         for (i = 0; i < 8; i++)
 665                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 666         for (i = 0; i < 8; i++)
 667                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 668         for (i = 0; i < 8; i++)
 669                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 670         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 671         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 672         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 673         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 674         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 675         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 676         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 677         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 678         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 679         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 680         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 681         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 682         for (i = 0; i < 8; i++)
 683                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 684         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 685         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 686         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 687         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 688         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 689         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 690         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 691         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 692         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 693         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 694         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 695         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 696         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 697         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 698         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 699         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 700         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 701         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 702         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 703         for (i = 0; i < 16; i++)
 704                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 705         for (i = 0; i < 16; i++)
 706                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 707         for (i = 0; i < 16; i++)
 708                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 709         for (i = 0; i < 16; i++)
 710                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 711
 712         /* MAC */
 713         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 714         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 715         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 716         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 717         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 718         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 719         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 720         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 721         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 722         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 723         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 724         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 725         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 726         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 727         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 728         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 729         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 730         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 731         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 732         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 733         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 734         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 735         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 736         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 737         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 738         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 739         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 740         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 741         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 742         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 743         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 744         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 745         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 746
 747         /* Diagnostic */
 748         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 749         for (i = 0; i < 8; i++)
 750                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 751         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 752         for (i = 0; i < 4; i++)
 753                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 754         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 755         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 756         for (i = 0; i < 8; i++)
 757                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 758         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 759         for (i = 0; i < 4; i++)
 760                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 761         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 762         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 763         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 764         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 765         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 766         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 767         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 768         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 769         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 770         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 771         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 772         for (i = 0; i < 8; i++)
 773                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 774         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 775         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 776         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 777         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 778         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 779         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 780         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 781         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 782         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 783 }
 784
 785 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 786 {
 787         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 788         return adapter->hw.eeprom.word_size * 2;
 789 }
 790
 791 static int ixgbe_get_eeprom(struct net_device *netdev,
 792                             struct ethtool_eeprom *eeprom, u8 *bytes)
 793 {
 794         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 795         struct ixgbe_hw *hw = &adapter->hw;
 796         u16 *eeprom_buff;
 797         int first_word, last_word, eeprom_len;
 798         int ret_val = 0;
 799         u16 i;
 800
 801         if (eeprom->len == 0)
 802                 return -EINVAL;
 803
 804         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 805
 806         first_word = eeprom->offset >> 1;
 807         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 808         eeprom_len = last_word - first_word + 1;
 809
 810         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 811         if (!eeprom_buff)
 812                 return -ENOMEM;
 813
 814         for (i = 0; i < eeprom_len; i++) {
 815                 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
 816                     &eeprom_buff[i])))
 817                         break;
 818         }
 819
 820         /* Device's eeprom is always little-endian, word addressable */
 821         for (i = 0; i < eeprom_len; i++)
 822                 le16_to_cpus(&eeprom_buff[i]);
 823
 824         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 825         kfree(eeprom_buff);
 826
 827         return ret_val;
 828 }
 829
 830 static void ixgbe_get_drvinfo(struct net_device *netdev,
 831                               struct ethtool_drvinfo *drvinfo)
 832 {
 833         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 834         char firmware_version[32];
 835
 836         strncpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
 837         strncpy(drvinfo->version, ixgbe_driver_version,
 838                 sizeof(drvinfo->version));
 839
 840         snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
 841                  (adapter->eeprom_version & 0xF000) >> 12,
 842                  (adapter->eeprom_version & 0x0FF0) >> 4,
 843                  adapter->eeprom_version & 0x000F);
 844
 845         strncpy(drvinfo->fw_version, firmware_version,
 846                 sizeof(drvinfo->fw_version));
 847         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
 848                 sizeof(drvinfo->bus_info));
 849         drvinfo->n_stats = IXGBE_STATS_LEN;
 850         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 851         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 852 }
 853
 854 static void ixgbe_get_ringparam(struct net_device *netdev,
 855                                 struct ethtool_ringparam *ring)
 856 {
 857         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 858         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 859         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 860
 861         ring->rx_max_pending = IXGBE_MAX_RXD;
 862         ring->tx_max_pending = IXGBE_MAX_TXD;
 863         ring->rx_mini_max_pending = 0;
 864         ring->rx_jumbo_max_pending = 0;
 865         ring->rx_pending = rx_ring->count;
 866         ring->tx_pending = tx_ring->count;
 867         ring->rx_mini_pending = 0;
 868         ring->rx_jumbo_pending = 0;
 869 }
 870
 871 static int ixgbe_set_ringparam(struct net_device *netdev,
 872                                struct ethtool_ringparam *ring)
 873 {
 874         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 875         struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
 876         int i, err = 0;
 877         u32 new_rx_count, new_tx_count;
 878         bool need_update = false;
 879
 880         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 881                 return -EINVAL;
 882
 883         new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
 884         new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
 885         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 886
 887         new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
 888         new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
 889         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 890
 891         if ((new_tx_count == adapter->tx_ring[0]->count) &&
 892             (new_rx_count == adapter->rx_ring[0]->count)) {
 893                 /* nothing to do */
 894                 return 0;
 895         }
 896
 897         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 898                 msleep(1);
 899
 900         if (!netif_running(adapter->netdev)) {
 901                 for (i = 0; i < adapter->num_tx_queues; i++)
 902                         adapter->tx_ring[i]->count = new_tx_count;
 903                 for (i = 0; i < adapter->num_rx_queues; i++)
 904                         adapter->rx_ring[i]->count = new_rx_count;
 905                 adapter->tx_ring_count = new_tx_count;
 906                 adapter->rx_ring_count = new_rx_count;
 907                 goto clear_reset;
 908         }
 909
 910         temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
 911         if (!temp_tx_ring) {
 912                 err = -ENOMEM;
 913                 goto clear_reset;
 914         }
 915
 916         if (new_tx_count != adapter->tx_ring_count) {
 917                 for (i = 0; i < adapter->num_tx_queues; i++) {
 918                         memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
 919                                sizeof(struct ixgbe_ring));
 920                         temp_tx_ring[i].count = new_tx_count;
 921                         err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);
 922                         if (err) {
 923                                 while (i) {
 924                                         i--;
 925                                         ixgbe_free_tx_resources(&temp_tx_ring[i]);
 926                                 }
 927                                 goto clear_reset;
 928                         }
 929                 }
 930                 need_update = true;
 931         }
 932
 933         temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
 934         if (!temp_rx_ring) {
 935                 err = -ENOMEM;
 936                 goto err_setup;
 937         }
 938
 939         if (new_rx_count != adapter->rx_ring_count) {
 940                 for (i = 0; i < adapter->num_rx_queues; i++) {
 941                         memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
 942                                sizeof(struct ixgbe_ring));
 943                         temp_rx_ring[i].count = new_rx_count;
 944                         err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);
 945                         if (err) {
 946                                 while (i) {
 947                                         i--;
 948                                         ixgbe_free_rx_resources(&temp_rx_ring[i]);
 949                                 }
 950                                 goto err_setup;
 951                         }
 952                 }
 953                 need_update = true;
 954         }
 955
 956         /* if rings need to be updated, here's the place to do it in one shot */
 957         if (need_update) {
 958                 ixgbe_down(adapter);
 959
 960                 /* tx */
 961                 if (new_tx_count != adapter->tx_ring_count) {
 962                         for (i = 0; i < adapter->num_tx_queues; i++) {
 963                                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
 964                                 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
 965                                        sizeof(struct ixgbe_ring));
 966                         }
 967                         adapter->tx_ring_count = new_tx_count;
 968                 }
 969
 970                 /* rx */
 971                 if (new_rx_count != adapter->rx_ring_count) {
 972                         for (i = 0; i < adapter->num_rx_queues; i++) {
 973                                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
 974                                 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
 975                                        sizeof(struct ixgbe_ring));
 976                         }
 977                         adapter->rx_ring_count = new_rx_count;
 978                 }
 979                 ixgbe_up(adapter);
 980         }
 981
 982         vfree(temp_rx_ring);
 983 err_setup:
 984         vfree(temp_tx_ring);
 985 clear_reset:
 986         clear_bit(__IXGBE_RESETTING, &adapter->state);
 987         return err;
 988 }
 989
 990 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
 991 {
 992         switch (sset) {
 993         case ETH_SS_TEST:
 994                 return IXGBE_TEST_LEN;
 995         case ETH_SS_STATS:
 996                 return IXGBE_STATS_LEN;
 997         case ETH_SS_NTUPLE_FILTERS:
 998                 return ETHTOOL_MAX_NTUPLE_LIST_ENTRY *
 999                        ETHTOOL_MAX_NTUPLE_STRING_PER_ENTRY;
1000         default:
1001                 return -EOPNOTSUPP;
1002         }
1003 }
1004
1005 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1006                                     struct ethtool_stats *stats, u64 *data)
1007 {
1008         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1009         struct rtnl_link_stats64 temp;
1010         const struct rtnl_link_stats64 *net_stats;
1011         unsigned int start;
1012         struct ixgbe_ring *ring;
1013         int i, j;
1014         char *p = NULL;
1015
1016         ixgbe_update_stats(adapter);
1017         net_stats = dev_get_stats(netdev, &temp);
1018         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1019                 switch (ixgbe_gstrings_stats[i].type) {
1020                 case NETDEV_STATS:
1021                         p = (char *) net_stats +
1022                                         ixgbe_gstrings_stats[i].stat_offset;
1023                         break;
1024                 case IXGBE_STATS:
1025                         p = (char *) adapter +
1026                                         ixgbe_gstrings_stats[i].stat_offset;
1027                         break;
1028                 }
1029
1030                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1031                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1032         }
1033         for (j = 0; j < adapter->num_tx_queues; j++) {
1034                 ring = adapter->tx_ring[j];
1035                 do {
1036                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1037                         data[i]   = ring->stats.packets;
1038                         data[i+1] = ring->stats.bytes;
1039                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1040                 i += 2;
1041         }
1042         for (j = 0; j < adapter->num_rx_queues; j++) {
1043                 ring = adapter->rx_ring[j];
1044                 do {
1045                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1046                         data[i]   = ring->stats.packets;
1047                         data[i+1] = ring->stats.bytes;
1048                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1049                 i += 2;
1050         }
1051         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1052                 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1053                         data[i++] = adapter->stats.pxontxc[j];
1054                         data[i++] = adapter->stats.pxofftxc[j];
1055                 }
1056                 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1057                         data[i++] = adapter->stats.pxonrxc[j];
1058                         data[i++] = adapter->stats.pxoffrxc[j];
1059                 }
1060         }
1061 }
1062
1063 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1064                               u8 *data)
1065 {
1066         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1067         char *p = (char *)data;
1068         int i;
1069
1070         switch (stringset) {
1071         case ETH_SS_TEST:
1072                 memcpy(data, *ixgbe_gstrings_test,
1073                        IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1074                 break;
1075         case ETH_SS_STATS:
1076                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1077                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1078                                ETH_GSTRING_LEN);
1079                         p += ETH_GSTRING_LEN;
1080                 }
1081                 for (i = 0; i < adapter->num_tx_queues; i++) {
1082                         sprintf(p, "tx_queue_%u_packets", i);
1083                         p += ETH_GSTRING_LEN;
1084                         sprintf(p, "tx_queue_%u_bytes", i);
1085                         p += ETH_GSTRING_LEN;
1086                 }
1087                 for (i = 0; i < adapter->num_rx_queues; i++) {
1088                         sprintf(p, "rx_queue_%u_packets", i);
1089                         p += ETH_GSTRING_LEN;
1090                         sprintf(p, "rx_queue_%u_bytes", i);
1091                         p += ETH_GSTRING_LEN;
1092                 }
1093                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1094                         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1095                                 sprintf(p, "tx_pb_%u_pxon", i);
1096                                 p += ETH_GSTRING_LEN;
1097                                 sprintf(p, "tx_pb_%u_pxoff", i);
1098                                 p += ETH_GSTRING_LEN;
1099                         }
1100                         for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1101                                 sprintf(p, "rx_pb_%u_pxon", i);
1102                                 p += ETH_GSTRING_LEN;
1103                                 sprintf(p, "rx_pb_%u_pxoff", i);
1104                                 p += ETH_GSTRING_LEN;
1105                         }
1106                 }
1107                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1108                 break;
1109         }
1110 }
1111
1112 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1113 {
1114         struct ixgbe_hw *hw = &adapter->hw;
1115         bool link_up;
1116         u32 link_speed = 0;
1117         *data = 0;
1118
1119         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1120         if (link_up)
1121                 return *data;
1122         else
1123                 *data = 1;
1124         return *data;
1125 }
1126
1127 /* ethtool register test data */
1128 struct ixgbe_reg_test {
1129         u16 reg;
1130         u8  array_len;
1131         u8  test_type;
1132         u32 mask;
1133         u32 write;
1134 };
1135
1136 /* In the hardware, registers are laid out either singly, in arrays
1137  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1138  * most tests take place on arrays or single registers (handled
1139  * as a single-element array) and special-case the tables.
1140  * Table tests are always pattern tests.
1141  *
1142  * We also make provision for some required setup steps by specifying
1143  * registers to be written without any read-back testing.
1144  */
1145
1146 #define PATTERN_TEST    1
1147 #define SET_READ_TEST   2
1148 #define WRITE_NO_TEST   3
1149 #define TABLE32_TEST    4
1150 #define TABLE64_TEST_LO 5
1151 #define TABLE64_TEST_HI 6
1152
1153 /* default 82599 register test */
1154 static struct ixgbe_reg_test reg_test_82599[] = {
1155         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1156         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1157         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1158         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1159         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1160         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1161         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1162         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1163         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1164         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1165         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1166         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1167         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1168         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1169         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1170         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1171         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1172         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1173         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1174         { 0, 0, 0, 0 }
1175 };
1176
1177 /* default 82598 register test */
1178 static struct ixgbe_reg_test reg_test_82598[] = {
1179         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1180         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1181         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1182         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1183         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1184         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1185         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1186         /* Enable all four RX queues before testing. */
1187         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1188         /* RDH is read-only for 82598, only test RDT. */
1189         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1190         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1191         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1192         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1193         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1194         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1195         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1196         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1197         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1198         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1199         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1200         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1201         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1202         { 0, 0, 0, 0 }
1203 };
1204
1205 #define REG_PATTERN_TEST(R, M, W)                                             \
1206 {                                                                             \
1207         u32 pat, val, before;                                                 \
1208         const u32 _test[] = {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
1209         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {                       \
1210                 before = readl(adapter->hw.hw_addr + R);                      \
1211                 writel((_test[pat] & W), (adapter->hw.hw_addr + R));          \
1212                 val = readl(adapter->hw.hw_addr + R);                         \
1213                 if (val != (_test[pat] & W & M)) {                            \
1214                         e_err(drv, "pattern test reg %04X failed: got "   \
1215                               "0x%08X expected 0x%08X\n",                     \
1216                               R, val, (_test[pat] & W & M));                \
1217                         *data = R;                                            \
1218                         writel(before, adapter->hw.hw_addr + R);              \
1219                         return 1;                                             \
1220                 }                                                             \
1221                 writel(before, adapter->hw.hw_addr + R);                      \
1222         }                                                                     \
1223 }
1224
1225 #define REG_SET_AND_CHECK(R, M, W)                                            \
1226 {                                                                             \
1227         u32 val, before;                                                      \
1228         before = readl(adapter->hw.hw_addr + R);                              \
1229         writel((W & M), (adapter->hw.hw_addr + R));                           \
1230         val = readl(adapter->hw.hw_addr + R);                                 \
1231         if ((W & M) != (val & M)) {                                           \
1232                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "  \
1233                       "expected 0x%08X\n", R, (val & M), (W & M));        \
1234                 *data = R;                                                    \
1235                 writel(before, (adapter->hw.hw_addr + R));                    \
1236                 return 1;                                                     \
1237         }                                                                     \
1238         writel(before, (adapter->hw.hw_addr + R));                            \
1239 }
1240
1241 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1242 {
1243         struct ixgbe_reg_test *test;
1244         u32 value, before, after;
1245         u32 i, toggle;
1246
1247         switch (adapter->hw.mac.type) {
1248         case ixgbe_mac_82598EB:
1249                 toggle = 0x7FFFF3FF;
1250                 test = reg_test_82598;
1251                 break;
1252         case ixgbe_mac_82599EB:
1253                 toggle = 0x7FFFF30F;
1254                 test = reg_test_82599;
1255                 break;
1256         default:
1257                 *data = 1;
1258                 return 1;
1259                 break;
1260         }
1261
1262         /*
1263          * Because the status register is such a special case,
1264          * we handle it separately from the rest of the register
1265          * tests.  Some bits are read-only, some toggle, and some
1266          * are writeable on newer MACs.
1267          */
1268         before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1269         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1270         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1271         after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1272         if (value != after) {
1273                 e_err(drv, "failed STATUS register test got: 0x%08X "
1274                       "expected: 0x%08X\n", after, value);
1275                 *data = 1;
1276                 return 1;
1277         }
1278         /* restore previous status */
1279         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1280
1281         /*
1282          * Perform the remainder of the register test, looping through
1283          * the test table until we either fail or reach the null entry.
1284          */
1285         while (test->reg) {
1286                 for (i = 0; i < test->array_len; i++) {
1287                         switch (test->test_type) {
1288                         case PATTERN_TEST:
1289                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1290                                                 test->mask,
1291                                                 test->write);
1292                                 break;
1293                         case SET_READ_TEST:
1294                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1295                                                 test->mask,
1296                                                 test->write);
1297                                 break;
1298                         case WRITE_NO_TEST:
1299                                 writel(test->write,
1300                                        (adapter->hw.hw_addr + test->reg)
1301                                        + (i * 0x40));
1302                                 break;
1303                         case TABLE32_TEST:
1304                                 REG_PATTERN_TEST(test->reg + (i * 4),
1305                                                 test->mask,
1306                                                 test->write);
1307                                 break;
1308                         case TABLE64_TEST_LO:
1309                                 REG_PATTERN_TEST(test->reg + (i * 8),
1310                                                 test->mask,
1311                                                 test->write);
1312                                 break;
1313                         case TABLE64_TEST_HI:
1314                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1315                                                 test->mask,
1316                                                 test->write);
1317                                 break;
1318                         }
1319                 }
1320                 test++;
1321         }
1322
1323         *data = 0;
1324         return 0;
1325 }
1326
1327 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1328 {
1329         struct ixgbe_hw *hw = &adapter->hw;
1330         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1331                 *data = 1;
1332         else
1333                 *data = 0;
1334         return *data;
1335 }
1336
1337 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1338 {
1339         struct net_device *netdev = (struct net_device *) data;
1340         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1341
1342         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1343
1344         return IRQ_HANDLED;
1345 }
1346
1347 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1348 {
1349         struct net_device *netdev = adapter->netdev;
1350         u32 mask, i = 0, shared_int = true;
1351         u32 irq = adapter->pdev->irq;
1352
1353         *data = 0;
1354
1355         /* Hook up test interrupt handler just for this test */
1356         if (adapter->msix_entries) {
1357                 /* NOTE: we don't test MSI-X interrupts here, yet */
1358                 return 0;
1359         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1360                 shared_int = false;
1361                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1362                                 netdev)) {
1363                         *data = 1;
1364                         return -1;
1365                 }
1366         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1367                                 netdev->name, netdev)) {
1368                 shared_int = false;
1369         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1370                                netdev->name, netdev)) {
1371                 *data = 1;
1372                 return -1;
1373         }
1374         e_info(hw, "testing %s interrupt\n", shared_int ?
1375                "shared" : "unshared");
1376
1377         /* Disable all the interrupts */
1378         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1379         msleep(10);
1380
1381         /* Test each interrupt */
1382         for (; i < 10; i++) {
1383                 /* Interrupt to test */
1384                 mask = 1 << i;
1385
1386                 if (!shared_int) {
1387                         /*
1388                          * Disable the interrupts to be reported in
1389                          * the cause register and then force the same
1390                          * interrupt and see if one gets posted.  If
1391                          * an interrupt was posted to the bus, the
1392                          * test failed.
1393                          */
1394                         adapter->test_icr = 0;
1395                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1396                                         ~mask & 0x00007FFF);
1397                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1398                                         ~mask & 0x00007FFF);
1399                         msleep(10);
1400
1401                         if (adapter->test_icr & mask) {
1402                                 *data = 3;
1403                                 break;
1404                         }
1405                 }
1406
1407                 /*
1408                  * Enable the interrupt to be reported in the cause
1409                  * register and then force the same interrupt and see
1410                  * if one gets posted.  If an interrupt was not posted
1411                  * to the bus, the test failed.
1412                  */
1413                 adapter->test_icr = 0;
1414                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1415                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1416                 msleep(10);
1417
1418                 if (!(adapter->test_icr &mask)) {
1419                         *data = 4;
1420                         break;
1421                 }
1422
1423                 if (!shared_int) {
1424                         /*
1425                          * Disable the other interrupts to be reported in
1426                          * the cause register and then force the other
1427                          * interrupts and see if any get posted.  If
1428                          * an interrupt was posted to the bus, the
1429                          * test failed.
1430                          */
1431                         adapter->test_icr = 0;
1432                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1433                                         ~mask & 0x00007FFF);
1434                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1435                                         ~mask & 0x00007FFF);
1436                         msleep(10);
1437
1438                         if (adapter->test_icr) {
1439                                 *data = 5;
1440                                 break;
1441                         }
1442                 }
1443         }
1444
1445         /* Disable all the interrupts */
1446         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1447         msleep(10);
1448
1449         /* Unhook test interrupt handler */
1450         free_irq(irq, netdev);
1451
1452         return *data;
1453 }
1454
1455 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1456 {
1457         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1458         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1459         struct ixgbe_hw *hw = &adapter->hw;
1460         u32 reg_ctl;
1461
1462         /* shut down the DMA engines now so they can be reinitialized later */
1463
1464         /* first Rx */
1465         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1466         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1467         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1468         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rx_ring->reg_idx));
1469         reg_ctl &= ~IXGBE_RXDCTL_ENABLE;
1470         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rx_ring->reg_idx), reg_ctl);
1471
1472         /* now Tx */
1473         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1474         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1475         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1476
1477         switch (hw->mac.type) {
1478         case ixgbe_mac_82599EB:
1479                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1480                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1481                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1482                 break;
1483         default:
1484                 break;
1485         }
1486
1487         ixgbe_reset(adapter);
1488
1489         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1490         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1491 }
1492
1493 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1494 {
1495         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1496         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1497         u32 rctl, reg_data;
1498         int ret_val;
1499         int err;
1500
1501         /* Setup Tx descriptor ring and Tx buffers */
1502         tx_ring->count = IXGBE_DEFAULT_TXD;
1503         tx_ring->queue_index = 0;
1504         tx_ring->dev = &adapter->pdev->dev;
1505         tx_ring->netdev = adapter->netdev;
1506         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1507         tx_ring->numa_node = adapter->node;
1508
1509         err = ixgbe_setup_tx_resources(tx_ring);
1510         if (err)
1511                 return 1;
1512
1513         switch (adapter->hw.mac.type) {
1514         case ixgbe_mac_82599EB:
1515                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1516                 reg_data |= IXGBE_DMATXCTL_TE;
1517                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1518                 break;
1519         default:
1520                 break;
1521         }
1522
1523         ixgbe_configure_tx_ring(adapter, tx_ring);
1524
1525         /* Setup Rx Descriptor ring and Rx buffers */
1526         rx_ring->count = IXGBE_DEFAULT_RXD;
1527         rx_ring->queue_index = 0;
1528         rx_ring->dev = &adapter->pdev->dev;
1529         rx_ring->netdev = adapter->netdev;
1530         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1531         rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048;
1532         rx_ring->numa_node = adapter->node;
1533
1534         err = ixgbe_setup_rx_resources(rx_ring);
1535         if (err) {
1536                 ret_val = 4;
1537                 goto err_nomem;
1538         }
1539
1540         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1541         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1542
1543         ixgbe_configure_rx_ring(adapter, rx_ring);
1544
1545         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1546         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1547
1548         return 0;
1549
1550 err_nomem:
1551         ixgbe_free_desc_rings(adapter);
1552         return ret_val;
1553 }
1554
1555 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1556 {
1557         struct ixgbe_hw *hw = &adapter->hw;
1558         u32 reg_data;
1559
1560         /* right now we only support MAC loopback in the driver */
1561         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1562         /* Setup MAC loopback */
1563         reg_data |= IXGBE_HLREG0_LPBK;
1564         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1565
1566         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1567         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1568         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_data);
1569
1570         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_AUTOC);
1571         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1572         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1573         IXGBE_WRITE_REG(&adapter->hw, IXGBE_AUTOC, reg_data);
1574         IXGBE_WRITE_FLUSH(&adapter->hw);
1575         msleep(10);
1576
1577         /* Disable Atlas Tx lanes; re-enabled in reset path */
1578         if (hw->mac.type == ixgbe_mac_82598EB) {
1579                 u8 atlas;
1580
1581                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1582                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1583                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1584
1585                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1586                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1587                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1588
1589                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1590                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1591                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1592
1593                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1594                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1595                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1596         }
1597
1598         return 0;
1599 }
1600
1601 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1602 {
1603         u32 reg_data;
1604
1605         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1606         reg_data &= ~IXGBE_HLREG0_LPBK;
1607         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1608 }
1609
1610 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1611                                       unsigned int frame_size)
1612 {
1613         memset(skb->data, 0xFF, frame_size);
1614         frame_size &= ~1;
1615         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1616         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1617         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1618 }
1619
1620 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1621                                     unsigned int frame_size)
1622 {
1623         frame_size &= ~1;
1624         if (*(skb->data + 3) == 0xFF) {
1625                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1626                     (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1627                         return 0;
1628                 }
1629         }
1630         return 13;
1631 }
1632
1633 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1634                                   struct ixgbe_ring *tx_ring,
1635                                   unsigned int size)
1636 {
1637         union ixgbe_adv_rx_desc *rx_desc;
1638         struct ixgbe_rx_buffer *rx_buffer_info;
1639         struct ixgbe_tx_buffer *tx_buffer_info;
1640         const int bufsz = rx_ring->rx_buf_len;
1641         u32 staterr;
1642         u16 rx_ntc, tx_ntc, count = 0;
1643
1644         /* initialize next to clean and descriptor values */
1645         rx_ntc = rx_ring->next_to_clean;
1646         tx_ntc = tx_ring->next_to_clean;
1647         rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1648         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1649
1650         while (staterr & IXGBE_RXD_STAT_DD) {
1651                 /* check Rx buffer */
1652                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1653
1654                 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1655                 dma_unmap_single(rx_ring->dev,
1656                                  rx_buffer_info->dma,
1657                                  bufsz,
1658                                  DMA_FROM_DEVICE);
1659                 rx_buffer_info->dma = 0;
1660
1661                 /* verify contents of skb */
1662                 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1663                         count++;
1664
1665                 /* unmap buffer on Tx side */
1666                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1667                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1668
1669                 /* increment Rx/Tx next to clean counters */
1670                 rx_ntc++;
1671                 if (rx_ntc == rx_ring->count)
1672                         rx_ntc = 0;
1673                 tx_ntc++;
1674                 if (tx_ntc == tx_ring->count)
1675                         tx_ntc = 0;
1676
1677                 /* fetch next descriptor */
1678                 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1679                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1680         }
1681
1682         /* re-map buffers to ring, store next to clean values */
1683         ixgbe_alloc_rx_buffers(rx_ring, count);
1684         rx_ring->next_to_clean = rx_ntc;
1685         tx_ring->next_to_clean = tx_ntc;
1686
1687         return count;
1688 }
1689
1690 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1691 {
1692         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1693         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1694         int i, j, lc, good_cnt, ret_val = 0;
1695         unsigned int size = 1024;
1696         netdev_tx_t tx_ret_val;
1697         struct sk_buff *skb;
1698
1699         /* allocate test skb */
1700         skb = alloc_skb(size, GFP_KERNEL);
1701         if (!skb)
1702                 return 11;
1703
1704         /* place data into test skb */
1705         ixgbe_create_lbtest_frame(skb, size);
1706         skb_put(skb, size);
1707
1708         /*
1709          * Calculate the loop count based on the largest descriptor ring
1710          * The idea is to wrap the largest ring a number of times using 64
1711          * send/receive pairs during each loop
1712          */
1713
1714         if (rx_ring->count <= tx_ring->count)
1715                 lc = ((tx_ring->count / 64) * 2) + 1;
1716         else
1717                 lc = ((rx_ring->count / 64) * 2) + 1;
1718
1719         for (j = 0; j <= lc; j++) {
1720                 /* reset count of good packets */
1721                 good_cnt = 0;
1722
1723                 /* place 64 packets on the transmit queue*/
1724                 for (i = 0; i < 64; i++) {
1725                         skb_get(skb);
1726                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1727                                                            adapter,
1728                                                            tx_ring);
1729                         if (tx_ret_val == NETDEV_TX_OK)
1730                                 good_cnt++;
1731                 }
1732
1733                 if (good_cnt != 64) {
1734                         ret_val = 12;
1735                         break;
1736                 }
1737
1738                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1739                 msleep(200);
1740
1741                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1742                 if (good_cnt != 64) {
1743                         ret_val = 13;
1744                         break;
1745                 }
1746         }
1747
1748         /* free the original skb */
1749         kfree_skb(skb);
1750
1751         return ret_val;
1752 }
1753
1754 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1755 {
1756         *data = ixgbe_setup_desc_rings(adapter);
1757         if (*data)
1758                 goto out;
1759         *data = ixgbe_setup_loopback_test(adapter);
1760         if (*data)
1761                 goto err_loopback;
1762         *data = ixgbe_run_loopback_test(adapter);
1763         ixgbe_loopback_cleanup(adapter);
1764
1765 err_loopback:
1766         ixgbe_free_desc_rings(adapter);
1767 out:
1768         return *data;
1769 }
1770
1771 static void ixgbe_diag_test(struct net_device *netdev,
1772                             struct ethtool_test *eth_test, u64 *data)
1773 {
1774         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1775         bool if_running = netif_running(netdev);
1776
1777         set_bit(__IXGBE_TESTING, &adapter->state);
1778         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1779                 /* Offline tests */
1780
1781                 e_info(hw, "offline testing starting\n");
1782
1783                 /* Link test performed before hardware reset so autoneg doesn't
1784                  * interfere with test result */
1785                 if (ixgbe_link_test(adapter, &data[4]))
1786                         eth_test->flags |= ETH_TEST_FL_FAILED;
1787
1788                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1789                         int i;
1790                         for (i = 0; i < adapter->num_vfs; i++) {
1791                                 if (adapter->vfinfo[i].clear_to_send) {
1792                                         netdev_warn(netdev, "%s",
1793                                                     "offline diagnostic is not "
1794                                                     "supported when VFs are "
1795                                                     "present\n");
1796                                         data[0] = 1;
1797                                         data[1] = 1;
1798                                         data[2] = 1;
1799                                         data[3] = 1;
1800                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1801                                         clear_bit(__IXGBE_TESTING,
1802                                                   &adapter->state);
1803                                         goto skip_ol_tests;
1804                                 }
1805                         }
1806                 }
1807
1808                 if (if_running)
1809                         /* indicate we're in test mode */
1810                         dev_close(netdev);
1811                 else
1812                         ixgbe_reset(adapter);
1813
1814                 e_info(hw, "register testing starting\n");
1815                 if (ixgbe_reg_test(adapter, &data[0]))
1816                         eth_test->flags |= ETH_TEST_FL_FAILED;
1817
1818                 ixgbe_reset(adapter);
1819                 e_info(hw, "eeprom testing starting\n");
1820                 if (ixgbe_eeprom_test(adapter, &data[1]))
1821                         eth_test->flags |= ETH_TEST_FL_FAILED;
1822
1823                 ixgbe_reset(adapter);
1824                 e_info(hw, "interrupt testing starting\n");
1825                 if (ixgbe_intr_test(adapter, &data[2]))
1826                         eth_test->flags |= ETH_TEST_FL_FAILED;
1827
1828                 /* If SRIOV or VMDq is enabled then skip MAC
1829                  * loopback diagnostic. */
1830                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1831                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1832                         e_info(hw, "Skip MAC loopback diagnostic in VT "
1833                                "mode\n");
1834                         data[3] = 0;
1835                         goto skip_loopback;
1836                 }
1837
1838                 ixgbe_reset(adapter);
1839                 e_info(hw, "loopback testing starting\n");
1840                 if (ixgbe_loopback_test(adapter, &data[3]))
1841                         eth_test->flags |= ETH_TEST_FL_FAILED;
1842
1843 skip_loopback:
1844                 ixgbe_reset(adapter);
1845
1846                 clear_bit(__IXGBE_TESTING, &adapter->state);
1847                 if (if_running)
1848                         dev_open(netdev);
1849         } else {
1850                 e_info(hw, "online testing starting\n");
1851                 /* Online tests */
1852                 if (ixgbe_link_test(adapter, &data[4]))
1853                         eth_test->flags |= ETH_TEST_FL_FAILED;
1854
1855                 /* Online tests aren't run; pass by default */
1856                 data[0] = 0;
1857                 data[1] = 0;
1858                 data[2] = 0;
1859                 data[3] = 0;
1860
1861                 clear_bit(__IXGBE_TESTING, &adapter->state);
1862         }
1863 skip_ol_tests:
1864         msleep_interruptible(4 * 1000);
1865 }
1866
1867 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1868                                struct ethtool_wolinfo *wol)
1869 {
1870         struct ixgbe_hw *hw = &adapter->hw;
1871         int retval = 1;
1872
1873         switch(hw->device_id) {
1874         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1875                 /* All except this subdevice support WOL */
1876                 if (hw->subsystem_device_id ==
1877                     IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1878                         wol->supported = 0;
1879                         break;
1880                 }
1881         case IXGBE_DEV_ID_82599_KX4:
1882                 retval = 0;
1883                 break;
1884         default:
1885                 wol->supported = 0;
1886         }
1887
1888         return retval;
1889 }
1890
1891 static void ixgbe_get_wol(struct net_device *netdev,
1892                           struct ethtool_wolinfo *wol)
1893 {
1894         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1895
1896         wol->supported = WAKE_UCAST | WAKE_MCAST |
1897                          WAKE_BCAST | WAKE_MAGIC;
1898         wol->wolopts = 0;
1899
1900         if (ixgbe_wol_exclusion(adapter, wol) ||
1901             !device_can_wakeup(&adapter->pdev->dev))
1902                 return;
1903
1904         if (adapter->wol & IXGBE_WUFC_EX)
1905                 wol->wolopts |= WAKE_UCAST;
1906         if (adapter->wol & IXGBE_WUFC_MC)
1907                 wol->wolopts |= WAKE_MCAST;
1908         if (adapter->wol & IXGBE_WUFC_BC)
1909                 wol->wolopts |= WAKE_BCAST;
1910         if (adapter->wol & IXGBE_WUFC_MAG)
1911                 wol->wolopts |= WAKE_MAGIC;
1912 }
1913
1914 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1915 {
1916         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1917
1918         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1919                 return -EOPNOTSUPP;
1920
1921         if (ixgbe_wol_exclusion(adapter, wol))
1922                 return wol->wolopts ? -EOPNOTSUPP : 0;
1923
1924         adapter->wol = 0;
1925
1926         if (wol->wolopts & WAKE_UCAST)
1927                 adapter->wol |= IXGBE_WUFC_EX;
1928         if (wol->wolopts & WAKE_MCAST)
1929                 adapter->wol |= IXGBE_WUFC_MC;
1930         if (wol->wolopts & WAKE_BCAST)
1931                 adapter->wol |= IXGBE_WUFC_BC;
1932         if (wol->wolopts & WAKE_MAGIC)
1933                 adapter->wol |= IXGBE_WUFC_MAG;
1934
1935         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1936
1937         return 0;
1938 }
1939
1940 static int ixgbe_nway_reset(struct net_device *netdev)
1941 {
1942         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1943
1944         if (netif_running(netdev))
1945                 ixgbe_reinit_locked(adapter);
1946
1947         return 0;
1948 }
1949
1950 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
1951 {
1952         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1953         struct ixgbe_hw *hw = &adapter->hw;
1954         u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1955         u32 i;
1956
1957         if (!data || data > 300)
1958                 data = 300;
1959
1960         for (i = 0; i < (data * 1000); i += 400) {
1961                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
1962                 msleep_interruptible(200);
1963                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
1964                 msleep_interruptible(200);
1965         }
1966
1967         /* Restore LED settings */
1968         IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
1969
1970         return 0;
1971 }
1972
1973 static int ixgbe_get_coalesce(struct net_device *netdev,
1974                               struct ethtool_coalesce *ec)
1975 {
1976         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1977
1978         ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0]->work_limit;
1979
1980         /* only valid if in constant ITR mode */
1981         switch (adapter->rx_itr_setting) {
1982         case 0:
1983                 /* throttling disabled */
1984                 ec->rx_coalesce_usecs = 0;
1985                 break;
1986         case 1:
1987                 /* dynamic ITR mode */
1988                 ec->rx_coalesce_usecs = 1;
1989                 break;
1990         default:
1991                 /* fixed interrupt rate mode */
1992                 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
1993                 break;
1994         }
1995
1996         /* if in mixed tx/rx queues per vector mode, report only rx settings */
1997         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count)
1998                 return 0;
1999
2000         /* only valid if in constant ITR mode */
2001         switch (adapter->tx_itr_setting) {
2002         case 0:
2003                 /* throttling disabled */
2004                 ec->tx_coalesce_usecs = 0;
2005                 break;
2006         case 1:
2007                 /* dynamic ITR mode */
2008                 ec->tx_coalesce_usecs = 1;
2009                 break;
2010         default:
2011                 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
2012                 break;
2013         }
2014
2015         return 0;
2016 }
2017
2018 /*
2019  * this function must be called before setting the new value of
2020  * rx_itr_setting
2021  */
2022 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2023                              struct ethtool_coalesce *ec)
2024 {
2025         struct net_device *netdev = adapter->netdev;
2026
2027         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
2028                 return false;
2029
2030         /* if interrupt rate is too high then disable RSC */
2031         if (ec->rx_coalesce_usecs != 1 &&
2032             ec->rx_coalesce_usecs <= 1000000/IXGBE_MAX_RSC_INT_RATE) {
2033                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2034                         e_info(probe, "rx-usecs set too low, "
2035                                       "disabling RSC\n");
2036                         adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2037                         return true;
2038                 }
2039         } else {
2040                 /* check the feature flag value and enable RSC if necessary */
2041                 if ((netdev->features & NETIF_F_LRO) &&
2042                     !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2043                         e_info(probe, "rx-usecs set to %d, "
2044                                       "re-enabling RSC\n",
2045                                ec->rx_coalesce_usecs);
2046                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2047                         return true;
2048                 }
2049         }
2050         return false;
2051 }
2052
2053 static int ixgbe_set_coalesce(struct net_device *netdev,
2054                               struct ethtool_coalesce *ec)
2055 {
2056         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2057         struct ixgbe_q_vector *q_vector;
2058         int i;
2059         bool need_reset = false;
2060
2061         /* don't accept tx specific changes if we've got mixed RxTx vectors */
2062         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count
2063            && ec->tx_coalesce_usecs)
2064                 return -EINVAL;
2065
2066         if (ec->tx_max_coalesced_frames_irq)
2067                 adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
2068
2069         if (ec->rx_coalesce_usecs > 1) {
2070                 /* check the limits */
2071                 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2072                     (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2073                         return -EINVAL;
2074
2075                 /* check the old value and enable RSC if necessary */
2076                 need_reset = ixgbe_update_rsc(adapter, ec);
2077
2078                 /* store the value in ints/second */
2079                 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2080
2081                 /* static value of interrupt rate */
2082                 adapter->rx_itr_setting = adapter->rx_eitr_param;
2083                 /* clear the lower bit as its used for dynamic state */
2084                 adapter->rx_itr_setting &= ~1;
2085         } else if (ec->rx_coalesce_usecs == 1) {
2086                 /* check the old value and enable RSC if necessary */
2087                 need_reset = ixgbe_update_rsc(adapter, ec);
2088
2089                 /* 1 means dynamic mode */
2090                 adapter->rx_eitr_param = 20000;
2091                 adapter->rx_itr_setting = 1;
2092         } else {
2093                 /* check the old value and enable RSC if necessary */
2094                 need_reset = ixgbe_update_rsc(adapter, ec);
2095                 /*
2096                  * any other value means disable eitr, which is best
2097                  * served by setting the interrupt rate very high
2098                  */
2099                 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2100                 adapter->rx_itr_setting = 0;
2101         }
2102
2103         if (ec->tx_coalesce_usecs > 1) {
2104                 /*
2105                  * don't have to worry about max_int as above because
2106                  * tx vectors don't do hardware RSC (an rx function)
2107                  */
2108                 /* check the limits */
2109                 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2110                     (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2111                         return -EINVAL;
2112
2113                 /* store the value in ints/second */
2114                 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs;
2115
2116                 /* static value of interrupt rate */
2117                 adapter->tx_itr_setting = adapter->tx_eitr_param;
2118
2119                 /* clear the lower bit as its used for dynamic state */
2120                 adapter->tx_itr_setting &= ~1;
2121         } else if (ec->tx_coalesce_usecs == 1) {
2122                 /* 1 means dynamic mode */
2123                 adapter->tx_eitr_param = 10000;
2124                 adapter->tx_itr_setting = 1;
2125         } else {
2126                 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2127                 adapter->tx_itr_setting = 0;
2128         }
2129
2130         /* MSI/MSIx Interrupt Mode */
2131         if (adapter->flags &
2132             (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2133                 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2134                 for (i = 0; i < num_vectors; i++) {
2135                         q_vector = adapter->q_vector[i];
2136                         if (q_vector->txr_count && !q_vector->rxr_count)
2137                                 /* tx only */
2138                                 q_vector->eitr = adapter->tx_eitr_param;
2139                         else
2140                                 /* rx only or mixed */
2141                                 q_vector->eitr = adapter->rx_eitr_param;
2142                         ixgbe_write_eitr(q_vector);
2143                 }
2144         /* Legacy Interrupt Mode */
2145         } else {
2146                 q_vector = adapter->q_vector[0];
2147                 q_vector->eitr = adapter->rx_eitr_param;
2148                 ixgbe_write_eitr(q_vector);
2149         }
2150
2151         /*
2152          * do reset here at the end to make sure EITR==0 case is handled
2153          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2154          * also locks in RSC enable/disable which requires reset
2155          */
2156         if (need_reset) {
2157                 if (netif_running(netdev))
2158                         ixgbe_reinit_locked(adapter);
2159                 else
2160                         ixgbe_reset(adapter);
2161         }
2162
2163         return 0;
2164 }
2165
2166 static int ixgbe_set_flags(struct net_device *netdev, u32 data)
2167 {
2168         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2169         bool need_reset = false;
2170         int rc;
2171
2172 #ifdef CONFIG_IXGBE_DCB
2173         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
2174             !(data & ETH_FLAG_RXVLAN))
2175                 return -EINVAL;
2176 #endif
2177
2178         need_reset = (data & ETH_FLAG_RXVLAN) !=
2179                      (netdev->features & NETIF_F_HW_VLAN_RX);
2180
2181         rc = ethtool_op_set_flags(netdev, data, ETH_FLAG_LRO |
2182                                         ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN);
2183         if (rc)
2184                 return rc;
2185
2186         /* if state changes we need to update adapter->flags and reset */
2187         if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
2188             (!!(data & ETH_FLAG_LRO) !=
2189              !!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) {
2190                 if ((data & ETH_FLAG_LRO) &&
2191                     (!adapter->rx_itr_setting ||
2192                      (adapter->rx_itr_setting > IXGBE_MAX_RSC_INT_RATE))) {
2193                         e_info(probe, "rx-usecs set too low, "
2194                                       "not enabling RSC.\n");
2195                 } else {
2196                         adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
2197                         switch (adapter->hw.mac.type) {
2198                         case ixgbe_mac_82599EB:
2199                                 need_reset = true;
2200                                 break;
2201                         default:
2202                                 break;
2203                         }
2204                 }
2205         }
2206
2207         /*
2208          * Check if Flow Director n-tuple support was enabled or disabled.  If
2209          * the state changed, we need to reset.
2210          */
2211         if ((adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) &&
2212             (!(data & ETH_FLAG_NTUPLE))) {
2213                 /* turn off Flow Director perfect, set hash and reset */
2214                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2215                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2216                 need_reset = true;
2217         } else if ((!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) &&
2218                    (data & ETH_FLAG_NTUPLE)) {
2219                 /* turn off Flow Director hash, enable perfect and reset */
2220                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2221                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2222                 need_reset = true;
2223         } else {
2224                 /* no state change */
2225         }
2226
2227         if (need_reset) {
2228                 if (netif_running(netdev))
2229                         ixgbe_reinit_locked(adapter);
2230                 else
2231                         ixgbe_reset(adapter);
2232         }
2233
2234         return 0;
2235 }
2236
2237 static int ixgbe_set_rx_ntuple(struct net_device *dev,
2238                                struct ethtool_rx_ntuple *cmd)
2239 {
2240         struct ixgbe_adapter *adapter = netdev_priv(dev);
2241         struct ethtool_rx_ntuple_flow_spec fs = cmd->fs;
2242         struct ixgbe_atr_input input_struct;
2243         struct ixgbe_atr_input_masks input_masks;
2244         int target_queue;
2245
2246         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
2247                 return -EOPNOTSUPP;
2248
2249         /*
2250          * Don't allow programming if the action is a queue greater than
2251          * the number of online Tx queues.
2252          */
2253         if ((fs.action >= adapter->num_tx_queues) ||
2254             (fs.action < ETHTOOL_RXNTUPLE_ACTION_DROP))
2255                 return -EINVAL;
2256
2257         memset(&input_struct, 0, sizeof(struct ixgbe_atr_input));
2258         memset(&input_masks, 0, sizeof(struct ixgbe_atr_input_masks));
2259
2260         input_masks.src_ip_mask = fs.m_u.tcp_ip4_spec.ip4src;
2261         input_masks.dst_ip_mask = fs.m_u.tcp_ip4_spec.ip4dst;
2262         input_masks.src_port_mask = fs.m_u.tcp_ip4_spec.psrc;
2263         input_masks.dst_port_mask = fs.m_u.tcp_ip4_spec.pdst;
2264         input_masks.vlan_id_mask = fs.vlan_tag_mask;
2265         /* only use the lowest 2 bytes for flex bytes */
2266         input_masks.data_mask = (fs.data_mask & 0xffff);
2267
2268         switch (fs.flow_type) {
2269         case TCP_V4_FLOW:
2270                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_TCP);
2271                 break;
2272         case UDP_V4_FLOW:
2273                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_UDP);
2274                 break;
2275         case SCTP_V4_FLOW:
2276                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_SCTP);
2277                 break;
2278         default:
2279                 return -1;
2280         }
2281
2282         /* Mask bits from the inputs based on user-supplied mask */
2283         ixgbe_atr_set_src_ipv4_82599(&input_struct,
2284                     (fs.h_u.tcp_ip4_spec.ip4src & ~fs.m_u.tcp_ip4_spec.ip4src));
2285         ixgbe_atr_set_dst_ipv4_82599(&input_struct,
2286                     (fs.h_u.tcp_ip4_spec.ip4dst & ~fs.m_u.tcp_ip4_spec.ip4dst));
2287         /* 82599 expects these to be byte-swapped for perfect filtering */
2288         ixgbe_atr_set_src_port_82599(&input_struct,
2289                ((ntohs(fs.h_u.tcp_ip4_spec.psrc)) & ~fs.m_u.tcp_ip4_spec.psrc));
2290         ixgbe_atr_set_dst_port_82599(&input_struct,
2291                ((ntohs(fs.h_u.tcp_ip4_spec.pdst)) & ~fs.m_u.tcp_ip4_spec.pdst));
2292
2293         /* VLAN and Flex bytes are either completely masked or not */
2294         if (!fs.vlan_tag_mask)
2295                 ixgbe_atr_set_vlan_id_82599(&input_struct, fs.vlan_tag);
2296
2297         if (!input_masks.data_mask)
2298                 /* make sure we only use the first 2 bytes of user data */
2299                 ixgbe_atr_set_flex_byte_82599(&input_struct,
2300                                               (fs.data & 0xffff));
2301
2302         /* determine if we need to drop or route the packet */
2303         if (fs.action == ETHTOOL_RXNTUPLE_ACTION_DROP)
2304                 target_queue = MAX_RX_QUEUES - 1;
2305         else
2306                 target_queue = fs.action;
2307
2308         spin_lock(&adapter->fdir_perfect_lock);
2309         ixgbe_fdir_add_perfect_filter_82599(&adapter->hw, &input_struct,
2310                                             &input_masks, 0, target_queue);
2311         spin_unlock(&adapter->fdir_perfect_lock);
2312
2313         return 0;
2314 }
2315
2316 static const struct ethtool_ops ixgbe_ethtool_ops = {
2317         .get_settings           = ixgbe_get_settings,
2318         .set_settings           = ixgbe_set_settings,
2319         .get_drvinfo            = ixgbe_get_drvinfo,
2320         .get_regs_len           = ixgbe_get_regs_len,
2321         .get_regs               = ixgbe_get_regs,
2322         .get_wol                = ixgbe_get_wol,
2323         .set_wol                = ixgbe_set_wol,
2324         .nway_reset             = ixgbe_nway_reset,
2325         .get_link               = ethtool_op_get_link,
2326         .get_eeprom_len         = ixgbe_get_eeprom_len,
2327         .get_eeprom             = ixgbe_get_eeprom,
2328         .get_ringparam          = ixgbe_get_ringparam,
2329         .set_ringparam          = ixgbe_set_ringparam,
2330         .get_pauseparam         = ixgbe_get_pauseparam,
2331         .set_pauseparam         = ixgbe_set_pauseparam,
2332         .get_rx_csum            = ixgbe_get_rx_csum,
2333         .set_rx_csum            = ixgbe_set_rx_csum,
2334         .get_tx_csum            = ixgbe_get_tx_csum,
2335         .set_tx_csum            = ixgbe_set_tx_csum,
2336         .get_sg                 = ethtool_op_get_sg,
2337         .set_sg                 = ethtool_op_set_sg,
2338         .get_msglevel           = ixgbe_get_msglevel,
2339         .set_msglevel           = ixgbe_set_msglevel,
2340         .get_tso                = ethtool_op_get_tso,
2341         .set_tso                = ixgbe_set_tso,
2342         .self_test              = ixgbe_diag_test,
2343         .get_strings            = ixgbe_get_strings,
2344         .phys_id                = ixgbe_phys_id,
2345         .get_sset_count         = ixgbe_get_sset_count,
2346         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2347         .get_coalesce           = ixgbe_get_coalesce,
2348         .set_coalesce           = ixgbe_set_coalesce,
2349         .get_flags              = ethtool_op_get_flags,
2350         .set_flags              = ixgbe_set_flags,
2351         .set_rx_ntuple          = ixgbe_set_rx_ntuple,
2352 };
2353
2354 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2355 {
2356         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2357 }