drivers/net/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2010 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for ixgbe */
  29
  30 #include <linux/types.h>
  31 #include <linux/module.h>
  32 #include <linux/slab.h>
  33 #include <linux/pci.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/uaccess.h>
  38
  39 #include "ixgbe.h"
  40
  41
  42 #define IXGBE_ALL_RAR_ENTRIES 16
  43
  44 enum {NETDEV_STATS, IXGBE_STATS};
  45
  46 struct ixgbe_stats {
  47         char stat_string[ETH_GSTRING_LEN];
  48         int type;
  49         int sizeof_stat;
  50         int stat_offset;
  51 };
  52
  53 #define IXGBE_STAT(m)           IXGBE_STATS, \
  54                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  55                                 offsetof(struct ixgbe_adapter, m)
  56 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  57                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  58                                 offsetof(struct rtnl_link_stats64, m)
  59
  60 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
  61         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  62         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  63         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  64         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  65         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  66         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  67         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  68         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  69         {"lsc_int", IXGBE_STAT(lsc_int)},
  70         {"tx_busy", IXGBE_STAT(tx_busy)},
  71         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  72         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  73         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  74         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  75         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  76         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  77         {"broadcast", IXGBE_STAT(stats.bprc)},
  78         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  79         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  80         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  81         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  82         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  83         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  84         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  85         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  86         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  87         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  88         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  89         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  90         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  91         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  92         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  93         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  94         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
  95         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  96         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
  97         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
  98         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
  99         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 100         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 101         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 102         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 103         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 104         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 105 #ifdef IXGBE_FCOE
 106         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 107         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 108         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 109         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 110         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 111         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 112 #endif /* IXGBE_FCOE */
 113 };
 114
 115 #define IXGBE_QUEUE_STATS_LEN \
 116         ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
 117         ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
 118         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 119 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 120 #define IXGBE_PB_STATS_LEN ( \
 121                  (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
 122                  IXGBE_FLAG_DCB_ENABLED) ? \
 123                  (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 124                   sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 125                   sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 126                   sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 127                   / sizeof(u64) : 0)
 128 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 129                          IXGBE_PB_STATS_LEN + \
 130                          IXGBE_QUEUE_STATS_LEN)
 131
 132 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 133         "Register test  (offline)", "Eeprom test    (offline)",
 134         "Interrupt test (offline)", "Loopback test  (offline)",
 135         "Link test   (on/offline)"
 136 };
 137 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 138
 139 static int ixgbe_get_settings(struct net_device *netdev,
 140                               struct ethtool_cmd *ecmd)
 141 {
 142         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 143         struct ixgbe_hw *hw = &adapter->hw;
 144         u32 link_speed = 0;
 145         bool link_up;
 146
 147         ecmd->supported = SUPPORTED_10000baseT_Full;
 148         ecmd->autoneg = AUTONEG_ENABLE;
 149         ecmd->transceiver = XCVR_EXTERNAL;
 150         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 151             (hw->phy.multispeed_fiber)) {
 152                 ecmd->supported |= (SUPPORTED_1000baseT_Full |
 153                                     SUPPORTED_Autoneg);
 154
 155                 ecmd->advertising = ADVERTISED_Autoneg;
 156                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
 157                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 158                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
 159                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 160                 /*
 161                  * It's possible that phy.autoneg_advertised may not be
 162                  * set yet.  If so display what the default would be -
 163                  * both 1G and 10G supported.
 164                  */
 165                 if (!(ecmd->advertising & (ADVERTISED_1000baseT_Full |
 166                                            ADVERTISED_10000baseT_Full)))
 167                         ecmd->advertising |= (ADVERTISED_10000baseT_Full |
 168                                               ADVERTISED_1000baseT_Full);
 169
 170                 if (hw->phy.media_type == ixgbe_media_type_copper) {
 171                         ecmd->supported |= SUPPORTED_TP;
 172                         ecmd->advertising |= ADVERTISED_TP;
 173                         ecmd->port = PORT_TP;
 174                 } else {
 175                         ecmd->supported |= SUPPORTED_FIBRE;
 176                         ecmd->advertising |= ADVERTISED_FIBRE;
 177                         ecmd->port = PORT_FIBRE;
 178                 }
 179         } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
 180                 /* Set as FIBRE until SERDES defined in kernel */
 181                 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
 182                         ecmd->supported = (SUPPORTED_1000baseT_Full |
 183                                            SUPPORTED_FIBRE);
 184                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 185                                              ADVERTISED_FIBRE);
 186                         ecmd->port = PORT_FIBRE;
 187                         ecmd->autoneg = AUTONEG_DISABLE;
 188                 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE) ||
 189                            (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
 190                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 191                                             SUPPORTED_Autoneg |
 192                                             SUPPORTED_FIBRE);
 193                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 194                                              ADVERTISED_1000baseT_Full |
 195                                              ADVERTISED_Autoneg |
 196                                              ADVERTISED_FIBRE);
 197                         ecmd->port = PORT_FIBRE;
 198                 } else {
 199                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 200                                             SUPPORTED_FIBRE);
 201                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 202                                              ADVERTISED_1000baseT_Full |
 203                                              ADVERTISED_FIBRE);
 204                         ecmd->port = PORT_FIBRE;
 205                 }
 206         } else {
 207                 ecmd->supported |= SUPPORTED_FIBRE;
 208                 ecmd->advertising = (ADVERTISED_10000baseT_Full |
 209                                      ADVERTISED_FIBRE);
 210                 ecmd->port = PORT_FIBRE;
 211                 ecmd->autoneg = AUTONEG_DISABLE;
 212         }
 213
 214         /* Get PHY type */
 215         switch (adapter->hw.phy.type) {
 216         case ixgbe_phy_tn:
 217         case ixgbe_phy_cu_unknown:
 218                 /* Copper 10G-BASET */
 219                 ecmd->port = PORT_TP;
 220                 break;
 221         case ixgbe_phy_qt:
 222                 ecmd->port = PORT_FIBRE;
 223                 break;
 224         case ixgbe_phy_nl:
 225         case ixgbe_phy_sfp_passive_tyco:
 226         case ixgbe_phy_sfp_passive_unknown:
 227         case ixgbe_phy_sfp_ftl:
 228         case ixgbe_phy_sfp_avago:
 229         case ixgbe_phy_sfp_intel:
 230         case ixgbe_phy_sfp_unknown:
 231                 switch (adapter->hw.phy.sfp_type) {
 232                 /* SFP+ devices, further checking needed */
 233                 case ixgbe_sfp_type_da_cu:
 234                 case ixgbe_sfp_type_da_cu_core0:
 235                 case ixgbe_sfp_type_da_cu_core1:
 236                         ecmd->port = PORT_DA;
 237                         break;
 238                 case ixgbe_sfp_type_sr:
 239                 case ixgbe_sfp_type_lr:
 240                 case ixgbe_sfp_type_srlr_core0:
 241                 case ixgbe_sfp_type_srlr_core1:
 242                         ecmd->port = PORT_FIBRE;
 243                         break;
 244                 case ixgbe_sfp_type_not_present:
 245                         ecmd->port = PORT_NONE;
 246                         break;
 247                 case ixgbe_sfp_type_1g_cu_core0:
 248                 case ixgbe_sfp_type_1g_cu_core1:
 249                         ecmd->port = PORT_TP;
 250                         ecmd->supported = SUPPORTED_TP;
 251                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 252                                              ADVERTISED_TP);
 253                         break;
 254                 case ixgbe_sfp_type_unknown:
 255                 default:
 256                         ecmd->port = PORT_OTHER;
 257                         break;
 258                 }
 259                 break;
 260         case ixgbe_phy_xaui:
 261                 ecmd->port = PORT_NONE;
 262                 break;
 263         case ixgbe_phy_unknown:
 264         case ixgbe_phy_generic:
 265         case ixgbe_phy_sfp_unsupported:
 266         default:
 267                 ecmd->port = PORT_OTHER;
 268                 break;
 269         }
 270
 271         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 272         if (link_up) {
 273                 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
 274                                SPEED_10000 : SPEED_1000;
 275                 ecmd->duplex = DUPLEX_FULL;
 276         } else {
 277                 ecmd->speed = -1;
 278                 ecmd->duplex = -1;
 279         }
 280
 281         return 0;
 282 }
 283
 284 static int ixgbe_set_settings(struct net_device *netdev,
 285                               struct ethtool_cmd *ecmd)
 286 {
 287         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 288         struct ixgbe_hw *hw = &adapter->hw;
 289         u32 advertised, old;
 290         s32 err = 0;
 291
 292         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 293             (hw->phy.multispeed_fiber)) {
 294                 /* 10000/copper and 1000/copper must autoneg
 295                  * this function does not support any duplex forcing, but can
 296                  * limit the advertising of the adapter to only 10000 or 1000 */
 297                 if (ecmd->autoneg == AUTONEG_DISABLE)
 298                         return -EINVAL;
 299
 300                 old = hw->phy.autoneg_advertised;
 301                 advertised = 0;
 302                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 303                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 304
 305                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 306                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 307
 308                 if (old == advertised)
 309                         return err;
 310                 /* this sets the link speed and restarts auto-neg */
 311                 hw->mac.autotry_restart = true;
 312                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
 313                 if (err) {
 314                         e_info(probe, "setup link failed with code %d\n", err);
 315                         hw->mac.ops.setup_link(hw, old, true, true);
 316                 }
 317         } else {
 318                 /* in this case we currently only support 10Gb/FULL */
 319                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 320                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 321                     (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 322                         return -EINVAL;
 323         }
 324
 325         return err;
 326 }
 327
 328 static void ixgbe_get_pauseparam(struct net_device *netdev,
 329                                  struct ethtool_pauseparam *pause)
 330 {
 331         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 332         struct ixgbe_hw *hw = &adapter->hw;
 333
 334         /*
 335          * Flow Control Autoneg isn't on if
 336          *  - we didn't ask for it OR
 337          *  - it failed, we know this by tx & rx being off
 338          */
 339         if (hw->fc.disable_fc_autoneg ||
 340             (hw->fc.current_mode == ixgbe_fc_none))
 341                 pause->autoneg = 0;
 342         else
 343                 pause->autoneg = 1;
 344
 345         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 346                 pause->rx_pause = 1;
 347         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 348                 pause->tx_pause = 1;
 349         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 350                 pause->rx_pause = 1;
 351                 pause->tx_pause = 1;
 352 #ifdef CONFIG_DCB
 353         } else if (hw->fc.current_mode == ixgbe_fc_pfc) {
 354                 pause->rx_pause = 0;
 355                 pause->tx_pause = 0;
 356 #endif
 357         }
 358 }
 359
 360 static int ixgbe_set_pauseparam(struct net_device *netdev,
 361                                 struct ethtool_pauseparam *pause)
 362 {
 363         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 364         struct ixgbe_hw *hw = &adapter->hw;
 365         struct ixgbe_fc_info fc;
 366
 367 #ifdef CONFIG_DCB
 368         if (adapter->dcb_cfg.pfc_mode_enable ||
 369                 ((hw->mac.type == ixgbe_mac_82598EB) &&
 370                 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
 371                 return -EINVAL;
 372
 373 #endif
 374         fc = hw->fc;
 375
 376         if (pause->autoneg != AUTONEG_ENABLE)
 377                 fc.disable_fc_autoneg = true;
 378         else
 379                 fc.disable_fc_autoneg = false;
 380
 381         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 382                 fc.requested_mode = ixgbe_fc_full;
 383         else if (pause->rx_pause && !pause->tx_pause)
 384                 fc.requested_mode = ixgbe_fc_rx_pause;
 385         else if (!pause->rx_pause && pause->tx_pause)
 386                 fc.requested_mode = ixgbe_fc_tx_pause;
 387         else if (!pause->rx_pause && !pause->tx_pause)
 388                 fc.requested_mode = ixgbe_fc_none;
 389         else
 390                 return -EINVAL;
 391
 392 #ifdef CONFIG_DCB
 393         adapter->last_lfc_mode = fc.requested_mode;
 394 #endif
 395
 396         /* if the thing changed then we'll update and use new autoneg */
 397         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 398                 hw->fc = fc;
 399                 if (netif_running(netdev))
 400                         ixgbe_reinit_locked(adapter);
 401                 else
 402                         ixgbe_reset(adapter);
 403         }
 404
 405         return 0;
 406 }
 407
 408 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
 409 {
 410         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 411         return adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED;
 412 }
 413
 414 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
 415 {
 416         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 417         if (data)
 418                 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
 419         else
 420                 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
 421
 422         return 0;
 423 }
 424
 425 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
 426 {
 427         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 428 }
 429
 430 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
 431 {
 432         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 433
 434         if (data) {
 435                 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
 436                 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
 437                         netdev->features |= NETIF_F_SCTP_CSUM;
 438         } else {
 439                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
 440                                       NETIF_F_SCTP_CSUM);
 441         }
 442
 443         return 0;
 444 }
 445
 446 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
 447 {
 448         if (data) {
 449                 netdev->features |= NETIF_F_TSO;
 450                 netdev->features |= NETIF_F_TSO6;
 451         } else {
 452                 netdev->features &= ~NETIF_F_TSO;
 453                 netdev->features &= ~NETIF_F_TSO6;
 454         }
 455         return 0;
 456 }
 457
 458 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 459 {
 460         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 461         return adapter->msg_enable;
 462 }
 463
 464 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 465 {
 466         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 467         adapter->msg_enable = data;
 468 }
 469
 470 static int ixgbe_get_regs_len(struct net_device *netdev)
 471 {
 472 #define IXGBE_REGS_LEN  1128
 473         return IXGBE_REGS_LEN * sizeof(u32);
 474 }
 475
 476 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 477
 478 static void ixgbe_get_regs(struct net_device *netdev,
 479                            struct ethtool_regs *regs, void *p)
 480 {
 481         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 482         struct ixgbe_hw *hw = &adapter->hw;
 483         u32 *regs_buff = p;
 484         u8 i;
 485
 486         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 487
 488         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
 489
 490         /* General Registers */
 491         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 492         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 493         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 494         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 495         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 496         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 497         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 498         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 499
 500         /* NVM Register */
 501         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 502         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 503         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 504         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 505         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 506         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 507         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 508         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 509         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 510         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 511
 512         /* Interrupt */
 513         /* don't read EICR because it can clear interrupt causes, instead
 514          * read EICS which is a shadow but doesn't clear EICR */
 515         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 516         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 517         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 518         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 519         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 520         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 521         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 522         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 523         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 524         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 525         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 526         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 527
 528         /* Flow Control */
 529         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 530         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 531         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 532         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 533         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 534         for (i = 0; i < 8; i++) {
 535                 switch (hw->mac.type) {
 536                 case ixgbe_mac_82598EB:
 537                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 538                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 539                         break;
 540                 case ixgbe_mac_82599EB:
 541                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 542                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 543                         break;
 544                 default:
 545                         break;
 546                 }
 547         }
 548         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 549         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 550
 551         /* Receive DMA */
 552         for (i = 0; i < 64; i++)
 553                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 554         for (i = 0; i < 64; i++)
 555                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 556         for (i = 0; i < 64; i++)
 557                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 558         for (i = 0; i < 64; i++)
 559                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 560         for (i = 0; i < 64; i++)
 561                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 562         for (i = 0; i < 64; i++)
 563                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 564         for (i = 0; i < 16; i++)
 565                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 566         for (i = 0; i < 16; i++)
 567                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 568         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 569         for (i = 0; i < 8; i++)
 570                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 571         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 572         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 573
 574         /* Receive */
 575         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 576         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 577         for (i = 0; i < 16; i++)
 578                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 579         for (i = 0; i < 16; i++)
 580                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 581         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 582         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 583         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 584         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 585         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 586         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 587         for (i = 0; i < 8; i++)
 588                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 589         for (i = 0; i < 8; i++)
 590                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 591         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 592
 593         /* Transmit */
 594         for (i = 0; i < 32; i++)
 595                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 596         for (i = 0; i < 32; i++)
 597                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 598         for (i = 0; i < 32; i++)
 599                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 600         for (i = 0; i < 32; i++)
 601                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 602         for (i = 0; i < 32; i++)
 603                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 604         for (i = 0; i < 32; i++)
 605                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 606         for (i = 0; i < 32; i++)
 607                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 608         for (i = 0; i < 32; i++)
 609                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 610         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 611         for (i = 0; i < 16; i++)
 612                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 613         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 614         for (i = 0; i < 8; i++)
 615                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 616         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 617
 618         /* Wake Up */
 619         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 620         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 621         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 622         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 623         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 624         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 625         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 626         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 627         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 628
 629         /* DCB */
 630         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
 631         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 632         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
 633         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 634         for (i = 0; i < 8; i++)
 635                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 636         for (i = 0; i < 8; i++)
 637                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 638         for (i = 0; i < 8; i++)
 639                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 640         for (i = 0; i < 8; i++)
 641                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 642         for (i = 0; i < 8; i++)
 643                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
 644         for (i = 0; i < 8; i++)
 645                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
 646
 647         /* Statistics */
 648         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 649         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 650         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 651         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 652         for (i = 0; i < 8; i++)
 653                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 654         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 655         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 656         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 657         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 658         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 659         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 660         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 661         for (i = 0; i < 8; i++)
 662                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 663         for (i = 0; i < 8; i++)
 664                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 665         for (i = 0; i < 8; i++)
 666                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 667         for (i = 0; i < 8; i++)
 668                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 669         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 670         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 671         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 672         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 673         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 674         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 675         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 676         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 677         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 678         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 679         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 680         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 681         for (i = 0; i < 8; i++)
 682                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 683         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 684         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 685         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 686         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 687         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 688         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 689         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 690         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 691         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 692         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 693         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 694         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 695         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 696         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 697         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 698         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 699         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 700         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 701         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 702         for (i = 0; i < 16; i++)
 703                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 704         for (i = 0; i < 16; i++)
 705                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 706         for (i = 0; i < 16; i++)
 707                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 708         for (i = 0; i < 16; i++)
 709                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 710
 711         /* MAC */
 712         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 713         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 714         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 715         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 716         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 717         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 718         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 719         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 720         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 721         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 722         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 723         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 724         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 725         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 726         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 727         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 728         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 729         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 730         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 731         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 732         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 733         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 734         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 735         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 736         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 737         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 738         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 739         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 740         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 741         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 742         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 743         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 744         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 745
 746         /* Diagnostic */
 747         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 748         for (i = 0; i < 8; i++)
 749                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 750         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 751         for (i = 0; i < 4; i++)
 752                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 753         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 754         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 755         for (i = 0; i < 8; i++)
 756                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 757         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 758         for (i = 0; i < 4; i++)
 759                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 760         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 761         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 762         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 763         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 764         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 765         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 766         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 767         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 768         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 769         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 770         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 771         for (i = 0; i < 8; i++)
 772                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 773         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 774         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 775         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 776         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 777         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 778         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 779         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 780         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 781         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 782 }
 783
 784 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 785 {
 786         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 787         return adapter->hw.eeprom.word_size * 2;
 788 }
 789
 790 static int ixgbe_get_eeprom(struct net_device *netdev,
 791                             struct ethtool_eeprom *eeprom, u8 *bytes)
 792 {
 793         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 794         struct ixgbe_hw *hw = &adapter->hw;
 795         u16 *eeprom_buff;
 796         int first_word, last_word, eeprom_len;
 797         int ret_val = 0;
 798         u16 i;
 799
 800         if (eeprom->len == 0)
 801                 return -EINVAL;
 802
 803         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 804
 805         first_word = eeprom->offset >> 1;
 806         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 807         eeprom_len = last_word - first_word + 1;
 808
 809         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 810         if (!eeprom_buff)
 811                 return -ENOMEM;
 812
 813         for (i = 0; i < eeprom_len; i++) {
 814                 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
 815                     &eeprom_buff[i])))
 816                         break;
 817         }
 818
 819         /* Device's eeprom is always little-endian, word addressable */
 820         for (i = 0; i < eeprom_len; i++)
 821                 le16_to_cpus(&eeprom_buff[i]);
 822
 823         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 824         kfree(eeprom_buff);
 825
 826         return ret_val;
 827 }
 828
 829 static void ixgbe_get_drvinfo(struct net_device *netdev,
 830                               struct ethtool_drvinfo *drvinfo)
 831 {
 832         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 833         char firmware_version[32];
 834
 835         strncpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
 836         strncpy(drvinfo->version, ixgbe_driver_version,
 837                 sizeof(drvinfo->version));
 838
 839         snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
 840                  (adapter->eeprom_version & 0xF000) >> 12,
 841                  (adapter->eeprom_version & 0x0FF0) >> 4,
 842                  adapter->eeprom_version & 0x000F);
 843
 844         strncpy(drvinfo->fw_version, firmware_version,
 845                 sizeof(drvinfo->fw_version));
 846         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
 847                 sizeof(drvinfo->bus_info));
 848         drvinfo->n_stats = IXGBE_STATS_LEN;
 849         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 850         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 851 }
 852
 853 static void ixgbe_get_ringparam(struct net_device *netdev,
 854                                 struct ethtool_ringparam *ring)
 855 {
 856         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 857         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 858         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 859
 860         ring->rx_max_pending = IXGBE_MAX_RXD;
 861         ring->tx_max_pending = IXGBE_MAX_TXD;
 862         ring->rx_mini_max_pending = 0;
 863         ring->rx_jumbo_max_pending = 0;
 864         ring->rx_pending = rx_ring->count;
 865         ring->tx_pending = tx_ring->count;
 866         ring->rx_mini_pending = 0;
 867         ring->rx_jumbo_pending = 0;
 868 }
 869
 870 static int ixgbe_set_ringparam(struct net_device *netdev,
 871                                struct ethtool_ringparam *ring)
 872 {
 873         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 874         struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
 875         int i, err = 0;
 876         u32 new_rx_count, new_tx_count;
 877         bool need_update = false;
 878
 879         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 880                 return -EINVAL;
 881
 882         new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
 883         new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
 884         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 885
 886         new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
 887         new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
 888         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 889
 890         if ((new_tx_count == adapter->tx_ring[0]->count) &&
 891             (new_rx_count == adapter->rx_ring[0]->count)) {
 892                 /* nothing to do */
 893                 return 0;
 894         }
 895
 896         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 897                 msleep(1);
 898
 899         if (!netif_running(adapter->netdev)) {
 900                 for (i = 0; i < adapter->num_tx_queues; i++)
 901                         adapter->tx_ring[i]->count = new_tx_count;
 902                 for (i = 0; i < adapter->num_rx_queues; i++)
 903                         adapter->rx_ring[i]->count = new_rx_count;
 904                 adapter->tx_ring_count = new_tx_count;
 905                 adapter->rx_ring_count = new_rx_count;
 906                 goto clear_reset;
 907         }
 908
 909         temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
 910         if (!temp_tx_ring) {
 911                 err = -ENOMEM;
 912                 goto clear_reset;
 913         }
 914
 915         if (new_tx_count != adapter->tx_ring_count) {
 916                 for (i = 0; i < adapter->num_tx_queues; i++) {
 917                         memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
 918                                sizeof(struct ixgbe_ring));
 919                         temp_tx_ring[i].count = new_tx_count;
 920                         err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);
 921                         if (err) {
 922                                 while (i) {
 923                                         i--;
 924                                         ixgbe_free_tx_resources(&temp_tx_ring[i]);
 925                                 }
 926                                 goto clear_reset;
 927                         }
 928                 }
 929                 need_update = true;
 930         }
 931
 932         temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
 933         if (!temp_rx_ring) {
 934                 err = -ENOMEM;
 935                 goto err_setup;
 936         }
 937
 938         if (new_rx_count != adapter->rx_ring_count) {
 939                 for (i = 0; i < adapter->num_rx_queues; i++) {
 940                         memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
 941                                sizeof(struct ixgbe_ring));
 942                         temp_rx_ring[i].count = new_rx_count;
 943                         err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);
 944                         if (err) {
 945                                 while (i) {
 946                                         i--;
 947                                         ixgbe_free_rx_resources(&temp_rx_ring[i]);
 948                                 }
 949                                 goto err_setup;
 950                         }
 951                 }
 952                 need_update = true;
 953         }
 954
 955         /* if rings need to be updated, here's the place to do it in one shot */
 956         if (need_update) {
 957                 ixgbe_down(adapter);
 958
 959                 /* tx */
 960                 if (new_tx_count != adapter->tx_ring_count) {
 961                         for (i = 0; i < adapter->num_tx_queues; i++) {
 962                                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
 963                                 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
 964                                        sizeof(struct ixgbe_ring));
 965                         }
 966                         adapter->tx_ring_count = new_tx_count;
 967                 }
 968
 969                 /* rx */
 970                 if (new_rx_count != adapter->rx_ring_count) {
 971                         for (i = 0; i < adapter->num_rx_queues; i++) {
 972                                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
 973                                 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
 974                                        sizeof(struct ixgbe_ring));
 975                         }
 976                         adapter->rx_ring_count = new_rx_count;
 977                 }
 978                 ixgbe_up(adapter);
 979         }
 980
 981         vfree(temp_rx_ring);
 982 err_setup:
 983         vfree(temp_tx_ring);
 984 clear_reset:
 985         clear_bit(__IXGBE_RESETTING, &adapter->state);
 986         return err;
 987 }
 988
 989 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
 990 {
 991         switch (sset) {
 992         case ETH_SS_TEST:
 993                 return IXGBE_TEST_LEN;
 994         case ETH_SS_STATS:
 995                 return IXGBE_STATS_LEN;
 996         case ETH_SS_NTUPLE_FILTERS:
 997                 return ETHTOOL_MAX_NTUPLE_LIST_ENTRY *
 998                        ETHTOOL_MAX_NTUPLE_STRING_PER_ENTRY;
 999         default:
1000                 return -EOPNOTSUPP;
1001         }
1002 }
1003
1004 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1005                                     struct ethtool_stats *stats, u64 *data)
1006 {
1007         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1008         struct rtnl_link_stats64 temp;
1009         const struct rtnl_link_stats64 *net_stats;
1010         unsigned int start;
1011         struct ixgbe_ring *ring;
1012         int i, j;
1013         char *p = NULL;
1014
1015         ixgbe_update_stats(adapter);
1016         net_stats = dev_get_stats(netdev, &temp);
1017         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1018                 switch (ixgbe_gstrings_stats[i].type) {
1019                 case NETDEV_STATS:
1020                         p = (char *) net_stats +
1021                                         ixgbe_gstrings_stats[i].stat_offset;
1022                         break;
1023                 case IXGBE_STATS:
1024                         p = (char *) adapter +
1025                                         ixgbe_gstrings_stats[i].stat_offset;
1026                         break;
1027                 }
1028
1029                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1030                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1031         }
1032         for (j = 0; j < adapter->num_tx_queues; j++) {
1033                 ring = adapter->tx_ring[j];
1034                 do {
1035                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1036                         data[i]   = ring->stats.packets;
1037                         data[i+1] = ring->stats.bytes;
1038                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1039                 i += 2;
1040         }
1041         for (j = 0; j < adapter->num_rx_queues; j++) {
1042                 ring = adapter->rx_ring[j];
1043                 do {
1044                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1045                         data[i]   = ring->stats.packets;
1046                         data[i+1] = ring->stats.bytes;
1047                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1048                 i += 2;
1049         }
1050         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1051                 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1052                         data[i++] = adapter->stats.pxontxc[j];
1053                         data[i++] = adapter->stats.pxofftxc[j];
1054                 }
1055                 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1056                         data[i++] = adapter->stats.pxonrxc[j];
1057                         data[i++] = adapter->stats.pxoffrxc[j];
1058                 }
1059         }
1060 }
1061
1062 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1063                               u8 *data)
1064 {
1065         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1066         char *p = (char *)data;
1067         int i;
1068
1069         switch (stringset) {
1070         case ETH_SS_TEST:
1071                 memcpy(data, *ixgbe_gstrings_test,
1072                        IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1073                 break;
1074         case ETH_SS_STATS:
1075                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1076                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1077                                ETH_GSTRING_LEN);
1078                         p += ETH_GSTRING_LEN;
1079                 }
1080                 for (i = 0; i < adapter->num_tx_queues; i++) {
1081                         sprintf(p, "tx_queue_%u_packets", i);
1082                         p += ETH_GSTRING_LEN;
1083                         sprintf(p, "tx_queue_%u_bytes", i);
1084                         p += ETH_GSTRING_LEN;
1085                 }
1086                 for (i = 0; i < adapter->num_rx_queues; i++) {
1087                         sprintf(p, "rx_queue_%u_packets", i);
1088                         p += ETH_GSTRING_LEN;
1089                         sprintf(p, "rx_queue_%u_bytes", i);
1090                         p += ETH_GSTRING_LEN;
1091                 }
1092                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1093                         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1094                                 sprintf(p, "tx_pb_%u_pxon", i);
1095                                 p += ETH_GSTRING_LEN;
1096                                 sprintf(p, "tx_pb_%u_pxoff", i);
1097                                 p += ETH_GSTRING_LEN;
1098                         }
1099                         for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1100                                 sprintf(p, "rx_pb_%u_pxon", i);
1101                                 p += ETH_GSTRING_LEN;
1102                                 sprintf(p, "rx_pb_%u_pxoff", i);
1103                                 p += ETH_GSTRING_LEN;
1104                         }
1105                 }
1106                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1107                 break;
1108         }
1109 }
1110
1111 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1112 {
1113         struct ixgbe_hw *hw = &adapter->hw;
1114         bool link_up;
1115         u32 link_speed = 0;
1116         *data = 0;
1117
1118         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1119         if (link_up)
1120                 return *data;
1121         else
1122                 *data = 1;
1123         return *data;
1124 }
1125
1126 /* ethtool register test data */
1127 struct ixgbe_reg_test {
1128         u16 reg;
1129         u8  array_len;
1130         u8  test_type;
1131         u32 mask;
1132         u32 write;
1133 };
1134
1135 /* In the hardware, registers are laid out either singly, in arrays
1136  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1137  * most tests take place on arrays or single registers (handled
1138  * as a single-element array) and special-case the tables.
1139  * Table tests are always pattern tests.
1140  *
1141  * We also make provision for some required setup steps by specifying
1142  * registers to be written without any read-back testing.
1143  */
1144
1145 #define PATTERN_TEST    1
1146 #define SET_READ_TEST   2
1147 #define WRITE_NO_TEST   3
1148 #define TABLE32_TEST    4
1149 #define TABLE64_TEST_LO 5
1150 #define TABLE64_TEST_HI 6
1151
1152 /* default 82599 register test */
1153 static struct ixgbe_reg_test reg_test_82599[] = {
1154         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1155         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1156         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1157         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1158         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1159         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1160         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1161         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1162         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1163         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1164         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1165         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1166         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1167         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1168         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1169         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1170         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1171         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1172         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1173         { 0, 0, 0, 0 }
1174 };
1175
1176 /* default 82598 register test */
1177 static struct ixgbe_reg_test reg_test_82598[] = {
1178         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1179         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1180         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1181         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1182         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1183         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1184         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1185         /* Enable all four RX queues before testing. */
1186         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1187         /* RDH is read-only for 82598, only test RDT. */
1188         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1189         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1190         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1191         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1192         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1193         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1194         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1195         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1196         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1197         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1198         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1199         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1200         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1201         { 0, 0, 0, 0 }
1202 };
1203
1204 #define REG_PATTERN_TEST(R, M, W)                                             \
1205 {                                                                             \
1206         u32 pat, val, before;                                                 \
1207         const u32 _test[] = {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
1208         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {                       \
1209                 before = readl(adapter->hw.hw_addr + R);                      \
1210                 writel((_test[pat] & W), (adapter->hw.hw_addr + R));          \
1211                 val = readl(adapter->hw.hw_addr + R);                         \
1212                 if (val != (_test[pat] & W & M)) {                            \
1213                         e_err(drv, "pattern test reg %04X failed: got "   \
1214                               "0x%08X expected 0x%08X\n",                     \
1215                               R, val, (_test[pat] & W & M));                \
1216                         *data = R;                                            \
1217                         writel(before, adapter->hw.hw_addr + R);              \
1218                         return 1;                                             \
1219                 }                                                             \
1220                 writel(before, adapter->hw.hw_addr + R);                      \
1221         }                                                                     \
1222 }
1223
1224 #define REG_SET_AND_CHECK(R, M, W)                                            \
1225 {                                                                             \
1226         u32 val, before;                                                      \
1227         before = readl(adapter->hw.hw_addr + R);                              \
1228         writel((W & M), (adapter->hw.hw_addr + R));                           \
1229         val = readl(adapter->hw.hw_addr + R);                                 \
1230         if ((W & M) != (val & M)) {                                           \
1231                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "  \
1232                       "expected 0x%08X\n", R, (val & M), (W & M));        \
1233                 *data = R;                                                    \
1234                 writel(before, (adapter->hw.hw_addr + R));                    \
1235                 return 1;                                                     \
1236         }                                                                     \
1237         writel(before, (adapter->hw.hw_addr + R));                            \
1238 }
1239
1240 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1241 {
1242         struct ixgbe_reg_test *test;
1243         u32 value, before, after;
1244         u32 i, toggle;
1245
1246         switch (adapter->hw.mac.type) {
1247         case ixgbe_mac_82598EB:
1248                 toggle = 0x7FFFF3FF;
1249                 test = reg_test_82598;
1250                 break;
1251         case ixgbe_mac_82599EB:
1252                 toggle = 0x7FFFF30F;
1253                 test = reg_test_82599;
1254                 break;
1255         default:
1256                 *data = 1;
1257                 return 1;
1258                 break;
1259         }
1260
1261         /*
1262          * Because the status register is such a special case,
1263          * we handle it separately from the rest of the register
1264          * tests.  Some bits are read-only, some toggle, and some
1265          * are writeable on newer MACs.
1266          */
1267         before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1268         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1269         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1270         after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1271         if (value != after) {
1272                 e_err(drv, "failed STATUS register test got: 0x%08X "
1273                       "expected: 0x%08X\n", after, value);
1274                 *data = 1;
1275                 return 1;
1276         }
1277         /* restore previous status */
1278         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1279
1280         /*
1281          * Perform the remainder of the register test, looping through
1282          * the test table until we either fail or reach the null entry.
1283          */
1284         while (test->reg) {
1285                 for (i = 0; i < test->array_len; i++) {
1286                         switch (test->test_type) {
1287                         case PATTERN_TEST:
1288                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1289                                                 test->mask,
1290                                                 test->write);
1291                                 break;
1292                         case SET_READ_TEST:
1293                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1294                                                 test->mask,
1295                                                 test->write);
1296                                 break;
1297                         case WRITE_NO_TEST:
1298                                 writel(test->write,
1299                                        (adapter->hw.hw_addr + test->reg)
1300                                        + (i * 0x40));
1301                                 break;
1302                         case TABLE32_TEST:
1303                                 REG_PATTERN_TEST(test->reg + (i * 4),
1304                                                 test->mask,
1305                                                 test->write);
1306                                 break;
1307                         case TABLE64_TEST_LO:
1308                                 REG_PATTERN_TEST(test->reg + (i * 8),
1309                                                 test->mask,
1310                                                 test->write);
1311                                 break;
1312                         case TABLE64_TEST_HI:
1313                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1314                                                 test->mask,
1315                                                 test->write);
1316                                 break;
1317                         }
1318                 }
1319                 test++;
1320         }
1321
1322         *data = 0;
1323         return 0;
1324 }
1325
1326 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1327 {
1328         struct ixgbe_hw *hw = &adapter->hw;
1329         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1330                 *data = 1;
1331         else
1332                 *data = 0;
1333         return *data;
1334 }
1335
1336 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1337 {
1338         struct net_device *netdev = (struct net_device *) data;
1339         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1340
1341         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1342
1343         return IRQ_HANDLED;
1344 }
1345
1346 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1347 {
1348         struct net_device *netdev = adapter->netdev;
1349         u32 mask, i = 0, shared_int = true;
1350         u32 irq = adapter->pdev->irq;
1351
1352         *data = 0;
1353
1354         /* Hook up test interrupt handler just for this test */
1355         if (adapter->msix_entries) {
1356                 /* NOTE: we don't test MSI-X interrupts here, yet */
1357                 return 0;
1358         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1359                 shared_int = false;
1360                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1361                                 netdev)) {
1362                         *data = 1;
1363                         return -1;
1364                 }
1365         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1366                                 netdev->name, netdev)) {
1367                 shared_int = false;
1368         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1369                                netdev->name, netdev)) {
1370                 *data = 1;
1371                 return -1;
1372         }
1373         e_info(hw, "testing %s interrupt\n", shared_int ?
1374                "shared" : "unshared");
1375
1376         /* Disable all the interrupts */
1377         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1378         msleep(10);
1379
1380         /* Test each interrupt */
1381         for (; i < 10; i++) {
1382                 /* Interrupt to test */
1383                 mask = 1 << i;
1384
1385                 if (!shared_int) {
1386                         /*
1387                          * Disable the interrupts to be reported in
1388                          * the cause register and then force the same
1389                          * interrupt and see if one gets posted.  If
1390                          * an interrupt was posted to the bus, the
1391                          * test failed.
1392                          */
1393                         adapter->test_icr = 0;
1394                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1395                                         ~mask & 0x00007FFF);
1396                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1397                                         ~mask & 0x00007FFF);
1398                         msleep(10);
1399
1400                         if (adapter->test_icr & mask) {
1401                                 *data = 3;
1402                                 break;
1403                         }
1404                 }
1405
1406                 /*
1407                  * Enable the interrupt to be reported in the cause
1408                  * register and then force the same interrupt and see
1409                  * if one gets posted.  If an interrupt was not posted
1410                  * to the bus, the test failed.
1411                  */
1412                 adapter->test_icr = 0;
1413                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1414                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1415                 msleep(10);
1416
1417                 if (!(adapter->test_icr &mask)) {
1418                         *data = 4;
1419                         break;
1420                 }
1421
1422                 if (!shared_int) {
1423                         /*
1424                          * Disable the other interrupts to be reported in
1425                          * the cause register and then force the other
1426                          * interrupts and see if any get posted.  If
1427                          * an interrupt was posted to the bus, the
1428                          * test failed.
1429                          */
1430                         adapter->test_icr = 0;
1431                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1432                                         ~mask & 0x00007FFF);
1433                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1434                                         ~mask & 0x00007FFF);
1435                         msleep(10);
1436
1437                         if (adapter->test_icr) {
1438                                 *data = 5;
1439                                 break;
1440                         }
1441                 }
1442         }
1443
1444         /* Disable all the interrupts */
1445         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1446         msleep(10);
1447
1448         /* Unhook test interrupt handler */
1449         free_irq(irq, netdev);
1450
1451         return *data;
1452 }
1453
1454 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1455 {
1456         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1457         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1458         struct ixgbe_hw *hw = &adapter->hw;
1459         u32 reg_ctl;
1460
1461         /* shut down the DMA engines now so they can be reinitialized later */
1462
1463         /* first Rx */
1464         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1465         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1466         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1467         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rx_ring->reg_idx));
1468         reg_ctl &= ~IXGBE_RXDCTL_ENABLE;
1469         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rx_ring->reg_idx), reg_ctl);
1470
1471         /* now Tx */
1472         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1473         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1474         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1475
1476         switch (hw->mac.type) {
1477         case ixgbe_mac_82599EB:
1478                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1479                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1480                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1481                 break;
1482         default:
1483                 break;
1484         }
1485
1486         ixgbe_reset(adapter);
1487
1488         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1489         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1490 }
1491
1492 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1493 {
1494         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1495         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1496         u32 rctl, reg_data;
1497         int ret_val;
1498         int err;
1499
1500         /* Setup Tx descriptor ring and Tx buffers */
1501         tx_ring->count = IXGBE_DEFAULT_TXD;
1502         tx_ring->queue_index = 0;
1503         tx_ring->dev = &adapter->pdev->dev;
1504         tx_ring->netdev = adapter->netdev;
1505         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1506         tx_ring->numa_node = adapter->node;
1507
1508         err = ixgbe_setup_tx_resources(tx_ring);
1509         if (err)
1510                 return 1;
1511
1512         switch (adapter->hw.mac.type) {
1513         case ixgbe_mac_82599EB:
1514                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1515                 reg_data |= IXGBE_DMATXCTL_TE;
1516                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1517                 break;
1518         default:
1519                 break;
1520         }
1521
1522         ixgbe_configure_tx_ring(adapter, tx_ring);
1523
1524         /* Setup Rx Descriptor ring and Rx buffers */
1525         rx_ring->count = IXGBE_DEFAULT_RXD;
1526         rx_ring->queue_index = 0;
1527         rx_ring->dev = &adapter->pdev->dev;
1528         rx_ring->netdev = adapter->netdev;
1529         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1530         rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048;
1531         rx_ring->numa_node = adapter->node;
1532
1533         err = ixgbe_setup_rx_resources(rx_ring);
1534         if (err) {
1535                 ret_val = 4;
1536                 goto err_nomem;
1537         }
1538
1539         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1540         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1541
1542         ixgbe_configure_rx_ring(adapter, rx_ring);
1543
1544         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1545         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1546
1547         return 0;
1548
1549 err_nomem:
1550         ixgbe_free_desc_rings(adapter);
1551         return ret_val;
1552 }
1553
1554 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1555 {
1556         struct ixgbe_hw *hw = &adapter->hw;
1557         u32 reg_data;
1558
1559         /* right now we only support MAC loopback in the driver */
1560         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1561         /* Setup MAC loopback */
1562         reg_data |= IXGBE_HLREG0_LPBK;
1563         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1564
1565         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1566         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1567         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_data);
1568
1569         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_AUTOC);
1570         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1571         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1572         IXGBE_WRITE_REG(&adapter->hw, IXGBE_AUTOC, reg_data);
1573         IXGBE_WRITE_FLUSH(&adapter->hw);
1574         msleep(10);
1575
1576         /* Disable Atlas Tx lanes; re-enabled in reset path */
1577         if (hw->mac.type == ixgbe_mac_82598EB) {
1578                 u8 atlas;
1579
1580                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1581                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1582                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1583
1584                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1585                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1586                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1587
1588                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1589                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1590                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1591
1592                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1593                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1594                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1595         }
1596
1597         return 0;
1598 }
1599
1600 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1601 {
1602         u32 reg_data;
1603
1604         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1605         reg_data &= ~IXGBE_HLREG0_LPBK;
1606         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1607 }
1608
1609 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1610                                       unsigned int frame_size)
1611 {
1612         memset(skb->data, 0xFF, frame_size);
1613         frame_size &= ~1;
1614         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1615         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1616         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1617 }
1618
1619 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1620                                     unsigned int frame_size)
1621 {
1622         frame_size &= ~1;
1623         if (*(skb->data + 3) == 0xFF) {
1624                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1625                     (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1626                         return 0;
1627                 }
1628         }
1629         return 13;
1630 }
1631
1632 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1633                                   struct ixgbe_ring *tx_ring,
1634                                   unsigned int size)
1635 {
1636         union ixgbe_adv_rx_desc *rx_desc;
1637         struct ixgbe_rx_buffer *rx_buffer_info;
1638         struct ixgbe_tx_buffer *tx_buffer_info;
1639         const int bufsz = rx_ring->rx_buf_len;
1640         u32 staterr;
1641         u16 rx_ntc, tx_ntc, count = 0;
1642
1643         /* initialize next to clean and descriptor values */
1644         rx_ntc = rx_ring->next_to_clean;
1645         tx_ntc = tx_ring->next_to_clean;
1646         rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1647         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1648
1649         while (staterr & IXGBE_RXD_STAT_DD) {
1650                 /* check Rx buffer */
1651                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1652
1653                 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1654                 dma_unmap_single(rx_ring->dev,
1655                                  rx_buffer_info->dma,
1656                                  bufsz,
1657                                  DMA_FROM_DEVICE);
1658                 rx_buffer_info->dma = 0;
1659
1660                 /* verify contents of skb */
1661                 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1662                         count++;
1663
1664                 /* unmap buffer on Tx side */
1665                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1666                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1667
1668                 /* increment Rx/Tx next to clean counters */
1669                 rx_ntc++;
1670                 if (rx_ntc == rx_ring->count)
1671                         rx_ntc = 0;
1672                 tx_ntc++;
1673                 if (tx_ntc == tx_ring->count)
1674                         tx_ntc = 0;
1675
1676                 /* fetch next descriptor */
1677                 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1678                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1679         }
1680
1681         /* re-map buffers to ring, store next to clean values */
1682         ixgbe_alloc_rx_buffers(rx_ring, count);
1683         rx_ring->next_to_clean = rx_ntc;
1684         tx_ring->next_to_clean = tx_ntc;
1685
1686         return count;
1687 }
1688
1689 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1690 {
1691         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1692         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1693         int i, j, lc, good_cnt, ret_val = 0;
1694         unsigned int size = 1024;
1695         netdev_tx_t tx_ret_val;
1696         struct sk_buff *skb;
1697
1698         /* allocate test skb */
1699         skb = alloc_skb(size, GFP_KERNEL);
1700         if (!skb)
1701                 return 11;
1702
1703         /* place data into test skb */
1704         ixgbe_create_lbtest_frame(skb, size);
1705         skb_put(skb, size);
1706
1707         /*
1708          * Calculate the loop count based on the largest descriptor ring
1709          * The idea is to wrap the largest ring a number of times using 64
1710          * send/receive pairs during each loop
1711          */
1712
1713         if (rx_ring->count <= tx_ring->count)
1714                 lc = ((tx_ring->count / 64) * 2) + 1;
1715         else
1716                 lc = ((rx_ring->count / 64) * 2) + 1;
1717
1718         for (j = 0; j <= lc; j++) {
1719                 /* reset count of good packets */
1720                 good_cnt = 0;
1721
1722                 /* place 64 packets on the transmit queue*/
1723                 for (i = 0; i < 64; i++) {
1724                         skb_get(skb);
1725                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1726                                                            adapter,
1727                                                            tx_ring);
1728                         if (tx_ret_val == NETDEV_TX_OK)
1729                                 good_cnt++;
1730                 }
1731
1732                 if (good_cnt != 64) {
1733                         ret_val = 12;
1734                         break;
1735                 }
1736
1737                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1738                 msleep(200);
1739
1740                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1741                 if (good_cnt != 64) {
1742                         ret_val = 13;
1743                         break;
1744                 }
1745         }
1746
1747         /* free the original skb */
1748         kfree_skb(skb);
1749
1750         return ret_val;
1751 }
1752
1753 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1754 {
1755         *data = ixgbe_setup_desc_rings(adapter);
1756         if (*data)
1757                 goto out;
1758         *data = ixgbe_setup_loopback_test(adapter);
1759         if (*data)
1760                 goto err_loopback;
1761         *data = ixgbe_run_loopback_test(adapter);
1762         ixgbe_loopback_cleanup(adapter);
1763
1764 err_loopback:
1765         ixgbe_free_desc_rings(adapter);
1766 out:
1767         return *data;
1768 }
1769
1770 static void ixgbe_diag_test(struct net_device *netdev,
1771                             struct ethtool_test *eth_test, u64 *data)
1772 {
1773         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1774         bool if_running = netif_running(netdev);
1775
1776         set_bit(__IXGBE_TESTING, &adapter->state);
1777         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1778                 /* Offline tests */
1779
1780                 e_info(hw, "offline testing starting\n");
1781
1782                 /* Link test performed before hardware reset so autoneg doesn't
1783                  * interfere with test result */
1784                 if (ixgbe_link_test(adapter, &data[4]))
1785                         eth_test->flags |= ETH_TEST_FL_FAILED;
1786
1787                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1788                         int i;
1789                         for (i = 0; i < adapter->num_vfs; i++) {
1790                                 if (adapter->vfinfo[i].clear_to_send) {
1791                                         netdev_warn(netdev, "%s",
1792                                                     "offline diagnostic is not "
1793                                                     "supported when VFs are "
1794                                                     "present\n");
1795                                         data[0] = 1;
1796                                         data[1] = 1;
1797                                         data[2] = 1;
1798                                         data[3] = 1;
1799                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1800                                         clear_bit(__IXGBE_TESTING,
1801                                                   &adapter->state);
1802                                         goto skip_ol_tests;
1803                                 }
1804                         }
1805                 }
1806
1807                 if (if_running)
1808                         /* indicate we're in test mode */
1809                         dev_close(netdev);
1810                 else
1811                         ixgbe_reset(adapter);
1812
1813                 e_info(hw, "register testing starting\n");
1814                 if (ixgbe_reg_test(adapter, &data[0]))
1815                         eth_test->flags |= ETH_TEST_FL_FAILED;
1816
1817                 ixgbe_reset(adapter);
1818                 e_info(hw, "eeprom testing starting\n");
1819                 if (ixgbe_eeprom_test(adapter, &data[1]))
1820                         eth_test->flags |= ETH_TEST_FL_FAILED;
1821
1822                 ixgbe_reset(adapter);
1823                 e_info(hw, "interrupt testing starting\n");
1824                 if (ixgbe_intr_test(adapter, &data[2]))
1825                         eth_test->flags |= ETH_TEST_FL_FAILED;
1826
1827                 /* If SRIOV or VMDq is enabled then skip MAC
1828                  * loopback diagnostic. */
1829                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1830                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1831                         e_info(hw, "Skip MAC loopback diagnostic in VT "
1832                                "mode\n");
1833                         data[3] = 0;
1834                         goto skip_loopback;
1835                 }
1836
1837                 ixgbe_reset(adapter);
1838                 e_info(hw, "loopback testing starting\n");
1839                 if (ixgbe_loopback_test(adapter, &data[3]))
1840                         eth_test->flags |= ETH_TEST_FL_FAILED;
1841
1842 skip_loopback:
1843                 ixgbe_reset(adapter);
1844
1845                 clear_bit(__IXGBE_TESTING, &adapter->state);
1846                 if (if_running)
1847                         dev_open(netdev);
1848         } else {
1849                 e_info(hw, "online testing starting\n");
1850                 /* Online tests */
1851                 if (ixgbe_link_test(adapter, &data[4]))
1852                         eth_test->flags |= ETH_TEST_FL_FAILED;
1853
1854                 /* Online tests aren't run; pass by default */
1855                 data[0] = 0;
1856                 data[1] = 0;
1857                 data[2] = 0;
1858                 data[3] = 0;
1859
1860                 clear_bit(__IXGBE_TESTING, &adapter->state);
1861         }
1862 skip_ol_tests:
1863         msleep_interruptible(4 * 1000);
1864 }
1865
1866 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1867                                struct ethtool_wolinfo *wol)
1868 {
1869         struct ixgbe_hw *hw = &adapter->hw;
1870         int retval = 1;
1871
1872         switch(hw->device_id) {
1873         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1874                 /* All except this subdevice support WOL */
1875                 if (hw->subsystem_device_id ==
1876                     IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1877                         wol->supported = 0;
1878                         break;
1879                 }
1880         case IXGBE_DEV_ID_82599_KX4:
1881                 retval = 0;
1882                 break;
1883         default:
1884                 wol->supported = 0;
1885         }
1886
1887         return retval;
1888 }
1889
1890 static void ixgbe_get_wol(struct net_device *netdev,
1891                           struct ethtool_wolinfo *wol)
1892 {
1893         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1894
1895         wol->supported = WAKE_UCAST | WAKE_MCAST |
1896                          WAKE_BCAST | WAKE_MAGIC;
1897         wol->wolopts = 0;
1898
1899         if (ixgbe_wol_exclusion(adapter, wol) ||
1900             !device_can_wakeup(&adapter->pdev->dev))
1901                 return;
1902
1903         if (adapter->wol & IXGBE_WUFC_EX)
1904                 wol->wolopts |= WAKE_UCAST;
1905         if (adapter->wol & IXGBE_WUFC_MC)
1906                 wol->wolopts |= WAKE_MCAST;
1907         if (adapter->wol & IXGBE_WUFC_BC)
1908                 wol->wolopts |= WAKE_BCAST;
1909         if (adapter->wol & IXGBE_WUFC_MAG)
1910                 wol->wolopts |= WAKE_MAGIC;
1911 }
1912
1913 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1914 {
1915         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1916
1917         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1918                 return -EOPNOTSUPP;
1919
1920         if (ixgbe_wol_exclusion(adapter, wol))
1921                 return wol->wolopts ? -EOPNOTSUPP : 0;
1922
1923         adapter->wol = 0;
1924
1925         if (wol->wolopts & WAKE_UCAST)
1926                 adapter->wol |= IXGBE_WUFC_EX;
1927         if (wol->wolopts & WAKE_MCAST)
1928                 adapter->wol |= IXGBE_WUFC_MC;
1929         if (wol->wolopts & WAKE_BCAST)
1930                 adapter->wol |= IXGBE_WUFC_BC;
1931         if (wol->wolopts & WAKE_MAGIC)
1932                 adapter->wol |= IXGBE_WUFC_MAG;
1933
1934         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1935
1936         return 0;
1937 }
1938
1939 static int ixgbe_nway_reset(struct net_device *netdev)
1940 {
1941         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1942
1943         if (netif_running(netdev))
1944                 ixgbe_reinit_locked(adapter);
1945
1946         return 0;
1947 }
1948
1949 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
1950 {
1951         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1952         struct ixgbe_hw *hw = &adapter->hw;
1953         u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1954         u32 i;
1955
1956         if (!data || data > 300)
1957                 data = 300;
1958
1959         for (i = 0; i < (data * 1000); i += 400) {
1960                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
1961                 msleep_interruptible(200);
1962                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
1963                 msleep_interruptible(200);
1964         }
1965
1966         /* Restore LED settings */
1967         IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
1968
1969         return 0;
1970 }
1971
1972 static int ixgbe_get_coalesce(struct net_device *netdev,
1973                               struct ethtool_coalesce *ec)
1974 {
1975         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1976
1977         ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0]->work_limit;
1978
1979         /* only valid if in constant ITR mode */
1980         switch (adapter->rx_itr_setting) {
1981         case 0:
1982                 /* throttling disabled */
1983                 ec->rx_coalesce_usecs = 0;
1984                 break;
1985         case 1:
1986                 /* dynamic ITR mode */
1987                 ec->rx_coalesce_usecs = 1;
1988                 break;
1989         default:
1990                 /* fixed interrupt rate mode */
1991                 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
1992                 break;
1993         }
1994
1995         /* if in mixed tx/rx queues per vector mode, report only rx settings */
1996         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count)
1997                 return 0;
1998
1999         /* only valid if in constant ITR mode */
2000         switch (adapter->tx_itr_setting) {
2001         case 0:
2002                 /* throttling disabled */
2003                 ec->tx_coalesce_usecs = 0;
2004                 break;
2005         case 1:
2006                 /* dynamic ITR mode */
2007                 ec->tx_coalesce_usecs = 1;
2008                 break;
2009         default:
2010                 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
2011                 break;
2012         }
2013
2014         return 0;
2015 }
2016
2017 /*
2018  * this function must be called before setting the new value of
2019  * rx_itr_setting
2020  */
2021 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2022                              struct ethtool_coalesce *ec)
2023 {
2024         struct net_device *netdev = adapter->netdev;
2025
2026         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
2027                 return false;
2028
2029         /* if interrupt rate is too high then disable RSC */
2030         if (ec->rx_coalesce_usecs != 1 &&
2031             ec->rx_coalesce_usecs <= 1000000/IXGBE_MAX_RSC_INT_RATE) {
2032                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2033                         e_info(probe, "rx-usecs set too low, "
2034                                       "disabling RSC\n");
2035                         adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2036                         return true;
2037                 }
2038         } else {
2039                 /* check the feature flag value and enable RSC if necessary */
2040                 if ((netdev->features & NETIF_F_LRO) &&
2041                     !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2042                         e_info(probe, "rx-usecs set to %d, "
2043                                       "re-enabling RSC\n",
2044                                ec->rx_coalesce_usecs);
2045                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2046                         return true;
2047                 }
2048         }
2049         return false;
2050 }
2051
2052 static int ixgbe_set_coalesce(struct net_device *netdev,
2053                               struct ethtool_coalesce *ec)
2054 {
2055         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2056         struct ixgbe_q_vector *q_vector;
2057         int i;
2058         bool need_reset = false;
2059
2060         /* don't accept tx specific changes if we've got mixed RxTx vectors */
2061         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count
2062            && ec->tx_coalesce_usecs)
2063                 return -EINVAL;
2064
2065         if (ec->tx_max_coalesced_frames_irq)
2066                 adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
2067
2068         if (ec->rx_coalesce_usecs > 1) {
2069                 /* check the limits */
2070                 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2071                     (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2072                         return -EINVAL;
2073
2074                 /* check the old value and enable RSC if necessary */
2075                 need_reset = ixgbe_update_rsc(adapter, ec);
2076
2077                 /* store the value in ints/second */
2078                 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2079
2080                 /* static value of interrupt rate */
2081                 adapter->rx_itr_setting = adapter->rx_eitr_param;
2082                 /* clear the lower bit as its used for dynamic state */
2083                 adapter->rx_itr_setting &= ~1;
2084         } else if (ec->rx_coalesce_usecs == 1) {
2085                 /* check the old value and enable RSC if necessary */
2086                 need_reset = ixgbe_update_rsc(adapter, ec);
2087
2088                 /* 1 means dynamic mode */
2089                 adapter->rx_eitr_param = 20000;
2090                 adapter->rx_itr_setting = 1;
2091         } else {
2092                 /* check the old value and enable RSC if necessary */
2093                 need_reset = ixgbe_update_rsc(adapter, ec);
2094                 /*
2095                  * any other value means disable eitr, which is best
2096                  * served by setting the interrupt rate very high
2097                  */
2098                 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2099                 adapter->rx_itr_setting = 0;
2100         }
2101
2102         if (ec->tx_coalesce_usecs > 1) {
2103                 /*
2104                  * don't have to worry about max_int as above because
2105                  * tx vectors don't do hardware RSC (an rx function)
2106                  */
2107                 /* check the limits */
2108                 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2109                     (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2110                         return -EINVAL;
2111
2112                 /* store the value in ints/second */
2113                 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs;
2114
2115                 /* static value of interrupt rate */
2116                 adapter->tx_itr_setting = adapter->tx_eitr_param;
2117
2118                 /* clear the lower bit as its used for dynamic state */
2119                 adapter->tx_itr_setting &= ~1;
2120         } else if (ec->tx_coalesce_usecs == 1) {
2121                 /* 1 means dynamic mode */
2122                 adapter->tx_eitr_param = 10000;
2123                 adapter->tx_itr_setting = 1;
2124         } else {
2125                 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2126                 adapter->tx_itr_setting = 0;
2127         }
2128
2129         /* MSI/MSIx Interrupt Mode */
2130         if (adapter->flags &
2131             (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2132                 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2133                 for (i = 0; i < num_vectors; i++) {
2134                         q_vector = adapter->q_vector[i];
2135                         if (q_vector->txr_count && !q_vector->rxr_count)
2136                                 /* tx only */
2137                                 q_vector->eitr = adapter->tx_eitr_param;
2138                         else
2139                                 /* rx only or mixed */
2140                                 q_vector->eitr = adapter->rx_eitr_param;
2141                         ixgbe_write_eitr(q_vector);
2142                 }
2143         /* Legacy Interrupt Mode */
2144         } else {
2145                 q_vector = adapter->q_vector[0];
2146                 q_vector->eitr = adapter->rx_eitr_param;
2147                 ixgbe_write_eitr(q_vector);
2148         }
2149
2150         /*
2151          * do reset here at the end to make sure EITR==0 case is handled
2152          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2153          * also locks in RSC enable/disable which requires reset
2154          */
2155         if (need_reset) {
2156                 if (netif_running(netdev))
2157                         ixgbe_reinit_locked(adapter);
2158                 else
2159                         ixgbe_reset(adapter);
2160         }
2161
2162         return 0;
2163 }
2164
2165 static int ixgbe_set_flags(struct net_device *netdev, u32 data)
2166 {
2167         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2168         bool need_reset = false;
2169         int rc;
2170
2171 #ifdef CONFIG_IXGBE_DCB
2172         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
2173             !(data & ETH_FLAG_RXVLAN))
2174                 return -EINVAL;
2175 #endif
2176
2177         need_reset = (data & ETH_FLAG_RXVLAN) !=
2178                      (netdev->features & NETIF_F_HW_VLAN_RX);
2179
2180         rc = ethtool_op_set_flags(netdev, data, ETH_FLAG_LRO |
2181                                         ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN);
2182         if (rc)
2183                 return rc;
2184
2185         /* if state changes we need to update adapter->flags and reset */
2186         if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
2187             (!!(data & ETH_FLAG_LRO) !=
2188              !!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) {
2189                 if ((data & ETH_FLAG_LRO) &&
2190                     (!adapter->rx_itr_setting ||
2191                      (adapter->rx_itr_setting > IXGBE_MAX_RSC_INT_RATE))) {
2192                         e_info(probe, "rx-usecs set too low, "
2193                                       "not enabling RSC.\n");
2194                 } else {
2195                         adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
2196                         switch (adapter->hw.mac.type) {
2197                         case ixgbe_mac_82599EB:
2198                                 need_reset = true;
2199                                 break;
2200                         default:
2201                                 break;
2202                         }
2203                 }
2204         }
2205
2206         /*
2207          * Check if Flow Director n-tuple support was enabled or disabled.  If
2208          * the state changed, we need to reset.
2209          */
2210         if ((adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) &&
2211             (!(data & ETH_FLAG_NTUPLE))) {
2212                 /* turn off Flow Director perfect, set hash and reset */
2213                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2214                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2215                 need_reset = true;
2216         } else if ((!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) &&
2217                    (data & ETH_FLAG_NTUPLE)) {
2218                 /* turn off Flow Director hash, enable perfect and reset */
2219                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2220                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2221                 need_reset = true;
2222         } else {
2223                 /* no state change */
2224         }
2225
2226         if (need_reset) {
2227                 if (netif_running(netdev))
2228                         ixgbe_reinit_locked(adapter);
2229                 else
2230                         ixgbe_reset(adapter);
2231         }
2232
2233         return 0;
2234 }
2235
2236 static int ixgbe_set_rx_ntuple(struct net_device *dev,
2237                                struct ethtool_rx_ntuple *cmd)
2238 {
2239         struct ixgbe_adapter *adapter = netdev_priv(dev);
2240         struct ethtool_rx_ntuple_flow_spec fs = cmd->fs;
2241         struct ixgbe_atr_input input_struct;
2242         struct ixgbe_atr_input_masks input_masks;
2243         int target_queue;
2244
2245         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
2246                 return -EOPNOTSUPP;
2247
2248         /*
2249          * Don't allow programming if the action is a queue greater than
2250          * the number of online Tx queues.
2251          */
2252         if ((fs.action >= adapter->num_tx_queues) ||
2253             (fs.action < ETHTOOL_RXNTUPLE_ACTION_DROP))
2254                 return -EINVAL;
2255
2256         memset(&input_struct, 0, sizeof(struct ixgbe_atr_input));
2257         memset(&input_masks, 0, sizeof(struct ixgbe_atr_input_masks));
2258
2259         input_masks.src_ip_mask = fs.m_u.tcp_ip4_spec.ip4src;
2260         input_masks.dst_ip_mask = fs.m_u.tcp_ip4_spec.ip4dst;
2261         input_masks.src_port_mask = fs.m_u.tcp_ip4_spec.psrc;
2262         input_masks.dst_port_mask = fs.m_u.tcp_ip4_spec.pdst;
2263         input_masks.vlan_id_mask = fs.vlan_tag_mask;
2264         /* only use the lowest 2 bytes for flex bytes */
2265         input_masks.data_mask = (fs.data_mask & 0xffff);
2266
2267         switch (fs.flow_type) {
2268         case TCP_V4_FLOW:
2269                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_TCP);
2270                 break;
2271         case UDP_V4_FLOW:
2272                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_UDP);
2273                 break;
2274         case SCTP_V4_FLOW:
2275                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_SCTP);
2276                 break;
2277         default:
2278                 return -1;
2279         }
2280
2281         /* Mask bits from the inputs based on user-supplied mask */
2282         ixgbe_atr_set_src_ipv4_82599(&input_struct,
2283                     (fs.h_u.tcp_ip4_spec.ip4src & ~fs.m_u.tcp_ip4_spec.ip4src));
2284         ixgbe_atr_set_dst_ipv4_82599(&input_struct,
2285                     (fs.h_u.tcp_ip4_spec.ip4dst & ~fs.m_u.tcp_ip4_spec.ip4dst));
2286         /* 82599 expects these to be byte-swapped for perfect filtering */
2287         ixgbe_atr_set_src_port_82599(&input_struct,
2288                ((ntohs(fs.h_u.tcp_ip4_spec.psrc)) & ~fs.m_u.tcp_ip4_spec.psrc));
2289         ixgbe_atr_set_dst_port_82599(&input_struct,
2290                ((ntohs(fs.h_u.tcp_ip4_spec.pdst)) & ~fs.m_u.tcp_ip4_spec.pdst));
2291
2292         /* VLAN and Flex bytes are either completely masked or not */
2293         if (!fs.vlan_tag_mask)
2294                 ixgbe_atr_set_vlan_id_82599(&input_struct, fs.vlan_tag);
2295
2296         if (!input_masks.data_mask)
2297                 /* make sure we only use the first 2 bytes of user data */
2298                 ixgbe_atr_set_flex_byte_82599(&input_struct,
2299                                               (fs.data & 0xffff));
2300
2301         /* determine if we need to drop or route the packet */
2302         if (fs.action == ETHTOOL_RXNTUPLE_ACTION_DROP)
2303                 target_queue = MAX_RX_QUEUES - 1;
2304         else
2305                 target_queue = fs.action;
2306
2307         spin_lock(&adapter->fdir_perfect_lock);
2308         ixgbe_fdir_add_perfect_filter_82599(&adapter->hw, &input_struct,
2309                                             &input_masks, 0, target_queue);
2310         spin_unlock(&adapter->fdir_perfect_lock);
2311
2312         return 0;
2313 }
2314
2315 static const struct ethtool_ops ixgbe_ethtool_ops = {
2316         .get_settings           = ixgbe_get_settings,
2317         .set_settings           = ixgbe_set_settings,
2318         .get_drvinfo            = ixgbe_get_drvinfo,
2319         .get_regs_len           = ixgbe_get_regs_len,
2320         .get_regs               = ixgbe_get_regs,
2321         .get_wol                = ixgbe_get_wol,
2322         .set_wol                = ixgbe_set_wol,
2323         .nway_reset             = ixgbe_nway_reset,
2324         .get_link               = ethtool_op_get_link,
2325         .get_eeprom_len         = ixgbe_get_eeprom_len,
2326         .get_eeprom             = ixgbe_get_eeprom,
2327         .get_ringparam          = ixgbe_get_ringparam,
2328         .set_ringparam          = ixgbe_set_ringparam,
2329         .get_pauseparam         = ixgbe_get_pauseparam,
2330         .set_pauseparam         = ixgbe_set_pauseparam,
2331         .get_rx_csum            = ixgbe_get_rx_csum,
2332         .set_rx_csum            = ixgbe_set_rx_csum,
2333         .get_tx_csum            = ixgbe_get_tx_csum,
2334         .set_tx_csum            = ixgbe_set_tx_csum,
2335         .get_sg                 = ethtool_op_get_sg,
2336         .set_sg                 = ethtool_op_set_sg,
2337         .get_msglevel           = ixgbe_get_msglevel,
2338         .set_msglevel           = ixgbe_set_msglevel,
2339         .get_tso                = ethtool_op_get_tso,
2340         .set_tso                = ixgbe_set_tso,
2341         .self_test              = ixgbe_diag_test,
2342         .get_strings            = ixgbe_get_strings,
2343         .phys_id                = ixgbe_phys_id,
2344         .get_sset_count         = ixgbe_get_sset_count,
2345         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2346         .get_coalesce           = ixgbe_get_coalesce,
2347         .set_coalesce           = ixgbe_set_coalesce,
2348         .get_flags              = ethtool_op_get_flags,
2349         .set_flags              = ixgbe_set_flags,
2350         .set_rx_ntuple          = ixgbe_set_rx_ntuple,
2351 };
2352
2353 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2354 {
2355         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2356 }