drivers/net/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2010 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for ixgbe */
  29
  30 #include <linux/types.h>
  31 #include <linux/module.h>
  32 #include <linux/slab.h>
  33 #include <linux/pci.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/uaccess.h>
  38
  39 #include "ixgbe.h"
  40
  41
  42 #define IXGBE_ALL_RAR_ENTRIES 16
  43
  44 enum {NETDEV_STATS, IXGBE_STATS};
  45
  46 struct ixgbe_stats {
  47         char stat_string[ETH_GSTRING_LEN];
  48         int type;
  49         int sizeof_stat;
  50         int stat_offset;
  51 };
  52
  53 #define IXGBE_STAT(m)           IXGBE_STATS, \
  54                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  55                                 offsetof(struct ixgbe_adapter, m)
  56 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  57                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  58                                 offsetof(struct rtnl_link_stats64, m)
  59
  60 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
  61         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  62         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  63         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  64         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  65         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  66         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  67         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  68         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  69         {"lsc_int", IXGBE_STAT(lsc_int)},
  70         {"tx_busy", IXGBE_STAT(tx_busy)},
  71         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  72         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  73         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  74         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  75         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  76         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  77         {"broadcast", IXGBE_STAT(stats.bprc)},
  78         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  79         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  80         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  81         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  82         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  83         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  84         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  85         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  86         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  87         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  88         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  89         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  90         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  91         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  92         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  93         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  94         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
  95         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  96         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
  97         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
  98         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
  99         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 100         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 101         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 102         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 103         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 104         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 105 #ifdef IXGBE_FCOE
 106         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 107         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 108         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 109         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 110         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 111         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 112 #endif /* IXGBE_FCOE */
 113 };
 114
 115 #define IXGBE_QUEUE_STATS_LEN \
 116         ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
 117         ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
 118         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 119 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 120 #define IXGBE_PB_STATS_LEN ( \
 121                  (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
 122                  IXGBE_FLAG_DCB_ENABLED) ? \
 123                  (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 124                   sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 125                   sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 126                   sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 127                   / sizeof(u64) : 0)
 128 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 129                          IXGBE_PB_STATS_LEN + \
 130                          IXGBE_QUEUE_STATS_LEN)
 131
 132 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 133         "Register test  (offline)", "Eeprom test    (offline)",
 134         "Interrupt test (offline)", "Loopback test  (offline)",
 135         "Link test   (on/offline)"
 136 };
 137 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 138
 139 static int ixgbe_get_settings(struct net_device *netdev,
 140                               struct ethtool_cmd *ecmd)
 141 {
 142         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 143         struct ixgbe_hw *hw = &adapter->hw;
 144         u32 link_speed = 0;
 145         bool link_up;
 146
 147         ecmd->supported = SUPPORTED_10000baseT_Full;
 148         ecmd->autoneg = AUTONEG_ENABLE;
 149         ecmd->transceiver = XCVR_EXTERNAL;
 150         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 151             (hw->phy.multispeed_fiber)) {
 152                 ecmd->supported |= (SUPPORTED_1000baseT_Full |
 153                                     SUPPORTED_Autoneg);
 154
 155                 ecmd->advertising = ADVERTISED_Autoneg;
 156                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
 157                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 158                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
 159                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 160                 /*
 161                  * It's possible that phy.autoneg_advertised may not be
 162                  * set yet.  If so display what the default would be -
 163                  * both 1G and 10G supported.
 164                  */
 165                 if (!(ecmd->advertising & (ADVERTISED_1000baseT_Full |
 166                                            ADVERTISED_10000baseT_Full)))
 167                         ecmd->advertising |= (ADVERTISED_10000baseT_Full |
 168                                               ADVERTISED_1000baseT_Full);
 169
 170                 if (hw->phy.media_type == ixgbe_media_type_copper) {
 171                         ecmd->supported |= SUPPORTED_TP;
 172                         ecmd->advertising |= ADVERTISED_TP;
 173                         ecmd->port = PORT_TP;
 174                 } else {
 175                         ecmd->supported |= SUPPORTED_FIBRE;
 176                         ecmd->advertising |= ADVERTISED_FIBRE;
 177                         ecmd->port = PORT_FIBRE;
 178                 }
 179         } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
 180                 /* Set as FIBRE until SERDES defined in kernel */
 181                 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
 182                         ecmd->supported = (SUPPORTED_1000baseT_Full |
 183                                            SUPPORTED_FIBRE);
 184                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 185                                              ADVERTISED_FIBRE);
 186                         ecmd->port = PORT_FIBRE;
 187                         ecmd->autoneg = AUTONEG_DISABLE;
 188                 } else {
 189                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 190                                             SUPPORTED_FIBRE);
 191                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 192                                              ADVERTISED_1000baseT_Full |
 193                                              ADVERTISED_FIBRE);
 194                         ecmd->port = PORT_FIBRE;
 195                 }
 196         } else {
 197                 ecmd->supported |= SUPPORTED_FIBRE;
 198                 ecmd->advertising = (ADVERTISED_10000baseT_Full |
 199                                      ADVERTISED_FIBRE);
 200                 ecmd->port = PORT_FIBRE;
 201                 ecmd->autoneg = AUTONEG_DISABLE;
 202         }
 203
 204         /* Get PHY type */
 205         switch (adapter->hw.phy.type) {
 206         case ixgbe_phy_tn:
 207         case ixgbe_phy_cu_unknown:
 208                 /* Copper 10G-BASET */
 209                 ecmd->port = PORT_TP;
 210                 break;
 211         case ixgbe_phy_qt:
 212                 ecmd->port = PORT_FIBRE;
 213                 break;
 214         case ixgbe_phy_nl:
 215         case ixgbe_phy_sfp_passive_tyco:
 216         case ixgbe_phy_sfp_passive_unknown:
 217         case ixgbe_phy_sfp_ftl:
 218         case ixgbe_phy_sfp_avago:
 219         case ixgbe_phy_sfp_intel:
 220         case ixgbe_phy_sfp_unknown:
 221                 switch (adapter->hw.phy.sfp_type) {
 222                 /* SFP+ devices, further checking needed */
 223                 case ixgbe_sfp_type_da_cu:
 224                 case ixgbe_sfp_type_da_cu_core0:
 225                 case ixgbe_sfp_type_da_cu_core1:
 226                         ecmd->port = PORT_DA;
 227                         break;
 228                 case ixgbe_sfp_type_sr:
 229                 case ixgbe_sfp_type_lr:
 230                 case ixgbe_sfp_type_srlr_core0:
 231                 case ixgbe_sfp_type_srlr_core1:
 232                         ecmd->port = PORT_FIBRE;
 233                         break;
 234                 case ixgbe_sfp_type_not_present:
 235                         ecmd->port = PORT_NONE;
 236                         break;
 237                 case ixgbe_sfp_type_1g_cu_core0:
 238                 case ixgbe_sfp_type_1g_cu_core1:
 239                         ecmd->port = PORT_TP;
 240                         ecmd->supported = SUPPORTED_TP;
 241                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 242                                              ADVERTISED_TP);
 243                         break;
 244                 case ixgbe_sfp_type_unknown:
 245                 default:
 246                         ecmd->port = PORT_OTHER;
 247                         break;
 248                 }
 249                 break;
 250         case ixgbe_phy_xaui:
 251                 ecmd->port = PORT_NONE;
 252                 break;
 253         case ixgbe_phy_unknown:
 254         case ixgbe_phy_generic:
 255         case ixgbe_phy_sfp_unsupported:
 256         default:
 257                 ecmd->port = PORT_OTHER;
 258                 break;
 259         }
 260
 261         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 262         if (link_up) {
 263                 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
 264                                SPEED_10000 : SPEED_1000;
 265                 ecmd->duplex = DUPLEX_FULL;
 266         } else {
 267                 ecmd->speed = -1;
 268                 ecmd->duplex = -1;
 269         }
 270
 271         return 0;
 272 }
 273
 274 static int ixgbe_set_settings(struct net_device *netdev,
 275                               struct ethtool_cmd *ecmd)
 276 {
 277         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 278         struct ixgbe_hw *hw = &adapter->hw;
 279         u32 advertised, old;
 280         s32 err = 0;
 281
 282         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 283             (hw->phy.multispeed_fiber)) {
 284                 /* 10000/copper and 1000/copper must autoneg
 285                  * this function does not support any duplex forcing, but can
 286                  * limit the advertising of the adapter to only 10000 or 1000 */
 287                 if (ecmd->autoneg == AUTONEG_DISABLE)
 288                         return -EINVAL;
 289
 290                 old = hw->phy.autoneg_advertised;
 291                 advertised = 0;
 292                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 293                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 294
 295                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 296                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 297
 298                 if (old == advertised)
 299                         return err;
 300                 /* this sets the link speed and restarts auto-neg */
 301                 hw->mac.autotry_restart = true;
 302                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
 303                 if (err) {
 304                         e_info(probe, "setup link failed with code %d\n", err);
 305                         hw->mac.ops.setup_link(hw, old, true, true);
 306                 }
 307         } else {
 308                 /* in this case we currently only support 10Gb/FULL */
 309                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 310                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 311                     (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 312                         return -EINVAL;
 313         }
 314
 315         return err;
 316 }
 317
 318 static void ixgbe_get_pauseparam(struct net_device *netdev,
 319                                  struct ethtool_pauseparam *pause)
 320 {
 321         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 322         struct ixgbe_hw *hw = &adapter->hw;
 323
 324         /*
 325          * Flow Control Autoneg isn't on if
 326          *  - we didn't ask for it OR
 327          *  - it failed, we know this by tx & rx being off
 328          */
 329         if (hw->fc.disable_fc_autoneg ||
 330             (hw->fc.current_mode == ixgbe_fc_none))
 331                 pause->autoneg = 0;
 332         else
 333                 pause->autoneg = 1;
 334
 335 #ifdef CONFIG_DCB
 336         if (hw->fc.current_mode == ixgbe_fc_pfc) {
 337                 pause->rx_pause = 0;
 338                 pause->tx_pause = 0;
 339         }
 340
 341 #endif
 342         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 343                 pause->rx_pause = 1;
 344         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 345                 pause->tx_pause = 1;
 346         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 347                 pause->rx_pause = 1;
 348                 pause->tx_pause = 1;
 349         }
 350 }
 351
 352 static int ixgbe_set_pauseparam(struct net_device *netdev,
 353                                 struct ethtool_pauseparam *pause)
 354 {
 355         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 356         struct ixgbe_hw *hw = &adapter->hw;
 357         struct ixgbe_fc_info fc;
 358
 359 #ifdef CONFIG_DCB
 360         if (adapter->dcb_cfg.pfc_mode_enable ||
 361                 ((hw->mac.type == ixgbe_mac_82598EB) &&
 362                 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
 363                 return -EINVAL;
 364
 365 #endif
 366
 367         fc = hw->fc;
 368
 369         if (pause->autoneg != AUTONEG_ENABLE)
 370                 fc.disable_fc_autoneg = true;
 371         else
 372                 fc.disable_fc_autoneg = false;
 373
 374         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 375                 fc.requested_mode = ixgbe_fc_full;
 376         else if (pause->rx_pause && !pause->tx_pause)
 377                 fc.requested_mode = ixgbe_fc_rx_pause;
 378         else if (!pause->rx_pause && pause->tx_pause)
 379                 fc.requested_mode = ixgbe_fc_tx_pause;
 380         else if (!pause->rx_pause && !pause->tx_pause)
 381                 fc.requested_mode = ixgbe_fc_none;
 382         else
 383                 return -EINVAL;
 384
 385 #ifdef CONFIG_DCB
 386         adapter->last_lfc_mode = fc.requested_mode;
 387 #endif
 388
 389         /* if the thing changed then we'll update and use new autoneg */
 390         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 391                 hw->fc = fc;
 392                 if (netif_running(netdev))
 393                         ixgbe_reinit_locked(adapter);
 394                 else
 395                         ixgbe_reset(adapter);
 396         }
 397
 398         return 0;
 399 }
 400
 401 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
 402 {
 403         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 404         return adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED;
 405 }
 406
 407 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
 408 {
 409         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 410         if (data)
 411                 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
 412         else
 413                 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
 414
 415         if (netif_running(netdev))
 416                 ixgbe_reinit_locked(adapter);
 417         else
 418                 ixgbe_reset(adapter);
 419
 420         return 0;
 421 }
 422
 423 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
 424 {
 425         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 426 }
 427
 428 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
 429 {
 430         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 431
 432         if (data) {
 433                 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
 434                 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
 435                         netdev->features |= NETIF_F_SCTP_CSUM;
 436         } else {
 437                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
 438                 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
 439                         netdev->features &= ~NETIF_F_SCTP_CSUM;
 440         }
 441
 442         return 0;
 443 }
 444
 445 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
 446 {
 447         if (data) {
 448                 netdev->features |= NETIF_F_TSO;
 449                 netdev->features |= NETIF_F_TSO6;
 450         } else {
 451                 netdev->features &= ~NETIF_F_TSO;
 452                 netdev->features &= ~NETIF_F_TSO6;
 453         }
 454         return 0;
 455 }
 456
 457 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 458 {
 459         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 460         return adapter->msg_enable;
 461 }
 462
 463 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 464 {
 465         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 466         adapter->msg_enable = data;
 467 }
 468
 469 static int ixgbe_get_regs_len(struct net_device *netdev)
 470 {
 471 #define IXGBE_REGS_LEN  1128
 472         return IXGBE_REGS_LEN * sizeof(u32);
 473 }
 474
 475 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 476
 477 static void ixgbe_get_regs(struct net_device *netdev,
 478                            struct ethtool_regs *regs, void *p)
 479 {
 480         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 481         struct ixgbe_hw *hw = &adapter->hw;
 482         u32 *regs_buff = p;
 483         u8 i;
 484
 485         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 486
 487         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
 488
 489         /* General Registers */
 490         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 491         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 492         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 493         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 494         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 495         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 496         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 497         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 498
 499         /* NVM Register */
 500         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 501         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 502         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 503         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 504         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 505         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 506         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 507         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 508         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 509         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 510
 511         /* Interrupt */
 512         /* don't read EICR because it can clear interrupt causes, instead
 513          * read EICS which is a shadow but doesn't clear EICR */
 514         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 515         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 516         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 517         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 518         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 519         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 520         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 521         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 522         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 523         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 524         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 525         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 526
 527         /* Flow Control */
 528         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 529         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 530         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 531         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 532         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 533         for (i = 0; i < 8; i++)
 534                 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 535         for (i = 0; i < 8; i++)
 536                 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 537         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 538         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 539
 540         /* Receive DMA */
 541         for (i = 0; i < 64; i++)
 542                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 543         for (i = 0; i < 64; i++)
 544                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 545         for (i = 0; i < 64; i++)
 546                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 547         for (i = 0; i < 64; i++)
 548                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 549         for (i = 0; i < 64; i++)
 550                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 551         for (i = 0; i < 64; i++)
 552                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 553         for (i = 0; i < 16; i++)
 554                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 555         for (i = 0; i < 16; i++)
 556                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 557         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 558         for (i = 0; i < 8; i++)
 559                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 560         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 561         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 562
 563         /* Receive */
 564         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 565         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 566         for (i = 0; i < 16; i++)
 567                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 568         for (i = 0; i < 16; i++)
 569                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 570         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 571         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 572         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 573         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 574         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 575         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 576         for (i = 0; i < 8; i++)
 577                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 578         for (i = 0; i < 8; i++)
 579                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 580         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 581
 582         /* Transmit */
 583         for (i = 0; i < 32; i++)
 584                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 585         for (i = 0; i < 32; i++)
 586                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 587         for (i = 0; i < 32; i++)
 588                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 589         for (i = 0; i < 32; i++)
 590                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 591         for (i = 0; i < 32; i++)
 592                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 593         for (i = 0; i < 32; i++)
 594                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 595         for (i = 0; i < 32; i++)
 596                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 597         for (i = 0; i < 32; i++)
 598                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 599         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 600         for (i = 0; i < 16; i++)
 601                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 602         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 603         for (i = 0; i < 8; i++)
 604                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 605         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 606
 607         /* Wake Up */
 608         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 609         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 610         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 611         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 612         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 613         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 614         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 615         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 616         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 617
 618         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
 619         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 620         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
 621         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 622         for (i = 0; i < 8; i++)
 623                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 624         for (i = 0; i < 8; i++)
 625                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 626         for (i = 0; i < 8; i++)
 627                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 628         for (i = 0; i < 8; i++)
 629                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 630         for (i = 0; i < 8; i++)
 631                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
 632         for (i = 0; i < 8; i++)
 633                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
 634
 635         /* Statistics */
 636         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 637         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 638         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 639         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 640         for (i = 0; i < 8; i++)
 641                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 642         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 643         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 644         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 645         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 646         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 647         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 648         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 649         for (i = 0; i < 8; i++)
 650                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 651         for (i = 0; i < 8; i++)
 652                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 653         for (i = 0; i < 8; i++)
 654                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 655         for (i = 0; i < 8; i++)
 656                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 657         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 658         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 659         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 660         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 661         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 662         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 663         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 664         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 665         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 666         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 667         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 668         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 669         for (i = 0; i < 8; i++)
 670                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 671         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 672         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 673         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 674         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 675         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 676         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 677         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 678         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 679         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 680         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 681         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 682         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 683         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 684         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 685         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 686         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 687         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 688         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 689         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 690         for (i = 0; i < 16; i++)
 691                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 692         for (i = 0; i < 16; i++)
 693                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 694         for (i = 0; i < 16; i++)
 695                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 696         for (i = 0; i < 16; i++)
 697                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 698
 699         /* MAC */
 700         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 701         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 702         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 703         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 704         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 705         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 706         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 707         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 708         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 709         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 710         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 711         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 712         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 713         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 714         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 715         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 716         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 717         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 718         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 719         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 720         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 721         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 722         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 723         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 724         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 725         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 726         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 727         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 728         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 729         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 730         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 731         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 732         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 733
 734         /* Diagnostic */
 735         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 736         for (i = 0; i < 8; i++)
 737                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 738         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 739         for (i = 0; i < 4; i++)
 740                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 741         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 742         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 743         for (i = 0; i < 8; i++)
 744                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 745         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 746         for (i = 0; i < 4; i++)
 747                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 748         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 749         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 750         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 751         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 752         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 753         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 754         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 755         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 756         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 757         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 758         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 759         for (i = 0; i < 8; i++)
 760                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 761         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 762         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 763         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 764         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 765         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 766         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 767         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 768         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 769         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 770 }
 771
 772 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 773 {
 774         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 775         return adapter->hw.eeprom.word_size * 2;
 776 }
 777
 778 static int ixgbe_get_eeprom(struct net_device *netdev,
 779                             struct ethtool_eeprom *eeprom, u8 *bytes)
 780 {
 781         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 782         struct ixgbe_hw *hw = &adapter->hw;
 783         u16 *eeprom_buff;
 784         int first_word, last_word, eeprom_len;
 785         int ret_val = 0;
 786         u16 i;
 787
 788         if (eeprom->len == 0)
 789                 return -EINVAL;
 790
 791         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 792
 793         first_word = eeprom->offset >> 1;
 794         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 795         eeprom_len = last_word - first_word + 1;
 796
 797         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 798         if (!eeprom_buff)
 799                 return -ENOMEM;
 800
 801         for (i = 0; i < eeprom_len; i++) {
 802                 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
 803                     &eeprom_buff[i])))
 804                         break;
 805         }
 806
 807         /* Device's eeprom is always little-endian, word addressable */
 808         for (i = 0; i < eeprom_len; i++)
 809                 le16_to_cpus(&eeprom_buff[i]);
 810
 811         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 812         kfree(eeprom_buff);
 813
 814         return ret_val;
 815 }
 816
 817 static void ixgbe_get_drvinfo(struct net_device *netdev,
 818                               struct ethtool_drvinfo *drvinfo)
 819 {
 820         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 821         char firmware_version[32];
 822
 823         strncpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
 824         strncpy(drvinfo->version, ixgbe_driver_version,
 825                 sizeof(drvinfo->version));
 826
 827         snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
 828                  (adapter->eeprom_version & 0xF000) >> 12,
 829                  (adapter->eeprom_version & 0x0FF0) >> 4,
 830                  adapter->eeprom_version & 0x000F);
 831
 832         strncpy(drvinfo->fw_version, firmware_version,
 833                 sizeof(drvinfo->fw_version));
 834         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
 835                 sizeof(drvinfo->bus_info));
 836         drvinfo->n_stats = IXGBE_STATS_LEN;
 837         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 838         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 839 }
 840
 841 static void ixgbe_get_ringparam(struct net_device *netdev,
 842                                 struct ethtool_ringparam *ring)
 843 {
 844         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 845         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 846         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 847
 848         ring->rx_max_pending = IXGBE_MAX_RXD;
 849         ring->tx_max_pending = IXGBE_MAX_TXD;
 850         ring->rx_mini_max_pending = 0;
 851         ring->rx_jumbo_max_pending = 0;
 852         ring->rx_pending = rx_ring->count;
 853         ring->tx_pending = tx_ring->count;
 854         ring->rx_mini_pending = 0;
 855         ring->rx_jumbo_pending = 0;
 856 }
 857
 858 static int ixgbe_set_ringparam(struct net_device *netdev,
 859                                struct ethtool_ringparam *ring)
 860 {
 861         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 862         struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
 863         int i, err = 0;
 864         u32 new_rx_count, new_tx_count;
 865         bool need_update = false;
 866
 867         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 868                 return -EINVAL;
 869
 870         new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
 871         new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
 872         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 873
 874         new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
 875         new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
 876         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 877
 878         if ((new_tx_count == adapter->tx_ring[0]->count) &&
 879             (new_rx_count == adapter->rx_ring[0]->count)) {
 880                 /* nothing to do */
 881                 return 0;
 882         }
 883
 884         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 885                 msleep(1);
 886
 887         if (!netif_running(adapter->netdev)) {
 888                 for (i = 0; i < adapter->num_tx_queues; i++)
 889                         adapter->tx_ring[i]->count = new_tx_count;
 890                 for (i = 0; i < adapter->num_rx_queues; i++)
 891                         adapter->rx_ring[i]->count = new_rx_count;
 892                 adapter->tx_ring_count = new_tx_count;
 893                 adapter->rx_ring_count = new_rx_count;
 894                 goto clear_reset;
 895         }
 896
 897         temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
 898         if (!temp_tx_ring) {
 899                 err = -ENOMEM;
 900                 goto clear_reset;
 901         }
 902
 903         if (new_tx_count != adapter->tx_ring_count) {
 904                 for (i = 0; i < adapter->num_tx_queues; i++) {
 905                         memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
 906                                sizeof(struct ixgbe_ring));
 907                         temp_tx_ring[i].count = new_tx_count;
 908                         err = ixgbe_setup_tx_resources(adapter,
 909                                                        &temp_tx_ring[i]);
 910                         if (err) {
 911                                 while (i) {
 912                                         i--;
 913                                         ixgbe_free_tx_resources(adapter,
 914                                                               &temp_tx_ring[i]);
 915                                 }
 916                                 goto clear_reset;
 917                         }
 918                 }
 919                 need_update = true;
 920         }
 921
 922         temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
 923         if (!temp_rx_ring) {
 924                 err = -ENOMEM;
 925                 goto err_setup;
 926         }
 927
 928         if (new_rx_count != adapter->rx_ring_count) {
 929                 for (i = 0; i < adapter->num_rx_queues; i++) {
 930                         memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
 931                                sizeof(struct ixgbe_ring));
 932                         temp_rx_ring[i].count = new_rx_count;
 933                         err = ixgbe_setup_rx_resources(adapter,
 934                                                        &temp_rx_ring[i]);
 935                         if (err) {
 936                                 while (i) {
 937                                         i--;
 938                                         ixgbe_free_rx_resources(adapter,
 939                                                               &temp_rx_ring[i]);
 940                                 }
 941                                 goto err_setup;
 942                         }
 943                 }
 944                 need_update = true;
 945         }
 946
 947         /* if rings need to be updated, here's the place to do it in one shot */
 948         if (need_update) {
 949                 ixgbe_down(adapter);
 950
 951                 /* tx */
 952                 if (new_tx_count != adapter->tx_ring_count) {
 953                         for (i = 0; i < adapter->num_tx_queues; i++) {
 954                                 ixgbe_free_tx_resources(adapter,
 955                                                         adapter->tx_ring[i]);
 956                                 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
 957                                        sizeof(struct ixgbe_ring));
 958                         }
 959                         adapter->tx_ring_count = new_tx_count;
 960                 }
 961
 962                 /* rx */
 963                 if (new_rx_count != adapter->rx_ring_count) {
 964                         for (i = 0; i < adapter->num_rx_queues; i++) {
 965                                 ixgbe_free_rx_resources(adapter,
 966                                                         adapter->rx_ring[i]);
 967                                 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
 968                                        sizeof(struct ixgbe_ring));
 969                         }
 970                         adapter->rx_ring_count = new_rx_count;
 971                 }
 972                 ixgbe_up(adapter);
 973         }
 974
 975         vfree(temp_rx_ring);
 976 err_setup:
 977         vfree(temp_tx_ring);
 978 clear_reset:
 979         clear_bit(__IXGBE_RESETTING, &adapter->state);
 980         return err;
 981 }
 982
 983 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
 984 {
 985         switch (sset) {
 986         case ETH_SS_TEST:
 987                 return IXGBE_TEST_LEN;
 988         case ETH_SS_STATS:
 989                 return IXGBE_STATS_LEN;
 990         case ETH_SS_NTUPLE_FILTERS:
 991                 return ETHTOOL_MAX_NTUPLE_LIST_ENTRY *
 992                        ETHTOOL_MAX_NTUPLE_STRING_PER_ENTRY;
 993         default:
 994                 return -EOPNOTSUPP;
 995         }
 996 }
 997
 998 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
 999                                     struct ethtool_stats *stats, u64 *data)
1000 {
1001         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1002         struct rtnl_link_stats64 temp;
1003         const struct rtnl_link_stats64 *net_stats;
1004         unsigned int start;
1005         struct ixgbe_ring *ring;
1006         int i, j;
1007         char *p = NULL;
1008
1009         ixgbe_update_stats(adapter);
1010         net_stats = dev_get_stats(netdev, &temp);
1011         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1012                 switch (ixgbe_gstrings_stats[i].type) {
1013                 case NETDEV_STATS:
1014                         p = (char *) net_stats +
1015                                         ixgbe_gstrings_stats[i].stat_offset;
1016                         break;
1017                 case IXGBE_STATS:
1018                         p = (char *) adapter +
1019                                         ixgbe_gstrings_stats[i].stat_offset;
1020                         break;
1021                 }
1022
1023                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1024                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1025         }
1026         for (j = 0; j < adapter->num_tx_queues; j++) {
1027                 ring = adapter->tx_ring[j];
1028                 do {
1029                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1030                         data[i]   = ring->stats.packets;
1031                         data[i+1] = ring->stats.bytes;
1032                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1033                 i += 2;
1034         }
1035         for (j = 0; j < adapter->num_rx_queues; j++) {
1036                 ring = adapter->rx_ring[j];
1037                 do {
1038                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1039                         data[i]   = ring->stats.packets;
1040                         data[i+1] = ring->stats.bytes;
1041                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1042                 i += 2;
1043         }
1044         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1045                 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1046                         data[i++] = adapter->stats.pxontxc[j];
1047                         data[i++] = adapter->stats.pxofftxc[j];
1048                 }
1049                 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1050                         data[i++] = adapter->stats.pxonrxc[j];
1051                         data[i++] = adapter->stats.pxoffrxc[j];
1052                 }
1053         }
1054 }
1055
1056 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1057                               u8 *data)
1058 {
1059         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1060         char *p = (char *)data;
1061         int i;
1062
1063         switch (stringset) {
1064         case ETH_SS_TEST:
1065                 memcpy(data, *ixgbe_gstrings_test,
1066                        IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1067                 break;
1068         case ETH_SS_STATS:
1069                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1070                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1071                                ETH_GSTRING_LEN);
1072                         p += ETH_GSTRING_LEN;
1073                 }
1074                 for (i = 0; i < adapter->num_tx_queues; i++) {
1075                         sprintf(p, "tx_queue_%u_packets", i);
1076                         p += ETH_GSTRING_LEN;
1077                         sprintf(p, "tx_queue_%u_bytes", i);
1078                         p += ETH_GSTRING_LEN;
1079                 }
1080                 for (i = 0; i < adapter->num_rx_queues; i++) {
1081                         sprintf(p, "rx_queue_%u_packets", i);
1082                         p += ETH_GSTRING_LEN;
1083                         sprintf(p, "rx_queue_%u_bytes", i);
1084                         p += ETH_GSTRING_LEN;
1085                 }
1086                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1087                         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1088                                 sprintf(p, "tx_pb_%u_pxon", i);
1089                                 p += ETH_GSTRING_LEN;
1090                                 sprintf(p, "tx_pb_%u_pxoff", i);
1091                                 p += ETH_GSTRING_LEN;
1092                         }
1093                         for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1094                                 sprintf(p, "rx_pb_%u_pxon", i);
1095                                 p += ETH_GSTRING_LEN;
1096                                 sprintf(p, "rx_pb_%u_pxoff", i);
1097                                 p += ETH_GSTRING_LEN;
1098                         }
1099                 }
1100                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1101                 break;
1102         }
1103 }
1104
1105 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1106 {
1107         struct ixgbe_hw *hw = &adapter->hw;
1108         bool link_up;
1109         u32 link_speed = 0;
1110         *data = 0;
1111
1112         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1113         if (link_up)
1114                 return *data;
1115         else
1116                 *data = 1;
1117         return *data;
1118 }
1119
1120 /* ethtool register test data */
1121 struct ixgbe_reg_test {
1122         u16 reg;
1123         u8  array_len;
1124         u8  test_type;
1125         u32 mask;
1126         u32 write;
1127 };
1128
1129 /* In the hardware, registers are laid out either singly, in arrays
1130  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1131  * most tests take place on arrays or single registers (handled
1132  * as a single-element array) and special-case the tables.
1133  * Table tests are always pattern tests.
1134  *
1135  * We also make provision for some required setup steps by specifying
1136  * registers to be written without any read-back testing.
1137  */
1138
1139 #define PATTERN_TEST    1
1140 #define SET_READ_TEST   2
1141 #define WRITE_NO_TEST   3
1142 #define TABLE32_TEST    4
1143 #define TABLE64_TEST_LO 5
1144 #define TABLE64_TEST_HI 6
1145
1146 /* default 82599 register test */
1147 static struct ixgbe_reg_test reg_test_82599[] = {
1148         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1149         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1150         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1151         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1152         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1153         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1154         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1155         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1156         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1157         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1158         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1159         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1160         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1161         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1162         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1163         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1164         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1165         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1166         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1167         { 0, 0, 0, 0 }
1168 };
1169
1170 /* default 82598 register test */
1171 static struct ixgbe_reg_test reg_test_82598[] = {
1172         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1173         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1174         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1175         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1176         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1177         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1178         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1179         /* Enable all four RX queues before testing. */
1180         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1181         /* RDH is read-only for 82598, only test RDT. */
1182         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1183         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1184         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1185         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1186         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1187         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1188         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1189         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1190         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1191         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1192         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1193         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1194         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1195         { 0, 0, 0, 0 }
1196 };
1197
1198 #define REG_PATTERN_TEST(R, M, W)                                             \
1199 {                                                                             \
1200         u32 pat, val, before;                                                 \
1201         const u32 _test[] = {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
1202         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {                       \
1203                 before = readl(adapter->hw.hw_addr + R);                      \
1204                 writel((_test[pat] & W), (adapter->hw.hw_addr + R));          \
1205                 val = readl(adapter->hw.hw_addr + R);                         \
1206                 if (val != (_test[pat] & W & M)) {                            \
1207                         e_err(drv, "pattern test reg %04X failed: got "   \
1208                               "0x%08X expected 0x%08X\n",                     \
1209                               R, val, (_test[pat] & W & M));                \
1210                         *data = R;                                            \
1211                         writel(before, adapter->hw.hw_addr + R);              \
1212                         return 1;                                             \
1213                 }                                                             \
1214                 writel(before, adapter->hw.hw_addr + R);                      \
1215         }                                                                     \
1216 }
1217
1218 #define REG_SET_AND_CHECK(R, M, W)                                            \
1219 {                                                                             \
1220         u32 val, before;                                                      \
1221         before = readl(adapter->hw.hw_addr + R);                              \
1222         writel((W & M), (adapter->hw.hw_addr + R));                           \
1223         val = readl(adapter->hw.hw_addr + R);                                 \
1224         if ((W & M) != (val & M)) {                                           \
1225                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "  \
1226                       "expected 0x%08X\n", R, (val & M), (W & M));        \
1227                 *data = R;                                                    \
1228                 writel(before, (adapter->hw.hw_addr + R));                    \
1229                 return 1;                                                     \
1230         }                                                                     \
1231         writel(before, (adapter->hw.hw_addr + R));                            \
1232 }
1233
1234 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1235 {
1236         struct ixgbe_reg_test *test;
1237         u32 value, before, after;
1238         u32 i, toggle;
1239
1240         if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1241                 toggle = 0x7FFFF30F;
1242                 test = reg_test_82599;
1243         } else {
1244                 toggle = 0x7FFFF3FF;
1245                 test = reg_test_82598;
1246         }
1247
1248         /*
1249          * Because the status register is such a special case,
1250          * we handle it separately from the rest of the register
1251          * tests.  Some bits are read-only, some toggle, and some
1252          * are writeable on newer MACs.
1253          */
1254         before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1255         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1256         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1257         after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1258         if (value != after) {
1259                 e_err(drv, "failed STATUS register test got: 0x%08X "
1260                       "expected: 0x%08X\n", after, value);
1261                 *data = 1;
1262                 return 1;
1263         }
1264         /* restore previous status */
1265         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1266
1267         /*
1268          * Perform the remainder of the register test, looping through
1269          * the test table until we either fail or reach the null entry.
1270          */
1271         while (test->reg) {
1272                 for (i = 0; i < test->array_len; i++) {
1273                         switch (test->test_type) {
1274                         case PATTERN_TEST:
1275                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1276                                                 test->mask,
1277                                                 test->write);
1278                                 break;
1279                         case SET_READ_TEST:
1280                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1281                                                 test->mask,
1282                                                 test->write);
1283                                 break;
1284                         case WRITE_NO_TEST:
1285                                 writel(test->write,
1286                                        (adapter->hw.hw_addr + test->reg)
1287                                        + (i * 0x40));
1288                                 break;
1289                         case TABLE32_TEST:
1290                                 REG_PATTERN_TEST(test->reg + (i * 4),
1291                                                 test->mask,
1292                                                 test->write);
1293                                 break;
1294                         case TABLE64_TEST_LO:
1295                                 REG_PATTERN_TEST(test->reg + (i * 8),
1296                                                 test->mask,
1297                                                 test->write);
1298                                 break;
1299                         case TABLE64_TEST_HI:
1300                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1301                                                 test->mask,
1302                                                 test->write);
1303                                 break;
1304                         }
1305                 }
1306                 test++;
1307         }
1308
1309         *data = 0;
1310         return 0;
1311 }
1312
1313 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1314 {
1315         struct ixgbe_hw *hw = &adapter->hw;
1316         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1317                 *data = 1;
1318         else
1319                 *data = 0;
1320         return *data;
1321 }
1322
1323 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1324 {
1325         struct net_device *netdev = (struct net_device *) data;
1326         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1327
1328         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1329
1330         return IRQ_HANDLED;
1331 }
1332
1333 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1334 {
1335         struct net_device *netdev = adapter->netdev;
1336         u32 mask, i = 0, shared_int = true;
1337         u32 irq = adapter->pdev->irq;
1338
1339         *data = 0;
1340
1341         /* Hook up test interrupt handler just for this test */
1342         if (adapter->msix_entries) {
1343                 /* NOTE: we don't test MSI-X interrupts here, yet */
1344                 return 0;
1345         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1346                 shared_int = false;
1347                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1348                                 netdev)) {
1349                         *data = 1;
1350                         return -1;
1351                 }
1352         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1353                                 netdev->name, netdev)) {
1354                 shared_int = false;
1355         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1356                                netdev->name, netdev)) {
1357                 *data = 1;
1358                 return -1;
1359         }
1360         e_info(hw, "testing %s interrupt\n", shared_int ?
1361                "shared" : "unshared");
1362
1363         /* Disable all the interrupts */
1364         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1365         msleep(10);
1366
1367         /* Test each interrupt */
1368         for (; i < 10; i++) {
1369                 /* Interrupt to test */
1370                 mask = 1 << i;
1371
1372                 if (!shared_int) {
1373                         /*
1374                          * Disable the interrupts to be reported in
1375                          * the cause register and then force the same
1376                          * interrupt and see if one gets posted.  If
1377                          * an interrupt was posted to the bus, the
1378                          * test failed.
1379                          */
1380                         adapter->test_icr = 0;
1381                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1382                                         ~mask & 0x00007FFF);
1383                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1384                                         ~mask & 0x00007FFF);
1385                         msleep(10);
1386
1387                         if (adapter->test_icr & mask) {
1388                                 *data = 3;
1389                                 break;
1390                         }
1391                 }
1392
1393                 /*
1394                  * Enable the interrupt to be reported in the cause
1395                  * register and then force the same interrupt and see
1396                  * if one gets posted.  If an interrupt was not posted
1397                  * to the bus, the test failed.
1398                  */
1399                 adapter->test_icr = 0;
1400                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1401                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1402                 msleep(10);
1403
1404                 if (!(adapter->test_icr &mask)) {
1405                         *data = 4;
1406                         break;
1407                 }
1408
1409                 if (!shared_int) {
1410                         /*
1411                          * Disable the other interrupts to be reported in
1412                          * the cause register and then force the other
1413                          * interrupts and see if any get posted.  If
1414                          * an interrupt was posted to the bus, the
1415                          * test failed.
1416                          */
1417                         adapter->test_icr = 0;
1418                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1419                                         ~mask & 0x00007FFF);
1420                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1421                                         ~mask & 0x00007FFF);
1422                         msleep(10);
1423
1424                         if (adapter->test_icr) {
1425                                 *data = 5;
1426                                 break;
1427                         }
1428                 }
1429         }
1430
1431         /* Disable all the interrupts */
1432         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1433         msleep(10);
1434
1435         /* Unhook test interrupt handler */
1436         free_irq(irq, netdev);
1437
1438         return *data;
1439 }
1440
1441 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1442 {
1443         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1444         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1445         struct ixgbe_hw *hw = &adapter->hw;
1446         u32 reg_ctl;
1447
1448         /* shut down the DMA engines now so they can be reinitialized later */
1449
1450         /* first Rx */
1451         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1452         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1453         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1454         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rx_ring->reg_idx));
1455         reg_ctl &= ~IXGBE_RXDCTL_ENABLE;
1456         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rx_ring->reg_idx), reg_ctl);
1457
1458         /* now Tx */
1459         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1460         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1461         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1462
1463         if (hw->mac.type == ixgbe_mac_82599EB) {
1464                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1465                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1466                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1467         }
1468
1469         ixgbe_reset(adapter);
1470
1471         ixgbe_free_tx_resources(adapter, &adapter->test_tx_ring);
1472         ixgbe_free_rx_resources(adapter, &adapter->test_rx_ring);
1473 }
1474
1475 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1476 {
1477         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1478         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1479         u32 rctl, reg_data;
1480         int ret_val;
1481         int err;
1482
1483         /* Setup Tx descriptor ring and Tx buffers */
1484         tx_ring->count = IXGBE_DEFAULT_TXD;
1485         tx_ring->queue_index = 0;
1486         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1487         tx_ring->numa_node = adapter->node;
1488
1489         err = ixgbe_setup_tx_resources(adapter, tx_ring);
1490         if (err)
1491                 return 1;
1492
1493         if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1494                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1495                 reg_data |= IXGBE_DMATXCTL_TE;
1496                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1497         }
1498
1499         ixgbe_configure_tx_ring(adapter, tx_ring);
1500
1501         /* Setup Rx Descriptor ring and Rx buffers */
1502         rx_ring->count = IXGBE_DEFAULT_RXD;
1503         rx_ring->queue_index = 0;
1504         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1505         rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048;
1506         rx_ring->numa_node = adapter->node;
1507
1508         err = ixgbe_setup_rx_resources(adapter, rx_ring);
1509         if (err) {
1510                 ret_val = 4;
1511                 goto err_nomem;
1512         }
1513
1514         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1515         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1516
1517         ixgbe_configure_rx_ring(adapter, rx_ring);
1518
1519         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1520         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1521
1522         return 0;
1523
1524 err_nomem:
1525         ixgbe_free_desc_rings(adapter);
1526         return ret_val;
1527 }
1528
1529 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1530 {
1531         struct ixgbe_hw *hw = &adapter->hw;
1532         u32 reg_data;
1533
1534         /* right now we only support MAC loopback in the driver */
1535         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1536         /* Setup MAC loopback */
1537         reg_data |= IXGBE_HLREG0_LPBK;
1538         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1539
1540         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1541         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1542         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_data);
1543
1544         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_AUTOC);
1545         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1546         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1547         IXGBE_WRITE_REG(&adapter->hw, IXGBE_AUTOC, reg_data);
1548         IXGBE_WRITE_FLUSH(&adapter->hw);
1549         msleep(10);
1550
1551         /* Disable Atlas Tx lanes; re-enabled in reset path */
1552         if (hw->mac.type == ixgbe_mac_82598EB) {
1553                 u8 atlas;
1554
1555                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1556                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1557                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1558
1559                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1560                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1561                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1562
1563                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1564                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1565                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1566
1567                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1568                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1569                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1570         }
1571
1572         return 0;
1573 }
1574
1575 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1576 {
1577         u32 reg_data;
1578
1579         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1580         reg_data &= ~IXGBE_HLREG0_LPBK;
1581         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1582 }
1583
1584 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1585                                       unsigned int frame_size)
1586 {
1587         memset(skb->data, 0xFF, frame_size);
1588         frame_size &= ~1;
1589         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1590         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1591         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1592 }
1593
1594 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1595                                     unsigned int frame_size)
1596 {
1597         frame_size &= ~1;
1598         if (*(skb->data + 3) == 0xFF) {
1599                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1600                     (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1601                         return 0;
1602                 }
1603         }
1604         return 13;
1605 }
1606
1607 static u16 ixgbe_clean_test_rings(struct ixgbe_adapter *adapter,
1608                                   struct ixgbe_ring *rx_ring,
1609                                   struct ixgbe_ring *tx_ring,
1610                                   unsigned int size)
1611 {
1612         union ixgbe_adv_rx_desc *rx_desc;
1613         struct ixgbe_rx_buffer *rx_buffer_info;
1614         struct ixgbe_tx_buffer *tx_buffer_info;
1615         const int bufsz = rx_ring->rx_buf_len;
1616         u32 staterr;
1617         u16 rx_ntc, tx_ntc, count = 0;
1618
1619         /* initialize next to clean and descriptor values */
1620         rx_ntc = rx_ring->next_to_clean;
1621         tx_ntc = tx_ring->next_to_clean;
1622         rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1623         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1624
1625         while (staterr & IXGBE_RXD_STAT_DD) {
1626                 /* check Rx buffer */
1627                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1628
1629                 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1630                 dma_unmap_single(&adapter->pdev->dev,
1631                                  rx_buffer_info->dma,
1632                                  bufsz,
1633                                  DMA_FROM_DEVICE);
1634                 rx_buffer_info->dma = 0;
1635
1636                 /* verify contents of skb */
1637                 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1638                         count++;
1639
1640                 /* unmap buffer on Tx side */
1641                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1642                 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1643
1644                 /* increment Rx/Tx next to clean counters */
1645                 rx_ntc++;
1646                 if (rx_ntc == rx_ring->count)
1647                         rx_ntc = 0;
1648                 tx_ntc++;
1649                 if (tx_ntc == tx_ring->count)
1650                         tx_ntc = 0;
1651
1652                 /* fetch next descriptor */
1653                 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1654                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1655         }
1656
1657         /* re-map buffers to ring, store next to clean values */
1658         ixgbe_alloc_rx_buffers(adapter, rx_ring, count);
1659         rx_ring->next_to_clean = rx_ntc;
1660         tx_ring->next_to_clean = tx_ntc;
1661
1662         return count;
1663 }
1664
1665 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1666 {
1667         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1668         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1669         int i, j, lc, good_cnt, ret_val = 0;
1670         unsigned int size = 1024;
1671         netdev_tx_t tx_ret_val;
1672         struct sk_buff *skb;
1673
1674         /* allocate test skb */
1675         skb = alloc_skb(size, GFP_KERNEL);
1676         if (!skb)
1677                 return 11;
1678
1679         /* place data into test skb */
1680         ixgbe_create_lbtest_frame(skb, size);
1681         skb_put(skb, size);
1682
1683         /*
1684          * Calculate the loop count based on the largest descriptor ring
1685          * The idea is to wrap the largest ring a number of times using 64
1686          * send/receive pairs during each loop
1687          */
1688
1689         if (rx_ring->count <= tx_ring->count)
1690                 lc = ((tx_ring->count / 64) * 2) + 1;
1691         else
1692                 lc = ((rx_ring->count / 64) * 2) + 1;
1693
1694         for (j = 0; j <= lc; j++) {
1695                 /* reset count of good packets */
1696                 good_cnt = 0;
1697
1698                 /* place 64 packets on the transmit queue*/
1699                 for (i = 0; i < 64; i++) {
1700                         skb_get(skb);
1701                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1702                                                            adapter->netdev,
1703                                                            adapter,
1704                                                            tx_ring);
1705                         if (tx_ret_val == NETDEV_TX_OK)
1706                                 good_cnt++;
1707                 }
1708
1709                 if (good_cnt != 64) {
1710                         ret_val = 12;
1711                         break;
1712                 }
1713
1714                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1715                 msleep(200);
1716
1717                 good_cnt = ixgbe_clean_test_rings(adapter, rx_ring,
1718                                                   tx_ring, size);
1719                 if (good_cnt != 64) {
1720                         ret_val = 13;
1721                         break;
1722                 }
1723         }
1724
1725         /* free the original skb */
1726         kfree_skb(skb);
1727
1728         return ret_val;
1729 }
1730
1731 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1732 {
1733         *data = ixgbe_setup_desc_rings(adapter);
1734         if (*data)
1735                 goto out;
1736         *data = ixgbe_setup_loopback_test(adapter);
1737         if (*data)
1738                 goto err_loopback;
1739         *data = ixgbe_run_loopback_test(adapter);
1740         ixgbe_loopback_cleanup(adapter);
1741
1742 err_loopback:
1743         ixgbe_free_desc_rings(adapter);
1744 out:
1745         return *data;
1746 }
1747
1748 static void ixgbe_diag_test(struct net_device *netdev,
1749                             struct ethtool_test *eth_test, u64 *data)
1750 {
1751         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1752         bool if_running = netif_running(netdev);
1753
1754         set_bit(__IXGBE_TESTING, &adapter->state);
1755         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1756                 /* Offline tests */
1757
1758                 e_info(hw, "offline testing starting\n");
1759
1760                 /* Link test performed before hardware reset so autoneg doesn't
1761                  * interfere with test result */
1762                 if (ixgbe_link_test(adapter, &data[4]))
1763                         eth_test->flags |= ETH_TEST_FL_FAILED;
1764
1765                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1766                         int i;
1767                         for (i = 0; i < adapter->num_vfs; i++) {
1768                                 if (adapter->vfinfo[i].clear_to_send) {
1769                                         netdev_warn(netdev, "%s",
1770                                                     "offline diagnostic is not "
1771                                                     "supported when VFs are "
1772                                                     "present\n");
1773                                         data[0] = 1;
1774                                         data[1] = 1;
1775                                         data[2] = 1;
1776                                         data[3] = 1;
1777                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1778                                         clear_bit(__IXGBE_TESTING,
1779                                                   &adapter->state);
1780                                         goto skip_ol_tests;
1781                                 }
1782                         }
1783                 }
1784
1785                 if (if_running)
1786                         /* indicate we're in test mode */
1787                         dev_close(netdev);
1788                 else
1789                         ixgbe_reset(adapter);
1790
1791                 e_info(hw, "register testing starting\n");
1792                 if (ixgbe_reg_test(adapter, &data[0]))
1793                         eth_test->flags |= ETH_TEST_FL_FAILED;
1794
1795                 ixgbe_reset(adapter);
1796                 e_info(hw, "eeprom testing starting\n");
1797                 if (ixgbe_eeprom_test(adapter, &data[1]))
1798                         eth_test->flags |= ETH_TEST_FL_FAILED;
1799
1800                 ixgbe_reset(adapter);
1801                 e_info(hw, "interrupt testing starting\n");
1802                 if (ixgbe_intr_test(adapter, &data[2]))
1803                         eth_test->flags |= ETH_TEST_FL_FAILED;
1804
1805                 /* If SRIOV or VMDq is enabled then skip MAC
1806                  * loopback diagnostic. */
1807                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1808                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1809                         e_info(hw, "Skip MAC loopback diagnostic in VT "
1810                                "mode\n");
1811                         data[3] = 0;
1812                         goto skip_loopback;
1813                 }
1814
1815                 ixgbe_reset(adapter);
1816                 e_info(hw, "loopback testing starting\n");
1817                 if (ixgbe_loopback_test(adapter, &data[3]))
1818                         eth_test->flags |= ETH_TEST_FL_FAILED;
1819
1820 skip_loopback:
1821                 ixgbe_reset(adapter);
1822
1823                 clear_bit(__IXGBE_TESTING, &adapter->state);
1824                 if (if_running)
1825                         dev_open(netdev);
1826         } else {
1827                 e_info(hw, "online testing starting\n");
1828                 /* Online tests */
1829                 if (ixgbe_link_test(adapter, &data[4]))
1830                         eth_test->flags |= ETH_TEST_FL_FAILED;
1831
1832                 /* Online tests aren't run; pass by default */
1833                 data[0] = 0;
1834                 data[1] = 0;
1835                 data[2] = 0;
1836                 data[3] = 0;
1837
1838                 clear_bit(__IXGBE_TESTING, &adapter->state);
1839         }
1840 skip_ol_tests:
1841         msleep_interruptible(4 * 1000);
1842 }
1843
1844 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1845                                struct ethtool_wolinfo *wol)
1846 {
1847         struct ixgbe_hw *hw = &adapter->hw;
1848         int retval = 1;
1849
1850         switch(hw->device_id) {
1851         case IXGBE_DEV_ID_82599_KX4:
1852                 retval = 0;
1853                 break;
1854         default:
1855                 wol->supported = 0;
1856         }
1857
1858         return retval;
1859 }
1860
1861 static void ixgbe_get_wol(struct net_device *netdev,
1862                           struct ethtool_wolinfo *wol)
1863 {
1864         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1865
1866         wol->supported = WAKE_UCAST | WAKE_MCAST |
1867                          WAKE_BCAST | WAKE_MAGIC;
1868         wol->wolopts = 0;
1869
1870         if (ixgbe_wol_exclusion(adapter, wol) ||
1871             !device_can_wakeup(&adapter->pdev->dev))
1872                 return;
1873
1874         if (adapter->wol & IXGBE_WUFC_EX)
1875                 wol->wolopts |= WAKE_UCAST;
1876         if (adapter->wol & IXGBE_WUFC_MC)
1877                 wol->wolopts |= WAKE_MCAST;
1878         if (adapter->wol & IXGBE_WUFC_BC)
1879                 wol->wolopts |= WAKE_BCAST;
1880         if (adapter->wol & IXGBE_WUFC_MAG)
1881                 wol->wolopts |= WAKE_MAGIC;
1882 }
1883
1884 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1885 {
1886         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1887
1888         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1889                 return -EOPNOTSUPP;
1890
1891         if (ixgbe_wol_exclusion(adapter, wol))
1892                 return wol->wolopts ? -EOPNOTSUPP : 0;
1893
1894         adapter->wol = 0;
1895
1896         if (wol->wolopts & WAKE_UCAST)
1897                 adapter->wol |= IXGBE_WUFC_EX;
1898         if (wol->wolopts & WAKE_MCAST)
1899                 adapter->wol |= IXGBE_WUFC_MC;
1900         if (wol->wolopts & WAKE_BCAST)
1901                 adapter->wol |= IXGBE_WUFC_BC;
1902         if (wol->wolopts & WAKE_MAGIC)
1903                 adapter->wol |= IXGBE_WUFC_MAG;
1904
1905         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1906
1907         return 0;
1908 }
1909
1910 static int ixgbe_nway_reset(struct net_device *netdev)
1911 {
1912         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1913
1914         if (netif_running(netdev))
1915                 ixgbe_reinit_locked(adapter);
1916
1917         return 0;
1918 }
1919
1920 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
1921 {
1922         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1923         struct ixgbe_hw *hw = &adapter->hw;
1924         u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1925         u32 i;
1926
1927         if (!data || data > 300)
1928                 data = 300;
1929
1930         for (i = 0; i < (data * 1000); i += 400) {
1931                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
1932                 msleep_interruptible(200);
1933                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
1934                 msleep_interruptible(200);
1935         }
1936
1937         /* Restore LED settings */
1938         IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
1939
1940         return 0;
1941 }
1942
1943 static int ixgbe_get_coalesce(struct net_device *netdev,
1944                               struct ethtool_coalesce *ec)
1945 {
1946         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1947
1948         ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0]->work_limit;
1949
1950         /* only valid if in constant ITR mode */
1951         switch (adapter->rx_itr_setting) {
1952         case 0:
1953                 /* throttling disabled */
1954                 ec->rx_coalesce_usecs = 0;
1955                 break;
1956         case 1:
1957                 /* dynamic ITR mode */
1958                 ec->rx_coalesce_usecs = 1;
1959                 break;
1960         default:
1961                 /* fixed interrupt rate mode */
1962                 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
1963                 break;
1964         }
1965
1966         /* if in mixed tx/rx queues per vector mode, report only rx settings */
1967         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count)
1968                 return 0;
1969
1970         /* only valid if in constant ITR mode */
1971         switch (adapter->tx_itr_setting) {
1972         case 0:
1973                 /* throttling disabled */
1974                 ec->tx_coalesce_usecs = 0;
1975                 break;
1976         case 1:
1977                 /* dynamic ITR mode */
1978                 ec->tx_coalesce_usecs = 1;
1979                 break;
1980         default:
1981                 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
1982                 break;
1983         }
1984
1985         return 0;
1986 }
1987
1988 static int ixgbe_set_coalesce(struct net_device *netdev,
1989                               struct ethtool_coalesce *ec)
1990 {
1991         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1992         struct ixgbe_q_vector *q_vector;
1993         int i;
1994         bool need_reset = false;
1995
1996         /* don't accept tx specific changes if we've got mixed RxTx vectors */
1997         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count
1998            && ec->tx_coalesce_usecs)
1999                 return -EINVAL;
2000
2001         if (ec->tx_max_coalesced_frames_irq)
2002                 adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
2003
2004         if (ec->rx_coalesce_usecs > 1) {
2005                 u32 max_int;
2006                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
2007                         max_int = IXGBE_MAX_RSC_INT_RATE;
2008                 else
2009                         max_int = IXGBE_MAX_INT_RATE;
2010
2011                 /* check the limits */
2012                 if ((1000000/ec->rx_coalesce_usecs > max_int) ||
2013                     (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2014                         return -EINVAL;
2015
2016                 /* store the value in ints/second */
2017                 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2018
2019                 /* static value of interrupt rate */
2020                 adapter->rx_itr_setting = adapter->rx_eitr_param;
2021                 /* clear the lower bit as its used for dynamic state */
2022                 adapter->rx_itr_setting &= ~1;
2023         } else if (ec->rx_coalesce_usecs == 1) {
2024                 /* 1 means dynamic mode */
2025                 adapter->rx_eitr_param = 20000;
2026                 adapter->rx_itr_setting = 1;
2027         } else {
2028                 /*
2029                  * any other value means disable eitr, which is best
2030                  * served by setting the interrupt rate very high
2031                  */
2032                 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2033                 adapter->rx_itr_setting = 0;
2034
2035                 /*
2036                  * if hardware RSC is enabled, disable it when
2037                  * setting low latency mode, to avoid errata, assuming
2038                  * that when the user set low latency mode they want
2039                  * it at the cost of anything else
2040                  */
2041                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2042                         adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2043                         if (netdev->features & NETIF_F_LRO) {
2044                                 netdev->features &= ~NETIF_F_LRO;
2045                                 e_info(probe, "rx-usecs set to 0, "
2046                                        "disabling RSC\n");
2047                         }
2048                         need_reset = true;
2049                 }
2050         }
2051
2052         if (ec->tx_coalesce_usecs > 1) {
2053                 /*
2054                  * don't have to worry about max_int as above because
2055                  * tx vectors don't do hardware RSC (an rx function)
2056                  */
2057                 /* check the limits */
2058                 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2059                     (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2060                         return -EINVAL;
2061
2062                 /* store the value in ints/second */
2063                 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs;
2064
2065                 /* static value of interrupt rate */
2066                 adapter->tx_itr_setting = adapter->tx_eitr_param;
2067
2068                 /* clear the lower bit as its used for dynamic state */
2069                 adapter->tx_itr_setting &= ~1;
2070         } else if (ec->tx_coalesce_usecs == 1) {
2071                 /* 1 means dynamic mode */
2072                 adapter->tx_eitr_param = 10000;
2073                 adapter->tx_itr_setting = 1;
2074         } else {
2075                 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2076                 adapter->tx_itr_setting = 0;
2077         }
2078
2079         /* MSI/MSIx Interrupt Mode */
2080         if (adapter->flags &
2081             (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2082                 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2083                 for (i = 0; i < num_vectors; i++) {
2084                         q_vector = adapter->q_vector[i];
2085                         if (q_vector->txr_count && !q_vector->rxr_count)
2086                                 /* tx only */
2087                                 q_vector->eitr = adapter->tx_eitr_param;
2088                         else
2089                                 /* rx only or mixed */
2090                                 q_vector->eitr = adapter->rx_eitr_param;
2091                         ixgbe_write_eitr(q_vector);
2092                 }
2093         /* Legacy Interrupt Mode */
2094         } else {
2095                 q_vector = adapter->q_vector[0];
2096                 q_vector->eitr = adapter->rx_eitr_param;
2097                 ixgbe_write_eitr(q_vector);
2098         }
2099
2100         /*
2101          * do reset here at the end to make sure EITR==0 case is handled
2102          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2103          * also locks in RSC enable/disable which requires reset
2104          */
2105         if (need_reset) {
2106                 if (netif_running(netdev))
2107                         ixgbe_reinit_locked(adapter);
2108                 else
2109                         ixgbe_reset(adapter);
2110         }
2111
2112         return 0;
2113 }
2114
2115 static int ixgbe_set_flags(struct net_device *netdev, u32 data)
2116 {
2117         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2118         bool need_reset = false;
2119         int rc;
2120
2121 #ifdef CONFIG_IXGBE_DCB
2122         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
2123             !(data & ETH_FLAG_RXVLAN))
2124                 return -EINVAL;
2125 #endif
2126
2127         need_reset = (data & ETH_FLAG_RXVLAN) !=
2128                      (netdev->features & NETIF_F_HW_VLAN_RX);
2129
2130         rc = ethtool_op_set_flags(netdev, data, ETH_FLAG_LRO |
2131                                         ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN);
2132         if (rc)
2133                 return rc;
2134
2135         /* if state changes we need to update adapter->flags and reset */
2136         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) {
2137                 /*
2138                  * cast both to bool and verify if they are set the same
2139                  * but only enable RSC if itr is non-zero, as
2140                  * itr=0 and RSC are mutually exclusive
2141                  */
2142                 if (((!!(data & ETH_FLAG_LRO)) !=
2143                      (!!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) &&
2144                     adapter->rx_itr_setting) {
2145                         adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
2146                         switch (adapter->hw.mac.type) {
2147                         case ixgbe_mac_82599EB:
2148                                 need_reset = true;
2149                                 break;
2150                         default:
2151                                 break;
2152                         }
2153                 } else if (!adapter->rx_itr_setting) {
2154                         netdev->features &= ~NETIF_F_LRO;
2155                         if (data & ETH_FLAG_LRO)
2156                                 e_info(probe, "rx-usecs set to 0, "
2157                                        "LRO/RSC cannot be enabled.\n");
2158                 }
2159         }
2160
2161         /*
2162          * Check if Flow Director n-tuple support was enabled or disabled.  If
2163          * the state changed, we need to reset.
2164          */
2165         if ((adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) &&
2166             (!(data & ETH_FLAG_NTUPLE))) {
2167                 /* turn off Flow Director perfect, set hash and reset */
2168                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2169                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2170                 need_reset = true;
2171         } else if ((!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) &&
2172                    (data & ETH_FLAG_NTUPLE)) {
2173                 /* turn off Flow Director hash, enable perfect and reset */
2174                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2175                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2176                 need_reset = true;
2177         } else {
2178                 /* no state change */
2179         }
2180
2181         if (need_reset) {
2182                 if (netif_running(netdev))
2183                         ixgbe_reinit_locked(adapter);
2184                 else
2185                         ixgbe_reset(adapter);
2186         }
2187
2188         return 0;
2189 }
2190
2191 static int ixgbe_set_rx_ntuple(struct net_device *dev,
2192                                struct ethtool_rx_ntuple *cmd)
2193 {
2194         struct ixgbe_adapter *adapter = netdev_priv(dev);
2195         struct ethtool_rx_ntuple_flow_spec fs = cmd->fs;
2196         struct ixgbe_atr_input input_struct;
2197         struct ixgbe_atr_input_masks input_masks;
2198         int target_queue;
2199
2200         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
2201                 return -EOPNOTSUPP;
2202
2203         /*
2204          * Don't allow programming if the action is a queue greater than
2205          * the number of online Tx queues.
2206          */
2207         if ((fs.action >= adapter->num_tx_queues) ||
2208             (fs.action < ETHTOOL_RXNTUPLE_ACTION_DROP))
2209                 return -EINVAL;
2210
2211         memset(&input_struct, 0, sizeof(struct ixgbe_atr_input));
2212         memset(&input_masks, 0, sizeof(struct ixgbe_atr_input_masks));
2213
2214         input_masks.src_ip_mask = fs.m_u.tcp_ip4_spec.ip4src;
2215         input_masks.dst_ip_mask = fs.m_u.tcp_ip4_spec.ip4dst;
2216         input_masks.src_port_mask = fs.m_u.tcp_ip4_spec.psrc;
2217         input_masks.dst_port_mask = fs.m_u.tcp_ip4_spec.pdst;
2218         input_masks.vlan_id_mask = fs.vlan_tag_mask;
2219         /* only use the lowest 2 bytes for flex bytes */
2220         input_masks.data_mask = (fs.data_mask & 0xffff);
2221
2222         switch (fs.flow_type) {
2223         case TCP_V4_FLOW:
2224                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_TCP);
2225                 break;
2226         case UDP_V4_FLOW:
2227                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_UDP);
2228                 break;
2229         case SCTP_V4_FLOW:
2230                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_SCTP);
2231                 break;
2232         default:
2233                 return -1;
2234         }
2235
2236         /* Mask bits from the inputs based on user-supplied mask */
2237         ixgbe_atr_set_src_ipv4_82599(&input_struct,
2238                     (fs.h_u.tcp_ip4_spec.ip4src & ~fs.m_u.tcp_ip4_spec.ip4src));
2239         ixgbe_atr_set_dst_ipv4_82599(&input_struct,
2240                     (fs.h_u.tcp_ip4_spec.ip4dst & ~fs.m_u.tcp_ip4_spec.ip4dst));
2241         /* 82599 expects these to be byte-swapped for perfect filtering */
2242         ixgbe_atr_set_src_port_82599(&input_struct,
2243                ((ntohs(fs.h_u.tcp_ip4_spec.psrc)) & ~fs.m_u.tcp_ip4_spec.psrc));
2244         ixgbe_atr_set_dst_port_82599(&input_struct,
2245                ((ntohs(fs.h_u.tcp_ip4_spec.pdst)) & ~fs.m_u.tcp_ip4_spec.pdst));
2246
2247         /* VLAN and Flex bytes are either completely masked or not */
2248         if (!fs.vlan_tag_mask)
2249                 ixgbe_atr_set_vlan_id_82599(&input_struct, fs.vlan_tag);
2250
2251         if (!input_masks.data_mask)
2252                 /* make sure we only use the first 2 bytes of user data */
2253                 ixgbe_atr_set_flex_byte_82599(&input_struct,
2254                                               (fs.data & 0xffff));
2255
2256         /* determine if we need to drop or route the packet */
2257         if (fs.action == ETHTOOL_RXNTUPLE_ACTION_DROP)
2258                 target_queue = MAX_RX_QUEUES - 1;
2259         else
2260                 target_queue = fs.action;
2261
2262         spin_lock(&adapter->fdir_perfect_lock);
2263         ixgbe_fdir_add_perfect_filter_82599(&adapter->hw, &input_struct,
2264                                             &input_masks, 0, target_queue);
2265         spin_unlock(&adapter->fdir_perfect_lock);
2266
2267         return 0;
2268 }
2269
2270 static const struct ethtool_ops ixgbe_ethtool_ops = {
2271         .get_settings           = ixgbe_get_settings,
2272         .set_settings           = ixgbe_set_settings,
2273         .get_drvinfo            = ixgbe_get_drvinfo,
2274         .get_regs_len           = ixgbe_get_regs_len,
2275         .get_regs               = ixgbe_get_regs,
2276         .get_wol                = ixgbe_get_wol,
2277         .set_wol                = ixgbe_set_wol,
2278         .nway_reset             = ixgbe_nway_reset,
2279         .get_link               = ethtool_op_get_link,
2280         .get_eeprom_len         = ixgbe_get_eeprom_len,
2281         .get_eeprom             = ixgbe_get_eeprom,
2282         .get_ringparam          = ixgbe_get_ringparam,
2283         .set_ringparam          = ixgbe_set_ringparam,
2284         .get_pauseparam         = ixgbe_get_pauseparam,
2285         .set_pauseparam         = ixgbe_set_pauseparam,
2286         .get_rx_csum            = ixgbe_get_rx_csum,
2287         .set_rx_csum            = ixgbe_set_rx_csum,
2288         .get_tx_csum            = ixgbe_get_tx_csum,
2289         .set_tx_csum            = ixgbe_set_tx_csum,
2290         .get_sg                 = ethtool_op_get_sg,
2291         .set_sg                 = ethtool_op_set_sg,
2292         .get_msglevel           = ixgbe_get_msglevel,
2293         .set_msglevel           = ixgbe_set_msglevel,
2294         .get_tso                = ethtool_op_get_tso,
2295         .set_tso                = ixgbe_set_tso,
2296         .self_test              = ixgbe_diag_test,
2297         .get_strings            = ixgbe_get_strings,
2298         .phys_id                = ixgbe_phys_id,
2299         .get_sset_count         = ixgbe_get_sset_count,
2300         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2301         .get_coalesce           = ixgbe_get_coalesce,
2302         .set_coalesce           = ixgbe_set_coalesce,
2303         .get_flags              = ethtool_op_get_flags,
2304         .set_flags              = ixgbe_set_flags,
2305         .set_rx_ntuple          = ixgbe_set_rx_ntuple,
2306 };
2307
2308 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2309 {
2310         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2311 }