drivers/net/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2010 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for ixgbe */
  29
  30 #include <linux/types.h>
  31 #include <linux/module.h>
  32 #include <linux/slab.h>
  33 #include <linux/pci.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/vmalloc.h>
  37 #include <linux/uaccess.h>
  38
  39 #include "ixgbe.h"
  40
  41
  42 #define IXGBE_ALL_RAR_ENTRIES 16
  43
  44 enum {NETDEV_STATS, IXGBE_STATS};
  45
  46 struct ixgbe_stats {
  47         char stat_string[ETH_GSTRING_LEN];
  48         int type;
  49         int sizeof_stat;
  50         int stat_offset;
  51 };
  52
  53 #define IXGBE_STAT(m)           IXGBE_STATS, \
  54                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  55                                 offsetof(struct ixgbe_adapter, m)
  56 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  57                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  58                                 offsetof(struct rtnl_link_stats64, m)
  59
  60 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
  61         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  62         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  63         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  64         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  65         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  66         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  67         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  68         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  69         {"lsc_int", IXGBE_STAT(lsc_int)},
  70         {"tx_busy", IXGBE_STAT(tx_busy)},
  71         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  72         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  73         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  74         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  75         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  76         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  77         {"broadcast", IXGBE_STAT(stats.bprc)},
  78         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  79         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  80         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  81         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  82         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  83         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  84         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  85         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  86         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  87         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  88         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  89         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  90         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  91         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  92         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  93         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  94         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
  95         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  96         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
  97         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
  98         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
  99         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 100         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 101         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 102         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 103         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 104         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 105 #ifdef IXGBE_FCOE
 106         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 107         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 108         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 109         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 110         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 111         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 112 #endif /* IXGBE_FCOE */
 113 };
 114
 115 #define IXGBE_QUEUE_STATS_LEN \
 116         ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
 117         ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
 118         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 119 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 120 #define IXGBE_PB_STATS_LEN ( \
 121                  (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
 122                  IXGBE_FLAG_DCB_ENABLED) ? \
 123                  (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 124                   sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 125                   sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 126                   sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 127                   / sizeof(u64) : 0)
 128 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 129                          IXGBE_PB_STATS_LEN + \
 130                          IXGBE_QUEUE_STATS_LEN)
 131
 132 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 133         "Register test  (offline)", "Eeprom test    (offline)",
 134         "Interrupt test (offline)", "Loopback test  (offline)",
 135         "Link test   (on/offline)"
 136 };
 137 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 138
 139 static int ixgbe_get_settings(struct net_device *netdev,
 140                               struct ethtool_cmd *ecmd)
 141 {
 142         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 143         struct ixgbe_hw *hw = &adapter->hw;
 144         u32 link_speed = 0;
 145         bool link_up;
 146
 147         ecmd->supported = SUPPORTED_10000baseT_Full;
 148         ecmd->autoneg = AUTONEG_ENABLE;
 149         ecmd->transceiver = XCVR_EXTERNAL;
 150         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 151             (hw->phy.multispeed_fiber)) {
 152                 ecmd->supported |= (SUPPORTED_1000baseT_Full |
 153                                     SUPPORTED_Autoneg);
 154
 155                 ecmd->advertising = ADVERTISED_Autoneg;
 156                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
 157                         ecmd->advertising |= ADVERTISED_10000baseT_Full;
 158                 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
 159                         ecmd->advertising |= ADVERTISED_1000baseT_Full;
 160                 /*
 161                  * It's possible that phy.autoneg_advertised may not be
 162                  * set yet.  If so display what the default would be -
 163                  * both 1G and 10G supported.
 164                  */
 165                 if (!(ecmd->advertising & (ADVERTISED_1000baseT_Full |
 166                                            ADVERTISED_10000baseT_Full)))
 167                         ecmd->advertising |= (ADVERTISED_10000baseT_Full |
 168                                               ADVERTISED_1000baseT_Full);
 169
 170                 if (hw->phy.media_type == ixgbe_media_type_copper) {
 171                         ecmd->supported |= SUPPORTED_TP;
 172                         ecmd->advertising |= ADVERTISED_TP;
 173                         ecmd->port = PORT_TP;
 174                 } else {
 175                         ecmd->supported |= SUPPORTED_FIBRE;
 176                         ecmd->advertising |= ADVERTISED_FIBRE;
 177                         ecmd->port = PORT_FIBRE;
 178                 }
 179         } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
 180                 /* Set as FIBRE until SERDES defined in kernel */
 181                 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
 182                         ecmd->supported = (SUPPORTED_1000baseT_Full |
 183                                            SUPPORTED_FIBRE);
 184                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 185                                              ADVERTISED_FIBRE);
 186                         ecmd->port = PORT_FIBRE;
 187                         ecmd->autoneg = AUTONEG_DISABLE;
 188                 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE) ||
 189                            (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
 190                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 191                                             SUPPORTED_Autoneg |
 192                                             SUPPORTED_FIBRE);
 193                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 194                                              ADVERTISED_1000baseT_Full |
 195                                              ADVERTISED_Autoneg |
 196                                              ADVERTISED_FIBRE);
 197                         ecmd->port = PORT_FIBRE;
 198                 } else {
 199                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 200                                             SUPPORTED_FIBRE);
 201                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 202                                              ADVERTISED_1000baseT_Full |
 203                                              ADVERTISED_FIBRE);
 204                         ecmd->port = PORT_FIBRE;
 205                 }
 206         } else {
 207                 ecmd->supported |= SUPPORTED_FIBRE;
 208                 ecmd->advertising = (ADVERTISED_10000baseT_Full |
 209                                      ADVERTISED_FIBRE);
 210                 ecmd->port = PORT_FIBRE;
 211                 ecmd->autoneg = AUTONEG_DISABLE;
 212         }
 213
 214         /* Get PHY type */
 215         switch (adapter->hw.phy.type) {
 216         case ixgbe_phy_tn:
 217         case ixgbe_phy_cu_unknown:
 218                 /* Copper 10G-BASET */
 219                 ecmd->port = PORT_TP;
 220                 break;
 221         case ixgbe_phy_qt:
 222                 ecmd->port = PORT_FIBRE;
 223                 break;
 224         case ixgbe_phy_nl:
 225         case ixgbe_phy_sfp_passive_tyco:
 226         case ixgbe_phy_sfp_passive_unknown:
 227         case ixgbe_phy_sfp_ftl:
 228         case ixgbe_phy_sfp_avago:
 229         case ixgbe_phy_sfp_intel:
 230         case ixgbe_phy_sfp_unknown:
 231                 switch (adapter->hw.phy.sfp_type) {
 232                 /* SFP+ devices, further checking needed */
 233                 case ixgbe_sfp_type_da_cu:
 234                 case ixgbe_sfp_type_da_cu_core0:
 235                 case ixgbe_sfp_type_da_cu_core1:
 236                         ecmd->port = PORT_DA;
 237                         break;
 238                 case ixgbe_sfp_type_sr:
 239                 case ixgbe_sfp_type_lr:
 240                 case ixgbe_sfp_type_srlr_core0:
 241                 case ixgbe_sfp_type_srlr_core1:
 242                         ecmd->port = PORT_FIBRE;
 243                         break;
 244                 case ixgbe_sfp_type_not_present:
 245                         ecmd->port = PORT_NONE;
 246                         break;
 247                 case ixgbe_sfp_type_1g_cu_core0:
 248                 case ixgbe_sfp_type_1g_cu_core1:
 249                         ecmd->port = PORT_TP;
 250                         ecmd->supported = SUPPORTED_TP;
 251                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 252                                              ADVERTISED_TP);
 253                         break;
 254                 case ixgbe_sfp_type_unknown:
 255                 default:
 256                         ecmd->port = PORT_OTHER;
 257                         break;
 258                 }
 259                 break;
 260         case ixgbe_phy_xaui:
 261                 ecmd->port = PORT_NONE;
 262                 break;
 263         case ixgbe_phy_unknown:
 264         case ixgbe_phy_generic:
 265         case ixgbe_phy_sfp_unsupported:
 266         default:
 267                 ecmd->port = PORT_OTHER;
 268                 break;
 269         }
 270
 271         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 272         if (link_up) {
 273                 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
 274                                SPEED_10000 : SPEED_1000;
 275                 ecmd->duplex = DUPLEX_FULL;
 276         } else {
 277                 ecmd->speed = -1;
 278                 ecmd->duplex = -1;
 279         }
 280
 281         return 0;
 282 }
 283
 284 static int ixgbe_set_settings(struct net_device *netdev,
 285                               struct ethtool_cmd *ecmd)
 286 {
 287         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 288         struct ixgbe_hw *hw = &adapter->hw;
 289         u32 advertised, old;
 290         s32 err = 0;
 291
 292         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 293             (hw->phy.multispeed_fiber)) {
 294                 /* 10000/copper and 1000/copper must autoneg
 295                  * this function does not support any duplex forcing, but can
 296                  * limit the advertising of the adapter to only 10000 or 1000 */
 297                 if (ecmd->autoneg == AUTONEG_DISABLE)
 298                         return -EINVAL;
 299
 300                 old = hw->phy.autoneg_advertised;
 301                 advertised = 0;
 302                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 303                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 304
 305                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 306                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 307
 308                 if (old == advertised)
 309                         return err;
 310                 /* this sets the link speed and restarts auto-neg */
 311                 hw->mac.autotry_restart = true;
 312                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
 313                 if (err) {
 314                         e_info(probe, "setup link failed with code %d\n", err);
 315                         hw->mac.ops.setup_link(hw, old, true, true);
 316                 }
 317         } else {
 318                 /* in this case we currently only support 10Gb/FULL */
 319                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 320                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 321                     (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 322                         return -EINVAL;
 323         }
 324
 325         return err;
 326 }
 327
 328 static void ixgbe_get_pauseparam(struct net_device *netdev,
 329                                  struct ethtool_pauseparam *pause)
 330 {
 331         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 332         struct ixgbe_hw *hw = &adapter->hw;
 333
 334         /*
 335          * Flow Control Autoneg isn't on if
 336          *  - we didn't ask for it OR
 337          *  - it failed, we know this by tx & rx being off
 338          */
 339         if (hw->fc.disable_fc_autoneg ||
 340             (hw->fc.current_mode == ixgbe_fc_none))
 341                 pause->autoneg = 0;
 342         else
 343                 pause->autoneg = 1;
 344
 345 #ifdef CONFIG_DCB
 346         if (hw->fc.current_mode == ixgbe_fc_pfc) {
 347                 pause->rx_pause = 0;
 348                 pause->tx_pause = 0;
 349         }
 350
 351 #endif
 352         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 353                 pause->rx_pause = 1;
 354         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 355                 pause->tx_pause = 1;
 356         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 357                 pause->rx_pause = 1;
 358                 pause->tx_pause = 1;
 359         }
 360 }
 361
 362 static int ixgbe_set_pauseparam(struct net_device *netdev,
 363                                 struct ethtool_pauseparam *pause)
 364 {
 365         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 366         struct ixgbe_hw *hw = &adapter->hw;
 367         struct ixgbe_fc_info fc;
 368
 369 #ifdef CONFIG_DCB
 370         if (adapter->dcb_cfg.pfc_mode_enable ||
 371                 ((hw->mac.type == ixgbe_mac_82598EB) &&
 372                 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
 373                 return -EINVAL;
 374
 375 #endif
 376
 377         fc = hw->fc;
 378
 379         if (pause->autoneg != AUTONEG_ENABLE)
 380                 fc.disable_fc_autoneg = true;
 381         else
 382                 fc.disable_fc_autoneg = false;
 383
 384         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 385                 fc.requested_mode = ixgbe_fc_full;
 386         else if (pause->rx_pause && !pause->tx_pause)
 387                 fc.requested_mode = ixgbe_fc_rx_pause;
 388         else if (!pause->rx_pause && pause->tx_pause)
 389                 fc.requested_mode = ixgbe_fc_tx_pause;
 390         else if (!pause->rx_pause && !pause->tx_pause)
 391                 fc.requested_mode = ixgbe_fc_none;
 392         else
 393                 return -EINVAL;
 394
 395 #ifdef CONFIG_DCB
 396         adapter->last_lfc_mode = fc.requested_mode;
 397 #endif
 398
 399         /* if the thing changed then we'll update and use new autoneg */
 400         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 401                 hw->fc = fc;
 402                 if (netif_running(netdev))
 403                         ixgbe_reinit_locked(adapter);
 404                 else
 405                         ixgbe_reset(adapter);
 406         }
 407
 408         return 0;
 409 }
 410
 411 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
 412 {
 413         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 414         return adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED;
 415 }
 416
 417 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
 418 {
 419         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 420         if (data)
 421                 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
 422         else
 423                 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
 424
 425         return 0;
 426 }
 427
 428 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
 429 {
 430         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 431 }
 432
 433 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
 434 {
 435         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 436
 437         if (data) {
 438                 netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
 439                 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
 440                         netdev->features |= NETIF_F_SCTP_CSUM;
 441         } else {
 442                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
 443                                       NETIF_F_SCTP_CSUM);
 444         }
 445
 446         return 0;
 447 }
 448
 449 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
 450 {
 451         if (data) {
 452                 netdev->features |= NETIF_F_TSO;
 453                 netdev->features |= NETIF_F_TSO6;
 454         } else {
 455                 netdev->features &= ~NETIF_F_TSO;
 456                 netdev->features &= ~NETIF_F_TSO6;
 457         }
 458         return 0;
 459 }
 460
 461 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 462 {
 463         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 464         return adapter->msg_enable;
 465 }
 466
 467 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 468 {
 469         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 470         adapter->msg_enable = data;
 471 }
 472
 473 static int ixgbe_get_regs_len(struct net_device *netdev)
 474 {
 475 #define IXGBE_REGS_LEN  1128
 476         return IXGBE_REGS_LEN * sizeof(u32);
 477 }
 478
 479 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 480
 481 static void ixgbe_get_regs(struct net_device *netdev,
 482                            struct ethtool_regs *regs, void *p)
 483 {
 484         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 485         struct ixgbe_hw *hw = &adapter->hw;
 486         u32 *regs_buff = p;
 487         u8 i;
 488
 489         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 490
 491         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
 492
 493         /* General Registers */
 494         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 495         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 496         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 497         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 498         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 499         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 500         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 501         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 502
 503         /* NVM Register */
 504         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 505         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 506         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 507         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 508         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 509         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 510         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 511         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 512         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 513         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 514
 515         /* Interrupt */
 516         /* don't read EICR because it can clear interrupt causes, instead
 517          * read EICS which is a shadow but doesn't clear EICR */
 518         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 519         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 520         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 521         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 522         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 523         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 524         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 525         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 526         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 527         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 528         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 529         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 530
 531         /* Flow Control */
 532         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 533         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 534         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 535         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 536         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 537         for (i = 0; i < 8; i++) {
 538                 switch (hw->mac.type) {
 539                 case ixgbe_mac_82598EB:
 540                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 541                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 542                         break;
 543                 case ixgbe_mac_82599EB:
 544                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 545                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 546                         break;
 547                 default:
 548                         break;
 549                 }
 550         }
 551         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 552         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 553
 554         /* Receive DMA */
 555         for (i = 0; i < 64; i++)
 556                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 557         for (i = 0; i < 64; i++)
 558                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 559         for (i = 0; i < 64; i++)
 560                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 561         for (i = 0; i < 64; i++)
 562                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 563         for (i = 0; i < 64; i++)
 564                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 565         for (i = 0; i < 64; i++)
 566                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 567         for (i = 0; i < 16; i++)
 568                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 569         for (i = 0; i < 16; i++)
 570                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 571         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 572         for (i = 0; i < 8; i++)
 573                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 574         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 575         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 576
 577         /* Receive */
 578         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 579         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 580         for (i = 0; i < 16; i++)
 581                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 582         for (i = 0; i < 16; i++)
 583                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 584         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 585         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 586         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 587         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 588         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 589         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 590         for (i = 0; i < 8; i++)
 591                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 592         for (i = 0; i < 8; i++)
 593                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 594         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 595
 596         /* Transmit */
 597         for (i = 0; i < 32; i++)
 598                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 599         for (i = 0; i < 32; i++)
 600                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 601         for (i = 0; i < 32; i++)
 602                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 603         for (i = 0; i < 32; i++)
 604                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 605         for (i = 0; i < 32; i++)
 606                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 607         for (i = 0; i < 32; i++)
 608                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 609         for (i = 0; i < 32; i++)
 610                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 611         for (i = 0; i < 32; i++)
 612                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 613         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 614         for (i = 0; i < 16; i++)
 615                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 616         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 617         for (i = 0; i < 8; i++)
 618                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 619         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 620
 621         /* Wake Up */
 622         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 623         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 624         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 625         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 626         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 627         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 628         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 629         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 630         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 631
 632         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
 633         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 634         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
 635         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 636         for (i = 0; i < 8; i++)
 637                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 638         for (i = 0; i < 8; i++)
 639                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 640         for (i = 0; i < 8; i++)
 641                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 642         for (i = 0; i < 8; i++)
 643                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 644         for (i = 0; i < 8; i++)
 645                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
 646         for (i = 0; i < 8; i++)
 647                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
 648
 649         /* Statistics */
 650         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 651         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 652         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 653         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 654         for (i = 0; i < 8; i++)
 655                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 656         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 657         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 658         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 659         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 660         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 661         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 662         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 663         for (i = 0; i < 8; i++)
 664                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 665         for (i = 0; i < 8; i++)
 666                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 667         for (i = 0; i < 8; i++)
 668                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 669         for (i = 0; i < 8; i++)
 670                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 671         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 672         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 673         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 674         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 675         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 676         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 677         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 678         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 679         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 680         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 681         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 682         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 683         for (i = 0; i < 8; i++)
 684                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 685         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 686         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 687         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 688         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 689         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 690         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 691         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 692         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 693         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 694         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 695         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 696         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 697         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 698         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 699         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 700         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 701         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 702         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 703         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 704         for (i = 0; i < 16; i++)
 705                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 706         for (i = 0; i < 16; i++)
 707                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 708         for (i = 0; i < 16; i++)
 709                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 710         for (i = 0; i < 16; i++)
 711                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 712
 713         /* MAC */
 714         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 715         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 716         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 717         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 718         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 719         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 720         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 721         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 722         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 723         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 724         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 725         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 726         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 727         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 728         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 729         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 730         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 731         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 732         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 733         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 734         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 735         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 736         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 737         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 738         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 739         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 740         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 741         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 742         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 743         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 744         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 745         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 746         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 747
 748         /* Diagnostic */
 749         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 750         for (i = 0; i < 8; i++)
 751                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 752         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 753         for (i = 0; i < 4; i++)
 754                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 755         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 756         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 757         for (i = 0; i < 8; i++)
 758                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 759         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 760         for (i = 0; i < 4; i++)
 761                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 762         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 763         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 764         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 765         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 766         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 767         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 768         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 769         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 770         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 771         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 772         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 773         for (i = 0; i < 8; i++)
 774                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 775         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 776         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 777         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 778         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 779         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 780         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 781         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 782         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 783         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 784 }
 785
 786 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 787 {
 788         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 789         return adapter->hw.eeprom.word_size * 2;
 790 }
 791
 792 static int ixgbe_get_eeprom(struct net_device *netdev,
 793                             struct ethtool_eeprom *eeprom, u8 *bytes)
 794 {
 795         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 796         struct ixgbe_hw *hw = &adapter->hw;
 797         u16 *eeprom_buff;
 798         int first_word, last_word, eeprom_len;
 799         int ret_val = 0;
 800         u16 i;
 801
 802         if (eeprom->len == 0)
 803                 return -EINVAL;
 804
 805         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 806
 807         first_word = eeprom->offset >> 1;
 808         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 809         eeprom_len = last_word - first_word + 1;
 810
 811         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 812         if (!eeprom_buff)
 813                 return -ENOMEM;
 814
 815         for (i = 0; i < eeprom_len; i++) {
 816                 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
 817                     &eeprom_buff[i])))
 818                         break;
 819         }
 820
 821         /* Device's eeprom is always little-endian, word addressable */
 822         for (i = 0; i < eeprom_len; i++)
 823                 le16_to_cpus(&eeprom_buff[i]);
 824
 825         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 826         kfree(eeprom_buff);
 827
 828         return ret_val;
 829 }
 830
 831 static void ixgbe_get_drvinfo(struct net_device *netdev,
 832                               struct ethtool_drvinfo *drvinfo)
 833 {
 834         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 835         char firmware_version[32];
 836
 837         strncpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
 838         strncpy(drvinfo->version, ixgbe_driver_version,
 839                 sizeof(drvinfo->version));
 840
 841         snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
 842                  (adapter->eeprom_version & 0xF000) >> 12,
 843                  (adapter->eeprom_version & 0x0FF0) >> 4,
 844                  adapter->eeprom_version & 0x000F);
 845
 846         strncpy(drvinfo->fw_version, firmware_version,
 847                 sizeof(drvinfo->fw_version));
 848         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
 849                 sizeof(drvinfo->bus_info));
 850         drvinfo->n_stats = IXGBE_STATS_LEN;
 851         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 852         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 853 }
 854
 855 static void ixgbe_get_ringparam(struct net_device *netdev,
 856                                 struct ethtool_ringparam *ring)
 857 {
 858         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 859         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 860         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 861
 862         ring->rx_max_pending = IXGBE_MAX_RXD;
 863         ring->tx_max_pending = IXGBE_MAX_TXD;
 864         ring->rx_mini_max_pending = 0;
 865         ring->rx_jumbo_max_pending = 0;
 866         ring->rx_pending = rx_ring->count;
 867         ring->tx_pending = tx_ring->count;
 868         ring->rx_mini_pending = 0;
 869         ring->rx_jumbo_pending = 0;
 870 }
 871
 872 static int ixgbe_set_ringparam(struct net_device *netdev,
 873                                struct ethtool_ringparam *ring)
 874 {
 875         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 876         struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
 877         int i, err = 0;
 878         u32 new_rx_count, new_tx_count;
 879         bool need_update = false;
 880
 881         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 882                 return -EINVAL;
 883
 884         new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
 885         new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
 886         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 887
 888         new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
 889         new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
 890         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 891
 892         if ((new_tx_count == adapter->tx_ring[0]->count) &&
 893             (new_rx_count == adapter->rx_ring[0]->count)) {
 894                 /* nothing to do */
 895                 return 0;
 896         }
 897
 898         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 899                 msleep(1);
 900
 901         if (!netif_running(adapter->netdev)) {
 902                 for (i = 0; i < adapter->num_tx_queues; i++)
 903                         adapter->tx_ring[i]->count = new_tx_count;
 904                 for (i = 0; i < adapter->num_rx_queues; i++)
 905                         adapter->rx_ring[i]->count = new_rx_count;
 906                 adapter->tx_ring_count = new_tx_count;
 907                 adapter->rx_ring_count = new_rx_count;
 908                 goto clear_reset;
 909         }
 910
 911         temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
 912         if (!temp_tx_ring) {
 913                 err = -ENOMEM;
 914                 goto clear_reset;
 915         }
 916
 917         if (new_tx_count != adapter->tx_ring_count) {
 918                 for (i = 0; i < adapter->num_tx_queues; i++) {
 919                         memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
 920                                sizeof(struct ixgbe_ring));
 921                         temp_tx_ring[i].count = new_tx_count;
 922                         err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);
 923                         if (err) {
 924                                 while (i) {
 925                                         i--;
 926                                         ixgbe_free_tx_resources(&temp_tx_ring[i]);
 927                                 }
 928                                 goto clear_reset;
 929                         }
 930                 }
 931                 need_update = true;
 932         }
 933
 934         temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
 935         if (!temp_rx_ring) {
 936                 err = -ENOMEM;
 937                 goto err_setup;
 938         }
 939
 940         if (new_rx_count != adapter->rx_ring_count) {
 941                 for (i = 0; i < adapter->num_rx_queues; i++) {
 942                         memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
 943                                sizeof(struct ixgbe_ring));
 944                         temp_rx_ring[i].count = new_rx_count;
 945                         err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);
 946                         if (err) {
 947                                 while (i) {
 948                                         i--;
 949                                         ixgbe_free_rx_resources(&temp_rx_ring[i]);
 950                                 }
 951                                 goto err_setup;
 952                         }
 953                 }
 954                 need_update = true;
 955         }
 956
 957         /* if rings need to be updated, here's the place to do it in one shot */
 958         if (need_update) {
 959                 ixgbe_down(adapter);
 960
 961                 /* tx */
 962                 if (new_tx_count != adapter->tx_ring_count) {
 963                         for (i = 0; i < adapter->num_tx_queues; i++) {
 964                                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
 965                                 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
 966                                        sizeof(struct ixgbe_ring));
 967                         }
 968                         adapter->tx_ring_count = new_tx_count;
 969                 }
 970
 971                 /* rx */
 972                 if (new_rx_count != adapter->rx_ring_count) {
 973                         for (i = 0; i < adapter->num_rx_queues; i++) {
 974                                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
 975                                 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
 976                                        sizeof(struct ixgbe_ring));
 977                         }
 978                         adapter->rx_ring_count = new_rx_count;
 979                 }
 980                 ixgbe_up(adapter);
 981         }
 982
 983         vfree(temp_rx_ring);
 984 err_setup:
 985         vfree(temp_tx_ring);
 986 clear_reset:
 987         clear_bit(__IXGBE_RESETTING, &adapter->state);
 988         return err;
 989 }
 990
 991 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
 992 {
 993         switch (sset) {
 994         case ETH_SS_TEST:
 995                 return IXGBE_TEST_LEN;
 996         case ETH_SS_STATS:
 997                 return IXGBE_STATS_LEN;
 998         case ETH_SS_NTUPLE_FILTERS:
 999                 return ETHTOOL_MAX_NTUPLE_LIST_ENTRY *
1000                        ETHTOOL_MAX_NTUPLE_STRING_PER_ENTRY;
1001         default:
1002                 return -EOPNOTSUPP;
1003         }
1004 }
1005
1006 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1007                                     struct ethtool_stats *stats, u64 *data)
1008 {
1009         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1010         struct rtnl_link_stats64 temp;
1011         const struct rtnl_link_stats64 *net_stats;
1012         unsigned int start;
1013         struct ixgbe_ring *ring;
1014         int i, j;
1015         char *p = NULL;
1016
1017         ixgbe_update_stats(adapter);
1018         net_stats = dev_get_stats(netdev, &temp);
1019         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1020                 switch (ixgbe_gstrings_stats[i].type) {
1021                 case NETDEV_STATS:
1022                         p = (char *) net_stats +
1023                                         ixgbe_gstrings_stats[i].stat_offset;
1024                         break;
1025                 case IXGBE_STATS:
1026                         p = (char *) adapter +
1027                                         ixgbe_gstrings_stats[i].stat_offset;
1028                         break;
1029                 }
1030
1031                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1032                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1033         }
1034         for (j = 0; j < adapter->num_tx_queues; j++) {
1035                 ring = adapter->tx_ring[j];
1036                 do {
1037                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1038                         data[i]   = ring->stats.packets;
1039                         data[i+1] = ring->stats.bytes;
1040                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1041                 i += 2;
1042         }
1043         for (j = 0; j < adapter->num_rx_queues; j++) {
1044                 ring = adapter->rx_ring[j];
1045                 do {
1046                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1047                         data[i]   = ring->stats.packets;
1048                         data[i+1] = ring->stats.bytes;
1049                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1050                 i += 2;
1051         }
1052         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1053                 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1054                         data[i++] = adapter->stats.pxontxc[j];
1055                         data[i++] = adapter->stats.pxofftxc[j];
1056                 }
1057                 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1058                         data[i++] = adapter->stats.pxonrxc[j];
1059                         data[i++] = adapter->stats.pxoffrxc[j];
1060                 }
1061         }
1062 }
1063
1064 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1065                               u8 *data)
1066 {
1067         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1068         char *p = (char *)data;
1069         int i;
1070
1071         switch (stringset) {
1072         case ETH_SS_TEST:
1073                 memcpy(data, *ixgbe_gstrings_test,
1074                        IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1075                 break;
1076         case ETH_SS_STATS:
1077                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1078                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1079                                ETH_GSTRING_LEN);
1080                         p += ETH_GSTRING_LEN;
1081                 }
1082                 for (i = 0; i < adapter->num_tx_queues; i++) {
1083                         sprintf(p, "tx_queue_%u_packets", i);
1084                         p += ETH_GSTRING_LEN;
1085                         sprintf(p, "tx_queue_%u_bytes", i);
1086                         p += ETH_GSTRING_LEN;
1087                 }
1088                 for (i = 0; i < adapter->num_rx_queues; i++) {
1089                         sprintf(p, "rx_queue_%u_packets", i);
1090                         p += ETH_GSTRING_LEN;
1091                         sprintf(p, "rx_queue_%u_bytes", i);
1092                         p += ETH_GSTRING_LEN;
1093                 }
1094                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1095                         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1096                                 sprintf(p, "tx_pb_%u_pxon", i);
1097                                 p += ETH_GSTRING_LEN;
1098                                 sprintf(p, "tx_pb_%u_pxoff", i);
1099                                 p += ETH_GSTRING_LEN;
1100                         }
1101                         for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1102                                 sprintf(p, "rx_pb_%u_pxon", i);
1103                                 p += ETH_GSTRING_LEN;
1104                                 sprintf(p, "rx_pb_%u_pxoff", i);
1105                                 p += ETH_GSTRING_LEN;
1106                         }
1107                 }
1108                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1109                 break;
1110         }
1111 }
1112
1113 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1114 {
1115         struct ixgbe_hw *hw = &adapter->hw;
1116         bool link_up;
1117         u32 link_speed = 0;
1118         *data = 0;
1119
1120         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1121         if (link_up)
1122                 return *data;
1123         else
1124                 *data = 1;
1125         return *data;
1126 }
1127
1128 /* ethtool register test data */
1129 struct ixgbe_reg_test {
1130         u16 reg;
1131         u8  array_len;
1132         u8  test_type;
1133         u32 mask;
1134         u32 write;
1135 };
1136
1137 /* In the hardware, registers are laid out either singly, in arrays
1138  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1139  * most tests take place on arrays or single registers (handled
1140  * as a single-element array) and special-case the tables.
1141  * Table tests are always pattern tests.
1142  *
1143  * We also make provision for some required setup steps by specifying
1144  * registers to be written without any read-back testing.
1145  */
1146
1147 #define PATTERN_TEST    1
1148 #define SET_READ_TEST   2
1149 #define WRITE_NO_TEST   3
1150 #define TABLE32_TEST    4
1151 #define TABLE64_TEST_LO 5
1152 #define TABLE64_TEST_HI 6
1153
1154 /* default 82599 register test */
1155 static struct ixgbe_reg_test reg_test_82599[] = {
1156         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1157         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1158         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1159         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1160         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1161         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1162         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1163         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1164         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1165         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1166         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1167         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1168         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1169         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1170         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1171         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1172         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1173         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1174         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1175         { 0, 0, 0, 0 }
1176 };
1177
1178 /* default 82598 register test */
1179 static struct ixgbe_reg_test reg_test_82598[] = {
1180         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1181         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1182         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1183         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1184         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1185         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1186         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1187         /* Enable all four RX queues before testing. */
1188         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1189         /* RDH is read-only for 82598, only test RDT. */
1190         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1191         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1192         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1193         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1194         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1195         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1196         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1197         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1198         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1199         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1200         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1201         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1202         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1203         { 0, 0, 0, 0 }
1204 };
1205
1206 #define REG_PATTERN_TEST(R, M, W)                                             \
1207 {                                                                             \
1208         u32 pat, val, before;                                                 \
1209         const u32 _test[] = {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
1210         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {                       \
1211                 before = readl(adapter->hw.hw_addr + R);                      \
1212                 writel((_test[pat] & W), (adapter->hw.hw_addr + R));          \
1213                 val = readl(adapter->hw.hw_addr + R);                         \
1214                 if (val != (_test[pat] & W & M)) {                            \
1215                         e_err(drv, "pattern test reg %04X failed: got "   \
1216                               "0x%08X expected 0x%08X\n",                     \
1217                               R, val, (_test[pat] & W & M));                \
1218                         *data = R;                                            \
1219                         writel(before, adapter->hw.hw_addr + R);              \
1220                         return 1;                                             \
1221                 }                                                             \
1222                 writel(before, adapter->hw.hw_addr + R);                      \
1223         }                                                                     \
1224 }
1225
1226 #define REG_SET_AND_CHECK(R, M, W)                                            \
1227 {                                                                             \
1228         u32 val, before;                                                      \
1229         before = readl(adapter->hw.hw_addr + R);                              \
1230         writel((W & M), (adapter->hw.hw_addr + R));                           \
1231         val = readl(adapter->hw.hw_addr + R);                                 \
1232         if ((W & M) != (val & M)) {                                           \
1233                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "  \
1234                       "expected 0x%08X\n", R, (val & M), (W & M));        \
1235                 *data = R;                                                    \
1236                 writel(before, (adapter->hw.hw_addr + R));                    \
1237                 return 1;                                                     \
1238         }                                                                     \
1239         writel(before, (adapter->hw.hw_addr + R));                            \
1240 }
1241
1242 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1243 {
1244         struct ixgbe_reg_test *test;
1245         u32 value, before, after;
1246         u32 i, toggle;
1247
1248         switch (adapter->hw.mac.type) {
1249         case ixgbe_mac_82598EB:
1250                 toggle = 0x7FFFF3FF;
1251                 test = reg_test_82598;
1252                 break;
1253         case ixgbe_mac_82599EB:
1254                 toggle = 0x7FFFF30F;
1255                 test = reg_test_82599;
1256                 break;
1257         default:
1258                 *data = 1;
1259                 return 1;
1260                 break;
1261         }
1262
1263         /*
1264          * Because the status register is such a special case,
1265          * we handle it separately from the rest of the register
1266          * tests.  Some bits are read-only, some toggle, and some
1267          * are writeable on newer MACs.
1268          */
1269         before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1270         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1271         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1272         after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1273         if (value != after) {
1274                 e_err(drv, "failed STATUS register test got: 0x%08X "
1275                       "expected: 0x%08X\n", after, value);
1276                 *data = 1;
1277                 return 1;
1278         }
1279         /* restore previous status */
1280         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1281
1282         /*
1283          * Perform the remainder of the register test, looping through
1284          * the test table until we either fail or reach the null entry.
1285          */
1286         while (test->reg) {
1287                 for (i = 0; i < test->array_len; i++) {
1288                         switch (test->test_type) {
1289                         case PATTERN_TEST:
1290                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1291                                                 test->mask,
1292                                                 test->write);
1293                                 break;
1294                         case SET_READ_TEST:
1295                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1296                                                 test->mask,
1297                                                 test->write);
1298                                 break;
1299                         case WRITE_NO_TEST:
1300                                 writel(test->write,
1301                                        (adapter->hw.hw_addr + test->reg)
1302                                        + (i * 0x40));
1303                                 break;
1304                         case TABLE32_TEST:
1305                                 REG_PATTERN_TEST(test->reg + (i * 4),
1306                                                 test->mask,
1307                                                 test->write);
1308                                 break;
1309                         case TABLE64_TEST_LO:
1310                                 REG_PATTERN_TEST(test->reg + (i * 8),
1311                                                 test->mask,
1312                                                 test->write);
1313                                 break;
1314                         case TABLE64_TEST_HI:
1315                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1316                                                 test->mask,
1317                                                 test->write);
1318                                 break;
1319                         }
1320                 }
1321                 test++;
1322         }
1323
1324         *data = 0;
1325         return 0;
1326 }
1327
1328 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1329 {
1330         struct ixgbe_hw *hw = &adapter->hw;
1331         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1332                 *data = 1;
1333         else
1334                 *data = 0;
1335         return *data;
1336 }
1337
1338 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1339 {
1340         struct net_device *netdev = (struct net_device *) data;
1341         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1342
1343         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1344
1345         return IRQ_HANDLED;
1346 }
1347
1348 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1349 {
1350         struct net_device *netdev = adapter->netdev;
1351         u32 mask, i = 0, shared_int = true;
1352         u32 irq = adapter->pdev->irq;
1353
1354         *data = 0;
1355
1356         /* Hook up test interrupt handler just for this test */
1357         if (adapter->msix_entries) {
1358                 /* NOTE: we don't test MSI-X interrupts here, yet */
1359                 return 0;
1360         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1361                 shared_int = false;
1362                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1363                                 netdev)) {
1364                         *data = 1;
1365                         return -1;
1366                 }
1367         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1368                                 netdev->name, netdev)) {
1369                 shared_int = false;
1370         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1371                                netdev->name, netdev)) {
1372                 *data = 1;
1373                 return -1;
1374         }
1375         e_info(hw, "testing %s interrupt\n", shared_int ?
1376                "shared" : "unshared");
1377
1378         /* Disable all the interrupts */
1379         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1380         msleep(10);
1381
1382         /* Test each interrupt */
1383         for (; i < 10; i++) {
1384                 /* Interrupt to test */
1385                 mask = 1 << i;
1386
1387                 if (!shared_int) {
1388                         /*
1389                          * Disable the interrupts to be reported in
1390                          * the cause register and then force the same
1391                          * interrupt and see if one gets posted.  If
1392                          * an interrupt was posted to the bus, the
1393                          * test failed.
1394                          */
1395                         adapter->test_icr = 0;
1396                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1397                                         ~mask & 0x00007FFF);
1398                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1399                                         ~mask & 0x00007FFF);
1400                         msleep(10);
1401
1402                         if (adapter->test_icr & mask) {
1403                                 *data = 3;
1404                                 break;
1405                         }
1406                 }
1407
1408                 /*
1409                  * Enable the interrupt to be reported in the cause
1410                  * register and then force the same interrupt and see
1411                  * if one gets posted.  If an interrupt was not posted
1412                  * to the bus, the test failed.
1413                  */
1414                 adapter->test_icr = 0;
1415                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1416                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1417                 msleep(10);
1418
1419                 if (!(adapter->test_icr &mask)) {
1420                         *data = 4;
1421                         break;
1422                 }
1423
1424                 if (!shared_int) {
1425                         /*
1426                          * Disable the other interrupts to be reported in
1427                          * the cause register and then force the other
1428                          * interrupts and see if any get posted.  If
1429                          * an interrupt was posted to the bus, the
1430                          * test failed.
1431                          */
1432                         adapter->test_icr = 0;
1433                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1434                                         ~mask & 0x00007FFF);
1435                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1436                                         ~mask & 0x00007FFF);
1437                         msleep(10);
1438
1439                         if (adapter->test_icr) {
1440                                 *data = 5;
1441                                 break;
1442                         }
1443                 }
1444         }
1445
1446         /* Disable all the interrupts */
1447         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1448         msleep(10);
1449
1450         /* Unhook test interrupt handler */
1451         free_irq(irq, netdev);
1452
1453         return *data;
1454 }
1455
1456 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1457 {
1458         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1459         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1460         struct ixgbe_hw *hw = &adapter->hw;
1461         u32 reg_ctl;
1462
1463         /* shut down the DMA engines now so they can be reinitialized later */
1464
1465         /* first Rx */
1466         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1467         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1468         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1469         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rx_ring->reg_idx));
1470         reg_ctl &= ~IXGBE_RXDCTL_ENABLE;
1471         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rx_ring->reg_idx), reg_ctl);
1472
1473         /* now Tx */
1474         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1475         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1476         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1477
1478         switch (hw->mac.type) {
1479         case ixgbe_mac_82599EB:
1480                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1481                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1482                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1483                 break;
1484         default:
1485                 break;
1486         }
1487
1488         ixgbe_reset(adapter);
1489
1490         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1491         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1492 }
1493
1494 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1495 {
1496         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1497         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1498         u32 rctl, reg_data;
1499         int ret_val;
1500         int err;
1501
1502         /* Setup Tx descriptor ring and Tx buffers */
1503         tx_ring->count = IXGBE_DEFAULT_TXD;
1504         tx_ring->queue_index = 0;
1505         tx_ring->dev = &adapter->pdev->dev;
1506         tx_ring->netdev = adapter->netdev;
1507         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1508         tx_ring->numa_node = adapter->node;
1509
1510         err = ixgbe_setup_tx_resources(tx_ring);
1511         if (err)
1512                 return 1;
1513
1514         switch (adapter->hw.mac.type) {
1515         case ixgbe_mac_82599EB:
1516                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1517                 reg_data |= IXGBE_DMATXCTL_TE;
1518                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1519                 break;
1520         default:
1521                 break;
1522         }
1523
1524         ixgbe_configure_tx_ring(adapter, tx_ring);
1525
1526         /* Setup Rx Descriptor ring and Rx buffers */
1527         rx_ring->count = IXGBE_DEFAULT_RXD;
1528         rx_ring->queue_index = 0;
1529         rx_ring->dev = &adapter->pdev->dev;
1530         rx_ring->netdev = adapter->netdev;
1531         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1532         rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048;
1533         rx_ring->numa_node = adapter->node;
1534
1535         err = ixgbe_setup_rx_resources(rx_ring);
1536         if (err) {
1537                 ret_val = 4;
1538                 goto err_nomem;
1539         }
1540
1541         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1542         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1543
1544         ixgbe_configure_rx_ring(adapter, rx_ring);
1545
1546         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1547         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1548
1549         return 0;
1550
1551 err_nomem:
1552         ixgbe_free_desc_rings(adapter);
1553         return ret_val;
1554 }
1555
1556 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1557 {
1558         struct ixgbe_hw *hw = &adapter->hw;
1559         u32 reg_data;
1560
1561         /* right now we only support MAC loopback in the driver */
1562         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1563         /* Setup MAC loopback */
1564         reg_data |= IXGBE_HLREG0_LPBK;
1565         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1566
1567         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1568         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1569         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_data);
1570
1571         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_AUTOC);
1572         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1573         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1574         IXGBE_WRITE_REG(&adapter->hw, IXGBE_AUTOC, reg_data);
1575         IXGBE_WRITE_FLUSH(&adapter->hw);
1576         msleep(10);
1577
1578         /* Disable Atlas Tx lanes; re-enabled in reset path */
1579         if (hw->mac.type == ixgbe_mac_82598EB) {
1580                 u8 atlas;
1581
1582                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1583                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1584                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1585
1586                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1587                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1588                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1589
1590                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1591                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1592                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1593
1594                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1595                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1596                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1597         }
1598
1599         return 0;
1600 }
1601
1602 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1603 {
1604         u32 reg_data;
1605
1606         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1607         reg_data &= ~IXGBE_HLREG0_LPBK;
1608         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1609 }
1610
1611 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1612                                       unsigned int frame_size)
1613 {
1614         memset(skb->data, 0xFF, frame_size);
1615         frame_size &= ~1;
1616         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1617         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1618         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1619 }
1620
1621 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1622                                     unsigned int frame_size)
1623 {
1624         frame_size &= ~1;
1625         if (*(skb->data + 3) == 0xFF) {
1626                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1627                     (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1628                         return 0;
1629                 }
1630         }
1631         return 13;
1632 }
1633
1634 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1635                                   struct ixgbe_ring *tx_ring,
1636                                   unsigned int size)
1637 {
1638         union ixgbe_adv_rx_desc *rx_desc;
1639         struct ixgbe_rx_buffer *rx_buffer_info;
1640         struct ixgbe_tx_buffer *tx_buffer_info;
1641         const int bufsz = rx_ring->rx_buf_len;
1642         u32 staterr;
1643         u16 rx_ntc, tx_ntc, count = 0;
1644
1645         /* initialize next to clean and descriptor values */
1646         rx_ntc = rx_ring->next_to_clean;
1647         tx_ntc = tx_ring->next_to_clean;
1648         rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1649         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1650
1651         while (staterr & IXGBE_RXD_STAT_DD) {
1652                 /* check Rx buffer */
1653                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1654
1655                 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1656                 dma_unmap_single(rx_ring->dev,
1657                                  rx_buffer_info->dma,
1658                                  bufsz,
1659                                  DMA_FROM_DEVICE);
1660                 rx_buffer_info->dma = 0;
1661
1662                 /* verify contents of skb */
1663                 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1664                         count++;
1665
1666                 /* unmap buffer on Tx side */
1667                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1668                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1669
1670                 /* increment Rx/Tx next to clean counters */
1671                 rx_ntc++;
1672                 if (rx_ntc == rx_ring->count)
1673                         rx_ntc = 0;
1674                 tx_ntc++;
1675                 if (tx_ntc == tx_ring->count)
1676                         tx_ntc = 0;
1677
1678                 /* fetch next descriptor */
1679                 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1680                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1681         }
1682
1683         /* re-map buffers to ring, store next to clean values */
1684         ixgbe_alloc_rx_buffers(rx_ring, count);
1685         rx_ring->next_to_clean = rx_ntc;
1686         tx_ring->next_to_clean = tx_ntc;
1687
1688         return count;
1689 }
1690
1691 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1692 {
1693         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1694         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1695         int i, j, lc, good_cnt, ret_val = 0;
1696         unsigned int size = 1024;
1697         netdev_tx_t tx_ret_val;
1698         struct sk_buff *skb;
1699
1700         /* allocate test skb */
1701         skb = alloc_skb(size, GFP_KERNEL);
1702         if (!skb)
1703                 return 11;
1704
1705         /* place data into test skb */
1706         ixgbe_create_lbtest_frame(skb, size);
1707         skb_put(skb, size);
1708
1709         /*
1710          * Calculate the loop count based on the largest descriptor ring
1711          * The idea is to wrap the largest ring a number of times using 64
1712          * send/receive pairs during each loop
1713          */
1714
1715         if (rx_ring->count <= tx_ring->count)
1716                 lc = ((tx_ring->count / 64) * 2) + 1;
1717         else
1718                 lc = ((rx_ring->count / 64) * 2) + 1;
1719
1720         for (j = 0; j <= lc; j++) {
1721                 /* reset count of good packets */
1722                 good_cnt = 0;
1723
1724                 /* place 64 packets on the transmit queue*/
1725                 for (i = 0; i < 64; i++) {
1726                         skb_get(skb);
1727                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1728                                                            adapter,
1729                                                            tx_ring);
1730                         if (tx_ret_val == NETDEV_TX_OK)
1731                                 good_cnt++;
1732                 }
1733
1734                 if (good_cnt != 64) {
1735                         ret_val = 12;
1736                         break;
1737                 }
1738
1739                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1740                 msleep(200);
1741
1742                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1743                 if (good_cnt != 64) {
1744                         ret_val = 13;
1745                         break;
1746                 }
1747         }
1748
1749         /* free the original skb */
1750         kfree_skb(skb);
1751
1752         return ret_val;
1753 }
1754
1755 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1756 {
1757         *data = ixgbe_setup_desc_rings(adapter);
1758         if (*data)
1759                 goto out;
1760         *data = ixgbe_setup_loopback_test(adapter);
1761         if (*data)
1762                 goto err_loopback;
1763         *data = ixgbe_run_loopback_test(adapter);
1764         ixgbe_loopback_cleanup(adapter);
1765
1766 err_loopback:
1767         ixgbe_free_desc_rings(adapter);
1768 out:
1769         return *data;
1770 }
1771
1772 static void ixgbe_diag_test(struct net_device *netdev,
1773                             struct ethtool_test *eth_test, u64 *data)
1774 {
1775         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1776         bool if_running = netif_running(netdev);
1777
1778         set_bit(__IXGBE_TESTING, &adapter->state);
1779         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1780                 /* Offline tests */
1781
1782                 e_info(hw, "offline testing starting\n");
1783
1784                 /* Link test performed before hardware reset so autoneg doesn't
1785                  * interfere with test result */
1786                 if (ixgbe_link_test(adapter, &data[4]))
1787                         eth_test->flags |= ETH_TEST_FL_FAILED;
1788
1789                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1790                         int i;
1791                         for (i = 0; i < adapter->num_vfs; i++) {
1792                                 if (adapter->vfinfo[i].clear_to_send) {
1793                                         netdev_warn(netdev, "%s",
1794                                                     "offline diagnostic is not "
1795                                                     "supported when VFs are "
1796                                                     "present\n");
1797                                         data[0] = 1;
1798                                         data[1] = 1;
1799                                         data[2] = 1;
1800                                         data[3] = 1;
1801                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1802                                         clear_bit(__IXGBE_TESTING,
1803                                                   &adapter->state);
1804                                         goto skip_ol_tests;
1805                                 }
1806                         }
1807                 }
1808
1809                 if (if_running)
1810                         /* indicate we're in test mode */
1811                         dev_close(netdev);
1812                 else
1813                         ixgbe_reset(adapter);
1814
1815                 e_info(hw, "register testing starting\n");
1816                 if (ixgbe_reg_test(adapter, &data[0]))
1817                         eth_test->flags |= ETH_TEST_FL_FAILED;
1818
1819                 ixgbe_reset(adapter);
1820                 e_info(hw, "eeprom testing starting\n");
1821                 if (ixgbe_eeprom_test(adapter, &data[1]))
1822                         eth_test->flags |= ETH_TEST_FL_FAILED;
1823
1824                 ixgbe_reset(adapter);
1825                 e_info(hw, "interrupt testing starting\n");
1826                 if (ixgbe_intr_test(adapter, &data[2]))
1827                         eth_test->flags |= ETH_TEST_FL_FAILED;
1828
1829                 /* If SRIOV or VMDq is enabled then skip MAC
1830                  * loopback diagnostic. */
1831                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1832                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1833                         e_info(hw, "Skip MAC loopback diagnostic in VT "
1834                                "mode\n");
1835                         data[3] = 0;
1836                         goto skip_loopback;
1837                 }
1838
1839                 ixgbe_reset(adapter);
1840                 e_info(hw, "loopback testing starting\n");
1841                 if (ixgbe_loopback_test(adapter, &data[3]))
1842                         eth_test->flags |= ETH_TEST_FL_FAILED;
1843
1844 skip_loopback:
1845                 ixgbe_reset(adapter);
1846
1847                 clear_bit(__IXGBE_TESTING, &adapter->state);
1848                 if (if_running)
1849                         dev_open(netdev);
1850         } else {
1851                 e_info(hw, "online testing starting\n");
1852                 /* Online tests */
1853                 if (ixgbe_link_test(adapter, &data[4]))
1854                         eth_test->flags |= ETH_TEST_FL_FAILED;
1855
1856                 /* Online tests aren't run; pass by default */
1857                 data[0] = 0;
1858                 data[1] = 0;
1859                 data[2] = 0;
1860                 data[3] = 0;
1861
1862                 clear_bit(__IXGBE_TESTING, &adapter->state);
1863         }
1864 skip_ol_tests:
1865         msleep_interruptible(4 * 1000);
1866 }
1867
1868 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1869                                struct ethtool_wolinfo *wol)
1870 {
1871         struct ixgbe_hw *hw = &adapter->hw;
1872         int retval = 1;
1873
1874         switch(hw->device_id) {
1875         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1876                 /* All except this subdevice support WOL */
1877                 if (hw->subsystem_device_id ==
1878                     IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1879                         wol->supported = 0;
1880                         break;
1881                 }
1882         case IXGBE_DEV_ID_82599_KX4:
1883                 retval = 0;
1884                 break;
1885         default:
1886                 wol->supported = 0;
1887         }
1888
1889         return retval;
1890 }
1891
1892 static void ixgbe_get_wol(struct net_device *netdev,
1893                           struct ethtool_wolinfo *wol)
1894 {
1895         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1896
1897         wol->supported = WAKE_UCAST | WAKE_MCAST |
1898                          WAKE_BCAST | WAKE_MAGIC;
1899         wol->wolopts = 0;
1900
1901         if (ixgbe_wol_exclusion(adapter, wol) ||
1902             !device_can_wakeup(&adapter->pdev->dev))
1903                 return;
1904
1905         if (adapter->wol & IXGBE_WUFC_EX)
1906                 wol->wolopts |= WAKE_UCAST;
1907         if (adapter->wol & IXGBE_WUFC_MC)
1908                 wol->wolopts |= WAKE_MCAST;
1909         if (adapter->wol & IXGBE_WUFC_BC)
1910                 wol->wolopts |= WAKE_BCAST;
1911         if (adapter->wol & IXGBE_WUFC_MAG)
1912                 wol->wolopts |= WAKE_MAGIC;
1913 }
1914
1915 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1916 {
1917         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1918
1919         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1920                 return -EOPNOTSUPP;
1921
1922         if (ixgbe_wol_exclusion(adapter, wol))
1923                 return wol->wolopts ? -EOPNOTSUPP : 0;
1924
1925         adapter->wol = 0;
1926
1927         if (wol->wolopts & WAKE_UCAST)
1928                 adapter->wol |= IXGBE_WUFC_EX;
1929         if (wol->wolopts & WAKE_MCAST)
1930                 adapter->wol |= IXGBE_WUFC_MC;
1931         if (wol->wolopts & WAKE_BCAST)
1932                 adapter->wol |= IXGBE_WUFC_BC;
1933         if (wol->wolopts & WAKE_MAGIC)
1934                 adapter->wol |= IXGBE_WUFC_MAG;
1935
1936         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1937
1938         return 0;
1939 }
1940
1941 static int ixgbe_nway_reset(struct net_device *netdev)
1942 {
1943         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1944
1945         if (netif_running(netdev))
1946                 ixgbe_reinit_locked(adapter);
1947
1948         return 0;
1949 }
1950
1951 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
1952 {
1953         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1954         struct ixgbe_hw *hw = &adapter->hw;
1955         u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1956         u32 i;
1957
1958         if (!data || data > 300)
1959                 data = 300;
1960
1961         for (i = 0; i < (data * 1000); i += 400) {
1962                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
1963                 msleep_interruptible(200);
1964                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
1965                 msleep_interruptible(200);
1966         }
1967
1968         /* Restore LED settings */
1969         IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
1970
1971         return 0;
1972 }
1973
1974 static int ixgbe_get_coalesce(struct net_device *netdev,
1975                               struct ethtool_coalesce *ec)
1976 {
1977         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1978
1979         ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0]->work_limit;
1980
1981         /* only valid if in constant ITR mode */
1982         switch (adapter->rx_itr_setting) {
1983         case 0:
1984                 /* throttling disabled */
1985                 ec->rx_coalesce_usecs = 0;
1986                 break;
1987         case 1:
1988                 /* dynamic ITR mode */
1989                 ec->rx_coalesce_usecs = 1;
1990                 break;
1991         default:
1992                 /* fixed interrupt rate mode */
1993                 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
1994                 break;
1995         }
1996
1997         /* if in mixed tx/rx queues per vector mode, report only rx settings */
1998         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count)
1999                 return 0;
2000
2001         /* only valid if in constant ITR mode */
2002         switch (adapter->tx_itr_setting) {
2003         case 0:
2004                 /* throttling disabled */
2005                 ec->tx_coalesce_usecs = 0;
2006                 break;
2007         case 1:
2008                 /* dynamic ITR mode */
2009                 ec->tx_coalesce_usecs = 1;
2010                 break;
2011         default:
2012                 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
2013                 break;
2014         }
2015
2016         return 0;
2017 }
2018
2019 /*
2020  * this function must be called before setting the new value of
2021  * rx_itr_setting
2022  */
2023 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2024                              struct ethtool_coalesce *ec)
2025 {
2026         struct net_device *netdev = adapter->netdev;
2027
2028         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
2029                 return false;
2030
2031         /* if interrupt rate is too high then disable RSC */
2032         if (ec->rx_coalesce_usecs != 1 &&
2033             ec->rx_coalesce_usecs <= 1000000/IXGBE_MAX_RSC_INT_RATE) {
2034                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2035                         e_info(probe, "rx-usecs set too low, "
2036                                       "disabling RSC\n");
2037                         adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2038                         return true;
2039                 }
2040         } else {
2041                 /* check the feature flag value and enable RSC if necessary */
2042                 if ((netdev->features & NETIF_F_LRO) &&
2043                     !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2044                         e_info(probe, "rx-usecs set to %d, "
2045                                       "re-enabling RSC\n",
2046                                ec->rx_coalesce_usecs);
2047                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2048                         return true;
2049                 }
2050         }
2051         return false;
2052 }
2053
2054 static int ixgbe_set_coalesce(struct net_device *netdev,
2055                               struct ethtool_coalesce *ec)
2056 {
2057         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2058         struct ixgbe_q_vector *q_vector;
2059         int i;
2060         bool need_reset = false;
2061
2062         /* don't accept tx specific changes if we've got mixed RxTx vectors */
2063         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count
2064            && ec->tx_coalesce_usecs)
2065                 return -EINVAL;
2066
2067         if (ec->tx_max_coalesced_frames_irq)
2068                 adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
2069
2070         if (ec->rx_coalesce_usecs > 1) {
2071                 /* check the limits */
2072                 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2073                     (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2074                         return -EINVAL;
2075
2076                 /* check the old value and enable RSC if necessary */
2077                 need_reset = ixgbe_update_rsc(adapter, ec);
2078
2079                 /* store the value in ints/second */
2080                 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2081
2082                 /* static value of interrupt rate */
2083                 adapter->rx_itr_setting = adapter->rx_eitr_param;
2084                 /* clear the lower bit as its used for dynamic state */
2085                 adapter->rx_itr_setting &= ~1;
2086         } else if (ec->rx_coalesce_usecs == 1) {
2087                 /* check the old value and enable RSC if necessary */
2088                 need_reset = ixgbe_update_rsc(adapter, ec);
2089
2090                 /* 1 means dynamic mode */
2091                 adapter->rx_eitr_param = 20000;
2092                 adapter->rx_itr_setting = 1;
2093         } else {
2094                 /* check the old value and enable RSC if necessary */
2095                 need_reset = ixgbe_update_rsc(adapter, ec);
2096                 /*
2097                  * any other value means disable eitr, which is best
2098                  * served by setting the interrupt rate very high
2099                  */
2100                 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2101                 adapter->rx_itr_setting = 0;
2102         }
2103
2104         if (ec->tx_coalesce_usecs > 1) {
2105                 /*
2106                  * don't have to worry about max_int as above because
2107                  * tx vectors don't do hardware RSC (an rx function)
2108                  */
2109                 /* check the limits */
2110                 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2111                     (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2112                         return -EINVAL;
2113
2114                 /* store the value in ints/second */
2115                 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs;
2116
2117                 /* static value of interrupt rate */
2118                 adapter->tx_itr_setting = adapter->tx_eitr_param;
2119
2120                 /* clear the lower bit as its used for dynamic state */
2121                 adapter->tx_itr_setting &= ~1;
2122         } else if (ec->tx_coalesce_usecs == 1) {
2123                 /* 1 means dynamic mode */
2124                 adapter->tx_eitr_param = 10000;
2125                 adapter->tx_itr_setting = 1;
2126         } else {
2127                 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2128                 adapter->tx_itr_setting = 0;
2129         }
2130
2131         /* MSI/MSIx Interrupt Mode */
2132         if (adapter->flags &
2133             (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2134                 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2135                 for (i = 0; i < num_vectors; i++) {
2136                         q_vector = adapter->q_vector[i];
2137                         if (q_vector->txr_count && !q_vector->rxr_count)
2138                                 /* tx only */
2139                                 q_vector->eitr = adapter->tx_eitr_param;
2140                         else
2141                                 /* rx only or mixed */
2142                                 q_vector->eitr = adapter->rx_eitr_param;
2143                         ixgbe_write_eitr(q_vector);
2144                 }
2145         /* Legacy Interrupt Mode */
2146         } else {
2147                 q_vector = adapter->q_vector[0];
2148                 q_vector->eitr = adapter->rx_eitr_param;
2149                 ixgbe_write_eitr(q_vector);
2150         }
2151
2152         /*
2153          * do reset here at the end to make sure EITR==0 case is handled
2154          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2155          * also locks in RSC enable/disable which requires reset
2156          */
2157         if (need_reset) {
2158                 if (netif_running(netdev))
2159                         ixgbe_reinit_locked(adapter);
2160                 else
2161                         ixgbe_reset(adapter);
2162         }
2163
2164         return 0;
2165 }
2166
2167 static int ixgbe_set_flags(struct net_device *netdev, u32 data)
2168 {
2169         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2170         bool need_reset = false;
2171         int rc;
2172
2173 #ifdef CONFIG_IXGBE_DCB
2174         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
2175             !(data & ETH_FLAG_RXVLAN))
2176                 return -EINVAL;
2177 #endif
2178
2179         need_reset = (data & ETH_FLAG_RXVLAN) !=
2180                      (netdev->features & NETIF_F_HW_VLAN_RX);
2181
2182         rc = ethtool_op_set_flags(netdev, data, ETH_FLAG_LRO |
2183                                         ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN);
2184         if (rc)
2185                 return rc;
2186
2187         /* if state changes we need to update adapter->flags and reset */
2188         if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
2189             (!!(data & ETH_FLAG_LRO) !=
2190              !!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) {
2191                 if ((data & ETH_FLAG_LRO) &&
2192                     (!adapter->rx_itr_setting ||
2193                      (adapter->rx_itr_setting > IXGBE_MAX_RSC_INT_RATE))) {
2194                         e_info(probe, "rx-usecs set too low, "
2195                                       "not enabling RSC.\n");
2196                 } else {
2197                         adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
2198                         switch (adapter->hw.mac.type) {
2199                         case ixgbe_mac_82599EB:
2200                                 need_reset = true;
2201                                 break;
2202                         default:
2203                                 break;
2204                         }
2205                 }
2206         }
2207
2208         /*
2209          * Check if Flow Director n-tuple support was enabled or disabled.  If
2210          * the state changed, we need to reset.
2211          */
2212         if ((adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) &&
2213             (!(data & ETH_FLAG_NTUPLE))) {
2214                 /* turn off Flow Director perfect, set hash and reset */
2215                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2216                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2217                 need_reset = true;
2218         } else if ((!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) &&
2219                    (data & ETH_FLAG_NTUPLE)) {
2220                 /* turn off Flow Director hash, enable perfect and reset */
2221                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2222                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2223                 need_reset = true;
2224         } else {
2225                 /* no state change */
2226         }
2227
2228         if (need_reset) {
2229                 if (netif_running(netdev))
2230                         ixgbe_reinit_locked(adapter);
2231                 else
2232                         ixgbe_reset(adapter);
2233         }
2234
2235         return 0;
2236 }
2237
2238 static int ixgbe_set_rx_ntuple(struct net_device *dev,
2239                                struct ethtool_rx_ntuple *cmd)
2240 {
2241         struct ixgbe_adapter *adapter = netdev_priv(dev);
2242         struct ethtool_rx_ntuple_flow_spec fs = cmd->fs;
2243         struct ixgbe_atr_input input_struct;
2244         struct ixgbe_atr_input_masks input_masks;
2245         int target_queue;
2246
2247         if (adapter->hw.mac.type == ixgbe_mac_82598EB)
2248                 return -EOPNOTSUPP;
2249
2250         /*
2251          * Don't allow programming if the action is a queue greater than
2252          * the number of online Tx queues.
2253          */
2254         if ((fs.action >= adapter->num_tx_queues) ||
2255             (fs.action < ETHTOOL_RXNTUPLE_ACTION_DROP))
2256                 return -EINVAL;
2257
2258         memset(&input_struct, 0, sizeof(struct ixgbe_atr_input));
2259         memset(&input_masks, 0, sizeof(struct ixgbe_atr_input_masks));
2260
2261         input_masks.src_ip_mask = fs.m_u.tcp_ip4_spec.ip4src;
2262         input_masks.dst_ip_mask = fs.m_u.tcp_ip4_spec.ip4dst;
2263         input_masks.src_port_mask = fs.m_u.tcp_ip4_spec.psrc;
2264         input_masks.dst_port_mask = fs.m_u.tcp_ip4_spec.pdst;
2265         input_masks.vlan_id_mask = fs.vlan_tag_mask;
2266         /* only use the lowest 2 bytes for flex bytes */
2267         input_masks.data_mask = (fs.data_mask & 0xffff);
2268
2269         switch (fs.flow_type) {
2270         case TCP_V4_FLOW:
2271                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_TCP);
2272                 break;
2273         case UDP_V4_FLOW:
2274                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_UDP);
2275                 break;
2276         case SCTP_V4_FLOW:
2277                 ixgbe_atr_set_l4type_82599(&input_struct, IXGBE_ATR_L4TYPE_SCTP);
2278                 break;
2279         default:
2280                 return -1;
2281         }
2282
2283         /* Mask bits from the inputs based on user-supplied mask */
2284         ixgbe_atr_set_src_ipv4_82599(&input_struct,
2285                     (fs.h_u.tcp_ip4_spec.ip4src & ~fs.m_u.tcp_ip4_spec.ip4src));
2286         ixgbe_atr_set_dst_ipv4_82599(&input_struct,
2287                     (fs.h_u.tcp_ip4_spec.ip4dst & ~fs.m_u.tcp_ip4_spec.ip4dst));
2288         /* 82599 expects these to be byte-swapped for perfect filtering */
2289         ixgbe_atr_set_src_port_82599(&input_struct,
2290                ((ntohs(fs.h_u.tcp_ip4_spec.psrc)) & ~fs.m_u.tcp_ip4_spec.psrc));
2291         ixgbe_atr_set_dst_port_82599(&input_struct,
2292                ((ntohs(fs.h_u.tcp_ip4_spec.pdst)) & ~fs.m_u.tcp_ip4_spec.pdst));
2293
2294         /* VLAN and Flex bytes are either completely masked or not */
2295         if (!fs.vlan_tag_mask)
2296                 ixgbe_atr_set_vlan_id_82599(&input_struct, fs.vlan_tag);
2297
2298         if (!input_masks.data_mask)
2299                 /* make sure we only use the first 2 bytes of user data */
2300                 ixgbe_atr_set_flex_byte_82599(&input_struct,
2301                                               (fs.data & 0xffff));
2302
2303         /* determine if we need to drop or route the packet */
2304         if (fs.action == ETHTOOL_RXNTUPLE_ACTION_DROP)
2305                 target_queue = MAX_RX_QUEUES - 1;
2306         else
2307                 target_queue = fs.action;
2308
2309         spin_lock(&adapter->fdir_perfect_lock);
2310         ixgbe_fdir_add_perfect_filter_82599(&adapter->hw, &input_struct,
2311                                             &input_masks, 0, target_queue);
2312         spin_unlock(&adapter->fdir_perfect_lock);
2313
2314         return 0;
2315 }
2316
2317 static const struct ethtool_ops ixgbe_ethtool_ops = {
2318         .get_settings           = ixgbe_get_settings,
2319         .set_settings           = ixgbe_set_settings,
2320         .get_drvinfo            = ixgbe_get_drvinfo,
2321         .get_regs_len           = ixgbe_get_regs_len,
2322         .get_regs               = ixgbe_get_regs,
2323         .get_wol                = ixgbe_get_wol,
2324         .set_wol                = ixgbe_set_wol,
2325         .nway_reset             = ixgbe_nway_reset,
2326         .get_link               = ethtool_op_get_link,
2327         .get_eeprom_len         = ixgbe_get_eeprom_len,
2328         .get_eeprom             = ixgbe_get_eeprom,
2329         .get_ringparam          = ixgbe_get_ringparam,
2330         .set_ringparam          = ixgbe_set_ringparam,
2331         .get_pauseparam         = ixgbe_get_pauseparam,
2332         .set_pauseparam         = ixgbe_set_pauseparam,
2333         .get_rx_csum            = ixgbe_get_rx_csum,
2334         .set_rx_csum            = ixgbe_set_rx_csum,
2335         .get_tx_csum            = ixgbe_get_tx_csum,
2336         .set_tx_csum            = ixgbe_set_tx_csum,
2337         .get_sg                 = ethtool_op_get_sg,
2338         .set_sg                 = ethtool_op_set_sg,
2339         .get_msglevel           = ixgbe_get_msglevel,
2340         .set_msglevel           = ixgbe_set_msglevel,
2341         .get_tso                = ethtool_op_get_tso,
2342         .set_tso                = ixgbe_set_tso,
2343         .self_test              = ixgbe_diag_test,
2344         .get_strings            = ixgbe_get_strings,
2345         .phys_id                = ixgbe_phys_id,
2346         .get_sset_count         = ixgbe_get_sset_count,
2347         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2348         .get_coalesce           = ixgbe_get_coalesce,
2349         .set_coalesce           = ixgbe_set_coalesce,
2350         .get_flags              = ethtool_op_get_flags,
2351         .set_flags              = ixgbe_set_flags,
2352         .set_rx_ntuple          = ixgbe_set_rx_ntuple,
2353 };
2354
2355 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2356 {
2357         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2358 }