drivers/net/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/ipv6.h>
  35 #include <net/checksum.h>
  36 #include <net/ip6_checksum.h>
  37 #include <linux/mii.h>
  38 #include <linux/ethtool.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/pci.h>
  41 #include <linux/pci-aspm.h>
  42 #include <linux/delay.h>
  43 #include <linux/interrupt.h>
  44 #include <linux/if_ether.h>
  45 #ifdef CONFIG_IGB_DCA
  46 #include <linux/dca.h>
  47 #endif
  48 #include "igb.h"
  49
  50 #define DRV_VERSION "1.2.45-k2"
  51 char igb_driver_name[] = "igb";
  52 char igb_driver_version[] = DRV_VERSION;
  53 static const char igb_driver_string[] =
  54                                 "Intel(R) Gigabit Ethernet Network Driver";
  55 static const char igb_copyright[] = "Copyright (c) 2008 Intel Corporation.";
  56
  57 static const struct e1000_info *igb_info_tbl[] = {
  58         [board_82575] = &e1000_82575_info,
  59 };
  60
  61 static struct pci_device_id igb_pci_tbl[] = {
  62         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },
  63         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },
  64         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },
  65         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },
  66         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },
  67         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },
  68         /* required last entry */
  69         {0, }
  70 };
  71
  72 MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
  73
  74 void igb_reset(struct igb_adapter *);
  75 static int igb_setup_all_tx_resources(struct igb_adapter *);
  76 static int igb_setup_all_rx_resources(struct igb_adapter *);
  77 static void igb_free_all_tx_resources(struct igb_adapter *);
  78 static void igb_free_all_rx_resources(struct igb_adapter *);
  79 void igb_update_stats(struct igb_adapter *);
  80 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
  81 static void __devexit igb_remove(struct pci_dev *pdev);
  82 static int igb_sw_init(struct igb_adapter *);
  83 static int igb_open(struct net_device *);
  84 static int igb_close(struct net_device *);
  85 static void igb_configure_tx(struct igb_adapter *);
  86 static void igb_configure_rx(struct igb_adapter *);
  87 static void igb_setup_rctl(struct igb_adapter *);
  88 static void igb_clean_all_tx_rings(struct igb_adapter *);
  89 static void igb_clean_all_rx_rings(struct igb_adapter *);
  90 static void igb_clean_tx_ring(struct igb_ring *);
  91 static void igb_clean_rx_ring(struct igb_ring *);
  92 static void igb_set_multi(struct net_device *);
  93 static void igb_update_phy_info(unsigned long);
  94 static void igb_watchdog(unsigned long);
  95 static void igb_watchdog_task(struct work_struct *);
  96 static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *,
  97                                   struct igb_ring *);
  98 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *);
  99 static struct net_device_stats *igb_get_stats(struct net_device *);
 100 static int igb_change_mtu(struct net_device *, int);
 101 static int igb_set_mac(struct net_device *, void *);
 102 static irqreturn_t igb_intr(int irq, void *);
 103 static irqreturn_t igb_intr_msi(int irq, void *);
 104 static irqreturn_t igb_msix_other(int irq, void *);
 105 static irqreturn_t igb_msix_rx(int irq, void *);
 106 static irqreturn_t igb_msix_tx(int irq, void *);
 107 static int igb_clean_rx_ring_msix(struct napi_struct *, int);
 108 #ifdef CONFIG_IGB_DCA
 109 static void igb_update_rx_dca(struct igb_ring *);
 110 static void igb_update_tx_dca(struct igb_ring *);
 111 static void igb_setup_dca(struct igb_adapter *);
 112 #endif /* CONFIG_IGB_DCA */
 113 static bool igb_clean_tx_irq(struct igb_ring *);
 114 static int igb_poll(struct napi_struct *, int);
 115 static bool igb_clean_rx_irq_adv(struct igb_ring *, int *, int);
 116 static void igb_alloc_rx_buffers_adv(struct igb_ring *, int);
 117 #ifdef CONFIG_IGB_LRO
 118 static int igb_get_skb_hdr(struct sk_buff *skb, void **, void **, u64 *, void *);
 119 #endif
 120 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 121 static void igb_tx_timeout(struct net_device *);
 122 static void igb_reset_task(struct work_struct *);
 123 static void igb_vlan_rx_register(struct net_device *, struct vlan_group *);
 124 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 125 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 126 static void igb_restore_vlan(struct igb_adapter *);
 127
 128 static int igb_suspend(struct pci_dev *, pm_message_t);
 129 #ifdef CONFIG_PM
 130 static int igb_resume(struct pci_dev *);
 131 #endif
 132 static void igb_shutdown(struct pci_dev *);
 133 #ifdef CONFIG_IGB_DCA
 134 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 135 static struct notifier_block dca_notifier = {
 136         .notifier_call  = igb_notify_dca,
 137         .next           = NULL,
 138         .priority       = 0
 139 };
 140 #endif
 141
 142 #ifdef CONFIG_NET_POLL_CONTROLLER
 143 /* for netdump / net console */
 144 static void igb_netpoll(struct net_device *);
 145 #endif
 146
 147 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 148                      pci_channel_state_t);
 149 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 150 static void igb_io_resume(struct pci_dev *);
 151
 152 static struct pci_error_handlers igb_err_handler = {
 153         .error_detected = igb_io_error_detected,
 154         .slot_reset = igb_io_slot_reset,
 155         .resume = igb_io_resume,
 156 };
 157
 158
 159 static struct pci_driver igb_driver = {
 160         .name     = igb_driver_name,
 161         .id_table = igb_pci_tbl,
 162         .probe    = igb_probe,
 163         .remove   = __devexit_p(igb_remove),
 164 #ifdef CONFIG_PM
 165         /* Power Managment Hooks */
 166         .suspend  = igb_suspend,
 167         .resume   = igb_resume,
 168 #endif
 169         .shutdown = igb_shutdown,
 170         .err_handler = &igb_err_handler
 171 };
 172
 173 static int global_quad_port_a; /* global quad port a indication */
 174
 175 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 176 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 177 MODULE_LICENSE("GPL");
 178 MODULE_VERSION(DRV_VERSION);
 179
 180 #ifdef DEBUG
 181 /**
 182  * igb_get_hw_dev_name - return device name string
 183  * used by hardware layer to print debugging information
 184  **/
 185 char *igb_get_hw_dev_name(struct e1000_hw *hw)
 186 {
 187         struct igb_adapter *adapter = hw->back;
 188         return adapter->netdev->name;
 189 }
 190 #endif
 191
 192 /**
 193  * igb_init_module - Driver Registration Routine
 194  *
 195  * igb_init_module is the first routine called when the driver is
 196  * loaded. All it does is register with the PCI subsystem.
 197  **/
 198 static int __init igb_init_module(void)
 199 {
 200         int ret;
 201         printk(KERN_INFO "%s - version %s\n",
 202                igb_driver_string, igb_driver_version);
 203
 204         printk(KERN_INFO "%s\n", igb_copyright);
 205
 206         global_quad_port_a = 0;
 207
 208         ret = pci_register_driver(&igb_driver);
 209 #ifdef CONFIG_IGB_DCA
 210         dca_register_notify(&dca_notifier);
 211 #endif
 212         return ret;
 213 }
 214
 215 module_init(igb_init_module);
 216
 217 /**
 218  * igb_exit_module - Driver Exit Cleanup Routine
 219  *
 220  * igb_exit_module is called just before the driver is removed
 221  * from memory.
 222  **/
 223 static void __exit igb_exit_module(void)
 224 {
 225 #ifdef CONFIG_IGB_DCA
 226         dca_unregister_notify(&dca_notifier);
 227 #endif
 228         pci_unregister_driver(&igb_driver);
 229 }
 230
 231 module_exit(igb_exit_module);
 232
 233 /**
 234  * igb_alloc_queues - Allocate memory for all rings
 235  * @adapter: board private structure to initialize
 236  *
 237  * We allocate one ring per queue at run-time since we don't know the
 238  * number of queues at compile-time.
 239  **/
 240 static int igb_alloc_queues(struct igb_adapter *adapter)
 241 {
 242         int i;
 243
 244         adapter->tx_ring = kcalloc(adapter->num_tx_queues,
 245                                    sizeof(struct igb_ring), GFP_KERNEL);
 246         if (!adapter->tx_ring)
 247                 return -ENOMEM;
 248
 249         adapter->rx_ring = kcalloc(adapter->num_rx_queues,
 250                                    sizeof(struct igb_ring), GFP_KERNEL);
 251         if (!adapter->rx_ring) {
 252                 kfree(adapter->tx_ring);
 253                 return -ENOMEM;
 254         }
 255
 256         adapter->rx_ring->buddy = adapter->tx_ring;
 257
 258         for (i = 0; i < adapter->num_tx_queues; i++) {
 259                 struct igb_ring *ring = &(adapter->tx_ring[i]);
 260                 ring->count = adapter->tx_ring_count;
 261                 ring->adapter = adapter;
 262                 ring->queue_index = i;
 263         }
 264         for (i = 0; i < adapter->num_rx_queues; i++) {
 265                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 266                 ring->count = adapter->rx_ring_count;
 267                 ring->adapter = adapter;
 268                 ring->queue_index = i;
 269                 ring->itr_register = E1000_ITR;
 270
 271                 /* set a default napi handler for each rx_ring */
 272                 netif_napi_add(adapter->netdev, &ring->napi, igb_poll, 64);
 273         }
 274         return 0;
 275 }
 276
 277 static void igb_free_queues(struct igb_adapter *adapter)
 278 {
 279         int i;
 280
 281         for (i = 0; i < adapter->num_rx_queues; i++)
 282                 netif_napi_del(&adapter->rx_ring[i].napi);
 283
 284         kfree(adapter->tx_ring);
 285         kfree(adapter->rx_ring);
 286 }
 287
 288 #define IGB_N0_QUEUE -1
 289 static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue,
 290                               int tx_queue, int msix_vector)
 291 {
 292         u32 msixbm = 0;
 293         struct e1000_hw *hw = &adapter->hw;
 294         u32 ivar, index;
 295
 296         switch (hw->mac.type) {
 297         case e1000_82575:
 298                 /* The 82575 assigns vectors using a bitmask, which matches the
 299                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 300                    or more queues to a vector, we write the appropriate bits
 301                    into the MSIXBM register for that vector. */
 302                 if (rx_queue > IGB_N0_QUEUE) {
 303                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 304                         adapter->rx_ring[rx_queue].eims_value = msixbm;
 305                 }
 306                 if (tx_queue > IGB_N0_QUEUE) {
 307                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 308                         adapter->tx_ring[tx_queue].eims_value =
 309                                   E1000_EICR_TX_QUEUE0 << tx_queue;
 310                 }
 311                 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm);
 312                 break;
 313         case e1000_82576:
 314                 /* The 82576 uses a table-based method for assigning vectors.
 315                    Each queue has a single entry in the table to which we write
 316                    a vector number along with a "valid" bit.  Sadly, the layout
 317                    of the table is somewhat counterintuitive. */
 318                 if (rx_queue > IGB_N0_QUEUE) {
 319                         index = (rx_queue & 0x7);
 320                         ivar = array_rd32(E1000_IVAR0, index);
 321                         if (rx_queue < 8) {
 322                                 /* vector goes into low byte of register */
 323                                 ivar = ivar & 0xFFFFFF00;
 324                                 ivar |= msix_vector | E1000_IVAR_VALID;
 325                         } else {
 326                                 /* vector goes into third byte of register */
 327                                 ivar = ivar & 0xFF00FFFF;
 328                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 16;
 329                         }
 330                         adapter->rx_ring[rx_queue].eims_value= 1 << msix_vector;
 331                         array_wr32(E1000_IVAR0, index, ivar);
 332                 }
 333                 if (tx_queue > IGB_N0_QUEUE) {
 334                         index = (tx_queue & 0x7);
 335                         ivar = array_rd32(E1000_IVAR0, index);
 336                         if (tx_queue < 8) {
 337                                 /* vector goes into second byte of register */
 338                                 ivar = ivar & 0xFFFF00FF;
 339                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 8;
 340                         } else {
 341                                 /* vector goes into high byte of register */
 342                                 ivar = ivar & 0x00FFFFFF;
 343                                 ivar |= (msix_vector | E1000_IVAR_VALID) << 24;
 344                         }
 345                         adapter->tx_ring[tx_queue].eims_value= 1 << msix_vector;
 346                         array_wr32(E1000_IVAR0, index, ivar);
 347                 }
 348                 break;
 349         default:
 350                 BUG();
 351                 break;
 352         }
 353 }
 354
 355 /**
 356  * igb_configure_msix - Configure MSI-X hardware
 357  *
 358  * igb_configure_msix sets up the hardware to properly
 359  * generate MSI-X interrupts.
 360  **/
 361 static void igb_configure_msix(struct igb_adapter *adapter)
 362 {
 363         u32 tmp;
 364         int i, vector = 0;
 365         struct e1000_hw *hw = &adapter->hw;
 366
 367         adapter->eims_enable_mask = 0;
 368         if (hw->mac.type == e1000_82576)
 369                 /* Turn on MSI-X capability first, or our settings
 370                  * won't stick.  And it will take days to debug. */
 371                 wr32(E1000_GPIE, E1000_GPIE_MSIX_MODE |
 372                                    E1000_GPIE_PBA | E1000_GPIE_EIAME |
 373                                    E1000_GPIE_NSICR);
 374
 375         for (i = 0; i < adapter->num_tx_queues; i++) {
 376                 struct igb_ring *tx_ring = &adapter->tx_ring[i];
 377                 igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++);
 378                 adapter->eims_enable_mask |= tx_ring->eims_value;
 379                 if (tx_ring->itr_val)
 380                         writel(tx_ring->itr_val,
 381                                hw->hw_addr + tx_ring->itr_register);
 382                 else
 383                         writel(1, hw->hw_addr + tx_ring->itr_register);
 384         }
 385
 386         for (i = 0; i < adapter->num_rx_queues; i++) {
 387                 struct igb_ring *rx_ring = &adapter->rx_ring[i];
 388                 rx_ring->buddy = NULL;
 389                 igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++);
 390                 adapter->eims_enable_mask |= rx_ring->eims_value;
 391                 if (rx_ring->itr_val)
 392                         writel(rx_ring->itr_val,
 393                                hw->hw_addr + rx_ring->itr_register);
 394                 else
 395                         writel(1, hw->hw_addr + rx_ring->itr_register);
 396         }
 397
 398
 399         /* set vector for other causes, i.e. link changes */
 400         switch (hw->mac.type) {
 401         case e1000_82575:
 402                 array_wr32(E1000_MSIXBM(0), vector++,
 403                                       E1000_EIMS_OTHER);
 404
 405                 tmp = rd32(E1000_CTRL_EXT);
 406                 /* enable MSI-X PBA support*/
 407                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 408
 409                 /* Auto-Mask interrupts upon ICR read. */
 410                 tmp |= E1000_CTRL_EXT_EIAME;
 411                 tmp |= E1000_CTRL_EXT_IRCA;
 412
 413                 wr32(E1000_CTRL_EXT, tmp);
 414                 adapter->eims_enable_mask |= E1000_EIMS_OTHER;
 415                 adapter->eims_other = E1000_EIMS_OTHER;
 416
 417                 break;
 418
 419         case e1000_82576:
 420                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 421                 wr32(E1000_IVAR_MISC, tmp);
 422
 423                 adapter->eims_enable_mask = (1 << (vector)) - 1;
 424                 adapter->eims_other = 1 << (vector - 1);
 425                 break;
 426         default:
 427                 /* do nothing, since nothing else supports MSI-X */
 428                 break;
 429         } /* switch (hw->mac.type) */
 430         wrfl();
 431 }
 432
 433 /**
 434  * igb_request_msix - Initialize MSI-X interrupts
 435  *
 436  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 437  * kernel.
 438  **/
 439 static int igb_request_msix(struct igb_adapter *adapter)
 440 {
 441         struct net_device *netdev = adapter->netdev;
 442         int i, err = 0, vector = 0;
 443
 444         vector = 0;
 445
 446         for (i = 0; i < adapter->num_tx_queues; i++) {
 447                 struct igb_ring *ring = &(adapter->tx_ring[i]);
 448                 sprintf(ring->name, "%s-tx%d", netdev->name, i);
 449                 err = request_irq(adapter->msix_entries[vector].vector,
 450                                   &igb_msix_tx, 0, ring->name,
 451                                   &(adapter->tx_ring[i]));
 452                 if (err)
 453                         goto out;
 454                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 455                 ring->itr_val = 976; /* ~4000 ints/sec */
 456                 vector++;
 457         }
 458         for (i = 0; i < adapter->num_rx_queues; i++) {
 459                 struct igb_ring *ring = &(adapter->rx_ring[i]);
 460                 if (strlen(netdev->name) < (IFNAMSIZ - 5))
 461                         sprintf(ring->name, "%s-rx%d", netdev->name, i);
 462                 else
 463                         memcpy(ring->name, netdev->name, IFNAMSIZ);
 464                 err = request_irq(adapter->msix_entries[vector].vector,
 465                                   &igb_msix_rx, 0, ring->name,
 466                                   &(adapter->rx_ring[i]));
 467                 if (err)
 468                         goto out;
 469                 ring->itr_register = E1000_EITR(0) + (vector << 2);
 470                 ring->itr_val = adapter->itr;
 471                 /* overwrite the poll routine for MSIX, we've already done
 472                  * netif_napi_add */
 473                 ring->napi.poll = &igb_clean_rx_ring_msix;
 474                 vector++;
 475         }
 476
 477         err = request_irq(adapter->msix_entries[vector].vector,
 478                           &igb_msix_other, 0, netdev->name, netdev);
 479         if (err)
 480                 goto out;
 481
 482         igb_configure_msix(adapter);
 483         return 0;
 484 out:
 485         return err;
 486 }
 487
 488 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 489 {
 490         if (adapter->msix_entries) {
 491                 pci_disable_msix(adapter->pdev);
 492                 kfree(adapter->msix_entries);
 493                 adapter->msix_entries = NULL;
 494         } else if (adapter->flags & IGB_FLAG_HAS_MSI)
 495                 pci_disable_msi(adapter->pdev);
 496         return;
 497 }
 498
 499
 500 /**
 501  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 502  *
 503  * Attempt to configure interrupts using the best available
 504  * capabilities of the hardware and kernel.
 505  **/
 506 static void igb_set_interrupt_capability(struct igb_adapter *adapter)
 507 {
 508         int err;
 509         int numvecs, i;
 510
 511         numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1;
 512         adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry),
 513                                         GFP_KERNEL);
 514         if (!adapter->msix_entries)
 515                 goto msi_only;
 516
 517         for (i = 0; i < numvecs; i++)
 518                 adapter->msix_entries[i].entry = i;
 519
 520         err = pci_enable_msix(adapter->pdev,
 521                               adapter->msix_entries,
 522                               numvecs);
 523         if (err == 0)
 524                 goto out;
 525
 526         igb_reset_interrupt_capability(adapter);
 527
 528         /* If we can't do MSI-X, try MSI */
 529 msi_only:
 530         adapter->num_rx_queues = 1;
 531         adapter->num_tx_queues = 1;
 532         if (!pci_enable_msi(adapter->pdev))
 533                 adapter->flags |= IGB_FLAG_HAS_MSI;
 534 out:
 535         /* Notify the stack of the (possibly) reduced Tx Queue count. */
 536         adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;
 537         return;
 538 }
 539
 540 /**
 541  * igb_request_irq - initialize interrupts
 542  *
 543  * Attempts to configure interrupts using the best available
 544  * capabilities of the hardware and kernel.
 545  **/
 546 static int igb_request_irq(struct igb_adapter *adapter)
 547 {
 548         struct net_device *netdev = adapter->netdev;
 549         struct e1000_hw *hw = &adapter->hw;
 550         int err = 0;
 551
 552         if (adapter->msix_entries) {
 553                 err = igb_request_msix(adapter);
 554                 if (!err)
 555                         goto request_done;
 556                 /* fall back to MSI */
 557                 igb_reset_interrupt_capability(adapter);
 558                 if (!pci_enable_msi(adapter->pdev))
 559                         adapter->flags |= IGB_FLAG_HAS_MSI;
 560                 igb_free_all_tx_resources(adapter);
 561                 igb_free_all_rx_resources(adapter);
 562                 adapter->num_rx_queues = 1;
 563                 igb_alloc_queues(adapter);
 564         } else {
 565                 switch (hw->mac.type) {
 566                 case e1000_82575:
 567                         wr32(E1000_MSIXBM(0),
 568                              (E1000_EICR_RX_QUEUE0 | E1000_EIMS_OTHER));
 569                         break;
 570                 case e1000_82576:
 571                         wr32(E1000_IVAR0, E1000_IVAR_VALID);
 572                         break;
 573                 default:
 574                         break;
 575                 }
 576         }
 577
 578         if (adapter->flags & IGB_FLAG_HAS_MSI) {
 579                 err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0,
 580                                   netdev->name, netdev);
 581                 if (!err)
 582                         goto request_done;
 583                 /* fall back to legacy interrupts */
 584                 igb_reset_interrupt_capability(adapter);
 585                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
 586         }
 587
 588         err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED,
 589                           netdev->name, netdev);
 590
 591         if (err)
 592                 dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n",
 593                         err);
 594
 595 request_done:
 596         return err;
 597 }
 598
 599 static void igb_free_irq(struct igb_adapter *adapter)
 600 {
 601         struct net_device *netdev = adapter->netdev;
 602
 603         if (adapter->msix_entries) {
 604                 int vector = 0, i;
 605
 606                 for (i = 0; i < adapter->num_tx_queues; i++)
 607                         free_irq(adapter->msix_entries[vector++].vector,
 608                                 &(adapter->tx_ring[i]));
 609                 for (i = 0; i < adapter->num_rx_queues; i++)
 610                         free_irq(adapter->msix_entries[vector++].vector,
 611                                 &(adapter->rx_ring[i]));
 612
 613                 free_irq(adapter->msix_entries[vector++].vector, netdev);
 614                 return;
 615         }
 616
 617         free_irq(adapter->pdev->irq, netdev);
 618 }
 619
 620 /**
 621  * igb_irq_disable - Mask off interrupt generation on the NIC
 622  * @adapter: board private structure
 623  **/
 624 static void igb_irq_disable(struct igb_adapter *adapter)
 625 {
 626         struct e1000_hw *hw = &adapter->hw;
 627
 628         if (adapter->msix_entries) {
 629                 wr32(E1000_EIAM, 0);
 630                 wr32(E1000_EIMC, ~0);
 631                 wr32(E1000_EIAC, 0);
 632         }
 633
 634         wr32(E1000_IAM, 0);
 635         wr32(E1000_IMC, ~0);
 636         wrfl();
 637         synchronize_irq(adapter->pdev->irq);
 638 }
 639
 640 /**
 641  * igb_irq_enable - Enable default interrupt generation settings
 642  * @adapter: board private structure
 643  **/
 644 static void igb_irq_enable(struct igb_adapter *adapter)
 645 {
 646         struct e1000_hw *hw = &adapter->hw;
 647
 648         if (adapter->msix_entries) {
 649                 wr32(E1000_EIAC, adapter->eims_enable_mask);
 650                 wr32(E1000_EIAM, adapter->eims_enable_mask);
 651                 wr32(E1000_EIMS, adapter->eims_enable_mask);
 652                 wr32(E1000_IMS, E1000_IMS_LSC);
 653         } else {
 654                 wr32(E1000_IMS, IMS_ENABLE_MASK);
 655                 wr32(E1000_IAM, IMS_ENABLE_MASK);
 656         }
 657 }
 658
 659 static void igb_update_mng_vlan(struct igb_adapter *adapter)
 660 {
 661         struct net_device *netdev = adapter->netdev;
 662         u16 vid = adapter->hw.mng_cookie.vlan_id;
 663         u16 old_vid = adapter->mng_vlan_id;
 664         if (adapter->vlgrp) {
 665                 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
 666                         if (adapter->hw.mng_cookie.status &
 667                                 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
 668                                 igb_vlan_rx_add_vid(netdev, vid);
 669                                 adapter->mng_vlan_id = vid;
 670                         } else
 671                                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
 672
 673                         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
 674                                         (vid != old_vid) &&
 675                             !vlan_group_get_device(adapter->vlgrp, old_vid))
 676                                 igb_vlan_rx_kill_vid(netdev, old_vid);
 677                 } else
 678                         adapter->mng_vlan_id = vid;
 679         }
 680 }
 681
 682 /**
 683  * igb_release_hw_control - release control of the h/w to f/w
 684  * @adapter: address of board private structure
 685  *
 686  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
 687  * For ASF and Pass Through versions of f/w this means that the
 688  * driver is no longer loaded.
 689  *
 690  **/
 691 static void igb_release_hw_control(struct igb_adapter *adapter)
 692 {
 693         struct e1000_hw *hw = &adapter->hw;
 694         u32 ctrl_ext;
 695
 696         /* Let firmware take over control of h/w */
 697         ctrl_ext = rd32(E1000_CTRL_EXT);
 698         wr32(E1000_CTRL_EXT,
 699                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
 700 }
 701
 702
 703 /**
 704  * igb_get_hw_control - get control of the h/w from f/w
 705  * @adapter: address of board private structure
 706  *
 707  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
 708  * For ASF and Pass Through versions of f/w this means that
 709  * the driver is loaded.
 710  *
 711  **/
 712 static void igb_get_hw_control(struct igb_adapter *adapter)
 713 {
 714         struct e1000_hw *hw = &adapter->hw;
 715         u32 ctrl_ext;
 716
 717         /* Let firmware know the driver has taken over */
 718         ctrl_ext = rd32(E1000_CTRL_EXT);
 719         wr32(E1000_CTRL_EXT,
 720                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
 721 }
 722
 723 /**
 724  * igb_configure - configure the hardware for RX and TX
 725  * @adapter: private board structure
 726  **/
 727 static void igb_configure(struct igb_adapter *adapter)
 728 {
 729         struct net_device *netdev = adapter->netdev;
 730         int i;
 731
 732         igb_get_hw_control(adapter);
 733         igb_set_multi(netdev);
 734
 735         igb_restore_vlan(adapter);
 736
 737         igb_configure_tx(adapter);
 738         igb_setup_rctl(adapter);
 739         igb_configure_rx(adapter);
 740
 741         igb_rx_fifo_flush_82575(&adapter->hw);
 742
 743         /* call IGB_DESC_UNUSED which always leaves
 744          * at least 1 descriptor unused to make sure
 745          * next_to_use != next_to_clean */
 746         for (i = 0; i < adapter->num_rx_queues; i++) {
 747                 struct igb_ring *ring = &adapter->rx_ring[i];
 748                 igb_alloc_rx_buffers_adv(ring, IGB_DESC_UNUSED(ring));
 749         }
 750
 751
 752         adapter->tx_queue_len = netdev->tx_queue_len;
 753 }
 754
 755
 756 /**
 757  * igb_up - Open the interface and prepare it to handle traffic
 758  * @adapter: board private structure
 759  **/
 760
 761 int igb_up(struct igb_adapter *adapter)
 762 {
 763         struct e1000_hw *hw = &adapter->hw;
 764         int i;
 765
 766         /* hardware has been reset, we need to reload some things */
 767         igb_configure(adapter);
 768
 769         clear_bit(__IGB_DOWN, &adapter->state);
 770
 771         for (i = 0; i < adapter->num_rx_queues; i++)
 772                 napi_enable(&adapter->rx_ring[i].napi);
 773         if (adapter->msix_entries)
 774                 igb_configure_msix(adapter);
 775
 776         /* Clear any pending interrupts. */
 777         rd32(E1000_ICR);
 778         igb_irq_enable(adapter);
 779
 780         /* Fire a link change interrupt to start the watchdog. */
 781         wr32(E1000_ICS, E1000_ICS_LSC);
 782         return 0;
 783 }
 784
 785 void igb_down(struct igb_adapter *adapter)
 786 {
 787         struct e1000_hw *hw = &adapter->hw;
 788         struct net_device *netdev = adapter->netdev;
 789         u32 tctl, rctl;
 790         int i;
 791
 792         /* signal that we're down so the interrupt handler does not
 793          * reschedule our watchdog timer */
 794         set_bit(__IGB_DOWN, &adapter->state);
 795
 796         /* disable receives in the hardware */
 797         rctl = rd32(E1000_RCTL);
 798         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
 799         /* flush and sleep below */
 800
 801         netif_tx_stop_all_queues(netdev);
 802
 803         /* disable transmits in the hardware */
 804         tctl = rd32(E1000_TCTL);
 805         tctl &= ~E1000_TCTL_EN;
 806         wr32(E1000_TCTL, tctl);
 807         /* flush both disables and wait for them to finish */
 808         wrfl();
 809         msleep(10);
 810
 811         for (i = 0; i < adapter->num_rx_queues; i++)
 812                 napi_disable(&adapter->rx_ring[i].napi);
 813
 814         igb_irq_disable(adapter);
 815
 816         del_timer_sync(&adapter->watchdog_timer);
 817         del_timer_sync(&adapter->phy_info_timer);
 818
 819         netdev->tx_queue_len = adapter->tx_queue_len;
 820         netif_carrier_off(netdev);
 821         adapter->link_speed = 0;
 822         adapter->link_duplex = 0;
 823
 824         if (!pci_channel_offline(adapter->pdev))
 825                 igb_reset(adapter);
 826         igb_clean_all_tx_rings(adapter);
 827         igb_clean_all_rx_rings(adapter);
 828 }
 829
 830 void igb_reinit_locked(struct igb_adapter *adapter)
 831 {
 832         WARN_ON(in_interrupt());
 833         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
 834                 msleep(1);
 835         igb_down(adapter);
 836         igb_up(adapter);
 837         clear_bit(__IGB_RESETTING, &adapter->state);
 838 }
 839
 840 void igb_reset(struct igb_adapter *adapter)
 841 {
 842         struct e1000_hw *hw = &adapter->hw;
 843         struct e1000_mac_info *mac = &hw->mac;
 844         struct e1000_fc_info *fc = &hw->fc;
 845         u32 pba = 0, tx_space, min_tx_space, min_rx_space;
 846         u16 hwm;
 847
 848         /* Repartition Pba for greater than 9k mtu
 849          * To take effect CTRL.RST is required.
 850          */
 851         if (mac->type != e1000_82576) {
 852         pba = E1000_PBA_34K;
 853         }
 854         else {
 855                 pba = E1000_PBA_64K;
 856         }
 857
 858         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
 859             (mac->type < e1000_82576)) {
 860                 /* adjust PBA for jumbo frames */
 861                 wr32(E1000_PBA, pba);
 862
 863                 /* To maintain wire speed transmits, the Tx FIFO should be
 864                  * large enough to accommodate two full transmit packets,
 865                  * rounded up to the next 1KB and expressed in KB.  Likewise,
 866                  * the Rx FIFO should be large enough to accommodate at least
 867                  * one full receive packet and is similarly rounded up and
 868                  * expressed in KB. */
 869                 pba = rd32(E1000_PBA);
 870                 /* upper 16 bits has Tx packet buffer allocation size in KB */
 871                 tx_space = pba >> 16;
 872                 /* lower 16 bits has Rx packet buffer allocation size in KB */
 873                 pba &= 0xffff;
 874                 /* the tx fifo also stores 16 bytes of information about the tx
 875                  * but don't include ethernet FCS because hardware appends it */
 876                 min_tx_space = (adapter->max_frame_size +
 877                                 sizeof(struct e1000_tx_desc) -
 878                                 ETH_FCS_LEN) * 2;
 879                 min_tx_space = ALIGN(min_tx_space, 1024);
 880                 min_tx_space >>= 10;
 881                 /* software strips receive CRC, so leave room for it */
 882                 min_rx_space = adapter->max_frame_size;
 883                 min_rx_space = ALIGN(min_rx_space, 1024);
 884                 min_rx_space >>= 10;
 885
 886                 /* If current Tx allocation is less than the min Tx FIFO size,
 887                  * and the min Tx FIFO size is less than the current Rx FIFO
 888                  * allocation, take space away from current Rx allocation */
 889                 if (tx_space < min_tx_space &&
 890                     ((min_tx_space - tx_space) < pba)) {
 891                         pba = pba - (min_tx_space - tx_space);
 892
 893                         /* if short on rx space, rx wins and must trump tx
 894                          * adjustment */
 895                         if (pba < min_rx_space)
 896                                 pba = min_rx_space;
 897                 }
 898                 wr32(E1000_PBA, pba);
 899         }
 900
 901         /* flow control settings */
 902         /* The high water mark must be low enough to fit one full frame
 903          * (or the size used for early receive) above it in the Rx FIFO.
 904          * Set it to the lower of:
 905          * - 90% of the Rx FIFO size, or
 906          * - the full Rx FIFO size minus one full frame */
 907         hwm = min(((pba << 10) * 9 / 10),
 908                         ((pba << 10) - 2 * adapter->max_frame_size));
 909
 910         if (mac->type < e1000_82576) {
 911                 fc->high_water = hwm & 0xFFF8;  /* 8-byte granularity */
 912                 fc->low_water = fc->high_water - 8;
 913         } else {
 914                 fc->high_water = hwm & 0xFFF0;  /* 16-byte granularity */
 915                 fc->low_water = fc->high_water - 16;
 916         }
 917         fc->pause_time = 0xFFFF;
 918         fc->send_xon = 1;
 919         fc->type = fc->original_type;
 920
 921         /* Allow time for pending master requests to run */
 922         adapter->hw.mac.ops.reset_hw(&adapter->hw);
 923         wr32(E1000_WUC, 0);
 924
 925         if (adapter->hw.mac.ops.init_hw(&adapter->hw))
 926                 dev_err(&adapter->pdev->dev, "Hardware Error\n");
 927
 928         igb_update_mng_vlan(adapter);
 929
 930         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
 931         wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
 932
 933         igb_reset_adaptive(&adapter->hw);
 934         if (adapter->hw.phy.ops.get_phy_info)
 935                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
 936 }
 937
 938 /**
 939  * igb_is_need_ioport - determine if an adapter needs ioport resources or not
 940  * @pdev: PCI device information struct
 941  *
 942  * Returns true if an adapter needs ioport resources
 943  **/
 944 static int igb_is_need_ioport(struct pci_dev *pdev)
 945 {
 946         switch (pdev->device) {
 947         /* Currently there are no adapters that need ioport resources */
 948         default:
 949                 return false;
 950         }
 951 }
 952
 953 static const struct net_device_ops igb_netdev_ops = {
 954         .ndo_open               = igb_open,
 955         .ndo_stop               = igb_close,
 956         .ndo_start_xmit         = igb_xmit_frame_adv,
 957         .ndo_get_stats          = igb_get_stats,
 958         .ndo_set_multicast_list = igb_set_multi,
 959         .ndo_set_mac_address    = igb_set_mac,
 960         .ndo_change_mtu         = igb_change_mtu,
 961         .ndo_do_ioctl           = igb_ioctl,
 962         .ndo_tx_timeout         = igb_tx_timeout,
 963         .ndo_validate_addr      = eth_validate_addr,
 964         .ndo_vlan_rx_register   = igb_vlan_rx_register,
 965         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
 966         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
 967 #ifdef CONFIG_NET_POLL_CONTROLLER
 968         .ndo_poll_controller    = igb_netpoll,
 969 #endif
 970 };
 971
 972 /**
 973  * igb_probe - Device Initialization Routine
 974  * @pdev: PCI device information struct
 975  * @ent: entry in igb_pci_tbl
 976  *
 977  * Returns 0 on success, negative on failure
 978  *
 979  * igb_probe initializes an adapter identified by a pci_dev structure.
 980  * The OS initialization, configuring of the adapter private structure,
 981  * and a hardware reset occur.
 982  **/
 983 static int __devinit igb_probe(struct pci_dev *pdev,
 984                                const struct pci_device_id *ent)
 985 {
 986         struct net_device *netdev;
 987         struct igb_adapter *adapter;
 988         struct e1000_hw *hw;
 989         struct pci_dev *us_dev;
 990         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
 991         unsigned long mmio_start, mmio_len;
 992         int i, err, pci_using_dac, pos;
 993         u16 eeprom_data = 0, state = 0;
 994         u16 eeprom_apme_mask = IGB_EEPROM_APME;
 995         u32 part_num;
 996         int bars, need_ioport;
 997
 998         /* do not allocate ioport bars when not needed */
 999         need_ioport = igb_is_need_ioport(pdev);
1000         if (need_ioport) {
1001                 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
1002                 err = pci_enable_device(pdev);
1003         } else {
1004                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
1005                 err = pci_enable_device_mem(pdev);
1006         }
1007         if (err)
1008                 return err;
1009
1010         pci_using_dac = 0;
1011         err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
1012         if (!err) {
1013                 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
1014                 if (!err)
1015                         pci_using_dac = 1;
1016         } else {
1017                 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1018                 if (err) {
1019                         err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1020                         if (err) {
1021                                 dev_err(&pdev->dev, "No usable DMA "
1022                                         "configuration, aborting\n");
1023                                 goto err_dma;
1024                         }
1025                 }
1026         }
1027
1028         /* 82575 requires that the pci-e link partner disable the L0s state */
1029         switch (pdev->device) {
1030         case E1000_DEV_ID_82575EB_COPPER:
1031         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1032         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1033                 us_dev = pdev->bus->self;
1034                 pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
1035                 if (pos) {
1036                         pci_read_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1037                                              &state);
1038                         state &= ~PCIE_LINK_STATE_L0S;
1039                         pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
1040                                               state);
1041                         dev_info(&pdev->dev,
1042                                  "Disabling ASPM L0s upstream switch port %s\n",
1043                                  pci_name(us_dev));
1044                 }
1045         default:
1046                 break;
1047         }
1048
1049         err = pci_request_selected_regions(pdev, bars, igb_driver_name);
1050         if (err)
1051                 goto err_pci_reg;
1052
1053         pci_set_master(pdev);
1054         pci_save_state(pdev);
1055
1056         err = -ENOMEM;
1057         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter), IGB_MAX_TX_QUEUES);
1058         if (!netdev)
1059                 goto err_alloc_etherdev;
1060
1061         SET_NETDEV_DEV(netdev, &pdev->dev);
1062
1063         pci_set_drvdata(pdev, netdev);
1064         adapter = netdev_priv(netdev);
1065         adapter->netdev = netdev;
1066         adapter->pdev = pdev;
1067         hw = &adapter->hw;
1068         hw->back = adapter;
1069         adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE;
1070         adapter->bars = bars;
1071         adapter->need_ioport = need_ioport;
1072
1073         mmio_start = pci_resource_start(pdev, 0);
1074         mmio_len = pci_resource_len(pdev, 0);
1075
1076         err = -EIO;
1077         adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1078         if (!adapter->hw.hw_addr)
1079                 goto err_ioremap;
1080
1081         netdev->netdev_ops = &igb_netdev_ops;
1082         igb_set_ethtool_ops(netdev);
1083         netdev->watchdog_timeo = 5 * HZ;
1084
1085         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1086
1087         netdev->mem_start = mmio_start;
1088         netdev->mem_end = mmio_start + mmio_len;
1089
1090         /* PCI config space info */
1091         hw->vendor_id = pdev->vendor;
1092         hw->device_id = pdev->device;
1093         hw->revision_id = pdev->revision;
1094         hw->subsystem_vendor_id = pdev->subsystem_vendor;
1095         hw->subsystem_device_id = pdev->subsystem_device;
1096
1097         /* setup the private structure */
1098         hw->back = adapter;
1099         /* Copy the default MAC, PHY and NVM function pointers */
1100         memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
1101         memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
1102         memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
1103         /* Initialize skew-specific constants */
1104         err = ei->get_invariants(hw);
1105         if (err)
1106                 goto err_hw_init;
1107
1108         err = igb_sw_init(adapter);
1109         if (err)
1110                 goto err_sw_init;
1111
1112         igb_get_bus_info_pcie(hw);
1113
1114         /* set flags */
1115         switch (hw->mac.type) {
1116         case e1000_82576:
1117         case e1000_82575:
1118                 adapter->flags |= IGB_FLAG_HAS_DCA;
1119                 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
1120                 break;
1121         default:
1122                 break;
1123         }
1124
1125         hw->phy.autoneg_wait_to_complete = false;
1126         hw->mac.adaptive_ifs = true;
1127
1128         /* Copper options */
1129         if (hw->phy.media_type == e1000_media_type_copper) {
1130                 hw->phy.mdix = AUTO_ALL_MODES;
1131                 hw->phy.disable_polarity_correction = false;
1132                 hw->phy.ms_type = e1000_ms_hw_default;
1133         }
1134
1135         if (igb_check_reset_block(hw))
1136                 dev_info(&pdev->dev,
1137                         "PHY reset is blocked due to SOL/IDER session.\n");
1138
1139         netdev->features = NETIF_F_SG |
1140                            NETIF_F_HW_CSUM |
1141                            NETIF_F_HW_VLAN_TX |
1142                            NETIF_F_HW_VLAN_RX |
1143                            NETIF_F_HW_VLAN_FILTER;
1144
1145         netdev->features |= NETIF_F_TSO;
1146         netdev->features |= NETIF_F_TSO6;
1147
1148 #ifdef CONFIG_IGB_LRO
1149         netdev->features |= NETIF_F_LRO;
1150 #endif
1151
1152         netdev->vlan_features |= NETIF_F_TSO;
1153         netdev->vlan_features |= NETIF_F_TSO6;
1154         netdev->vlan_features |= NETIF_F_HW_CSUM;
1155         netdev->vlan_features |= NETIF_F_SG;
1156
1157         if (pci_using_dac)
1158                 netdev->features |= NETIF_F_HIGHDMA;
1159
1160         netdev->features |= NETIF_F_LLTX;
1161         adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw);
1162
1163         /* before reading the NVM, reset the controller to put the device in a
1164          * known good starting state */
1165         hw->mac.ops.reset_hw(hw);
1166
1167         /* make sure the NVM is good */
1168         if (igb_validate_nvm_checksum(hw) < 0) {
1169                 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
1170                 err = -EIO;
1171                 goto err_eeprom;
1172         }
1173
1174         /* copy the MAC address out of the NVM */
1175         if (hw->mac.ops.read_mac_addr(hw))
1176                 dev_err(&pdev->dev, "NVM Read Error\n");
1177
1178         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
1179         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
1180
1181         if (!is_valid_ether_addr(netdev->perm_addr)) {
1182                 dev_err(&pdev->dev, "Invalid MAC Address\n");
1183                 err = -EIO;
1184                 goto err_eeprom;
1185         }
1186
1187         init_timer(&adapter->watchdog_timer);
1188         adapter->watchdog_timer.function = &igb_watchdog;
1189         adapter->watchdog_timer.data = (unsigned long) adapter;
1190
1191         init_timer(&adapter->phy_info_timer);
1192         adapter->phy_info_timer.function = &igb_update_phy_info;
1193         adapter->phy_info_timer.data = (unsigned long) adapter;
1194
1195         INIT_WORK(&adapter->reset_task, igb_reset_task);
1196         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
1197
1198         /* Initialize link & ring properties that are user-changeable */
1199         adapter->tx_ring->count = 256;
1200         for (i = 0; i < adapter->num_tx_queues; i++)
1201                 adapter->tx_ring[i].count = adapter->tx_ring->count;
1202         adapter->rx_ring->count = 256;
1203         for (i = 0; i < adapter->num_rx_queues; i++)
1204                 adapter->rx_ring[i].count = adapter->rx_ring->count;
1205
1206         adapter->fc_autoneg = true;
1207         hw->mac.autoneg = true;
1208         hw->phy.autoneg_advertised = 0x2f;
1209
1210         hw->fc.original_type = e1000_fc_default;
1211         hw->fc.type = e1000_fc_default;
1212
1213         adapter->itr_setting = 3;
1214         adapter->itr = IGB_START_ITR;
1215
1216         igb_validate_mdi_setting(hw);
1217
1218         adapter->rx_csum = 1;
1219
1220         /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM,
1221          * enable the ACPI Magic Packet filter
1222          */
1223
1224         if (hw->bus.func == 0 ||
1225             hw->device_id == E1000_DEV_ID_82575EB_COPPER)
1226                 hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
1227                                      &eeprom_data);
1228
1229         if (eeprom_data & eeprom_apme_mask)
1230                 adapter->eeprom_wol |= E1000_WUFC_MAG;
1231
1232         /* now that we have the eeprom settings, apply the special cases where
1233          * the eeprom may be wrong or the board simply won't support wake on
1234          * lan on a particular port */
1235         switch (pdev->device) {
1236         case E1000_DEV_ID_82575GB_QUAD_COPPER:
1237                 adapter->eeprom_wol = 0;
1238                 break;
1239         case E1000_DEV_ID_82575EB_FIBER_SERDES:
1240         case E1000_DEV_ID_82576_FIBER:
1241         case E1000_DEV_ID_82576_SERDES:
1242                 /* Wake events only supported on port A for dual fiber
1243                  * regardless of eeprom setting */
1244                 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)
1245                         adapter->eeprom_wol = 0;
1246                 break;
1247         }
1248
1249         /* initialize the wol settings based on the eeprom settings */
1250         adapter->wol = adapter->eeprom_wol;
1251         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1252
1253         /* reset the hardware with the new settings */
1254         igb_reset(adapter);
1255
1256         /* let the f/w know that the h/w is now under the control of the
1257          * driver. */
1258         igb_get_hw_control(adapter);
1259
1260         /* tell the stack to leave us alone until igb_open() is called */
1261         netif_carrier_off(netdev);
1262         netif_tx_stop_all_queues(netdev);
1263
1264         strcpy(netdev->name, "eth%d");
1265         err = register_netdev(netdev);
1266         if (err)
1267                 goto err_register;
1268
1269 #ifdef CONFIG_IGB_DCA
1270         if ((adapter->flags & IGB_FLAG_HAS_DCA) &&
1271             (dca_add_requester(&pdev->dev) == 0)) {
1272                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
1273                 dev_info(&pdev->dev, "DCA enabled\n");
1274                 /* Always use CB2 mode, difference is masked
1275                  * in the CB driver. */
1276                 wr32(E1000_DCA_CTRL, 2);
1277                 igb_setup_dca(adapter);
1278         }
1279 #endif
1280
1281         dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n");
1282         /* print bus type/speed/width info */
1283         dev_info(&pdev->dev, "%s: (PCIe:%s:%s) %pM\n",
1284                  netdev->name,
1285                  ((hw->bus.speed == e1000_bus_speed_2500)
1286                   ? "2.5Gb/s" : "unknown"),
1287                  ((hw->bus.width == e1000_bus_width_pcie_x4)
1288                   ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1)
1289                   ? "Width x1" : "unknown"),
1290                  netdev->dev_addr);
1291
1292         igb_read_part_num(hw, &part_num);
1293         dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name,
1294                 (part_num >> 8), (part_num & 0xff));
1295
1296         dev_info(&pdev->dev,
1297                 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
1298                 adapter->msix_entries ? "MSI-X" :
1299                 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
1300                 adapter->num_rx_queues, adapter->num_tx_queues);
1301
1302         return 0;
1303
1304 err_register:
1305         igb_release_hw_control(adapter);
1306 err_eeprom:
1307         if (!igb_check_reset_block(hw))
1308                 hw->phy.ops.reset_phy(hw);
1309
1310         if (hw->flash_address)
1311                 iounmap(hw->flash_address);
1312
1313         igb_remove_device(hw);
1314         igb_free_queues(adapter);
1315 err_sw_init:
1316 err_hw_init:
1317         iounmap(hw->hw_addr);
1318 err_ioremap:
1319         free_netdev(netdev);
1320 err_alloc_etherdev:
1321         pci_release_selected_regions(pdev, bars);
1322 err_pci_reg:
1323 err_dma:
1324         pci_disable_device(pdev);
1325         return err;
1326 }
1327
1328 /**
1329  * igb_remove - Device Removal Routine
1330  * @pdev: PCI device information struct
1331  *
1332  * igb_remove is called by the PCI subsystem to alert the driver
1333  * that it should release a PCI device.  The could be caused by a
1334  * Hot-Plug event, or because the driver is going to be removed from
1335  * memory.
1336  **/
1337 static void __devexit igb_remove(struct pci_dev *pdev)
1338 {
1339         struct net_device *netdev = pci_get_drvdata(pdev);
1340         struct igb_adapter *adapter = netdev_priv(netdev);
1341 #ifdef CONFIG_IGB_DCA
1342         struct e1000_hw *hw = &adapter->hw;
1343 #endif
1344
1345         /* flush_scheduled work may reschedule our watchdog task, so
1346          * explicitly disable watchdog tasks from being rescheduled  */
1347         set_bit(__IGB_DOWN, &adapter->state);
1348         del_timer_sync(&adapter->watchdog_timer);
1349         del_timer_sync(&adapter->phy_info_timer);
1350
1351         flush_scheduled_work();
1352
1353 #ifdef CONFIG_IGB_DCA
1354         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
1355                 dev_info(&pdev->dev, "DCA disabled\n");
1356                 dca_remove_requester(&pdev->dev);
1357                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
1358                 wr32(E1000_DCA_CTRL, 1);
1359         }
1360 #endif
1361
1362         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
1363          * would have already happened in close and is redundant. */
1364         igb_release_hw_control(adapter);
1365
1366         unregister_netdev(netdev);
1367
1368         if (adapter->hw.phy.ops.reset_phy &&
1369             !igb_check_reset_block(&adapter->hw))
1370                 adapter->hw.phy.ops.reset_phy(&adapter->hw);
1371
1372         igb_remove_device(&adapter->hw);
1373         igb_reset_interrupt_capability(adapter);
1374
1375         igb_free_queues(adapter);
1376
1377         iounmap(adapter->hw.hw_addr);
1378         if (adapter->hw.flash_address)
1379                 iounmap(adapter->hw.flash_address);
1380         pci_release_selected_regions(pdev, adapter->bars);
1381
1382         free_netdev(netdev);
1383
1384         pci_disable_device(pdev);
1385 }
1386
1387 /**
1388  * igb_sw_init - Initialize general software structures (struct igb_adapter)
1389  * @adapter: board private structure to initialize
1390  *
1391  * igb_sw_init initializes the Adapter private data structure.
1392  * Fields are initialized based on PCI device information and
1393  * OS network device settings (MTU size).
1394  **/
1395 static int __devinit igb_sw_init(struct igb_adapter *adapter)
1396 {
1397         struct e1000_hw *hw = &adapter->hw;
1398         struct net_device *netdev = adapter->netdev;
1399         struct pci_dev *pdev = adapter->pdev;
1400
1401         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
1402
1403         adapter->tx_ring_count = IGB_DEFAULT_TXD;
1404         adapter->rx_ring_count = IGB_DEFAULT_RXD;
1405         adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1406         adapter->rx_ps_hdr_size = 0; /* disable packet split */
1407         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1408         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
1409
1410         /* Number of supported queues. */
1411         /* Having more queues than CPUs doesn't make sense. */
1412         adapter->num_rx_queues = min((u32)IGB_MAX_RX_QUEUES, (u32)num_online_cpus());
1413         adapter->num_tx_queues = min(IGB_MAX_TX_QUEUES, num_online_cpus());
1414
1415         /* This call may decrease the number of queues depending on
1416          * interrupt mode. */
1417         igb_set_interrupt_capability(adapter);
1418
1419         if (igb_alloc_queues(adapter)) {
1420                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1421                 return -ENOMEM;
1422         }
1423
1424         /* Explicitly disable IRQ since the NIC can be in any state. */
1425         igb_irq_disable(adapter);
1426
1427         set_bit(__IGB_DOWN, &adapter->state);
1428         return 0;
1429 }
1430
1431 /**
1432  * igb_open - Called when a network interface is made active
1433  * @netdev: network interface device structure
1434  *
1435  * Returns 0 on success, negative value on failure
1436  *
1437  * The open entry point is called when a network interface is made
1438  * active by the system (IFF_UP).  At this point all resources needed
1439  * for transmit and receive operations are allocated, the interrupt
1440  * handler is registered with the OS, the watchdog timer is started,
1441  * and the stack is notified that the interface is ready.
1442  **/
1443 static int igb_open(struct net_device *netdev)
1444 {
1445         struct igb_adapter *adapter = netdev_priv(netdev);
1446         struct e1000_hw *hw = &adapter->hw;
1447         int err;
1448         int i;
1449
1450         /* disallow open during test */
1451         if (test_bit(__IGB_TESTING, &adapter->state))
1452                 return -EBUSY;
1453
1454         /* allocate transmit descriptors */
1455         err = igb_setup_all_tx_resources(adapter);
1456         if (err)
1457                 goto err_setup_tx;
1458
1459         /* allocate receive descriptors */
1460         err = igb_setup_all_rx_resources(adapter);
1461         if (err)
1462                 goto err_setup_rx;
1463
1464         /* e1000_power_up_phy(adapter); */
1465
1466         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1467         if ((adapter->hw.mng_cookie.status &
1468              E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
1469                 igb_update_mng_vlan(adapter);
1470
1471         /* before we allocate an interrupt, we must be ready to handle it.
1472          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1473          * as soon as we call pci_request_irq, so we have to setup our
1474          * clean_rx handler before we do so.  */
1475         igb_configure(adapter);
1476
1477         err = igb_request_irq(adapter);
1478         if (err)
1479                 goto err_req_irq;
1480
1481         /* From here on the code is the same as igb_up() */
1482         clear_bit(__IGB_DOWN, &adapter->state);
1483
1484         for (i = 0; i < adapter->num_rx_queues; i++)
1485                 napi_enable(&adapter->rx_ring[i].napi);
1486
1487         /* Clear any pending interrupts. */
1488         rd32(E1000_ICR);
1489
1490         igb_irq_enable(adapter);
1491
1492         netif_tx_start_all_queues(netdev);
1493
1494         /* Fire a link status change interrupt to start the watchdog. */
1495         wr32(E1000_ICS, E1000_ICS_LSC);
1496
1497         return 0;
1498
1499 err_req_irq:
1500         igb_release_hw_control(adapter);
1501         /* e1000_power_down_phy(adapter); */
1502         igb_free_all_rx_resources(adapter);
1503 err_setup_rx:
1504         igb_free_all_tx_resources(adapter);
1505 err_setup_tx:
1506         igb_reset(adapter);
1507
1508         return err;
1509 }
1510
1511 /**
1512  * igb_close - Disables a network interface
1513  * @netdev: network interface device structure
1514  *
1515  * Returns 0, this is not allowed to fail
1516  *
1517  * The close entry point is called when an interface is de-activated
1518  * by the OS.  The hardware is still under the driver's control, but
1519  * needs to be disabled.  A global MAC reset is issued to stop the
1520  * hardware, and all transmit and receive resources are freed.
1521  **/
1522 static int igb_close(struct net_device *netdev)
1523 {
1524         struct igb_adapter *adapter = netdev_priv(netdev);
1525
1526         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
1527         igb_down(adapter);
1528
1529         igb_free_irq(adapter);
1530
1531         igb_free_all_tx_resources(adapter);
1532         igb_free_all_rx_resources(adapter);
1533
1534         /* kill manageability vlan ID if supported, but not if a vlan with
1535          * the same ID is registered on the host OS (let 8021q kill it) */
1536         if ((adapter->hw.mng_cookie.status &
1537                           E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1538              !(adapter->vlgrp &&
1539                vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
1540                 igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1541
1542         return 0;
1543 }
1544
1545 /**
1546  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
1547  * @adapter: board private structure
1548  * @tx_ring: tx descriptor ring (for a specific queue) to setup
1549  *
1550  * Return 0 on success, negative on failure
1551  **/
1552
1553 int igb_setup_tx_resources(struct igb_adapter *adapter,
1554                            struct igb_ring *tx_ring)
1555 {
1556         struct pci_dev *pdev = adapter->pdev;
1557         int size;
1558
1559         size = sizeof(struct igb_buffer) * tx_ring->count;
1560         tx_ring->buffer_info = vmalloc(size);
1561         if (!tx_ring->buffer_info)
1562                 goto err;
1563         memset(tx_ring->buffer_info, 0, size);
1564
1565         /* round up to nearest 4K */
1566         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc)
1567                         + sizeof(u32);
1568         tx_ring->size = ALIGN(tx_ring->size, 4096);
1569
1570         tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
1571                                              &tx_ring->dma);
1572
1573         if (!tx_ring->desc)
1574                 goto err;
1575
1576         tx_ring->adapter = adapter;
1577         tx_ring->next_to_use = 0;
1578         tx_ring->next_to_clean = 0;
1579         return 0;
1580
1581 err:
1582         vfree(tx_ring->buffer_info);
1583         dev_err(&adapter->pdev->dev,
1584                 "Unable to allocate memory for the transmit descriptor ring\n");
1585         return -ENOMEM;
1586 }
1587
1588 /**
1589  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
1590  *                                (Descriptors) for all queues
1591  * @adapter: board private structure
1592  *
1593  * Return 0 on success, negative on failure
1594  **/
1595 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
1596 {
1597         int i, err = 0;
1598         int r_idx;
1599
1600         for (i = 0; i < adapter->num_tx_queues; i++) {
1601                 err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1602                 if (err) {
1603                         dev_err(&adapter->pdev->dev,
1604                                 "Allocation for Tx Queue %u failed\n", i);
1605                         for (i--; i >= 0; i--)
1606                                 igb_free_tx_resources(&adapter->tx_ring[i]);
1607                         break;
1608                 }
1609         }
1610
1611         for (i = 0; i < IGB_MAX_TX_QUEUES; i++) {
1612                 r_idx = i % adapter->num_tx_queues;
1613                 adapter->multi_tx_table[i] = &adapter->tx_ring[r_idx];
1614         }
1615         return err;
1616 }
1617
1618 /**
1619  * igb_configure_tx - Configure transmit Unit after Reset
1620  * @adapter: board private structure
1621  *
1622  * Configure the Tx unit of the MAC after a reset.
1623  **/
1624 static void igb_configure_tx(struct igb_adapter *adapter)
1625 {
1626         u64 tdba, tdwba;
1627         struct e1000_hw *hw = &adapter->hw;
1628         u32 tctl;
1629         u32 txdctl, txctrl;
1630         int i;
1631
1632         for (i = 0; i < adapter->num_tx_queues; i++) {
1633                 struct igb_ring *ring = &(adapter->tx_ring[i]);
1634
1635                 wr32(E1000_TDLEN(i),
1636                                 ring->count * sizeof(struct e1000_tx_desc));
1637                 tdba = ring->dma;
1638                 wr32(E1000_TDBAL(i),
1639                                 tdba & 0x00000000ffffffffULL);
1640                 wr32(E1000_TDBAH(i), tdba >> 32);
1641
1642                 tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc);
1643                 tdwba |= 1; /* enable head wb */
1644                 wr32(E1000_TDWBAL(i),
1645                                 tdwba & 0x00000000ffffffffULL);
1646                 wr32(E1000_TDWBAH(i), tdwba >> 32);
1647
1648                 ring->head = E1000_TDH(i);
1649                 ring->tail = E1000_TDT(i);
1650                 writel(0, hw->hw_addr + ring->tail);
1651                 writel(0, hw->hw_addr + ring->head);
1652                 txdctl = rd32(E1000_TXDCTL(i));
1653                 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
1654                 wr32(E1000_TXDCTL(i), txdctl);
1655
1656                 /* Turn off Relaxed Ordering on head write-backs.  The
1657                  * writebacks MUST be delivered in order or it will
1658                  * completely screw up our bookeeping.
1659                  */
1660                 txctrl = rd32(E1000_DCA_TXCTRL(i));
1661                 txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN;
1662                 wr32(E1000_DCA_TXCTRL(i), txctrl);
1663         }
1664
1665
1666
1667         /* Use the default values for the Tx Inter Packet Gap (IPG) timer */
1668
1669         /* Program the Transmit Control Register */
1670
1671         tctl = rd32(E1000_TCTL);
1672         tctl &= ~E1000_TCTL_CT;
1673         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1674                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1675
1676         igb_config_collision_dist(hw);
1677
1678         /* Setup Transmit Descriptor Settings for eop descriptor */
1679         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS;
1680
1681         /* Enable transmits */
1682         tctl |= E1000_TCTL_EN;
1683
1684         wr32(E1000_TCTL, tctl);
1685 }
1686
1687 /**
1688  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
1689  * @adapter: board private structure
1690  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1691  *
1692  * Returns 0 on success, negative on failure
1693  **/
1694
1695 int igb_setup_rx_resources(struct igb_adapter *adapter,
1696                            struct igb_ring *rx_ring)
1697 {
1698         struct pci_dev *pdev = adapter->pdev;
1699         int size, desc_len;
1700
1701 #ifdef CONFIG_IGB_LRO
1702         size = sizeof(struct net_lro_desc) * MAX_LRO_DESCRIPTORS;
1703         rx_ring->lro_mgr.lro_arr = vmalloc(size);
1704         if (!rx_ring->lro_mgr.lro_arr)
1705                 goto err;
1706         memset(rx_ring->lro_mgr.lro_arr, 0, size);
1707 #endif
1708
1709         size = sizeof(struct igb_buffer) * rx_ring->count;
1710         rx_ring->buffer_info = vmalloc(size);
1711         if (!rx_ring->buffer_info)
1712                 goto err;
1713         memset(rx_ring->buffer_info, 0, size);
1714
1715         desc_len = sizeof(union e1000_adv_rx_desc);
1716
1717         /* Round up to nearest 4K */
1718         rx_ring->size = rx_ring->count * desc_len;
1719         rx_ring->size = ALIGN(rx_ring->size, 4096);
1720
1721         rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
1722                                              &rx_ring->dma);
1723
1724         if (!rx_ring->desc)
1725                 goto err;
1726
1727         rx_ring->next_to_clean = 0;
1728         rx_ring->next_to_use = 0;
1729
1730         rx_ring->adapter = adapter;
1731
1732         return 0;
1733
1734 err:
1735 #ifdef CONFIG_IGB_LRO
1736         vfree(rx_ring->lro_mgr.lro_arr);
1737         rx_ring->lro_mgr.lro_arr = NULL;
1738 #endif
1739         vfree(rx_ring->buffer_info);
1740         dev_err(&adapter->pdev->dev, "Unable to allocate memory for "
1741                 "the receive descriptor ring\n");
1742         return -ENOMEM;
1743 }
1744
1745 /**
1746  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
1747  *                                (Descriptors) for all queues
1748  * @adapter: board private structure
1749  *
1750  * Return 0 on success, negative on failure
1751  **/
1752 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
1753 {
1754         int i, err = 0;
1755
1756         for (i = 0; i < adapter->num_rx_queues; i++) {
1757                 err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1758                 if (err) {
1759                         dev_err(&adapter->pdev->dev,
1760                                 "Allocation for Rx Queue %u failed\n", i);
1761                         for (i--; i >= 0; i--)
1762                                 igb_free_rx_resources(&adapter->rx_ring[i]);
1763                         break;
1764                 }
1765         }
1766
1767         return err;
1768 }
1769
1770 /**
1771  * igb_setup_rctl - configure the receive control registers
1772  * @adapter: Board private structure
1773  **/
1774 static void igb_setup_rctl(struct igb_adapter *adapter)
1775 {
1776         struct e1000_hw *hw = &adapter->hw;
1777         u32 rctl;
1778         u32 srrctl = 0;
1779         int i;
1780
1781         rctl = rd32(E1000_RCTL);
1782
1783         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1784
1785         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1786                 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1787                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1788
1789         /*
1790          * enable stripping of CRC. It's unlikely this will break BMC
1791          * redirection as it did with e1000. Newer features require
1792          * that the HW strips the CRC.
1793         */
1794         rctl |= E1000_RCTL_SECRC;
1795
1796         rctl &= ~E1000_RCTL_SBP;
1797
1798         if (adapter->netdev->mtu <= ETH_DATA_LEN)
1799                 rctl &= ~E1000_RCTL_LPE;
1800         else
1801                 rctl |= E1000_RCTL_LPE;
1802         if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) {
1803                 /* Setup buffer sizes */
1804                 rctl &= ~E1000_RCTL_SZ_4096;
1805                 rctl |= E1000_RCTL_BSEX;
1806                 switch (adapter->rx_buffer_len) {
1807                 case IGB_RXBUFFER_256:
1808                         rctl |= E1000_RCTL_SZ_256;
1809                         rctl &= ~E1000_RCTL_BSEX;
1810                         break;
1811                 case IGB_RXBUFFER_512:
1812                         rctl |= E1000_RCTL_SZ_512;
1813                         rctl &= ~E1000_RCTL_BSEX;
1814                         break;
1815                 case IGB_RXBUFFER_1024:
1816                         rctl |= E1000_RCTL_SZ_1024;
1817                         rctl &= ~E1000_RCTL_BSEX;
1818                         break;
1819                 case IGB_RXBUFFER_2048:
1820                 default:
1821                         rctl |= E1000_RCTL_SZ_2048;
1822                         rctl &= ~E1000_RCTL_BSEX;
1823                         break;
1824                 }
1825         } else {
1826                 rctl &= ~E1000_RCTL_BSEX;
1827                 srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT;
1828         }
1829
1830         /* 82575 and greater support packet-split where the protocol
1831          * header is placed in skb->data and the packet data is
1832          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1833          * In the case of a non-split, skb->data is linearly filled,
1834          * followed by the page buffers.  Therefore, skb->data is
1835          * sized to hold the largest protocol header.
1836          */
1837         /* allocations using alloc_page take too long for regular MTU
1838          * so only enable packet split for jumbo frames */
1839         if (rctl & E1000_RCTL_LPE) {
1840                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
1841                 srrctl |= adapter->rx_ps_hdr_size <<
1842                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
1843                 srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1844         } else {
1845                 adapter->rx_ps_hdr_size = 0;
1846                 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
1847         }
1848
1849         for (i = 0; i < adapter->num_rx_queues; i++)
1850                 wr32(E1000_SRRCTL(i), srrctl);
1851
1852         wr32(E1000_RCTL, rctl);
1853 }
1854
1855 /**
1856  * igb_configure_rx - Configure receive Unit after Reset
1857  * @adapter: board private structure
1858  *
1859  * Configure the Rx unit of the MAC after a reset.
1860  **/
1861 static void igb_configure_rx(struct igb_adapter *adapter)
1862 {
1863         u64 rdba;
1864         struct e1000_hw *hw = &adapter->hw;
1865         u32 rctl, rxcsum;
1866         u32 rxdctl;
1867         int i;
1868
1869         /* disable receives while setting up the descriptors */
1870         rctl = rd32(E1000_RCTL);
1871         wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN);
1872         wrfl();
1873         mdelay(10);
1874
1875         if (adapter->itr_setting > 3)
1876                 wr32(E1000_ITR, adapter->itr);
1877
1878         /* Setup the HW Rx Head and Tail Descriptor Pointers and
1879          * the Base and Length of the Rx Descriptor Ring */
1880         for (i = 0; i < adapter->num_rx_queues; i++) {
1881                 struct igb_ring *ring = &(adapter->rx_ring[i]);
1882                 rdba = ring->dma;
1883                 wr32(E1000_RDBAL(i),
1884                                 rdba & 0x00000000ffffffffULL);
1885                 wr32(E1000_RDBAH(i), rdba >> 32);
1886                 wr32(E1000_RDLEN(i),
1887                                ring->count * sizeof(union e1000_adv_rx_desc));
1888
1889                 ring->head = E1000_RDH(i);
1890                 ring->tail = E1000_RDT(i);
1891                 writel(0, hw->hw_addr + ring->tail);
1892                 writel(0, hw->hw_addr + ring->head);
1893
1894                 rxdctl = rd32(E1000_RXDCTL(i));
1895                 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
1896                 rxdctl &= 0xFFF00000;
1897                 rxdctl |= IGB_RX_PTHRESH;
1898                 rxdctl |= IGB_RX_HTHRESH << 8;
1899                 rxdctl |= IGB_RX_WTHRESH << 16;
1900                 wr32(E1000_RXDCTL(i), rxdctl);
1901 #ifdef CONFIG_IGB_LRO
1902                 /* Intitial LRO Settings */
1903                 ring->lro_mgr.max_aggr = MAX_LRO_AGGR;
1904                 ring->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1905                 ring->lro_mgr.get_skb_header = igb_get_skb_hdr;
1906                 ring->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1907                 ring->lro_mgr.dev = adapter->netdev;
1908                 ring->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1909                 ring->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1910 #endif
1911         }
1912
1913         if (adapter->num_rx_queues > 1) {
1914                 u32 random[10];
1915                 u32 mrqc;
1916                 u32 j, shift;
1917                 union e1000_reta {
1918                         u32 dword;
1919                         u8  bytes[4];
1920                 } reta;
1921
1922                 get_random_bytes(&random[0], 40);
1923
1924                 if (hw->mac.type >= e1000_82576)
1925                         shift = 0;
1926                 else
1927                         shift = 6;
1928                 for (j = 0; j < (32 * 4); j++) {
1929                         reta.bytes[j & 3] =
1930                                 (j % adapter->num_rx_queues) << shift;
1931                         if ((j & 3) == 3)
1932                                 writel(reta.dword,
1933                                        hw->hw_addr + E1000_RETA(0) + (j & ~3));
1934                 }
1935                 mrqc = E1000_MRQC_ENABLE_RSS_4Q;
1936
1937                 /* Fill out hash function seeds */
1938                 for (j = 0; j < 10; j++)
1939                         array_wr32(E1000_RSSRK(0), j, random[j]);
1940
1941                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1942                          E1000_MRQC_RSS_FIELD_IPV4_TCP);
1943                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 |
1944                          E1000_MRQC_RSS_FIELD_IPV6_TCP);
1945                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP |
1946                          E1000_MRQC_RSS_FIELD_IPV6_UDP);
1947                 mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX |
1948                          E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
1949
1950
1951                 wr32(E1000_MRQC, mrqc);
1952
1953                 /* Multiqueue and raw packet checksumming are mutually
1954                  * exclusive.  Note that this not the same as TCP/IP
1955                  * checksumming, which works fine. */
1956                 rxcsum = rd32(E1000_RXCSUM);
1957                 rxcsum |= E1000_RXCSUM_PCSD;
1958                 wr32(E1000_RXCSUM, rxcsum);
1959         } else {
1960                 /* Enable Receive Checksum Offload for TCP and UDP */
1961                 rxcsum = rd32(E1000_RXCSUM);
1962                 if (adapter->rx_csum) {
1963                         rxcsum |= E1000_RXCSUM_TUOFL;
1964
1965                         /* Enable IPv4 payload checksum for UDP fragments
1966                          * Must be used in conjunction with packet-split. */
1967                         if (adapter->rx_ps_hdr_size)
1968                                 rxcsum |= E1000_RXCSUM_IPPCSE;
1969                 } else {
1970                         rxcsum &= ~E1000_RXCSUM_TUOFL;
1971                         /* don't need to clear IPPCSE as it defaults to 0 */
1972                 }
1973                 wr32(E1000_RXCSUM, rxcsum);
1974         }
1975
1976         if (adapter->vlgrp)
1977                 wr32(E1000_RLPML,
1978                                 adapter->max_frame_size + VLAN_TAG_SIZE);
1979         else
1980                 wr32(E1000_RLPML, adapter->max_frame_size);
1981
1982         /* Enable Receives */
1983         wr32(E1000_RCTL, rctl);
1984 }
1985
1986 /**
1987  * igb_free_tx_resources - Free Tx Resources per Queue
1988  * @adapter: board private structure
1989  * @tx_ring: Tx descriptor ring for a specific queue
1990  *
1991  * Free all transmit software resources
1992  **/
1993 void igb_free_tx_resources(struct igb_ring *tx_ring)
1994 {
1995         struct pci_dev *pdev = tx_ring->adapter->pdev;
1996
1997         igb_clean_tx_ring(tx_ring);
1998
1999         vfree(tx_ring->buffer_info);
2000         tx_ring->buffer_info = NULL;
2001
2002         pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2003
2004         tx_ring->desc = NULL;
2005 }
2006
2007 /**
2008  * igb_free_all_tx_resources - Free Tx Resources for All Queues
2009  * @adapter: board private structure
2010  *
2011  * Free all transmit software resources
2012  **/
2013 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
2014 {
2015         int i;
2016
2017         for (i = 0; i < adapter->num_tx_queues; i++)
2018                 igb_free_tx_resources(&adapter->tx_ring[i]);
2019 }
2020
2021 static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter,
2022                                            struct igb_buffer *buffer_info)
2023 {
2024         if (buffer_info->dma) {
2025                 pci_unmap_page(adapter->pdev,
2026                                 buffer_info->dma,
2027                                 buffer_info->length,
2028                                 PCI_DMA_TODEVICE);
2029                 buffer_info->dma = 0;
2030         }
2031         if (buffer_info->skb) {
2032                 dev_kfree_skb_any(buffer_info->skb);
2033                 buffer_info->skb = NULL;
2034         }
2035         buffer_info->time_stamp = 0;
2036         /* buffer_info must be completely set up in the transmit path */
2037 }
2038
2039 /**
2040  * igb_clean_tx_ring - Free Tx Buffers
2041  * @adapter: board private structure
2042  * @tx_ring: ring to be cleaned
2043  **/
2044 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
2045 {
2046         struct igb_adapter *adapter = tx_ring->adapter;
2047         struct igb_buffer *buffer_info;
2048         unsigned long size;
2049         unsigned int i;
2050
2051         if (!tx_ring->buffer_info)
2052                 return;
2053         /* Free all the Tx ring sk_buffs */
2054
2055         for (i = 0; i < tx_ring->count; i++) {
2056                 buffer_info = &tx_ring->buffer_info[i];
2057                 igb_unmap_and_free_tx_resource(adapter, buffer_info);
2058         }
2059
2060         size = sizeof(struct igb_buffer) * tx_ring->count;
2061         memset(tx_ring->buffer_info, 0, size);
2062
2063         /* Zero out the descriptor ring */
2064
2065         memset(tx_ring->desc, 0, tx_ring->size);
2066
2067         tx_ring->next_to_use = 0;
2068         tx_ring->next_to_clean = 0;
2069
2070         writel(0, adapter->hw.hw_addr + tx_ring->head);
2071         writel(0, adapter->hw.hw_addr + tx_ring->tail);
2072 }
2073
2074 /**
2075  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
2076  * @adapter: board private structure
2077  **/
2078 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
2079 {
2080         int i;
2081
2082         for (i = 0; i < adapter->num_tx_queues; i++)
2083                 igb_clean_tx_ring(&adapter->tx_ring[i]);
2084 }
2085
2086 /**
2087  * igb_free_rx_resources - Free Rx Resources
2088  * @adapter: board private structure
2089  * @rx_ring: ring to clean the resources from
2090  *
2091  * Free all receive software resources
2092  **/
2093 void igb_free_rx_resources(struct igb_ring *rx_ring)
2094 {
2095         struct pci_dev *pdev = rx_ring->adapter->pdev;
2096
2097         igb_clean_rx_ring(rx_ring);
2098
2099         vfree(rx_ring->buffer_info);
2100         rx_ring->buffer_info = NULL;
2101
2102 #ifdef CONFIG_IGB_LRO
2103         vfree(rx_ring->lro_mgr.lro_arr);
2104         rx_ring->lro_mgr.lro_arr = NULL;
2105 #endif
2106
2107         pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2108
2109         rx_ring->desc = NULL;
2110 }
2111
2112 /**
2113  * igb_free_all_rx_resources - Free Rx Resources for All Queues
2114  * @adapter: board private structure
2115  *
2116  * Free all receive software resources
2117  **/
2118 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
2119 {
2120         int i;
2121
2122         for (i = 0; i < adapter->num_rx_queues; i++)
2123                 igb_free_rx_resources(&adapter->rx_ring[i]);
2124 }
2125
2126 /**
2127  * igb_clean_rx_ring - Free Rx Buffers per Queue
2128  * @adapter: board private structure
2129  * @rx_ring: ring to free buffers from
2130  **/
2131 static void igb_clean_rx_ring(struct igb_ring *rx_ring)
2132 {
2133         struct igb_adapter *adapter = rx_ring->adapter;
2134         struct igb_buffer *buffer_info;
2135         struct pci_dev *pdev = adapter->pdev;
2136         unsigned long size;
2137         unsigned int i;
2138
2139         if (!rx_ring->buffer_info)
2140                 return;
2141         /* Free all the Rx ring sk_buffs */
2142         for (i = 0; i < rx_ring->count; i++) {
2143                 buffer_info = &rx_ring->buffer_info[i];
2144                 if (buffer_info->dma) {
2145                         if (adapter->rx_ps_hdr_size)
2146                                 pci_unmap_single(pdev, buffer_info->dma,
2147                                                  adapter->rx_ps_hdr_size,
2148                                                  PCI_DMA_FROMDEVICE);
2149                         else
2150                                 pci_unmap_single(pdev, buffer_info->dma,
2151                                                  adapter->rx_buffer_len,
2152                                                  PCI_DMA_FROMDEVICE);
2153                         buffer_info->dma = 0;
2154                 }
2155
2156                 if (buffer_info->skb) {
2157                         dev_kfree_skb(buffer_info->skb);
2158                         buffer_info->skb = NULL;
2159                 }
2160                 if (buffer_info->page) {
2161                         if (buffer_info->page_dma)
2162                                 pci_unmap_page(pdev, buffer_info->page_dma,
2163                                                PAGE_SIZE / 2,
2164                                                PCI_DMA_FROMDEVICE);
2165                         put_page(buffer_info->page);
2166                         buffer_info->page = NULL;
2167                         buffer_info->page_dma = 0;
2168                         buffer_info->page_offset = 0;
2169                 }
2170         }
2171
2172         size = sizeof(struct igb_buffer) * rx_ring->count;
2173         memset(rx_ring->buffer_info, 0, size);
2174
2175         /* Zero out the descriptor ring */
2176         memset(rx_ring->desc, 0, rx_ring->size);
2177
2178         rx_ring->next_to_clean = 0;
2179         rx_ring->next_to_use = 0;
2180
2181         writel(0, adapter->hw.hw_addr + rx_ring->head);
2182         writel(0, adapter->hw.hw_addr + rx_ring->tail);
2183 }
2184
2185 /**
2186  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
2187  * @adapter: board private structure
2188  **/
2189 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
2190 {
2191         int i;
2192
2193         for (i = 0; i < adapter->num_rx_queues; i++)
2194                 igb_clean_rx_ring(&adapter->rx_ring[i]);
2195 }
2196
2197 /**
2198  * igb_set_mac - Change the Ethernet Address of the NIC
2199  * @netdev: network interface device structure
2200  * @p: pointer to an address structure
2201  *
2202  * Returns 0 on success, negative on failure
2203  **/
2204 static int igb_set_mac(struct net_device *netdev, void *p)
2205 {
2206         struct igb_adapter *adapter = netdev_priv(netdev);
2207         struct sockaddr *addr = p;
2208
2209         if (!is_valid_ether_addr(addr->sa_data))
2210                 return -EADDRNOTAVAIL;
2211
2212         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2213         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2214
2215         adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2216
2217         return 0;
2218 }
2219
2220 /**
2221  * igb_set_multi - Multicast and Promiscuous mode set
2222  * @netdev: network interface device structure
2223  *
2224  * The set_multi entry point is called whenever the multicast address
2225  * list or the network interface flags are updated.  This routine is
2226  * responsible for configuring the hardware for proper multicast,
2227  * promiscuous mode, and all-multi behavior.
2228  **/
2229 static void igb_set_multi(struct net_device *netdev)
2230 {
2231         struct igb_adapter *adapter = netdev_priv(netdev);
2232         struct e1000_hw *hw = &adapter->hw;
2233         struct e1000_mac_info *mac = &hw->mac;
2234         struct dev_mc_list *mc_ptr;
2235         u8  *mta_list;
2236         u32 rctl;
2237         int i;
2238
2239         /* Check for Promiscuous and All Multicast modes */
2240
2241         rctl = rd32(E1000_RCTL);
2242
2243         if (netdev->flags & IFF_PROMISC) {
2244                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2245                 rctl &= ~E1000_RCTL_VFE;
2246         } else {
2247                 if (netdev->flags & IFF_ALLMULTI) {
2248                         rctl |= E1000_RCTL_MPE;
2249                         rctl &= ~E1000_RCTL_UPE;
2250                 } else
2251                         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2252                 rctl |= E1000_RCTL_VFE;
2253         }
2254         wr32(E1000_RCTL, rctl);
2255
2256         if (!netdev->mc_count) {
2257                 /* nothing to program, so clear mc list */
2258                 igb_update_mc_addr_list_82575(hw, NULL, 0, 1,
2259                                           mac->rar_entry_count);
2260                 return;
2261         }
2262
2263         mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC);
2264         if (!mta_list)
2265                 return;
2266
2267         /* The shared function expects a packed array of only addresses. */
2268         mc_ptr = netdev->mc_list;
2269
2270         for (i = 0; i < netdev->mc_count; i++) {
2271                 if (!mc_ptr)
2272                         break;
2273                 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN);
2274                 mc_ptr = mc_ptr->next;
2275         }
2276         igb_update_mc_addr_list_82575(hw, mta_list, i, 1,
2277                                       mac->rar_entry_count);
2278         kfree(mta_list);
2279 }
2280
2281 /* Need to wait a few seconds after link up to get diagnostic information from
2282  * the phy */
2283 static void igb_update_phy_info(unsigned long data)
2284 {
2285         struct igb_adapter *adapter = (struct igb_adapter *) data;
2286         if (adapter->hw.phy.ops.get_phy_info)
2287                 adapter->hw.phy.ops.get_phy_info(&adapter->hw);
2288 }
2289
2290 /**
2291  * igb_watchdog - Timer Call-back
2292  * @data: pointer to adapter cast into an unsigned long
2293  **/
2294 static void igb_watchdog(unsigned long data)
2295 {
2296         struct igb_adapter *adapter = (struct igb_adapter *)data;
2297         /* Do the rest outside of interrupt context */
2298         schedule_work(&adapter->watchdog_task);
2299 }
2300
2301 static void igb_watchdog_task(struct work_struct *work)
2302 {
2303         struct igb_adapter *adapter = container_of(work,
2304                                         struct igb_adapter, watchdog_task);
2305         struct e1000_hw *hw = &adapter->hw;
2306
2307         struct net_device *netdev = adapter->netdev;
2308         struct igb_ring *tx_ring = adapter->tx_ring;
2309         struct e1000_mac_info *mac = &adapter->hw.mac;
2310         u32 link;
2311         u32 eics = 0;
2312         s32 ret_val;
2313         int i;
2314
2315         if ((netif_carrier_ok(netdev)) &&
2316             (rd32(E1000_STATUS) & E1000_STATUS_LU))
2317                 goto link_up;
2318
2319         ret_val = hw->mac.ops.check_for_link(&adapter->hw);
2320         if ((ret_val == E1000_ERR_PHY) &&
2321             (hw->phy.type == e1000_phy_igp_3) &&
2322             (rd32(E1000_CTRL) &
2323              E1000_PHY_CTRL_GBE_DISABLE))
2324                 dev_info(&adapter->pdev->dev,
2325                          "Gigabit has been disabled, downgrading speed\n");
2326
2327         if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
2328             !(rd32(E1000_TXCW) & E1000_TXCW_ANE))
2329                 link = mac->serdes_has_link;
2330         else
2331                 link = rd32(E1000_STATUS) &
2332                                       E1000_STATUS_LU;
2333
2334         if (link) {
2335                 if (!netif_carrier_ok(netdev)) {
2336                         u32 ctrl;
2337                         hw->mac.ops.get_speed_and_duplex(&adapter->hw,
2338                                                    &adapter->link_speed,
2339                                                    &adapter->link_duplex);
2340
2341                         ctrl = rd32(E1000_CTRL);
2342                         dev_info(&adapter->pdev->dev,
2343                                  "NIC Link is Up %d Mbps %s, "
2344                                  "Flow Control: %s\n",
2345                                  adapter->link_speed,
2346                                  adapter->link_duplex == FULL_DUPLEX ?
2347                                  "Full Duplex" : "Half Duplex",
2348                                  ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2349                                  E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2350                                  E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2351                                  E1000_CTRL_TFCE) ? "TX" : "None")));
2352
2353                         /* tweak tx_queue_len according to speed/duplex and
2354                          * adjust the timeout factor */
2355                         netdev->tx_queue_len = adapter->tx_queue_len;
2356                         adapter->tx_timeout_factor = 1;
2357                         switch (adapter->link_speed) {
2358                         case SPEED_10:
2359                                 netdev->tx_queue_len = 10;
2360                                 adapter->tx_timeout_factor = 14;
2361                                 break;
2362                         case SPEED_100:
2363                                 netdev->tx_queue_len = 100;
2364                                 /* maybe add some timeout factor ? */
2365                                 break;
2366                         }
2367
2368                         netif_carrier_on(netdev);
2369                         netif_tx_wake_all_queues(netdev);
2370
2371                         if (!test_bit(__IGB_DOWN, &adapter->state))
2372                                 mod_timer(&adapter->phy_info_timer,
2373                                           round_jiffies(jiffies + 2 * HZ));
2374                 }
2375         } else {
2376                 if (netif_carrier_ok(netdev)) {
2377                         adapter->link_speed = 0;
2378                         adapter->link_duplex = 0;
2379                         dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2380                         netif_carrier_off(netdev);
2381                         netif_tx_stop_all_queues(netdev);
2382                         if (!test_bit(__IGB_DOWN, &adapter->state))
2383                                 mod_timer(&adapter->phy_info_timer,
2384                                           round_jiffies(jiffies + 2 * HZ));
2385                 }
2386         }
2387
2388 link_up:
2389         igb_update_stats(adapter);
2390
2391         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2392         adapter->tpt_old = adapter->stats.tpt;
2393         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
2394         adapter->colc_old = adapter->stats.colc;
2395
2396         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
2397         adapter->gorc_old = adapter->stats.gorc;
2398         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
2399         adapter->gotc_old = adapter->stats.gotc;
2400
2401         igb_update_adaptive(&adapter->hw);
2402
2403         if (!netif_carrier_ok(netdev)) {
2404                 if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) {
2405                         /* We've lost link, so the controller stops DMA,
2406                          * but we've got queued Tx work that's never going
2407                          * to get done, so reset controller to flush Tx.
2408                          * (Do the reset outside of interrupt context). */
2409                         adapter->tx_timeout_count++;
2410                         schedule_work(&adapter->reset_task);
2411                 }
2412         }
2413
2414         /* Cause software interrupt to ensure rx ring is cleaned */
2415         if (adapter->msix_entries) {
2416                 for (i = 0; i < adapter->num_rx_queues; i++)
2417                         eics |= adapter->rx_ring[i].eims_value;
2418                 wr32(E1000_EICS, eics);
2419         } else {
2420                 wr32(E1000_ICS, E1000_ICS_RXDMT0);
2421         }
2422
2423         /* Force detection of hung controller every watchdog period */
2424         tx_ring->detect_tx_hung = true;
2425
2426         /* Reset the timer */
2427         if (!test_bit(__IGB_DOWN, &adapter->state))
2428                 mod_timer(&adapter->watchdog_timer,
2429                           round_jiffies(jiffies + 2 * HZ));
2430 }
2431
2432 enum latency_range {
2433         lowest_latency = 0,
2434         low_latency = 1,
2435         bulk_latency = 2,
2436         latency_invalid = 255
2437 };
2438
2439
2440 /**
2441  * igb_update_ring_itr - update the dynamic ITR value based on packet size
2442  *
2443  *      Stores a new ITR value based on strictly on packet size.  This
2444  *      algorithm is less sophisticated than that used in igb_update_itr,
2445  *      due to the difficulty of synchronizing statistics across multiple
2446  *      receive rings.  The divisors and thresholds used by this fuction
2447  *      were determined based on theoretical maximum wire speed and testing
2448  *      data, in order to minimize response time while increasing bulk
2449  *      throughput.
2450  *      This functionality is controlled by the InterruptThrottleRate module
2451  *      parameter (see igb_param.c)
2452  *      NOTE:  This function is called only when operating in a multiqueue
2453  *             receive environment.
2454  * @rx_ring: pointer to ring
2455  **/
2456 static void igb_update_ring_itr(struct igb_ring *rx_ring)
2457 {
2458         int new_val = rx_ring->itr_val;
2459         int avg_wire_size = 0;
2460         struct igb_adapter *adapter = rx_ring->adapter;
2461
2462         if (!rx_ring->total_packets)
2463                 goto clear_counts; /* no packets, so don't do anything */
2464
2465         /* For non-gigabit speeds, just fix the interrupt rate at 4000
2466          * ints/sec - ITR timer value of 120 ticks.
2467          */
2468         if (adapter->link_speed != SPEED_1000) {
2469                 new_val = 120;
2470                 goto set_itr_val;
2471         }
2472         avg_wire_size = rx_ring->total_bytes / rx_ring->total_packets;
2473
2474         /* Add 24 bytes to size to account for CRC, preamble, and gap */
2475         avg_wire_size += 24;
2476
2477         /* Don't starve jumbo frames */
2478         avg_wire_size = min(avg_wire_size, 3000);
2479
2480         /* Give a little boost to mid-size frames */
2481         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
2482                 new_val = avg_wire_size / 3;
2483         else
2484                 new_val = avg_wire_size / 2;
2485
2486 set_itr_val:
2487         if (new_val != rx_ring->itr_val) {
2488                 rx_ring->itr_val = new_val;
2489                 rx_ring->set_itr = 1;
2490         }
2491 clear_counts:
2492         rx_ring->total_bytes = 0;
2493         rx_ring->total_packets = 0;
2494 }
2495
2496 /**
2497  * igb_update_itr - update the dynamic ITR value based on statistics
2498  *      Stores a new ITR value based on packets and byte
2499  *      counts during the last interrupt.  The advantage of per interrupt
2500  *      computation is faster updates and more accurate ITR for the current
2501  *      traffic pattern.  Constants in this function were computed
2502  *      based on theoretical maximum wire speed and thresholds were set based
2503  *      on testing data as well as attempting to minimize response time
2504  *      while increasing bulk throughput.
2505  *      this functionality is controlled by the InterruptThrottleRate module
2506  *      parameter (see igb_param.c)
2507  *      NOTE:  These calculations are only valid when operating in a single-
2508  *             queue environment.
2509  * @adapter: pointer to adapter
2510  * @itr_setting: current adapter->itr
2511  * @packets: the number of packets during this measurement interval
2512  * @bytes: the number of bytes during this measurement interval
2513  **/
2514 static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting,
2515                                    int packets, int bytes)
2516 {
2517         unsigned int retval = itr_setting;
2518
2519         if (packets == 0)
2520                 goto update_itr_done;
2521
2522         switch (itr_setting) {
2523         case lowest_latency:
2524                 /* handle TSO and jumbo frames */
2525                 if (bytes/packets > 8000)
2526                         retval = bulk_latency;
2527                 else if ((packets < 5) && (bytes > 512))
2528                         retval = low_latency;
2529                 break;
2530         case low_latency:  /* 50 usec aka 20000 ints/s */
2531                 if (bytes > 10000) {
2532                         /* this if handles the TSO accounting */
2533                         if (bytes/packets > 8000) {
2534                                 retval = bulk_latency;
2535                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2536                                 retval = bulk_latency;
2537                         } else if ((packets > 35)) {
2538                                 retval = lowest_latency;
2539                         }
2540                 } else if (bytes/packets > 2000) {
2541                         retval = bulk_latency;
2542                 } else if (packets <= 2 && bytes < 512) {
2543                         retval = lowest_latency;
2544                 }
2545                 break;
2546         case bulk_latency: /* 250 usec aka 4000 ints/s */
2547                 if (bytes > 25000) {
2548                         if (packets > 35)
2549                                 retval = low_latency;
2550                 } else if (bytes < 6000) {
2551                         retval = low_latency;
2552                 }
2553                 break;
2554         }
2555
2556 update_itr_done:
2557         return retval;
2558 }
2559
2560 static void igb_set_itr(struct igb_adapter *adapter)
2561 {
2562         u16 current_itr;
2563         u32 new_itr = adapter->itr;
2564
2565         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2566         if (adapter->link_speed != SPEED_1000) {
2567                 current_itr = 0;
2568                 new_itr = 4000;
2569                 goto set_itr_now;
2570         }
2571
2572         adapter->rx_itr = igb_update_itr(adapter,
2573                                     adapter->rx_itr,
2574                                     adapter->rx_ring->total_packets,
2575                                     adapter->rx_ring->total_bytes);
2576
2577         if (adapter->rx_ring->buddy) {
2578                 adapter->tx_itr = igb_update_itr(adapter,
2579                                             adapter->tx_itr,
2580                                             adapter->tx_ring->total_packets,
2581                                             adapter->tx_ring->total_bytes);
2582
2583                 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2584         } else {
2585                 current_itr = adapter->rx_itr;
2586         }
2587
2588         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2589         if (adapter->itr_setting == 3 &&
2590             current_itr == lowest_latency)
2591                 current_itr = low_latency;
2592
2593         switch (current_itr) {
2594         /* counts and packets in update_itr are dependent on these numbers */
2595         case lowest_latency:
2596                 new_itr = 70000;
2597                 break;
2598         case low_latency:
2599                 new_itr = 20000; /* aka hwitr = ~200 */
2600                 break;
2601         case bulk_latency:
2602                 new_itr = 4000;
2603                 break;
2604         default:
2605                 break;
2606         }
2607
2608 set_itr_now:
2609         adapter->rx_ring->total_bytes = 0;
2610         adapter->rx_ring->total_packets = 0;
2611         if (adapter->rx_ring->buddy) {
2612                 adapter->rx_ring->buddy->total_bytes = 0;
2613                 adapter->rx_ring->buddy->total_packets = 0;
2614         }
2615
2616         if (new_itr != adapter->itr) {
2617                 /* this attempts to bias the interrupt rate towards Bulk
2618                  * by adding intermediate steps when interrupt rate is
2619                  * increasing */
2620                 new_itr = new_itr > adapter->itr ?
2621                              min(adapter->itr + (new_itr >> 2), new_itr) :
2622                              new_itr;
2623                 /* Don't write the value here; it resets the adapter's
2624                  * internal timer, and causes us to delay far longer than
2625                  * we should between interrupts.  Instead, we write the ITR
2626                  * value at the beginning of the next interrupt so the timing
2627                  * ends up being correct.
2628                  */
2629                 adapter->itr = new_itr;
2630                 adapter->rx_ring->itr_val = 1000000000 / (new_itr * 256);
2631                 adapter->rx_ring->set_itr = 1;
2632         }
2633
2634         return;
2635 }
2636
2637
2638 #define IGB_TX_FLAGS_CSUM               0x00000001
2639 #define IGB_TX_FLAGS_VLAN               0x00000002
2640 #define IGB_TX_FLAGS_TSO                0x00000004
2641 #define IGB_TX_FLAGS_IPV4               0x00000008
2642 #define IGB_TX_FLAGS_VLAN_MASK  0xffff0000
2643 #define IGB_TX_FLAGS_VLAN_SHIFT 16
2644
2645 static inline int igb_tso_adv(struct igb_adapter *adapter,
2646                               struct igb_ring *tx_ring,
2647                               struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2648 {
2649         struct e1000_adv_tx_context_desc *context_desc;
2650         unsigned int i;
2651         int err;
2652         struct igb_buffer *buffer_info;
2653         u32 info = 0, tu_cmd = 0;
2654         u32 mss_l4len_idx, l4len;
2655         *hdr_len = 0;
2656
2657         if (skb_header_cloned(skb)) {
2658                 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2659                 if (err)
2660                         return err;
2661         }
2662
2663         l4len = tcp_hdrlen(skb);
2664         *hdr_len += l4len;
2665
2666         if (skb->protocol == htons(ETH_P_IP)) {
2667                 struct iphdr *iph = ip_hdr(skb);
2668                 iph->tot_len = 0;
2669                 iph->check = 0;
2670                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2671                                                          iph->daddr, 0,
2672                                                          IPPROTO_TCP,
2673                                                          0);
2674         } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2675                 ipv6_hdr(skb)->payload_len = 0;
2676                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2677                                                        &ipv6_hdr(skb)->daddr,
2678                                                        0, IPPROTO_TCP, 0);
2679         }
2680
2681         i = tx_ring->next_to_use;
2682
2683         buffer_info = &tx_ring->buffer_info[i];
2684         context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2685         /* VLAN MACLEN IPLEN */
2686         if (tx_flags & IGB_TX_FLAGS_VLAN)
2687                 info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2688         info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2689         *hdr_len += skb_network_offset(skb);
2690         info |= skb_network_header_len(skb);
2691         *hdr_len += skb_network_header_len(skb);
2692         context_desc->vlan_macip_lens = cpu_to_le32(info);
2693
2694         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2695         tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2696
2697         if (skb->protocol == htons(ETH_P_IP))
2698                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2699         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2700
2701         context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2702
2703         /* MSS L4LEN IDX */
2704         mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT);
2705         mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT);
2706
2707         /* Context index must be unique per ring. */
2708         if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2709                 mss_l4len_idx |= tx_ring->queue_index << 4;
2710
2711         context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2712         context_desc->seqnum_seed = 0;
2713
2714         buffer_info->time_stamp = jiffies;
2715         buffer_info->dma = 0;
2716         i++;
2717         if (i == tx_ring->count)
2718                 i = 0;
2719
2720         tx_ring->next_to_use = i;
2721
2722         return true;
2723 }
2724
2725 static inline bool igb_tx_csum_adv(struct igb_adapter *adapter,
2726                                         struct igb_ring *tx_ring,
2727                                         struct sk_buff *skb, u32 tx_flags)
2728 {
2729         struct e1000_adv_tx_context_desc *context_desc;
2730         unsigned int i;
2731         struct igb_buffer *buffer_info;
2732         u32 info = 0, tu_cmd = 0;
2733
2734         if ((skb->ip_summed == CHECKSUM_PARTIAL) ||
2735             (tx_flags & IGB_TX_FLAGS_VLAN)) {
2736                 i = tx_ring->next_to_use;
2737                 buffer_info = &tx_ring->buffer_info[i];
2738                 context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i);
2739
2740                 if (tx_flags & IGB_TX_FLAGS_VLAN)
2741                         info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK);
2742                 info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT);
2743                 if (skb->ip_summed == CHECKSUM_PARTIAL)
2744                         info |= skb_network_header_len(skb);
2745
2746                 context_desc->vlan_macip_lens = cpu_to_le32(info);
2747
2748                 tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT);
2749
2750                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2751                         switch (skb->protocol) {
2752                         case __constant_htons(ETH_P_IP):
2753                                 tu_cmd |= E1000_ADVTXD_TUCMD_IPV4;
2754                                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2755                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2756                                 break;
2757                         case __constant_htons(ETH_P_IPV6):
2758                                 /* XXX what about other V6 headers?? */
2759                                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2760                                         tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
2761                                 break;
2762                         default:
2763                                 if (unlikely(net_ratelimit()))
2764                                         dev_warn(&adapter->pdev->dev,
2765                                             "partial checksum but proto=%x!\n",
2766                                             skb->protocol);
2767                                 break;
2768                         }
2769                 }
2770
2771                 context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd);
2772                 context_desc->seqnum_seed = 0;
2773                 if (adapter->flags & IGB_FLAG_NEED_CTX_IDX)
2774                         context_desc->mss_l4len_idx =
2775                                 cpu_to_le32(tx_ring->queue_index << 4);
2776
2777                 buffer_info->time_stamp = jiffies;
2778                 buffer_info->dma = 0;
2779
2780                 i++;
2781                 if (i == tx_ring->count)
2782                         i = 0;
2783                 tx_ring->next_to_use = i;
2784
2785                 return true;
2786         }
2787
2788
2789         return false;
2790 }
2791
2792 #define IGB_MAX_TXD_PWR 16
2793 #define IGB_MAX_DATA_PER_TXD    (1<<IGB_MAX_TXD_PWR)
2794
2795 static inline int igb_tx_map_adv(struct igb_adapter *adapter,
2796                                  struct igb_ring *tx_ring,
2797                                  struct sk_buff *skb)
2798 {
2799         struct igb_buffer *buffer_info;
2800         unsigned int len = skb_headlen(skb);
2801         unsigned int count = 0, i;
2802         unsigned int f;
2803
2804         i = tx_ring->next_to_use;
2805
2806         buffer_info = &tx_ring->buffer_info[i];
2807         BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2808         buffer_info->length = len;
2809         /* set time_stamp *before* dma to help avoid a possible race */
2810         buffer_info->time_stamp = jiffies;
2811         buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len,
2812                                           PCI_DMA_TODEVICE);
2813         count++;
2814         i++;
2815         if (i == tx_ring->count)
2816                 i = 0;
2817
2818         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
2819                 struct skb_frag_struct *frag;
2820
2821                 frag = &skb_shinfo(skb)->frags[f];
2822                 len = frag->size;
2823
2824                 buffer_info = &tx_ring->buffer_info[i];
2825                 BUG_ON(len >= IGB_MAX_DATA_PER_TXD);
2826                 buffer_info->length = len;
2827                 buffer_info->time_stamp = jiffies;
2828                 buffer_info->dma = pci_map_page(adapter->pdev,
2829                                                 frag->page,
2830                                                 frag->page_offset,
2831                                                 len,
2832                                                 PCI_DMA_TODEVICE);
2833
2834                 count++;
2835                 i++;
2836                 if (i == tx_ring->count)
2837                         i = 0;
2838         }
2839
2840         i = (i == 0) ? tx_ring->count - 1 : i - 1;
2841         tx_ring->buffer_info[i].skb = skb;
2842
2843         return count;
2844 }
2845
2846 static inline void igb_tx_queue_adv(struct igb_adapter *adapter,
2847                                     struct igb_ring *tx_ring,
2848                                     int tx_flags, int count, u32 paylen,
2849                                     u8 hdr_len)
2850 {
2851         union e1000_adv_tx_desc *tx_desc = NULL;
2852         struct igb_buffer *buffer_info;
2853         u32 olinfo_status = 0, cmd_type_len;
2854         unsigned int i;
2855
2856         cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS |
2857                         E1000_ADVTXD_DCMD_DEXT);
2858
2859         if (tx_flags & IGB_TX_FLAGS_VLAN)
2860                 cmd_type_len |= E1000_ADVTXD_DCMD_VLE;
2861
2862         if (tx_flags & IGB_TX_FLAGS_TSO) {
2863                 cmd_type_len |= E1000_ADVTXD_DCMD_TSE;
2864
2865                 /* insert tcp checksum */
2866                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2867
2868                 /* insert ip checksum */
2869                 if (tx_flags & IGB_TX_FLAGS_IPV4)
2870                         olinfo_status |= E1000_TXD_POPTS_IXSM << 8;
2871
2872         } else if (tx_flags & IGB_TX_FLAGS_CSUM) {
2873                 olinfo_status |= E1000_TXD_POPTS_TXSM << 8;
2874         }
2875
2876         if ((adapter->flags & IGB_FLAG_NEED_CTX_IDX) &&
2877             (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO |
2878                          IGB_TX_FLAGS_VLAN)))
2879                 olinfo_status |= tx_ring->queue_index << 4;
2880
2881         olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT);
2882
2883         i = tx_ring->next_to_use;
2884         while (count--) {
2885                 buffer_info = &tx_ring->buffer_info[i];
2886                 tx_desc = E1000_TX_DESC_ADV(*tx_ring, i);
2887                 tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
2888                 tx_desc->read.cmd_type_len =
2889                         cpu_to_le32(cmd_type_len | buffer_info->length);
2890                 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2891                 i++;
2892                 if (i == tx_ring->count)
2893                         i = 0;
2894         }
2895
2896         tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd);
2897         /* Force memory writes to complete before letting h/w
2898          * know there are new descriptors to fetch.  (Only
2899          * applicable for weak-ordered memory model archs,
2900          * such as IA-64). */
2901         wmb();
2902
2903         tx_ring->next_to_use = i;
2904         writel(i, adapter->hw.hw_addr + tx_ring->tail);
2905         /* we need this if more than one processor can write to our tail
2906          * at a time, it syncronizes IO on IA64/Altix systems */
2907         mmiowb();
2908 }
2909
2910 static int __igb_maybe_stop_tx(struct net_device *netdev,
2911                                struct igb_ring *tx_ring, int size)
2912 {
2913         struct igb_adapter *adapter = netdev_priv(netdev);
2914
2915         netif_stop_subqueue(netdev, tx_ring->queue_index);
2916
2917         /* Herbert's original patch had:
2918          *  smp_mb__after_netif_stop_queue();
2919          * but since that doesn't exist yet, just open code it. */
2920         smp_mb();
2921
2922         /* We need to check again in a case another CPU has just
2923          * made room available. */
2924         if (IGB_DESC_UNUSED(tx_ring) < size)
2925                 return -EBUSY;
2926
2927         /* A reprieve! */
2928         netif_wake_subqueue(netdev, tx_ring->queue_index);
2929         ++adapter->restart_queue;
2930         return 0;
2931 }
2932
2933 static int igb_maybe_stop_tx(struct net_device *netdev,
2934                              struct igb_ring *tx_ring, int size)
2935 {
2936         if (IGB_DESC_UNUSED(tx_ring) >= size)
2937                 return 0;
2938         return __igb_maybe_stop_tx(netdev, tx_ring, size);
2939 }
2940
2941 #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1)
2942
2943 static int igb_xmit_frame_ring_adv(struct sk_buff *skb,
2944                                    struct net_device *netdev,
2945                                    struct igb_ring *tx_ring)
2946 {
2947         struct igb_adapter *adapter = netdev_priv(netdev);
2948         unsigned int tx_flags = 0;
2949         unsigned int len;
2950         u8 hdr_len = 0;
2951         int tso = 0;
2952
2953         len = skb_headlen(skb);
2954
2955         if (test_bit(__IGB_DOWN, &adapter->state)) {
2956                 dev_kfree_skb_any(skb);
2957                 return NETDEV_TX_OK;
2958         }
2959
2960         if (skb->len <= 0) {
2961                 dev_kfree_skb_any(skb);
2962                 return NETDEV_TX_OK;
2963         }
2964
2965         /* need: 1 descriptor per page,
2966          *       + 2 desc gap to keep tail from touching head,
2967          *       + 1 desc for skb->data,
2968          *       + 1 desc for context descriptor,
2969          * otherwise try next time */
2970         if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) {
2971                 /* this is a hard error */
2972                 return NETDEV_TX_BUSY;
2973         }
2974         skb_orphan(skb);
2975
2976         if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2977                 tx_flags |= IGB_TX_FLAGS_VLAN;
2978                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
2979         }
2980
2981         if (skb->protocol == htons(ETH_P_IP))
2982                 tx_flags |= IGB_TX_FLAGS_IPV4;
2983
2984         tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags,
2985                                               &hdr_len) : 0;
2986
2987         if (tso < 0) {
2988                 dev_kfree_skb_any(skb);
2989                 return NETDEV_TX_OK;
2990         }
2991
2992         if (tso)
2993                 tx_flags |= IGB_TX_FLAGS_TSO;
2994         else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags))
2995                         if (skb->ip_summed == CHECKSUM_PARTIAL)
2996                                 tx_flags |= IGB_TX_FLAGS_CSUM;
2997
2998         igb_tx_queue_adv(adapter, tx_ring, tx_flags,
2999                          igb_tx_map_adv(adapter, tx_ring, skb),
3000                          skb->len, hdr_len);
3001
3002         netdev->trans_start = jiffies;
3003
3004         /* Make sure there is space in the ring for the next send. */
3005         igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4);
3006
3007         return NETDEV_TX_OK;
3008 }
3009
3010 static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev)
3011 {
3012         struct igb_adapter *adapter = netdev_priv(netdev);
3013         struct igb_ring *tx_ring;
3014
3015         int r_idx = 0;
3016         r_idx = skb->queue_mapping & (IGB_MAX_TX_QUEUES - 1);
3017         tx_ring = adapter->multi_tx_table[r_idx];
3018
3019         /* This goes back to the question of how to logically map a tx queue
3020          * to a flow.  Right now, performance is impacted slightly negatively
3021          * if using multiple tx queues.  If the stack breaks away from a
3022          * single qdisc implementation, we can look at this again. */
3023         return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring));
3024 }
3025
3026 /**
3027  * igb_tx_timeout - Respond to a Tx Hang
3028  * @netdev: network interface device structure
3029  **/
3030 static void igb_tx_timeout(struct net_device *netdev)
3031 {
3032         struct igb_adapter *adapter = netdev_priv(netdev);
3033         struct e1000_hw *hw = &adapter->hw;
3034
3035         /* Do the reset outside of interrupt context */
3036         adapter->tx_timeout_count++;
3037         schedule_work(&adapter->reset_task);
3038         wr32(E1000_EICS, adapter->eims_enable_mask &
3039                 ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER));
3040 }
3041
3042 static void igb_reset_task(struct work_struct *work)
3043 {
3044         struct igb_adapter *adapter;
3045         adapter = container_of(work, struct igb_adapter, reset_task);
3046
3047         igb_reinit_locked(adapter);
3048 }
3049
3050 /**
3051  * igb_get_stats - Get System Network Statistics
3052  * @netdev: network interface device structure
3053  *
3054  * Returns the address of the device statistics structure.
3055  * The statistics are actually updated from the timer callback.
3056  **/
3057 static struct net_device_stats *
3058 igb_get_stats(struct net_device *netdev)
3059 {
3060         struct igb_adapter *adapter = netdev_priv(netdev);
3061
3062         /* only return the current stats */
3063         return &adapter->net_stats;
3064 }
3065
3066 /**
3067  * igb_change_mtu - Change the Maximum Transfer Unit
3068  * @netdev: network interface device structure
3069  * @new_mtu: new value for maximum frame size
3070  *
3071  * Returns 0 on success, negative on failure
3072  **/
3073 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
3074 {
3075         struct igb_adapter *adapter = netdev_priv(netdev);
3076         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3077
3078         if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
3079             (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3080                 dev_err(&adapter->pdev->dev, "Invalid MTU setting\n");
3081                 return -EINVAL;
3082         }
3083
3084 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3085         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3086                 dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n");
3087                 return -EINVAL;
3088         }
3089
3090         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
3091                 msleep(1);
3092         /* igb_down has a dependency on max_frame_size */
3093         adapter->max_frame_size = max_frame;
3094         if (netif_running(netdev))
3095                 igb_down(adapter);
3096
3097         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3098          * means we reserve 2 more, this pushes us to allocate from the next
3099          * larger slab size.
3100          * i.e. RXBUFFER_2048 --> size-4096 slab
3101          */
3102
3103         if (max_frame <= IGB_RXBUFFER_256)
3104                 adapter->rx_buffer_len = IGB_RXBUFFER_256;
3105         else if (max_frame <= IGB_RXBUFFER_512)
3106                 adapter->rx_buffer_len = IGB_RXBUFFER_512;
3107         else if (max_frame <= IGB_RXBUFFER_1024)
3108                 adapter->rx_buffer_len = IGB_RXBUFFER_1024;
3109         else if (max_frame <= IGB_RXBUFFER_2048)
3110                 adapter->rx_buffer_len = IGB_RXBUFFER_2048;
3111         else
3112 #if (PAGE_SIZE / 2) > IGB_RXBUFFER_16384
3113                 adapter->rx_buffer_len = IGB_RXBUFFER_16384;
3114 #else
3115                 adapter->rx_buffer_len = PAGE_SIZE / 2;
3116 #endif
3117         /* adjust allocation if LPE protects us, and we aren't using SBP */
3118         if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3119              (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE))
3120                 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3121
3122         dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n",
3123                  netdev->mtu, new_mtu);
3124         netdev->mtu = new_mtu;
3125
3126         if (netif_running(netdev))
3127                 igb_up(adapter);
3128         else
3129                 igb_reset(adapter);
3130
3131         clear_bit(__IGB_RESETTING, &adapter->state);
3132
3133         return 0;
3134 }
3135
3136 /**
3137  * igb_update_stats - Update the board statistics counters
3138  * @adapter: board private structure
3139  **/
3140
3141 void igb_update_stats(struct igb_adapter *adapter)
3142 {
3143         struct e1000_hw *hw = &adapter->hw;
3144         struct pci_dev *pdev = adapter->pdev;
3145         u16 phy_tmp;
3146
3147 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3148
3149         /*
3150          * Prevent stats update while adapter is being reset, or if the pci
3151          * connection is down.
3152          */
3153         if (adapter->link_speed == 0)
3154                 return;
3155         if (pci_channel_offline(pdev))
3156                 return;
3157
3158         adapter->stats.crcerrs += rd32(E1000_CRCERRS);
3159         adapter->stats.gprc += rd32(E1000_GPRC);
3160         adapter->stats.gorc += rd32(E1000_GORCL);
3161         rd32(E1000_GORCH); /* clear GORCL */
3162         adapter->stats.bprc += rd32(E1000_BPRC);
3163         adapter->stats.mprc += rd32(E1000_MPRC);
3164         adapter->stats.roc += rd32(E1000_ROC);
3165
3166         adapter->stats.prc64 += rd32(E1000_PRC64);
3167         adapter->stats.prc127 += rd32(E1000_PRC127);
3168         adapter->stats.prc255 += rd32(E1000_PRC255);
3169         adapter->stats.prc511 += rd32(E1000_PRC511);
3170         adapter->stats.prc1023 += rd32(E1000_PRC1023);
3171         adapter->stats.prc1522 += rd32(E1000_PRC1522);
3172         adapter->stats.symerrs += rd32(E1000_SYMERRS);
3173         adapter->stats.sec += rd32(E1000_SEC);
3174
3175         adapter->stats.mpc += rd32(E1000_MPC);
3176         adapter->stats.scc += rd32(E1000_SCC);
3177         adapter->stats.ecol += rd32(E1000_ECOL);
3178         adapter->stats.mcc += rd32(E1000_MCC);
3179         adapter->stats.latecol += rd32(E1000_LATECOL);
3180         adapter->stats.dc += rd32(E1000_DC);
3181         adapter->stats.rlec += rd32(E1000_RLEC);
3182         adapter->stats.xonrxc += rd32(E1000_XONRXC);
3183         adapter->stats.xontxc += rd32(E1000_XONTXC);
3184         adapter->stats.xoffrxc += rd32(E1000_XOFFRXC);
3185         adapter->stats.xofftxc += rd32(E1000_XOFFTXC);
3186         adapter->stats.fcruc += rd32(E1000_FCRUC);
3187         adapter->stats.gptc += rd32(E1000_GPTC);
3188         adapter->stats.gotc += rd32(E1000_GOTCL);
3189         rd32(E1000_GOTCH); /* clear GOTCL */
3190         adapter->stats.rnbc += rd32(E1000_RNBC);
3191         adapter->stats.ruc += rd32(E1000_RUC);
3192         adapter->stats.rfc += rd32(E1000_RFC);
3193         adapter->stats.rjc += rd32(E1000_RJC);
3194         adapter->stats.tor += rd32(E1000_TORH);
3195         adapter->stats.tot += rd32(E1000_TOTH);
3196         adapter->stats.tpr += rd32(E1000_TPR);
3197
3198         adapter->stats.ptc64 += rd32(E1000_PTC64);
3199         adapter->stats.ptc127 += rd32(E1000_PTC127);
3200         adapter->stats.ptc255 += rd32(E1000_PTC255);
3201         adapter->stats.ptc511 += rd32(E1000_PTC511);
3202         adapter->stats.ptc1023 += rd32(E1000_PTC1023);
3203         adapter->stats.ptc1522 += rd32(E1000_PTC1522);
3204
3205         adapter->stats.mptc += rd32(E1000_MPTC);
3206         adapter->stats.bptc += rd32(E1000_BPTC);
3207
3208         /* used for adaptive IFS */
3209
3210         hw->mac.tx_packet_delta = rd32(E1000_TPT);
3211         adapter->stats.tpt += hw->mac.tx_packet_delta;
3212         hw->mac.collision_delta = rd32(E1000_COLC);
3213         adapter->stats.colc += hw->mac.collision_delta;
3214
3215         adapter->stats.algnerrc += rd32(E1000_ALGNERRC);
3216         adapter->stats.rxerrc += rd32(E1000_RXERRC);
3217         adapter->stats.tncrs += rd32(E1000_TNCRS);
3218         adapter->stats.tsctc += rd32(E1000_TSCTC);
3219         adapter->stats.tsctfc += rd32(E1000_TSCTFC);
3220
3221         adapter->stats.iac += rd32(E1000_IAC);
3222         adapter->stats.icrxoc += rd32(E1000_ICRXOC);
3223         adapter->stats.icrxptc += rd32(E1000_ICRXPTC);
3224         adapter->stats.icrxatc += rd32(E1000_ICRXATC);
3225         adapter->stats.ictxptc += rd32(E1000_ICTXPTC);
3226         adapter->stats.ictxatc += rd32(E1000_ICTXATC);
3227         adapter->stats.ictxqec += rd32(E1000_ICTXQEC);
3228         adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC);
3229         adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC);
3230
3231         /* Fill out the OS statistics structure */
3232         adapter->net_stats.multicast = adapter->stats.mprc;
3233         adapter->net_stats.collisions = adapter->stats.colc;
3234
3235         /* Rx Errors */
3236
3237         /* RLEC on some newer hardware can be incorrect so build
3238         * our own version based on RUC and ROC */
3239         adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3240                 adapter->stats.crcerrs + adapter->stats.algnerrc +
3241                 adapter->stats.ruc + adapter->stats.roc +
3242                 adapter->stats.cexterr;
3243         adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3244                                               adapter->stats.roc;
3245         adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3246         adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3247         adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3248
3249         /* Tx Errors */
3250         adapter->net_stats.tx_errors = adapter->stats.ecol +
3251                                        adapter->stats.latecol;
3252         adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3253         adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3254         adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3255
3256         /* Tx Dropped needs to be maintained elsewhere */
3257
3258         /* Phy Stats */
3259         if (hw->phy.media_type == e1000_media_type_copper) {
3260                 if ((adapter->link_speed == SPEED_1000) &&
3261                    (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS,
3262                                               &phy_tmp))) {
3263                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3264                         adapter->phy_stats.idle_errors += phy_tmp;
3265                 }
3266         }
3267
3268         /* Management Stats */
3269         adapter->stats.mgptc += rd32(E1000_MGTPTC);
3270         adapter->stats.mgprc += rd32(E1000_MGTPRC);
3271         adapter->stats.mgpdc += rd32(E1000_MGTPDC);
3272 }
3273
3274
3275 static irqreturn_t igb_msix_other(int irq, void *data)
3276 {
3277         struct net_device *netdev = data;
3278         struct igb_adapter *adapter = netdev_priv(netdev);
3279         struct e1000_hw *hw = &adapter->hw;
3280         u32 icr = rd32(E1000_ICR);
3281
3282         /* reading ICR causes bit 31 of EICR to be cleared */
3283         if (!(icr & E1000_ICR_LSC))
3284                 goto no_link_interrupt;
3285         hw->mac.get_link_status = 1;
3286         /* guard against interrupt when we're going down */
3287         if (!test_bit(__IGB_DOWN, &adapter->state))
3288                 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3289
3290 no_link_interrupt:
3291         wr32(E1000_IMS, E1000_IMS_LSC);
3292         wr32(E1000_EIMS, adapter->eims_other);
3293
3294         return IRQ_HANDLED;
3295 }
3296
3297 static irqreturn_t igb_msix_tx(int irq, void *data)
3298 {
3299         struct igb_ring *tx_ring = data;
3300         struct igb_adapter *adapter = tx_ring->adapter;
3301         struct e1000_hw *hw = &adapter->hw;
3302
3303 #ifdef CONFIG_IGB_DCA
3304         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3305                 igb_update_tx_dca(tx_ring);
3306 #endif
3307         tx_ring->total_bytes = 0;
3308         tx_ring->total_packets = 0;
3309
3310         /* auto mask will automatically reenable the interrupt when we write
3311          * EICS */
3312         if (!igb_clean_tx_irq(tx_ring))
3313                 /* Ring was not completely cleaned, so fire another interrupt */
3314                 wr32(E1000_EICS, tx_ring->eims_value);
3315         else
3316                 wr32(E1000_EIMS, tx_ring->eims_value);
3317
3318         return IRQ_HANDLED;
3319 }
3320
3321 static void igb_write_itr(struct igb_ring *ring)
3322 {
3323         struct e1000_hw *hw = &ring->adapter->hw;
3324         if ((ring->adapter->itr_setting & 3) && ring->set_itr) {
3325                 switch (hw->mac.type) {
3326                 case e1000_82576:
3327                         wr32(ring->itr_register,
3328                              ring->itr_val |
3329                              0x80000000);
3330                         break;
3331                 default:
3332                         wr32(ring->itr_register,
3333                              ring->itr_val |
3334                              (ring->itr_val << 16));
3335                         break;
3336                 }
3337                 ring->set_itr = 0;
3338         }
3339 }
3340
3341 static irqreturn_t igb_msix_rx(int irq, void *data)
3342 {
3343         struct igb_ring *rx_ring = data;
3344         struct igb_adapter *adapter = rx_ring->adapter;
3345
3346         /* Write the ITR value calculated at the end of the
3347          * previous interrupt.
3348          */
3349
3350         igb_write_itr(rx_ring);
3351
3352         if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi))
3353                 __netif_rx_schedule(adapter->netdev, &rx_ring->napi);
3354
3355 #ifdef CONFIG_IGB_DCA
3356         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3357                 igb_update_rx_dca(rx_ring);
3358 #endif
3359                 return IRQ_HANDLED;
3360 }
3361
3362 #ifdef CONFIG_IGB_DCA
3363 static void igb_update_rx_dca(struct igb_ring *rx_ring)
3364 {
3365         u32 dca_rxctrl;
3366         struct igb_adapter *adapter = rx_ring->adapter;
3367         struct e1000_hw *hw = &adapter->hw;
3368         int cpu = get_cpu();
3369         int q = rx_ring - adapter->rx_ring;
3370
3371         if (rx_ring->cpu != cpu) {
3372                 dca_rxctrl = rd32(E1000_DCA_RXCTRL(q));
3373                 if (hw->mac.type == e1000_82576) {
3374                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK_82576;
3375                         dca_rxctrl |= dca_get_tag(cpu) <<
3376                                       E1000_DCA_RXCTRL_CPUID_SHIFT;
3377                 } else {
3378                         dca_rxctrl &= ~E1000_DCA_RXCTRL_CPUID_MASK;
3379                         dca_rxctrl |= dca_get_tag(cpu);
3380                 }
3381                 dca_rxctrl |= E1000_DCA_RXCTRL_DESC_DCA_EN;
3382                 dca_rxctrl |= E1000_DCA_RXCTRL_HEAD_DCA_EN;
3383                 dca_rxctrl |= E1000_DCA_RXCTRL_DATA_DCA_EN;
3384                 wr32(E1000_DCA_RXCTRL(q), dca_rxctrl);
3385                 rx_ring->cpu = cpu;
3386         }
3387         put_cpu();
3388 }
3389
3390 static void igb_update_tx_dca(struct igb_ring *tx_ring)
3391 {
3392         u32 dca_txctrl;
3393         struct igb_adapter *adapter = tx_ring->adapter;
3394         struct e1000_hw *hw = &adapter->hw;
3395         int cpu = get_cpu();
3396         int q = tx_ring - adapter->tx_ring;
3397
3398         if (tx_ring->cpu != cpu) {
3399                 dca_txctrl = rd32(E1000_DCA_TXCTRL(q));
3400                 if (hw->mac.type == e1000_82576) {
3401                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK_82576;
3402                         dca_txctrl |= dca_get_tag(cpu) <<
3403                                       E1000_DCA_TXCTRL_CPUID_SHIFT;
3404                 } else {
3405                         dca_txctrl &= ~E1000_DCA_TXCTRL_CPUID_MASK;
3406                         dca_txctrl |= dca_get_tag(cpu);
3407                 }
3408                 dca_txctrl |= E1000_DCA_TXCTRL_DESC_DCA_EN;
3409                 wr32(E1000_DCA_TXCTRL(q), dca_txctrl);
3410                 tx_ring->cpu = cpu;
3411         }
3412         put_cpu();
3413 }
3414
3415 static void igb_setup_dca(struct igb_adapter *adapter)
3416 {
3417         int i;
3418
3419         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
3420                 return;
3421
3422         for (i = 0; i < adapter->num_tx_queues; i++) {
3423                 adapter->tx_ring[i].cpu = -1;
3424                 igb_update_tx_dca(&adapter->tx_ring[i]);
3425         }
3426         for (i = 0; i < adapter->num_rx_queues; i++) {
3427                 adapter->rx_ring[i].cpu = -1;
3428                 igb_update_rx_dca(&adapter->rx_ring[i]);
3429         }
3430 }
3431
3432 static int __igb_notify_dca(struct device *dev, void *data)
3433 {
3434         struct net_device *netdev = dev_get_drvdata(dev);
3435         struct igb_adapter *adapter = netdev_priv(netdev);
3436         struct e1000_hw *hw = &adapter->hw;
3437         unsigned long event = *(unsigned long *)data;
3438
3439         if (!(adapter->flags & IGB_FLAG_HAS_DCA))
3440                 goto out;
3441
3442         switch (event) {
3443         case DCA_PROVIDER_ADD:
3444                 /* if already enabled, don't do it again */
3445                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3446                         break;
3447                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
3448                 /* Always use CB2 mode, difference is masked
3449                  * in the CB driver. */
3450                 wr32(E1000_DCA_CTRL, 2);
3451                 if (dca_add_requester(dev) == 0) {
3452                         dev_info(&adapter->pdev->dev, "DCA enabled\n");
3453                         igb_setup_dca(adapter);
3454                         break;
3455                 }
3456                 /* Fall Through since DCA is disabled. */
3457         case DCA_PROVIDER_REMOVE:
3458                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3459                         /* without this a class_device is left
3460                          * hanging around in the sysfs model */
3461                         dca_remove_requester(dev);
3462                         dev_info(&adapter->pdev->dev, "DCA disabled\n");
3463                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3464                         wr32(E1000_DCA_CTRL, 1);
3465                 }
3466                 break;
3467         }
3468 out:
3469         return 0;
3470 }
3471
3472 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
3473                           void *p)
3474 {
3475         int ret_val;
3476
3477         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
3478                                          __igb_notify_dca);
3479
3480         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
3481 }
3482 #endif /* CONFIG_IGB_DCA */
3483
3484 /**
3485  * igb_intr_msi - Interrupt Handler
3486  * @irq: interrupt number
3487  * @data: pointer to a network interface device structure
3488  **/
3489 static irqreturn_t igb_intr_msi(int irq, void *data)
3490 {
3491         struct net_device *netdev = data;
3492         struct igb_adapter *adapter = netdev_priv(netdev);
3493         struct e1000_hw *hw = &adapter->hw;
3494         /* read ICR disables interrupts using IAM */
3495         u32 icr = rd32(E1000_ICR);
3496
3497         igb_write_itr(adapter->rx_ring);
3498
3499         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3500                 hw->mac.get_link_status = 1;
3501                 if (!test_bit(__IGB_DOWN, &adapter->state))
3502                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3503         }
3504
3505         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3506
3507         return IRQ_HANDLED;
3508 }
3509
3510 /**
3511  * igb_intr - Interrupt Handler
3512  * @irq: interrupt number
3513  * @data: pointer to a network interface device structure
3514  **/
3515 static irqreturn_t igb_intr(int irq, void *data)
3516 {
3517         struct net_device *netdev = data;
3518         struct igb_adapter *adapter = netdev_priv(netdev);
3519         struct e1000_hw *hw = &adapter->hw;
3520         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
3521          * need for the IMC write */
3522         u32 icr = rd32(E1000_ICR);
3523         u32 eicr = 0;
3524         if (!icr)
3525                 return IRQ_NONE;  /* Not our interrupt */
3526
3527         igb_write_itr(adapter->rx_ring);
3528
3529         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3530          * not set, then the adapter didn't send an interrupt */
3531         if (!(icr & E1000_ICR_INT_ASSERTED))
3532                 return IRQ_NONE;
3533
3534         eicr = rd32(E1000_EICR);
3535
3536         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3537                 hw->mac.get_link_status = 1;
3538                 /* guard against interrupt when we're going down */
3539                 if (!test_bit(__IGB_DOWN, &adapter->state))
3540                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
3541         }
3542
3543         netif_rx_schedule(netdev, &adapter->rx_ring[0].napi);
3544
3545         return IRQ_HANDLED;
3546 }
3547
3548 /**
3549  * igb_poll - NAPI Rx polling callback
3550  * @napi: napi polling structure
3551  * @budget: count of how many packets we should handle
3552  **/
3553 static int igb_poll(struct napi_struct *napi, int budget)
3554 {
3555         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3556         struct igb_adapter *adapter = rx_ring->adapter;
3557         struct net_device *netdev = adapter->netdev;
3558         int tx_clean_complete, work_done = 0;
3559
3560         /* this poll routine only supports one tx and one rx queue */
3561 #ifdef CONFIG_IGB_DCA
3562         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3563                 igb_update_tx_dca(&adapter->tx_ring[0]);
3564 #endif
3565         tx_clean_complete = igb_clean_tx_irq(&adapter->tx_ring[0]);
3566
3567 #ifdef CONFIG_IGB_DCA
3568         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3569                 igb_update_rx_dca(&adapter->rx_ring[0]);
3570 #endif
3571         igb_clean_rx_irq_adv(&adapter->rx_ring[0], &work_done, budget);
3572
3573         /* If no Tx and not enough Rx work done, exit the polling mode */
3574         if ((tx_clean_complete && (work_done < budget)) ||
3575             !netif_running(netdev)) {
3576                 if (adapter->itr_setting & 3)
3577                         igb_set_itr(adapter);
3578                 netif_rx_complete(netdev, napi);
3579                 if (!test_bit(__IGB_DOWN, &adapter->state))
3580                         igb_irq_enable(adapter);
3581                 return 0;
3582         }
3583
3584         return 1;
3585 }
3586
3587 static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget)
3588 {
3589         struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi);
3590         struct igb_adapter *adapter = rx_ring->adapter;
3591         struct e1000_hw *hw = &adapter->hw;
3592         struct net_device *netdev = adapter->netdev;
3593         int work_done = 0;
3594
3595 #ifdef CONFIG_IGB_DCA
3596         if (adapter->flags & IGB_FLAG_DCA_ENABLED)
3597                 igb_update_rx_dca(rx_ring);
3598 #endif
3599         igb_clean_rx_irq_adv(rx_ring, &work_done, budget);
3600
3601
3602         /* If not enough Rx work done, exit the polling mode */
3603         if ((work_done == 0) || !netif_running(netdev)) {
3604                 netif_rx_complete(netdev, napi);
3605
3606                 if (adapter->itr_setting & 3) {
3607                         if (adapter->num_rx_queues == 1)
3608                                 igb_set_itr(adapter);
3609                         else
3610                                 igb_update_ring_itr(rx_ring);
3611                 }
3612
3613                 if (!test_bit(__IGB_DOWN, &adapter->state))
3614                         wr32(E1000_EIMS, rx_ring->eims_value);
3615
3616                 return 0;
3617         }
3618
3619         return 1;
3620 }
3621
3622 static inline u32 get_head(struct igb_ring *tx_ring)
3623 {
3624         void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count;
3625         return le32_to_cpu(*(volatile __le32 *)end);
3626 }
3627
3628 /**
3629  * igb_clean_tx_irq - Reclaim resources after transmit completes
3630  * @adapter: board private structure
3631  * returns true if ring is completely cleaned
3632  **/
3633 static bool igb_clean_tx_irq(struct igb_ring *tx_ring)
3634 {
3635         struct igb_adapter *adapter = tx_ring->adapter;
3636         struct e1000_hw *hw = &adapter->hw;
3637         struct net_device *netdev = adapter->netdev;
3638         struct e1000_tx_desc *tx_desc;
3639         struct igb_buffer *buffer_info;
3640         struct sk_buff *skb;
3641         unsigned int i;
3642         u32 head, oldhead;
3643         unsigned int count = 0;
3644         unsigned int total_bytes = 0, total_packets = 0;
3645         bool retval = true;
3646
3647         rmb();
3648         head = get_head(tx_ring);
3649         i = tx_ring->next_to_clean;
3650         while (1) {
3651                 while (i != head) {
3652                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3653                         buffer_info = &tx_ring->buffer_info[i];
3654                         skb = buffer_info->skb;
3655
3656                         if (skb) {
3657                                 unsigned int segs, bytecount;
3658                                 /* gso_segs is currently only valid for tcp */
3659                                 segs = skb_shinfo(skb)->gso_segs ?: 1;
3660                                 /* multiply data chunks by size of headers */
3661                                 bytecount = ((segs - 1) * skb_headlen(skb)) +
3662                                             skb->len;
3663                                 total_packets += segs;
3664                                 total_bytes += bytecount;
3665                         }
3666
3667                         igb_unmap_and_free_tx_resource(adapter, buffer_info);
3668
3669                         i++;
3670                         if (i == tx_ring->count)
3671                                 i = 0;
3672
3673                         count++;
3674                         if (count == IGB_MAX_TX_CLEAN) {
3675                                 retval = false;
3676                                 goto done_cleaning;
3677                         }
3678                 }
3679                 oldhead = head;
3680                 rmb();
3681                 head = get_head(tx_ring);
3682                 if (head == oldhead)
3683                         goto done_cleaning;
3684         }  /* while (1) */
3685
3686 done_cleaning:
3687         tx_ring->next_to_clean = i;
3688
3689         if (unlikely(count &&
3690                      netif_carrier_ok(netdev) &&
3691                      IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) {
3692                 /* Make sure that anybody stopping the queue after this
3693                  * sees the new next_to_clean.
3694                  */
3695                 smp_mb();
3696                 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
3697                     !(test_bit(__IGB_DOWN, &adapter->state))) {
3698                         netif_wake_subqueue(netdev, tx_ring->queue_index);
3699                         ++adapter->restart_queue;
3700                 }
3701         }
3702
3703         if (tx_ring->detect_tx_hung) {
3704                 /* Detect a transmit hang in hardware, this serializes the
3705                  * check with the clearing of time_stamp and movement of i */
3706                 tx_ring->detect_tx_hung = false;
3707                 if (tx_ring->buffer_info[i].time_stamp &&
3708                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3709                                (adapter->tx_timeout_factor * HZ))
3710                     && !(rd32(E1000_STATUS) &
3711                          E1000_STATUS_TXOFF)) {
3712
3713                         tx_desc = E1000_TX_DESC(*tx_ring, i);
3714                         /* detected Tx unit hang */
3715                         dev_err(&adapter->pdev->dev,
3716                                 "Detected Tx Unit Hang\n"
3717                                 "  Tx Queue             <%d>\n"
3718                                 "  TDH                  <%x>\n"
3719                                 "  TDT                  <%x>\n"
3720                                 "  next_to_use          <%x>\n"
3721                                 "  next_to_clean        <%x>\n"
3722                                 "  head (WB)            <%x>\n"
3723                                 "buffer_info[next_to_clean]\n"
3724                                 "  time_stamp           <%lx>\n"
3725                                 "  jiffies              <%lx>\n"
3726                                 "  desc.status          <%x>\n",
3727                                 tx_ring->queue_index,
3728                                 readl(adapter->hw.hw_addr + tx_ring->head),
3729                                 readl(adapter->hw.hw_addr + tx_ring->tail),
3730                                 tx_ring->next_to_use,
3731                                 tx_ring->next_to_clean,
3732                                 head,
3733                                 tx_ring->buffer_info[i].time_stamp,
3734                                 jiffies,
3735                                 tx_desc->upper.fields.status);
3736                         netif_stop_subqueue(netdev, tx_ring->queue_index);
3737                 }
3738         }
3739         tx_ring->total_bytes += total_bytes;
3740         tx_ring->total_packets += total_packets;
3741         tx_ring->tx_stats.bytes += total_bytes;
3742         tx_ring->tx_stats.packets += total_packets;
3743         adapter->net_stats.tx_bytes += total_bytes;
3744         adapter->net_stats.tx_packets += total_packets;
3745         return retval;
3746 }
3747
3748 #ifdef CONFIG_IGB_LRO
3749  /**
3750  * igb_get_skb_hdr - helper function for LRO header processing
3751  * @skb: pointer to sk_buff to be added to LRO packet
3752  * @iphdr: pointer to ip header structure
3753  * @tcph: pointer to tcp header structure
3754  * @hdr_flags: pointer to header flags
3755  * @priv: pointer to the receive descriptor for the current sk_buff
3756  **/
3757 static int igb_get_skb_hdr(struct sk_buff *skb, void **iphdr, void **tcph,
3758                            u64 *hdr_flags, void *priv)
3759 {
3760         union e1000_adv_rx_desc *rx_desc = priv;
3761         u16 pkt_type = rx_desc->wb.lower.lo_dword.pkt_info &
3762                        (E1000_RXDADV_PKTTYPE_IPV4 | E1000_RXDADV_PKTTYPE_TCP);
3763
3764         /* Verify that this is a valid IPv4 TCP packet */
3765         if (pkt_type != (E1000_RXDADV_PKTTYPE_IPV4 |
3766                           E1000_RXDADV_PKTTYPE_TCP))
3767                 return -1;
3768
3769         /* Set network headers */
3770         skb_reset_network_header(skb);
3771         skb_set_transport_header(skb, ip_hdrlen(skb));
3772         *iphdr = ip_hdr(skb);
3773         *tcph = tcp_hdr(skb);
3774         *hdr_flags = LRO_IPV4 | LRO_TCP;
3775
3776         return 0;
3777
3778 }
3779 #endif /* CONFIG_IGB_LRO */
3780
3781 /**
3782  * igb_receive_skb - helper function to handle rx indications
3783  * @ring: pointer to receive ring receving this packet
3784  * @status: descriptor status field as written by hardware
3785  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3786  * @skb: pointer to sk_buff to be indicated to stack
3787  **/
3788 static void igb_receive_skb(struct igb_ring *ring, u8 status,
3789                             union e1000_adv_rx_desc * rx_desc,
3790                             struct sk_buff *skb)
3791 {
3792         struct igb_adapter * adapter = ring->adapter;
3793         bool vlan_extracted = (adapter->vlgrp && (status & E1000_RXD_STAT_VP));
3794
3795 #ifdef CONFIG_IGB_LRO
3796         if (adapter->netdev->features & NETIF_F_LRO &&
3797             skb->ip_summed == CHECKSUM_UNNECESSARY) {
3798                 if (vlan_extracted)
3799                         lro_vlan_hwaccel_receive_skb(&ring->lro_mgr, skb,
3800                                            adapter->vlgrp,
3801                                            le16_to_cpu(rx_desc->wb.upper.vlan),
3802                                            rx_desc);
3803                 else
3804                         lro_receive_skb(&ring->lro_mgr,skb, rx_desc);
3805                 ring->lro_used = 1;
3806         } else {
3807 #endif
3808                 if (vlan_extracted)
3809                         vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3810                                           le16_to_cpu(rx_desc->wb.upper.vlan));
3811                 else
3812
3813                         netif_receive_skb(skb);
3814 #ifdef CONFIG_IGB_LRO
3815         }
3816 #endif
3817 }
3818
3819
3820 static inline void igb_rx_checksum_adv(struct igb_adapter *adapter,
3821                                        u32 status_err, struct sk_buff *skb)
3822 {
3823         skb->ip_summed = CHECKSUM_NONE;
3824
3825         /* Ignore Checksum bit is set or checksum is disabled through ethtool */
3826         if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum)
3827                 return;
3828         /* TCP/UDP checksum error bit is set */
3829         if (status_err &
3830             (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) {
3831                 /* let the stack verify checksum errors */
3832                 adapter->hw_csum_err++;
3833                 return;
3834         }
3835         /* It must be a TCP or UDP packet with a valid checksum */
3836         if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS))
3837                 skb->ip_summed = CHECKSUM_UNNECESSARY;
3838
3839         adapter->hw_csum_good++;
3840 }
3841
3842 static bool igb_clean_rx_irq_adv(struct igb_ring *rx_ring,
3843                                  int *work_done, int budget)
3844 {
3845         struct igb_adapter *adapter = rx_ring->adapter;
3846         struct net_device *netdev = adapter->netdev;
3847         struct pci_dev *pdev = adapter->pdev;
3848         union e1000_adv_rx_desc *rx_desc , *next_rxd;
3849         struct igb_buffer *buffer_info , *next_buffer;
3850         struct sk_buff *skb;
3851         unsigned int i;
3852         u32 length, hlen, staterr;
3853         bool cleaned = false;
3854         int cleaned_count = 0;
3855         unsigned int total_bytes = 0, total_packets = 0;
3856
3857         i = rx_ring->next_to_clean;
3858         rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
3859         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3860
3861         while (staterr & E1000_RXD_STAT_DD) {
3862                 if (*work_done >= budget)
3863                         break;
3864                 (*work_done)++;
3865                 buffer_info = &rx_ring->buffer_info[i];
3866
3867                 /* HW will not DMA in data larger than the given buffer, even
3868                  * if it parses the (NFS, of course) header to be larger.  In
3869                  * that case, it fills the header buffer and spills the rest
3870                  * into the page.
3871                  */
3872                 hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) &
3873                   E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT;
3874                 if (hlen > adapter->rx_ps_hdr_size)
3875                         hlen = adapter->rx_ps_hdr_size;
3876
3877                 length = le16_to_cpu(rx_desc->wb.upper.length);
3878                 cleaned = true;
3879                 cleaned_count++;
3880
3881                 skb = buffer_info->skb;
3882                 prefetch(skb->data - NET_IP_ALIGN);
3883                 buffer_info->skb = NULL;
3884                 if (!adapter->rx_ps_hdr_size) {
3885                         pci_unmap_single(pdev, buffer_info->dma,
3886                                          adapter->rx_buffer_len +
3887                                            NET_IP_ALIGN,
3888                                          PCI_DMA_FROMDEVICE);
3889                         skb_put(skb, length);
3890                         goto send_up;
3891                 }
3892
3893                 if (!skb_shinfo(skb)->nr_frags) {
3894                         pci_unmap_single(pdev, buffer_info->dma,
3895                                          adapter->rx_ps_hdr_size +
3896                                            NET_IP_ALIGN,
3897                                          PCI_DMA_FROMDEVICE);
3898                         skb_put(skb, hlen);
3899                 }
3900
3901                 if (length) {
3902                         pci_unmap_page(pdev, buffer_info->page_dma,
3903                                        PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
3904                         buffer_info->page_dma = 0;
3905
3906                         skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
3907                                                 buffer_info->page,
3908                                                 buffer_info->page_offset,
3909                                                 length);
3910
3911                         if ((adapter->rx_buffer_len > (PAGE_SIZE / 2)) ||
3912                             (page_count(buffer_info->page) != 1))
3913                                 buffer_info->page = NULL;
3914                         else
3915                                 get_page(buffer_info->page);
3916
3917                         skb->len += length;
3918                         skb->data_len += length;
3919
3920                         skb->truesize += length;
3921                 }
3922 send_up:
3923                 i++;
3924                 if (i == rx_ring->count)
3925                         i = 0;
3926                 next_rxd = E1000_RX_DESC_ADV(*rx_ring, i);
3927                 prefetch(next_rxd);
3928                 next_buffer = &rx_ring->buffer_info[i];
3929
3930                 if (!(staterr & E1000_RXD_STAT_EOP)) {
3931                         buffer_info->skb = next_buffer->skb;
3932                         buffer_info->dma = next_buffer->dma;
3933                         next_buffer->skb = skb;
3934                         next_buffer->dma = 0;
3935                         goto next_desc;
3936                 }
3937
3938                 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
3939                         dev_kfree_skb_irq(skb);
3940                         goto next_desc;
3941                 }
3942
3943                 total_bytes += skb->len;
3944                 total_packets++;
3945
3946                 igb_rx_checksum_adv(adapter, staterr, skb);
3947
3948                 skb->protocol = eth_type_trans(skb, netdev);
3949
3950                 igb_receive_skb(rx_ring, staterr, rx_desc, skb);
3951
3952 next_desc:
3953                 rx_desc->wb.upper.status_error = 0;
3954
3955                 /* return some buffers to hardware, one at a time is too slow */
3956                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
3957                         igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3958                         cleaned_count = 0;
3959                 }
3960
3961                 /* use prefetched values */
3962                 rx_desc = next_rxd;
3963                 buffer_info = next_buffer;
3964
3965                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
3966         }
3967
3968         rx_ring->next_to_clean = i;
3969         cleaned_count = IGB_DESC_UNUSED(rx_ring);
3970
3971 #ifdef CONFIG_IGB_LRO
3972         if (rx_ring->lro_used) {
3973                 lro_flush_all(&rx_ring->lro_mgr);
3974                 rx_ring->lro_used = 0;
3975         }
3976 #endif
3977
3978         if (cleaned_count)
3979                 igb_alloc_rx_buffers_adv(rx_ring, cleaned_count);
3980
3981         rx_ring->total_packets += total_packets;
3982         rx_ring->total_bytes += total_bytes;
3983         rx_ring->rx_stats.packets += total_packets;
3984         rx_ring->rx_stats.bytes += total_bytes;
3985         adapter->net_stats.rx_bytes += total_bytes;
3986         adapter->net_stats.rx_packets += total_packets;
3987         return cleaned;
3988 }
3989
3990
3991 /**
3992  * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split
3993  * @adapter: address of board private structure
3994  **/
3995 static void igb_alloc_rx_buffers_adv(struct igb_ring *rx_ring,
3996                                      int cleaned_count)
3997 {
3998         struct igb_adapter *adapter = rx_ring->adapter;
3999         struct net_device *netdev = adapter->netdev;
4000         struct pci_dev *pdev = adapter->pdev;
4001         union e1000_adv_rx_desc *rx_desc;
4002         struct igb_buffer *buffer_info;
4003         struct sk_buff *skb;
4004         unsigned int i;
4005
4006         i = rx_ring->next_to_use;
4007         buffer_info = &rx_ring->buffer_info[i];
4008
4009         while (cleaned_count--) {
4010                 rx_desc = E1000_RX_DESC_ADV(*rx_ring, i);
4011
4012                 if (adapter->rx_ps_hdr_size && !buffer_info->page_dma) {
4013                         if (!buffer_info->page) {
4014                                 buffer_info->page = alloc_page(GFP_ATOMIC);
4015                                 if (!buffer_info->page) {
4016                                         adapter->alloc_rx_buff_failed++;
4017                                         goto no_buffers;
4018                                 }
4019                                 buffer_info->page_offset = 0;
4020                         } else {
4021                                 buffer_info->page_offset ^= PAGE_SIZE / 2;
4022                         }
4023                         buffer_info->page_dma =
4024                                 pci_map_page(pdev,
4025                                              buffer_info->page,
4026                                              buffer_info->page_offset,
4027                                              PAGE_SIZE / 2,
4028                                              PCI_DMA_FROMDEVICE);
4029                 }
4030
4031                 if (!buffer_info->skb) {
4032                         int bufsz;
4033
4034                         if (adapter->rx_ps_hdr_size)
4035                                 bufsz = adapter->rx_ps_hdr_size;
4036                         else
4037                                 bufsz = adapter->rx_buffer_len;
4038                         bufsz += NET_IP_ALIGN;
4039                         skb = netdev_alloc_skb(netdev, bufsz);
4040
4041                         if (!skb) {
4042                                 adapter->alloc_rx_buff_failed++;
4043                                 goto no_buffers;
4044                         }
4045
4046                         /* Make buffer alignment 2 beyond a 16 byte boundary
4047                          * this will result in a 16 byte aligned IP header after
4048                          * the 14 byte MAC header is removed
4049                          */
4050                         skb_reserve(skb, NET_IP_ALIGN);
4051
4052                         buffer_info->skb = skb;
4053                         buffer_info->dma = pci_map_single(pdev, skb->data,
4054                                                           bufsz,
4055                                                           PCI_DMA_FROMDEVICE);
4056
4057                 }
4058                 /* Refresh the desc even if buffer_addrs didn't change because
4059                  * each write-back erases this info. */
4060                 if (adapter->rx_ps_hdr_size) {
4061                         rx_desc->read.pkt_addr =
4062                              cpu_to_le64(buffer_info->page_dma);
4063                         rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma);
4064                 } else {
4065                         rx_desc->read.pkt_addr =
4066                              cpu_to_le64(buffer_info->dma);
4067                         rx_desc->read.hdr_addr = 0;
4068                 }
4069
4070                 i++;
4071                 if (i == rx_ring->count)
4072                         i = 0;
4073                 buffer_info = &rx_ring->buffer_info[i];
4074         }
4075
4076 no_buffers:
4077         if (rx_ring->next_to_use != i) {
4078                 rx_ring->next_to_use = i;
4079                 if (i == 0)
4080                         i = (rx_ring->count - 1);
4081                 else
4082                         i--;
4083
4084                 /* Force memory writes to complete before letting h/w
4085                  * know there are new descriptors to fetch.  (Only
4086                  * applicable for weak-ordered memory model archs,
4087                  * such as IA-64). */
4088                 wmb();
4089                 writel(i, adapter->hw.hw_addr + rx_ring->tail);
4090         }
4091 }
4092
4093 /**
4094  * igb_mii_ioctl -
4095  * @netdev:
4096  * @ifreq:
4097  * @cmd:
4098  **/
4099 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4100 {
4101         struct igb_adapter *adapter = netdev_priv(netdev);
4102         struct mii_ioctl_data *data = if_mii(ifr);
4103
4104         if (adapter->hw.phy.media_type != e1000_media_type_copper)
4105                 return -EOPNOTSUPP;
4106
4107         switch (cmd) {
4108         case SIOCGMIIPHY:
4109                 data->phy_id = adapter->hw.phy.addr;
4110                 break;
4111         case SIOCGMIIREG:
4112                 if (!capable(CAP_NET_ADMIN))
4113                         return -EPERM;
4114                 if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw,
4115                                                      data->reg_num
4116                                                      & 0x1F, &data->val_out))
4117                         return -EIO;
4118                 break;
4119         case SIOCSMIIREG:
4120         default:
4121                 return -EOPNOTSUPP;
4122         }
4123         return 0;
4124 }
4125
4126 /**
4127  * igb_ioctl -
4128  * @netdev:
4129  * @ifreq:
4130  * @cmd:
4131  **/
4132 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4133 {
4134         switch (cmd) {
4135         case SIOCGMIIPHY:
4136         case SIOCGMIIREG:
4137         case SIOCSMIIREG:
4138                 return igb_mii_ioctl(netdev, ifr, cmd);
4139         default:
4140                 return -EOPNOTSUPP;
4141         }
4142 }
4143
4144 static void igb_vlan_rx_register(struct net_device *netdev,
4145                                  struct vlan_group *grp)
4146 {
4147         struct igb_adapter *adapter = netdev_priv(netdev);
4148         struct e1000_hw *hw = &adapter->hw;
4149         u32 ctrl, rctl;
4150
4151         igb_irq_disable(adapter);
4152         adapter->vlgrp = grp;
4153
4154         if (grp) {
4155                 /* enable VLAN tag insert/strip */
4156                 ctrl = rd32(E1000_CTRL);
4157                 ctrl |= E1000_CTRL_VME;
4158                 wr32(E1000_CTRL, ctrl);
4159
4160                 /* enable VLAN receive filtering */
4161                 rctl = rd32(E1000_RCTL);
4162                 rctl &= ~E1000_RCTL_CFIEN;
4163                 wr32(E1000_RCTL, rctl);
4164                 igb_update_mng_vlan(adapter);
4165                 wr32(E1000_RLPML,
4166                                 adapter->max_frame_size + VLAN_TAG_SIZE);
4167         } else {
4168                 /* disable VLAN tag insert/strip */
4169                 ctrl = rd32(E1000_CTRL);
4170                 ctrl &= ~E1000_CTRL_VME;
4171                 wr32(E1000_CTRL, ctrl);
4172
4173                 if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) {
4174                         igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4175                         adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
4176                 }
4177                 wr32(E1000_RLPML,
4178                                 adapter->max_frame_size);
4179         }
4180
4181         if (!test_bit(__IGB_DOWN, &adapter->state))
4182                 igb_irq_enable(adapter);
4183 }
4184
4185 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4186 {
4187         struct igb_adapter *adapter = netdev_priv(netdev);
4188         struct e1000_hw *hw = &adapter->hw;
4189         u32 vfta, index;
4190
4191         if ((adapter->hw.mng_cookie.status &
4192              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4193             (vid == adapter->mng_vlan_id))
4194                 return;
4195         /* add VID to filter table */
4196         index = (vid >> 5) & 0x7F;
4197         vfta = array_rd32(E1000_VFTA, index);
4198         vfta |= (1 << (vid & 0x1F));
4199         igb_write_vfta(&adapter->hw, index, vfta);
4200 }
4201
4202 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4203 {
4204         struct igb_adapter *adapter = netdev_priv(netdev);
4205         struct e1000_hw *hw = &adapter->hw;
4206         u32 vfta, index;
4207
4208         igb_irq_disable(adapter);
4209         vlan_group_set_device(adapter->vlgrp, vid, NULL);
4210
4211         if (!test_bit(__IGB_DOWN, &adapter->state))
4212                 igb_irq_enable(adapter);
4213
4214         if ((adapter->hw.mng_cookie.status &
4215              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
4216             (vid == adapter->mng_vlan_id)) {
4217                 /* release control to f/w */
4218                 igb_release_hw_control(adapter);
4219                 return;
4220         }
4221
4222         /* remove VID from filter table */
4223         index = (vid >> 5) & 0x7F;
4224         vfta = array_rd32(E1000_VFTA, index);
4225         vfta &= ~(1 << (vid & 0x1F));
4226         igb_write_vfta(&adapter->hw, index, vfta);
4227 }
4228
4229 static void igb_restore_vlan(struct igb_adapter *adapter)
4230 {
4231         igb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4232
4233         if (adapter->vlgrp) {
4234                 u16 vid;
4235                 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4236                         if (!vlan_group_get_device(adapter->vlgrp, vid))
4237                                 continue;
4238                         igb_vlan_rx_add_vid(adapter->netdev, vid);
4239                 }
4240         }
4241 }
4242
4243 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
4244 {
4245         struct e1000_mac_info *mac = &adapter->hw.mac;
4246
4247         mac->autoneg = 0;
4248
4249         /* Fiber NICs only allow 1000 gbps Full duplex */
4250         if ((adapter->hw.phy.media_type == e1000_media_type_fiber) &&
4251                 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4252                 dev_err(&adapter->pdev->dev,
4253                         "Unsupported Speed/Duplex configuration\n");
4254                 return -EINVAL;
4255         }
4256
4257         switch (spddplx) {
4258         case SPEED_10 + DUPLEX_HALF:
4259                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
4260                 break;
4261         case SPEED_10 + DUPLEX_FULL:
4262                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
4263                 break;
4264         case SPEED_100 + DUPLEX_HALF:
4265                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
4266                 break;
4267         case SPEED_100 + DUPLEX_FULL:
4268                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
4269                 break;
4270         case SPEED_1000 + DUPLEX_FULL:
4271                 mac->autoneg = 1;
4272                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
4273                 break;
4274         case SPEED_1000 + DUPLEX_HALF: /* not supported */
4275         default:
4276                 dev_err(&adapter->pdev->dev,
4277                         "Unsupported Speed/Duplex configuration\n");
4278                 return -EINVAL;
4279         }
4280         return 0;
4281 }
4282
4283
4284 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
4285 {
4286         struct net_device *netdev = pci_get_drvdata(pdev);
4287         struct igb_adapter *adapter = netdev_priv(netdev);
4288         struct e1000_hw *hw = &adapter->hw;
4289         u32 ctrl, rctl, status;
4290         u32 wufc = adapter->wol;
4291 #ifdef CONFIG_PM
4292         int retval = 0;
4293 #endif
4294
4295         netif_device_detach(netdev);
4296
4297         if (netif_running(netdev))
4298                 igb_close(netdev);
4299
4300         igb_reset_interrupt_capability(adapter);
4301
4302         igb_free_queues(adapter);
4303
4304 #ifdef CONFIG_PM
4305         retval = pci_save_state(pdev);
4306         if (retval)
4307                 return retval;
4308 #endif
4309
4310         status = rd32(E1000_STATUS);
4311         if (status & E1000_STATUS_LU)
4312                 wufc &= ~E1000_WUFC_LNKC;
4313
4314         if (wufc) {
4315                 igb_setup_rctl(adapter);
4316                 igb_set_multi(netdev);
4317
4318                 /* turn on all-multi mode if wake on multicast is enabled */
4319                 if (wufc & E1000_WUFC_MC) {
4320                         rctl = rd32(E1000_RCTL);
4321                         rctl |= E1000_RCTL_MPE;
4322                         wr32(E1000_RCTL, rctl);
4323                 }
4324
4325                 ctrl = rd32(E1000_CTRL);
4326                 /* advertise wake from D3Cold */
4327                 #define E1000_CTRL_ADVD3WUC 0x00100000
4328                 /* phy power management enable */
4329                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4330                 ctrl |= E1000_CTRL_ADVD3WUC;
4331                 wr32(E1000_CTRL, ctrl);
4332
4333                 /* Allow time for pending master requests to run */
4334                 igb_disable_pcie_master(&adapter->hw);
4335
4336                 wr32(E1000_WUC, E1000_WUC_PME_EN);
4337                 wr32(E1000_WUFC, wufc);
4338         } else {
4339                 wr32(E1000_WUC, 0);
4340                 wr32(E1000_WUFC, 0);
4341         }
4342
4343         /* make sure adapter isn't asleep if manageability/wol is enabled */
4344         if (wufc || adapter->en_mng_pt) {
4345                 pci_enable_wake(pdev, PCI_D3hot, 1);
4346                 pci_enable_wake(pdev, PCI_D3cold, 1);
4347         } else {
4348                 igb_shutdown_fiber_serdes_link_82575(hw);
4349                 pci_enable_wake(pdev, PCI_D3hot, 0);
4350                 pci_enable_wake(pdev, PCI_D3cold, 0);
4351         }
4352
4353         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
4354          * would have already happened in close and is redundant. */
4355         igb_release_hw_control(adapter);
4356
4357         pci_disable_device(pdev);
4358
4359         pci_set_power_state(pdev, pci_choose_state(pdev, state));
4360
4361         return 0;
4362 }
4363
4364 #ifdef CONFIG_PM
4365 static int igb_resume(struct pci_dev *pdev)
4366 {
4367         struct net_device *netdev = pci_get_drvdata(pdev);
4368         struct igb_adapter *adapter = netdev_priv(netdev);
4369         struct e1000_hw *hw = &adapter->hw;
4370         u32 err;
4371
4372         pci_set_power_state(pdev, PCI_D0);
4373         pci_restore_state(pdev);
4374
4375         if (adapter->need_ioport)
4376                 err = pci_enable_device(pdev);
4377         else
4378                 err = pci_enable_device_mem(pdev);
4379         if (err) {
4380                 dev_err(&pdev->dev,
4381                         "igb: Cannot enable PCI device from suspend\n");
4382                 return err;
4383         }
4384         pci_set_master(pdev);
4385
4386         pci_enable_wake(pdev, PCI_D3hot, 0);
4387         pci_enable_wake(pdev, PCI_D3cold, 0);
4388
4389         igb_set_interrupt_capability(adapter);
4390
4391         if (igb_alloc_queues(adapter)) {
4392                 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
4393                 return -ENOMEM;
4394         }
4395
4396         /* e1000_power_up_phy(adapter); */
4397
4398         igb_reset(adapter);
4399         wr32(E1000_WUS, ~0);
4400
4401         if (netif_running(netdev)) {
4402                 err = igb_open(netdev);
4403                 if (err)
4404                         return err;
4405         }
4406
4407         netif_device_attach(netdev);
4408
4409         /* let the f/w know that the h/w is now under the control of the
4410          * driver. */
4411         igb_get_hw_control(adapter);
4412
4413         return 0;
4414 }
4415 #endif
4416
4417 static void igb_shutdown(struct pci_dev *pdev)
4418 {
4419         igb_suspend(pdev, PMSG_SUSPEND);
4420 }
4421
4422 #ifdef CONFIG_NET_POLL_CONTROLLER
4423 /*
4424  * Polling 'interrupt' - used by things like netconsole to send skbs
4425  * without having to re-enable interrupts. It's not called while
4426  * the interrupt routine is executing.
4427  */
4428 static void igb_netpoll(struct net_device *netdev)
4429 {
4430         struct igb_adapter *adapter = netdev_priv(netdev);
4431         int i;
4432         int work_done = 0;
4433
4434         igb_irq_disable(adapter);
4435         adapter->flags |= IGB_FLAG_IN_NETPOLL;
4436
4437         for (i = 0; i < adapter->num_tx_queues; i++)
4438                 igb_clean_tx_irq(&adapter->tx_ring[i]);
4439
4440         for (i = 0; i < adapter->num_rx_queues; i++)
4441                 igb_clean_rx_irq_adv(&adapter->rx_ring[i],
4442                                      &work_done,
4443                                      adapter->rx_ring[i].napi.weight);
4444
4445         adapter->flags &= ~IGB_FLAG_IN_NETPOLL;
4446         igb_irq_enable(adapter);
4447 }
4448 #endif /* CONFIG_NET_POLL_CONTROLLER */
4449
4450 /**
4451  * igb_io_error_detected - called when PCI error is detected
4452  * @pdev: Pointer to PCI device
4453  * @state: The current pci connection state
4454  *
4455  * This function is called after a PCI bus error affecting
4456  * this device has been detected.
4457  */
4458 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
4459                                               pci_channel_state_t state)
4460 {
4461         struct net_device *netdev = pci_get_drvdata(pdev);
4462         struct igb_adapter *adapter = netdev_priv(netdev);
4463
4464         netif_device_detach(netdev);
4465
4466         if (netif_running(netdev))
4467                 igb_down(adapter);
4468         pci_disable_device(pdev);
4469
4470         /* Request a slot slot reset. */
4471         return PCI_ERS_RESULT_NEED_RESET;
4472 }
4473
4474 /**
4475  * igb_io_slot_reset - called after the pci bus has been reset.
4476  * @pdev: Pointer to PCI device
4477  *
4478  * Restart the card from scratch, as if from a cold-boot. Implementation
4479  * resembles the first-half of the igb_resume routine.
4480  */
4481 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
4482 {
4483         struct net_device *netdev = pci_get_drvdata(pdev);
4484         struct igb_adapter *adapter = netdev_priv(netdev);
4485         struct e1000_hw *hw = &adapter->hw;
4486         int err;
4487
4488         if (adapter->need_ioport)
4489                 err = pci_enable_device(pdev);
4490         else
4491                 err = pci_enable_device_mem(pdev);
4492         if (err) {
4493                 dev_err(&pdev->dev,
4494                         "Cannot re-enable PCI device after reset.\n");
4495                 return PCI_ERS_RESULT_DISCONNECT;
4496         }
4497         pci_set_master(pdev);
4498         pci_restore_state(pdev);
4499
4500         pci_enable_wake(pdev, PCI_D3hot, 0);
4501         pci_enable_wake(pdev, PCI_D3cold, 0);
4502
4503         igb_reset(adapter);
4504         wr32(E1000_WUS, ~0);
4505
4506         return PCI_ERS_RESULT_RECOVERED;
4507 }
4508
4509 /**
4510  * igb_io_resume - called when traffic can start flowing again.
4511  * @pdev: Pointer to PCI device
4512  *
4513  * This callback is called when the error recovery driver tells us that
4514  * its OK to resume normal operation. Implementation resembles the
4515  * second-half of the igb_resume routine.
4516  */
4517 static void igb_io_resume(struct pci_dev *pdev)
4518 {
4519         struct net_device *netdev = pci_get_drvdata(pdev);
4520         struct igb_adapter *adapter = netdev_priv(netdev);
4521
4522         if (netif_running(netdev)) {
4523                 if (igb_up(adapter)) {
4524                         dev_err(&pdev->dev, "igb_up failed after reset\n");
4525                         return;
4526                 }
4527         }
4528
4529         netif_device_attach(netdev);
4530
4531         /* let the f/w know that the h/w is now under the control of the
4532          * driver. */
4533         igb_get_hw_control(adapter);
4534
4535 }
4536
4537 /* igb_main.c */