2 * Copyright (C) 2005 - 2010 ServerEngines
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@serverengines.com
14 * 209 N. Fair Oaks Ave
20 #include <asm/div64.h>
22 MODULE_VERSION(DRV_VER);
23 MODULE_DEVICE_TABLE(pci, be_dev_ids);
24 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25 MODULE_AUTHOR("ServerEngines Corporation");
26 MODULE_LICENSE("GPL");
28 static unsigned int rx_frag_size = 2048;
29 static unsigned int num_vfs;
30 module_param(rx_frag_size, uint, S_IRUGO);
31 module_param(num_vfs, uint, S_IRUGO);
32 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
33 MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
35 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
36 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
37 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
38 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
39 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
42 MODULE_DEVICE_TABLE(pci, be_dev_ids);
44 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
46 struct be_dma_mem *mem = &q->dma_mem;
48 pci_free_consistent(adapter->pdev, mem->size,
52 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
53 u16 len, u16 entry_size)
55 struct be_dma_mem *mem = &q->dma_mem;
57 memset(q, 0, sizeof(*q));
59 q->entry_size = entry_size;
60 mem->size = len * entry_size;
61 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
64 memset(mem->va, 0, mem->size);
68 static void be_intr_set(struct be_adapter *adapter, bool enable)
70 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
71 u32 reg = ioread32(addr);
72 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
77 if (!enabled && enable)
78 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
79 else if (enabled && !enable)
80 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
87 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
90 val |= qid & DB_RQ_RING_ID_MASK;
91 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
94 iowrite32(val, adapter->db + DB_RQ_OFFSET);
97 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
100 val |= qid & DB_TXULP_RING_ID_MASK;
101 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
104 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
107 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
108 bool arm, bool clear_int, u16 num_popped)
111 val |= qid & DB_EQ_RING_ID_MASK;
113 if (adapter->eeh_err)
117 val |= 1 << DB_EQ_REARM_SHIFT;
119 val |= 1 << DB_EQ_CLR_SHIFT;
120 val |= 1 << DB_EQ_EVNT_SHIFT;
121 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
122 iowrite32(val, adapter->db + DB_EQ_OFFSET);
125 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
128 val |= qid & DB_CQ_RING_ID_MASK;
130 if (adapter->eeh_err)
134 val |= 1 << DB_CQ_REARM_SHIFT;
135 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
136 iowrite32(val, adapter->db + DB_CQ_OFFSET);
139 static int be_mac_addr_set(struct net_device *netdev, void *p)
141 struct be_adapter *adapter = netdev_priv(netdev);
142 struct sockaddr *addr = p;
145 if (!is_valid_ether_addr(addr->sa_data))
146 return -EADDRNOTAVAIL;
148 /* MAC addr configuration will be done in hardware for VFs
149 * by their corresponding PFs. Just copy to netdev addr here
151 if (!be_physfn(adapter))
154 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
158 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
159 adapter->if_handle, &adapter->pmac_id);
162 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
167 void netdev_stats_update(struct be_adapter *adapter)
169 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
170 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
171 struct be_port_rxf_stats *port_stats =
172 &rxf_stats->port[adapter->port_num];
173 struct net_device_stats *dev_stats = &adapter->netdev->stats;
174 struct be_erx_stats *erx_stats = &hw_stats->erx;
176 dev_stats->rx_packets = drvr_stats(adapter)->be_rx_pkts;
177 dev_stats->tx_packets = drvr_stats(adapter)->be_tx_pkts;
178 dev_stats->rx_bytes = drvr_stats(adapter)->be_rx_bytes;
179 dev_stats->tx_bytes = drvr_stats(adapter)->be_tx_bytes;
181 /* bad pkts received */
182 dev_stats->rx_errors = port_stats->rx_crc_errors +
183 port_stats->rx_alignment_symbol_errors +
184 port_stats->rx_in_range_errors +
185 port_stats->rx_out_range_errors +
186 port_stats->rx_frame_too_long +
187 port_stats->rx_dropped_too_small +
188 port_stats->rx_dropped_too_short +
189 port_stats->rx_dropped_header_too_small +
190 port_stats->rx_dropped_tcp_length +
191 port_stats->rx_dropped_runt +
192 port_stats->rx_tcp_checksum_errs +
193 port_stats->rx_ip_checksum_errs +
194 port_stats->rx_udp_checksum_errs;
196 /* no space in linux buffers: best possible approximation */
197 dev_stats->rx_dropped =
198 erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
200 /* detailed rx errors */
201 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
202 port_stats->rx_out_range_errors +
203 port_stats->rx_frame_too_long;
205 /* receive ring buffer overflow */
206 dev_stats->rx_over_errors = 0;
208 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
210 /* frame alignment errors */
211 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
213 /* receiver fifo overrun */
214 /* drops_no_pbuf is no per i/f, it's per BE card */
215 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
216 port_stats->rx_input_fifo_overflow +
217 rxf_stats->rx_drops_no_pbuf;
218 /* receiver missed packetd */
219 dev_stats->rx_missed_errors = 0;
221 /* packet transmit problems */
222 dev_stats->tx_errors = 0;
224 /* no space available in linux */
225 dev_stats->tx_dropped = 0;
227 dev_stats->multicast = port_stats->rx_multicast_frames;
228 dev_stats->collisions = 0;
230 /* detailed tx_errors */
231 dev_stats->tx_aborted_errors = 0;
232 dev_stats->tx_carrier_errors = 0;
233 dev_stats->tx_fifo_errors = 0;
234 dev_stats->tx_heartbeat_errors = 0;
235 dev_stats->tx_window_errors = 0;
238 void be_link_status_update(struct be_adapter *adapter, bool link_up)
240 struct net_device *netdev = adapter->netdev;
242 /* If link came up or went down */
243 if (adapter->link_up != link_up) {
244 adapter->link_speed = -1;
246 netif_start_queue(netdev);
247 netif_carrier_on(netdev);
248 printk(KERN_INFO "%s: Link up\n", netdev->name);
250 netif_stop_queue(netdev);
251 netif_carrier_off(netdev);
252 printk(KERN_INFO "%s: Link down\n", netdev->name);
254 adapter->link_up = link_up;
258 /* Update the EQ delay n BE based on the RX frags consumed / sec */
259 static void be_rx_eqd_update(struct be_adapter *adapter)
261 struct be_eq_obj *rx_eq = &adapter->rx_eq;
262 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
266 if (!rx_eq->enable_aic)
270 if (time_before(now, stats->rx_fps_jiffies)) {
271 stats->rx_fps_jiffies = now;
275 /* Update once a second */
276 if ((now - stats->rx_fps_jiffies) < HZ)
279 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
280 ((now - stats->rx_fps_jiffies) / HZ);
282 stats->rx_fps_jiffies = now;
283 stats->be_prev_rx_frags = stats->be_rx_frags;
284 eqd = stats->be_rx_fps / 110000;
286 if (eqd > rx_eq->max_eqd)
287 eqd = rx_eq->max_eqd;
288 if (eqd < rx_eq->min_eqd)
289 eqd = rx_eq->min_eqd;
292 if (eqd != rx_eq->cur_eqd)
293 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
295 rx_eq->cur_eqd = eqd;
298 static struct net_device_stats *be_get_stats(struct net_device *dev)
303 static u32 be_calc_rate(u64 bytes, unsigned long ticks)
307 do_div(rate, ticks / HZ);
308 rate <<= 3; /* bytes/sec -> bits/sec */
309 do_div(rate, 1000000ul); /* MB/Sec */
314 static void be_tx_rate_update(struct be_adapter *adapter)
316 struct be_drvr_stats *stats = drvr_stats(adapter);
319 /* Wrapped around? */
320 if (time_before(now, stats->be_tx_jiffies)) {
321 stats->be_tx_jiffies = now;
325 /* Update tx rate once in two seconds */
326 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
327 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
328 - stats->be_tx_bytes_prev,
329 now - stats->be_tx_jiffies);
330 stats->be_tx_jiffies = now;
331 stats->be_tx_bytes_prev = stats->be_tx_bytes;
335 static void be_tx_stats_update(struct be_adapter *adapter,
336 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
338 struct be_drvr_stats *stats = drvr_stats(adapter);
340 stats->be_tx_wrbs += wrb_cnt;
341 stats->be_tx_bytes += copied;
342 stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
344 stats->be_tx_stops++;
347 /* Determine number of WRB entries needed to xmit data in an skb */
348 static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
350 int cnt = (skb->len > skb->data_len);
352 cnt += skb_shinfo(skb)->nr_frags;
354 /* to account for hdr wrb */
357 /* add a dummy to make it an even num */
362 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
366 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
368 wrb->frag_pa_hi = upper_32_bits(addr);
369 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
370 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
373 static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
374 bool vlan, u32 wrb_cnt, u32 len)
376 memset(hdr, 0, sizeof(*hdr));
378 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
380 if (skb_is_gso(skb)) {
381 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
382 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
383 hdr, skb_shinfo(skb)->gso_size);
384 if (skb_is_gso_v6(skb))
385 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
386 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
388 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
389 else if (is_udp_pkt(skb))
390 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
393 if (vlan && vlan_tx_tag_present(skb)) {
394 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
395 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
396 hdr, vlan_tx_tag_get(skb));
399 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
400 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
401 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
402 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
405 static void unmap_tx_frag(struct pci_dev *pdev, struct be_eth_wrb *wrb,
410 be_dws_le_to_cpu(wrb, sizeof(*wrb));
412 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
415 pci_unmap_single(pdev, dma, wrb->frag_len,
418 pci_unmap_page(pdev, dma, wrb->frag_len,
423 static int make_tx_wrbs(struct be_adapter *adapter,
424 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
428 struct pci_dev *pdev = adapter->pdev;
429 struct sk_buff *first_skb = skb;
430 struct be_queue_info *txq = &adapter->tx_obj.q;
431 struct be_eth_wrb *wrb;
432 struct be_eth_hdr_wrb *hdr;
433 bool map_single = false;
436 hdr = queue_head_node(txq);
438 map_head = txq->head;
440 if (skb->len > skb->data_len) {
441 int len = skb_headlen(skb);
442 busaddr = pci_map_single(pdev, skb->data, len,
444 if (pci_dma_mapping_error(pdev, busaddr))
447 wrb = queue_head_node(txq);
448 wrb_fill(wrb, busaddr, len);
449 be_dws_cpu_to_le(wrb, sizeof(*wrb));
454 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
455 struct skb_frag_struct *frag =
456 &skb_shinfo(skb)->frags[i];
457 busaddr = pci_map_page(pdev, frag->page,
459 frag->size, PCI_DMA_TODEVICE);
460 if (pci_dma_mapping_error(pdev, busaddr))
462 wrb = queue_head_node(txq);
463 wrb_fill(wrb, busaddr, frag->size);
464 be_dws_cpu_to_le(wrb, sizeof(*wrb));
466 copied += frag->size;
470 wrb = queue_head_node(txq);
472 be_dws_cpu_to_le(wrb, sizeof(*wrb));
476 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
478 be_dws_cpu_to_le(hdr, sizeof(*hdr));
482 txq->head = map_head;
484 wrb = queue_head_node(txq);
485 unmap_tx_frag(pdev, wrb, map_single);
487 copied -= wrb->frag_len;
493 static netdev_tx_t be_xmit(struct sk_buff *skb,
494 struct net_device *netdev)
496 struct be_adapter *adapter = netdev_priv(netdev);
497 struct be_tx_obj *tx_obj = &adapter->tx_obj;
498 struct be_queue_info *txq = &tx_obj->q;
499 u32 wrb_cnt = 0, copied = 0;
500 u32 start = txq->head;
501 bool dummy_wrb, stopped = false;
503 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
505 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
507 /* record the sent skb in the sent_skb table */
508 BUG_ON(tx_obj->sent_skb_list[start]);
509 tx_obj->sent_skb_list[start] = skb;
511 /* Ensure txq has space for the next skb; Else stop the queue
512 * *BEFORE* ringing the tx doorbell, so that we serialze the
513 * tx compls of the current transmit which'll wake up the queue
515 atomic_add(wrb_cnt, &txq->used);
516 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
518 netif_stop_queue(netdev);
522 be_txq_notify(adapter, txq->id, wrb_cnt);
524 be_tx_stats_update(adapter, wrb_cnt, copied,
525 skb_shinfo(skb)->gso_segs, stopped);
528 dev_kfree_skb_any(skb);
533 static int be_change_mtu(struct net_device *netdev, int new_mtu)
535 struct be_adapter *adapter = netdev_priv(netdev);
536 if (new_mtu < BE_MIN_MTU ||
537 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
538 (ETH_HLEN + ETH_FCS_LEN))) {
539 dev_info(&adapter->pdev->dev,
540 "MTU must be between %d and %d bytes\n",
542 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
545 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
546 netdev->mtu, new_mtu);
547 netdev->mtu = new_mtu;
552 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
553 * If the user configures more, place BE in vlan promiscuous mode.
555 static int be_vid_config(struct be_adapter *adapter)
557 u16 vtag[BE_NUM_VLANS_SUPPORTED];
561 if (adapter->vlans_added <= adapter->max_vlans) {
562 /* Construct VLAN Table to give to HW */
563 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
564 if (adapter->vlan_tag[i]) {
565 vtag[ntags] = cpu_to_le16(i);
569 status = be_cmd_vlan_config(adapter, adapter->if_handle,
572 status = be_cmd_vlan_config(adapter, adapter->if_handle,
578 static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
580 struct be_adapter *adapter = netdev_priv(netdev);
581 struct be_eq_obj *rx_eq = &adapter->rx_eq;
582 struct be_eq_obj *tx_eq = &adapter->tx_eq;
584 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
585 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
586 adapter->vlan_grp = grp;
587 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
588 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
591 static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
593 struct be_adapter *adapter = netdev_priv(netdev);
595 if (!be_physfn(adapter))
598 adapter->vlan_tag[vid] = 1;
599 adapter->vlans_added++;
600 if (adapter->vlans_added <= (adapter->max_vlans + 1))
601 be_vid_config(adapter);
604 static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
606 struct be_adapter *adapter = netdev_priv(netdev);
608 if (!be_physfn(adapter))
611 adapter->vlan_tag[vid] = 0;
612 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
613 adapter->vlans_added--;
614 if (adapter->vlans_added <= adapter->max_vlans)
615 be_vid_config(adapter);
618 static void be_set_multicast_list(struct net_device *netdev)
620 struct be_adapter *adapter = netdev_priv(netdev);
622 if (netdev->flags & IFF_PROMISC) {
623 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
624 adapter->promiscuous = true;
628 /* BE was previously in promiscous mode; disable it */
629 if (adapter->promiscuous) {
630 adapter->promiscuous = false;
631 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
634 /* Enable multicast promisc if num configured exceeds what we support */
635 if (netdev->flags & IFF_ALLMULTI ||
636 netdev_mc_count(netdev) > BE_MAX_MC) {
637 be_cmd_multicast_set(adapter, adapter->if_handle, NULL,
638 &adapter->mc_cmd_mem);
642 be_cmd_multicast_set(adapter, adapter->if_handle, netdev,
643 &adapter->mc_cmd_mem);
648 static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
650 struct be_adapter *adapter = netdev_priv(netdev);
653 if (!adapter->sriov_enabled)
656 if (!is_valid_ether_addr(mac) || (vf >= num_vfs))
659 status = be_cmd_pmac_del(adapter, adapter->vf_if_handle[vf],
660 adapter->vf_pmac_id[vf]);
662 status = be_cmd_pmac_add(adapter, mac, adapter->vf_if_handle[vf],
663 &adapter->vf_pmac_id[vf]);
665 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
670 static void be_rx_rate_update(struct be_adapter *adapter)
672 struct be_drvr_stats *stats = drvr_stats(adapter);
676 if (time_before(now, stats->be_rx_jiffies)) {
677 stats->be_rx_jiffies = now;
681 /* Update the rate once in two seconds */
682 if ((now - stats->be_rx_jiffies) < 2 * HZ)
685 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
686 - stats->be_rx_bytes_prev,
687 now - stats->be_rx_jiffies);
688 stats->be_rx_jiffies = now;
689 stats->be_rx_bytes_prev = stats->be_rx_bytes;
692 static void be_rx_stats_update(struct be_adapter *adapter,
693 u32 pktsize, u16 numfrags)
695 struct be_drvr_stats *stats = drvr_stats(adapter);
697 stats->be_rx_compl++;
698 stats->be_rx_frags += numfrags;
699 stats->be_rx_bytes += pktsize;
703 static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
705 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
707 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
708 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
709 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
711 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
712 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
714 ipv6_chk = (ip_version && (tcpf || udpf));
716 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
719 static struct be_rx_page_info *
720 get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
722 struct be_rx_page_info *rx_page_info;
723 struct be_queue_info *rxq = &adapter->rx_obj.q;
725 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
726 BUG_ON(!rx_page_info->page);
728 if (rx_page_info->last_page_user) {
729 pci_unmap_page(adapter->pdev, dma_unmap_addr(rx_page_info, bus),
730 adapter->big_page_size, PCI_DMA_FROMDEVICE);
731 rx_page_info->last_page_user = false;
734 atomic_dec(&rxq->used);
738 /* Throwaway the data in the Rx completion */
739 static void be_rx_compl_discard(struct be_adapter *adapter,
740 struct be_eth_rx_compl *rxcp)
742 struct be_queue_info *rxq = &adapter->rx_obj.q;
743 struct be_rx_page_info *page_info;
744 u16 rxq_idx, i, num_rcvd;
746 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
747 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
749 for (i = 0; i < num_rcvd; i++) {
750 page_info = get_rx_page_info(adapter, rxq_idx);
751 put_page(page_info->page);
752 memset(page_info, 0, sizeof(*page_info));
753 index_inc(&rxq_idx, rxq->len);
758 * skb_fill_rx_data forms a complete skb for an ether frame
761 static void skb_fill_rx_data(struct be_adapter *adapter,
762 struct sk_buff *skb, struct be_eth_rx_compl *rxcp,
765 struct be_queue_info *rxq = &adapter->rx_obj.q;
766 struct be_rx_page_info *page_info;
768 u32 pktsize, hdr_len, curr_frag_len, size;
771 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
772 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
774 page_info = get_rx_page_info(adapter, rxq_idx);
776 start = page_address(page_info->page) + page_info->page_offset;
779 /* Copy data in the first descriptor of this completion */
780 curr_frag_len = min(pktsize, rx_frag_size);
782 /* Copy the header portion into skb_data */
783 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
784 memcpy(skb->data, start, hdr_len);
785 skb->len = curr_frag_len;
786 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
787 /* Complete packet has now been moved to data */
788 put_page(page_info->page);
790 skb->tail += curr_frag_len;
792 skb_shinfo(skb)->nr_frags = 1;
793 skb_shinfo(skb)->frags[0].page = page_info->page;
794 skb_shinfo(skb)->frags[0].page_offset =
795 page_info->page_offset + hdr_len;
796 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
797 skb->data_len = curr_frag_len - hdr_len;
798 skb->tail += hdr_len;
800 page_info->page = NULL;
802 if (pktsize <= rx_frag_size) {
803 BUG_ON(num_rcvd != 1);
807 /* More frags present for this completion */
809 for (i = 1, j = 0; i < num_rcvd; i++) {
810 size -= curr_frag_len;
811 index_inc(&rxq_idx, rxq->len);
812 page_info = get_rx_page_info(adapter, rxq_idx);
814 curr_frag_len = min(size, rx_frag_size);
816 /* Coalesce all frags from the same physical page in one slot */
817 if (page_info->page_offset == 0) {
820 skb_shinfo(skb)->frags[j].page = page_info->page;
821 skb_shinfo(skb)->frags[j].page_offset =
822 page_info->page_offset;
823 skb_shinfo(skb)->frags[j].size = 0;
824 skb_shinfo(skb)->nr_frags++;
826 put_page(page_info->page);
829 skb_shinfo(skb)->frags[j].size += curr_frag_len;
830 skb->len += curr_frag_len;
831 skb->data_len += curr_frag_len;
833 page_info->page = NULL;
835 BUG_ON(j > MAX_SKB_FRAGS);
838 be_rx_stats_update(adapter, pktsize, num_rcvd);
841 /* Process the RX completion indicated by rxcp when GRO is disabled */
842 static void be_rx_compl_process(struct be_adapter *adapter,
843 struct be_eth_rx_compl *rxcp)
850 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
851 /* Is it a flush compl that has no data */
852 if (unlikely(num_rcvd == 0))
855 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
856 if (unlikely(!skb)) {
858 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
859 be_rx_compl_discard(adapter, rxcp);
863 skb_fill_rx_data(adapter, skb, rxcp, num_rcvd);
865 if (do_pkt_csum(rxcp, adapter->rx_csum))
866 skb->ip_summed = CHECKSUM_NONE;
868 skb->ip_summed = CHECKSUM_UNNECESSARY;
870 skb->truesize = skb->len + sizeof(struct sk_buff);
871 skb->protocol = eth_type_trans(skb, adapter->netdev);
873 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
874 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
876 /* vlanf could be wrongly set in some cards.
877 * ignore if vtm is not set */
878 if ((adapter->cap & 0x400) && !vtm)
881 if (unlikely(vlanf)) {
882 if (!adapter->vlan_grp || adapter->vlans_added == 0) {
886 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
888 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
890 netif_receive_skb(skb);
894 /* Process the RX completion indicated by rxcp when GRO is enabled */
895 static void be_rx_compl_process_gro(struct be_adapter *adapter,
896 struct be_eth_rx_compl *rxcp)
898 struct be_rx_page_info *page_info;
899 struct sk_buff *skb = NULL;
900 struct be_queue_info *rxq = &adapter->rx_obj.q;
901 struct be_eq_obj *eq_obj = &adapter->rx_eq;
902 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
903 u16 i, rxq_idx = 0, vid, j;
906 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
907 /* Is it a flush compl that has no data */
908 if (unlikely(num_rcvd == 0))
911 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
912 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
913 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
914 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
916 /* vlanf could be wrongly set in some cards.
917 * ignore if vtm is not set */
918 if ((adapter->cap & 0x400) && !vtm)
921 skb = napi_get_frags(&eq_obj->napi);
923 be_rx_compl_discard(adapter, rxcp);
927 remaining = pkt_size;
928 for (i = 0, j = -1; i < num_rcvd; i++) {
929 page_info = get_rx_page_info(adapter, rxq_idx);
931 curr_frag_len = min(remaining, rx_frag_size);
933 /* Coalesce all frags from the same physical page in one slot */
934 if (i == 0 || page_info->page_offset == 0) {
935 /* First frag or Fresh page */
937 skb_shinfo(skb)->frags[j].page = page_info->page;
938 skb_shinfo(skb)->frags[j].page_offset =
939 page_info->page_offset;
940 skb_shinfo(skb)->frags[j].size = 0;
942 put_page(page_info->page);
944 skb_shinfo(skb)->frags[j].size += curr_frag_len;
946 remaining -= curr_frag_len;
947 index_inc(&rxq_idx, rxq->len);
948 memset(page_info, 0, sizeof(*page_info));
950 BUG_ON(j > MAX_SKB_FRAGS);
952 skb_shinfo(skb)->nr_frags = j + 1;
954 skb->data_len = pkt_size;
955 skb->truesize += pkt_size;
956 skb->ip_summed = CHECKSUM_UNNECESSARY;
958 if (likely(!vlanf)) {
959 napi_gro_frags(&eq_obj->napi);
961 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
964 if (!adapter->vlan_grp || adapter->vlans_added == 0)
967 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
970 be_rx_stats_update(adapter, pkt_size, num_rcvd);
973 static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
975 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
977 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
981 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
983 queue_tail_inc(&adapter->rx_obj.cq);
987 /* To reset the valid bit, we need to reset the whole word as
988 * when walking the queue the valid entries are little-endian
989 * and invalid entries are host endian
991 static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
993 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
996 static inline struct page *be_alloc_pages(u32 size)
998 gfp_t alloc_flags = GFP_ATOMIC;
999 u32 order = get_order(size);
1001 alloc_flags |= __GFP_COMP;
1002 return alloc_pages(alloc_flags, order);
1006 * Allocate a page, split it to fragments of size rx_frag_size and post as
1007 * receive buffers to BE
1009 static void be_post_rx_frags(struct be_adapter *adapter)
1011 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
1012 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
1013 struct be_queue_info *rxq = &adapter->rx_obj.q;
1014 struct page *pagep = NULL;
1015 struct be_eth_rx_d *rxd;
1016 u64 page_dmaaddr = 0, frag_dmaaddr;
1017 u32 posted, page_offset = 0;
1019 page_info = &page_info_tbl[rxq->head];
1020 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1022 pagep = be_alloc_pages(adapter->big_page_size);
1023 if (unlikely(!pagep)) {
1024 drvr_stats(adapter)->be_ethrx_post_fail++;
1027 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
1028 adapter->big_page_size,
1029 PCI_DMA_FROMDEVICE);
1030 page_info->page_offset = 0;
1033 page_info->page_offset = page_offset + rx_frag_size;
1035 page_offset = page_info->page_offset;
1036 page_info->page = pagep;
1037 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
1038 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1040 rxd = queue_head_node(rxq);
1041 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1042 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
1044 /* Any space left in the current big page for another frag? */
1045 if ((page_offset + rx_frag_size + rx_frag_size) >
1046 adapter->big_page_size) {
1048 page_info->last_page_user = true;
1051 prev_page_info = page_info;
1052 queue_head_inc(rxq);
1053 page_info = &page_info_tbl[rxq->head];
1056 prev_page_info->last_page_user = true;
1059 atomic_add(posted, &rxq->used);
1060 be_rxq_notify(adapter, rxq->id, posted);
1061 } else if (atomic_read(&rxq->used) == 0) {
1062 /* Let be_worker replenish when memory is available */
1063 adapter->rx_post_starved = true;
1067 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
1069 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1071 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1075 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1077 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1079 queue_tail_inc(tx_cq);
1083 static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
1085 struct be_queue_info *txq = &adapter->tx_obj.q;
1086 struct be_eth_wrb *wrb;
1087 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1088 struct sk_buff *sent_skb;
1089 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1090 bool unmap_skb_hdr = true;
1092 sent_skb = sent_skbs[txq->tail];
1094 sent_skbs[txq->tail] = NULL;
1096 /* skip header wrb */
1097 queue_tail_inc(txq);
1100 cur_index = txq->tail;
1101 wrb = queue_tail_node(txq);
1102 unmap_tx_frag(adapter->pdev, wrb, (unmap_skb_hdr &&
1103 skb_headlen(sent_skb)));
1104 unmap_skb_hdr = false;
1107 queue_tail_inc(txq);
1108 } while (cur_index != last_index);
1110 atomic_sub(num_wrbs, &txq->used);
1112 kfree_skb(sent_skb);
1115 static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1117 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1123 eqe->evt = le32_to_cpu(eqe->evt);
1124 queue_tail_inc(&eq_obj->q);
1128 static int event_handle(struct be_adapter *adapter,
1129 struct be_eq_obj *eq_obj)
1131 struct be_eq_entry *eqe;
1134 while ((eqe = event_get(eq_obj)) != NULL) {
1139 /* Deal with any spurious interrupts that come
1142 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1144 napi_schedule(&eq_obj->napi);
1149 /* Just read and notify events without processing them.
1150 * Used at the time of destroying event queues */
1151 static void be_eq_clean(struct be_adapter *adapter,
1152 struct be_eq_obj *eq_obj)
1154 struct be_eq_entry *eqe;
1157 while ((eqe = event_get(eq_obj)) != NULL) {
1163 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1166 static void be_rx_q_clean(struct be_adapter *adapter)
1168 struct be_rx_page_info *page_info;
1169 struct be_queue_info *rxq = &adapter->rx_obj.q;
1170 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1171 struct be_eth_rx_compl *rxcp;
1174 /* First cleanup pending rx completions */
1175 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1176 be_rx_compl_discard(adapter, rxcp);
1177 be_rx_compl_reset(rxcp);
1178 be_cq_notify(adapter, rx_cq->id, true, 1);
1181 /* Then free posted rx buffer that were not used */
1182 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1183 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1184 page_info = get_rx_page_info(adapter, tail);
1185 put_page(page_info->page);
1186 memset(page_info, 0, sizeof(*page_info));
1188 BUG_ON(atomic_read(&rxq->used));
1191 static void be_tx_compl_clean(struct be_adapter *adapter)
1193 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1194 struct be_queue_info *txq = &adapter->tx_obj.q;
1195 struct be_eth_tx_compl *txcp;
1196 u16 end_idx, cmpl = 0, timeo = 0;
1197 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1198 struct sk_buff *sent_skb;
1201 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1203 while ((txcp = be_tx_compl_get(tx_cq))) {
1204 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1206 be_tx_compl_process(adapter, end_idx);
1210 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1214 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1220 if (atomic_read(&txq->used))
1221 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1222 atomic_read(&txq->used));
1224 /* free posted tx for which compls will never arrive */
1225 while (atomic_read(&txq->used)) {
1226 sent_skb = sent_skbs[txq->tail];
1227 end_idx = txq->tail;
1229 wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
1230 be_tx_compl_process(adapter, end_idx);
1234 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1236 struct be_queue_info *q;
1238 q = &adapter->mcc_obj.q;
1240 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1241 be_queue_free(adapter, q);
1243 q = &adapter->mcc_obj.cq;
1245 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1246 be_queue_free(adapter, q);
1249 /* Must be called only after TX qs are created as MCC shares TX EQ */
1250 static int be_mcc_queues_create(struct be_adapter *adapter)
1252 struct be_queue_info *q, *cq;
1254 /* Alloc MCC compl queue */
1255 cq = &adapter->mcc_obj.cq;
1256 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1257 sizeof(struct be_mcc_compl)))
1260 /* Ask BE to create MCC compl queue; share TX's eq */
1261 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
1264 /* Alloc MCC queue */
1265 q = &adapter->mcc_obj.q;
1266 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1267 goto mcc_cq_destroy;
1269 /* Ask BE to create MCC queue */
1270 if (be_cmd_mccq_create(adapter, q, cq))
1276 be_queue_free(adapter, q);
1278 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1280 be_queue_free(adapter, cq);
1285 static void be_tx_queues_destroy(struct be_adapter *adapter)
1287 struct be_queue_info *q;
1289 q = &adapter->tx_obj.q;
1291 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1292 be_queue_free(adapter, q);
1294 q = &adapter->tx_obj.cq;
1296 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1297 be_queue_free(adapter, q);
1299 /* Clear any residual events */
1300 be_eq_clean(adapter, &adapter->tx_eq);
1302 q = &adapter->tx_eq.q;
1304 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1305 be_queue_free(adapter, q);
1308 static int be_tx_queues_create(struct be_adapter *adapter)
1310 struct be_queue_info *eq, *q, *cq;
1312 adapter->tx_eq.max_eqd = 0;
1313 adapter->tx_eq.min_eqd = 0;
1314 adapter->tx_eq.cur_eqd = 96;
1315 adapter->tx_eq.enable_aic = false;
1316 /* Alloc Tx Event queue */
1317 eq = &adapter->tx_eq.q;
1318 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1321 /* Ask BE to create Tx Event queue */
1322 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
1324 adapter->base_eq_id = adapter->tx_eq.q.id;
1326 /* Alloc TX eth compl queue */
1327 cq = &adapter->tx_obj.cq;
1328 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1329 sizeof(struct be_eth_tx_compl)))
1332 /* Ask BE to create Tx eth compl queue */
1333 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
1336 /* Alloc TX eth queue */
1337 q = &adapter->tx_obj.q;
1338 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1341 /* Ask BE to create Tx eth queue */
1342 if (be_cmd_txq_create(adapter, q, cq))
1347 be_queue_free(adapter, q);
1349 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1351 be_queue_free(adapter, cq);
1353 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1355 be_queue_free(adapter, eq);
1359 static void be_rx_queues_destroy(struct be_adapter *adapter)
1361 struct be_queue_info *q;
1363 q = &adapter->rx_obj.q;
1365 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
1367 /* After the rxq is invalidated, wait for a grace time
1368 * of 1ms for all dma to end and the flush compl to arrive
1371 be_rx_q_clean(adapter);
1373 be_queue_free(adapter, q);
1375 q = &adapter->rx_obj.cq;
1377 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1378 be_queue_free(adapter, q);
1380 /* Clear any residual events */
1381 be_eq_clean(adapter, &adapter->rx_eq);
1383 q = &adapter->rx_eq.q;
1385 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1386 be_queue_free(adapter, q);
1389 static int be_rx_queues_create(struct be_adapter *adapter)
1391 struct be_queue_info *eq, *q, *cq;
1394 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1395 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1396 adapter->rx_eq.min_eqd = 0;
1397 adapter->rx_eq.cur_eqd = 0;
1398 adapter->rx_eq.enable_aic = true;
1400 /* Alloc Rx Event queue */
1401 eq = &adapter->rx_eq.q;
1402 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1403 sizeof(struct be_eq_entry));
1407 /* Ask BE to create Rx Event queue */
1408 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
1412 /* Alloc RX eth compl queue */
1413 cq = &adapter->rx_obj.cq;
1414 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1415 sizeof(struct be_eth_rx_compl));
1419 /* Ask BE to create Rx eth compl queue */
1420 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
1424 /* Alloc RX eth queue */
1425 q = &adapter->rx_obj.q;
1426 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1430 /* Ask BE to create Rx eth queue */
1431 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
1432 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1438 be_queue_free(adapter, q);
1440 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1442 be_queue_free(adapter, cq);
1444 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1446 be_queue_free(adapter, eq);
1450 /* There are 8 evt ids per func. Retruns the evt id's bit number */
1451 static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1453 return eq_id - adapter->base_eq_id;
1456 static irqreturn_t be_intx(int irq, void *dev)
1458 struct be_adapter *adapter = dev;
1461 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
1462 (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
1466 event_handle(adapter, &adapter->tx_eq);
1467 event_handle(adapter, &adapter->rx_eq);
1472 static irqreturn_t be_msix_rx(int irq, void *dev)
1474 struct be_adapter *adapter = dev;
1476 event_handle(adapter, &adapter->rx_eq);
1481 static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
1483 struct be_adapter *adapter = dev;
1485 event_handle(adapter, &adapter->tx_eq);
1490 static inline bool do_gro(struct be_adapter *adapter,
1491 struct be_eth_rx_compl *rxcp)
1493 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1494 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1497 drvr_stats(adapter)->be_rxcp_err++;
1499 return (tcp_frame && !err) ? true : false;
1502 int be_poll_rx(struct napi_struct *napi, int budget)
1504 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1505 struct be_adapter *adapter =
1506 container_of(rx_eq, struct be_adapter, rx_eq);
1507 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1508 struct be_eth_rx_compl *rxcp;
1511 adapter->stats.drvr_stats.be_rx_polls++;
1512 for (work_done = 0; work_done < budget; work_done++) {
1513 rxcp = be_rx_compl_get(adapter);
1517 if (do_gro(adapter, rxcp))
1518 be_rx_compl_process_gro(adapter, rxcp);
1520 be_rx_compl_process(adapter, rxcp);
1522 be_rx_compl_reset(rxcp);
1525 /* Refill the queue */
1526 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1527 be_post_rx_frags(adapter);
1530 if (work_done < budget) {
1531 napi_complete(napi);
1532 be_cq_notify(adapter, rx_cq->id, true, work_done);
1534 /* More to be consumed; continue with interrupts disabled */
1535 be_cq_notify(adapter, rx_cq->id, false, work_done);
1540 /* As TX and MCC share the same EQ check for both TX and MCC completions.
1541 * For TX/MCC we don't honour budget; consume everything
1543 static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1545 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1546 struct be_adapter *adapter =
1547 container_of(tx_eq, struct be_adapter, tx_eq);
1548 struct be_queue_info *txq = &adapter->tx_obj.q;
1549 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1550 struct be_eth_tx_compl *txcp;
1551 int tx_compl = 0, mcc_compl, status = 0;
1554 while ((txcp = be_tx_compl_get(tx_cq))) {
1555 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1557 be_tx_compl_process(adapter, end_idx);
1561 mcc_compl = be_process_mcc(adapter, &status);
1563 napi_complete(napi);
1566 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
1567 be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
1571 be_cq_notify(adapter, adapter->tx_obj.cq.id, true, tx_compl);
1573 /* As Tx wrbs have been freed up, wake up netdev queue if
1574 * it was stopped due to lack of tx wrbs.
1576 if (netif_queue_stopped(adapter->netdev) &&
1577 atomic_read(&txq->used) < txq->len / 2) {
1578 netif_wake_queue(adapter->netdev);
1581 drvr_stats(adapter)->be_tx_events++;
1582 drvr_stats(adapter)->be_tx_compl += tx_compl;
1588 static void be_worker(struct work_struct *work)
1590 struct be_adapter *adapter =
1591 container_of(work, struct be_adapter, work.work);
1593 be_cmd_get_stats(adapter, &adapter->stats.cmd);
1596 be_rx_eqd_update(adapter);
1598 be_tx_rate_update(adapter);
1599 be_rx_rate_update(adapter);
1601 if (adapter->rx_post_starved) {
1602 adapter->rx_post_starved = false;
1603 be_post_rx_frags(adapter);
1606 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1609 static void be_msix_disable(struct be_adapter *adapter)
1611 if (adapter->msix_enabled) {
1612 pci_disable_msix(adapter->pdev);
1613 adapter->msix_enabled = false;
1617 static void be_msix_enable(struct be_adapter *adapter)
1621 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1622 adapter->msix_entries[i].entry = i;
1624 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1625 BE_NUM_MSIX_VECTORS);
1627 adapter->msix_enabled = true;
1630 static void be_sriov_enable(struct be_adapter *adapter)
1632 #ifdef CONFIG_PCI_IOV
1634 if (be_physfn(adapter) && num_vfs) {
1635 status = pci_enable_sriov(adapter->pdev, num_vfs);
1636 adapter->sriov_enabled = status ? false : true;
1641 static void be_sriov_disable(struct be_adapter *adapter)
1643 #ifdef CONFIG_PCI_IOV
1644 if (adapter->sriov_enabled) {
1645 pci_disable_sriov(adapter->pdev);
1646 adapter->sriov_enabled = false;
1651 static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1653 return adapter->msix_entries[
1654 be_evt_bit_get(adapter, eq_id)].vector;
1657 static int be_request_irq(struct be_adapter *adapter,
1658 struct be_eq_obj *eq_obj,
1659 void *handler, char *desc)
1661 struct net_device *netdev = adapter->netdev;
1664 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1665 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1666 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1669 static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1671 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1672 free_irq(vec, adapter);
1675 static int be_msix_register(struct be_adapter *adapter)
1679 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
1683 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1690 be_free_irq(adapter, &adapter->tx_eq);
1692 dev_warn(&adapter->pdev->dev,
1693 "MSIX Request IRQ failed - err %d\n", status);
1694 pci_disable_msix(adapter->pdev);
1695 adapter->msix_enabled = false;
1699 static int be_irq_register(struct be_adapter *adapter)
1701 struct net_device *netdev = adapter->netdev;
1704 if (adapter->msix_enabled) {
1705 status = be_msix_register(adapter);
1708 /* INTx is not supported for VF */
1709 if (!be_physfn(adapter))
1714 netdev->irq = adapter->pdev->irq;
1715 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1718 dev_err(&adapter->pdev->dev,
1719 "INTx request IRQ failed - err %d\n", status);
1723 adapter->isr_registered = true;
1727 static void be_irq_unregister(struct be_adapter *adapter)
1729 struct net_device *netdev = adapter->netdev;
1731 if (!adapter->isr_registered)
1735 if (!adapter->msix_enabled) {
1736 free_irq(netdev->irq, adapter);
1741 be_free_irq(adapter, &adapter->tx_eq);
1742 be_free_irq(adapter, &adapter->rx_eq);
1744 adapter->isr_registered = false;
1747 static int be_close(struct net_device *netdev)
1749 struct be_adapter *adapter = netdev_priv(netdev);
1750 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1751 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1754 cancel_delayed_work_sync(&adapter->work);
1756 be_async_mcc_disable(adapter);
1758 netif_stop_queue(netdev);
1759 netif_carrier_off(netdev);
1760 adapter->link_up = false;
1762 be_intr_set(adapter, false);
1764 if (adapter->msix_enabled) {
1765 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1766 synchronize_irq(vec);
1767 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1768 synchronize_irq(vec);
1770 synchronize_irq(netdev->irq);
1772 be_irq_unregister(adapter);
1774 napi_disable(&rx_eq->napi);
1775 napi_disable(&tx_eq->napi);
1777 /* Wait for all pending tx completions to arrive so that
1778 * all tx skbs are freed.
1780 be_tx_compl_clean(adapter);
1785 static int be_open(struct net_device *netdev)
1787 struct be_adapter *adapter = netdev_priv(netdev);
1788 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1789 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1795 /* First time posting */
1796 be_post_rx_frags(adapter);
1798 napi_enable(&rx_eq->napi);
1799 napi_enable(&tx_eq->napi);
1801 be_irq_register(adapter);
1803 be_intr_set(adapter, true);
1805 /* The evt queues are created in unarmed state; arm them */
1806 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
1807 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
1809 /* Rx compl queue may be in unarmed state; rearm it */
1810 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
1812 /* Now that interrupts are on we can process async mcc */
1813 be_async_mcc_enable(adapter);
1815 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
1817 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
1821 be_link_status_update(adapter, link_up);
1823 if (be_physfn(adapter)) {
1824 status = be_vid_config(adapter);
1828 status = be_cmd_set_flow_control(adapter,
1829 adapter->tx_fc, adapter->rx_fc);
1836 be_close(adapter->netdev);
1840 static int be_setup_wol(struct be_adapter *adapter, bool enable)
1842 struct be_dma_mem cmd;
1846 memset(mac, 0, ETH_ALEN);
1848 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
1849 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
1852 memset(cmd.va, 0, cmd.size);
1855 status = pci_write_config_dword(adapter->pdev,
1856 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
1858 dev_err(&adapter->pdev->dev,
1859 "Could not enable Wake-on-lan\n");
1860 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
1864 status = be_cmd_enable_magic_wol(adapter,
1865 adapter->netdev->dev_addr, &cmd);
1866 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
1867 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
1869 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
1870 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
1871 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
1874 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
1878 static int be_setup(struct be_adapter *adapter)
1880 struct net_device *netdev = adapter->netdev;
1881 u32 cap_flags, en_flags, vf = 0;
1885 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST;
1887 if (be_physfn(adapter)) {
1888 cap_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS |
1889 BE_IF_FLAGS_PROMISCUOUS |
1890 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1891 en_flags |= BE_IF_FLAGS_PASS_L3L4_ERRORS;
1894 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1895 netdev->dev_addr, false/* pmac_invalid */,
1896 &adapter->if_handle, &adapter->pmac_id, 0);
1900 if (be_physfn(adapter)) {
1901 while (vf < num_vfs) {
1902 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED
1903 | BE_IF_FLAGS_BROADCAST;
1904 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1905 mac, true, &adapter->vf_if_handle[vf],
1908 dev_err(&adapter->pdev->dev,
1909 "Interface Create failed for VF %d\n", vf);
1914 } else if (!be_physfn(adapter)) {
1915 status = be_cmd_mac_addr_query(adapter, mac,
1916 MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
1918 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
1919 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
1923 status = be_tx_queues_create(adapter);
1927 status = be_rx_queues_create(adapter);
1931 status = be_mcc_queues_create(adapter);
1935 adapter->link_speed = -1;
1940 be_rx_queues_destroy(adapter);
1942 be_tx_queues_destroy(adapter);
1944 for (vf = 0; vf < num_vfs; vf++)
1945 if (adapter->vf_if_handle[vf])
1946 be_cmd_if_destroy(adapter, adapter->vf_if_handle[vf]);
1947 be_cmd_if_destroy(adapter, adapter->if_handle);
1952 static int be_clear(struct be_adapter *adapter)
1954 be_mcc_queues_destroy(adapter);
1955 be_rx_queues_destroy(adapter);
1956 be_tx_queues_destroy(adapter);
1958 be_cmd_if_destroy(adapter, adapter->if_handle);
1960 /* tell fw we're done with firing cmds */
1961 be_cmd_fw_clean(adapter);
1966 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
1967 char flash_cookie[2][16] = {"*** SE FLAS",
1968 "H DIRECTORY *** "};
1970 static bool be_flash_redboot(struct be_adapter *adapter,
1971 const u8 *p, u32 img_start, int image_size,
1978 crc_offset = hdr_size + img_start + image_size - 4;
1982 status = be_cmd_get_flash_crc(adapter, flashed_crc,
1985 dev_err(&adapter->pdev->dev,
1986 "could not get crc from flash, not flashing redboot\n");
1990 /*update redboot only if crc does not match*/
1991 if (!memcmp(flashed_crc, p, 4))
1997 static int be_flash_data(struct be_adapter *adapter,
1998 const struct firmware *fw,
1999 struct be_dma_mem *flash_cmd, int num_of_images)
2002 int status = 0, i, filehdr_size = 0;
2003 u32 total_bytes = 0, flash_op;
2005 const u8 *p = fw->data;
2006 struct be_cmd_write_flashrom *req = flash_cmd->va;
2007 struct flash_comp *pflashcomp;
2010 struct flash_comp gen3_flash_types[9] = {
2011 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
2012 FLASH_IMAGE_MAX_SIZE_g3},
2013 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
2014 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
2015 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
2016 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2017 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
2018 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2019 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
2020 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2021 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
2022 FLASH_IMAGE_MAX_SIZE_g3},
2023 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
2024 FLASH_IMAGE_MAX_SIZE_g3},
2025 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
2026 FLASH_IMAGE_MAX_SIZE_g3},
2027 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
2028 FLASH_NCSI_IMAGE_MAX_SIZE_g3}
2030 struct flash_comp gen2_flash_types[8] = {
2031 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
2032 FLASH_IMAGE_MAX_SIZE_g2},
2033 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
2034 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
2035 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
2036 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2037 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
2038 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2039 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
2040 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2041 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
2042 FLASH_IMAGE_MAX_SIZE_g2},
2043 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
2044 FLASH_IMAGE_MAX_SIZE_g2},
2045 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
2046 FLASH_IMAGE_MAX_SIZE_g2}
2049 if (adapter->generation == BE_GEN3) {
2050 pflashcomp = gen3_flash_types;
2051 filehdr_size = sizeof(struct flash_file_hdr_g3);
2054 pflashcomp = gen2_flash_types;
2055 filehdr_size = sizeof(struct flash_file_hdr_g2);
2058 for (i = 0; i < num_comp; i++) {
2059 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
2060 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
2062 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
2063 (!be_flash_redboot(adapter, fw->data,
2064 pflashcomp[i].offset, pflashcomp[i].size,
2068 p += filehdr_size + pflashcomp[i].offset
2069 + (num_of_images * sizeof(struct image_hdr));
2070 if (p + pflashcomp[i].size > fw->data + fw->size)
2072 total_bytes = pflashcomp[i].size;
2073 while (total_bytes) {
2074 if (total_bytes > 32*1024)
2075 num_bytes = 32*1024;
2077 num_bytes = total_bytes;
2078 total_bytes -= num_bytes;
2081 flash_op = FLASHROM_OPER_FLASH;
2083 flash_op = FLASHROM_OPER_SAVE;
2084 memcpy(req->params.data_buf, p, num_bytes);
2086 status = be_cmd_write_flashrom(adapter, flash_cmd,
2087 pflashcomp[i].optype, flash_op, num_bytes);
2089 dev_err(&adapter->pdev->dev,
2090 "cmd to write to flash rom failed.\n");
2099 static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
2103 if (fhdr->build[0] == '3')
2105 else if (fhdr->build[0] == '2')
2111 int be_load_fw(struct be_adapter *adapter, u8 *func)
2113 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
2114 const struct firmware *fw;
2115 struct flash_file_hdr_g2 *fhdr;
2116 struct flash_file_hdr_g3 *fhdr3;
2117 struct image_hdr *img_hdr_ptr = NULL;
2118 struct be_dma_mem flash_cmd;
2119 int status, i = 0, num_imgs = 0;
2122 strcpy(fw_file, func);
2124 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
2129 fhdr = (struct flash_file_hdr_g2 *) p;
2130 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
2132 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
2133 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
2135 if (!flash_cmd.va) {
2137 dev_err(&adapter->pdev->dev,
2138 "Memory allocation failure while flashing\n");
2142 if ((adapter->generation == BE_GEN3) &&
2143 (get_ufigen_type(fhdr) == BE_GEN3)) {
2144 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
2145 num_imgs = le32_to_cpu(fhdr3->num_imgs);
2146 for (i = 0; i < num_imgs; i++) {
2147 img_hdr_ptr = (struct image_hdr *) (fw->data +
2148 (sizeof(struct flash_file_hdr_g3) +
2149 i * sizeof(struct image_hdr)));
2150 if (le32_to_cpu(img_hdr_ptr->imageid) == 1)
2151 status = be_flash_data(adapter, fw, &flash_cmd,
2154 } else if ((adapter->generation == BE_GEN2) &&
2155 (get_ufigen_type(fhdr) == BE_GEN2)) {
2156 status = be_flash_data(adapter, fw, &flash_cmd, 0);
2158 dev_err(&adapter->pdev->dev,
2159 "UFI and Interface are not compatible for flashing\n");
2163 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
2166 dev_err(&adapter->pdev->dev, "Firmware load error\n");
2170 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
2173 release_firmware(fw);
2177 static struct net_device_ops be_netdev_ops = {
2178 .ndo_open = be_open,
2179 .ndo_stop = be_close,
2180 .ndo_start_xmit = be_xmit,
2181 .ndo_get_stats = be_get_stats,
2182 .ndo_set_rx_mode = be_set_multicast_list,
2183 .ndo_set_mac_address = be_mac_addr_set,
2184 .ndo_change_mtu = be_change_mtu,
2185 .ndo_validate_addr = eth_validate_addr,
2186 .ndo_vlan_rx_register = be_vlan_register,
2187 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2188 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2189 .ndo_set_vf_mac = be_set_vf_mac
2192 static void be_netdev_init(struct net_device *netdev)
2194 struct be_adapter *adapter = netdev_priv(netdev);
2196 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
2197 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
2198 NETIF_F_GRO | NETIF_F_TSO6;
2200 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2202 netdev->flags |= IFF_MULTICAST;
2204 adapter->rx_csum = true;
2206 /* Default settings for Rx and Tx flow control */
2207 adapter->rx_fc = true;
2208 adapter->tx_fc = true;
2210 netif_set_gso_max_size(netdev, 65535);
2212 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2214 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2216 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
2218 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
2221 netif_carrier_off(netdev);
2222 netif_stop_queue(netdev);
2225 static void be_unmap_pci_bars(struct be_adapter *adapter)
2228 iounmap(adapter->csr);
2230 iounmap(adapter->db);
2231 if (adapter->pcicfg && be_physfn(adapter))
2232 iounmap(adapter->pcicfg);
2235 static int be_map_pci_bars(struct be_adapter *adapter)
2238 int pcicfg_reg, db_reg;
2240 if (be_physfn(adapter)) {
2241 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2242 pci_resource_len(adapter->pdev, 2));
2245 adapter->csr = addr;
2248 if (adapter->generation == BE_GEN2) {
2253 if (be_physfn(adapter))
2258 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
2259 pci_resource_len(adapter->pdev, db_reg));
2264 if (be_physfn(adapter)) {
2265 addr = ioremap_nocache(
2266 pci_resource_start(adapter->pdev, pcicfg_reg),
2267 pci_resource_len(adapter->pdev, pcicfg_reg));
2270 adapter->pcicfg = addr;
2272 adapter->pcicfg = adapter->db + SRIOV_VF_PCICFG_OFFSET;
2276 be_unmap_pci_bars(adapter);
2281 static void be_ctrl_cleanup(struct be_adapter *adapter)
2283 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
2285 be_unmap_pci_bars(adapter);
2288 pci_free_consistent(adapter->pdev, mem->size,
2291 mem = &adapter->mc_cmd_mem;
2293 pci_free_consistent(adapter->pdev, mem->size,
2297 static int be_ctrl_init(struct be_adapter *adapter)
2299 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2300 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
2301 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
2304 status = be_map_pci_bars(adapter);
2308 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2309 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2310 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2311 if (!mbox_mem_alloc->va) {
2313 goto unmap_pci_bars;
2316 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2317 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2318 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2319 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
2321 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2322 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2324 if (mc_cmd_mem->va == NULL) {
2328 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2330 spin_lock_init(&adapter->mbox_lock);
2331 spin_lock_init(&adapter->mcc_lock);
2332 spin_lock_init(&adapter->mcc_cq_lock);
2334 init_completion(&adapter->flash_compl);
2335 pci_save_state(adapter->pdev);
2339 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2340 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2343 be_unmap_pci_bars(adapter);
2349 static void be_stats_cleanup(struct be_adapter *adapter)
2351 struct be_stats_obj *stats = &adapter->stats;
2352 struct be_dma_mem *cmd = &stats->cmd;
2355 pci_free_consistent(adapter->pdev, cmd->size,
2359 static int be_stats_init(struct be_adapter *adapter)
2361 struct be_stats_obj *stats = &adapter->stats;
2362 struct be_dma_mem *cmd = &stats->cmd;
2364 cmd->size = sizeof(struct be_cmd_req_get_stats);
2365 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2366 if (cmd->va == NULL)
2368 memset(cmd->va, 0, cmd->size);
2372 static void __devexit be_remove(struct pci_dev *pdev)
2374 struct be_adapter *adapter = pci_get_drvdata(pdev);
2379 unregister_netdev(adapter->netdev);
2383 be_stats_cleanup(adapter);
2385 be_ctrl_cleanup(adapter);
2387 be_sriov_disable(adapter);
2389 be_msix_disable(adapter);
2391 pci_set_drvdata(pdev, NULL);
2392 pci_release_regions(pdev);
2393 pci_disable_device(pdev);
2395 free_netdev(adapter->netdev);
2398 static int be_get_config(struct be_adapter *adapter)
2403 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
2407 status = be_cmd_query_fw_cfg(adapter,
2408 &adapter->port_num, &adapter->cap);
2412 memset(mac, 0, ETH_ALEN);
2414 if (be_physfn(adapter)) {
2415 status = be_cmd_mac_addr_query(adapter, mac,
2416 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
2421 if (!is_valid_ether_addr(mac))
2422 return -EADDRNOTAVAIL;
2424 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2425 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2428 if (adapter->cap & 0x400)
2429 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
2431 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
2436 static int __devinit be_probe(struct pci_dev *pdev,
2437 const struct pci_device_id *pdev_id)
2440 struct be_adapter *adapter;
2441 struct net_device *netdev;
2444 status = pci_enable_device(pdev);
2448 status = pci_request_regions(pdev, DRV_NAME);
2451 pci_set_master(pdev);
2453 netdev = alloc_etherdev(sizeof(struct be_adapter));
2454 if (netdev == NULL) {
2458 adapter = netdev_priv(netdev);
2460 switch (pdev->device) {
2463 adapter->generation = BE_GEN2;
2467 adapter->generation = BE_GEN3;
2470 adapter->generation = 0;
2473 adapter->pdev = pdev;
2474 pci_set_drvdata(pdev, adapter);
2475 adapter->netdev = netdev;
2476 be_netdev_init(netdev);
2477 SET_NETDEV_DEV(netdev, &pdev->dev);
2479 be_msix_enable(adapter);
2481 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
2483 netdev->features |= NETIF_F_HIGHDMA;
2485 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2487 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2492 be_sriov_enable(adapter);
2494 status = be_ctrl_init(adapter);
2498 /* sync up with fw's ready state */
2499 if (be_physfn(adapter)) {
2500 status = be_cmd_POST(adapter);
2505 /* tell fw we're ready to fire cmds */
2506 status = be_cmd_fw_init(adapter);
2510 if (be_physfn(adapter)) {
2511 status = be_cmd_reset_function(adapter);
2516 status = be_stats_init(adapter);
2520 status = be_get_config(adapter);
2524 INIT_DELAYED_WORK(&adapter->work, be_worker);
2526 status = be_setup(adapter);
2530 status = register_netdev(netdev);
2534 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
2540 be_stats_cleanup(adapter);
2542 be_ctrl_cleanup(adapter);
2544 be_msix_disable(adapter);
2545 be_sriov_disable(adapter);
2546 free_netdev(adapter->netdev);
2547 pci_set_drvdata(pdev, NULL);
2549 pci_release_regions(pdev);
2551 pci_disable_device(pdev);
2553 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
2557 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2559 struct be_adapter *adapter = pci_get_drvdata(pdev);
2560 struct net_device *netdev = adapter->netdev;
2563 be_setup_wol(adapter, true);
2565 netif_device_detach(netdev);
2566 if (netif_running(netdev)) {
2571 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
2574 pci_save_state(pdev);
2575 pci_disable_device(pdev);
2576 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2580 static int be_resume(struct pci_dev *pdev)
2583 struct be_adapter *adapter = pci_get_drvdata(pdev);
2584 struct net_device *netdev = adapter->netdev;
2586 netif_device_detach(netdev);
2588 status = pci_enable_device(pdev);
2592 pci_set_power_state(pdev, 0);
2593 pci_restore_state(pdev);
2595 /* tell fw we're ready to fire cmds */
2596 status = be_cmd_fw_init(adapter);
2601 if (netif_running(netdev)) {
2606 netif_device_attach(netdev);
2609 be_setup_wol(adapter, false);
2614 * An FLR will stop BE from DMAing any data.
2616 static void be_shutdown(struct pci_dev *pdev)
2618 struct be_adapter *adapter = pci_get_drvdata(pdev);
2619 struct net_device *netdev = adapter->netdev;
2621 netif_device_detach(netdev);
2623 be_cmd_reset_function(adapter);
2626 be_setup_wol(adapter, true);
2628 pci_disable_device(pdev);
2631 static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
2632 pci_channel_state_t state)
2634 struct be_adapter *adapter = pci_get_drvdata(pdev);
2635 struct net_device *netdev = adapter->netdev;
2637 dev_err(&adapter->pdev->dev, "EEH error detected\n");
2639 adapter->eeh_err = true;
2641 netif_device_detach(netdev);
2643 if (netif_running(netdev)) {
2650 if (state == pci_channel_io_perm_failure)
2651 return PCI_ERS_RESULT_DISCONNECT;
2653 pci_disable_device(pdev);
2655 return PCI_ERS_RESULT_NEED_RESET;
2658 static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
2660 struct be_adapter *adapter = pci_get_drvdata(pdev);
2663 dev_info(&adapter->pdev->dev, "EEH reset\n");
2664 adapter->eeh_err = false;
2666 status = pci_enable_device(pdev);
2668 return PCI_ERS_RESULT_DISCONNECT;
2670 pci_set_master(pdev);
2671 pci_set_power_state(pdev, 0);
2672 pci_restore_state(pdev);
2674 /* Check if card is ok and fw is ready */
2675 status = be_cmd_POST(adapter);
2677 return PCI_ERS_RESULT_DISCONNECT;
2679 return PCI_ERS_RESULT_RECOVERED;
2682 static void be_eeh_resume(struct pci_dev *pdev)
2685 struct be_adapter *adapter = pci_get_drvdata(pdev);
2686 struct net_device *netdev = adapter->netdev;
2688 dev_info(&adapter->pdev->dev, "EEH resume\n");
2690 pci_save_state(pdev);
2692 /* tell fw we're ready to fire cmds */
2693 status = be_cmd_fw_init(adapter);
2697 status = be_setup(adapter);
2701 if (netif_running(netdev)) {
2702 status = be_open(netdev);
2706 netif_device_attach(netdev);
2709 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
2712 static struct pci_error_handlers be_eeh_handlers = {
2713 .error_detected = be_eeh_err_detected,
2714 .slot_reset = be_eeh_reset,
2715 .resume = be_eeh_resume,
2718 static struct pci_driver be_driver = {
2720 .id_table = be_dev_ids,
2722 .remove = be_remove,
2723 .suspend = be_suspend,
2724 .resume = be_resume,
2725 .shutdown = be_shutdown,
2726 .err_handler = &be_eeh_handlers
2729 static int __init be_init_module(void)
2731 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
2732 rx_frag_size != 2048) {
2733 printk(KERN_WARNING DRV_NAME
2734 " : Module param rx_frag_size must be 2048/4096/8192."
2736 rx_frag_size = 2048;
2740 printk(KERN_WARNING DRV_NAME
2741 " : Module param num_vfs must not be greater than 32."
2746 return pci_register_driver(&be_driver);
2748 module_init(be_init_module);
2750 static void __exit be_exit_module(void)
2752 pci_unregister_driver(&be_driver);
2754 module_exit(be_exit_module);