drivers/net/benet/be_cmds.h

   1 /*
   2  * Copyright (C) 2005 - 2009 ServerEngines
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Contact Information:
  11  * linux-drivers@serverengines.com
  12  *
  13  * ServerEngines
  14  * 209 N. Fair Oaks Ave
  15  * Sunnyvale, CA 94085
  16  */
  17
  18 /*
  19  * The driver sends configuration and managements command requests to the
  20  * firmware in the BE. These requests are communicated to the processor
  21  * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
  22  * WRB inside a MAILBOX.
  23  * The commands are serviced by the ARM processor in the BladeEngine's MPU.
  24  */
  25
  26 struct be_sge {
  27         u32 pa_lo;
  28         u32 pa_hi;
  29         u32 len;
  30 };
  31
  32 #define MCC_WRB_EMBEDDED_MASK   1       /* bit 0 of dword 0*/
  33 #define MCC_WRB_SGE_CNT_SHIFT   3       /* bits 3 - 7 of dword 0 */
  34 #define MCC_WRB_SGE_CNT_MASK    0x1F    /* bits 3 - 7 of dword 0 */
  35 struct be_mcc_wrb {
  36         u32 embedded;           /* dword 0 */
  37         u32 payload_length;     /* dword 1 */
  38         u32 tag0;               /* dword 2 */
  39         u32 tag1;               /* dword 3 */
  40         u32 rsvd;               /* dword 4 */
  41         union {
  42                 u8 embedded_payload[236]; /* used by embedded cmds */
  43                 struct be_sge sgl[19];    /* used by non-embedded cmds */
  44         } payload;
  45 };
  46
  47 #define CQE_FLAGS_VALID_MASK            (1 << 31)
  48 #define CQE_FLAGS_ASYNC_MASK            (1 << 30)
  49 #define CQE_FLAGS_COMPLETED_MASK        (1 << 28)
  50 #define CQE_FLAGS_CONSUMED_MASK         (1 << 27)
  51
  52 /* Completion Status */
  53 enum {
  54         MCC_STATUS_SUCCESS = 0x0,
  55 /* The client does not have sufficient privileges to execute the command */
  56         MCC_STATUS_INSUFFICIENT_PRIVILEGES = 0x1,
  57 /* A parameter in the command was invalid. */
  58         MCC_STATUS_INVALID_PARAMETER = 0x2,
  59 /* There are insufficient chip resources to execute the command */
  60         MCC_STATUS_INSUFFICIENT_RESOURCES = 0x3,
  61 /* The command is completing because the queue was getting flushed */
  62         MCC_STATUS_QUEUE_FLUSHING = 0x4,
  63 /* The command is completing with a DMA error */
  64         MCC_STATUS_DMA_FAILED = 0x5,
  65         MCC_STATUS_NOT_SUPPORTED = 66
  66 };
  67
  68 #define CQE_STATUS_COMPL_MASK           0xFFFF
  69 #define CQE_STATUS_COMPL_SHIFT          0       /* bits 0 - 15 */
  70 #define CQE_STATUS_EXTD_MASK            0xFFFF
  71 #define CQE_STATUS_EXTD_SHIFT           0       /* bits 0 - 15 */
  72
  73 struct be_mcc_compl {
  74         u32 status;             /* dword 0 */
  75         u32 tag0;               /* dword 1 */
  76         u32 tag1;               /* dword 2 */
  77         u32 flags;              /* dword 3 */
  78 };
  79
  80 /* When the async bit of mcc_compl is set, the last 4 bytes of
  81  * mcc_compl is interpreted as follows:
  82  */
  83 #define ASYNC_TRAILER_EVENT_CODE_SHIFT  8       /* bits 8 - 15 */
  84 #define ASYNC_TRAILER_EVENT_CODE_MASK   0xFF
  85 #define ASYNC_EVENT_CODE_LINK_STATE     0x1
  86 struct be_async_event_trailer {
  87         u32 code;
  88 };
  89
  90 enum {
  91         ASYNC_EVENT_LINK_DOWN   = 0x0,
  92         ASYNC_EVENT_LINK_UP     = 0x1
  93 };
  94
  95 /* When the event code of an async trailer is link-state, the mcc_compl
  96  * must be interpreted as follows
  97  */
  98 struct be_async_event_link_state {
  99         u8 physical_port;
 100         u8 port_link_status;
 101         u8 port_duplex;
 102         u8 port_speed;
 103         u8 port_fault;
 104         u8 rsvd0[7];
 105         struct be_async_event_trailer trailer;
 106 } __packed;
 107
 108 struct be_mcc_mailbox {
 109         struct be_mcc_wrb wrb;
 110         struct be_mcc_compl compl;
 111 };
 112
 113 #define CMD_SUBSYSTEM_COMMON    0x1
 114 #define CMD_SUBSYSTEM_ETH       0x3
 115
 116 #define OPCODE_COMMON_NTWK_MAC_QUERY                    1
 117 #define OPCODE_COMMON_NTWK_MAC_SET                      2
 118 #define OPCODE_COMMON_NTWK_MULTICAST_SET                3
 119 #define OPCODE_COMMON_NTWK_VLAN_CONFIG                  4
 120 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY            5
 121 #define OPCODE_COMMON_WRITE_FLASHROM                    7
 122 #define OPCODE_COMMON_CQ_CREATE                         12
 123 #define OPCODE_COMMON_EQ_CREATE                         13
 124 #define OPCODE_COMMON_MCC_CREATE                        21
 125 #define OPCODE_COMMON_NTWK_RX_FILTER                    34
 126 #define OPCODE_COMMON_GET_FW_VERSION                    35
 127 #define OPCODE_COMMON_SET_FLOW_CONTROL                  36
 128 #define OPCODE_COMMON_GET_FLOW_CONTROL                  37
 129 #define OPCODE_COMMON_SET_FRAME_SIZE                    39
 130 #define OPCODE_COMMON_MODIFY_EQ_DELAY                   41
 131 #define OPCODE_COMMON_FIRMWARE_CONFIG                   42
 132 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE             50
 133 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY            51
 134 #define OPCODE_COMMON_MCC_DESTROY                       53
 135 #define OPCODE_COMMON_CQ_DESTROY                        54
 136 #define OPCODE_COMMON_EQ_DESTROY                        55
 137 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG             58
 138 #define OPCODE_COMMON_NTWK_PMAC_ADD                     59
 139 #define OPCODE_COMMON_NTWK_PMAC_DEL                     60
 140 #define OPCODE_COMMON_FUNCTION_RESET                    61
 141 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON             69
 142 #define OPCODE_COMMON_GET_BEACON_STATE                  70
 143 #define OPCODE_COMMON_READ_TRANSRECV_DATA               73
 144
 145 #define OPCODE_ETH_ACPI_CONFIG                          2
 146 #define OPCODE_ETH_PROMISCUOUS                          3
 147 #define OPCODE_ETH_GET_STATISTICS                       4
 148 #define OPCODE_ETH_TX_CREATE                            7
 149 #define OPCODE_ETH_RX_CREATE                            8
 150 #define OPCODE_ETH_TX_DESTROY                           9
 151 #define OPCODE_ETH_RX_DESTROY                           10
 152
 153 struct be_cmd_req_hdr {
 154         u8 opcode;              /* dword 0 */
 155         u8 subsystem;           /* dword 0 */
 156         u8 port_number;         /* dword 0 */
 157         u8 domain;              /* dword 0 */
 158         u32 timeout;            /* dword 1 */
 159         u32 request_length;     /* dword 2 */
 160         u32 rsvd;               /* dword 3 */
 161 };
 162
 163 #define RESP_HDR_INFO_OPCODE_SHIFT      0       /* bits 0 - 7 */
 164 #define RESP_HDR_INFO_SUBSYS_SHIFT      8       /* bits 8 - 15 */
 165 struct be_cmd_resp_hdr {
 166         u32 info;               /* dword 0 */
 167         u32 status;             /* dword 1 */
 168         u32 response_length;    /* dword 2 */
 169         u32 actual_resp_len;    /* dword 3 */
 170 };
 171
 172 struct phys_addr {
 173         u32 lo;
 174         u32 hi;
 175 };
 176
 177 /**************************
 178  * BE Command definitions *
 179  **************************/
 180
 181 /* Pseudo amap definition in which each bit of the actual structure is defined
 182  * as a byte: used to calculate offset/shift/mask of each field */
 183 struct amap_eq_context {
 184         u8 cidx[13];            /* dword 0*/
 185         u8 rsvd0[3];            /* dword 0*/
 186         u8 epidx[13];           /* dword 0*/
 187         u8 valid;               /* dword 0*/
 188         u8 rsvd1;               /* dword 0*/
 189         u8 size;                /* dword 0*/
 190         u8 pidx[13];            /* dword 1*/
 191         u8 rsvd2[3];            /* dword 1*/
 192         u8 pd[10];              /* dword 1*/
 193         u8 count[3];            /* dword 1*/
 194         u8 solevent;            /* dword 1*/
 195         u8 stalled;             /* dword 1*/
 196         u8 armed;               /* dword 1*/
 197         u8 rsvd3[4];            /* dword 2*/
 198         u8 func[8];             /* dword 2*/
 199         u8 rsvd4;               /* dword 2*/
 200         u8 delaymult[10];       /* dword 2*/
 201         u8 rsvd5[2];            /* dword 2*/
 202         u8 phase[2];            /* dword 2*/
 203         u8 nodelay;             /* dword 2*/
 204         u8 rsvd6[4];            /* dword 2*/
 205         u8 rsvd7[32];           /* dword 3*/
 206 } __packed;
 207
 208 struct be_cmd_req_eq_create {
 209         struct be_cmd_req_hdr hdr;
 210         u16 num_pages;          /* sword */
 211         u16 rsvd0;              /* sword */
 212         u8 context[sizeof(struct amap_eq_context) / 8];
 213         struct phys_addr pages[8];
 214 } __packed;
 215
 216 struct be_cmd_resp_eq_create {
 217         struct be_cmd_resp_hdr resp_hdr;
 218         u16 eq_id;              /* sword */
 219         u16 rsvd0;              /* sword */
 220 } __packed;
 221
 222 /******************** Mac query ***************************/
 223 enum {
 224         MAC_ADDRESS_TYPE_STORAGE = 0x0,
 225         MAC_ADDRESS_TYPE_NETWORK = 0x1,
 226         MAC_ADDRESS_TYPE_PD = 0x2,
 227         MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
 228 };
 229
 230 struct mac_addr {
 231         u16 size_of_struct;
 232         u8 addr[ETH_ALEN];
 233 } __packed;
 234
 235 struct be_cmd_req_mac_query {
 236         struct be_cmd_req_hdr hdr;
 237         u8 type;
 238         u8 permanent;
 239         u16 if_id;
 240 } __packed;
 241
 242 struct be_cmd_resp_mac_query {
 243         struct be_cmd_resp_hdr hdr;
 244         struct mac_addr mac;
 245 };
 246
 247 /******************** PMac Add ***************************/
 248 struct be_cmd_req_pmac_add {
 249         struct be_cmd_req_hdr hdr;
 250         u32 if_id;
 251         u8 mac_address[ETH_ALEN];
 252         u8 rsvd0[2];
 253 } __packed;
 254
 255 struct be_cmd_resp_pmac_add {
 256         struct be_cmd_resp_hdr hdr;
 257         u32 pmac_id;
 258 };
 259
 260 /******************** PMac Del ***************************/
 261 struct be_cmd_req_pmac_del {
 262         struct be_cmd_req_hdr hdr;
 263         u32 if_id;
 264         u32 pmac_id;
 265 };
 266
 267 /******************** Create CQ ***************************/
 268 /* Pseudo amap definition in which each bit of the actual structure is defined
 269  * as a byte: used to calculate offset/shift/mask of each field */
 270 struct amap_cq_context {
 271         u8 cidx[11];            /* dword 0*/
 272         u8 rsvd0;               /* dword 0*/
 273         u8 coalescwm[2];        /* dword 0*/
 274         u8 nodelay;             /* dword 0*/
 275         u8 epidx[11];           /* dword 0*/
 276         u8 rsvd1;               /* dword 0*/
 277         u8 count[2];            /* dword 0*/
 278         u8 valid;               /* dword 0*/
 279         u8 solevent;            /* dword 0*/
 280         u8 eventable;           /* dword 0*/
 281         u8 pidx[11];            /* dword 1*/
 282         u8 rsvd2;               /* dword 1*/
 283         u8 pd[10];              /* dword 1*/
 284         u8 eqid[8];             /* dword 1*/
 285         u8 stalled;             /* dword 1*/
 286         u8 armed;               /* dword 1*/
 287         u8 rsvd3[4];            /* dword 2*/
 288         u8 func[8];             /* dword 2*/
 289         u8 rsvd4[20];           /* dword 2*/
 290         u8 rsvd5[32];           /* dword 3*/
 291 } __packed;
 292
 293 struct be_cmd_req_cq_create {
 294         struct be_cmd_req_hdr hdr;
 295         u16 num_pages;
 296         u16 rsvd0;
 297         u8 context[sizeof(struct amap_cq_context) / 8];
 298         struct phys_addr pages[8];
 299 } __packed;
 300
 301 struct be_cmd_resp_cq_create {
 302         struct be_cmd_resp_hdr hdr;
 303         u16 cq_id;
 304         u16 rsvd0;
 305 } __packed;
 306
 307 /******************** Create MCCQ ***************************/
 308 /* Pseudo amap definition in which each bit of the actual structure is defined
 309  * as a byte: used to calculate offset/shift/mask of each field */
 310 struct amap_mcc_context {
 311         u8 con_index[14];
 312         u8 rsvd0[2];
 313         u8 ring_size[4];
 314         u8 fetch_wrb;
 315         u8 fetch_r2t;
 316         u8 cq_id[10];
 317         u8 prod_index[14];
 318         u8 fid[8];
 319         u8 pdid[9];
 320         u8 valid;
 321         u8 rsvd1[32];
 322         u8 rsvd2[32];
 323 } __packed;
 324
 325 struct be_cmd_req_mcc_create {
 326         struct be_cmd_req_hdr hdr;
 327         u16 num_pages;
 328         u16 rsvd0;
 329         u8 context[sizeof(struct amap_mcc_context) / 8];
 330         struct phys_addr pages[8];
 331 } __packed;
 332
 333 struct be_cmd_resp_mcc_create {
 334         struct be_cmd_resp_hdr hdr;
 335         u16 id;
 336         u16 rsvd0;
 337 } __packed;
 338
 339 /******************** Create TxQ ***************************/
 340 #define BE_ETH_TX_RING_TYPE_STANDARD            2
 341 #define BE_ULP1_NUM                             1
 342
 343 /* Pseudo amap definition in which each bit of the actual structure is defined
 344  * as a byte: used to calculate offset/shift/mask of each field */
 345 struct amap_tx_context {
 346         u8 rsvd0[16];           /* dword 0 */
 347         u8 tx_ring_size[4];     /* dword 0 */
 348         u8 rsvd1[26];           /* dword 0 */
 349         u8 pci_func_id[8];      /* dword 1 */
 350         u8 rsvd2[9];            /* dword 1 */
 351         u8 ctx_valid;           /* dword 1 */
 352         u8 cq_id_send[16];      /* dword 2 */
 353         u8 rsvd3[16];           /* dword 2 */
 354         u8 rsvd4[32];           /* dword 3 */
 355         u8 rsvd5[32];           /* dword 4 */
 356         u8 rsvd6[32];           /* dword 5 */
 357         u8 rsvd7[32];           /* dword 6 */
 358         u8 rsvd8[32];           /* dword 7 */
 359         u8 rsvd9[32];           /* dword 8 */
 360         u8 rsvd10[32];          /* dword 9 */
 361         u8 rsvd11[32];          /* dword 10 */
 362         u8 rsvd12[32];          /* dword 11 */
 363         u8 rsvd13[32];          /* dword 12 */
 364         u8 rsvd14[32];          /* dword 13 */
 365         u8 rsvd15[32];          /* dword 14 */
 366         u8 rsvd16[32];          /* dword 15 */
 367 } __packed;
 368
 369 struct be_cmd_req_eth_tx_create {
 370         struct be_cmd_req_hdr hdr;
 371         u8 num_pages;
 372         u8 ulp_num;
 373         u8 type;
 374         u8 bound_port;
 375         u8 context[sizeof(struct amap_tx_context) / 8];
 376         struct phys_addr pages[8];
 377 } __packed;
 378
 379 struct be_cmd_resp_eth_tx_create {
 380         struct be_cmd_resp_hdr hdr;
 381         u16 cid;
 382         u16 rsvd0;
 383 } __packed;
 384
 385 /******************** Create RxQ ***************************/
 386 struct be_cmd_req_eth_rx_create {
 387         struct be_cmd_req_hdr hdr;
 388         u16 cq_id;
 389         u8 frag_size;
 390         u8 num_pages;
 391         struct phys_addr pages[2];
 392         u32 interface_id;
 393         u16 max_frame_size;
 394         u16 rsvd0;
 395         u32 rss_queue;
 396 } __packed;
 397
 398 struct be_cmd_resp_eth_rx_create {
 399         struct be_cmd_resp_hdr hdr;
 400         u16 id;
 401         u8 cpu_id;
 402         u8 rsvd0;
 403 } __packed;
 404
 405 /******************** Q Destroy  ***************************/
 406 /* Type of Queue to be destroyed */
 407 enum {
 408         QTYPE_EQ = 1,
 409         QTYPE_CQ,
 410         QTYPE_TXQ,
 411         QTYPE_RXQ,
 412         QTYPE_MCCQ
 413 };
 414
 415 struct be_cmd_req_q_destroy {
 416         struct be_cmd_req_hdr hdr;
 417         u16 id;
 418         u16 bypass_flush;       /* valid only for rx q destroy */
 419 } __packed;
 420
 421 /************ I/f Create (it's actually I/f Config Create)**********/
 422
 423 /* Capability flags for the i/f */
 424 enum be_if_flags {
 425         BE_IF_FLAGS_RSS = 0x4,
 426         BE_IF_FLAGS_PROMISCUOUS = 0x8,
 427         BE_IF_FLAGS_BROADCAST = 0x10,
 428         BE_IF_FLAGS_UNTAGGED = 0x20,
 429         BE_IF_FLAGS_ULP = 0x40,
 430         BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
 431         BE_IF_FLAGS_VLAN = 0x100,
 432         BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
 433         BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
 434         BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800
 435 };
 436
 437 /* An RX interface is an object with one or more MAC addresses and
 438  * filtering capabilities. */
 439 struct be_cmd_req_if_create {
 440         struct be_cmd_req_hdr hdr;
 441         u32 version;            /* ignore currntly */
 442         u32 capability_flags;
 443         u32 enable_flags;
 444         u8 mac_addr[ETH_ALEN];
 445         u8 rsvd0;
 446         u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
 447         u32 vlan_tag;    /* not used currently */
 448 } __packed;
 449
 450 struct be_cmd_resp_if_create {
 451         struct be_cmd_resp_hdr hdr;
 452         u32 interface_id;
 453         u32 pmac_id;
 454 };
 455
 456 /****** I/f Destroy(it's actually I/f Config Destroy )**********/
 457 struct be_cmd_req_if_destroy {
 458         struct be_cmd_req_hdr hdr;
 459         u32 interface_id;
 460 };
 461
 462 /*************** HW Stats Get **********************************/
 463 struct be_port_rxf_stats {
 464         u32 rx_bytes_lsd;       /* dword 0*/
 465         u32 rx_bytes_msd;       /* dword 1*/
 466         u32 rx_total_frames;    /* dword 2*/
 467         u32 rx_unicast_frames;  /* dword 3*/
 468         u32 rx_multicast_frames;        /* dword 4*/
 469         u32 rx_broadcast_frames;        /* dword 5*/
 470         u32 rx_crc_errors;      /* dword 6*/
 471         u32 rx_alignment_symbol_errors; /* dword 7*/
 472         u32 rx_pause_frames;    /* dword 8*/
 473         u32 rx_control_frames;  /* dword 9*/
 474         u32 rx_in_range_errors; /* dword 10*/
 475         u32 rx_out_range_errors;        /* dword 11*/
 476         u32 rx_frame_too_long;  /* dword 12*/
 477         u32 rx_address_match_errors;    /* dword 13*/
 478         u32 rx_vlan_mismatch;   /* dword 14*/
 479         u32 rx_dropped_too_small;       /* dword 15*/
 480         u32 rx_dropped_too_short;       /* dword 16*/
 481         u32 rx_dropped_header_too_small;        /* dword 17*/
 482         u32 rx_dropped_tcp_length;      /* dword 18*/
 483         u32 rx_dropped_runt;    /* dword 19*/
 484         u32 rx_64_byte_packets; /* dword 20*/
 485         u32 rx_65_127_byte_packets;     /* dword 21*/
 486         u32 rx_128_256_byte_packets;    /* dword 22*/
 487         u32 rx_256_511_byte_packets;    /* dword 23*/
 488         u32 rx_512_1023_byte_packets;   /* dword 24*/
 489         u32 rx_1024_1518_byte_packets;  /* dword 25*/
 490         u32 rx_1519_2047_byte_packets;  /* dword 26*/
 491         u32 rx_2048_4095_byte_packets;  /* dword 27*/
 492         u32 rx_4096_8191_byte_packets;  /* dword 28*/
 493         u32 rx_8192_9216_byte_packets;  /* dword 29*/
 494         u32 rx_ip_checksum_errs;        /* dword 30*/
 495         u32 rx_tcp_checksum_errs;       /* dword 31*/
 496         u32 rx_udp_checksum_errs;       /* dword 32*/
 497         u32 rx_non_rss_packets; /* dword 33*/
 498         u32 rx_ipv4_packets;    /* dword 34*/
 499         u32 rx_ipv6_packets;    /* dword 35*/
 500         u32 rx_ipv4_bytes_lsd;  /* dword 36*/
 501         u32 rx_ipv4_bytes_msd;  /* dword 37*/
 502         u32 rx_ipv6_bytes_lsd;  /* dword 38*/
 503         u32 rx_ipv6_bytes_msd;  /* dword 39*/
 504         u32 rx_chute1_packets;  /* dword 40*/
 505         u32 rx_chute2_packets;  /* dword 41*/
 506         u32 rx_chute3_packets;  /* dword 42*/
 507         u32 rx_management_packets;      /* dword 43*/
 508         u32 rx_switched_unicast_packets;        /* dword 44*/
 509         u32 rx_switched_multicast_packets;      /* dword 45*/
 510         u32 rx_switched_broadcast_packets;      /* dword 46*/
 511         u32 tx_bytes_lsd;       /* dword 47*/
 512         u32 tx_bytes_msd;       /* dword 48*/
 513         u32 tx_unicastframes;   /* dword 49*/
 514         u32 tx_multicastframes; /* dword 50*/
 515         u32 tx_broadcastframes; /* dword 51*/
 516         u32 tx_pauseframes;     /* dword 52*/
 517         u32 tx_controlframes;   /* dword 53*/
 518         u32 tx_64_byte_packets; /* dword 54*/
 519         u32 tx_65_127_byte_packets;     /* dword 55*/
 520         u32 tx_128_256_byte_packets;    /* dword 56*/
 521         u32 tx_256_511_byte_packets;    /* dword 57*/
 522         u32 tx_512_1023_byte_packets;   /* dword 58*/
 523         u32 tx_1024_1518_byte_packets;  /* dword 59*/
 524         u32 tx_1519_2047_byte_packets;  /* dword 60*/
 525         u32 tx_2048_4095_byte_packets;  /* dword 61*/
 526         u32 tx_4096_8191_byte_packets;  /* dword 62*/
 527         u32 tx_8192_9216_byte_packets;  /* dword 63*/
 528         u32 rx_fifo_overflow;   /* dword 64*/
 529         u32 rx_input_fifo_overflow;     /* dword 65*/
 530 };
 531
 532 struct be_rxf_stats {
 533         struct be_port_rxf_stats port[2];
 534         u32 rx_drops_no_pbuf;   /* dword 132*/
 535         u32 rx_drops_no_txpb;   /* dword 133*/
 536         u32 rx_drops_no_erx_descr;      /* dword 134*/
 537         u32 rx_drops_no_tpre_descr;     /* dword 135*/
 538         u32 management_rx_port_packets; /* dword 136*/
 539         u32 management_rx_port_bytes;   /* dword 137*/
 540         u32 management_rx_port_pause_frames;    /* dword 138*/
 541         u32 management_rx_port_errors;  /* dword 139*/
 542         u32 management_tx_port_packets; /* dword 140*/
 543         u32 management_tx_port_bytes;   /* dword 141*/
 544         u32 management_tx_port_pause;   /* dword 142*/
 545         u32 management_rx_port_rxfifo_overflow; /* dword 143*/
 546         u32 rx_drops_too_many_frags;    /* dword 144*/
 547         u32 rx_drops_invalid_ring;      /* dword 145*/
 548         u32 forwarded_packets;  /* dword 146*/
 549         u32 rx_drops_mtu;       /* dword 147*/
 550         u32 rsvd0[15];
 551 };
 552
 553 struct be_erx_stats {
 554         u32 rx_drops_no_fragments[44];     /* dwordS 0 to 43*/
 555         u32 debug_wdma_sent_hold;          /* dword 44*/
 556         u32 debug_wdma_pbfree_sent_hold;   /* dword 45*/
 557         u32 debug_wdma_zerobyte_pbfree_sent_hold; /* dword 46*/
 558         u32 debug_pmem_pbuf_dealloc;       /* dword 47*/
 559 };
 560
 561 struct be_hw_stats {
 562         struct be_rxf_stats rxf;
 563         u32 rsvd[48];
 564         struct be_erx_stats erx;
 565 };
 566
 567 struct be_cmd_req_get_stats {
 568         struct be_cmd_req_hdr hdr;
 569         u8 rsvd[sizeof(struct be_hw_stats)];
 570 };
 571
 572 struct be_cmd_resp_get_stats {
 573         struct be_cmd_resp_hdr hdr;
 574         struct be_hw_stats hw_stats;
 575 };
 576
 577 struct be_cmd_req_vlan_config {
 578         struct be_cmd_req_hdr hdr;
 579         u8 interface_id;
 580         u8 promiscuous;
 581         u8 untagged;
 582         u8 num_vlan;
 583         u16 normal_vlan[64];
 584 } __packed;
 585
 586 struct be_cmd_req_promiscuous_config {
 587         struct be_cmd_req_hdr hdr;
 588         u8 port0_promiscuous;
 589         u8 port1_promiscuous;
 590         u16 rsvd0;
 591 } __packed;
 592
 593 struct macaddr {
 594         u8 byte[ETH_ALEN];
 595 };
 596
 597 struct be_cmd_req_mcast_mac_config {
 598         struct be_cmd_req_hdr hdr;
 599         u16 num_mac;
 600         u8 promiscuous;
 601         u8 interface_id;
 602         struct macaddr mac[32];
 603 } __packed;
 604
 605 static inline struct be_hw_stats *
 606 hw_stats_from_cmd(struct be_cmd_resp_get_stats *cmd)
 607 {
 608         return &cmd->hw_stats;
 609 }
 610
 611 /******************** Link Status Query *******************/
 612 struct be_cmd_req_link_status {
 613         struct be_cmd_req_hdr hdr;
 614         u32 rsvd;
 615 };
 616
 617 enum {
 618         PHY_LINK_DUPLEX_NONE = 0x0,
 619         PHY_LINK_DUPLEX_HALF = 0x1,
 620         PHY_LINK_DUPLEX_FULL = 0x2
 621 };
 622
 623 enum {
 624         PHY_LINK_SPEED_ZERO = 0x0,      /* => No link */
 625         PHY_LINK_SPEED_10MBPS = 0x1,
 626         PHY_LINK_SPEED_100MBPS = 0x2,
 627         PHY_LINK_SPEED_1GBPS = 0x3,
 628         PHY_LINK_SPEED_10GBPS = 0x4
 629 };
 630
 631 struct be_cmd_resp_link_status {
 632         struct be_cmd_resp_hdr hdr;
 633         u8 physical_port;
 634         u8 mac_duplex;
 635         u8 mac_speed;
 636         u8 mac_fault;
 637         u8 mgmt_mac_duplex;
 638         u8 mgmt_mac_speed;
 639         u16 link_speed;
 640         u32 rsvd0;
 641 } __packed;
 642
 643 /******************** Port Identification ***************************/
 644 /*    Identifies the type of port attached to NIC     */
 645 struct be_cmd_req_port_type {
 646         struct be_cmd_req_hdr hdr;
 647         u32 page_num;
 648         u32 port;
 649 };
 650
 651 enum {
 652         TR_PAGE_A0 = 0xa0,
 653         TR_PAGE_A2 = 0xa2
 654 };
 655
 656 struct be_cmd_resp_port_type {
 657         struct be_cmd_resp_hdr hdr;
 658         u32 page_num;
 659         u32 port;
 660         struct data {
 661                 u8 identifier;
 662                 u8 identifier_ext;
 663                 u8 connector;
 664                 u8 transceiver[8];
 665                 u8 rsvd0[3];
 666                 u8 length_km;
 667                 u8 length_hm;
 668                 u8 length_om1;
 669                 u8 length_om2;
 670                 u8 length_cu;
 671                 u8 length_cu_m;
 672                 u8 vendor_name[16];
 673                 u8 rsvd;
 674                 u8 vendor_oui[3];
 675                 u8 vendor_pn[16];
 676                 u8 vendor_rev[4];
 677         } data;
 678 };
 679
 680 /******************** Get FW Version *******************/
 681 struct be_cmd_req_get_fw_version {
 682         struct be_cmd_req_hdr hdr;
 683         u8 rsvd0[FW_VER_LEN];
 684         u8 rsvd1[FW_VER_LEN];
 685 } __packed;
 686
 687 struct be_cmd_resp_get_fw_version {
 688         struct be_cmd_resp_hdr hdr;
 689         u8 firmware_version_string[FW_VER_LEN];
 690         u8 fw_on_flash_version_string[FW_VER_LEN];
 691 } __packed;
 692
 693 /******************** Set Flow Contrl *******************/
 694 struct be_cmd_req_set_flow_control {
 695         struct be_cmd_req_hdr hdr;
 696         u16 tx_flow_control;
 697         u16 rx_flow_control;
 698 } __packed;
 699
 700 /******************** Get Flow Contrl *******************/
 701 struct be_cmd_req_get_flow_control {
 702         struct be_cmd_req_hdr hdr;
 703         u32 rsvd;
 704 };
 705
 706 struct be_cmd_resp_get_flow_control {
 707         struct be_cmd_resp_hdr hdr;
 708         u16 tx_flow_control;
 709         u16 rx_flow_control;
 710 } __packed;
 711
 712 /******************** Modify EQ Delay *******************/
 713 struct be_cmd_req_modify_eq_delay {
 714         struct be_cmd_req_hdr hdr;
 715         u32 num_eq;
 716         struct {
 717                 u32 eq_id;
 718                 u32 phase;
 719                 u32 delay_multiplier;
 720         } delay[8];
 721 } __packed;
 722
 723 struct be_cmd_resp_modify_eq_delay {
 724         struct be_cmd_resp_hdr hdr;
 725         u32 rsvd0;
 726 } __packed;
 727
 728 /******************** Get FW Config *******************/
 729 struct be_cmd_req_query_fw_cfg {
 730         struct be_cmd_req_hdr hdr;
 731         u32 rsvd[30];
 732 };
 733
 734 struct be_cmd_resp_query_fw_cfg {
 735         struct be_cmd_resp_hdr hdr;
 736         u32 be_config_number;
 737         u32 asic_revision;
 738         u32 phys_port;
 739         u32 function_cap;
 740         u32 rsvd[26];
 741 };
 742
 743 /******************** Port Beacon ***************************/
 744
 745 #define BEACON_STATE_ENABLED            0x1
 746 #define BEACON_STATE_DISABLED           0x0
 747
 748 struct be_cmd_req_enable_disable_beacon {
 749         struct be_cmd_req_hdr hdr;
 750         u8  port_num;
 751         u8  beacon_state;
 752         u8  beacon_duration;
 753         u8  status_duration;
 754 } __packed;
 755
 756 struct be_cmd_resp_enable_disable_beacon {
 757         struct be_cmd_resp_hdr resp_hdr;
 758         u32 rsvd0;
 759 } __packed;
 760
 761 struct be_cmd_req_get_beacon_state {
 762         struct be_cmd_req_hdr hdr;
 763         u8  port_num;
 764         u8  rsvd0;
 765         u16 rsvd1;
 766 } __packed;
 767
 768 struct be_cmd_resp_get_beacon_state {
 769         struct be_cmd_resp_hdr resp_hdr;
 770         u8 beacon_state;
 771         u8 rsvd0[3];
 772 } __packed;
 773
 774 /****************** Firmware Flash ******************/
 775 struct flashrom_params {
 776         u32 op_code;
 777         u32 op_type;
 778         u32 data_buf_size;
 779         u32 offset;
 780         u8 data_buf[4];
 781 };
 782
 783 struct be_cmd_write_flashrom {
 784         struct be_cmd_req_hdr hdr;
 785         struct flashrom_params params;
 786 };
 787
 788 extern int be_pci_fnum_get(struct be_adapter *adapter);
 789 extern int be_cmd_POST(struct be_adapter *adapter);
 790 extern int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
 791                         u8 type, bool permanent, u32 if_handle);
 792 extern int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
 793                         u32 if_id, u32 *pmac_id);
 794 extern int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id);
 795 extern int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags,
 796                         u32 en_flags, u8 *mac, bool pmac_invalid,
 797                         u32 *if_handle, u32 *pmac_id);
 798 extern int be_cmd_if_destroy(struct be_adapter *adapter, u32 if_handle);
 799 extern int be_cmd_eq_create(struct be_adapter *adapter,
 800                         struct be_queue_info *eq, int eq_delay);
 801 extern int be_cmd_cq_create(struct be_adapter *adapter,
 802                         struct be_queue_info *cq, struct be_queue_info *eq,
 803                         bool sol_evts, bool no_delay,
 804                         int num_cqe_dma_coalesce);
 805 extern int be_cmd_mccq_create(struct be_adapter *adapter,
 806                         struct be_queue_info *mccq,
 807                         struct be_queue_info *cq);
 808 extern int be_cmd_txq_create(struct be_adapter *adapter,
 809                         struct be_queue_info *txq,
 810                         struct be_queue_info *cq);
 811 extern int be_cmd_rxq_create(struct be_adapter *adapter,
 812                         struct be_queue_info *rxq, u16 cq_id,
 813                         u16 frag_size, u16 max_frame_size, u32 if_id,
 814                         u32 rss);
 815 extern int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
 816                         int type);
 817 extern int be_cmd_link_status_query(struct be_adapter *adapter,
 818                         bool *link_up, u8 *mac_speed, u16 *link_speed);
 819 extern int be_cmd_reset(struct be_adapter *adapter);
 820 extern int be_cmd_get_stats(struct be_adapter *adapter,
 821                         struct be_dma_mem *nonemb_cmd);
 822 extern int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver);
 823
 824 extern int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd);
 825 extern int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id,
 826                         u16 *vtag_array, u32 num, bool untagged,
 827                         bool promiscuous);
 828 extern int be_cmd_promiscuous_config(struct be_adapter *adapter,
 829                         u8 port_num, bool en);
 830 extern int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id,
 831                         struct dev_mc_list *mc_list, u32 mc_count);
 832 extern int be_cmd_set_flow_control(struct be_adapter *adapter,
 833                         u32 tx_fc, u32 rx_fc);
 834 extern int be_cmd_get_flow_control(struct be_adapter *adapter,
 835                         u32 *tx_fc, u32 *rx_fc);
 836 extern int be_cmd_query_fw_cfg(struct be_adapter *adapter,
 837                         u32 *port_num, u32 *cap);
 838 extern int be_cmd_reset_function(struct be_adapter *adapter);
 839 extern int be_process_mcc(struct be_adapter *adapter);
 840 extern int be_cmd_set_beacon_state(struct be_adapter *adapter,
 841                         u8 port_num, u8 beacon, u8 status, u8 state);
 842 extern int be_cmd_get_beacon_state(struct be_adapter *adapter,
 843                         u8 port_num, u32 *state);
 844 extern int be_cmd_read_port_type(struct be_adapter *adapter, u32 port,
 845                                         u8 *connector);
 846 extern int be_cmd_write_flashrom(struct be_adapter *adapter,
 847                         struct be_dma_mem *cmd, u32 flash_oper,
 848                         u32 flash_opcode, u32 buf_size);