drivers/gpu/drm/vmwgfx/vmwgfx_drv.c

   1 /**************************************************************************
   2  *
   3  * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "drmP.h"
  29 #include "vmwgfx_drv.h"
  30 #include "ttm/ttm_placement.h"
  31 #include "ttm/ttm_bo_driver.h"
  32 #include "ttm/ttm_object.h"
  33 #include "ttm/ttm_module.h"
  34
  35 #define VMWGFX_DRIVER_NAME "vmwgfx"
  36 #define VMWGFX_DRIVER_DESC "Linux drm driver for VMware graphics devices"
  37 #define VMWGFX_CHIP_SVGAII 0
  38 #define VMW_FB_RESERVATION 0
  39
  40 /**
  41  * Fully encoded drm commands. Might move to vmw_drm.h
  42  */
  43
  44 #define DRM_IOCTL_VMW_GET_PARAM                                 \
  45         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GET_PARAM,          \
  46                  struct drm_vmw_getparam_arg)
  47 #define DRM_IOCTL_VMW_ALLOC_DMABUF                              \
  48         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_ALLOC_DMABUF,       \
  49                 union drm_vmw_alloc_dmabuf_arg)
  50 #define DRM_IOCTL_VMW_UNREF_DMABUF                              \
  51         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_DMABUF,        \
  52                 struct drm_vmw_unref_dmabuf_arg)
  53 #define DRM_IOCTL_VMW_CURSOR_BYPASS                             \
  54         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CURSOR_BYPASS,       \
  55                  struct drm_vmw_cursor_bypass_arg)
  56
  57 #define DRM_IOCTL_VMW_CONTROL_STREAM                            \
  58         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CONTROL_STREAM,      \
  59                  struct drm_vmw_control_stream_arg)
  60 #define DRM_IOCTL_VMW_CLAIM_STREAM                              \
  61         DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CLAIM_STREAM,        \
  62                  struct drm_vmw_stream_arg)
  63 #define DRM_IOCTL_VMW_UNREF_STREAM                              \
  64         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_STREAM,        \
  65                  struct drm_vmw_stream_arg)
  66
  67 #define DRM_IOCTL_VMW_CREATE_CONTEXT                            \
  68         DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CREATE_CONTEXT,      \
  69                 struct drm_vmw_context_arg)
  70 #define DRM_IOCTL_VMW_UNREF_CONTEXT                             \
  71         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_CONTEXT,       \
  72                 struct drm_vmw_context_arg)
  73 #define DRM_IOCTL_VMW_CREATE_SURFACE                            \
  74         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_CREATE_SURFACE,     \
  75                  union drm_vmw_surface_create_arg)
  76 #define DRM_IOCTL_VMW_UNREF_SURFACE                             \
  77         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_SURFACE,       \
  78                  struct drm_vmw_surface_arg)
  79 #define DRM_IOCTL_VMW_REF_SURFACE                               \
  80         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_REF_SURFACE,        \
  81                  union drm_vmw_surface_reference_arg)
  82 #define DRM_IOCTL_VMW_EXECBUF                                   \
  83         DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_EXECBUF,             \
  84                 struct drm_vmw_execbuf_arg)
  85 #define DRM_IOCTL_VMW_FIFO_DEBUG                                \
  86         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FIFO_DEBUG,         \
  87                  struct drm_vmw_fifo_debug_arg)
  88 #define DRM_IOCTL_VMW_FENCE_WAIT                                \
  89         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FENCE_WAIT,         \
  90                  struct drm_vmw_fence_wait_arg)
  91 #define DRM_IOCTL_VMW_UPDATE_LAYOUT                             \
  92         DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_UPDATE_LAYOUT,      \
  93                  struct drm_vmw_update_layout_arg)
  94
  95
  96 /**
  97  * The core DRM version of this macro doesn't account for
  98  * DRM_COMMAND_BASE.
  99  */
 100
 101 #define VMW_IOCTL_DEF(ioctl, func, flags) \
 102   [DRM_IOCTL_NR(DRM_IOCTL_##ioctl) - DRM_COMMAND_BASE] = {DRM_##ioctl, flags, func, DRM_IOCTL_##ioctl}
 103
 104 /**
 105  * Ioctl definitions.
 106  */
 107
 108 static struct drm_ioctl_desc vmw_ioctls[] = {
 109         VMW_IOCTL_DEF(VMW_GET_PARAM, vmw_getparam_ioctl,
 110                       DRM_AUTH | DRM_UNLOCKED),
 111         VMW_IOCTL_DEF(VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
 112                       DRM_AUTH | DRM_UNLOCKED),
 113         VMW_IOCTL_DEF(VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl,
 114                       DRM_AUTH | DRM_UNLOCKED),
 115         VMW_IOCTL_DEF(VMW_CURSOR_BYPASS,
 116                       vmw_kms_cursor_bypass_ioctl,
 117                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
 118
 119         VMW_IOCTL_DEF(VMW_CONTROL_STREAM, vmw_overlay_ioctl,
 120                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
 121         VMW_IOCTL_DEF(VMW_CLAIM_STREAM, vmw_stream_claim_ioctl,
 122                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
 123         VMW_IOCTL_DEF(VMW_UNREF_STREAM, vmw_stream_unref_ioctl,
 124                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
 125
 126         VMW_IOCTL_DEF(VMW_CREATE_CONTEXT, vmw_context_define_ioctl,
 127                       DRM_AUTH | DRM_UNLOCKED),
 128         VMW_IOCTL_DEF(VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl,
 129                       DRM_AUTH | DRM_UNLOCKED),
 130         VMW_IOCTL_DEF(VMW_CREATE_SURFACE, vmw_surface_define_ioctl,
 131                       DRM_AUTH | DRM_UNLOCKED),
 132         VMW_IOCTL_DEF(VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl,
 133                       DRM_AUTH | DRM_UNLOCKED),
 134         VMW_IOCTL_DEF(VMW_REF_SURFACE, vmw_surface_reference_ioctl,
 135                       DRM_AUTH | DRM_UNLOCKED),
 136         VMW_IOCTL_DEF(VMW_EXECBUF, vmw_execbuf_ioctl,
 137                       DRM_AUTH | DRM_UNLOCKED),
 138         VMW_IOCTL_DEF(VMW_FIFO_DEBUG, vmw_fifo_debug_ioctl,
 139                       DRM_AUTH | DRM_ROOT_ONLY | DRM_MASTER | DRM_UNLOCKED),
 140         VMW_IOCTL_DEF(VMW_FENCE_WAIT, vmw_fence_wait_ioctl,
 141                       DRM_AUTH | DRM_UNLOCKED),
 142         VMW_IOCTL_DEF(VMW_UPDATE_LAYOUT, vmw_kms_update_layout_ioctl,
 143                       DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED)
 144 };
 145
 146 static struct pci_device_id vmw_pci_id_list[] = {
 147         {0x15ad, 0x0405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VMWGFX_CHIP_SVGAII},
 148         {0, 0, 0}
 149 };
 150
 151 static char *vmw_devname = "vmwgfx";
 152 static int enable_fbdev;
 153
 154 static int vmw_probe(struct pci_dev *, const struct pci_device_id *);
 155 static void vmw_master_init(struct vmw_master *);
 156 static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
 157                               void *ptr);
 158
 159 MODULE_PARM_DESC(enable_fbdev, "Enable vmwgfx fbdev");
 160 module_param_named(enable_fbdev, enable_fbdev, int, 0600);
 161
 162 static void vmw_print_capabilities(uint32_t capabilities)
 163 {
 164         DRM_INFO("Capabilities:\n");
 165         if (capabilities & SVGA_CAP_RECT_COPY)
 166                 DRM_INFO("  Rect copy.\n");
 167         if (capabilities & SVGA_CAP_CURSOR)
 168                 DRM_INFO("  Cursor.\n");
 169         if (capabilities & SVGA_CAP_CURSOR_BYPASS)
 170                 DRM_INFO("  Cursor bypass.\n");
 171         if (capabilities & SVGA_CAP_CURSOR_BYPASS_2)
 172                 DRM_INFO("  Cursor bypass 2.\n");
 173         if (capabilities & SVGA_CAP_8BIT_EMULATION)
 174                 DRM_INFO("  8bit emulation.\n");
 175         if (capabilities & SVGA_CAP_ALPHA_CURSOR)
 176                 DRM_INFO("  Alpha cursor.\n");
 177         if (capabilities & SVGA_CAP_3D)
 178                 DRM_INFO("  3D.\n");
 179         if (capabilities & SVGA_CAP_EXTENDED_FIFO)
 180                 DRM_INFO("  Extended Fifo.\n");
 181         if (capabilities & SVGA_CAP_MULTIMON)
 182                 DRM_INFO("  Multimon.\n");
 183         if (capabilities & SVGA_CAP_PITCHLOCK)
 184                 DRM_INFO("  Pitchlock.\n");
 185         if (capabilities & SVGA_CAP_IRQMASK)
 186                 DRM_INFO("  Irq mask.\n");
 187         if (capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)
 188                 DRM_INFO("  Display Topology.\n");
 189         if (capabilities & SVGA_CAP_GMR)
 190                 DRM_INFO("  GMR.\n");
 191         if (capabilities & SVGA_CAP_TRACES)
 192                 DRM_INFO("  Traces.\n");
 193 }
 194
 195 static int vmw_request_device(struct vmw_private *dev_priv)
 196 {
 197         int ret;
 198
 199         ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
 200         if (unlikely(ret != 0)) {
 201                 DRM_ERROR("Unable to initialize FIFO.\n");
 202                 return ret;
 203         }
 204
 205         return 0;
 206 }
 207
 208 static void vmw_release_device(struct vmw_private *dev_priv)
 209 {
 210         vmw_fifo_release(dev_priv, &dev_priv->fifo);
 211 }
 212
 213 int vmw_3d_resource_inc(struct vmw_private *dev_priv)
 214 {
 215         int ret = 0;
 216
 217         mutex_lock(&dev_priv->release_mutex);
 218         if (unlikely(dev_priv->num_3d_resources++ == 0)) {
 219                 ret = vmw_request_device(dev_priv);
 220                 if (unlikely(ret != 0))
 221                         --dev_priv->num_3d_resources;
 222         }
 223         mutex_unlock(&dev_priv->release_mutex);
 224         return ret;
 225 }
 226
 227
 228 void vmw_3d_resource_dec(struct vmw_private *dev_priv)
 229 {
 230         int32_t n3d;
 231
 232         mutex_lock(&dev_priv->release_mutex);
 233         if (unlikely(--dev_priv->num_3d_resources == 0))
 234                 vmw_release_device(dev_priv);
 235         n3d = (int32_t) dev_priv->num_3d_resources;
 236         mutex_unlock(&dev_priv->release_mutex);
 237
 238         BUG_ON(n3d < 0);
 239 }
 240
 241 static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
 242 {
 243         struct vmw_private *dev_priv;
 244         int ret;
 245         uint32_t svga_id;
 246
 247         dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
 248         if (unlikely(dev_priv == NULL)) {
 249                 DRM_ERROR("Failed allocating a device private struct.\n");
 250                 return -ENOMEM;
 251         }
 252         memset(dev_priv, 0, sizeof(*dev_priv));
 253
 254         dev_priv->dev = dev;
 255         dev_priv->vmw_chipset = chipset;
 256         dev_priv->last_read_sequence = (uint32_t) -100;
 257         mutex_init(&dev_priv->hw_mutex);
 258         mutex_init(&dev_priv->cmdbuf_mutex);
 259         mutex_init(&dev_priv->release_mutex);
 260         rwlock_init(&dev_priv->resource_lock);
 261         idr_init(&dev_priv->context_idr);
 262         idr_init(&dev_priv->surface_idr);
 263         idr_init(&dev_priv->stream_idr);
 264         ida_init(&dev_priv->gmr_ida);
 265         mutex_init(&dev_priv->init_mutex);
 266         init_waitqueue_head(&dev_priv->fence_queue);
 267         init_waitqueue_head(&dev_priv->fifo_queue);
 268         atomic_set(&dev_priv->fence_queue_waiters, 0);
 269         atomic_set(&dev_priv->fifo_queue_waiters, 0);
 270         INIT_LIST_HEAD(&dev_priv->gmr_lru);
 271
 272         dev_priv->io_start = pci_resource_start(dev->pdev, 0);
 273         dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
 274         dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
 275
 276         dev_priv->enable_fb = enable_fbdev;
 277
 278         mutex_lock(&dev_priv->hw_mutex);
 279
 280         vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
 281         svga_id = vmw_read(dev_priv, SVGA_REG_ID);
 282         if (svga_id != SVGA_ID_2) {
 283                 ret = -ENOSYS;
 284                 DRM_ERROR("Unsuported SVGA ID 0x%x\n", svga_id);
 285                 mutex_unlock(&dev_priv->hw_mutex);
 286                 goto out_err0;
 287         }
 288
 289         dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);
 290
 291         if (dev_priv->capabilities & SVGA_CAP_GMR) {
 292                 dev_priv->max_gmr_descriptors =
 293                         vmw_read(dev_priv,
 294                                  SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH);
 295                 dev_priv->max_gmr_ids =
 296                         vmw_read(dev_priv, SVGA_REG_GMR_MAX_IDS);
 297         }
 298
 299         dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE);
 300         dev_priv->mmio_size = vmw_read(dev_priv, SVGA_REG_MEM_SIZE);
 301         dev_priv->fb_max_width = vmw_read(dev_priv, SVGA_REG_MAX_WIDTH);
 302         dev_priv->fb_max_height = vmw_read(dev_priv, SVGA_REG_MAX_HEIGHT);
 303
 304         mutex_unlock(&dev_priv->hw_mutex);
 305
 306         vmw_print_capabilities(dev_priv->capabilities);
 307
 308         if (dev_priv->capabilities & SVGA_CAP_GMR) {
 309                 DRM_INFO("Max GMR ids is %u\n",
 310                          (unsigned)dev_priv->max_gmr_ids);
 311                 DRM_INFO("Max GMR descriptors is %u\n",
 312                          (unsigned)dev_priv->max_gmr_descriptors);
 313         }
 314         DRM_INFO("VRAM at 0x%08x size is %u kiB\n",
 315                  dev_priv->vram_start, dev_priv->vram_size / 1024);
 316         DRM_INFO("MMIO at 0x%08x size is %u kiB\n",
 317                  dev_priv->mmio_start, dev_priv->mmio_size / 1024);
 318
 319         ret = vmw_ttm_global_init(dev_priv);
 320         if (unlikely(ret != 0))
 321                 goto out_err0;
 322
 323
 324         vmw_master_init(&dev_priv->fbdev_master);
 325         ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
 326         dev_priv->active_master = &dev_priv->fbdev_master;
 327
 328
 329         ret = ttm_bo_device_init(&dev_priv->bdev,
 330                                  dev_priv->bo_global_ref.ref.object,
 331                                  &vmw_bo_driver, VMWGFX_FILE_PAGE_OFFSET,
 332                                  false);
 333         if (unlikely(ret != 0)) {
 334                 DRM_ERROR("Failed initializing TTM buffer object driver.\n");
 335                 goto out_err1;
 336         }
 337
 338         ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
 339                              (dev_priv->vram_size >> PAGE_SHIFT));
 340         if (unlikely(ret != 0)) {
 341                 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
 342                 goto out_err2;
 343         }
 344
 345         dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start,
 346                                            dev_priv->mmio_size, DRM_MTRR_WC);
 347
 348         dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
 349                                          dev_priv->mmio_size);
 350
 351         if (unlikely(dev_priv->mmio_virt == NULL)) {
 352                 ret = -ENOMEM;
 353                 DRM_ERROR("Failed mapping MMIO.\n");
 354                 goto out_err3;
 355         }
 356
 357         /* Need mmio memory to check for fifo pitchlock cap. */
 358         if (!(dev_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY) &&
 359             !(dev_priv->capabilities & SVGA_CAP_PITCHLOCK) &&
 360             !vmw_fifo_have_pitchlock(dev_priv)) {
 361                 ret = -ENOSYS;
 362                 DRM_ERROR("Hardware has no pitchlock\n");
 363                 goto out_err4;
 364         }
 365
 366         dev_priv->tdev = ttm_object_device_init
 367             (dev_priv->mem_global_ref.object, 12);
 368
 369         if (unlikely(dev_priv->tdev == NULL)) {
 370                 DRM_ERROR("Unable to initialize TTM object management.\n");
 371                 ret = -ENOMEM;
 372                 goto out_err4;
 373         }
 374
 375         dev->dev_private = dev_priv;
 376
 377         ret = pci_request_regions(dev->pdev, "vmwgfx probe");
 378         dev_priv->stealth = (ret != 0);
 379         if (dev_priv->stealth) {
 380                 /**
 381                  * Request at least the mmio PCI resource.
 382                  */
 383
 384                 DRM_INFO("It appears like vesafb is loaded. "
 385                          "Ignore above error if any.\n");
 386                 ret = pci_request_region(dev->pdev, 2, "vmwgfx stealth probe");
 387                 if (unlikely(ret != 0)) {
 388                         DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
 389                         goto out_no_device;
 390                 }
 391         }
 392         ret = vmw_kms_init(dev_priv);
 393         if (unlikely(ret != 0))
 394                 goto out_no_kms;
 395         vmw_overlay_init(dev_priv);
 396         if (dev_priv->enable_fb) {
 397                 ret = vmw_3d_resource_inc(dev_priv);
 398                 if (unlikely(ret != 0))
 399                         goto out_no_fifo;
 400                 vmw_kms_save_vga(dev_priv);
 401                 vmw_fb_init(dev_priv);
 402                 DRM_INFO("%s", vmw_fifo_have_3d(dev_priv) ?
 403                          "Detected device 3D availability.\n" :
 404                          "Detected no device 3D availability.\n");
 405         } else {
 406                 DRM_INFO("Delayed 3D detection since we're not "
 407                          "running the device in SVGA mode yet.\n");
 408         }
 409
 410         if (!dev->devname)
 411                 dev->devname = vmw_devname;
 412
 413         if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
 414                 ret = drm_irq_install(dev);
 415                 if (unlikely(ret != 0)) {
 416                         DRM_ERROR("Failed installing irq: %d\n", ret);
 417                         goto out_no_irq;
 418                 }
 419         }
 420
 421         dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier;
 422         register_pm_notifier(&dev_priv->pm_nb);
 423
 424         return 0;
 425
 426 out_no_irq:
 427         if (dev_priv->enable_fb) {
 428                 vmw_fb_close(dev_priv);
 429                 vmw_kms_restore_vga(dev_priv);
 430                 vmw_3d_resource_dec(dev_priv);
 431         }
 432 out_no_fifo:
 433         vmw_overlay_close(dev_priv);
 434         vmw_kms_close(dev_priv);
 435 out_no_kms:
 436         if (dev_priv->stealth)
 437                 pci_release_region(dev->pdev, 2);
 438         else
 439                 pci_release_regions(dev->pdev);
 440 out_no_device:
 441         ttm_object_device_release(&dev_priv->tdev);
 442 out_err4:
 443         iounmap(dev_priv->mmio_virt);
 444 out_err3:
 445         drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
 446                      dev_priv->mmio_size, DRM_MTRR_WC);
 447         (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
 448 out_err2:
 449         (void)ttm_bo_device_release(&dev_priv->bdev);
 450 out_err1:
 451         vmw_ttm_global_release(dev_priv);
 452 out_err0:
 453         ida_destroy(&dev_priv->gmr_ida);
 454         idr_destroy(&dev_priv->surface_idr);
 455         idr_destroy(&dev_priv->context_idr);
 456         idr_destroy(&dev_priv->stream_idr);
 457         kfree(dev_priv);
 458         return ret;
 459 }
 460
 461 static int vmw_driver_unload(struct drm_device *dev)
 462 {
 463         struct vmw_private *dev_priv = vmw_priv(dev);
 464
 465         unregister_pm_notifier(&dev_priv->pm_nb);
 466
 467         if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
 468                 drm_irq_uninstall(dev_priv->dev);
 469         if (dev->devname == vmw_devname)
 470                 dev->devname = NULL;
 471         if (dev_priv->enable_fb) {
 472                 vmw_fb_close(dev_priv);
 473                 vmw_kms_restore_vga(dev_priv);
 474                 vmw_3d_resource_dec(dev_priv);
 475         }
 476         vmw_kms_close(dev_priv);
 477         vmw_overlay_close(dev_priv);
 478         if (dev_priv->stealth)
 479                 pci_release_region(dev->pdev, 2);
 480         else
 481                 pci_release_regions(dev->pdev);
 482
 483         ttm_object_device_release(&dev_priv->tdev);
 484         iounmap(dev_priv->mmio_virt);
 485         drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
 486                      dev_priv->mmio_size, DRM_MTRR_WC);
 487         (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
 488         (void)ttm_bo_device_release(&dev_priv->bdev);
 489         vmw_ttm_global_release(dev_priv);
 490         ida_destroy(&dev_priv->gmr_ida);
 491         idr_destroy(&dev_priv->surface_idr);
 492         idr_destroy(&dev_priv->context_idr);
 493         idr_destroy(&dev_priv->stream_idr);
 494
 495         kfree(dev_priv);
 496
 497         return 0;
 498 }
 499
 500 static void vmw_postclose(struct drm_device *dev,
 501                          struct drm_file *file_priv)
 502 {
 503         struct vmw_fpriv *vmw_fp;
 504
 505         vmw_fp = vmw_fpriv(file_priv);
 506         ttm_object_file_release(&vmw_fp->tfile);
 507         if (vmw_fp->locked_master)
 508                 drm_master_put(&vmw_fp->locked_master);
 509         kfree(vmw_fp);
 510 }
 511
 512 static int vmw_driver_open(struct drm_device *dev, struct drm_file *file_priv)
 513 {
 514         struct vmw_private *dev_priv = vmw_priv(dev);
 515         struct vmw_fpriv *vmw_fp;
 516         int ret = -ENOMEM;
 517
 518         vmw_fp = kzalloc(sizeof(*vmw_fp), GFP_KERNEL);
 519         if (unlikely(vmw_fp == NULL))
 520                 return ret;
 521
 522         vmw_fp->tfile = ttm_object_file_init(dev_priv->tdev, 10);
 523         if (unlikely(vmw_fp->tfile == NULL))
 524                 goto out_no_tfile;
 525
 526         file_priv->driver_priv = vmw_fp;
 527
 528         if (unlikely(dev_priv->bdev.dev_mapping == NULL))
 529                 dev_priv->bdev.dev_mapping =
 530                         file_priv->filp->f_path.dentry->d_inode->i_mapping;
 531
 532         return 0;
 533
 534 out_no_tfile:
 535         kfree(vmw_fp);
 536         return ret;
 537 }
 538
 539 static long vmw_unlocked_ioctl(struct file *filp, unsigned int cmd,
 540                                unsigned long arg)
 541 {
 542         struct drm_file *file_priv = filp->private_data;
 543         struct drm_device *dev = file_priv->minor->dev;
 544         unsigned int nr = DRM_IOCTL_NR(cmd);
 545
 546         /*
 547          * Do extra checking on driver private ioctls.
 548          */
 549
 550         if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
 551             && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
 552                 struct drm_ioctl_desc *ioctl =
 553                     &vmw_ioctls[nr - DRM_COMMAND_BASE];
 554
 555                 if (unlikely(ioctl->cmd_drv != cmd)) {
 556                         DRM_ERROR("Invalid command format, ioctl %d\n",
 557                                   nr - DRM_COMMAND_BASE);
 558                         return -EINVAL;
 559                 }
 560         }
 561
 562         return drm_ioctl(filp, cmd, arg);
 563 }
 564
 565 static int vmw_firstopen(struct drm_device *dev)
 566 {
 567         struct vmw_private *dev_priv = vmw_priv(dev);
 568         dev_priv->is_opened = true;
 569
 570         return 0;
 571 }
 572
 573 static void vmw_lastclose(struct drm_device *dev)
 574 {
 575         struct vmw_private *dev_priv = vmw_priv(dev);
 576         struct drm_crtc *crtc;
 577         struct drm_mode_set set;
 578         int ret;
 579
 580         /**
 581          * Do nothing on the lastclose call from drm_unload.
 582          */
 583
 584         if (!dev_priv->is_opened)
 585                 return;
 586
 587         dev_priv->is_opened = false;
 588         set.x = 0;
 589         set.y = 0;
 590         set.fb = NULL;
 591         set.mode = NULL;
 592         set.connectors = NULL;
 593         set.num_connectors = 0;
 594
 595         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 596                 set.crtc = crtc;
 597                 ret = crtc->funcs->set_config(&set);
 598                 WARN_ON(ret != 0);
 599         }
 600
 601 }
 602
 603 static void vmw_master_init(struct vmw_master *vmaster)
 604 {
 605         ttm_lock_init(&vmaster->lock);
 606 }
 607
 608 static int vmw_master_create(struct drm_device *dev,
 609                              struct drm_master *master)
 610 {
 611         struct vmw_master *vmaster;
 612
 613         vmaster = kzalloc(sizeof(*vmaster), GFP_KERNEL);
 614         if (unlikely(vmaster == NULL))
 615                 return -ENOMEM;
 616
 617         ttm_lock_init(&vmaster->lock);
 618         ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
 619         master->driver_priv = vmaster;
 620
 621         return 0;
 622 }
 623
 624 static void vmw_master_destroy(struct drm_device *dev,
 625                                struct drm_master *master)
 626 {
 627         struct vmw_master *vmaster = vmw_master(master);
 628
 629         master->driver_priv = NULL;
 630         kfree(vmaster);
 631 }
 632
 633
 634 static int vmw_master_set(struct drm_device *dev,
 635                           struct drm_file *file_priv,
 636                           bool from_open)
 637 {
 638         struct vmw_private *dev_priv = vmw_priv(dev);
 639         struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
 640         struct vmw_master *active = dev_priv->active_master;
 641         struct vmw_master *vmaster = vmw_master(file_priv->master);
 642         int ret = 0;
 643
 644         if (!dev_priv->enable_fb) {
 645                 ret = vmw_3d_resource_inc(dev_priv);
 646                 if (unlikely(ret != 0))
 647                         return ret;
 648                 vmw_kms_save_vga(dev_priv);
 649                 mutex_lock(&dev_priv->hw_mutex);
 650                 vmw_write(dev_priv, SVGA_REG_TRACES, 0);
 651                 mutex_unlock(&dev_priv->hw_mutex);
 652         }
 653
 654         if (active) {
 655                 BUG_ON(active != &dev_priv->fbdev_master);
 656                 ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile);
 657                 if (unlikely(ret != 0))
 658                         goto out_no_active_lock;
 659
 660                 ttm_lock_set_kill(&active->lock, true, SIGTERM);
 661                 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
 662                 if (unlikely(ret != 0)) {
 663                         DRM_ERROR("Unable to clean VRAM on "
 664                                   "master drop.\n");
 665                 }
 666
 667                 dev_priv->active_master = NULL;
 668         }
 669
 670         ttm_lock_set_kill(&vmaster->lock, false, SIGTERM);
 671         if (!from_open) {
 672                 ttm_vt_unlock(&vmaster->lock);
 673                 BUG_ON(vmw_fp->locked_master != file_priv->master);
 674                 drm_master_put(&vmw_fp->locked_master);
 675         }
 676
 677         dev_priv->active_master = vmaster;
 678
 679         return 0;
 680
 681 out_no_active_lock:
 682         if (!dev_priv->enable_fb) {
 683                 mutex_lock(&dev_priv->hw_mutex);
 684                 vmw_write(dev_priv, SVGA_REG_TRACES, 1);
 685                 mutex_unlock(&dev_priv->hw_mutex);
 686                 vmw_kms_restore_vga(dev_priv);
 687                 vmw_3d_resource_dec(dev_priv);
 688         }
 689         return ret;
 690 }
 691
 692 static void vmw_master_drop(struct drm_device *dev,
 693                             struct drm_file *file_priv,
 694                             bool from_release)
 695 {
 696         struct vmw_private *dev_priv = vmw_priv(dev);
 697         struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
 698         struct vmw_master *vmaster = vmw_master(file_priv->master);
 699         int ret;
 700
 701         /**
 702          * Make sure the master doesn't disappear while we have
 703          * it locked.
 704          */
 705
 706         vmw_fp->locked_master = drm_master_get(file_priv->master);
 707         ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
 708
 709         if (unlikely((ret != 0))) {
 710                 DRM_ERROR("Unable to lock TTM at VT switch.\n");
 711                 drm_master_put(&vmw_fp->locked_master);
 712         }
 713
 714         ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
 715
 716         if (!dev_priv->enable_fb) {
 717                 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
 718                 if (unlikely(ret != 0))
 719                         DRM_ERROR("Unable to clean VRAM on master drop.\n");
 720                 mutex_lock(&dev_priv->hw_mutex);
 721                 vmw_write(dev_priv, SVGA_REG_TRACES, 1);
 722                 mutex_unlock(&dev_priv->hw_mutex);
 723                 vmw_kms_restore_vga(dev_priv);
 724                 vmw_3d_resource_dec(dev_priv);
 725         }
 726
 727         dev_priv->active_master = &dev_priv->fbdev_master;
 728         ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
 729         ttm_vt_unlock(&dev_priv->fbdev_master.lock);
 730
 731         if (dev_priv->enable_fb)
 732                 vmw_fb_on(dev_priv);
 733 }
 734
 735
 736 static void vmw_remove(struct pci_dev *pdev)
 737 {
 738         struct drm_device *dev = pci_get_drvdata(pdev);
 739
 740         drm_put_dev(dev);
 741 }
 742
 743 static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
 744                               void *ptr)
 745 {
 746         struct vmw_private *dev_priv =
 747                 container_of(nb, struct vmw_private, pm_nb);
 748         struct vmw_master *vmaster = dev_priv->active_master;
 749
 750         switch (val) {
 751         case PM_HIBERNATION_PREPARE:
 752         case PM_SUSPEND_PREPARE:
 753                 ttm_suspend_lock(&vmaster->lock);
 754
 755                 /**
 756                  * This empties VRAM and unbinds all GMR bindings.
 757                  * Buffer contents is moved to swappable memory.
 758                  */
 759                 ttm_bo_swapout_all(&dev_priv->bdev);
 760                 break;
 761         case PM_POST_HIBERNATION:
 762         case PM_POST_SUSPEND:
 763                 ttm_suspend_unlock(&vmaster->lock);
 764                 break;
 765         case PM_RESTORE_PREPARE:
 766                 break;
 767         case PM_POST_RESTORE:
 768                 break;
 769         default:
 770                 break;
 771         }
 772         return 0;
 773 }
 774
 775 /**
 776  * These might not be needed with the virtual SVGA device.
 777  */
 778
 779 int vmw_pci_suspend(struct pci_dev *pdev, pm_message_t state)
 780 {
 781         pci_save_state(pdev);
 782         pci_disable_device(pdev);
 783         pci_set_power_state(pdev, PCI_D3hot);
 784         return 0;
 785 }
 786
 787 int vmw_pci_resume(struct pci_dev *pdev)
 788 {
 789         pci_set_power_state(pdev, PCI_D0);
 790         pci_restore_state(pdev);
 791         return pci_enable_device(pdev);
 792 }
 793
 794 static struct drm_driver driver = {
 795         .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED |
 796         DRIVER_MODESET,
 797         .load = vmw_driver_load,
 798         .unload = vmw_driver_unload,
 799         .firstopen = vmw_firstopen,
 800         .lastclose = vmw_lastclose,
 801         .irq_preinstall = vmw_irq_preinstall,
 802         .irq_postinstall = vmw_irq_postinstall,
 803         .irq_uninstall = vmw_irq_uninstall,
 804         .irq_handler = vmw_irq_handler,
 805         .get_vblank_counter = vmw_get_vblank_counter,
 806         .reclaim_buffers_locked = NULL,
 807         .get_map_ofs = drm_core_get_map_ofs,
 808         .get_reg_ofs = drm_core_get_reg_ofs,
 809         .ioctls = vmw_ioctls,
 810         .num_ioctls = DRM_ARRAY_SIZE(vmw_ioctls),
 811         .dma_quiescent = NULL,  /*vmw_dma_quiescent, */
 812         .master_create = vmw_master_create,
 813         .master_destroy = vmw_master_destroy,
 814         .master_set = vmw_master_set,
 815         .master_drop = vmw_master_drop,
 816         .open = vmw_driver_open,
 817         .postclose = vmw_postclose,
 818         .fops = {
 819                  .owner = THIS_MODULE,
 820                  .open = drm_open,
 821                  .release = drm_release,
 822                  .unlocked_ioctl = vmw_unlocked_ioctl,
 823                  .mmap = vmw_mmap,
 824                  .poll = drm_poll,
 825                  .fasync = drm_fasync,
 826 #if defined(CONFIG_COMPAT)
 827                  .compat_ioctl = drm_compat_ioctl,
 828 #endif
 829                  },
 830         .pci_driver = {
 831                        .name = VMWGFX_DRIVER_NAME,
 832                        .id_table = vmw_pci_id_list,
 833                        .probe = vmw_probe,
 834                        .remove = vmw_remove,
 835                        .suspend = vmw_pci_suspend,
 836                        .resume = vmw_pci_resume
 837                        },
 838         .name = VMWGFX_DRIVER_NAME,
 839         .desc = VMWGFX_DRIVER_DESC,
 840         .date = VMWGFX_DRIVER_DATE,
 841         .major = VMWGFX_DRIVER_MAJOR,
 842         .minor = VMWGFX_DRIVER_MINOR,
 843         .patchlevel = VMWGFX_DRIVER_PATCHLEVEL
 844 };
 845
 846 static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 847 {
 848         return drm_get_pci_dev(pdev, ent, &driver);
 849 }
 850
 851 static int __init vmwgfx_init(void)
 852 {
 853         int ret;
 854         ret = drm_init(&driver);
 855         if (ret)
 856                 DRM_ERROR("Failed initializing DRM.\n");
 857         return ret;
 858 }
 859
 860 static void __exit vmwgfx_exit(void)
 861 {
 862         drm_exit(&driver);
 863 }
 864
 865 module_init(vmwgfx_init);
 866 module_exit(vmwgfx_exit);
 867
 868 MODULE_AUTHOR("VMware Inc. and others");
 869 MODULE_DESCRIPTION("Standalone drm driver for the VMware SVGA device");
 870 MODULE_LICENSE("GPL and additional rights");