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qlcnic: Fix for kdump
[net-next-2.6.git] / drivers / net / qlcnic / qlcnic_ctx.c
CommitLineData
af19b491
AKS		 1/*
2 * Copyright (C) 2009 - QLogic Corporation.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called "COPYING".
22 *
23 */
24
25#include "qlcnic.h"
26
af19b491
AKS		 27static u32
28qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
29{
30 u32 rsp;
31 int timeout = 0;
32
33 do {
34 /* give atleast 1ms for firmware to respond */
35 msleep(1);
36
37 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
38 return QLCNIC_CDRP_RSP_TIMEOUT;
39
40 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
41 } while (!QLCNIC_CDRP_IS_RSP(rsp));
42
43 return rsp;
44}
45
7eb9855d 46u32
af19b491
AKS		 47qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
48 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
49{
50 u32 rsp;
51 u32 signature;
52 u32 rcode = QLCNIC_RCODE_SUCCESS;
53 struct pci_dev *pdev = adapter->pdev;
54
55 signature = QLCNIC_CDRP_SIGNATURE_MAKE(pci_fn, version);
56
57 /* Acquire semaphore before accessing CRB */
58 if (qlcnic_api_lock(adapter))
59 return QLCNIC_RCODE_TIMEOUT;
60
61 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
62 QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, arg1);
63 QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, arg2);
64 QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, arg3);
65 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET, QLCNIC_CDRP_FORM_CMD(cmd));
66
67 rsp = qlcnic_poll_rsp(adapter);
68
69 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
70 dev_err(&pdev->dev, "card response timeout.\n");
71 rcode = QLCNIC_RCODE_TIMEOUT;
72 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
73 rcode = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
74 dev_err(&pdev->dev, "failed card response code:0x%x\n",
75 rcode);
76 }
77
78 /* Release semaphore */
79 qlcnic_api_unlock(adapter);
80
81 return rcode;
82}
83
84int
85qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
86{
87 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
88
89 if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
90 if (qlcnic_issue_cmd(adapter,
2e9d722d
AC		 91 adapter->ahw.pci_func,
92 adapter->fw_hal_version,
93 recv_ctx->context_id,
94 mtu,
95 0,
96 QLCNIC_CDRP_CMD_SET_MTU)) {
af19b491
AKS		 97
98 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
99 return -EIO;
100 }
101 }
102
103 return 0;
104}
105
106static int
107qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
108{
109 void *addr;
110 struct qlcnic_hostrq_rx_ctx *prq;
111 struct qlcnic_cardrsp_rx_ctx *prsp;
112 struct qlcnic_hostrq_rds_ring *prq_rds;
113 struct qlcnic_hostrq_sds_ring *prq_sds;
114 struct qlcnic_cardrsp_rds_ring *prsp_rds;
115 struct qlcnic_cardrsp_sds_ring *prsp_sds;
116 struct qlcnic_host_rds_ring *rds_ring;
117 struct qlcnic_host_sds_ring *sds_ring;
118
119 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
120 u64 phys_addr;
121
122 int i, nrds_rings, nsds_rings;
123 size_t rq_size, rsp_size;
2e9d722d 124 u32 cap, reg, val, reg2;
af19b491
AKS		 125 int err;
126
127 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
128
129 nrds_rings = adapter->max_rds_rings;
130 nsds_rings = adapter->max_sds_rings;
131
132 rq_size =
133 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
134 nsds_rings);
135 rsp_size =
136 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
137 nsds_rings);
138
139 addr = pci_alloc_consistent(adapter->pdev,
140 rq_size, &hostrq_phys_addr);
141 if (addr == NULL)
142 return -ENOMEM;
143 prq = (struct qlcnic_hostrq_rx_ctx *)addr;
144
145 addr = pci_alloc_consistent(adapter->pdev,
146 rsp_size, &cardrsp_phys_addr);
147 if (addr == NULL) {
148 err = -ENOMEM;
149 goto out_free_rq;
150 }
151 prsp = (struct qlcnic_cardrsp_rx_ctx *)addr;
152
153 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
154
8f891387 155 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN
156 | QLCNIC_CAP0_VALIDOFF);
af19b491
AKS		 157 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
158
8f891387 159 prq->valid_field_offset = offsetof(struct qlcnic_hostrq_rx_ctx,
160 msix_handler);
161 prq->txrx_sds_binding = nsds_rings - 1;
162
af19b491
AKS		 163 prq->capabilities[0] = cpu_to_le32(cap);
164 prq->host_int_crb_mode =
165 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
166 prq->host_rds_crb_mode =
167 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
168
169 prq->num_rds_rings = cpu_to_le16(nrds_rings);
170 prq->num_sds_rings = cpu_to_le16(nsds_rings);
171 prq->rds_ring_offset = cpu_to_le32(0);
172
173 val = le32_to_cpu(prq->rds_ring_offset) +
174 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
175 prq->sds_ring_offset = cpu_to_le32(val);
176
177 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
178 le32_to_cpu(prq->rds_ring_offset));
179
180 for (i = 0; i < nrds_rings; i++) {
181
182 rds_ring = &recv_ctx->rds_rings[i];
8a15ad1f 183 rds_ring->producer = 0;
af19b491
AKS		 184
185 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
186 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
187 prq_rds[i].ring_kind = cpu_to_le32(i);
188 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
189 }
190
191 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
192 le32_to_cpu(prq->sds_ring_offset));
193
194 for (i = 0; i < nsds_rings; i++) {
195
196 sds_ring = &recv_ctx->sds_rings[i];
8a15ad1f
AKS		 197 sds_ring->consumer = 0;
198 memset(sds_ring->desc_head, 0, STATUS_DESC_RINGSIZE(sds_ring));
af19b491
AKS		 199
200 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
201 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
202 prq_sds[i].msi_index = cpu_to_le16(i);
203 }
204
205 phys_addr = hostrq_phys_addr;
206 err = qlcnic_issue_cmd(adapter,
207 adapter->ahw.pci_func,
2e9d722d 208 adapter->fw_hal_version,
af19b491
AKS		 209 (u32)(phys_addr >> 32),
210 (u32)(phys_addr & 0xffffffff),
211 rq_size,
212 QLCNIC_CDRP_CMD_CREATE_RX_CTX);
213 if (err) {
214 dev_err(&adapter->pdev->dev,
215 "Failed to create rx ctx in firmware%d\n", err);
216 goto out_free_rsp;
217 }
218
219
220 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
221 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
222
223 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
224 rds_ring = &recv_ctx->rds_rings[i];
225
226 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
45918e2f 227 rds_ring->crb_rcv_producer = adapter->ahw.pci_base0 + reg;
af19b491
AKS		 228 }
229
230 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
231 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
232
233 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
234 sds_ring = &recv_ctx->sds_rings[i];
235
236 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
2e9d722d 237 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
af19b491 238
45918e2f
AC		 239 sds_ring->crb_sts_consumer = adapter->ahw.pci_base0 + reg;
240 sds_ring->crb_intr_mask = adapter->ahw.pci_base0 + reg2;
af19b491
AKS		 241 }
242
243 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
244 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
245 recv_ctx->virt_port = prsp->virt_port;
246
247out_free_rsp:
248 pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
249out_free_rq:
250 pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
251 return err;
252}
253
254static void
255qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
256{
257 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
258
259 if (qlcnic_issue_cmd(adapter,
260 adapter->ahw.pci_func,
2e9d722d 261 adapter->fw_hal_version,
af19b491
AKS		 262 recv_ctx->context_id,
263 QLCNIC_DESTROY_CTX_RESET,
264 0,
265 QLCNIC_CDRP_CMD_DESTROY_RX_CTX)) {
266
267 dev_err(&adapter->pdev->dev,
268 "Failed to destroy rx ctx in firmware\n");
269 }
d626ad4d
AKS		 270
271 recv_ctx->state = QLCNIC_HOST_CTX_STATE_FREED;
af19b491
AKS		 272}
273
274static int
275qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
276{
277 struct qlcnic_hostrq_tx_ctx *prq;
278 struct qlcnic_hostrq_cds_ring *prq_cds;
279 struct qlcnic_cardrsp_tx_ctx *prsp;
280 void *rq_addr, *rsp_addr;
281 size_t rq_size, rsp_size;
282 u32 temp;
283 int err;
284 u64 phys_addr;
285 dma_addr_t rq_phys_addr, rsp_phys_addr;
286 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
287
8a15ad1f
AKS		 288 /* reset host resources */
289 tx_ring->producer = 0;
290 tx_ring->sw_consumer = 0;
291 *(tx_ring->hw_consumer) = 0;
292
af19b491
AKS		 293 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
294 rq_addr = pci_alloc_consistent(adapter->pdev,
295 rq_size, &rq_phys_addr);
296 if (!rq_addr)
297 return -ENOMEM;
298
299 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
300 rsp_addr = pci_alloc_consistent(adapter->pdev,
301 rsp_size, &rsp_phys_addr);
302 if (!rsp_addr) {
303 err = -ENOMEM;
304 goto out_free_rq;
305 }
306
307 memset(rq_addr, 0, rq_size);
308 prq = (struct qlcnic_hostrq_tx_ctx *)rq_addr;
309
310 memset(rsp_addr, 0, rsp_size);
311 prsp = (struct qlcnic_cardrsp_tx_ctx *)rsp_addr;
312
313 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
314
315 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
316 QLCNIC_CAP0_LSO);
317 prq->capabilities[0] = cpu_to_le32(temp);
318
319 prq->host_int_crb_mode =
320 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
321
322 prq->interrupt_ctl = 0;
323 prq->msi_index = 0;
324 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
325
326 prq_cds = &prq->cds_ring;
327
328 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
329 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
330
331 phys_addr = rq_phys_addr;
332 err = qlcnic_issue_cmd(adapter,
333 adapter->ahw.pci_func,
2e9d722d 334 adapter->fw_hal_version,
af19b491
AKS		 335 (u32)(phys_addr >> 32),
336 ((u32)phys_addr & 0xffffffff),
337 rq_size,
338 QLCNIC_CDRP_CMD_CREATE_TX_CTX);
339
340 if (err == QLCNIC_RCODE_SUCCESS) {
341 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
45918e2f 342 tx_ring->crb_cmd_producer = adapter->ahw.pci_base0 + temp;
af19b491
AKS		 343
344 adapter->tx_context_id =
345 le16_to_cpu(prsp->context_id);
346 } else {
347 dev_err(&adapter->pdev->dev,
348 "Failed to create tx ctx in firmware%d\n", err);
349 err = -EIO;
350 }
351
352 pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);
353
354out_free_rq:
355 pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);
356
357 return err;
358}
359
360static void
361qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
362{
363 if (qlcnic_issue_cmd(adapter,
364 adapter->ahw.pci_func,
2e9d722d 365 adapter->fw_hal_version,
af19b491
AKS		 366 adapter->tx_context_id,
367 QLCNIC_DESTROY_CTX_RESET,
368 0,
369 QLCNIC_CDRP_CMD_DESTROY_TX_CTX)) {
370
371 dev_err(&adapter->pdev->dev,
372 "Failed to destroy tx ctx in firmware\n");
373 }
374}
375
376int
377qlcnic_fw_cmd_query_phy(struct qlcnic_adapter *adapter, u32 reg, u32 *val)
378{
379
380 if (qlcnic_issue_cmd(adapter,
381 adapter->ahw.pci_func,
2e9d722d 382 adapter->fw_hal_version,
af19b491
AKS		 383 reg,
384 0,
385 0,
386 QLCNIC_CDRP_CMD_READ_PHY)) {
387
388 return -EIO;
389 }
390
391 return QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
392}
393
394int
395qlcnic_fw_cmd_set_phy(struct qlcnic_adapter *adapter, u32 reg, u32 val)
396{
397 return qlcnic_issue_cmd(adapter,
398 adapter->ahw.pci_func,
2e9d722d 399 adapter->fw_hal_version,
af19b491
AKS		 400 reg,
401 val,
402 0,
403 QLCNIC_CDRP_CMD_WRITE_PHY);
404}
405
406int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
407{
408 void *addr;
409 int err;
410 int ring;
411 struct qlcnic_recv_context *recv_ctx;
412 struct qlcnic_host_rds_ring *rds_ring;
413 struct qlcnic_host_sds_ring *sds_ring;
414 struct qlcnic_host_tx_ring *tx_ring;
415
416 struct pci_dev *pdev = adapter->pdev;
417
418 recv_ctx = &adapter->recv_ctx;
419 tx_ring = adapter->tx_ring;
420
421 tx_ring->hw_consumer = (__le32 *)pci_alloc_consistent(pdev, sizeof(u32),
422 &tx_ring->hw_cons_phys_addr);
423 if (tx_ring->hw_consumer == NULL) {
424 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
425 return -ENOMEM;
426 }
427 *(tx_ring->hw_consumer) = 0;
428
429 /* cmd desc ring */
430 addr = pci_alloc_consistent(pdev, TX_DESC_RINGSIZE(tx_ring),
431 &tx_ring->phys_addr);
432
433 if (addr == NULL) {
434 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
aadd8184
AC		 435 err = -ENOMEM;
436 goto err_out_free;
af19b491
AKS		 437 }
438
439 tx_ring->desc_head = (struct cmd_desc_type0 *)addr;
440
441 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
442 rds_ring = &recv_ctx->rds_rings[ring];
443 addr = pci_alloc_consistent(adapter->pdev,
444 RCV_DESC_RINGSIZE(rds_ring),
445 &rds_ring->phys_addr);
446 if (addr == NULL) {
447 dev_err(&pdev->dev,
448 "failed to allocate rds ring [%d]\n", ring);
449 err = -ENOMEM;
450 goto err_out_free;
451 }
452 rds_ring->desc_head = (struct rcv_desc *)addr;
453
454 }
455
456 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
457 sds_ring = &recv_ctx->sds_rings[ring];
458
459 addr = pci_alloc_consistent(adapter->pdev,
460 STATUS_DESC_RINGSIZE(sds_ring),
461 &sds_ring->phys_addr);
462 if (addr == NULL) {
463 dev_err(&pdev->dev,
464 "failed to allocate sds ring [%d]\n", ring);
465 err = -ENOMEM;
466 goto err_out_free;
467 }
468 sds_ring->desc_head = (struct status_desc *)addr;
469 }
470
af19b491
AKS		 471 return 0;
472
473err_out_free:
474 qlcnic_free_hw_resources(adapter);
475 return err;
476}
477
8a15ad1f
AKS		 478
479int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter)
af19b491 480{
8a15ad1f
AKS		 481 int err;
482
c21fd48c
RB		 483 if (reset_devices)
484 pci_reset_function(adapter->pdev);
485
8a15ad1f
AKS		 486 err = qlcnic_fw_cmd_create_rx_ctx(adapter);
487 if (err)
488 return err;
489
490 err = qlcnic_fw_cmd_create_tx_ctx(adapter);
491 if (err) {
492 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
493 return err;
494 }
af19b491 495
8a15ad1f
AKS		 496 set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
497 return 0;
498}
af19b491 499
8a15ad1f
AKS		 500void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter)
501{
af19b491
AKS		 502 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
503 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
504 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
505
506 /* Allow dma queues to drain after context reset */
507 msleep(20);
508 }
8a15ad1f
AKS		 509}
510
511void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
512{
513 struct qlcnic_recv_context *recv_ctx;
514 struct qlcnic_host_rds_ring *rds_ring;
515 struct qlcnic_host_sds_ring *sds_ring;
516 struct qlcnic_host_tx_ring *tx_ring;
517 int ring;
af19b491
AKS		 518
519 recv_ctx = &adapter->recv_ctx;
520
521 tx_ring = adapter->tx_ring;
522 if (tx_ring->hw_consumer != NULL) {
523 pci_free_consistent(adapter->pdev,
524 sizeof(u32),
525 tx_ring->hw_consumer,
526 tx_ring->hw_cons_phys_addr);
527 tx_ring->hw_consumer = NULL;
528 }
529
530 if (tx_ring->desc_head != NULL) {
531 pci_free_consistent(adapter->pdev,
532 TX_DESC_RINGSIZE(tx_ring),
533 tx_ring->desc_head, tx_ring->phys_addr);
534 tx_ring->desc_head = NULL;
535 }
536
537 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
538 rds_ring = &recv_ctx->rds_rings[ring];
539
540 if (rds_ring->desc_head != NULL) {
541 pci_free_consistent(adapter->pdev,
542 RCV_DESC_RINGSIZE(rds_ring),
543 rds_ring->desc_head,
544 rds_ring->phys_addr);
545 rds_ring->desc_head = NULL;
546 }
547 }
548
549 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
550 sds_ring = &recv_ctx->sds_rings[ring];
551
552 if (sds_ring->desc_head != NULL) {
553 pci_free_consistent(adapter->pdev,
554 STATUS_DESC_RINGSIZE(sds_ring),
555 sds_ring->desc_head,
556 sds_ring->phys_addr);
557 sds_ring->desc_head = NULL;
558 }
559 }
560}
561
2e9d722d
AC		 562
563/* Get MAC address of a NIC partition */
564int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
565{
566 int err;
567 u32 arg1;
568
569 arg1 = adapter->ahw.pci_func | BIT_8;
570 err = qlcnic_issue_cmd(adapter,
571 adapter->ahw.pci_func,
572 adapter->fw_hal_version,
573 arg1,
574 0,
575 0,
576 QLCNIC_CDRP_CMD_MAC_ADDRESS);
577
7f9a0c34 578 if (err == QLCNIC_RCODE_SUCCESS)
2e9d722d
AC		 579 qlcnic_fetch_mac(adapter, QLCNIC_ARG1_CRB_OFFSET,
580 QLCNIC_ARG2_CRB_OFFSET, 0, mac);
7f9a0c34 581 else {
2e9d722d
AC		 582 dev_err(&adapter->pdev->dev,
583 "Failed to get mac address%d\n", err);
584 err = -EIO;
585 }
586
587 return err;
588}
589
590/* Get info of a NIC partition */
346fe763
RB		 591int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
592 struct qlcnic_info *npar_info, u8 func_id)
2e9d722d
AC		 593{
594 int err;
595 dma_addr_t nic_dma_t;
596 struct qlcnic_info *nic_info;
597 void *nic_info_addr;
598 size_t nic_size = sizeof(struct qlcnic_info);
599
600 nic_info_addr = pci_alloc_consistent(adapter->pdev,
601 nic_size, &nic_dma_t);
602 if (!nic_info_addr)
603 return -ENOMEM;
604 memset(nic_info_addr, 0, nic_size);
605
606 nic_info = (struct qlcnic_info *) nic_info_addr;
607 err = qlcnic_issue_cmd(adapter,
608 adapter->ahw.pci_func,
609 adapter->fw_hal_version,
610 MSD(nic_dma_t),
611 LSD(nic_dma_t),
612 (func_id << 16 | nic_size),
613 QLCNIC_CDRP_CMD_GET_NIC_INFO);
614
615 if (err == QLCNIC_RCODE_SUCCESS) {
cea8975e
AC		 616 npar_info->pci_func = le16_to_cpu(nic_info->pci_func);
617 npar_info->op_mode = le16_to_cpu(nic_info->op_mode);
346fe763
RB		 618 npar_info->phys_port = le16_to_cpu(nic_info->phys_port);
619 npar_info->switch_mode = le16_to_cpu(nic_info->switch_mode);
620 npar_info->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
621 npar_info->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
622 npar_info->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
623 npar_info->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
624 npar_info->capabilities = le32_to_cpu(nic_info->capabilities);
625 npar_info->max_mtu = le16_to_cpu(nic_info->max_mtu);
0e33c664 626
2e9d722d
AC		 627 dev_info(&adapter->pdev->dev,
628 "phy port: %d switch_mode: %d,\n"
629 "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
630 "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
346fe763
RB		 631 npar_info->phys_port, npar_info->switch_mode,
632 npar_info->max_tx_ques, npar_info->max_rx_ques,
633 npar_info->min_tx_bw, npar_info->max_tx_bw,
634 npar_info->max_mtu, npar_info->capabilities);
2e9d722d
AC		 635 } else {
636 dev_err(&adapter->pdev->dev,
637 "Failed to get nic info%d\n", err);
638 err = -EIO;
639 }
640
641 pci_free_consistent(adapter->pdev, nic_size, nic_info_addr, nic_dma_t);
642 return err;
643}
644
645/* Configure a NIC partition */
646int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
647{
648 int err = -EIO;
2e9d722d
AC		 649 dma_addr_t nic_dma_t;
650 void *nic_info_addr;
651 struct qlcnic_info *nic_info;
652 size_t nic_size = sizeof(struct qlcnic_info);
653
654 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
655 return err;
656
2e9d722d
AC		 657 nic_info_addr = pci_alloc_consistent(adapter->pdev, nic_size,
658 &nic_dma_t);
659 if (!nic_info_addr)
660 return -ENOMEM;
661
662 memset(nic_info_addr, 0, nic_size);
663 nic_info = (struct qlcnic_info *)nic_info_addr;
664
665 nic_info->pci_func = cpu_to_le16(nic->pci_func);
666 nic_info->op_mode = cpu_to_le16(nic->op_mode);
667 nic_info->phys_port = cpu_to_le16(nic->phys_port);
668 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
669 nic_info->capabilities = cpu_to_le32(nic->capabilities);
670 nic_info->max_mac_filters = nic->max_mac_filters;
671 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
672 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
673 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
674 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
675
676 err = qlcnic_issue_cmd(adapter,
677 adapter->ahw.pci_func,
678 adapter->fw_hal_version,
679 MSD(nic_dma_t),
680 LSD(nic_dma_t),
346fe763 681 ((nic->pci_func << 16) | nic_size),
2e9d722d
AC		 682 QLCNIC_CDRP_CMD_SET_NIC_INFO);
683
684 if (err != QLCNIC_RCODE_SUCCESS) {
685 dev_err(&adapter->pdev->dev,
686 "Failed to set nic info%d\n", err);
687 err = -EIO;
688 }
689
690 pci_free_consistent(adapter->pdev, nic_size, nic_info_addr, nic_dma_t);
691 return err;
692}
693
694/* Get PCI Info of a partition */
346fe763
RB		 695int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
696 struct qlcnic_pci_info *pci_info)
2e9d722d
AC		 697{
698 int err = 0, i;
699 dma_addr_t pci_info_dma_t;
700 struct qlcnic_pci_info *npar;
701 void *pci_info_addr;
702 size_t npar_size = sizeof(struct qlcnic_pci_info);
703 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
704
705 pci_info_addr = pci_alloc_consistent(adapter->pdev, pci_size,
706 &pci_info_dma_t);
707 if (!pci_info_addr)
708 return -ENOMEM;
709 memset(pci_info_addr, 0, pci_size);
710
2e9d722d
AC		 711 npar = (struct qlcnic_pci_info *) pci_info_addr;
712 err = qlcnic_issue_cmd(adapter,
713 adapter->ahw.pci_func,
714 adapter->fw_hal_version,
715 MSD(pci_info_dma_t),
716 LSD(pci_info_dma_t),
717 pci_size,
718 QLCNIC_CDRP_CMD_GET_PCI_INFO);
719
720 if (err == QLCNIC_RCODE_SUCCESS) {
346fe763 721 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++, pci_info++) {
a1c0c459
SC		 722 pci_info->id = le16_to_cpu(npar->id);
723 pci_info->active = le16_to_cpu(npar->active);
724 pci_info->type = le16_to_cpu(npar->type);
346fe763 725 pci_info->default_port =
a1c0c459 726 le16_to_cpu(npar->default_port);
346fe763 727 pci_info->tx_min_bw =
a1c0c459 728 le16_to_cpu(npar->tx_min_bw);
346fe763 729 pci_info->tx_max_bw =
a1c0c459 730 le16_to_cpu(npar->tx_max_bw);
346fe763 731 memcpy(pci_info->mac, npar->mac, ETH_ALEN);
2e9d722d
AC		 732 }
733 } else {
734 dev_err(&adapter->pdev->dev,
735 "Failed to get PCI Info%d\n", err);
2e9d722d
AC		 736 err = -EIO;
737 }
2e9d722d 738
2e9d722d
AC		 739 pci_free_consistent(adapter->pdev, pci_size, pci_info_addr,
740 pci_info_dma_t);
741 return err;
742}
743
2e9d722d
AC		 744/* Configure eSwitch for port mirroring */
745int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
746 u8 enable_mirroring, u8 pci_func)
747{
748 int err = -EIO;
749 u32 arg1;
750
751 if (adapter->op_mode != QLCNIC_MGMT_FUNC ||
752 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
753 return err;
754
755 arg1 = id | (enable_mirroring ? BIT_4 : 0);
756 arg1 |= pci_func << 8;
757
758 err = qlcnic_issue_cmd(adapter,
759 adapter->ahw.pci_func,
760 adapter->fw_hal_version,
761 arg1,
762 0,
763 0,
764 QLCNIC_CDRP_CMD_SET_PORTMIRRORING);
765
766 if (err != QLCNIC_RCODE_SUCCESS) {
767 dev_err(&adapter->pdev->dev,
768 "Failed to configure port mirroring%d on eswitch:%d\n",
769 pci_func, id);
770 } else {
771 dev_info(&adapter->pdev->dev,
772 "Configured eSwitch %d for port mirroring:%d\n",
773 id, pci_func);
774 }
775
776 return err;
777}
778
b6021212
AKS		 779int qlcnic_get_port_stats(struct qlcnic_adapter *adapter, const u8 func,
780 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
781
782 size_t stats_size = sizeof(struct __qlcnic_esw_statistics);
63e74e9c 783 struct __qlcnic_esw_statistics *stats;
b6021212
AKS		 784 dma_addr_t stats_dma_t;
785 void *stats_addr;
786 u32 arg1;
787 int err;
788
789 if (esw_stats == NULL)
790 return -ENOMEM;
791
792 if (adapter->op_mode != QLCNIC_MGMT_FUNC &&
793 func != adapter->ahw.pci_func) {
794 dev_err(&adapter->pdev->dev,
795 "Not privilege to query stats for func=%d", func);
796 return -EIO;
797 }
798
799 stats_addr = pci_alloc_consistent(adapter->pdev, stats_size,
800 &stats_dma_t);
801 if (!stats_addr) {
802 dev_err(&adapter->pdev->dev, "Unable to allocate memory\n");
803 return -ENOMEM;
804 }
805 memset(stats_addr, 0, stats_size);
806
807 arg1 = func | QLCNIC_STATS_VERSION << 8 | QLCNIC_STATS_PORT << 12;
808 arg1 |= rx_tx << 15 | stats_size << 16;
809
810 err = qlcnic_issue_cmd(adapter,
811 adapter->ahw.pci_func,
812 adapter->fw_hal_version,
813 arg1,
814 MSD(stats_dma_t),
815 LSD(stats_dma_t),
816 QLCNIC_CDRP_CMD_GET_ESWITCH_STATS);
817
63e74e9c
AKS		 818 if (!err) {
819 stats = (struct __qlcnic_esw_statistics *)stats_addr;
820 esw_stats->context_id = le16_to_cpu(stats->context_id);
821 esw_stats->version = le16_to_cpu(stats->version);
822 esw_stats->size = le16_to_cpu(stats->size);
823 esw_stats->multicast_frames =
824 le64_to_cpu(stats->multicast_frames);
825 esw_stats->broadcast_frames =
826 le64_to_cpu(stats->broadcast_frames);
827 esw_stats->unicast_frames = le64_to_cpu(stats->unicast_frames);
828 esw_stats->dropped_frames = le64_to_cpu(stats->dropped_frames);
829 esw_stats->local_frames = le64_to_cpu(stats->local_frames);
830 esw_stats->errors = le64_to_cpu(stats->errors);
831 esw_stats->numbytes = le64_to_cpu(stats->numbytes);
832 }
b6021212
AKS		 833
834 pci_free_consistent(adapter->pdev, stats_size, stats_addr,
835 stats_dma_t);
836 return err;
837}
838
839int qlcnic_get_eswitch_stats(struct qlcnic_adapter *adapter, const u8 eswitch,
840 const u8 rx_tx, struct __qlcnic_esw_statistics *esw_stats) {
841
842 struct __qlcnic_esw_statistics port_stats;
843 u8 i;
844 int ret = -EIO;
845
846 if (esw_stats == NULL)
847 return -ENOMEM;
848 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
849 return -EIO;
850 if (adapter->npars == NULL)
851 return -EIO;
852
ef182805
AKS		 853 memset(esw_stats, 0, sizeof(u64));
854 esw_stats->unicast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
855 esw_stats->multicast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
856 esw_stats->broadcast_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
857 esw_stats->dropped_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
858 esw_stats->errors = QLCNIC_ESW_STATS_NOT_AVAIL;
859 esw_stats->local_frames = QLCNIC_ESW_STATS_NOT_AVAIL;
860 esw_stats->numbytes = QLCNIC_ESW_STATS_NOT_AVAIL;
b6021212
AKS		 861 esw_stats->context_id = eswitch;
862
863 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++) {
864 if (adapter->npars[i].phy_port != eswitch)
865 continue;
866
867 memset(&port_stats, 0, sizeof(struct __qlcnic_esw_statistics));
868 if (qlcnic_get_port_stats(adapter, i, rx_tx, &port_stats))
869 continue;
870
871 esw_stats->size = port_stats.size;
872 esw_stats->version = port_stats.version;
ef182805
AKS		 873 QLCNIC_ADD_ESW_STATS(esw_stats->unicast_frames,
874 port_stats.unicast_frames);
875 QLCNIC_ADD_ESW_STATS(esw_stats->multicast_frames,
876 port_stats.multicast_frames);
877 QLCNIC_ADD_ESW_STATS(esw_stats->broadcast_frames,
878 port_stats.broadcast_frames);
879 QLCNIC_ADD_ESW_STATS(esw_stats->dropped_frames,
880 port_stats.dropped_frames);
881 QLCNIC_ADD_ESW_STATS(esw_stats->errors,
882 port_stats.errors);
883 QLCNIC_ADD_ESW_STATS(esw_stats->local_frames,
884 port_stats.local_frames);
885 QLCNIC_ADD_ESW_STATS(esw_stats->numbytes,
886 port_stats.numbytes);
b6021212
AKS		 887 ret = 0;
888 }
889 return ret;
890}
891
892int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, const u8 func_esw,
893 const u8 port, const u8 rx_tx)
894{
895
896 u32 arg1;
897
898 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
899 return -EIO;
900
901 if (func_esw == QLCNIC_STATS_PORT) {
902 if (port >= QLCNIC_MAX_PCI_FUNC)
903 goto err_ret;
904 } else if (func_esw == QLCNIC_STATS_ESWITCH) {
905 if (port >= QLCNIC_NIU_MAX_XG_PORTS)
906 goto err_ret;
907 } else {
908 goto err_ret;
909 }
910
911 if (rx_tx > QLCNIC_QUERY_TX_COUNTER)
912 goto err_ret;
913
914 arg1 = port | QLCNIC_STATS_VERSION << 8 | func_esw << 12;
915 arg1 |= BIT_14 | rx_tx << 15;
916
917 return qlcnic_issue_cmd(adapter,
918 adapter->ahw.pci_func,
919 adapter->fw_hal_version,
920 arg1,
921 0,
922 0,
923 QLCNIC_CDRP_CMD_GET_ESWITCH_STATS);
924
925err_ret:
926 dev_err(&adapter->pdev->dev, "Invalid argument func_esw=%d port=%d"
927 "rx_ctx=%d\n", func_esw, port, rx_tx);
928 return -EIO;
929}
4e8acb01
RB		 930
931static int
932__qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
933 u32 *arg1, u32 *arg2)
934{
935 int err = -EIO;
936 u8 pci_func;
937 pci_func = (*arg1 >> 8);
938 err = qlcnic_issue_cmd(adapter,
939 adapter->ahw.pci_func,
940 adapter->fw_hal_version,
941 *arg1,
942 0,
943 0,
944 QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG);
945
946 if (err == QLCNIC_RCODE_SUCCESS) {
947 *arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
948 *arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
949 dev_info(&adapter->pdev->dev,
7373373d 950 "eSwitch port config for pci func %d\n", pci_func);
4e8acb01
RB		 951 } else {
952 dev_err(&adapter->pdev->dev,
7373373d
RB		 953 "Failed to get eswitch port config for pci func %d\n",
954 pci_func);
4e8acb01
RB		 955 }
956 return err;
957}
958/* Configure eSwitch port
959op_mode = 0 for setting default port behavior
960op_mode = 1 for setting vlan id
961op_mode = 2 for deleting vlan id
962op_type = 0 for vlan_id
963op_type = 1 for port vlan_id
964*/
965int qlcnic_config_switch_port(struct qlcnic_adapter *adapter,
966 struct qlcnic_esw_func_cfg *esw_cfg)
967{
968 int err = -EIO;
969 u32 arg1, arg2 = 0;
970 u8 pci_func;
971
972 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
973 return err;
974 pci_func = esw_cfg->pci_func;
975 arg1 = (adapter->npars[pci_func].phy_port & BIT_0);
976 arg1 |= (pci_func << 8);
977
978 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
979 return err;
980 arg1 &= ~(0x0ff << 8);
981 arg1 |= (pci_func << 8);
982 arg1 &= ~(BIT_2 | BIT_3);
983 switch (esw_cfg->op_mode) {
984 case QLCNIC_PORT_DEFAULTS:
985 arg1 |= (BIT_4 | BIT_6 | BIT_7);
986 arg2 |= (BIT_0 | BIT_1);
987 if (adapter->capabilities & QLCNIC_FW_CAPABILITY_TSO)
988 arg2 |= (BIT_2 | BIT_3);
989 if (!(esw_cfg->discard_tagged))
990 arg1 &= ~BIT_4;
991 if (!(esw_cfg->promisc_mode))
992 arg1 &= ~BIT_6;
7373373d 993 if (!(esw_cfg->mac_override))
4e8acb01
RB		 994 arg1 &= ~BIT_7;
995 if (!(esw_cfg->mac_anti_spoof))
996 arg2 &= ~BIT_0;
997 if (!(esw_cfg->offload_flags & BIT_0))
998 arg2 &= ~(BIT_1 | BIT_2 | BIT_3);
999 if (!(esw_cfg->offload_flags & BIT_1))
1000 arg2 &= ~BIT_2;
1001 if (!(esw_cfg->offload_flags & BIT_2))
1002 arg2 &= ~BIT_3;
1003 break;
1004 case QLCNIC_ADD_VLAN:
1005 arg1 |= (BIT_2 | BIT_5);
1006 arg1 |= (esw_cfg->vlan_id << 16);
1007 break;
1008 case QLCNIC_DEL_VLAN:
1009 arg1 |= (BIT_3 | BIT_5);
1010 arg1 &= ~(0x0ffff << 16);
e9a47700 1011 break;
4e8acb01
RB		 1012 default:
1013 return err;
1014 }
1015
1016 err = qlcnic_issue_cmd(adapter,
1017 adapter->ahw.pci_func,
1018 adapter->fw_hal_version,
1019 arg1,
1020 arg2,
1021 0,
1022 QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH);
1023
1024 if (err != QLCNIC_RCODE_SUCCESS) {
1025 dev_err(&adapter->pdev->dev,
7373373d 1026 "Failed to configure eswitch pci func %d\n", pci_func);
4e8acb01
RB		 1027 } else {
1028 dev_info(&adapter->pdev->dev,
7373373d 1029 "Configured eSwitch for pci func %d\n", pci_func);
4e8acb01
RB		 1030 }
1031
1032 return err;
1033}
1034
1035int
1036qlcnic_get_eswitch_port_config(struct qlcnic_adapter *adapter,
1037 struct qlcnic_esw_func_cfg *esw_cfg)
1038{
1039 u32 arg1, arg2;
1040 u8 phy_port;
1041 if (adapter->op_mode == QLCNIC_MGMT_FUNC)
1042 phy_port = adapter->npars[esw_cfg->pci_func].phy_port;
1043 else
1044 phy_port = adapter->physical_port;
1045 arg1 = phy_port;
1046 arg1 |= (esw_cfg->pci_func << 8);
1047 if (__qlcnic_get_eswitch_port_config(adapter, &arg1, &arg2))
1048 return -EIO;
1049
1050 esw_cfg->discard_tagged = !!(arg1 & BIT_4);
1051 esw_cfg->host_vlan_tag = !!(arg1 & BIT_5);
1052 esw_cfg->promisc_mode = !!(arg1 & BIT_6);
7373373d 1053 esw_cfg->mac_override = !!(arg1 & BIT_7);
4e8acb01
RB		 1054 esw_cfg->vlan_id = LSW(arg1 >> 16);
1055 esw_cfg->mac_anti_spoof = (arg2 & 0x1);
1056 esw_cfg->offload_flags = ((arg2 >> 1) & 0x7);
1057
1058 return 0;
1059}
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