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qlcnic: change driver description
[net-next-2.6.git] / drivers / net / qlcnic / qlcnic_ctx.c
CommitLineData
af19b491
AKS		 1/*
2 * Copyright (C) 2009 - QLogic Corporation.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called "COPYING".
22 *
23 */
24
25#include "qlcnic.h"
26
af19b491
AKS		 27static u32
28qlcnic_poll_rsp(struct qlcnic_adapter *adapter)
29{
30 u32 rsp;
31 int timeout = 0;
32
33 do {
34 /* give atleast 1ms for firmware to respond */
35 msleep(1);
36
37 if (++timeout > QLCNIC_OS_CRB_RETRY_COUNT)
38 return QLCNIC_CDRP_RSP_TIMEOUT;
39
40 rsp = QLCRD32(adapter, QLCNIC_CDRP_CRB_OFFSET);
41 } while (!QLCNIC_CDRP_IS_RSP(rsp));
42
43 return rsp;
44}
45
7eb9855d 46u32
af19b491
AKS		 47qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
48 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
49{
50 u32 rsp;
51 u32 signature;
52 u32 rcode = QLCNIC_RCODE_SUCCESS;
53 struct pci_dev *pdev = adapter->pdev;
54
55 signature = QLCNIC_CDRP_SIGNATURE_MAKE(pci_fn, version);
56
57 /* Acquire semaphore before accessing CRB */
58 if (qlcnic_api_lock(adapter))
59 return QLCNIC_RCODE_TIMEOUT;
60
61 QLCWR32(adapter, QLCNIC_SIGN_CRB_OFFSET, signature);
62 QLCWR32(adapter, QLCNIC_ARG1_CRB_OFFSET, arg1);
63 QLCWR32(adapter, QLCNIC_ARG2_CRB_OFFSET, arg2);
64 QLCWR32(adapter, QLCNIC_ARG3_CRB_OFFSET, arg3);
65 QLCWR32(adapter, QLCNIC_CDRP_CRB_OFFSET, QLCNIC_CDRP_FORM_CMD(cmd));
66
67 rsp = qlcnic_poll_rsp(adapter);
68
69 if (rsp == QLCNIC_CDRP_RSP_TIMEOUT) {
70 dev_err(&pdev->dev, "card response timeout.\n");
71 rcode = QLCNIC_RCODE_TIMEOUT;
72 } else if (rsp == QLCNIC_CDRP_RSP_FAIL) {
73 rcode = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
74 dev_err(&pdev->dev, "failed card response code:0x%x\n",
75 rcode);
76 }
77
78 /* Release semaphore */
79 qlcnic_api_unlock(adapter);
80
81 return rcode;
82}
83
84int
85qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu)
86{
87 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
88
89 if (recv_ctx->state == QLCNIC_HOST_CTX_STATE_ACTIVE) {
90 if (qlcnic_issue_cmd(adapter,
2e9d722d
AC		 91 adapter->ahw.pci_func,
92 adapter->fw_hal_version,
93 recv_ctx->context_id,
94 mtu,
95 0,
96 QLCNIC_CDRP_CMD_SET_MTU)) {
af19b491
AKS		 97
98 dev_err(&adapter->pdev->dev, "Failed to set mtu\n");
99 return -EIO;
100 }
101 }
102
103 return 0;
104}
105
106static int
107qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
108{
109 void *addr;
110 struct qlcnic_hostrq_rx_ctx *prq;
111 struct qlcnic_cardrsp_rx_ctx *prsp;
112 struct qlcnic_hostrq_rds_ring *prq_rds;
113 struct qlcnic_hostrq_sds_ring *prq_sds;
114 struct qlcnic_cardrsp_rds_ring *prsp_rds;
115 struct qlcnic_cardrsp_sds_ring *prsp_sds;
116 struct qlcnic_host_rds_ring *rds_ring;
117 struct qlcnic_host_sds_ring *sds_ring;
118
119 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
120 u64 phys_addr;
121
122 int i, nrds_rings, nsds_rings;
123 size_t rq_size, rsp_size;
2e9d722d 124 u32 cap, reg, val, reg2;
af19b491
AKS		 125 int err;
126
127 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
128
129 nrds_rings = adapter->max_rds_rings;
130 nsds_rings = adapter->max_sds_rings;
131
132 rq_size =
133 SIZEOF_HOSTRQ_RX(struct qlcnic_hostrq_rx_ctx, nrds_rings,
134 nsds_rings);
135 rsp_size =
136 SIZEOF_CARDRSP_RX(struct qlcnic_cardrsp_rx_ctx, nrds_rings,
137 nsds_rings);
138
139 addr = pci_alloc_consistent(adapter->pdev,
140 rq_size, &hostrq_phys_addr);
141 if (addr == NULL)
142 return -ENOMEM;
143 prq = (struct qlcnic_hostrq_rx_ctx *)addr;
144
145 addr = pci_alloc_consistent(adapter->pdev,
146 rsp_size, &cardrsp_phys_addr);
147 if (addr == NULL) {
148 err = -ENOMEM;
149 goto out_free_rq;
150 }
151 prsp = (struct qlcnic_cardrsp_rx_ctx *)addr;
152
153 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
154
155 cap = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN);
156 cap |= (QLCNIC_CAP0_JUMBO_CONTIGUOUS | QLCNIC_CAP0_LRO_CONTIGUOUS);
157
158 prq->capabilities[0] = cpu_to_le32(cap);
159 prq->host_int_crb_mode =
160 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
161 prq->host_rds_crb_mode =
162 cpu_to_le32(QLCNIC_HOST_RDS_CRB_MODE_UNIQUE);
163
164 prq->num_rds_rings = cpu_to_le16(nrds_rings);
165 prq->num_sds_rings = cpu_to_le16(nsds_rings);
166 prq->rds_ring_offset = cpu_to_le32(0);
167
168 val = le32_to_cpu(prq->rds_ring_offset) +
169 (sizeof(struct qlcnic_hostrq_rds_ring) * nrds_rings);
170 prq->sds_ring_offset = cpu_to_le32(val);
171
172 prq_rds = (struct qlcnic_hostrq_rds_ring *)(prq->data +
173 le32_to_cpu(prq->rds_ring_offset));
174
175 for (i = 0; i < nrds_rings; i++) {
176
177 rds_ring = &recv_ctx->rds_rings[i];
178
179 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
180 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
181 prq_rds[i].ring_kind = cpu_to_le32(i);
182 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
183 }
184
185 prq_sds = (struct qlcnic_hostrq_sds_ring *)(prq->data +
186 le32_to_cpu(prq->sds_ring_offset));
187
188 for (i = 0; i < nsds_rings; i++) {
189
190 sds_ring = &recv_ctx->sds_rings[i];
191
192 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
193 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
194 prq_sds[i].msi_index = cpu_to_le16(i);
195 }
196
197 phys_addr = hostrq_phys_addr;
198 err = qlcnic_issue_cmd(adapter,
199 adapter->ahw.pci_func,
2e9d722d 200 adapter->fw_hal_version,
af19b491
AKS		 201 (u32)(phys_addr >> 32),
202 (u32)(phys_addr & 0xffffffff),
203 rq_size,
204 QLCNIC_CDRP_CMD_CREATE_RX_CTX);
205 if (err) {
206 dev_err(&adapter->pdev->dev,
207 "Failed to create rx ctx in firmware%d\n", err);
208 goto out_free_rsp;
209 }
210
211
212 prsp_rds = ((struct qlcnic_cardrsp_rds_ring *)
213 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
214
215 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
216 rds_ring = &recv_ctx->rds_rings[i];
217
218 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
2e9d722d
AC		 219 if (adapter->fw_hal_version == QLCNIC_FW_BASE)
220 rds_ring->crb_rcv_producer = qlcnic_get_ioaddr(adapter,
af19b491 221 QLCNIC_REG(reg - 0x200));
2e9d722d
AC		 222 else
223 rds_ring->crb_rcv_producer = adapter->ahw.pci_base0 +
224 reg;
af19b491
AKS		 225 }
226
227 prsp_sds = ((struct qlcnic_cardrsp_sds_ring *)
228 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
229
230 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
231 sds_ring = &recv_ctx->sds_rings[i];
232
233 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
2e9d722d 234 reg2 = le32_to_cpu(prsp_sds[i].interrupt_crb);
af19b491 235
2e9d722d
AC		 236 if (adapter->fw_hal_version == QLCNIC_FW_BASE) {
237 sds_ring->crb_sts_consumer = qlcnic_get_ioaddr(adapter,
af19b491 238 QLCNIC_REG(reg - 0x200));
2e9d722d
AC		 239 sds_ring->crb_intr_mask = qlcnic_get_ioaddr(adapter,
240 QLCNIC_REG(reg2 - 0x200));
241 } else {
242 sds_ring->crb_sts_consumer = adapter->ahw.pci_base0 +
243 reg;
244 sds_ring->crb_intr_mask = adapter->ahw.pci_base0 + reg2;
245 }
af19b491
AKS		 246 }
247
248 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
249 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
250 recv_ctx->virt_port = prsp->virt_port;
251
252out_free_rsp:
253 pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
254out_free_rq:
255 pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
256 return err;
257}
258
259static void
260qlcnic_fw_cmd_destroy_rx_ctx(struct qlcnic_adapter *adapter)
261{
262 struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
263
264 if (qlcnic_issue_cmd(adapter,
265 adapter->ahw.pci_func,
2e9d722d 266 adapter->fw_hal_version,
af19b491
AKS		 267 recv_ctx->context_id,
268 QLCNIC_DESTROY_CTX_RESET,
269 0,
270 QLCNIC_CDRP_CMD_DESTROY_RX_CTX)) {
271
272 dev_err(&adapter->pdev->dev,
273 "Failed to destroy rx ctx in firmware\n");
274 }
275}
276
277static int
278qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter)
279{
280 struct qlcnic_hostrq_tx_ctx *prq;
281 struct qlcnic_hostrq_cds_ring *prq_cds;
282 struct qlcnic_cardrsp_tx_ctx *prsp;
283 void *rq_addr, *rsp_addr;
284 size_t rq_size, rsp_size;
285 u32 temp;
286 int err;
287 u64 phys_addr;
288 dma_addr_t rq_phys_addr, rsp_phys_addr;
289 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
290
291 rq_size = SIZEOF_HOSTRQ_TX(struct qlcnic_hostrq_tx_ctx);
292 rq_addr = pci_alloc_consistent(adapter->pdev,
293 rq_size, &rq_phys_addr);
294 if (!rq_addr)
295 return -ENOMEM;
296
297 rsp_size = SIZEOF_CARDRSP_TX(struct qlcnic_cardrsp_tx_ctx);
298 rsp_addr = pci_alloc_consistent(adapter->pdev,
299 rsp_size, &rsp_phys_addr);
300 if (!rsp_addr) {
301 err = -ENOMEM;
302 goto out_free_rq;
303 }
304
305 memset(rq_addr, 0, rq_size);
306 prq = (struct qlcnic_hostrq_tx_ctx *)rq_addr;
307
308 memset(rsp_addr, 0, rsp_size);
309 prsp = (struct qlcnic_cardrsp_tx_ctx *)rsp_addr;
310
311 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
312
313 temp = (QLCNIC_CAP0_LEGACY_CONTEXT | QLCNIC_CAP0_LEGACY_MN |
314 QLCNIC_CAP0_LSO);
315 prq->capabilities[0] = cpu_to_le32(temp);
316
317 prq->host_int_crb_mode =
318 cpu_to_le32(QLCNIC_HOST_INT_CRB_MODE_SHARED);
319
320 prq->interrupt_ctl = 0;
321 prq->msi_index = 0;
322 prq->cmd_cons_dma_addr = cpu_to_le64(tx_ring->hw_cons_phys_addr);
323
324 prq_cds = &prq->cds_ring;
325
326 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
327 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
328
329 phys_addr = rq_phys_addr;
330 err = qlcnic_issue_cmd(adapter,
331 adapter->ahw.pci_func,
2e9d722d 332 adapter->fw_hal_version,
af19b491
AKS		 333 (u32)(phys_addr >> 32),
334 ((u32)phys_addr & 0xffffffff),
335 rq_size,
336 QLCNIC_CDRP_CMD_CREATE_TX_CTX);
337
338 if (err == QLCNIC_RCODE_SUCCESS) {
339 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
2e9d722d
AC		 340 if (adapter->fw_hal_version == QLCNIC_FW_BASE)
341 tx_ring->crb_cmd_producer = qlcnic_get_ioaddr(adapter,
af19b491 342 QLCNIC_REG(temp - 0x200));
2e9d722d
AC		 343 else
344 tx_ring->crb_cmd_producer = adapter->ahw.pci_base0 +
345 temp;
af19b491
AKS		 346
347 adapter->tx_context_id =
348 le16_to_cpu(prsp->context_id);
349 } else {
350 dev_err(&adapter->pdev->dev,
351 "Failed to create tx ctx in firmware%d\n", err);
352 err = -EIO;
353 }
354
355 pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);
356
357out_free_rq:
358 pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);
359
360 return err;
361}
362
363static void
364qlcnic_fw_cmd_destroy_tx_ctx(struct qlcnic_adapter *adapter)
365{
366 if (qlcnic_issue_cmd(adapter,
367 adapter->ahw.pci_func,
2e9d722d 368 adapter->fw_hal_version,
af19b491
AKS		 369 adapter->tx_context_id,
370 QLCNIC_DESTROY_CTX_RESET,
371 0,
372 QLCNIC_CDRP_CMD_DESTROY_TX_CTX)) {
373
374 dev_err(&adapter->pdev->dev,
375 "Failed to destroy tx ctx in firmware\n");
376 }
377}
378
379int
380qlcnic_fw_cmd_query_phy(struct qlcnic_adapter *adapter, u32 reg, u32 *val)
381{
382
383 if (qlcnic_issue_cmd(adapter,
384 adapter->ahw.pci_func,
2e9d722d 385 adapter->fw_hal_version,
af19b491
AKS		 386 reg,
387 0,
388 0,
389 QLCNIC_CDRP_CMD_READ_PHY)) {
390
391 return -EIO;
392 }
393
394 return QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
395}
396
397int
398qlcnic_fw_cmd_set_phy(struct qlcnic_adapter *adapter, u32 reg, u32 val)
399{
400 return qlcnic_issue_cmd(adapter,
401 adapter->ahw.pci_func,
2e9d722d 402 adapter->fw_hal_version,
af19b491
AKS		 403 reg,
404 val,
405 0,
406 QLCNIC_CDRP_CMD_WRITE_PHY);
407}
408
409int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter)
410{
411 void *addr;
412 int err;
413 int ring;
414 struct qlcnic_recv_context *recv_ctx;
415 struct qlcnic_host_rds_ring *rds_ring;
416 struct qlcnic_host_sds_ring *sds_ring;
417 struct qlcnic_host_tx_ring *tx_ring;
418
419 struct pci_dev *pdev = adapter->pdev;
420
421 recv_ctx = &adapter->recv_ctx;
422 tx_ring = adapter->tx_ring;
423
424 tx_ring->hw_consumer = (__le32 *)pci_alloc_consistent(pdev, sizeof(u32),
425 &tx_ring->hw_cons_phys_addr);
426 if (tx_ring->hw_consumer == NULL) {
427 dev_err(&pdev->dev, "failed to allocate tx consumer\n");
428 return -ENOMEM;
429 }
430 *(tx_ring->hw_consumer) = 0;
431
432 /* cmd desc ring */
433 addr = pci_alloc_consistent(pdev, TX_DESC_RINGSIZE(tx_ring),
434 &tx_ring->phys_addr);
435
436 if (addr == NULL) {
437 dev_err(&pdev->dev, "failed to allocate tx desc ring\n");
aadd8184
AC		 438 err = -ENOMEM;
439 goto err_out_free;
af19b491
AKS		 440 }
441
442 tx_ring->desc_head = (struct cmd_desc_type0 *)addr;
443
444 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
445 rds_ring = &recv_ctx->rds_rings[ring];
446 addr = pci_alloc_consistent(adapter->pdev,
447 RCV_DESC_RINGSIZE(rds_ring),
448 &rds_ring->phys_addr);
449 if (addr == NULL) {
450 dev_err(&pdev->dev,
451 "failed to allocate rds ring [%d]\n", ring);
452 err = -ENOMEM;
453 goto err_out_free;
454 }
455 rds_ring->desc_head = (struct rcv_desc *)addr;
456
457 }
458
459 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
460 sds_ring = &recv_ctx->sds_rings[ring];
461
462 addr = pci_alloc_consistent(adapter->pdev,
463 STATUS_DESC_RINGSIZE(sds_ring),
464 &sds_ring->phys_addr);
465 if (addr == NULL) {
466 dev_err(&pdev->dev,
467 "failed to allocate sds ring [%d]\n", ring);
468 err = -ENOMEM;
469 goto err_out_free;
470 }
471 sds_ring->desc_head = (struct status_desc *)addr;
472 }
473
474
475 err = qlcnic_fw_cmd_create_rx_ctx(adapter);
476 if (err)
477 goto err_out_free;
478 err = qlcnic_fw_cmd_create_tx_ctx(adapter);
479 if (err)
480 goto err_out_free;
481
482 set_bit(__QLCNIC_FW_ATTACHED, &adapter->state);
483 return 0;
484
485err_out_free:
486 qlcnic_free_hw_resources(adapter);
487 return err;
488}
489
490void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter)
491{
492 struct qlcnic_recv_context *recv_ctx;
493 struct qlcnic_host_rds_ring *rds_ring;
494 struct qlcnic_host_sds_ring *sds_ring;
495 struct qlcnic_host_tx_ring *tx_ring;
496 int ring;
497
498
499 if (test_and_clear_bit(__QLCNIC_FW_ATTACHED, &adapter->state)) {
500 qlcnic_fw_cmd_destroy_rx_ctx(adapter);
501 qlcnic_fw_cmd_destroy_tx_ctx(adapter);
502
503 /* Allow dma queues to drain after context reset */
504 msleep(20);
505 }
506
507 recv_ctx = &adapter->recv_ctx;
508
509 tx_ring = adapter->tx_ring;
510 if (tx_ring->hw_consumer != NULL) {
511 pci_free_consistent(adapter->pdev,
512 sizeof(u32),
513 tx_ring->hw_consumer,
514 tx_ring->hw_cons_phys_addr);
515 tx_ring->hw_consumer = NULL;
516 }
517
518 if (tx_ring->desc_head != NULL) {
519 pci_free_consistent(adapter->pdev,
520 TX_DESC_RINGSIZE(tx_ring),
521 tx_ring->desc_head, tx_ring->phys_addr);
522 tx_ring->desc_head = NULL;
523 }
524
525 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
526 rds_ring = &recv_ctx->rds_rings[ring];
527
528 if (rds_ring->desc_head != NULL) {
529 pci_free_consistent(adapter->pdev,
530 RCV_DESC_RINGSIZE(rds_ring),
531 rds_ring->desc_head,
532 rds_ring->phys_addr);
533 rds_ring->desc_head = NULL;
534 }
535 }
536
537 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
538 sds_ring = &recv_ctx->sds_rings[ring];
539
540 if (sds_ring->desc_head != NULL) {
541 pci_free_consistent(adapter->pdev,
542 STATUS_DESC_RINGSIZE(sds_ring),
543 sds_ring->desc_head,
544 sds_ring->phys_addr);
545 sds_ring->desc_head = NULL;
546 }
547 }
548}
549
2e9d722d
AC		 550/* Set MAC address of a NIC partition */
551int qlcnic_set_mac_address(struct qlcnic_adapter *adapter, u8* mac)
552{
553 int err = 0;
554 u32 arg1, arg2, arg3;
555
556 arg1 = adapter->ahw.pci_func | BIT_9;
557 arg2 = mac[0] | (mac[1] << 8) | (mac[2] << 16) | (mac[3] << 24);
558 arg3 = mac[4] | (mac[5] << 16);
559
560 err = qlcnic_issue_cmd(adapter,
561 adapter->ahw.pci_func,
562 adapter->fw_hal_version,
563 arg1,
564 arg2,
565 arg3,
566 QLCNIC_CDRP_CMD_MAC_ADDRESS);
567
568 if (err != QLCNIC_RCODE_SUCCESS) {
569 dev_err(&adapter->pdev->dev,
570 "Failed to set mac address%d\n", err);
571 err = -EIO;
572 }
573
574 return err;
575}
576
577/* Get MAC address of a NIC partition */
578int qlcnic_get_mac_address(struct qlcnic_adapter *adapter, u8 *mac)
579{
580 int err;
581 u32 arg1;
582
583 arg1 = adapter->ahw.pci_func | BIT_8;
584 err = qlcnic_issue_cmd(adapter,
585 adapter->ahw.pci_func,
586 adapter->fw_hal_version,
587 arg1,
588 0,
589 0,
590 QLCNIC_CDRP_CMD_MAC_ADDRESS);
591
7f9a0c34 592 if (err == QLCNIC_RCODE_SUCCESS)
2e9d722d
AC		 593 qlcnic_fetch_mac(adapter, QLCNIC_ARG1_CRB_OFFSET,
594 QLCNIC_ARG2_CRB_OFFSET, 0, mac);
7f9a0c34 595 else {
2e9d722d
AC		 596 dev_err(&adapter->pdev->dev,
597 "Failed to get mac address%d\n", err);
598 err = -EIO;
599 }
600
601 return err;
602}
603
604/* Get info of a NIC partition */
605int qlcnic_get_nic_info(struct qlcnic_adapter *adapter, u8 func_id)
606{
607 int err;
608 dma_addr_t nic_dma_t;
609 struct qlcnic_info *nic_info;
610 void *nic_info_addr;
611 size_t nic_size = sizeof(struct qlcnic_info);
612
613 nic_info_addr = pci_alloc_consistent(adapter->pdev,
614 nic_size, &nic_dma_t);
615 if (!nic_info_addr)
616 return -ENOMEM;
617 memset(nic_info_addr, 0, nic_size);
618
619 nic_info = (struct qlcnic_info *) nic_info_addr;
620 err = qlcnic_issue_cmd(adapter,
621 adapter->ahw.pci_func,
622 adapter->fw_hal_version,
623 MSD(nic_dma_t),
624 LSD(nic_dma_t),
625 (func_id << 16 | nic_size),
626 QLCNIC_CDRP_CMD_GET_NIC_INFO);
627
628 if (err == QLCNIC_RCODE_SUCCESS) {
629 adapter->physical_port = le16_to_cpu(nic_info->phys_port);
630 adapter->switch_mode = le16_to_cpu(nic_info->switch_mode);
631 adapter->max_tx_ques = le16_to_cpu(nic_info->max_tx_ques);
632 adapter->max_rx_ques = le16_to_cpu(nic_info->max_rx_ques);
633 adapter->min_tx_bw = le16_to_cpu(nic_info->min_tx_bw);
634 adapter->max_tx_bw = le16_to_cpu(nic_info->max_tx_bw);
635 adapter->max_mtu = le16_to_cpu(nic_info->max_mtu);
636 adapter->capabilities = le32_to_cpu(nic_info->capabilities);
637 adapter->max_mac_filters = nic_info->max_mac_filters;
638
0e33c664
AC		 639 if (adapter->capabilities & BIT_6)
640 adapter->flags |= QLCNIC_ESWITCH_ENABLED;
641 else
642 adapter->flags &= ~QLCNIC_ESWITCH_ENABLED;
643
2e9d722d
AC		 644 dev_info(&adapter->pdev->dev,
645 "phy port: %d switch_mode: %d,\n"
646 "\tmax_tx_q: %d max_rx_q: %d min_tx_bw: 0x%x,\n"
647 "\tmax_tx_bw: 0x%x max_mtu:0x%x, capabilities: 0x%x\n",
648 adapter->physical_port, adapter->switch_mode,
649 adapter->max_tx_ques, adapter->max_rx_ques,
650 adapter->min_tx_bw, adapter->max_tx_bw,
651 adapter->max_mtu, adapter->capabilities);
652 } else {
653 dev_err(&adapter->pdev->dev,
654 "Failed to get nic info%d\n", err);
655 err = -EIO;
656 }
657
658 pci_free_consistent(adapter->pdev, nic_size, nic_info_addr, nic_dma_t);
659 return err;
660}
661
662/* Configure a NIC partition */
663int qlcnic_set_nic_info(struct qlcnic_adapter *adapter, struct qlcnic_info *nic)
664{
665 int err = -EIO;
666 u32 func_state;
667 dma_addr_t nic_dma_t;
668 void *nic_info_addr;
669 struct qlcnic_info *nic_info;
670 size_t nic_size = sizeof(struct qlcnic_info);
671
672 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
673 return err;
674
675 if (qlcnic_api_lock(adapter))
676 return err;
677
678 func_state = QLCRD32(adapter, QLCNIC_CRB_DEV_REF_COUNT);
679 if (QLC_DEV_CHECK_ACTIVE(func_state, nic->pci_func)) {
680 qlcnic_api_unlock(adapter);
681 return err;
682 }
683
684 qlcnic_api_unlock(adapter);
685
686 nic_info_addr = pci_alloc_consistent(adapter->pdev, nic_size,
687 &nic_dma_t);
688 if (!nic_info_addr)
689 return -ENOMEM;
690
691 memset(nic_info_addr, 0, nic_size);
692 nic_info = (struct qlcnic_info *)nic_info_addr;
693
694 nic_info->pci_func = cpu_to_le16(nic->pci_func);
695 nic_info->op_mode = cpu_to_le16(nic->op_mode);
696 nic_info->phys_port = cpu_to_le16(nic->phys_port);
697 nic_info->switch_mode = cpu_to_le16(nic->switch_mode);
698 nic_info->capabilities = cpu_to_le32(nic->capabilities);
699 nic_info->max_mac_filters = nic->max_mac_filters;
700 nic_info->max_tx_ques = cpu_to_le16(nic->max_tx_ques);
701 nic_info->max_rx_ques = cpu_to_le16(nic->max_rx_ques);
702 nic_info->min_tx_bw = cpu_to_le16(nic->min_tx_bw);
703 nic_info->max_tx_bw = cpu_to_le16(nic->max_tx_bw);
704
705 err = qlcnic_issue_cmd(adapter,
706 adapter->ahw.pci_func,
707 adapter->fw_hal_version,
708 MSD(nic_dma_t),
709 LSD(nic_dma_t),
710 nic_size,
711 QLCNIC_CDRP_CMD_SET_NIC_INFO);
712
713 if (err != QLCNIC_RCODE_SUCCESS) {
714 dev_err(&adapter->pdev->dev,
715 "Failed to set nic info%d\n", err);
716 err = -EIO;
717 }
718
719 pci_free_consistent(adapter->pdev, nic_size, nic_info_addr, nic_dma_t);
720 return err;
721}
722
723/* Get PCI Info of a partition */
724int qlcnic_get_pci_info(struct qlcnic_adapter *adapter)
725{
726 int err = 0, i;
727 dma_addr_t pci_info_dma_t;
728 struct qlcnic_pci_info *npar;
729 void *pci_info_addr;
730 size_t npar_size = sizeof(struct qlcnic_pci_info);
731 size_t pci_size = npar_size * QLCNIC_MAX_PCI_FUNC;
732
733 pci_info_addr = pci_alloc_consistent(adapter->pdev, pci_size,
734 &pci_info_dma_t);
735 if (!pci_info_addr)
736 return -ENOMEM;
737 memset(pci_info_addr, 0, pci_size);
738
739 if (!adapter->npars)
740 adapter->npars = kzalloc(pci_size, GFP_KERNEL);
741 if (!adapter->npars) {
742 err = -ENOMEM;
743 goto err_npar;
744 }
745
746 if (!adapter->eswitch)
747 adapter->eswitch = kzalloc(sizeof(struct qlcnic_eswitch) *
748 QLCNIC_NIU_MAX_XG_PORTS, GFP_KERNEL);
749 if (!adapter->eswitch) {
750 err = -ENOMEM;
751 goto err_eswitch;
752 }
753
754 npar = (struct qlcnic_pci_info *) pci_info_addr;
755 err = qlcnic_issue_cmd(adapter,
756 adapter->ahw.pci_func,
757 adapter->fw_hal_version,
758 MSD(pci_info_dma_t),
759 LSD(pci_info_dma_t),
760 pci_size,
761 QLCNIC_CDRP_CMD_GET_PCI_INFO);
762
763 if (err == QLCNIC_RCODE_SUCCESS) {
764 for (i = 0; i < QLCNIC_MAX_PCI_FUNC; i++, npar++) {
765 adapter->npars[i].id = le32_to_cpu(npar->id);
766 adapter->npars[i].active = le32_to_cpu(npar->active);
767 adapter->npars[i].type = le32_to_cpu(npar->type);
768 adapter->npars[i].default_port =
769 le32_to_cpu(npar->default_port);
770 adapter->npars[i].tx_min_bw =
771 le32_to_cpu(npar->tx_min_bw);
772 adapter->npars[i].tx_max_bw =
773 le32_to_cpu(npar->tx_max_bw);
774 memcpy(adapter->npars[i].mac, npar->mac, ETH_ALEN);
775 }
776 } else {
777 dev_err(&adapter->pdev->dev,
778 "Failed to get PCI Info%d\n", err);
779 kfree(adapter->npars);
780 err = -EIO;
781 }
782 goto err_npar;
783
784err_eswitch:
785 kfree(adapter->npars);
786 adapter->npars = NULL;
787
788err_npar:
789 pci_free_consistent(adapter->pdev, pci_size, pci_info_addr,
790 pci_info_dma_t);
791 return err;
792}
793
794/* Reset a NIC partition */
795
796int qlcnic_reset_partition(struct qlcnic_adapter *adapter, u8 func_no)
797{
798 int err = -EIO;
799
800 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
801 return err;
802
803 err = qlcnic_issue_cmd(adapter,
804 adapter->ahw.pci_func,
805 adapter->fw_hal_version,
806 func_no,
807 0,
808 0,
809 QLCNIC_CDRP_CMD_RESET_NPAR);
810
811 if (err != QLCNIC_RCODE_SUCCESS) {
812 dev_err(&adapter->pdev->dev,
813 "Failed to issue reset partition%d\n", err);
814 err = -EIO;
815 }
816
817 return err;
818}
819
820/* Get eSwitch Capabilities */
821int qlcnic_get_eswitch_capabilities(struct qlcnic_adapter *adapter, u8 port,
822 struct qlcnic_eswitch *eswitch)
823{
824 int err = -EIO;
825 u32 arg1, arg2;
826
827 if (adapter->op_mode == QLCNIC_NON_PRIV_FUNC)
828 return err;
829
830 err = qlcnic_issue_cmd(adapter,
831 adapter->ahw.pci_func,
832 adapter->fw_hal_version,
833 port,
834 0,
835 0,
836 QLCNIC_CDRP_CMD_GET_ESWITCH_CAPABILITY);
837
838 if (err == QLCNIC_RCODE_SUCCESS) {
839 arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
840 arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
841
842 eswitch->port = arg1 & 0xf;
843 eswitch->active_vports = LSB(arg2);
844 eswitch->max_ucast_filters = MSB(arg2);
845 eswitch->max_active_vlans = LSB(MSW(arg2));
846 if (arg1 & BIT_6)
847 eswitch->flags |= QLCNIC_SWITCH_VLAN_FILTERING;
848 if (arg1 & BIT_7)
849 eswitch->flags |= QLCNIC_SWITCH_PROMISC_MODE;
850 if (arg1 & BIT_8)
851 eswitch->flags |= QLCNIC_SWITCH_PORT_MIRRORING;
852 } else {
853 dev_err(&adapter->pdev->dev,
854 "Failed to get eswitch capabilities%d\n", err);
855 }
856
857 return err;
858}
859
860/* Get current status of eswitch */
861int qlcnic_get_eswitch_status(struct qlcnic_adapter *adapter, u8 port,
862 struct qlcnic_eswitch *eswitch)
863{
864 int err = -EIO;
865 u32 arg1, arg2;
866
867 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
868 return err;
869
870 err = qlcnic_issue_cmd(adapter,
871 adapter->ahw.pci_func,
872 adapter->fw_hal_version,
873 port,
874 0,
875 0,
876 QLCNIC_CDRP_CMD_GET_ESWITCH_STATUS);
877
878 if (err == QLCNIC_RCODE_SUCCESS) {
879 arg1 = QLCRD32(adapter, QLCNIC_ARG1_CRB_OFFSET);
880 arg2 = QLCRD32(adapter, QLCNIC_ARG2_CRB_OFFSET);
881
882 eswitch->port = arg1 & 0xf;
883 eswitch->active_vports = LSB(arg2);
884 eswitch->active_ucast_filters = MSB(arg2);
885 eswitch->active_vlans = LSB(MSW(arg2));
886 if (arg1 & BIT_6)
887 eswitch->flags |= QLCNIC_SWITCH_VLAN_FILTERING;
888 if (arg1 & BIT_8)
889 eswitch->flags |= QLCNIC_SWITCH_PORT_MIRRORING;
890
891 } else {
892 dev_err(&adapter->pdev->dev,
893 "Failed to get eswitch status%d\n", err);
894 }
895
896 return err;
897}
898
899/* Enable/Disable eSwitch */
900int qlcnic_toggle_eswitch(struct qlcnic_adapter *adapter, u8 id, u8 enable)
901{
902 int err = -EIO;
903 u32 arg1, arg2;
904 struct qlcnic_eswitch *eswitch;
905
906 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
907 return err;
908
909 eswitch = &adapter->eswitch[id];
910 if (!eswitch)
911 return err;
912
913 arg1 = eswitch->port | (enable ? BIT_4 : 0);
914 arg2 = eswitch->active_vports | (eswitch->max_ucast_filters << 8) |
915 (eswitch->max_active_vlans << 16);
916 err = qlcnic_issue_cmd(adapter,
917 adapter->ahw.pci_func,
918 adapter->fw_hal_version,
919 arg1,
920 arg2,
921 0,
922 QLCNIC_CDRP_CMD_TOGGLE_ESWITCH);
923
924 if (err != QLCNIC_RCODE_SUCCESS) {
925 dev_err(&adapter->pdev->dev,
926 "Failed to enable eswitch%d\n", eswitch->port);
927 eswitch->flags &= ~QLCNIC_SWITCH_ENABLE;
928 err = -EIO;
929 } else {
930 eswitch->flags |= QLCNIC_SWITCH_ENABLE;
931 dev_info(&adapter->pdev->dev,
932 "Enabled eSwitch for port %d\n", eswitch->port);
933 }
934
935 return err;
936}
937
938/* Configure eSwitch for port mirroring */
939int qlcnic_config_port_mirroring(struct qlcnic_adapter *adapter, u8 id,
940 u8 enable_mirroring, u8 pci_func)
941{
942 int err = -EIO;
943 u32 arg1;
944
945 if (adapter->op_mode != QLCNIC_MGMT_FUNC ||
946 !(adapter->eswitch[id].flags & QLCNIC_SWITCH_ENABLE))
947 return err;
948
949 arg1 = id | (enable_mirroring ? BIT_4 : 0);
950 arg1 |= pci_func << 8;
951
952 err = qlcnic_issue_cmd(adapter,
953 adapter->ahw.pci_func,
954 adapter->fw_hal_version,
955 arg1,
956 0,
957 0,
958 QLCNIC_CDRP_CMD_SET_PORTMIRRORING);
959
960 if (err != QLCNIC_RCODE_SUCCESS) {
961 dev_err(&adapter->pdev->dev,
962 "Failed to configure port mirroring%d on eswitch:%d\n",
963 pci_func, id);
964 } else {
965 dev_info(&adapter->pdev->dev,
966 "Configured eSwitch %d for port mirroring:%d\n",
967 id, pci_func);
968 }
969
970 return err;
971}
972
973/* Configure eSwitch port */
974int qlcnic_config_switch_port(struct qlcnic_adapter *adapter, u8 id,
975 int vlan_tagging, u8 discard_tagged, u8 promsc_mode,
976 u8 mac_learn, u8 pci_func, u16 vlan_id)
977{
978 int err = -EIO;
979 u32 arg1;
980 struct qlcnic_eswitch *eswitch;
981
982 if (adapter->op_mode != QLCNIC_MGMT_FUNC)
983 return err;
984
985 eswitch = &adapter->eswitch[id];
986 if (!(eswitch->flags & QLCNIC_SWITCH_ENABLE))
987 return err;
988
989 arg1 = eswitch->port | (discard_tagged ? BIT_4 : 0);
990 arg1 |= (promsc_mode ? BIT_6 : 0) | (mac_learn ? BIT_7 : 0);
991 arg1 |= pci_func << 8;
992 if (vlan_tagging)
993 arg1 |= BIT_5 | (vlan_id << 16);
994
995 err = qlcnic_issue_cmd(adapter,
996 adapter->ahw.pci_func,
997 adapter->fw_hal_version,
998 arg1,
999 0,
1000 0,
1001 QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH);
1002
1003 if (err != QLCNIC_RCODE_SUCCESS) {
1004 dev_err(&adapter->pdev->dev,
1005 "Failed to configure eswitch port%d\n", eswitch->port);
1006 eswitch->flags |= QLCNIC_SWITCH_ENABLE;
1007 } else {
1008 eswitch->flags &= ~QLCNIC_SWITCH_ENABLE;
1009 dev_info(&adapter->pdev->dev,
1010 "Configured eSwitch for port %d\n", eswitch->port);
1011 }
1012
1013 return err;
1014}
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