jme.c

   1 /*
   2  * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
   3  *
   4  * Copyright 2008 JMicron Technology Corporation
   5  * http://www.jmicron.com/
   6  * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org>
   7  *
   8  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  */
  24
  25 #include <linux/version.h>
  26 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
  27 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  28 #endif
  29
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/pci.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/etherdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/mii.h>
  37 #include <linux/crc32.h>
  38 #include <linux/delay.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/in.h>
  41 #include <linux/ip.h>
  42 #include <linux/ipv6.h>
  43 #include <linux/tcp.h>
  44 #include <linux/udp.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/slab.h>
  47 #include <net/ip6_checksum.h>
  48 #include "jme.h"
  49
  50 static int force_pseudohp = -1;
  51 static int no_pseudohp = -1;
  52 static int no_extplug = -1;
  53 module_param(force_pseudohp, int, 0);
  54 MODULE_PARM_DESC(force_pseudohp,
  55         "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
  56 module_param(no_pseudohp, int, 0);
  57 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
  58 module_param(no_extplug, int, 0);
  59 MODULE_PARM_DESC(no_extplug,
  60         "Do not use external plug signal for pseudo hot-plug.");
  61
  62 #ifndef JME_NEW_PM_API
  63 static void
  64 jme_pci_wakeup_enable(struct jme_adapter *jme, int enable)
  65 {
  66 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)
  67         pci_enable_wake(jme->pdev, PCI_D1, enable);
  68         pci_enable_wake(jme->pdev, PCI_D2, enable);
  69         pci_enable_wake(jme->pdev, PCI_D3hot, enable);
  70         pci_enable_wake(jme->pdev, PCI_D3cold, enable);
  71 #else
  72         pci_pme_active(jme->pdev, enable);
  73 #endif
  74 }
  75 #endif
  76
  77 static int
  78 jme_mdio_read(struct net_device *netdev, int phy, int reg)
  79 {
  80         struct jme_adapter *jme = netdev_priv(netdev);
  81         int i, val, again = (reg == MII_BMSR) ? 1 : 0;
  82
  83 read_again:
  84         jwrite32(jme, JME_SMI, SMI_OP_REQ |
  85                                 smi_phy_addr(phy) |
  86                                 smi_reg_addr(reg));
  87
  88         wmb();
  89         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
  90                 udelay(20);
  91                 val = jread32(jme, JME_SMI);
  92                 if ((val & SMI_OP_REQ) == 0)
  93                         break;
  94         }
  95
  96         if (i == 0) {
  97                 pr_err("phy(%d) read timeout : %d\n", phy, reg);
  98                 return 0;
  99         }
 100
 101         if (again--)
 102                 goto read_again;
 103
 104         return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
 105 }
 106
 107 static void
 108 jme_mdio_write(struct net_device *netdev,
 109                                 int phy, int reg, int val)
 110 {
 111         struct jme_adapter *jme = netdev_priv(netdev);
 112         int i;
 113
 114         jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
 115                 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
 116                 smi_phy_addr(phy) | smi_reg_addr(reg));
 117
 118         wmb();
 119         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
 120                 udelay(20);
 121                 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
 122                         break;
 123         }
 124
 125         if (i == 0)
 126                 pr_err("phy(%d) write timeout : %d\n", phy, reg);
 127 }
 128
 129 static inline void
 130 jme_reset_phy_processor(struct jme_adapter *jme)
 131 {
 132         u32 val;
 133
 134         jme_mdio_write(jme->dev,
 135                         jme->mii_if.phy_id,
 136                         MII_ADVERTISE, ADVERTISE_ALL |
 137                         ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 138
 139         if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
 140                 jme_mdio_write(jme->dev,
 141                                 jme->mii_if.phy_id,
 142                                 MII_CTRL1000,
 143                                 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 144
 145         val = jme_mdio_read(jme->dev,
 146                                 jme->mii_if.phy_id,
 147                                 MII_BMCR);
 148
 149         jme_mdio_write(jme->dev,
 150                         jme->mii_if.phy_id,
 151                         MII_BMCR, val | BMCR_RESET);
 152 }
 153
 154 static void
 155 jme_setup_wakeup_frame(struct jme_adapter *jme,
 156                        const u32 *mask, u32 crc, int fnr)
 157 {
 158         int i;
 159
 160         /*
 161          * Setup CRC pattern
 162          */
 163         jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
 164         wmb();
 165         jwrite32(jme, JME_WFODP, crc);
 166         wmb();
 167
 168         /*
 169          * Setup Mask
 170          */
 171         for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
 172                 jwrite32(jme, JME_WFOI,
 173                                 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
 174                                 (fnr & WFOI_FRAME_SEL));
 175                 wmb();
 176                 jwrite32(jme, JME_WFODP, mask[i]);
 177                 wmb();
 178         }
 179 }
 180
 181 static inline void
 182 jme_mac_rxclk_off(struct jme_adapter *jme)
 183 {
 184         jme->reg_gpreg1 |= GPREG1_RXCLKOFF;
 185         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 186 }
 187
 188 static inline void
 189 jme_mac_rxclk_on(struct jme_adapter *jme)
 190 {
 191         jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF;
 192         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 193 }
 194
 195 static inline void
 196 jme_mac_txclk_off(struct jme_adapter *jme)
 197 {
 198         jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC);
 199         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 200 }
 201
 202 static inline void
 203 jme_mac_txclk_on(struct jme_adapter *jme)
 204 {
 205         u32 speed = jme->reg_ghc & GHC_SPEED;
 206         if (speed == GHC_SPEED_1000M)
 207                 jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
 208         else
 209                 jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
 210         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 211 }
 212
 213 static inline void
 214 jme_reset_ghc_speed(struct jme_adapter *jme)
 215 {
 216         jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX);
 217         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 218 }
 219
 220 static inline void
 221 jme_reset_250A2_workaround(struct jme_adapter *jme)
 222 {
 223         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 224                              GPREG1_RSSPATCH);
 225         jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 226 }
 227
 228 static inline void
 229 jme_assert_ghc_reset(struct jme_adapter *jme)
 230 {
 231         jme->reg_ghc |= GHC_SWRST;
 232         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 233 }
 234
 235 static inline void
 236 jme_clear_ghc_reset(struct jme_adapter *jme)
 237 {
 238         jme->reg_ghc &= ~GHC_SWRST;
 239         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 240 }
 241
 242 static inline void
 243 jme_reset_mac_processor(struct jme_adapter *jme)
 244 {
 245         static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
 246         u32 crc = 0xCDCDCDCD;
 247         u32 gpreg0;
 248         int i;
 249
 250         jme_reset_ghc_speed(jme);
 251         jme_reset_250A2_workaround(jme);
 252
 253         jme_mac_rxclk_on(jme);
 254         jme_mac_txclk_on(jme);
 255         udelay(1);
 256         jme_assert_ghc_reset(jme);
 257         udelay(1);
 258         jme_mac_rxclk_off(jme);
 259         jme_mac_txclk_off(jme);
 260         udelay(1);
 261         jme_clear_ghc_reset(jme);
 262         udelay(1);
 263         jme_mac_rxclk_on(jme);
 264         jme_mac_txclk_on(jme);
 265         udelay(1);
 266         jme_mac_rxclk_off(jme);
 267         jme_mac_txclk_off(jme);
 268
 269         jwrite32(jme, JME_RXDBA_LO, 0x00000000);
 270         jwrite32(jme, JME_RXDBA_HI, 0x00000000);
 271         jwrite32(jme, JME_RXQDC, 0x00000000);
 272         jwrite32(jme, JME_RXNDA, 0x00000000);
 273         jwrite32(jme, JME_TXDBA_LO, 0x00000000);
 274         jwrite32(jme, JME_TXDBA_HI, 0x00000000);
 275         jwrite32(jme, JME_TXQDC, 0x00000000);
 276         jwrite32(jme, JME_TXNDA, 0x00000000);
 277
 278         jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
 279         jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
 280         for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
 281                 jme_setup_wakeup_frame(jme, mask, crc, i);
 282         if (jme->fpgaver)
 283                 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
 284         else
 285                 gpreg0 = GPREG0_DEFAULT;
 286         jwrite32(jme, JME_GPREG0, gpreg0);
 287 }
 288
 289 static inline void
 290 jme_clear_pm(struct jme_adapter *jme)
 291 {
 292         jwrite32(jme, JME_PMCS, PMCS_STMASK | jme->reg_pmcs);
 293 }
 294
 295 static int
 296 jme_reload_eeprom(struct jme_adapter *jme)
 297 {
 298         u32 val;
 299         int i;
 300
 301         val = jread32(jme, JME_SMBCSR);
 302
 303         if (val & SMBCSR_EEPROMD) {
 304                 val |= SMBCSR_CNACK;
 305                 jwrite32(jme, JME_SMBCSR, val);
 306                 val |= SMBCSR_RELOAD;
 307                 jwrite32(jme, JME_SMBCSR, val);
 308                 mdelay(12);
 309
 310                 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
 311                         mdelay(1);
 312                         if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
 313                                 break;
 314                 }
 315
 316                 if (i == 0) {
 317                         pr_err("eeprom reload timeout\n");
 318                         return -EIO;
 319                 }
 320         }
 321
 322         return 0;
 323 }
 324
 325 static void
 326 jme_load_macaddr(struct net_device *netdev)
 327 {
 328         struct jme_adapter *jme = netdev_priv(netdev);
 329         unsigned char macaddr[6];
 330         u32 val;
 331
 332         spin_lock_bh(&jme->macaddr_lock);
 333         val = jread32(jme, JME_RXUMA_LO);
 334         macaddr[0] = (val >>  0) & 0xFF;
 335         macaddr[1] = (val >>  8) & 0xFF;
 336         macaddr[2] = (val >> 16) & 0xFF;
 337         macaddr[3] = (val >> 24) & 0xFF;
 338         val = jread32(jme, JME_RXUMA_HI);
 339         macaddr[4] = (val >>  0) & 0xFF;
 340         macaddr[5] = (val >>  8) & 0xFF;
 341         memcpy(netdev->dev_addr, macaddr, 6);
 342         spin_unlock_bh(&jme->macaddr_lock);
 343 }
 344
 345 static inline void
 346 jme_set_rx_pcc(struct jme_adapter *jme, int p)
 347 {
 348         switch (p) {
 349         case PCC_OFF:
 350                 jwrite32(jme, JME_PCCRX0,
 351                         ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 352                         ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 353                 break;
 354         case PCC_P1:
 355                 jwrite32(jme, JME_PCCRX0,
 356                         ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 357                         ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 358                 break;
 359         case PCC_P2:
 360                 jwrite32(jme, JME_PCCRX0,
 361                         ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 362                         ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 363                 break;
 364         case PCC_P3:
 365                 jwrite32(jme, JME_PCCRX0,
 366                         ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 367                         ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 368                 break;
 369         default:
 370                 break;
 371         }
 372         wmb();
 373
 374         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
 375                 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
 376 }
 377
 378 static void
 379 jme_start_irq(struct jme_adapter *jme)
 380 {
 381         register struct dynpcc_info *dpi = &(jme->dpi);
 382
 383         jme_set_rx_pcc(jme, PCC_P1);
 384         dpi->cur                = PCC_P1;
 385         dpi->attempt            = PCC_P1;
 386         dpi->cnt                = 0;
 387
 388         jwrite32(jme, JME_PCCTX,
 389                         ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
 390                         ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
 391                         PCCTXQ0_EN
 392                 );
 393
 394         /*
 395          * Enable Interrupts
 396          */
 397         jwrite32(jme, JME_IENS, INTR_ENABLE);
 398 }
 399
 400 static inline void
 401 jme_stop_irq(struct jme_adapter *jme)
 402 {
 403         /*
 404          * Disable Interrupts
 405          */
 406         jwrite32f(jme, JME_IENC, INTR_ENABLE);
 407 }
 408
 409 static u32
 410 jme_linkstat_from_phy(struct jme_adapter *jme)
 411 {
 412         u32 phylink, bmsr;
 413
 414         phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
 415         bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
 416         if (bmsr & BMSR_ANCOMP)
 417                 phylink |= PHY_LINK_AUTONEG_COMPLETE;
 418
 419         return phylink;
 420 }
 421
 422 static inline void
 423 jme_set_phyfifo_5level(struct jme_adapter *jme)
 424 {
 425         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
 426 }
 427
 428 static inline void
 429 jme_set_phyfifo_8level(struct jme_adapter *jme)
 430 {
 431         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
 432 }
 433
 434 static int
 435 jme_check_link(struct net_device *netdev, int testonly)
 436 {
 437         struct jme_adapter *jme = netdev_priv(netdev);
 438         u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr;
 439         char linkmsg[64];
 440         int rc = 0;
 441
 442         linkmsg[0] = '\0';
 443
 444         if (jme->fpgaver)
 445                 phylink = jme_linkstat_from_phy(jme);
 446         else
 447                 phylink = jread32(jme, JME_PHY_LINK);
 448
 449         if (phylink & PHY_LINK_UP) {
 450                 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
 451                         /*
 452                          * If we did not enable AN
 453                          * Speed/Duplex Info should be obtained from SMI
 454                          */
 455                         phylink = PHY_LINK_UP;
 456
 457                         bmcr = jme_mdio_read(jme->dev,
 458                                                 jme->mii_if.phy_id,
 459                                                 MII_BMCR);
 460
 461                         phylink |= ((bmcr & BMCR_SPEED1000) &&
 462                                         (bmcr & BMCR_SPEED100) == 0) ?
 463                                         PHY_LINK_SPEED_1000M :
 464                                         (bmcr & BMCR_SPEED100) ?
 465                                         PHY_LINK_SPEED_100M :
 466                                         PHY_LINK_SPEED_10M;
 467
 468                         phylink |= (bmcr & BMCR_FULLDPLX) ?
 469                                          PHY_LINK_DUPLEX : 0;
 470
 471                         strcat(linkmsg, "Forced: ");
 472                 } else {
 473                         /*
 474                          * Keep polling for speed/duplex resolve complete
 475                          */
 476                         while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
 477                                 --cnt) {
 478
 479                                 udelay(1);
 480
 481                                 if (jme->fpgaver)
 482                                         phylink = jme_linkstat_from_phy(jme);
 483                                 else
 484                                         phylink = jread32(jme, JME_PHY_LINK);
 485                         }
 486                         if (!cnt)
 487                                 pr_err("Waiting speed resolve timeout\n");
 488
 489                         strcat(linkmsg, "ANed: ");
 490                 }
 491
 492                 if (jme->phylink == phylink) {
 493                         rc = 1;
 494                         goto out;
 495                 }
 496                 if (testonly)
 497                         goto out;
 498
 499                 jme->phylink = phylink;
 500
 501                 /*
 502                  * The speed/duplex setting of jme->reg_ghc already cleared
 503                  * by jme_reset_mac_processor()
 504                  */
 505                 switch (phylink & PHY_LINK_SPEED_MASK) {
 506                 case PHY_LINK_SPEED_10M:
 507                         jme->reg_ghc |= GHC_SPEED_10M;
 508                         strcat(linkmsg, "10 Mbps, ");
 509                         break;
 510                 case PHY_LINK_SPEED_100M:
 511                         jme->reg_ghc |= GHC_SPEED_100M;
 512                         strcat(linkmsg, "100 Mbps, ");
 513                         break;
 514                 case PHY_LINK_SPEED_1000M:
 515                         jme->reg_ghc |= GHC_SPEED_1000M;
 516                         strcat(linkmsg, "1000 Mbps, ");
 517                         break;
 518                 default:
 519                         break;
 520                 }
 521
 522                 if (phylink & PHY_LINK_DUPLEX) {
 523                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
 524                         jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX);
 525                         jme->reg_ghc |= GHC_DPX;
 526                 } else {
 527                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
 528                                                 TXMCS_BACKOFF |
 529                                                 TXMCS_CARRIERSENSE |
 530                                                 TXMCS_COLLISION);
 531                         jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX);
 532                 }
 533
 534                 jwrite32(jme, JME_GHC, jme->reg_ghc);
 535
 536                 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
 537                         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 538                                              GPREG1_RSSPATCH);
 539                         if (!(phylink & PHY_LINK_DUPLEX))
 540                                 jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH;
 541                         switch (phylink & PHY_LINK_SPEED_MASK) {
 542                         case PHY_LINK_SPEED_10M:
 543                                 jme_set_phyfifo_8level(jme);
 544                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 545                                 break;
 546                         case PHY_LINK_SPEED_100M:
 547                                 jme_set_phyfifo_5level(jme);
 548                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 549                                 break;
 550                         case PHY_LINK_SPEED_1000M:
 551                                 jme_set_phyfifo_8level(jme);
 552                                 break;
 553                         default:
 554                                 break;
 555                         }
 556                 }
 557                 jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 558
 559                 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
 560                                         "Full-Duplex, " :
 561                                         "Half-Duplex, ");
 562                 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
 563                                         "MDI-X" :
 564                                         "MDI");
 565                 netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg);
 566                 netif_carrier_on(netdev);
 567         } else {
 568                 if (testonly)
 569                         goto out;
 570
 571                 netif_info(jme, link, jme->dev, "Link is down\n");
 572                 jme->phylink = 0;
 573                 netif_carrier_off(netdev);
 574         }
 575
 576 out:
 577         return rc;
 578 }
 579
 580 static int
 581 jme_setup_tx_resources(struct jme_adapter *jme)
 582 {
 583         struct jme_ring *txring = &(jme->txring[0]);
 584
 585         txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 586                                    TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 587                                    &(txring->dmaalloc),
 588                                    GFP_ATOMIC);
 589
 590         if (!txring->alloc)
 591                 goto err_set_null;
 592
 593         /*
 594          * 16 Bytes align
 595          */
 596         txring->desc            = (void *)ALIGN((unsigned long)(txring->alloc),
 597                                                 RING_DESC_ALIGN);
 598         txring->dma             = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
 599         txring->next_to_use     = 0;
 600         atomic_set(&txring->next_to_clean, 0);
 601         atomic_set(&txring->nr_free, jme->tx_ring_size);
 602
 603         txring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 604                                         jme->tx_ring_size, GFP_ATOMIC);
 605         if (unlikely(!(txring->bufinf)))
 606                 goto err_free_txring;
 607
 608         /*
 609          * Initialize Transmit Descriptors
 610          */
 611         memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
 612         memset(txring->bufinf, 0,
 613                 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
 614
 615         return 0;
 616
 617 err_free_txring:
 618         dma_free_coherent(&(jme->pdev->dev),
 619                           TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 620                           txring->alloc,
 621                           txring->dmaalloc);
 622
 623 err_set_null:
 624         txring->desc = NULL;
 625         txring->dmaalloc = 0;
 626         txring->dma = 0;
 627         txring->bufinf = NULL;
 628
 629         return -ENOMEM;
 630 }
 631
 632 static void
 633 jme_free_tx_resources(struct jme_adapter *jme)
 634 {
 635         int i;
 636         struct jme_ring *txring = &(jme->txring[0]);
 637         struct jme_buffer_info *txbi;
 638
 639         if (txring->alloc) {
 640                 if (txring->bufinf) {
 641                         for (i = 0 ; i < jme->tx_ring_size ; ++i) {
 642                                 txbi = txring->bufinf + i;
 643                                 if (txbi->skb) {
 644                                         dev_kfree_skb(txbi->skb);
 645                                         txbi->skb = NULL;
 646                                 }
 647                                 txbi->mapping           = 0;
 648                                 txbi->len               = 0;
 649                                 txbi->nr_desc           = 0;
 650                                 txbi->start_xmit        = 0;
 651                         }
 652                         kfree(txring->bufinf);
 653                 }
 654
 655                 dma_free_coherent(&(jme->pdev->dev),
 656                                   TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 657                                   txring->alloc,
 658                                   txring->dmaalloc);
 659
 660                 txring->alloc           = NULL;
 661                 txring->desc            = NULL;
 662                 txring->dmaalloc        = 0;
 663                 txring->dma             = 0;
 664                 txring->bufinf          = NULL;
 665         }
 666         txring->next_to_use     = 0;
 667         atomic_set(&txring->next_to_clean, 0);
 668         atomic_set(&txring->nr_free, 0);
 669 }
 670
 671 static inline void
 672 jme_enable_tx_engine(struct jme_adapter *jme)
 673 {
 674         /*
 675          * Select Queue 0
 676          */
 677         jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
 678         wmb();
 679
 680         /*
 681          * Setup TX Queue 0 DMA Bass Address
 682          */
 683         jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 684         jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
 685         jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 686
 687         /*
 688          * Setup TX Descptor Count
 689          */
 690         jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
 691
 692         /*
 693          * Enable TX Engine
 694          */
 695         wmb();
 696         jwrite32f(jme, JME_TXCS, jme->reg_txcs |
 697                                 TXCS_SELECT_QUEUE0 |
 698                                 TXCS_ENABLE);
 699
 700         /*
 701          * Start clock for TX MAC Processor
 702          */
 703         jme_mac_txclk_on(jme);
 704 }
 705
 706 static inline void
 707 jme_restart_tx_engine(struct jme_adapter *jme)
 708 {
 709         /*
 710          * Restart TX Engine
 711          */
 712         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 713                                 TXCS_SELECT_QUEUE0 |
 714                                 TXCS_ENABLE);
 715 }
 716
 717 static inline void
 718 jme_disable_tx_engine(struct jme_adapter *jme)
 719 {
 720         int i;
 721         u32 val;
 722
 723         /*
 724          * Disable TX Engine
 725          */
 726         jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
 727         wmb();
 728
 729         val = jread32(jme, JME_TXCS);
 730         for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
 731                 mdelay(1);
 732                 val = jread32(jme, JME_TXCS);
 733                 rmb();
 734         }
 735
 736         if (!i)
 737                 pr_err("Disable TX engine timeout\n");
 738
 739         /*
 740          * Stop clock for TX MAC Processor
 741          */
 742         jme_mac_txclk_off(jme);
 743 }
 744
 745 static void
 746 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
 747 {
 748         struct jme_ring *rxring = &(jme->rxring[0]);
 749         register struct rxdesc *rxdesc = rxring->desc;
 750         struct jme_buffer_info *rxbi = rxring->bufinf;
 751         rxdesc += i;
 752         rxbi += i;
 753
 754         rxdesc->dw[0] = 0;
 755         rxdesc->dw[1] = 0;
 756         rxdesc->desc1.bufaddrh  = cpu_to_le32((__u64)rxbi->mapping >> 32);
 757         rxdesc->desc1.bufaddrl  = cpu_to_le32(
 758                                         (__u64)rxbi->mapping & 0xFFFFFFFFUL);
 759         rxdesc->desc1.datalen   = cpu_to_le16(rxbi->len);
 760         if (jme->dev->features & NETIF_F_HIGHDMA)
 761                 rxdesc->desc1.flags = RXFLAG_64BIT;
 762         wmb();
 763         rxdesc->desc1.flags     |= RXFLAG_OWN | RXFLAG_INT;
 764 }
 765
 766 static int
 767 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
 768 {
 769         struct jme_ring *rxring = &(jme->rxring[0]);
 770         struct jme_buffer_info *rxbi = rxring->bufinf + i;
 771         struct sk_buff *skb;
 772         dma_addr_t mapping;
 773
 774         skb = netdev_alloc_skb(jme->dev,
 775                 jme->dev->mtu + RX_EXTRA_LEN);
 776         if (unlikely(!skb))
 777                 return -ENOMEM;
 778 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
 779         skb->dev = jme->dev;
 780 #endif
 781
 782         mapping = pci_map_page(jme->pdev, virt_to_page(skb->data),
 783                                offset_in_page(skb->data), skb_tailroom(skb),
 784                                PCI_DMA_FROMDEVICE);
 785 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,26)
 786         if (unlikely(pci_dma_mapping_error(jme->pdev, mapping)))
 787 #else
 788         if (unlikely(pci_dma_mapping_error(mapping)))
 789 #endif
 790         {
 791                 dev_kfree_skb(skb);
 792                 return -ENOMEM;
 793         }
 794
 795         if (likely(rxbi->mapping))
 796                 pci_unmap_page(jme->pdev, rxbi->mapping,
 797                                rxbi->len, PCI_DMA_FROMDEVICE);
 798
 799         rxbi->skb = skb;
 800         rxbi->len = skb_tailroom(skb);
 801         rxbi->mapping = mapping;
 802         return 0;
 803 }
 804
 805 static void
 806 jme_free_rx_buf(struct jme_adapter *jme, int i)
 807 {
 808         struct jme_ring *rxring = &(jme->rxring[0]);
 809         struct jme_buffer_info *rxbi = rxring->bufinf;
 810         rxbi += i;
 811
 812         if (rxbi->skb) {
 813                 pci_unmap_page(jme->pdev,
 814                                  rxbi->mapping,
 815                                  rxbi->len,
 816                                  PCI_DMA_FROMDEVICE);
 817                 dev_kfree_skb(rxbi->skb);
 818                 rxbi->skb = NULL;
 819                 rxbi->mapping = 0;
 820                 rxbi->len = 0;
 821         }
 822 }
 823
 824 static void
 825 jme_free_rx_resources(struct jme_adapter *jme)
 826 {
 827         int i;
 828         struct jme_ring *rxring = &(jme->rxring[0]);
 829
 830         if (rxring->alloc) {
 831                 if (rxring->bufinf) {
 832                         for (i = 0 ; i < jme->rx_ring_size ; ++i)
 833                                 jme_free_rx_buf(jme, i);
 834                         kfree(rxring->bufinf);
 835                 }
 836
 837                 dma_free_coherent(&(jme->pdev->dev),
 838                                   RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 839                                   rxring->alloc,
 840                                   rxring->dmaalloc);
 841                 rxring->alloc    = NULL;
 842                 rxring->desc     = NULL;
 843                 rxring->dmaalloc = 0;
 844                 rxring->dma      = 0;
 845                 rxring->bufinf   = NULL;
 846         }
 847         rxring->next_to_use   = 0;
 848         atomic_set(&rxring->next_to_clean, 0);
 849 }
 850
 851 static int
 852 jme_setup_rx_resources(struct jme_adapter *jme)
 853 {
 854         int i;
 855         struct jme_ring *rxring = &(jme->rxring[0]);
 856
 857         rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 858                                    RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 859                                    &(rxring->dmaalloc),
 860                                    GFP_ATOMIC);
 861         if (!rxring->alloc)
 862                 goto err_set_null;
 863
 864         /*
 865          * 16 Bytes align
 866          */
 867         rxring->desc            = (void *)ALIGN((unsigned long)(rxring->alloc),
 868                                                 RING_DESC_ALIGN);
 869         rxring->dma             = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
 870         rxring->next_to_use     = 0;
 871         atomic_set(&rxring->next_to_clean, 0);
 872
 873         rxring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 874                                         jme->rx_ring_size, GFP_ATOMIC);
 875         if (unlikely(!(rxring->bufinf)))
 876                 goto err_free_rxring;
 877
 878         /*
 879          * Initiallize Receive Descriptors
 880          */
 881         memset(rxring->bufinf, 0,
 882                 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
 883         for (i = 0 ; i < jme->rx_ring_size ; ++i) {
 884                 if (unlikely(jme_make_new_rx_buf(jme, i))) {
 885                         jme_free_rx_resources(jme);
 886                         return -ENOMEM;
 887                 }
 888
 889                 jme_set_clean_rxdesc(jme, i);
 890         }
 891
 892         return 0;
 893
 894 err_free_rxring:
 895         dma_free_coherent(&(jme->pdev->dev),
 896                           RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 897                           rxring->alloc,
 898                           rxring->dmaalloc);
 899 err_set_null:
 900         rxring->desc = NULL;
 901         rxring->dmaalloc = 0;
 902         rxring->dma = 0;
 903         rxring->bufinf = NULL;
 904
 905         return -ENOMEM;
 906 }
 907
 908 static inline void
 909 jme_enable_rx_engine(struct jme_adapter *jme)
 910 {
 911         /*
 912          * Select Queue 0
 913          */
 914         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 915                                 RXCS_QUEUESEL_Q0);
 916         wmb();
 917
 918         /*
 919          * Setup RX DMA Bass Address
 920          */
 921         jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 922         jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
 923         jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 924
 925         /*
 926          * Setup RX Descriptor Count
 927          */
 928         jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
 929
 930         /*
 931          * Setup Unicast Filter
 932          */
 933         jme_set_unicastaddr(jme->dev);
 934         jme_set_multi(jme->dev);
 935
 936         /*
 937          * Enable RX Engine
 938          */
 939         wmb();
 940         jwrite32f(jme, JME_RXCS, jme->reg_rxcs |
 941                                 RXCS_QUEUESEL_Q0 |
 942                                 RXCS_ENABLE |
 943                                 RXCS_QST);
 944
 945         /*
 946          * Start clock for RX MAC Processor
 947          */
 948         jme_mac_rxclk_on(jme);
 949 }
 950
 951 static inline void
 952 jme_restart_rx_engine(struct jme_adapter *jme)
 953 {
 954         /*
 955          * Start RX Engine
 956          */
 957         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 958                                 RXCS_QUEUESEL_Q0 |
 959                                 RXCS_ENABLE |
 960                                 RXCS_QST);
 961 }
 962
 963 static inline void
 964 jme_disable_rx_engine(struct jme_adapter *jme)
 965 {
 966         int i;
 967         u32 val;
 968
 969         /*
 970          * Disable RX Engine
 971          */
 972         jwrite32(jme, JME_RXCS, jme->reg_rxcs);
 973         wmb();
 974
 975         val = jread32(jme, JME_RXCS);
 976         for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
 977                 mdelay(1);
 978                 val = jread32(jme, JME_RXCS);
 979                 rmb();
 980         }
 981
 982         if (!i)
 983                 pr_err("Disable RX engine timeout\n");
 984
 985         /*
 986          * Stop clock for RX MAC Processor
 987          */
 988         jme_mac_rxclk_off(jme);
 989 }
 990
 991 static u16
 992 jme_udpsum(struct sk_buff *skb)
 993 {
 994         u16 csum = 0xFFFFu;
 995 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
 996         struct iphdr *iph;
 997         int iphlen;
 998         struct udphdr *udph;
 999 #endif
1000
1001         if (skb->len < (ETH_HLEN + sizeof(struct iphdr)))
1002                 return csum;
1003         if (skb->protocol != htons(ETH_P_IP))
1004                 return csum;
1005 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1006         iph = (struct iphdr *)skb_pull(skb, ETH_HLEN);
1007         iphlen = (iph->ihl << 2);
1008         if ((iph->protocol != IPPROTO_UDP) ||
1009             (skb->len < (iphlen + sizeof(struct udphdr)))) {
1010                 skb_push(skb, ETH_HLEN);
1011                 return csum;
1012         }
1013         udph = (struct udphdr *)skb_pull(skb, iphlen);
1014         csum = udph->check;
1015         skb_push(skb, iphlen);
1016         skb_push(skb, ETH_HLEN);
1017 #else
1018         skb_set_network_header(skb, ETH_HLEN);
1019         if ((ip_hdr(skb)->protocol != IPPROTO_UDP) ||
1020             (skb->len < (ETH_HLEN +
1021                         (ip_hdr(skb)->ihl << 2) +
1022                         sizeof(struct udphdr)))) {
1023                 skb_reset_network_header(skb);
1024                 return csum;
1025         }
1026         skb_set_transport_header(skb,
1027                         ETH_HLEN + (ip_hdr(skb)->ihl << 2));
1028         csum = udp_hdr(skb)->check;
1029         skb_reset_transport_header(skb);
1030         skb_reset_network_header(skb);
1031 #endif
1032
1033         return csum;
1034 }
1035
1036 static int
1037 jme_rxsum_ok(struct jme_adapter *jme, u16 flags, struct sk_buff *skb)
1038 {
1039         if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
1040                 return false;
1041
1042         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
1043                         == RXWBFLAG_TCPON)) {
1044                 if (flags & RXWBFLAG_IPV4)
1045                         netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
1046                 return false;
1047         }
1048
1049         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
1050                         == RXWBFLAG_UDPON) && jme_udpsum(skb)) {
1051                 if (flags & RXWBFLAG_IPV4)
1052                         netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n");
1053                 return false;
1054         }
1055
1056         if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
1057                         == RXWBFLAG_IPV4)) {
1058                 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n");
1059                 return false;
1060         }
1061
1062         return true;
1063 }
1064
1065 static void
1066 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
1067 {
1068         struct jme_ring *rxring = &(jme->rxring[0]);
1069         struct rxdesc *rxdesc = rxring->desc;
1070         struct jme_buffer_info *rxbi = rxring->bufinf;
1071         struct sk_buff *skb;
1072         int framesize;
1073
1074         rxdesc += idx;
1075         rxbi += idx;
1076
1077         skb = rxbi->skb;
1078         pci_dma_sync_single_for_cpu(jme->pdev,
1079                                         rxbi->mapping,
1080                                         rxbi->len,
1081                                         PCI_DMA_FROMDEVICE);
1082
1083         if (unlikely(jme_make_new_rx_buf(jme, idx))) {
1084                 pci_dma_sync_single_for_device(jme->pdev,
1085                                                 rxbi->mapping,
1086                                                 rxbi->len,
1087                                                 PCI_DMA_FROMDEVICE);
1088
1089                 ++(NET_STAT(jme).rx_dropped);
1090         } else {
1091                 framesize = le16_to_cpu(rxdesc->descwb.framesize)
1092                                 - RX_PREPAD_SIZE;
1093
1094                 skb_reserve(skb, RX_PREPAD_SIZE);
1095                 skb_put(skb, framesize);
1096                 skb->protocol = eth_type_trans(skb, jme->dev);
1097
1098                 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags), skb))
1099                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1100                 else
1101 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,36)
1102                         skb->ip_summed = CHECKSUM_NONE;
1103 #else
1104                         skb_checksum_none_assert(skb);
1105 #endif
1106
1107 #ifndef __UNIFY_VLAN_RX_PATH__
1108                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
1109                         if (jme->vlgrp) {
1110                                 jme->jme_vlan_rx(skb, jme->vlgrp,
1111                                         le16_to_cpu(rxdesc->descwb.vlan));
1112                                 NET_STAT(jme).rx_bytes += 4;
1113                         } else {
1114                                 dev_kfree_skb(skb);
1115                         }
1116                 } else {
1117                         jme->jme_rx(skb);
1118                 }
1119 #else
1120                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
1121                         u16 vid = le16_to_cpu(rxdesc->descwb.vlan);
1122
1123                         __vlan_hwaccel_put_tag(skb, vid);
1124                         NET_STAT(jme).rx_bytes += 4;
1125                 }
1126                 jme->jme_rx(skb);
1127 #endif
1128
1129                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
1130                     cpu_to_le16(RXWBFLAG_DEST_MUL))
1131                         ++(NET_STAT(jme).multicast);
1132
1133                 NET_STAT(jme).rx_bytes += framesize;
1134                 ++(NET_STAT(jme).rx_packets);
1135         }
1136
1137         jme_set_clean_rxdesc(jme, idx);
1138
1139 }
1140
1141 static int
1142 jme_process_receive(struct jme_adapter *jme, int limit)
1143 {
1144         struct jme_ring *rxring = &(jme->rxring[0]);
1145         struct rxdesc *rxdesc = rxring->desc;
1146         int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1147
1148         if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1149                 goto out_inc;
1150
1151         if (unlikely(atomic_read(&jme->link_changing) != 1))
1152                 goto out_inc;
1153
1154         if (unlikely(!netif_carrier_ok(jme->dev)))
1155                 goto out_inc;
1156
1157         i = atomic_read(&rxring->next_to_clean);
1158         while (limit > 0) {
1159                 rxdesc = rxring->desc;
1160                 rxdesc += i;
1161
1162                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1163                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1164                         goto out;
1165                 --limit;
1166
1167                 rmb();
1168                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1169
1170                 if (unlikely(desccnt > 1 ||
1171                 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1172
1173                         if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1174                                 ++(NET_STAT(jme).rx_crc_errors);
1175                         else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1176                                 ++(NET_STAT(jme).rx_fifo_errors);
1177                         else
1178                                 ++(NET_STAT(jme).rx_errors);
1179
1180                         if (desccnt > 1)
1181                                 limit -= desccnt - 1;
1182
1183                         for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1184                                 jme_set_clean_rxdesc(jme, j);
1185                                 j = (j + 1) & (mask);
1186                         }
1187
1188                 } else {
1189                         jme_alloc_and_feed_skb(jme, i);
1190                 }
1191
1192                 i = (i + desccnt) & (mask);
1193         }
1194
1195 out:
1196         atomic_set(&rxring->next_to_clean, i);
1197
1198 out_inc:
1199         atomic_inc(&jme->rx_cleaning);
1200
1201         return limit > 0 ? limit : 0;
1202
1203 }
1204
1205 static void
1206 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1207 {
1208         if (likely(atmp == dpi->cur)) {
1209                 dpi->cnt = 0;
1210                 return;
1211         }
1212
1213         if (dpi->attempt == atmp) {
1214                 ++(dpi->cnt);
1215         } else {
1216                 dpi->attempt = atmp;
1217                 dpi->cnt = 0;
1218         }
1219
1220 }
1221
1222 static void
1223 jme_dynamic_pcc(struct jme_adapter *jme)
1224 {
1225         register struct dynpcc_info *dpi = &(jme->dpi);
1226
1227         if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1228                 jme_attempt_pcc(dpi, PCC_P3);
1229         else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1230                  dpi->intr_cnt > PCC_INTR_THRESHOLD)
1231                 jme_attempt_pcc(dpi, PCC_P2);
1232         else
1233                 jme_attempt_pcc(dpi, PCC_P1);
1234
1235         if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1236                 if (dpi->attempt < dpi->cur)
1237                         tasklet_schedule(&jme->rxclean_task);
1238                 jme_set_rx_pcc(jme, dpi->attempt);
1239                 dpi->cur = dpi->attempt;
1240                 dpi->cnt = 0;
1241         }
1242 }
1243
1244 static void
1245 jme_start_pcc_timer(struct jme_adapter *jme)
1246 {
1247         struct dynpcc_info *dpi = &(jme->dpi);
1248         dpi->last_bytes         = NET_STAT(jme).rx_bytes;
1249         dpi->last_pkts          = NET_STAT(jme).rx_packets;
1250         dpi->intr_cnt           = 0;
1251         jwrite32(jme, JME_TMCSR,
1252                 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1253 }
1254
1255 static inline void
1256 jme_stop_pcc_timer(struct jme_adapter *jme)
1257 {
1258         jwrite32(jme, JME_TMCSR, 0);
1259 }
1260
1261 static void
1262 jme_shutdown_nic(struct jme_adapter *jme)
1263 {
1264         u32 phylink;
1265
1266         phylink = jme_linkstat_from_phy(jme);
1267
1268         if (!(phylink & PHY_LINK_UP)) {
1269                 /*
1270                  * Disable all interrupt before issue timer
1271                  */
1272                 jme_stop_irq(jme);
1273                 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1274         }
1275 }
1276
1277 static void
1278 jme_pcc_tasklet(unsigned long arg)
1279 {
1280         struct jme_adapter *jme = (struct jme_adapter *)arg;
1281         struct net_device *netdev = jme->dev;
1282
1283         if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1284                 jme_shutdown_nic(jme);
1285                 return;
1286         }
1287
1288         if (unlikely(!netif_carrier_ok(netdev) ||
1289                 (atomic_read(&jme->link_changing) != 1)
1290         )) {
1291                 jme_stop_pcc_timer(jme);
1292                 return;
1293         }
1294
1295         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1296                 jme_dynamic_pcc(jme);
1297
1298         jme_start_pcc_timer(jme);
1299 }
1300
1301 static inline void
1302 jme_polling_mode(struct jme_adapter *jme)
1303 {
1304         jme_set_rx_pcc(jme, PCC_OFF);
1305 }
1306
1307 static inline void
1308 jme_interrupt_mode(struct jme_adapter *jme)
1309 {
1310         jme_set_rx_pcc(jme, PCC_P1);
1311 }
1312
1313 static inline int
1314 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1315 {
1316         u32 apmc;
1317         apmc = jread32(jme, JME_APMC);
1318         return apmc & JME_APMC_PSEUDO_HP_EN;
1319 }
1320
1321 static void
1322 jme_start_shutdown_timer(struct jme_adapter *jme)
1323 {
1324         u32 apmc;
1325
1326         apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1327         apmc &= ~JME_APMC_EPIEN_CTRL;
1328         if (!no_extplug) {
1329                 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1330                 wmb();
1331         }
1332         jwrite32f(jme, JME_APMC, apmc);
1333
1334         jwrite32f(jme, JME_TIMER2, 0);
1335         set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1336         jwrite32(jme, JME_TMCSR,
1337                 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1338 }
1339
1340 static void
1341 jme_stop_shutdown_timer(struct jme_adapter *jme)
1342 {
1343         u32 apmc;
1344
1345         jwrite32f(jme, JME_TMCSR, 0);
1346         jwrite32f(jme, JME_TIMER2, 0);
1347         clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1348
1349         apmc = jread32(jme, JME_APMC);
1350         apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1351         jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1352         wmb();
1353         jwrite32f(jme, JME_APMC, apmc);
1354 }
1355
1356 static void
1357 jme_link_change_tasklet(unsigned long arg)
1358 {
1359         struct jme_adapter *jme = (struct jme_adapter *)arg;
1360         struct net_device *netdev = jme->dev;
1361         int rc;
1362
1363         while (!atomic_dec_and_test(&jme->link_changing)) {
1364                 atomic_inc(&jme->link_changing);
1365                 netif_info(jme, intr, jme->dev, "Get link change lock failed\n");
1366                 while (atomic_read(&jme->link_changing) != 1)
1367                         netif_info(jme, intr, jme->dev, "Waiting link change lock\n");
1368         }
1369
1370         if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1371                 goto out;
1372
1373         jme->old_mtu = netdev->mtu;
1374         netif_stop_queue(netdev);
1375         if (jme_pseudo_hotplug_enabled(jme))
1376                 jme_stop_shutdown_timer(jme);
1377
1378         jme_stop_pcc_timer(jme);
1379         tasklet_disable(&jme->txclean_task);
1380         tasklet_disable(&jme->rxclean_task);
1381         tasklet_disable(&jme->rxempty_task);
1382
1383         if (netif_carrier_ok(netdev)) {
1384                 jme_disable_rx_engine(jme);
1385                 jme_disable_tx_engine(jme);
1386                 jme_reset_mac_processor(jme);
1387                 jme_free_rx_resources(jme);
1388                 jme_free_tx_resources(jme);
1389
1390                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1391                         jme_polling_mode(jme);
1392
1393                 netif_carrier_off(netdev);
1394         }
1395
1396         jme_check_link(netdev, 0);
1397         if (netif_carrier_ok(netdev)) {
1398                 rc = jme_setup_rx_resources(jme);
1399                 if (rc) {
1400                         pr_err("Allocating resources for RX error, Device STOPPED!\n");
1401                         goto out_enable_tasklet;
1402                 }
1403
1404                 rc = jme_setup_tx_resources(jme);
1405                 if (rc) {
1406                         pr_err("Allocating resources for TX error, Device STOPPED!\n");
1407                         goto err_out_free_rx_resources;
1408                 }
1409
1410                 jme_enable_rx_engine(jme);
1411                 jme_enable_tx_engine(jme);
1412
1413                 netif_start_queue(netdev);
1414
1415                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1416                         jme_interrupt_mode(jme);
1417
1418                 jme_start_pcc_timer(jme);
1419         } else if (jme_pseudo_hotplug_enabled(jme)) {
1420                 jme_start_shutdown_timer(jme);
1421         }
1422
1423         goto out_enable_tasklet;
1424
1425 err_out_free_rx_resources:
1426         jme_free_rx_resources(jme);
1427 out_enable_tasklet:
1428         tasklet_enable(&jme->txclean_task);
1429         tasklet_hi_enable(&jme->rxclean_task);
1430         tasklet_hi_enable(&jme->rxempty_task);
1431 out:
1432         atomic_inc(&jme->link_changing);
1433 }
1434
1435 static void
1436 jme_rx_clean_tasklet(unsigned long arg)
1437 {
1438         struct jme_adapter *jme = (struct jme_adapter *)arg;
1439         struct dynpcc_info *dpi = &(jme->dpi);
1440
1441         jme_process_receive(jme, jme->rx_ring_size);
1442         ++(dpi->intr_cnt);
1443
1444 }
1445
1446 static int
1447 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1448 {
1449         struct jme_adapter *jme = jme_napi_priv(holder);
1450         DECLARE_NETDEV
1451         int rest;
1452
1453         rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1454
1455         while (atomic_read(&jme->rx_empty) > 0) {
1456                 atomic_dec(&jme->rx_empty);
1457                 ++(NET_STAT(jme).rx_dropped);
1458                 jme_restart_rx_engine(jme);
1459         }
1460         atomic_inc(&jme->rx_empty);
1461
1462         if (rest) {
1463                 JME_RX_COMPLETE(netdev, holder);
1464                 jme_interrupt_mode(jme);
1465         }
1466
1467         JME_NAPI_WEIGHT_SET(budget, rest);
1468         return JME_NAPI_WEIGHT_VAL(budget) - rest;
1469 }
1470
1471 static void
1472 jme_rx_empty_tasklet(unsigned long arg)
1473 {
1474         struct jme_adapter *jme = (struct jme_adapter *)arg;
1475
1476         if (unlikely(atomic_read(&jme->link_changing) != 1))
1477                 return;
1478
1479         if (unlikely(!netif_carrier_ok(jme->dev)))
1480                 return;
1481
1482         netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1483
1484         jme_rx_clean_tasklet(arg);
1485
1486         while (atomic_read(&jme->rx_empty) > 0) {
1487                 atomic_dec(&jme->rx_empty);
1488                 ++(NET_STAT(jme).rx_dropped);
1489                 jme_restart_rx_engine(jme);
1490         }
1491         atomic_inc(&jme->rx_empty);
1492 }
1493
1494 static void
1495 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1496 {
1497         struct jme_ring *txring = &(jme->txring[0]);
1498
1499         smp_wmb();
1500         if (unlikely(netif_queue_stopped(jme->dev) &&
1501         atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1502                 netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n");
1503                 netif_wake_queue(jme->dev);
1504         }
1505
1506 }
1507
1508 static void
1509 jme_tx_clean_tasklet(unsigned long arg)
1510 {
1511         struct jme_adapter *jme = (struct jme_adapter *)arg;
1512         struct jme_ring *txring = &(jme->txring[0]);
1513         struct txdesc *txdesc = txring->desc;
1514         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1515         int i, j, cnt = 0, max, err, mask;
1516
1517         tx_dbg(jme, "Into txclean\n");
1518
1519         if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1520                 goto out;
1521
1522         if (unlikely(atomic_read(&jme->link_changing) != 1))
1523                 goto out;
1524
1525         if (unlikely(!netif_carrier_ok(jme->dev)))
1526                 goto out;
1527
1528         max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1529         mask = jme->tx_ring_mask;
1530
1531         for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1532
1533                 ctxbi = txbi + i;
1534
1535                 if (likely(ctxbi->skb &&
1536                 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1537
1538                         tx_dbg(jme, "txclean: %d+%d@%lu\n",
1539                                i, ctxbi->nr_desc, jiffies);
1540
1541                         err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1542
1543                         for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1544                                 ttxbi = txbi + ((i + j) & (mask));
1545                                 txdesc[(i + j) & (mask)].dw[0] = 0;
1546
1547                                 pci_unmap_page(jme->pdev,
1548                                                  ttxbi->mapping,
1549                                                  ttxbi->len,
1550                                                  PCI_DMA_TODEVICE);
1551
1552                                 ttxbi->mapping = 0;
1553                                 ttxbi->len = 0;
1554                         }
1555
1556                         dev_kfree_skb(ctxbi->skb);
1557
1558                         cnt += ctxbi->nr_desc;
1559
1560                         if (unlikely(err)) {
1561                                 ++(NET_STAT(jme).tx_carrier_errors);
1562                         } else {
1563                                 ++(NET_STAT(jme).tx_packets);
1564                                 NET_STAT(jme).tx_bytes += ctxbi->len;
1565                         }
1566
1567                         ctxbi->skb = NULL;
1568                         ctxbi->len = 0;
1569                         ctxbi->start_xmit = 0;
1570
1571                 } else {
1572                         break;
1573                 }
1574
1575                 i = (i + ctxbi->nr_desc) & mask;
1576
1577                 ctxbi->nr_desc = 0;
1578         }
1579
1580         tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies);
1581         atomic_set(&txring->next_to_clean, i);
1582         atomic_add(cnt, &txring->nr_free);
1583
1584         jme_wake_queue_if_stopped(jme);
1585
1586 out:
1587         atomic_inc(&jme->tx_cleaning);
1588 }
1589
1590 static void
1591 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1592 {
1593         /*
1594          * Disable interrupt
1595          */
1596         jwrite32f(jme, JME_IENC, INTR_ENABLE);
1597
1598         if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1599                 /*
1600                  * Link change event is critical
1601                  * all other events are ignored
1602                  */
1603                 jwrite32(jme, JME_IEVE, intrstat);
1604                 tasklet_schedule(&jme->linkch_task);
1605                 goto out_reenable;
1606         }
1607
1608         if (intrstat & INTR_TMINTR) {
1609                 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1610                 tasklet_schedule(&jme->pcc_task);
1611         }
1612
1613         if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1614                 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1615                 tasklet_schedule(&jme->txclean_task);
1616         }
1617
1618         if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1619                 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1620                                                      INTR_PCCRX0 |
1621                                                      INTR_RX0EMP)) |
1622                                         INTR_RX0);
1623         }
1624
1625         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1626                 if (intrstat & INTR_RX0EMP)
1627                         atomic_inc(&jme->rx_empty);
1628
1629                 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1630                         if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1631                                 jme_polling_mode(jme);
1632                                 JME_RX_SCHEDULE(jme);
1633                         }
1634                 }
1635         } else {
1636                 if (intrstat & INTR_RX0EMP) {
1637                         atomic_inc(&jme->rx_empty);
1638                         tasklet_hi_schedule(&jme->rxempty_task);
1639                 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1640                         tasklet_hi_schedule(&jme->rxclean_task);
1641                 }
1642         }
1643
1644 out_reenable:
1645         /*
1646          * Re-enable interrupt
1647          */
1648         jwrite32f(jme, JME_IENS, INTR_ENABLE);
1649 }
1650
1651 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1652 static irqreturn_t
1653 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1654 #else
1655 static irqreturn_t
1656 jme_intr(int irq, void *dev_id)
1657 #endif
1658 {
1659         struct net_device *netdev = dev_id;
1660         struct jme_adapter *jme = netdev_priv(netdev);
1661         u32 intrstat;
1662
1663         intrstat = jread32(jme, JME_IEVE);
1664
1665         /*
1666          * Check if it's really an interrupt for us
1667          */
1668         if (unlikely((intrstat & INTR_ENABLE) == 0))
1669                 return IRQ_NONE;
1670
1671         /*
1672          * Check if the device still exist
1673          */
1674         if (unlikely(intrstat == ~((typeof(intrstat))0)))
1675                 return IRQ_NONE;
1676
1677         jme_intr_msi(jme, intrstat);
1678
1679         return IRQ_HANDLED;
1680 }
1681
1682 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1683 static irqreturn_t
1684 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1685 #else
1686 static irqreturn_t
1687 jme_msi(int irq, void *dev_id)
1688 #endif
1689 {
1690         struct net_device *netdev = dev_id;
1691         struct jme_adapter *jme = netdev_priv(netdev);
1692         u32 intrstat;
1693
1694         intrstat = jread32(jme, JME_IEVE);
1695
1696         jme_intr_msi(jme, intrstat);
1697
1698         return IRQ_HANDLED;
1699 }
1700
1701 static void
1702 jme_reset_link(struct jme_adapter *jme)
1703 {
1704         jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1705 }
1706
1707 static void
1708 jme_restart_an(struct jme_adapter *jme)
1709 {
1710         u32 bmcr;
1711
1712         spin_lock_bh(&jme->phy_lock);
1713         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1714         bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1715         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1716         spin_unlock_bh(&jme->phy_lock);
1717 }
1718
1719 static int
1720 jme_request_irq(struct jme_adapter *jme)
1721 {
1722         int rc;
1723         struct net_device *netdev = jme->dev;
1724 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1725         irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1726         int irq_flags = SA_SHIRQ;
1727 #else
1728         irq_handler_t handler = jme_intr;
1729         int irq_flags = IRQF_SHARED;
1730 #endif
1731
1732         if (!pci_enable_msi(jme->pdev)) {
1733                 set_bit(JME_FLAG_MSI, &jme->flags);
1734                 handler = jme_msi;
1735                 irq_flags = 0;
1736         }
1737
1738         rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1739                           netdev);
1740         if (rc) {
1741                 netdev_err(netdev,
1742                            "Unable to request %s interrupt (return: %d)\n",
1743                            test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1744                            rc);
1745
1746                 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1747                         pci_disable_msi(jme->pdev);
1748                         clear_bit(JME_FLAG_MSI, &jme->flags);
1749                 }
1750         } else {
1751                 netdev->irq = jme->pdev->irq;
1752         }
1753
1754         return rc;
1755 }
1756
1757 static void
1758 jme_free_irq(struct jme_adapter *jme)
1759 {
1760         free_irq(jme->pdev->irq, jme->dev);
1761         if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1762                 pci_disable_msi(jme->pdev);
1763                 clear_bit(JME_FLAG_MSI, &jme->flags);
1764                 jme->dev->irq = jme->pdev->irq;
1765         }
1766 }
1767
1768 static inline void
1769 jme_new_phy_on(struct jme_adapter *jme)
1770 {
1771         u32 reg;
1772
1773         reg = jread32(jme, JME_PHY_PWR);
1774         reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1775                  PHY_PWR_DWN2 | PHY_PWR_CLKSEL);
1776         jwrite32(jme, JME_PHY_PWR, reg);
1777
1778         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1779         reg &= ~PE1_GPREG0_PBG;
1780         reg |= PE1_GPREG0_ENBG;
1781         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1782 }
1783
1784 static inline void
1785 jme_new_phy_off(struct jme_adapter *jme)
1786 {
1787         u32 reg;
1788
1789         reg = jread32(jme, JME_PHY_PWR);
1790         reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1791                PHY_PWR_DWN2 | PHY_PWR_CLKSEL;
1792         jwrite32(jme, JME_PHY_PWR, reg);
1793
1794         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1795         reg &= ~PE1_GPREG0_PBG;
1796         reg |= PE1_GPREG0_PDD3COLD;
1797         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1798 }
1799
1800 static inline void
1801 jme_phy_on(struct jme_adapter *jme)
1802 {
1803         u32 bmcr;
1804
1805         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1806         bmcr &= ~BMCR_PDOWN;
1807         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1808
1809         if (new_phy_power_ctrl(jme->chip_main_rev))
1810                 jme_new_phy_on(jme);
1811 }
1812
1813 static inline void
1814 jme_phy_off(struct jme_adapter *jme)
1815 {
1816         u32 bmcr;
1817
1818         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1819         bmcr |= BMCR_PDOWN;
1820         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1821
1822         if (new_phy_power_ctrl(jme->chip_main_rev))
1823                 jme_new_phy_off(jme);
1824 }
1825
1826 static int
1827 jme_phy_specreg_read(struct jme_adapter *jme, u32 specreg)
1828 {
1829         u32 phy_addr;
1830
1831         phy_addr = JM_PHY_SPEC_REG_READ | specreg;
1832         jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_ADDR_REG,
1833                         phy_addr);
1834         return jme_mdio_read(jme->dev, jme->mii_if.phy_id,
1835                         JM_PHY_SPEC_DATA_REG);
1836 }
1837
1838 static void
1839 jme_phy_specreg_write(struct jme_adapter *jme, u32 ext_reg, u32 phy_data)
1840 {
1841         u32 phy_addr;
1842
1843         phy_addr = JM_PHY_SPEC_REG_WRITE | ext_reg;
1844         jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_DATA_REG,
1845                         phy_data);
1846         jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_ADDR_REG,
1847                         phy_addr);
1848 }
1849
1850 static int
1851 jme_phy_calibration(struct jme_adapter *jme)
1852 {
1853         u32 ctrl1000, phy_data;
1854
1855         jme_phy_off(jme);
1856         jme_phy_on(jme);
1857         /*  Enabel PHY test mode 1 */
1858         ctrl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
1859         ctrl1000 &= ~PHY_GAD_TEST_MODE_MSK;
1860         ctrl1000 |= PHY_GAD_TEST_MODE_1;
1861         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, ctrl1000);
1862
1863         phy_data = jme_phy_specreg_read(jme, JM_PHY_EXT_COMM_2_REG);
1864         phy_data &= ~JM_PHY_EXT_COMM_2_CALI_MODE_0;
1865         phy_data |= JM_PHY_EXT_COMM_2_CALI_LATCH |
1866                         JM_PHY_EXT_COMM_2_CALI_ENABLE;
1867         jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_2_REG, phy_data);
1868         msleep(20);
1869         phy_data = jme_phy_specreg_read(jme, JM_PHY_EXT_COMM_2_REG);
1870         phy_data &= ~(JM_PHY_EXT_COMM_2_CALI_ENABLE |
1871                         JM_PHY_EXT_COMM_2_CALI_MODE_0 |
1872                         JM_PHY_EXT_COMM_2_CALI_LATCH);
1873         jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_2_REG, phy_data);
1874
1875         /*  Disable PHY test mode */
1876         ctrl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
1877         ctrl1000 &= ~PHY_GAD_TEST_MODE_MSK;
1878         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, ctrl1000);
1879         return 0;
1880 }
1881
1882 static int
1883 jme_phy_setEA(struct jme_adapter *jme)
1884 {
1885         u32 phy_comm0 = 0, phy_comm1 = 0;
1886         u8 nic_ctrl;
1887
1888         pci_read_config_byte(jme->pdev, PCI_PRIV_SHARE_NICCTRL, &nic_ctrl);
1889         if ((nic_ctrl & 0x3) == JME_FLAG_PHYEA_ENABLE)
1890                 return 0;
1891
1892         switch (jme->pdev->device) {
1893         case PCI_DEVICE_ID_JMICRON_JMC250:
1894                 if (((jme->chip_main_rev == 5) &&
1895                         ((jme->chip_sub_rev == 0) || (jme->chip_sub_rev == 1) ||
1896                         (jme->chip_sub_rev == 3))) ||
1897                         (jme->chip_main_rev >= 6)) {
1898                         phy_comm0 = 0x008A;
1899                         phy_comm1 = 0x4109;
1900                 }
1901                 if ((jme->chip_main_rev == 3) &&
1902                         ((jme->chip_sub_rev == 1) || (jme->chip_sub_rev == 2)))
1903                         phy_comm0 = 0xE088;
1904                 break;
1905         case PCI_DEVICE_ID_JMICRON_JMC260:
1906                 if (((jme->chip_main_rev == 5) &&
1907                         ((jme->chip_sub_rev == 0) || (jme->chip_sub_rev == 1) ||
1908                         (jme->chip_sub_rev == 3))) ||
1909                         (jme->chip_main_rev >= 6)) {
1910                         phy_comm0 = 0x008A;
1911                         phy_comm1 = 0x4109;
1912                 }
1913                 if ((jme->chip_main_rev == 3) &&
1914                         ((jme->chip_sub_rev == 1) || (jme->chip_sub_rev == 2)))
1915                         phy_comm0 = 0xE088;
1916                 if ((jme->chip_main_rev == 2) && (jme->chip_sub_rev == 0))
1917                         phy_comm0 = 0x608A;
1918                 if ((jme->chip_main_rev == 2) && (jme->chip_sub_rev == 2))
1919                         phy_comm0 = 0x408A;
1920                 break;
1921         default:
1922                 return -ENODEV;
1923         }
1924         if (phy_comm0)
1925                 jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_0_REG, phy_comm0);
1926         if (phy_comm1)
1927                 jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_1_REG, phy_comm1);
1928
1929         return 0;
1930 }
1931
1932 static int
1933 jme_open(struct net_device *netdev)
1934 {
1935         struct jme_adapter *jme = netdev_priv(netdev);
1936         int rc;
1937
1938         jme_clear_pm(jme);
1939         JME_NAPI_ENABLE(jme);
1940
1941         tasklet_enable(&jme->linkch_task);
1942         tasklet_enable(&jme->txclean_task);
1943         tasklet_hi_enable(&jme->rxclean_task);
1944         tasklet_hi_enable(&jme->rxempty_task);
1945
1946         rc = jme_request_irq(jme);
1947         if (rc)
1948                 goto err_out;
1949
1950         jme_start_irq(jme);
1951
1952         jme_phy_on(jme);
1953         if (test_bit(JME_FLAG_SSET, &jme->flags))
1954                 jme_set_settings(netdev, &jme->old_ecmd);
1955         else
1956                 jme_reset_phy_processor(jme);
1957         jme_phy_calibration(jme);
1958         jme_phy_setEA(jme);
1959         jme_reset_link(jme);
1960
1961         return 0;
1962
1963 err_out:
1964         netif_stop_queue(netdev);
1965         netif_carrier_off(netdev);
1966         return rc;
1967 }
1968
1969 static void
1970 jme_set_100m_half(struct jme_adapter *jme)
1971 {
1972         u32 bmcr, tmp;
1973
1974         jme_phy_on(jme);
1975         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1976         tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1977                        BMCR_SPEED1000 | BMCR_FULLDPLX);
1978         tmp |= BMCR_SPEED100;
1979
1980         if (bmcr != tmp)
1981                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1982
1983         if (jme->fpgaver)
1984                 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1985         else
1986                 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1987 }
1988
1989 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1990 static void
1991 jme_wait_link(struct jme_adapter *jme)
1992 {
1993         u32 phylink, to = JME_WAIT_LINK_TIME;
1994
1995         mdelay(1000);
1996         phylink = jme_linkstat_from_phy(jme);
1997         while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1998                 mdelay(10);
1999                 phylink = jme_linkstat_from_phy(jme);
2000         }
2001 }
2002
2003 static void
2004 jme_powersave_phy(struct jme_adapter *jme)
2005 {
2006         if (jme->reg_pmcs) {
2007                 jme_set_100m_half(jme);
2008                 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2009                         jme_wait_link(jme);
2010                 jme_clear_pm(jme);
2011         } else {
2012                 jme_phy_off(jme);
2013         }
2014 }
2015
2016 static int
2017 jme_close(struct net_device *netdev)
2018 {
2019         struct jme_adapter *jme = netdev_priv(netdev);
2020
2021         netif_stop_queue(netdev);
2022         netif_carrier_off(netdev);
2023
2024         jme_stop_irq(jme);
2025         jme_free_irq(jme);
2026
2027         JME_NAPI_DISABLE(jme);
2028
2029         tasklet_disable(&jme->linkch_task);
2030         tasklet_disable(&jme->txclean_task);
2031         tasklet_disable(&jme->rxclean_task);
2032         tasklet_disable(&jme->rxempty_task);
2033
2034         jme_disable_rx_engine(jme);
2035         jme_disable_tx_engine(jme);
2036         jme_reset_mac_processor(jme);
2037         jme_free_rx_resources(jme);
2038         jme_free_tx_resources(jme);
2039         jme->phylink = 0;
2040         jme_phy_off(jme);
2041
2042         return 0;
2043 }
2044
2045 static int
2046 jme_alloc_txdesc(struct jme_adapter *jme,
2047                         struct sk_buff *skb)
2048 {
2049         struct jme_ring *txring = &(jme->txring[0]);
2050         int idx, nr_alloc, mask = jme->tx_ring_mask;
2051
2052         idx = txring->next_to_use;
2053         nr_alloc = skb_shinfo(skb)->nr_frags + 2;
2054
2055         if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
2056                 return -1;
2057
2058         atomic_sub(nr_alloc, &txring->nr_free);
2059
2060         txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
2061
2062         return idx;
2063 }
2064
2065 static void
2066 jme_fill_tx_map(struct pci_dev *pdev,
2067                 struct txdesc *txdesc,
2068                 struct jme_buffer_info *txbi,
2069                 struct page *page,
2070                 u32 page_offset,
2071                 u32 len,
2072                 bool hidma)
2073 {
2074         dma_addr_t dmaaddr;
2075
2076         dmaaddr = pci_map_page(pdev,
2077                                 page,
2078                                 page_offset,
2079                                 len,
2080                                 PCI_DMA_TODEVICE);
2081
2082         pci_dma_sync_single_for_device(pdev,
2083                                        dmaaddr,
2084                                        len,
2085                                        PCI_DMA_TODEVICE);
2086
2087         txdesc->dw[0] = 0;
2088         txdesc->dw[1] = 0;
2089         txdesc->desc2.flags     = TXFLAG_OWN;
2090         txdesc->desc2.flags     |= (hidma) ? TXFLAG_64BIT : 0;
2091         txdesc->desc2.datalen   = cpu_to_le16(len);
2092         txdesc->desc2.bufaddrh  = cpu_to_le32((__u64)dmaaddr >> 32);
2093         txdesc->desc2.bufaddrl  = cpu_to_le32(
2094                                         (__u64)dmaaddr & 0xFFFFFFFFUL);
2095
2096         txbi->mapping = dmaaddr;
2097         txbi->len = len;
2098 }
2099
2100 static void
2101 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
2102 {
2103         struct jme_ring *txring = &(jme->txring[0]);
2104         struct txdesc *txdesc = txring->desc, *ctxdesc;
2105         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
2106         bool hidma = jme->dev->features & NETIF_F_HIGHDMA;
2107         int i, nr_frags = skb_shinfo(skb)->nr_frags;
2108         int mask = jme->tx_ring_mask;
2109         const struct skb_frag_struct *frag;
2110         u32 len;
2111
2112         for (i = 0 ; i < nr_frags ; ++i) {
2113                 frag = &skb_shinfo(skb)->frags[i];
2114                 ctxdesc = txdesc + ((idx + i + 2) & (mask));
2115                 ctxbi = txbi + ((idx + i + 2) & (mask));
2116
2117 #ifndef __USE_SKB_FRAG_API__
2118                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
2119                                  frag->page_offset, frag->size, hidma);
2120 #else
2121                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi,
2122                                 skb_frag_page(frag),
2123                                 frag->page_offset, skb_frag_size(frag), hidma);
2124 #endif
2125         }
2126
2127         len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
2128         ctxdesc = txdesc + ((idx + 1) & (mask));
2129         ctxbi = txbi + ((idx + 1) & (mask));
2130         jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
2131                         offset_in_page(skb->data), len, hidma);
2132
2133 }
2134
2135 static int
2136 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
2137 {
2138         if (unlikely(
2139 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
2140         skb_shinfo(skb)->tso_size
2141 #else
2142         skb_shinfo(skb)->gso_size
2143 #endif
2144                         && skb_header_cloned(skb) &&
2145                         pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
2146                 dev_kfree_skb(skb);
2147                 return -1;
2148         }
2149
2150         return 0;
2151 }
2152
2153 static int
2154 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
2155 {
2156 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
2157         *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
2158 #else
2159         *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
2160 #endif
2161         if (*mss) {
2162                 *flags |= TXFLAG_LSEN;
2163
2164                 if (skb->protocol == htons(ETH_P_IP)) {
2165                         struct iphdr *iph = ip_hdr(skb);
2166
2167                         iph->check = 0;
2168                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2169                                                                 iph->daddr, 0,
2170                                                                 IPPROTO_TCP,
2171                                                                 0);
2172                 } else {
2173                         struct ipv6hdr *ip6h = ipv6_hdr(skb);
2174
2175                         tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
2176                                                                 &ip6h->daddr, 0,
2177                                                                 IPPROTO_TCP,
2178                                                                 0);
2179                 }
2180
2181                 return 0;
2182         }
2183
2184         return 1;
2185 }
2186
2187 static void
2188 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
2189 {
2190 #ifdef CHECKSUM_PARTIAL
2191         if (skb->ip_summed == CHECKSUM_PARTIAL)
2192 #else
2193         if (skb->ip_summed == CHECKSUM_HW)
2194 #endif
2195         {
2196                 u8 ip_proto;
2197
2198 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2199                 if (skb->protocol == htons(ETH_P_IP))
2200                         ip_proto = ip_hdr(skb)->protocol;
2201                 else if (skb->protocol == htons(ETH_P_IPV6))
2202                         ip_proto = ipv6_hdr(skb)->nexthdr;
2203                 else
2204                         ip_proto = 0;
2205 #else
2206                 switch (skb->protocol) {
2207                 case htons(ETH_P_IP):
2208                         ip_proto = ip_hdr(skb)->protocol;
2209                         break;
2210                 case htons(ETH_P_IPV6):
2211                         ip_proto = ipv6_hdr(skb)->nexthdr;
2212                         break;
2213                 default:
2214                         ip_proto = 0;
2215                         break;
2216                 }
2217 #endif
2218
2219                 switch (ip_proto) {
2220                 case IPPROTO_TCP:
2221                         *flags |= TXFLAG_TCPCS;
2222                         break;
2223                 case IPPROTO_UDP:
2224                         *flags |= TXFLAG_UDPCS;
2225                         break;
2226                 default:
2227                         netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n");
2228                         break;
2229                 }
2230         }
2231 }
2232
2233 static inline void
2234 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
2235 {
2236         if (vlan_tx_tag_present(skb)) {
2237                 *flags |= TXFLAG_TAGON;
2238                 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2239         }
2240 }
2241
2242 static int
2243 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
2244 {
2245         struct jme_ring *txring = &(jme->txring[0]);
2246         struct txdesc *txdesc;
2247         struct jme_buffer_info *txbi;
2248         u8 flags;
2249
2250         txdesc = (struct txdesc *)txring->desc + idx;
2251         txbi = txring->bufinf + idx;
2252
2253         txdesc->dw[0] = 0;
2254         txdesc->dw[1] = 0;
2255         txdesc->dw[2] = 0;
2256         txdesc->dw[3] = 0;
2257         txdesc->desc1.pktsize = cpu_to_le16(skb->len);
2258         /*
2259          * Set OWN bit at final.
2260          * When kernel transmit faster than NIC.
2261          * And NIC trying to send this descriptor before we tell
2262          * it to start sending this TX queue.
2263          * Other fields are already filled correctly.
2264          */
2265         wmb();
2266         flags = TXFLAG_OWN | TXFLAG_INT;
2267         /*
2268          * Set checksum flags while not tso
2269          */
2270         if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
2271                 jme_tx_csum(jme, skb, &flags);
2272         jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
2273         jme_map_tx_skb(jme, skb, idx);
2274         txdesc->desc1.flags = flags;
2275         /*
2276          * Set tx buffer info after telling NIC to send
2277          * For better tx_clean timing
2278          */
2279         wmb();
2280         txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
2281         txbi->skb = skb;
2282         txbi->len = skb->len;
2283         txbi->start_xmit = jiffies;
2284         if (!txbi->start_xmit)
2285                 txbi->start_xmit = (0UL-1);
2286
2287         return 0;
2288 }
2289
2290 static void
2291 jme_stop_queue_if_full(struct jme_adapter *jme)
2292 {
2293         struct jme_ring *txring = &(jme->txring[0]);
2294         struct jme_buffer_info *txbi = txring->bufinf;
2295         int idx = atomic_read(&txring->next_to_clean);
2296
2297         txbi += idx;
2298
2299         smp_wmb();
2300         if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2301                 netif_stop_queue(jme->dev);
2302                 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n");
2303                 smp_wmb();
2304                 if (atomic_read(&txring->nr_free)
2305                         >= (jme->tx_wake_threshold)) {
2306                         netif_wake_queue(jme->dev);
2307                         netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n");
2308                 }
2309         }
2310
2311         if (unlikely(txbi->start_xmit &&
2312                         (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2313                         txbi->skb)) {
2314                 netif_stop_queue(jme->dev);
2315                 netif_info(jme, tx_queued, jme->dev,
2316                            "TX Queue Stopped %d@%lu\n", idx, jiffies);
2317         }
2318 }
2319
2320 /*
2321  * This function is already protected by netif_tx_lock()
2322  */
2323
2324 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2325 static int
2326 #else
2327 static netdev_tx_t
2328 #endif
2329 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2330 {
2331         struct jme_adapter *jme = netdev_priv(netdev);
2332         int idx;
2333
2334         if (unlikely(jme_expand_header(jme, skb))) {
2335                 ++(NET_STAT(jme).tx_dropped);
2336                 return NETDEV_TX_OK;
2337         }
2338
2339         idx = jme_alloc_txdesc(jme, skb);
2340
2341         if (unlikely(idx < 0)) {
2342                 netif_stop_queue(netdev);
2343                 netif_err(jme, tx_err, jme->dev,
2344                           "BUG! Tx ring full when queue awake!\n");
2345
2346                 return NETDEV_TX_BUSY;
2347         }
2348
2349         jme_fill_tx_desc(jme, skb, idx);
2350
2351         jwrite32(jme, JME_TXCS, jme->reg_txcs |
2352                                 TXCS_SELECT_QUEUE0 |
2353                                 TXCS_QUEUE0S |
2354                                 TXCS_ENABLE);
2355 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2356         netdev->trans_start = jiffies;
2357 #endif
2358
2359         tx_dbg(jme, "xmit: %d+%d@%lu\n",
2360                idx, skb_shinfo(skb)->nr_frags + 2, jiffies);
2361         jme_stop_queue_if_full(jme);
2362
2363         return NETDEV_TX_OK;
2364 }
2365
2366 static void
2367 jme_set_unicastaddr(struct net_device *netdev)
2368 {
2369         struct jme_adapter *jme = netdev_priv(netdev);
2370         u32 val;
2371
2372         val = (netdev->dev_addr[3] & 0xff) << 24 |
2373               (netdev->dev_addr[2] & 0xff) << 16 |
2374               (netdev->dev_addr[1] & 0xff) <<  8 |
2375               (netdev->dev_addr[0] & 0xff);
2376         jwrite32(jme, JME_RXUMA_LO, val);
2377         val = (netdev->dev_addr[5] & 0xff) << 8 |
2378               (netdev->dev_addr[4] & 0xff);
2379         jwrite32(jme, JME_RXUMA_HI, val);
2380 }
2381
2382 static int
2383 jme_set_macaddr(struct net_device *netdev, void *p)
2384 {
2385         struct jme_adapter *jme = netdev_priv(netdev);
2386         struct sockaddr *addr = p;
2387
2388         if (netif_running(netdev))
2389                 return -EBUSY;
2390
2391         spin_lock_bh(&jme->macaddr_lock);
2392         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2393         jme_set_unicastaddr(netdev);
2394         spin_unlock_bh(&jme->macaddr_lock);
2395
2396         return 0;
2397 }
2398
2399 static void
2400 jme_set_multi(struct net_device *netdev)
2401 {
2402         struct jme_adapter *jme = netdev_priv(netdev);
2403         u32 mc_hash[2] = {};
2404 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2405         int i;
2406 #endif
2407
2408         spin_lock_bh(&jme->rxmcs_lock);
2409
2410         jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2411
2412         if (netdev->flags & IFF_PROMISC) {
2413                 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2414         } else if (netdev->flags & IFF_ALLMULTI) {
2415                 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2416         } else if (netdev->flags & IFF_MULTICAST) {
2417 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2418                 struct dev_mc_list *mclist;
2419 #else
2420                 struct netdev_hw_addr *ha;
2421 #endif
2422                 int bit_nr;
2423
2424                 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2425 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2426                 for (i = 0, mclist = netdev->mc_list;
2427                         mclist && i < netdev->mc_count;
2428                         ++i, mclist = mclist->next) {
2429 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2430                 netdev_for_each_mc_addr(mclist, netdev) {
2431 #else
2432                 netdev_for_each_mc_addr(ha, netdev) {
2433 #endif
2434 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2435                         bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2436 #else
2437                         bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2438 #endif
2439                         mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2440                 }
2441
2442                 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2443                 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2444         }
2445
2446         wmb();
2447         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2448
2449         spin_unlock_bh(&jme->rxmcs_lock);
2450 }
2451
2452 static int
2453 jme_change_mtu(struct net_device *netdev, int new_mtu)
2454 {
2455         struct jme_adapter *jme = netdev_priv(netdev);
2456
2457         if (new_mtu == jme->old_mtu)
2458                 return 0;
2459
2460         if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2461                 ((new_mtu) < IPV6_MIN_MTU))
2462                 return -EINVAL;
2463
2464         if (new_mtu > 4000) {
2465                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2466                 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2467                 jme_restart_rx_engine(jme);
2468         } else {
2469                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2470                 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2471                 jme_restart_rx_engine(jme);
2472         }
2473
2474 #ifndef __USE_NDO_FIX_FEATURES__
2475         if (new_mtu > 1900) {
2476                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2477                                 NETIF_F_TSO | NETIF_F_TSO6);
2478         } else {
2479                 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2480                         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2481                 if (test_bit(JME_FLAG_TSO, &jme->flags))
2482                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2483         }
2484 #endif
2485
2486         netdev->mtu = new_mtu;
2487 #ifdef __USE_NDO_FIX_FEATURES__
2488         netdev_update_features(netdev);
2489 #endif
2490         jme_reset_link(jme);
2491
2492         return 0;
2493 }
2494
2495 static void
2496 jme_tx_timeout(struct net_device *netdev)
2497 {
2498         struct jme_adapter *jme = netdev_priv(netdev);
2499
2500         jme->phylink = 0;
2501         jme_reset_phy_processor(jme);
2502         if (test_bit(JME_FLAG_SSET, &jme->flags))
2503                 jme_set_settings(netdev, &jme->old_ecmd);
2504
2505         /*
2506          * Force to Reset the link again
2507          */
2508         jme_reset_link(jme);
2509 }
2510
2511 static inline void jme_pause_rx(struct jme_adapter *jme)
2512 {
2513         atomic_dec(&jme->link_changing);
2514
2515         jme_set_rx_pcc(jme, PCC_OFF);
2516         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2517                 JME_NAPI_DISABLE(jme);
2518         } else {
2519                 tasklet_disable(&jme->rxclean_task);
2520                 tasklet_disable(&jme->rxempty_task);
2521         }
2522 }
2523
2524 static inline void jme_resume_rx(struct jme_adapter *jme)
2525 {
2526         struct dynpcc_info *dpi = &(jme->dpi);
2527
2528         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2529                 JME_NAPI_ENABLE(jme);
2530         } else {
2531                 tasklet_hi_enable(&jme->rxclean_task);
2532                 tasklet_hi_enable(&jme->rxempty_task);
2533         }
2534         dpi->cur                = PCC_P1;
2535         dpi->attempt            = PCC_P1;
2536         dpi->cnt                = 0;
2537         jme_set_rx_pcc(jme, PCC_P1);
2538
2539         atomic_inc(&jme->link_changing);
2540 }
2541
2542 #ifndef __UNIFY_VLAN_RX_PATH__
2543 static void
2544 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2545 {
2546         struct jme_adapter *jme = netdev_priv(netdev);
2547
2548         jme_pause_rx(jme);
2549         jme->vlgrp = grp;
2550         jme_resume_rx(jme);
2551 }
2552 #endif
2553
2554 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2555 static void
2556 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2557 {
2558         struct jme_adapter *jme = netdev_priv(netdev);
2559
2560         if(jme->vlgrp) {
2561                 jme_pause_rx(jme);
2562 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2563                 jme->vlgrp->vlan_devices[vid] = NULL;
2564 #else
2565                 vlan_group_set_device(jme->vlgrp, vid, NULL);
2566 #endif
2567                 jme_resume_rx(jme);
2568         }
2569 }
2570 #endif
2571
2572 static void
2573 jme_get_drvinfo(struct net_device *netdev,
2574                      struct ethtool_drvinfo *info)
2575 {
2576         struct jme_adapter *jme = netdev_priv(netdev);
2577
2578         strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
2579         strlcpy(info->version, DRV_VERSION, sizeof(info->version));
2580         strlcpy(info->bus_info, pci_name(jme->pdev), sizeof(info->bus_info));
2581 }
2582
2583 static int
2584 jme_get_regs_len(struct net_device *netdev)
2585 {
2586         return JME_REG_LEN;
2587 }
2588
2589 static void
2590 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2591 {
2592         int i;
2593
2594         for (i = 0 ; i < len ; i += 4)
2595                 p[i >> 2] = jread32(jme, reg + i);
2596 }
2597
2598 static void
2599 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2600 {
2601         int i;
2602         u16 *p16 = (u16 *)p;
2603
2604         for (i = 0 ; i < reg_nr ; ++i)
2605                 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2606 }
2607
2608 static void
2609 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2610 {
2611         struct jme_adapter *jme = netdev_priv(netdev);
2612         u32 *p32 = (u32 *)p;
2613
2614         memset(p, 0xFF, JME_REG_LEN);
2615
2616         regs->version = 1;
2617         mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2618
2619         p32 += 0x100 >> 2;
2620         mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2621
2622         p32 += 0x100 >> 2;
2623         mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2624
2625         p32 += 0x100 >> 2;
2626         mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2627
2628         p32 += 0x100 >> 2;
2629         mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2630 }
2631
2632 static int
2633 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2634 {
2635         struct jme_adapter *jme = netdev_priv(netdev);
2636
2637         ecmd->tx_coalesce_usecs = PCC_TX_TO;
2638         ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2639
2640         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2641                 ecmd->use_adaptive_rx_coalesce = false;
2642                 ecmd->rx_coalesce_usecs = 0;
2643                 ecmd->rx_max_coalesced_frames = 0;
2644                 return 0;
2645         }
2646
2647         ecmd->use_adaptive_rx_coalesce = true;
2648
2649         switch (jme->dpi.cur) {
2650         case PCC_P1:
2651                 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2652                 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2653                 break;
2654         case PCC_P2:
2655                 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2656                 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2657                 break;
2658         case PCC_P3:
2659                 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2660                 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2661                 break;
2662         default:
2663                 break;
2664         }
2665
2666         return 0;
2667 }
2668
2669 static int
2670 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2671 {
2672         struct jme_adapter *jme = netdev_priv(netdev);
2673         struct dynpcc_info *dpi = &(jme->dpi);
2674
2675         if (netif_running(netdev))
2676                 return -EBUSY;
2677
2678         if (ecmd->use_adaptive_rx_coalesce &&
2679             test_bit(JME_FLAG_POLL, &jme->flags)) {
2680                 clear_bit(JME_FLAG_POLL, &jme->flags);
2681                 jme->jme_rx = netif_rx;
2682 #ifndef __UNIFY_VLAN_RX_PATH__
2683                 jme->jme_vlan_rx = vlan_hwaccel_rx;
2684 #endif
2685                 dpi->cur                = PCC_P1;
2686                 dpi->attempt            = PCC_P1;
2687                 dpi->cnt                = 0;
2688                 jme_set_rx_pcc(jme, PCC_P1);
2689                 jme_interrupt_mode(jme);
2690         } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2691                    !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2692                 set_bit(JME_FLAG_POLL, &jme->flags);
2693                 jme->jme_rx = netif_receive_skb;
2694 #ifndef __UNIFY_VLAN_RX_PATH__
2695                 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2696 #endif
2697                 jme_interrupt_mode(jme);
2698         }
2699
2700         return 0;
2701 }
2702
2703 static void
2704 jme_get_pauseparam(struct net_device *netdev,
2705                         struct ethtool_pauseparam *ecmd)
2706 {
2707         struct jme_adapter *jme = netdev_priv(netdev);
2708         u32 val;
2709
2710         ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2711         ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2712
2713         spin_lock_bh(&jme->phy_lock);
2714         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2715         spin_unlock_bh(&jme->phy_lock);
2716
2717         ecmd->autoneg =
2718                 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2719 }
2720
2721 static int
2722 jme_set_pauseparam(struct net_device *netdev,
2723                         struct ethtool_pauseparam *ecmd)
2724 {
2725         struct jme_adapter *jme = netdev_priv(netdev);
2726         u32 val;
2727
2728         if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2729                 (ecmd->tx_pause != 0)) {
2730
2731                 if (ecmd->tx_pause)
2732                         jme->reg_txpfc |= TXPFC_PF_EN;
2733                 else
2734                         jme->reg_txpfc &= ~TXPFC_PF_EN;
2735
2736                 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2737         }
2738
2739         spin_lock_bh(&jme->rxmcs_lock);
2740         if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2741                 (ecmd->rx_pause != 0)) {
2742
2743                 if (ecmd->rx_pause)
2744                         jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2745                 else
2746                         jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2747
2748                 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2749         }
2750         spin_unlock_bh(&jme->rxmcs_lock);
2751
2752         spin_lock_bh(&jme->phy_lock);
2753         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2754         if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2755                 (ecmd->autoneg != 0)) {
2756
2757                 if (ecmd->autoneg)
2758                         val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2759                 else
2760                         val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2761
2762                 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2763                                 MII_ADVERTISE, val);
2764         }
2765         spin_unlock_bh(&jme->phy_lock);
2766
2767         return 0;
2768 }
2769
2770 static void
2771 jme_get_wol(struct net_device *netdev,
2772                 struct ethtool_wolinfo *wol)
2773 {
2774         struct jme_adapter *jme = netdev_priv(netdev);
2775
2776         wol->supported = WAKE_MAGIC | WAKE_PHY;
2777
2778         wol->wolopts = 0;
2779
2780         if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2781                 wol->wolopts |= WAKE_PHY;
2782
2783         if (jme->reg_pmcs & PMCS_MFEN)
2784                 wol->wolopts |= WAKE_MAGIC;
2785
2786 }
2787
2788 static int
2789 jme_set_wol(struct net_device *netdev,
2790                 struct ethtool_wolinfo *wol)
2791 {
2792         struct jme_adapter *jme = netdev_priv(netdev);
2793
2794         if (wol->wolopts & (WAKE_MAGICSECURE |
2795                                 WAKE_UCAST |
2796                                 WAKE_MCAST |
2797                                 WAKE_BCAST |
2798                                 WAKE_ARP))
2799                 return -EOPNOTSUPP;
2800
2801         jme->reg_pmcs = 0;
2802
2803         if (wol->wolopts & WAKE_PHY)
2804                 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2805
2806         if (wol->wolopts & WAKE_MAGIC)
2807                 jme->reg_pmcs |= PMCS_MFEN;
2808
2809         jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2810 #ifndef JME_NEW_PM_API
2811         jme_pci_wakeup_enable(jme, !!(jme->reg_pmcs));
2812 #endif
2813 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
2814         device_set_wakeup_enable(&jme->pdev->dev, !!(jme->reg_pmcs));
2815 #endif
2816
2817         return 0;
2818 }
2819
2820 static int
2821 jme_get_settings(struct net_device *netdev,
2822                      struct ethtool_cmd *ecmd)
2823 {
2824         struct jme_adapter *jme = netdev_priv(netdev);
2825         int rc;
2826
2827         spin_lock_bh(&jme->phy_lock);
2828         rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2829         spin_unlock_bh(&jme->phy_lock);
2830         return rc;
2831 }
2832
2833 static int
2834 jme_set_settings(struct net_device *netdev,
2835                      struct ethtool_cmd *ecmd)
2836 {
2837         struct jme_adapter *jme = netdev_priv(netdev);
2838         int rc, fdc = 0;
2839
2840         if (ethtool_cmd_speed(ecmd) == SPEED_1000
2841             && ecmd->autoneg != AUTONEG_ENABLE)
2842                 return -EINVAL;
2843
2844         /*
2845          * Check If user changed duplex only while force_media.
2846          * Hardware would not generate link change interrupt.
2847          */
2848         if (jme->mii_if.force_media &&
2849         ecmd->autoneg != AUTONEG_ENABLE &&
2850         (jme->mii_if.full_duplex != ecmd->duplex))
2851                 fdc = 1;
2852
2853         spin_lock_bh(&jme->phy_lock);
2854         rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2855         spin_unlock_bh(&jme->phy_lock);
2856
2857         if (!rc) {
2858                 if (fdc)
2859                         jme_reset_link(jme);
2860                 jme->old_ecmd = *ecmd;
2861                 set_bit(JME_FLAG_SSET, &jme->flags);
2862         }
2863
2864         return rc;
2865 }
2866
2867 static int
2868 jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
2869 {
2870         int rc;
2871         struct jme_adapter *jme = netdev_priv(netdev);
2872         struct mii_ioctl_data *mii_data = if_mii(rq);
2873         unsigned int duplex_chg;
2874
2875         if (cmd == SIOCSMIIREG) {
2876                 u16 val = mii_data->val_in;
2877                 if (!(val & (BMCR_RESET|BMCR_ANENABLE)) &&
2878                     (val & BMCR_SPEED1000))
2879                         return -EINVAL;
2880         }
2881
2882         spin_lock_bh(&jme->phy_lock);
2883         rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg);
2884         spin_unlock_bh(&jme->phy_lock);
2885
2886         if (!rc && (cmd == SIOCSMIIREG)) {
2887                 if (duplex_chg)
2888                         jme_reset_link(jme);
2889                 jme_get_settings(netdev, &jme->old_ecmd);
2890                 set_bit(JME_FLAG_SSET, &jme->flags);
2891         }
2892
2893         return rc;
2894 }
2895
2896 static u32
2897 jme_get_link(struct net_device *netdev)
2898 {
2899         struct jme_adapter *jme = netdev_priv(netdev);
2900         return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2901 }
2902
2903 static u32
2904 jme_get_msglevel(struct net_device *netdev)
2905 {
2906         struct jme_adapter *jme = netdev_priv(netdev);
2907         return jme->msg_enable;
2908 }
2909
2910 static void
2911 jme_set_msglevel(struct net_device *netdev, u32 value)
2912 {
2913         struct jme_adapter *jme = netdev_priv(netdev);
2914         jme->msg_enable = value;
2915 }
2916
2917 #ifndef __USE_NDO_FIX_FEATURES__
2918 static u32
2919 jme_get_rx_csum(struct net_device *netdev)
2920 {
2921         struct jme_adapter *jme = netdev_priv(netdev);
2922         return jme->reg_rxmcs & RXMCS_CHECKSUM;
2923 }
2924
2925 static int
2926 jme_set_rx_csum(struct net_device *netdev, u32 on)
2927 {
2928         struct jme_adapter *jme = netdev_priv(netdev);
2929
2930         spin_lock_bh(&jme->rxmcs_lock);
2931         if (on)
2932                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2933         else
2934                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2935         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2936         spin_unlock_bh(&jme->rxmcs_lock);
2937
2938         return 0;
2939 }
2940
2941 static int
2942 jme_set_tx_csum(struct net_device *netdev, u32 on)
2943 {
2944         struct jme_adapter *jme = netdev_priv(netdev);
2945
2946         if (on) {
2947                 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2948                 if (netdev->mtu <= 1900)
2949                         netdev->features |=
2950                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2951         } else {
2952                 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2953                 netdev->features &=
2954                                 ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
2955         }
2956
2957         return 0;
2958 }
2959
2960 static int
2961 jme_set_tso(struct net_device *netdev, u32 on)
2962 {
2963         struct jme_adapter *jme = netdev_priv(netdev);
2964
2965         if (on) {
2966                 set_bit(JME_FLAG_TSO, &jme->flags);
2967                 if (netdev->mtu <= 1900)
2968                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2969         } else {
2970                 clear_bit(JME_FLAG_TSO, &jme->flags);
2971                 netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
2972         }
2973
2974         return 0;
2975 }
2976 #else
2977 #ifndef __NEW_FIX_FEATURES_TYPE__
2978 static u32
2979 jme_fix_features(struct net_device *netdev, u32 features)
2980 #else
2981 static netdev_features_t
2982 jme_fix_features(struct net_device *netdev, netdev_features_t features)
2983 #endif
2984 {
2985         if (netdev->mtu > 1900)
2986                 features &= ~(NETIF_F_ALL_TSO | NETIF_F_ALL_CSUM);
2987         return features;
2988 }
2989
2990 static int
2991 #ifndef __NEW_FIX_FEATURES_TYPE__
2992 jme_set_features(struct net_device *netdev, u32 features)
2993 #else
2994 jme_set_features(struct net_device *netdev, netdev_features_t features)
2995 #endif
2996 {
2997         struct jme_adapter *jme = netdev_priv(netdev);
2998
2999         spin_lock_bh(&jme->rxmcs_lock);
3000         if (features & NETIF_F_RXCSUM)
3001                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
3002         else
3003                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
3004         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
3005         spin_unlock_bh(&jme->rxmcs_lock);
3006
3007         return 0;
3008 }
3009 #endif
3010
3011 static int
3012 jme_nway_reset(struct net_device *netdev)
3013 {
3014         struct jme_adapter *jme = netdev_priv(netdev);
3015         jme_restart_an(jme);
3016         return 0;
3017 }
3018
3019 static u8
3020 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
3021 {
3022         u32 val;
3023         int to;
3024
3025         val = jread32(jme, JME_SMBCSR);
3026         to = JME_SMB_BUSY_TIMEOUT;
3027         while ((val & SMBCSR_BUSY) && --to) {
3028                 msleep(1);
3029                 val = jread32(jme, JME_SMBCSR);
3030         }
3031         if (!to) {
3032                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
3033                 return 0xFF;
3034         }
3035
3036         jwrite32(jme, JME_SMBINTF,
3037                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
3038                 SMBINTF_HWRWN_READ |
3039                 SMBINTF_HWCMD);
3040
3041         val = jread32(jme, JME_SMBINTF);
3042         to = JME_SMB_BUSY_TIMEOUT;
3043         while ((val & SMBINTF_HWCMD) && --to) {
3044                 msleep(1);
3045                 val = jread32(jme, JME_SMBINTF);
3046         }
3047         if (!to) {
3048                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
3049                 return 0xFF;
3050         }
3051
3052         return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
3053 }
3054
3055 static void
3056 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
3057 {
3058         u32 val;
3059         int to;
3060
3061         val = jread32(jme, JME_SMBCSR);
3062         to = JME_SMB_BUSY_TIMEOUT;
3063         while ((val & SMBCSR_BUSY) && --to) {
3064                 msleep(1);
3065                 val = jread32(jme, JME_SMBCSR);
3066         }
3067         if (!to) {
3068                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
3069                 return;
3070         }
3071
3072         jwrite32(jme, JME_SMBINTF,
3073                 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
3074                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
3075                 SMBINTF_HWRWN_WRITE |
3076                 SMBINTF_HWCMD);
3077
3078         val = jread32(jme, JME_SMBINTF);
3079         to = JME_SMB_BUSY_TIMEOUT;
3080         while ((val & SMBINTF_HWCMD) && --to) {
3081                 msleep(1);
3082                 val = jread32(jme, JME_SMBINTF);
3083         }
3084         if (!to) {
3085                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
3086                 return;
3087         }
3088
3089         mdelay(2);
3090 }
3091
3092 static int
3093 jme_get_eeprom_len(struct net_device *netdev)
3094 {
3095         struct jme_adapter *jme = netdev_priv(netdev);
3096         u32 val;
3097         val = jread32(jme, JME_SMBCSR);
3098         return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
3099 }
3100
3101 static int
3102 jme_get_eeprom(struct net_device *netdev,
3103                 struct ethtool_eeprom *eeprom, u8 *data)
3104 {
3105         struct jme_adapter *jme = netdev_priv(netdev);
3106         int i, offset = eeprom->offset, len = eeprom->len;
3107
3108         /*
3109          * ethtool will check the boundary for us
3110          */
3111         eeprom->magic = JME_EEPROM_MAGIC;
3112         for (i = 0 ; i < len ; ++i)
3113                 data[i] = jme_smb_read(jme, i + offset);
3114
3115         return 0;
3116 }
3117
3118 static int
3119 jme_set_eeprom(struct net_device *netdev,
3120                 struct ethtool_eeprom *eeprom, u8 *data)
3121 {
3122         struct jme_adapter *jme = netdev_priv(netdev);
3123         int i, offset = eeprom->offset, len = eeprom->len;
3124
3125         if (eeprom->magic != JME_EEPROM_MAGIC)
3126                 return -EINVAL;
3127
3128         /*
3129          * ethtool will check the boundary for us
3130          */
3131         for (i = 0 ; i < len ; ++i)
3132                 jme_smb_write(jme, i + offset, data[i]);
3133
3134         return 0;
3135 }
3136
3137 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
3138 static struct ethtool_ops jme_ethtool_ops = {
3139 #else
3140 static const struct ethtool_ops jme_ethtool_ops = {
3141 #endif
3142         .get_drvinfo            = jme_get_drvinfo,
3143         .get_regs_len           = jme_get_regs_len,
3144         .get_regs               = jme_get_regs,
3145         .get_coalesce           = jme_get_coalesce,
3146         .set_coalesce           = jme_set_coalesce,
3147         .get_pauseparam         = jme_get_pauseparam,
3148         .set_pauseparam         = jme_set_pauseparam,
3149         .get_wol                = jme_get_wol,
3150         .set_wol                = jme_set_wol,
3151         .get_settings           = jme_get_settings,
3152         .set_settings           = jme_set_settings,
3153         .get_link               = jme_get_link,
3154         .get_msglevel           = jme_get_msglevel,
3155         .set_msglevel           = jme_set_msglevel,
3156 #ifndef __USE_NDO_FIX_FEATURES__
3157         .get_rx_csum            = jme_get_rx_csum,
3158         .set_rx_csum            = jme_set_rx_csum,
3159         .set_tx_csum            = jme_set_tx_csum,
3160         .set_tso                = jme_set_tso,
3161         .set_sg                 = ethtool_op_set_sg,
3162 #endif
3163         .nway_reset             = jme_nway_reset,
3164         .get_eeprom_len         = jme_get_eeprom_len,
3165         .get_eeprom             = jme_get_eeprom,
3166         .set_eeprom             = jme_set_eeprom,
3167 };
3168
3169 static int
3170 jme_pci_dma64(struct pci_dev *pdev)
3171 {
3172         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
3173 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3174             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
3175 #else
3176             !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
3177 #endif
3178            )
3179 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3180                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
3181 #else
3182                 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
3183 #endif
3184                         return 1;
3185
3186         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
3187 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3188             !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
3189 #else
3190             !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
3191 #endif
3192            )
3193 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3194                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
3195 #else
3196                 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
3197 #endif
3198                         return 1;
3199
3200 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3201         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
3202                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
3203 #else
3204         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
3205                 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
3206 #endif
3207                         return 0;
3208
3209         return -1;
3210 }
3211
3212 static inline void
3213 jme_phy_init(struct jme_adapter *jme)
3214 {
3215         u16 reg26;
3216
3217         reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
3218         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
3219 }
3220
3221 static inline void
3222 jme_check_hw_ver(struct jme_adapter *jme)
3223 {
3224         u32 chipmode;
3225
3226         chipmode = jread32(jme, JME_CHIPMODE);
3227
3228         jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
3229         jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
3230         jme->chip_main_rev = jme->chiprev & 0xF;
3231         jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF;
3232 }
3233
3234 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3235 static const struct net_device_ops jme_netdev_ops = {
3236         .ndo_open               = jme_open,
3237         .ndo_stop               = jme_close,
3238         .ndo_validate_addr      = eth_validate_addr,
3239         .ndo_do_ioctl           = jme_ioctl,
3240         .ndo_start_xmit         = jme_start_xmit,
3241         .ndo_set_mac_address    = jme_set_macaddr,
3242 #ifndef __USE_NDO_SET_RX_MODE__
3243         .ndo_set_multicast_list = jme_set_multi,
3244 #else
3245         .ndo_set_rx_mode        = jme_set_multi,
3246 #endif
3247         .ndo_change_mtu         = jme_change_mtu,
3248         .ndo_tx_timeout         = jme_tx_timeout,
3249 #ifndef __UNIFY_VLAN_RX_PATH__
3250         .ndo_vlan_rx_register   = jme_vlan_rx_register,
3251 #endif
3252 #ifdef __USE_NDO_FIX_FEATURES__
3253         .ndo_fix_features       = jme_fix_features,
3254         .ndo_set_features       = jme_set_features,
3255 #endif
3256 };
3257 #endif
3258
3259 static int __devinit
3260 jme_init_one(struct pci_dev *pdev,
3261              const struct pci_device_id *ent)
3262 {
3263         int rc = 0, using_dac, i;
3264         struct net_device *netdev;
3265         struct jme_adapter *jme;
3266         u16 bmcr, bmsr;
3267         u32 apmc;
3268
3269         /*
3270          * set up PCI device basics
3271          */
3272         rc = pci_enable_device(pdev);
3273         if (rc) {
3274                 pr_err("Cannot enable PCI device\n");
3275                 goto err_out;
3276         }
3277
3278         using_dac = jme_pci_dma64(pdev);
3279         if (using_dac < 0) {
3280                 pr_err("Cannot set PCI DMA Mask\n");
3281                 rc = -EIO;
3282                 goto err_out_disable_pdev;
3283         }
3284
3285         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
3286                 pr_err("No PCI resource region found\n");
3287                 rc = -ENOMEM;
3288                 goto err_out_disable_pdev;
3289         }
3290
3291         rc = pci_request_regions(pdev, DRV_NAME);
3292         if (rc) {
3293                 pr_err("Cannot obtain PCI resource region\n");
3294                 goto err_out_disable_pdev;
3295         }
3296
3297         pci_set_master(pdev);
3298
3299         /*
3300          * alloc and init net device
3301          */
3302         netdev = alloc_etherdev(sizeof(*jme));
3303         if (!netdev) {
3304                 pr_err("Cannot allocate netdev structure\n");
3305                 rc = -ENOMEM;
3306                 goto err_out_release_regions;
3307         }
3308 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3309         netdev->netdev_ops = &jme_netdev_ops;
3310 #else
3311         netdev->open                    = jme_open;
3312         netdev->stop                    = jme_close;
3313         netdev->do_ioctl                = jme_ioctl;
3314         netdev->hard_start_xmit         = jme_start_xmit;
3315         netdev->set_mac_address         = jme_set_macaddr;
3316         netdev->set_multicast_list      = jme_set_multi;
3317         netdev->change_mtu              = jme_change_mtu;
3318         netdev->tx_timeout              = jme_tx_timeout;
3319         netdev->vlan_rx_register        = jme_vlan_rx_register;
3320 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
3321         netdev->vlan_rx_kill_vid        = jme_vlan_rx_kill_vid;
3322 #endif
3323         NETDEV_GET_STATS(netdev, &jme_get_stats);
3324 #endif
3325         netdev->ethtool_ops             = &jme_ethtool_ops;
3326         netdev->watchdog_timeo          = TX_TIMEOUT;
3327 #ifdef __USE_NDO_FIX_FEATURES__
3328         netdev->hw_features             =       NETIF_F_IP_CSUM |
3329                                                 NETIF_F_IPV6_CSUM |
3330                                                 NETIF_F_SG |
3331                                                 NETIF_F_TSO |
3332                                                 NETIF_F_TSO6 |
3333                                                 NETIF_F_RXCSUM;
3334 #endif
3335         netdev->features                =       NETIF_F_IP_CSUM |
3336                                                 NETIF_F_IPV6_CSUM |
3337                                                 NETIF_F_SG |
3338                                                 NETIF_F_TSO |
3339                                                 NETIF_F_TSO6 |
3340                                                 NETIF_F_HW_VLAN_TX |
3341                                                 NETIF_F_HW_VLAN_RX;
3342         if (using_dac)
3343                 netdev->features        |=      NETIF_F_HIGHDMA;
3344
3345         SET_NETDEV_DEV(netdev, &pdev->dev);
3346         pci_set_drvdata(pdev, netdev);
3347
3348         /*
3349          * init adapter info
3350          */
3351         jme = netdev_priv(netdev);
3352         jme->pdev = pdev;
3353         jme->dev = netdev;
3354         jme->jme_rx = netif_rx;
3355 #ifndef __UNIFY_VLAN_RX_PATH__
3356         jme->jme_vlan_rx = vlan_hwaccel_rx;
3357 #endif
3358         jme->old_mtu = netdev->mtu = 1500;
3359         jme->phylink = 0;
3360         jme->tx_ring_size = 1 << 10;
3361         jme->tx_ring_mask = jme->tx_ring_size - 1;
3362         jme->tx_wake_threshold = 1 << 9;
3363         jme->rx_ring_size = 1 << 9;
3364         jme->rx_ring_mask = jme->rx_ring_size - 1;
3365         jme->msg_enable = JME_DEF_MSG_ENABLE;
3366         jme->regs = ioremap(pci_resource_start(pdev, 0),
3367                              pci_resource_len(pdev, 0));
3368         if (!(jme->regs)) {
3369                 pr_err("Mapping PCI resource region error\n");
3370                 rc = -ENOMEM;
3371                 goto err_out_free_netdev;
3372         }
3373
3374         if (no_pseudohp) {
3375                 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
3376                 jwrite32(jme, JME_APMC, apmc);
3377         } else if (force_pseudohp) {
3378                 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
3379                 jwrite32(jme, JME_APMC, apmc);
3380         }
3381
3382         NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3383
3384         spin_lock_init(&jme->phy_lock);
3385         spin_lock_init(&jme->macaddr_lock);
3386         spin_lock_init(&jme->rxmcs_lock);
3387
3388         atomic_set(&jme->link_changing, 1);
3389         atomic_set(&jme->rx_cleaning, 1);
3390         atomic_set(&jme->tx_cleaning, 1);
3391         atomic_set(&jme->rx_empty, 1);
3392
3393         tasklet_init(&jme->pcc_task,
3394                      jme_pcc_tasklet,
3395                      (unsigned long) jme);
3396         tasklet_init(&jme->linkch_task,
3397                      jme_link_change_tasklet,
3398                      (unsigned long) jme);
3399         tasklet_init(&jme->txclean_task,
3400                      jme_tx_clean_tasklet,
3401                      (unsigned long) jme);
3402         tasklet_init(&jme->rxclean_task,
3403                      jme_rx_clean_tasklet,
3404                      (unsigned long) jme);
3405         tasklet_init(&jme->rxempty_task,
3406                      jme_rx_empty_tasklet,
3407                      (unsigned long) jme);
3408         tasklet_disable_nosync(&jme->linkch_task);
3409         tasklet_disable_nosync(&jme->txclean_task);
3410         tasklet_disable_nosync(&jme->rxclean_task);
3411         tasklet_disable_nosync(&jme->rxempty_task);
3412         jme->dpi.cur = PCC_P1;
3413
3414         jme->reg_ghc = 0;
3415         jme->reg_rxcs = RXCS_DEFAULT;
3416         jme->reg_rxmcs = RXMCS_DEFAULT;
3417         jme->reg_txpfc = 0;
3418         jme->reg_pmcs = PMCS_MFEN;
3419         jme->reg_gpreg1 = GPREG1_DEFAULT;
3420 #ifndef __USE_NDO_FIX_FEATURES__
3421         set_bit(JME_FLAG_TXCSUM, &jme->flags);
3422         set_bit(JME_FLAG_TSO, &jme->flags);
3423 #else
3424
3425         if (jme->reg_rxmcs & RXMCS_CHECKSUM)
3426                 netdev->features |= NETIF_F_RXCSUM;
3427 #endif
3428
3429         /*
3430          * Get Max Read Req Size from PCI Config Space
3431          */
3432         pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3433         jme->mrrs &= PCI_DCSR_MRRS_MASK;
3434         switch (jme->mrrs) {
3435         case MRRS_128B:
3436                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3437                 break;
3438         case MRRS_256B:
3439                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3440                 break;
3441         default:
3442                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3443                 break;
3444         }
3445
3446         /*
3447          * Must check before reset_mac_processor
3448          */
3449         jme_check_hw_ver(jme);
3450         jme->mii_if.dev = netdev;
3451         if (jme->fpgaver) {
3452                 jme->mii_if.phy_id = 0;
3453                 for (i = 1 ; i < 32 ; ++i) {
3454                         bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3455                         bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3456                         if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3457                                 jme->mii_if.phy_id = i;
3458                                 break;
3459                         }
3460                 }
3461
3462                 if (!jme->mii_if.phy_id) {
3463                         rc = -EIO;
3464                         pr_err("Can not find phy_id\n");
3465                         goto err_out_unmap;
3466                 }
3467
3468                 jme->reg_ghc |= GHC_LINK_POLL;
3469         } else {
3470                 jme->mii_if.phy_id = 1;
3471         }
3472         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3473                 jme->mii_if.supports_gmii = true;
3474         else
3475                 jme->mii_if.supports_gmii = false;
3476         jme->mii_if.phy_id_mask = 0x1F;
3477         jme->mii_if.reg_num_mask = 0x1F;
3478         jme->mii_if.mdio_read = jme_mdio_read;
3479         jme->mii_if.mdio_write = jme_mdio_write;
3480
3481         jme_clear_pm(jme);
3482         pci_set_power_state(jme->pdev, PCI_D0);
3483 #ifndef JME_NEW_PM_API
3484         jme_pci_wakeup_enable(jme, true);
3485 #endif
3486 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
3487         device_set_wakeup_enable(&pdev->dev, true);
3488 #endif
3489
3490         jme_set_phyfifo_5level(jme);
3491 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,22)
3492         pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev);
3493 #else
3494         jme->pcirev = pdev->revision;
3495 #endif
3496         if (!jme->fpgaver)
3497                 jme_phy_init(jme);
3498         jme_phy_off(jme);
3499
3500         /*
3501          * Reset MAC processor and reload EEPROM for MAC Address
3502          */
3503         jme_reset_mac_processor(jme);
3504         rc = jme_reload_eeprom(jme);
3505         if (rc) {
3506                 pr_err("Reload eeprom for reading MAC Address error\n");
3507                 goto err_out_unmap;
3508         }
3509         jme_load_macaddr(netdev);
3510
3511         /*
3512          * Tell stack that we are not ready to work until open()
3513          */
3514         netif_carrier_off(netdev);
3515
3516         rc = register_netdev(netdev);
3517         if (rc) {
3518                 pr_err("Cannot register net device\n");
3519                 goto err_out_unmap;
3520         }
3521
3522         netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x "
3523                    "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3524                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3525                    "JMC250 Gigabit Ethernet" :
3526                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3527                    "JMC260 Fast Ethernet" : "Unknown",
3528                    (jme->fpgaver != 0) ? " (FPGA)" : "",
3529                    (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3530                    jme->pcirev,
3531                    netdev->dev_addr[0],
3532                    netdev->dev_addr[1],
3533                    netdev->dev_addr[2],
3534                    netdev->dev_addr[3],
3535                    netdev->dev_addr[4],
3536                    netdev->dev_addr[5]);
3537
3538         return 0;
3539
3540 err_out_unmap:
3541         iounmap(jme->regs);
3542 err_out_free_netdev:
3543         pci_set_drvdata(pdev, NULL);
3544         free_netdev(netdev);
3545 err_out_release_regions:
3546         pci_release_regions(pdev);
3547 err_out_disable_pdev:
3548         pci_disable_device(pdev);
3549 err_out:
3550         return rc;
3551 }
3552
3553 static void __devexit
3554 jme_remove_one(struct pci_dev *pdev)
3555 {
3556         struct net_device *netdev = pci_get_drvdata(pdev);
3557         struct jme_adapter *jme = netdev_priv(netdev);
3558
3559         unregister_netdev(netdev);
3560         iounmap(jme->regs);
3561         pci_set_drvdata(pdev, NULL);
3562         free_netdev(netdev);
3563         pci_release_regions(pdev);
3564         pci_disable_device(pdev);
3565
3566 }
3567
3568 static void
3569 jme_shutdown(struct pci_dev *pdev)
3570 {
3571         struct net_device *netdev = pci_get_drvdata(pdev);
3572         struct jme_adapter *jme = netdev_priv(netdev);
3573
3574         jme_powersave_phy(jme);
3575 #ifndef JME_NEW_PM_API
3576         jme_pci_wakeup_enable(jme, !!(jme->reg_pmcs));
3577 #endif
3578 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
3579         device_set_wakeup_enable(&jme->pdev->dev, !!(jme->reg_pmcs));
3580 #endif
3581 }
3582
3583 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
3584         #ifdef CONFIG_PM
3585                 #define JME_HAVE_PM
3586         #endif
3587 #else
3588         #ifdef CONFIG_PM_SLEEP
3589                 #define JME_HAVE_PM
3590         #endif
3591 #endif
3592
3593 #ifdef JME_HAVE_PM
3594 static int
3595 #ifdef JME_NEW_PM_API
3596 jme_suspend(struct device *dev)
3597 #else
3598 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3599 #endif
3600 {
3601 #ifdef JME_NEW_PM_API
3602         struct pci_dev *pdev = to_pci_dev(dev);
3603 #endif
3604         struct net_device *netdev = pci_get_drvdata(pdev);
3605         struct jme_adapter *jme = netdev_priv(netdev);
3606
3607         atomic_dec(&jme->link_changing);
3608
3609         netif_device_detach(netdev);
3610         netif_stop_queue(netdev);
3611         jme_stop_irq(jme);
3612
3613         tasklet_disable(&jme->txclean_task);
3614         tasklet_disable(&jme->rxclean_task);
3615         tasklet_disable(&jme->rxempty_task);
3616
3617         if (netif_carrier_ok(netdev)) {
3618                 if (test_bit(JME_FLAG_POLL, &jme->flags))
3619                         jme_polling_mode(jme);
3620
3621                 jme_stop_pcc_timer(jme);
3622                 jme_disable_rx_engine(jme);
3623                 jme_disable_tx_engine(jme);
3624                 jme_reset_mac_processor(jme);
3625                 jme_free_rx_resources(jme);
3626                 jme_free_tx_resources(jme);
3627                 netif_carrier_off(netdev);
3628                 jme->phylink = 0;
3629         }
3630
3631         tasklet_enable(&jme->txclean_task);
3632         tasklet_hi_enable(&jme->rxclean_task);
3633         tasklet_hi_enable(&jme->rxempty_task);
3634
3635         jme_powersave_phy(jme);
3636 #ifndef JME_NEW_PM_API
3637         pci_save_state(pdev);
3638         jme_pci_wakeup_enable(jme, !!(jme->reg_pmcs));
3639         pci_set_power_state(pdev, PCI_D3hot);
3640 #endif
3641
3642         return 0;
3643 }
3644
3645 static int
3646 #ifdef JME_NEW_PM_API
3647 jme_resume(struct device *dev)
3648 #else
3649 jme_resume(struct pci_dev *pdev)
3650 #endif
3651 {
3652 #ifdef JME_NEW_PM_API
3653         struct pci_dev *pdev = to_pci_dev(dev);
3654 #endif
3655         struct net_device *netdev = pci_get_drvdata(pdev);
3656         struct jme_adapter *jme = netdev_priv(netdev);
3657
3658         jme_clear_pm(jme);
3659 #ifndef JME_NEW_PM_API
3660         pci_set_power_state(pdev, PCI_D0);
3661         pci_restore_state(pdev);
3662 #endif
3663
3664         jme_phy_on(jme);
3665         if (test_bit(JME_FLAG_SSET, &jme->flags))
3666                 jme_set_settings(netdev, &jme->old_ecmd);
3667         else
3668                 jme_reset_phy_processor(jme);
3669         jme_phy_calibration(jme);
3670         jme_phy_setEA(jme);
3671         jme_start_irq(jme);
3672         netif_device_attach(netdev);
3673
3674         atomic_inc(&jme->link_changing);
3675
3676         jme_reset_link(jme);
3677
3678         return 0;
3679 }
3680
3681 #ifdef JME_NEW_PM_API
3682 static SIMPLE_DEV_PM_OPS(jme_pm_ops, jme_suspend, jme_resume);
3683 #define JME_PM_OPS (&jme_pm_ops)
3684 #endif
3685
3686 #else
3687
3688 #ifdef JME_NEW_PM_API
3689 #define JME_PM_OPS NULL
3690 #endif
3691 #endif
3692
3693 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3694 static struct pci_device_id jme_pci_tbl[] = {
3695 #else
3696 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3697 #endif
3698         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3699         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3700         { }
3701 };
3702
3703 static struct pci_driver jme_driver = {
3704         .name           = DRV_NAME,
3705         .id_table       = jme_pci_tbl,
3706         .probe          = jme_init_one,
3707         .remove         = __devexit_p(jme_remove_one),
3708         .shutdown       = jme_shutdown,
3709 #ifndef JME_NEW_PM_API
3710         .suspend        = jme_suspend,
3711         .resume         = jme_resume
3712 #else
3713         .driver.pm      = JME_PM_OPS,
3714 #endif
3715 };
3716
3717 static int __init
3718 jme_init_module(void)
3719 {
3720         pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION);
3721         return pci_register_driver(&jme_driver);
3722 }
3723
3724 static void __exit
3725 jme_cleanup_module(void)
3726 {
3727         pci_unregister_driver(&jme_driver);
3728 }
3729
3730 module_init(jme_init_module);
3731 module_exit(jme_cleanup_module);
3732
3733 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3734 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3735 MODULE_LICENSE("GPL");
3736 MODULE_VERSION(DRV_VERSION);
3737 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);