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Commit | Line | Data |
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d7699f87 GFT |
1 | /* |
2 | * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver | |
3 | * | |
4 | * Copyright 2008 JMicron Technology Corporation | |
5 | * http://www.jmicron.com/ | |
6 | * | |
3bf61c55 GFT |
7 | * Author: Guo-Fu Tseng <cooldavid@cooldavid.org> |
8 | * | |
d7699f87 GFT |
9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | * | |
22 | */ | |
23 | ||
4330c2f2 | 24 | #include <linux/version.h> |
d7699f87 GFT |
25 | #include <linux/module.h> |
26 | #include <linux/kernel.h> | |
27 | #include <linux/pci.h> | |
28 | #include <linux/netdevice.h> | |
29 | #include <linux/etherdevice.h> | |
30 | #include <linux/ethtool.h> | |
31 | #include <linux/mii.h> | |
32 | #include <linux/crc32.h> | |
4330c2f2 | 33 | #include <linux/delay.h> |
29bdd921 | 34 | #include <linux/spinlock.h> |
8c198884 GFT |
35 | #include <linux/in.h> |
36 | #include <linux/ip.h> | |
79ce639c GFT |
37 | #include <linux/ipv6.h> |
38 | #include <linux/tcp.h> | |
39 | #include <linux/udp.h> | |
42b1055e | 40 | #include <linux/if_vlan.h> |
d7699f87 GFT |
41 | #include "jme.h" |
42 | ||
cd0ff491 GFT |
43 | static int force_pseudohp = -1; |
44 | static int no_pseudohp = -1; | |
45 | static int no_extplug = -1; | |
46 | module_param(force_pseudohp, int, 0); | |
47 | MODULE_PARM_DESC(force_pseudohp, | |
48 | "Enable pseudo hot-plug feature manually by driver instead of BIOS."); | |
49 | module_param(no_pseudohp, int, 0); | |
50 | MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); | |
51 | module_param(no_extplug, int, 0); | |
52 | MODULE_PARM_DESC(no_extplug, | |
53 | "Do not use external plug signal for pseudo hot-plug."); | |
4330c2f2 | 54 | |
3bf61c55 GFT |
55 | static int |
56 | jme_mdio_read(struct net_device *netdev, int phy, int reg) | |
d7699f87 GFT |
57 | { |
58 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 59 | int i, val, again = (reg == MII_BMSR) ? 1 : 0; |
d7699f87 | 60 | |
186fc259 | 61 | read_again: |
cd0ff491 | 62 | jwrite32(jme, JME_SMI, SMI_OP_REQ | |
3bf61c55 GFT |
63 | smi_phy_addr(phy) | |
64 | smi_reg_addr(reg)); | |
d7699f87 GFT |
65 | |
66 | wmb(); | |
cd0ff491 | 67 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
cdcdc9eb | 68 | udelay(20); |
b3821cc5 GFT |
69 | val = jread32(jme, JME_SMI); |
70 | if ((val & SMI_OP_REQ) == 0) | |
3bf61c55 | 71 | break; |
cd0ff491 | 72 | } |
d7699f87 | 73 | |
cd0ff491 GFT |
74 | if (i == 0) { |
75 | jeprintk(jme->pdev, "phy(%d) read timeout : %d\n", phy, reg); | |
3bf61c55 | 76 | return 0; |
cd0ff491 | 77 | } |
d7699f87 | 78 | |
cd0ff491 | 79 | if (again--) |
186fc259 GFT |
80 | goto read_again; |
81 | ||
cd0ff491 | 82 | return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT; |
d7699f87 GFT |
83 | } |
84 | ||
3bf61c55 GFT |
85 | static void |
86 | jme_mdio_write(struct net_device *netdev, | |
87 | int phy, int reg, int val) | |
d7699f87 GFT |
88 | { |
89 | struct jme_adapter *jme = netdev_priv(netdev); | |
90 | int i; | |
91 | ||
3bf61c55 GFT |
92 | jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ | |
93 | ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | | |
94 | smi_phy_addr(phy) | smi_reg_addr(reg)); | |
d7699f87 GFT |
95 | |
96 | wmb(); | |
cdcdc9eb GFT |
97 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
98 | udelay(20); | |
8d27293f | 99 | if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0) |
3bf61c55 GFT |
100 | break; |
101 | } | |
d7699f87 | 102 | |
3bf61c55 | 103 | if (i == 0) |
cd0ff491 | 104 | jeprintk(jme->pdev, "phy(%d) write timeout : %d\n", phy, reg); |
d7699f87 | 105 | |
3bf61c55 | 106 | return; |
d7699f87 GFT |
107 | } |
108 | ||
cd0ff491 | 109 | static inline void |
3bf61c55 | 110 | jme_reset_phy_processor(struct jme_adapter *jme) |
d7699f87 | 111 | { |
cd0ff491 | 112 | u32 val; |
3bf61c55 GFT |
113 | |
114 | jme_mdio_write(jme->dev, | |
115 | jme->mii_if.phy_id, | |
8c198884 GFT |
116 | MII_ADVERTISE, ADVERTISE_ALL | |
117 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
3bf61c55 | 118 | |
cd0ff491 | 119 | if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
120 | jme_mdio_write(jme->dev, |
121 | jme->mii_if.phy_id, | |
122 | MII_CTRL1000, | |
123 | ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
3bf61c55 | 124 | |
fcf45b4c GFT |
125 | val = jme_mdio_read(jme->dev, |
126 | jme->mii_if.phy_id, | |
127 | MII_BMCR); | |
128 | ||
129 | jme_mdio_write(jme->dev, | |
130 | jme->mii_if.phy_id, | |
131 | MII_BMCR, val | BMCR_RESET); | |
132 | ||
3bf61c55 GFT |
133 | return; |
134 | } | |
135 | ||
b3821cc5 GFT |
136 | static void |
137 | jme_setup_wakeup_frame(struct jme_adapter *jme, | |
cd0ff491 | 138 | u32 *mask, u32 crc, int fnr) |
b3821cc5 GFT |
139 | { |
140 | int i; | |
141 | ||
142 | /* | |
143 | * Setup CRC pattern | |
144 | */ | |
145 | jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL)); | |
146 | wmb(); | |
147 | jwrite32(jme, JME_WFODP, crc); | |
148 | wmb(); | |
149 | ||
150 | /* | |
151 | * Setup Mask | |
152 | */ | |
cd0ff491 | 153 | for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { |
b3821cc5 GFT |
154 | jwrite32(jme, JME_WFOI, |
155 | ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) | | |
156 | (fnr & WFOI_FRAME_SEL)); | |
157 | wmb(); | |
158 | jwrite32(jme, JME_WFODP, mask[i]); | |
159 | wmb(); | |
160 | } | |
161 | } | |
3bf61c55 | 162 | |
cd0ff491 | 163 | static inline void |
3bf61c55 GFT |
164 | jme_reset_mac_processor(struct jme_adapter *jme) |
165 | { | |
cd0ff491 GFT |
166 | u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; |
167 | u32 crc = 0xCDCDCDCD; | |
168 | u32 gpreg0; | |
b3821cc5 GFT |
169 | int i; |
170 | ||
3bf61c55 | 171 | jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST); |
d7699f87 | 172 | udelay(2); |
3bf61c55 | 173 | jwrite32(jme, JME_GHC, jme->reg_ghc); |
cd0ff491 GFT |
174 | |
175 | jwrite32(jme, JME_RXDBA_LO, 0x00000000); | |
176 | jwrite32(jme, JME_RXDBA_HI, 0x00000000); | |
177 | jwrite32(jme, JME_RXQDC, 0x00000000); | |
178 | jwrite32(jme, JME_RXNDA, 0x00000000); | |
179 | jwrite32(jme, JME_TXDBA_LO, 0x00000000); | |
180 | jwrite32(jme, JME_TXDBA_HI, 0x00000000); | |
181 | jwrite32(jme, JME_TXQDC, 0x00000000); | |
182 | jwrite32(jme, JME_TXNDA, 0x00000000); | |
183 | ||
4330c2f2 GFT |
184 | jwrite32(jme, JME_RXMCHT_LO, 0x00000000); |
185 | jwrite32(jme, JME_RXMCHT_HI, 0x00000000); | |
cd0ff491 | 186 | for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i) |
b3821cc5 | 187 | jme_setup_wakeup_frame(jme, mask, crc, i); |
cd0ff491 | 188 | if (jme->fpgaver) |
cdcdc9eb GFT |
189 | gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL; |
190 | else | |
191 | gpreg0 = GPREG0_DEFAULT; | |
192 | jwrite32(jme, JME_GPREG0, gpreg0); | |
4330c2f2 | 193 | jwrite32(jme, JME_GPREG1, 0); |
d7699f87 GFT |
194 | } |
195 | ||
cd0ff491 GFT |
196 | static inline void |
197 | jme_reset_ghc_speed(struct jme_adapter *jme) | |
198 | { | |
199 | jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX); | |
200 | jwrite32(jme, JME_GHC, jme->reg_ghc); | |
201 | } | |
202 | ||
203 | static inline void | |
3bf61c55 | 204 | jme_clear_pm(struct jme_adapter *jme) |
d7699f87 | 205 | { |
29bdd921 | 206 | jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs); |
4330c2f2 | 207 | pci_set_power_state(jme->pdev, PCI_D0); |
42b1055e | 208 | pci_enable_wake(jme->pdev, PCI_D0, false); |
d7699f87 GFT |
209 | } |
210 | ||
3bf61c55 GFT |
211 | static int |
212 | jme_reload_eeprom(struct jme_adapter *jme) | |
d7699f87 | 213 | { |
cd0ff491 | 214 | u32 val; |
d7699f87 GFT |
215 | int i; |
216 | ||
217 | val = jread32(jme, JME_SMBCSR); | |
218 | ||
cd0ff491 | 219 | if (val & SMBCSR_EEPROMD) { |
d7699f87 GFT |
220 | val |= SMBCSR_CNACK; |
221 | jwrite32(jme, JME_SMBCSR, val); | |
222 | val |= SMBCSR_RELOAD; | |
223 | jwrite32(jme, JME_SMBCSR, val); | |
224 | mdelay(12); | |
225 | ||
cd0ff491 | 226 | for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) { |
d7699f87 GFT |
227 | mdelay(1); |
228 | if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0) | |
229 | break; | |
230 | } | |
231 | ||
cd0ff491 GFT |
232 | if (i == 0) { |
233 | jeprintk(jme->pdev, "eeprom reload timeout\n"); | |
d7699f87 GFT |
234 | return -EIO; |
235 | } | |
236 | } | |
3bf61c55 | 237 | |
d7699f87 GFT |
238 | return 0; |
239 | } | |
240 | ||
3bf61c55 GFT |
241 | static void |
242 | jme_load_macaddr(struct net_device *netdev) | |
d7699f87 GFT |
243 | { |
244 | struct jme_adapter *jme = netdev_priv(netdev); | |
245 | unsigned char macaddr[6]; | |
cd0ff491 | 246 | u32 val; |
d7699f87 | 247 | |
cd0ff491 | 248 | spin_lock_bh(&jme->macaddr_lock); |
4330c2f2 | 249 | val = jread32(jme, JME_RXUMA_LO); |
d7699f87 GFT |
250 | macaddr[0] = (val >> 0) & 0xFF; |
251 | macaddr[1] = (val >> 8) & 0xFF; | |
252 | macaddr[2] = (val >> 16) & 0xFF; | |
253 | macaddr[3] = (val >> 24) & 0xFF; | |
4330c2f2 | 254 | val = jread32(jme, JME_RXUMA_HI); |
d7699f87 GFT |
255 | macaddr[4] = (val >> 0) & 0xFF; |
256 | macaddr[5] = (val >> 8) & 0xFF; | |
cd0ff491 GFT |
257 | memcpy(netdev->dev_addr, macaddr, 6); |
258 | spin_unlock_bh(&jme->macaddr_lock); | |
3bf61c55 GFT |
259 | } |
260 | ||
cd0ff491 | 261 | static inline void |
3bf61c55 GFT |
262 | jme_set_rx_pcc(struct jme_adapter *jme, int p) |
263 | { | |
cd0ff491 | 264 | switch (p) { |
192570e0 GFT |
265 | case PCC_OFF: |
266 | jwrite32(jme, JME_PCCRX0, | |
267 | ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
268 | ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
269 | break; | |
3bf61c55 GFT |
270 | case PCC_P1: |
271 | jwrite32(jme, JME_PCCRX0, | |
272 | ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
273 | ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
274 | break; | |
275 | case PCC_P2: | |
276 | jwrite32(jme, JME_PCCRX0, | |
277 | ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
278 | ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
279 | break; | |
280 | case PCC_P3: | |
281 | jwrite32(jme, JME_PCCRX0, | |
282 | ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
283 | ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
284 | break; | |
285 | default: | |
286 | break; | |
287 | } | |
192570e0 | 288 | wmb(); |
3bf61c55 | 289 | |
cd0ff491 GFT |
290 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
291 | msg_rx_status(jme, "Switched to PCC_P%d\n", p); | |
d7699f87 GFT |
292 | } |
293 | ||
fcf45b4c | 294 | static void |
3bf61c55 | 295 | jme_start_irq(struct jme_adapter *jme) |
d7699f87 | 296 | { |
3bf61c55 GFT |
297 | register struct dynpcc_info *dpi = &(jme->dpi); |
298 | ||
299 | jme_set_rx_pcc(jme, PCC_P1); | |
3bf61c55 GFT |
300 | dpi->cur = PCC_P1; |
301 | dpi->attempt = PCC_P1; | |
302 | dpi->cnt = 0; | |
303 | ||
304 | jwrite32(jme, JME_PCCTX, | |
8c198884 GFT |
305 | ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) | |
306 | ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) | | |
3bf61c55 GFT |
307 | PCCTXQ0_EN |
308 | ); | |
309 | ||
d7699f87 GFT |
310 | /* |
311 | * Enable Interrupts | |
312 | */ | |
313 | jwrite32(jme, JME_IENS, INTR_ENABLE); | |
314 | } | |
315 | ||
cd0ff491 | 316 | static inline void |
3bf61c55 | 317 | jme_stop_irq(struct jme_adapter *jme) |
d7699f87 GFT |
318 | { |
319 | /* | |
320 | * Disable Interrupts | |
321 | */ | |
cd0ff491 | 322 | jwrite32f(jme, JME_IENC, INTR_ENABLE); |
d7699f87 GFT |
323 | } |
324 | ||
cd0ff491 | 325 | static inline void |
3bf61c55 | 326 | jme_enable_shadow(struct jme_adapter *jme) |
4330c2f2 GFT |
327 | { |
328 | jwrite32(jme, | |
329 | JME_SHBA_LO, | |
cd0ff491 | 330 | ((u32)jme->shadow_dma & ~((u32)0x1F)) | SHBA_POSTEN); |
4330c2f2 GFT |
331 | } |
332 | ||
cd0ff491 | 333 | static inline void |
3bf61c55 | 334 | jme_disable_shadow(struct jme_adapter *jme) |
4330c2f2 GFT |
335 | { |
336 | jwrite32(jme, JME_SHBA_LO, 0x0); | |
337 | } | |
338 | ||
cd0ff491 | 339 | static u32 |
cdcdc9eb GFT |
340 | jme_linkstat_from_phy(struct jme_adapter *jme) |
341 | { | |
cd0ff491 | 342 | u32 phylink, bmsr; |
cdcdc9eb GFT |
343 | |
344 | phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17); | |
345 | bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR); | |
cd0ff491 | 346 | if (bmsr & BMSR_ANCOMP) |
cdcdc9eb GFT |
347 | phylink |= PHY_LINK_AUTONEG_COMPLETE; |
348 | ||
349 | return phylink; | |
350 | } | |
351 | ||
cd0ff491 | 352 | static inline void |
e882564f | 353 | jme_set_phyfifoa(struct jme_adapter *jme) |
cd0ff491 GFT |
354 | { |
355 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); | |
356 | } | |
357 | ||
358 | static inline void | |
e882564f | 359 | jme_set_phyfifob(struct jme_adapter *jme) |
cd0ff491 GFT |
360 | { |
361 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); | |
362 | } | |
363 | ||
fcf45b4c GFT |
364 | static int |
365 | jme_check_link(struct net_device *netdev, int testonly) | |
d7699f87 GFT |
366 | { |
367 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 368 | u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr; |
79ce639c | 369 | char linkmsg[64]; |
fcf45b4c | 370 | int rc = 0; |
d7699f87 | 371 | |
b3821cc5 | 372 | linkmsg[0] = '\0'; |
cdcdc9eb | 373 | |
cd0ff491 | 374 | if (jme->fpgaver) |
cdcdc9eb GFT |
375 | phylink = jme_linkstat_from_phy(jme); |
376 | else | |
377 | phylink = jread32(jme, JME_PHY_LINK); | |
d7699f87 | 378 | |
cd0ff491 GFT |
379 | if (phylink & PHY_LINK_UP) { |
380 | if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { | |
8c198884 GFT |
381 | /* |
382 | * If we did not enable AN | |
383 | * Speed/Duplex Info should be obtained from SMI | |
384 | */ | |
385 | phylink = PHY_LINK_UP; | |
386 | ||
387 | bmcr = jme_mdio_read(jme->dev, | |
388 | jme->mii_if.phy_id, | |
389 | MII_BMCR); | |
390 | ||
391 | phylink |= ((bmcr & BMCR_SPEED1000) && | |
392 | (bmcr & BMCR_SPEED100) == 0) ? | |
393 | PHY_LINK_SPEED_1000M : | |
394 | (bmcr & BMCR_SPEED100) ? | |
395 | PHY_LINK_SPEED_100M : | |
396 | PHY_LINK_SPEED_10M; | |
397 | ||
398 | phylink |= (bmcr & BMCR_FULLDPLX) ? | |
399 | PHY_LINK_DUPLEX : 0; | |
79ce639c | 400 | |
b3821cc5 | 401 | strcat(linkmsg, "Forced: "); |
cd0ff491 | 402 | } else { |
8c198884 GFT |
403 | /* |
404 | * Keep polling for speed/duplex resolve complete | |
405 | */ | |
cd0ff491 | 406 | while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && |
8c198884 GFT |
407 | --cnt) { |
408 | ||
409 | udelay(1); | |
8c198884 | 410 | |
cd0ff491 | 411 | if (jme->fpgaver) |
cdcdc9eb GFT |
412 | phylink = jme_linkstat_from_phy(jme); |
413 | else | |
414 | phylink = jread32(jme, JME_PHY_LINK); | |
8c198884 | 415 | } |
cd0ff491 GFT |
416 | if (!cnt) |
417 | jeprintk(jme->pdev, | |
8c198884 | 418 | "Waiting speed resolve timeout.\n"); |
79ce639c | 419 | |
b3821cc5 | 420 | strcat(linkmsg, "ANed: "); |
d7699f87 GFT |
421 | } |
422 | ||
cd0ff491 | 423 | if (jme->phylink == phylink) { |
fcf45b4c GFT |
424 | rc = 1; |
425 | goto out; | |
426 | } | |
cd0ff491 | 427 | if (testonly) |
fcf45b4c GFT |
428 | goto out; |
429 | ||
430 | jme->phylink = phylink; | |
431 | ||
cdcdc9eb GFT |
432 | ghc = jme->reg_ghc & ~(GHC_SPEED_10M | |
433 | GHC_SPEED_100M | | |
434 | GHC_SPEED_1000M | | |
435 | GHC_DPX); | |
cd0ff491 GFT |
436 | switch (phylink & PHY_LINK_SPEED_MASK) { |
437 | case PHY_LINK_SPEED_10M: | |
438 | ghc |= GHC_SPEED_10M; | |
439 | strcat(linkmsg, "10 Mbps, "); | |
e882564f GFT |
440 | if (is_buggy250(jme->pdev->device, jme->chiprev)) |
441 | jme_set_phyfifoa(jme); | |
cd0ff491 GFT |
442 | break; |
443 | case PHY_LINK_SPEED_100M: | |
444 | ghc |= GHC_SPEED_100M; | |
445 | strcat(linkmsg, "100 Mbps, "); | |
e882564f GFT |
446 | if (is_buggy250(jme->pdev->device, jme->chiprev)) |
447 | jme_set_phyfifob(jme); | |
cd0ff491 GFT |
448 | break; |
449 | case PHY_LINK_SPEED_1000M: | |
450 | ghc |= GHC_SPEED_1000M; | |
451 | strcat(linkmsg, "1000 Mbps, "); | |
e882564f GFT |
452 | if (is_buggy250(jme->pdev->device, jme->chiprev)) |
453 | jme_set_phyfifoa(jme); | |
cd0ff491 GFT |
454 | break; |
455 | default: | |
456 | break; | |
d7699f87 | 457 | } |
cd0ff491 | 458 | ghc |= (phylink & PHY_LINK_DUPLEX) ? GHC_DPX : 0; |
fcf45b4c | 459 | |
cd0ff491 | 460 | strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? |
fcf45b4c GFT |
461 | "Full-Duplex, " : |
462 | "Half-Duplex, "); | |
463 | ||
cd0ff491 | 464 | if (phylink & PHY_LINK_MDI_STAT) |
fcf45b4c | 465 | strcat(linkmsg, "MDI-X"); |
8c198884 GFT |
466 | else |
467 | strcat(linkmsg, "MDI"); | |
d7699f87 | 468 | |
cd0ff491 | 469 | if (phylink & PHY_LINK_DUPLEX) { |
d7699f87 | 470 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); |
cd0ff491 | 471 | } else { |
d7699f87 | 472 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | |
3bf61c55 GFT |
473 | TXMCS_BACKOFF | |
474 | TXMCS_CARRIERSENSE | | |
475 | TXMCS_COLLISION); | |
8c198884 GFT |
476 | jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN | |
477 | ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) | | |
478 | TXTRHD_TXREN | | |
479 | ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL)); | |
480 | } | |
d7699f87 | 481 | |
fcf45b4c GFT |
482 | jme->reg_ghc = ghc; |
483 | jwrite32(jme, JME_GHC, ghc); | |
484 | ||
cd0ff491 GFT |
485 | msg_link(jme, "Link is up at %s.\n", linkmsg); |
486 | netif_carrier_on(netdev); | |
487 | } else { | |
488 | if (testonly) | |
fcf45b4c GFT |
489 | goto out; |
490 | ||
cd0ff491 | 491 | msg_link(jme, "Link is down.\n"); |
fcf45b4c | 492 | jme->phylink = 0; |
cd0ff491 | 493 | netif_carrier_off(netdev); |
d7699f87 | 494 | } |
fcf45b4c GFT |
495 | |
496 | out: | |
497 | return rc; | |
d7699f87 GFT |
498 | } |
499 | ||
3bf61c55 GFT |
500 | static int |
501 | jme_setup_tx_resources(struct jme_adapter *jme) | |
d7699f87 | 502 | { |
d7699f87 GFT |
503 | struct jme_ring *txring = &(jme->txring[0]); |
504 | ||
505 | txring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
506 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
507 | &(txring->dmaalloc), | |
508 | GFP_ATOMIC); | |
fcf45b4c | 509 | |
cd0ff491 | 510 | if (!txring->alloc) { |
4330c2f2 GFT |
511 | txring->desc = NULL; |
512 | txring->dmaalloc = 0; | |
513 | txring->dma = 0; | |
d7699f87 | 514 | return -ENOMEM; |
4330c2f2 | 515 | } |
d7699f87 GFT |
516 | |
517 | /* | |
518 | * 16 Bytes align | |
519 | */ | |
cd0ff491 | 520 | txring->desc = (void *)ALIGN((unsigned long)(txring->alloc), |
3bf61c55 | 521 | RING_DESC_ALIGN); |
4330c2f2 | 522 | txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 523 | txring->next_to_use = 0; |
cdcdc9eb | 524 | atomic_set(&txring->next_to_clean, 0); |
b3821cc5 | 525 | atomic_set(&txring->nr_free, jme->tx_ring_size); |
d7699f87 GFT |
526 | |
527 | /* | |
b3821cc5 | 528 | * Initialize Transmit Descriptors |
d7699f87 | 529 | */ |
b3821cc5 | 530 | memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size)); |
3bf61c55 | 531 | memset(txring->bufinf, 0, |
b3821cc5 | 532 | sizeof(struct jme_buffer_info) * jme->tx_ring_size); |
d7699f87 GFT |
533 | |
534 | return 0; | |
535 | } | |
536 | ||
3bf61c55 GFT |
537 | static void |
538 | jme_free_tx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
539 | { |
540 | int i; | |
541 | struct jme_ring *txring = &(jme->txring[0]); | |
4330c2f2 | 542 | struct jme_buffer_info *txbi = txring->bufinf; |
d7699f87 | 543 | |
cd0ff491 GFT |
544 | if (txring->alloc) { |
545 | for (i = 0 ; i < jme->tx_ring_size ; ++i) { | |
4330c2f2 | 546 | txbi = txring->bufinf + i; |
cd0ff491 | 547 | if (txbi->skb) { |
4330c2f2 GFT |
548 | dev_kfree_skb(txbi->skb); |
549 | txbi->skb = NULL; | |
d7699f87 | 550 | } |
47220951 GFT |
551 | txbi->mapping = 0; |
552 | txbi->len = 0; | |
553 | txbi->nr_desc = 0; | |
554 | txbi->start_xmit = 0; | |
d7699f87 GFT |
555 | } |
556 | ||
557 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 558 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
d7699f87 GFT |
559 | txring->alloc, |
560 | txring->dmaalloc); | |
3bf61c55 GFT |
561 | |
562 | txring->alloc = NULL; | |
563 | txring->desc = NULL; | |
564 | txring->dmaalloc = 0; | |
565 | txring->dma = 0; | |
d7699f87 | 566 | } |
3bf61c55 | 567 | txring->next_to_use = 0; |
cdcdc9eb | 568 | atomic_set(&txring->next_to_clean, 0); |
79ce639c | 569 | atomic_set(&txring->nr_free, 0); |
d7699f87 GFT |
570 | |
571 | } | |
572 | ||
cd0ff491 | 573 | static inline void |
3bf61c55 | 574 | jme_enable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
575 | { |
576 | /* | |
577 | * Select Queue 0 | |
578 | */ | |
579 | jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0); | |
cd0ff491 | 580 | wmb(); |
d7699f87 GFT |
581 | |
582 | /* | |
583 | * Setup TX Queue 0 DMA Bass Address | |
584 | */ | |
fcf45b4c | 585 | jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
3bf61c55 | 586 | jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32); |
fcf45b4c | 587 | jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
d7699f87 GFT |
588 | |
589 | /* | |
590 | * Setup TX Descptor Count | |
591 | */ | |
b3821cc5 | 592 | jwrite32(jme, JME_TXQDC, jme->tx_ring_size); |
d7699f87 GFT |
593 | |
594 | /* | |
595 | * Enable TX Engine | |
596 | */ | |
597 | wmb(); | |
4330c2f2 GFT |
598 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
599 | TXCS_SELECT_QUEUE0 | | |
600 | TXCS_ENABLE); | |
d7699f87 GFT |
601 | |
602 | } | |
603 | ||
cd0ff491 | 604 | static inline void |
29bdd921 GFT |
605 | jme_restart_tx_engine(struct jme_adapter *jme) |
606 | { | |
607 | /* | |
608 | * Restart TX Engine | |
609 | */ | |
610 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | |
611 | TXCS_SELECT_QUEUE0 | | |
612 | TXCS_ENABLE); | |
613 | } | |
614 | ||
cd0ff491 | 615 | static inline void |
3bf61c55 | 616 | jme_disable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
617 | { |
618 | int i; | |
cd0ff491 | 619 | u32 val; |
d7699f87 GFT |
620 | |
621 | /* | |
622 | * Disable TX Engine | |
623 | */ | |
fcf45b4c | 624 | jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0); |
cd0ff491 | 625 | wmb(); |
d7699f87 GFT |
626 | |
627 | val = jread32(jme, JME_TXCS); | |
cd0ff491 | 628 | for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) { |
fcf45b4c | 629 | mdelay(1); |
d7699f87 | 630 | val = jread32(jme, JME_TXCS); |
cd0ff491 | 631 | rmb(); |
d7699f87 GFT |
632 | } |
633 | ||
cd0ff491 GFT |
634 | if (!i) |
635 | jeprintk(jme->pdev, "Disable TX engine timeout.\n"); | |
d7699f87 GFT |
636 | } |
637 | ||
3bf61c55 GFT |
638 | static void |
639 | jme_set_clean_rxdesc(struct jme_adapter *jme, int i) | |
d7699f87 GFT |
640 | { |
641 | struct jme_ring *rxring = jme->rxring; | |
cd0ff491 | 642 | register struct rxdesc *rxdesc = rxring->desc; |
4330c2f2 GFT |
643 | struct jme_buffer_info *rxbi = rxring->bufinf; |
644 | rxdesc += i; | |
645 | rxbi += i; | |
646 | ||
647 | rxdesc->dw[0] = 0; | |
648 | rxdesc->dw[1] = 0; | |
3bf61c55 | 649 | rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32); |
fcf45b4c GFT |
650 | rxdesc->desc1.bufaddrl = cpu_to_le32( |
651 | (__u64)rxbi->mapping & 0xFFFFFFFFUL); | |
3bf61c55 | 652 | rxdesc->desc1.datalen = cpu_to_le16(rxbi->len); |
cd0ff491 | 653 | if (jme->dev->features & NETIF_F_HIGHDMA) |
3bf61c55 | 654 | rxdesc->desc1.flags = RXFLAG_64BIT; |
d7699f87 | 655 | wmb(); |
3bf61c55 | 656 | rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT; |
d7699f87 GFT |
657 | } |
658 | ||
3bf61c55 GFT |
659 | static int |
660 | jme_make_new_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
661 | { |
662 | struct jme_ring *rxring = &(jme->rxring[0]); | |
b3821cc5 | 663 | struct jme_buffer_info *rxbi = rxring->bufinf + i; |
cd0ff491 | 664 | struct sk_buff *skb; |
4330c2f2 | 665 | |
79ce639c GFT |
666 | skb = netdev_alloc_skb(jme->dev, |
667 | jme->dev->mtu + RX_EXTRA_LEN); | |
cd0ff491 | 668 | if (unlikely(!skb)) |
4330c2f2 | 669 | return -ENOMEM; |
3bf61c55 | 670 | |
4330c2f2 | 671 | rxbi->skb = skb; |
3bf61c55 | 672 | rxbi->len = skb_tailroom(skb); |
b3821cc5 GFT |
673 | rxbi->mapping = pci_map_page(jme->pdev, |
674 | virt_to_page(skb->data), | |
675 | offset_in_page(skb->data), | |
676 | rxbi->len, | |
677 | PCI_DMA_FROMDEVICE); | |
4330c2f2 GFT |
678 | |
679 | return 0; | |
680 | } | |
681 | ||
3bf61c55 GFT |
682 | static void |
683 | jme_free_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
684 | { |
685 | struct jme_ring *rxring = &(jme->rxring[0]); | |
686 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
687 | rxbi += i; | |
688 | ||
cd0ff491 | 689 | if (rxbi->skb) { |
b3821cc5 | 690 | pci_unmap_page(jme->pdev, |
4330c2f2 | 691 | rxbi->mapping, |
3bf61c55 | 692 | rxbi->len, |
4330c2f2 GFT |
693 | PCI_DMA_FROMDEVICE); |
694 | dev_kfree_skb(rxbi->skb); | |
695 | rxbi->skb = NULL; | |
696 | rxbi->mapping = 0; | |
3bf61c55 | 697 | rxbi->len = 0; |
4330c2f2 GFT |
698 | } |
699 | } | |
700 | ||
3bf61c55 GFT |
701 | static void |
702 | jme_free_rx_resources(struct jme_adapter *jme) | |
703 | { | |
704 | int i; | |
705 | struct jme_ring *rxring = &(jme->rxring[0]); | |
706 | ||
cd0ff491 GFT |
707 | if (rxring->alloc) { |
708 | for (i = 0 ; i < jme->rx_ring_size ; ++i) | |
3bf61c55 GFT |
709 | jme_free_rx_buf(jme, i); |
710 | ||
711 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 712 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
3bf61c55 GFT |
713 | rxring->alloc, |
714 | rxring->dmaalloc); | |
715 | rxring->alloc = NULL; | |
716 | rxring->desc = NULL; | |
717 | rxring->dmaalloc = 0; | |
718 | rxring->dma = 0; | |
719 | } | |
720 | rxring->next_to_use = 0; | |
cdcdc9eb | 721 | atomic_set(&rxring->next_to_clean, 0); |
3bf61c55 GFT |
722 | } |
723 | ||
724 | static int | |
725 | jme_setup_rx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
726 | { |
727 | int i; | |
728 | struct jme_ring *rxring = &(jme->rxring[0]); | |
729 | ||
730 | rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
731 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
732 | &(rxring->dmaalloc), | |
733 | GFP_ATOMIC); | |
cd0ff491 | 734 | if (!rxring->alloc) { |
4330c2f2 GFT |
735 | rxring->desc = NULL; |
736 | rxring->dmaalloc = 0; | |
737 | rxring->dma = 0; | |
d7699f87 | 738 | return -ENOMEM; |
4330c2f2 | 739 | } |
d7699f87 GFT |
740 | |
741 | /* | |
742 | * 16 Bytes align | |
743 | */ | |
cd0ff491 | 744 | rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc), |
3bf61c55 | 745 | RING_DESC_ALIGN); |
4330c2f2 | 746 | rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 747 | rxring->next_to_use = 0; |
cdcdc9eb | 748 | atomic_set(&rxring->next_to_clean, 0); |
d7699f87 | 749 | |
d7699f87 GFT |
750 | /* |
751 | * Initiallize Receive Descriptors | |
752 | */ | |
cd0ff491 GFT |
753 | for (i = 0 ; i < jme->rx_ring_size ; ++i) { |
754 | if (unlikely(jme_make_new_rx_buf(jme, i))) { | |
3bf61c55 GFT |
755 | jme_free_rx_resources(jme); |
756 | return -ENOMEM; | |
757 | } | |
d7699f87 GFT |
758 | |
759 | jme_set_clean_rxdesc(jme, i); | |
760 | } | |
761 | ||
d7699f87 GFT |
762 | return 0; |
763 | } | |
764 | ||
cd0ff491 | 765 | static inline void |
3bf61c55 | 766 | jme_enable_rx_engine(struct jme_adapter *jme) |
d7699f87 | 767 | { |
cd0ff491 GFT |
768 | /* |
769 | * Select Queue 0 | |
770 | */ | |
771 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | | |
772 | RXCS_QUEUESEL_Q0); | |
773 | wmb(); | |
774 | ||
d7699f87 GFT |
775 | /* |
776 | * Setup RX DMA Bass Address | |
777 | */ | |
fcf45b4c | 778 | jwrite32(jme, JME_RXDBA_LO, (__u64)jme->rxring[0].dma & 0xFFFFFFFFUL); |
3bf61c55 | 779 | jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32); |
fcf45b4c | 780 | jwrite32(jme, JME_RXNDA, (__u64)jme->rxring[0].dma & 0xFFFFFFFFUL); |
d7699f87 GFT |
781 | |
782 | /* | |
b3821cc5 | 783 | * Setup RX Descriptor Count |
d7699f87 | 784 | */ |
b3821cc5 | 785 | jwrite32(jme, JME_RXQDC, jme->rx_ring_size); |
d7699f87 | 786 | |
3bf61c55 | 787 | /* |
d7699f87 GFT |
788 | * Setup Unicast Filter |
789 | */ | |
790 | jme_set_multi(jme->dev); | |
791 | ||
792 | /* | |
793 | * Enable RX Engine | |
794 | */ | |
795 | wmb(); | |
79ce639c | 796 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
797 | RXCS_QUEUESEL_Q0 | |
798 | RXCS_ENABLE | | |
799 | RXCS_QST); | |
d7699f87 GFT |
800 | } |
801 | ||
cd0ff491 | 802 | static inline void |
3bf61c55 | 803 | jme_restart_rx_engine(struct jme_adapter *jme) |
4330c2f2 GFT |
804 | { |
805 | /* | |
3bf61c55 | 806 | * Start RX Engine |
4330c2f2 | 807 | */ |
79ce639c | 808 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
809 | RXCS_QUEUESEL_Q0 | |
810 | RXCS_ENABLE | | |
811 | RXCS_QST); | |
812 | } | |
813 | ||
cd0ff491 | 814 | static inline void |
3bf61c55 | 815 | jme_disable_rx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
816 | { |
817 | int i; | |
cd0ff491 | 818 | u32 val; |
d7699f87 GFT |
819 | |
820 | /* | |
821 | * Disable RX Engine | |
822 | */ | |
29bdd921 | 823 | jwrite32(jme, JME_RXCS, jme->reg_rxcs); |
cd0ff491 | 824 | wmb(); |
d7699f87 GFT |
825 | |
826 | val = jread32(jme, JME_RXCS); | |
cd0ff491 | 827 | for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) { |
29bdd921 | 828 | mdelay(1); |
d7699f87 | 829 | val = jread32(jme, JME_RXCS); |
cd0ff491 | 830 | rmb(); |
d7699f87 GFT |
831 | } |
832 | ||
cd0ff491 GFT |
833 | if (!i) |
834 | jeprintk(jme->pdev, "Disable RX engine timeout.\n"); | |
d7699f87 GFT |
835 | |
836 | } | |
837 | ||
192570e0 | 838 | static int |
cd0ff491 | 839 | jme_rxsum_ok(struct jme_adapter *jme, u16 flags) |
192570e0 | 840 | { |
cd0ff491 | 841 | if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) |
192570e0 GFT |
842 | return false; |
843 | ||
cd0ff491 GFT |
844 | if (unlikely(!(flags & RXWBFLAG_MF) && |
845 | (flags & RXWBFLAG_TCPON) && !(flags & RXWBFLAG_TCPCS))) { | |
846 | msg_rx_err(jme, "TCP Checksum error.\n"); | |
cdcdc9eb | 847 | goto out_sumerr; |
192570e0 GFT |
848 | } |
849 | ||
cd0ff491 GFT |
850 | if (unlikely(!(flags & RXWBFLAG_MF) && |
851 | (flags & RXWBFLAG_UDPON) && !(flags & RXWBFLAG_UDPCS))) { | |
852 | msg_rx_err(jme, "UDP Checksum error.\n"); | |
cdcdc9eb | 853 | goto out_sumerr; |
192570e0 GFT |
854 | } |
855 | ||
cd0ff491 GFT |
856 | if (unlikely((flags & RXWBFLAG_IPV4) && !(flags & RXWBFLAG_IPCS))) { |
857 | msg_rx_err(jme, "IPv4 Checksum error.\n"); | |
cdcdc9eb | 858 | goto out_sumerr; |
192570e0 GFT |
859 | } |
860 | ||
861 | return true; | |
cdcdc9eb GFT |
862 | |
863 | out_sumerr: | |
cdcdc9eb | 864 | return false; |
192570e0 GFT |
865 | } |
866 | ||
3bf61c55 | 867 | static void |
42b1055e | 868 | jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) |
d7699f87 | 869 | { |
d7699f87 | 870 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 871 | struct rxdesc *rxdesc = rxring->desc; |
3bf61c55 | 872 | struct jme_buffer_info *rxbi = rxring->bufinf; |
d7699f87 | 873 | struct sk_buff *skb; |
3bf61c55 | 874 | int framesize; |
d7699f87 | 875 | |
3bf61c55 GFT |
876 | rxdesc += idx; |
877 | rxbi += idx; | |
d7699f87 | 878 | |
3bf61c55 GFT |
879 | skb = rxbi->skb; |
880 | pci_dma_sync_single_for_cpu(jme->pdev, | |
881 | rxbi->mapping, | |
882 | rxbi->len, | |
883 | PCI_DMA_FROMDEVICE); | |
884 | ||
cd0ff491 | 885 | if (unlikely(jme_make_new_rx_buf(jme, idx))) { |
3bf61c55 GFT |
886 | pci_dma_sync_single_for_device(jme->pdev, |
887 | rxbi->mapping, | |
888 | rxbi->len, | |
889 | PCI_DMA_FROMDEVICE); | |
890 | ||
891 | ++(NET_STAT(jme).rx_dropped); | |
cd0ff491 | 892 | } else { |
3bf61c55 GFT |
893 | framesize = le16_to_cpu(rxdesc->descwb.framesize) |
894 | - RX_PREPAD_SIZE; | |
895 | ||
896 | skb_reserve(skb, RX_PREPAD_SIZE); | |
897 | skb_put(skb, framesize); | |
898 | skb->protocol = eth_type_trans(skb, jme->dev); | |
899 | ||
cd0ff491 | 900 | if (jme_rxsum_ok(jme, rxdesc->descwb.flags)) |
8c198884 | 901 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
29bdd921 GFT |
902 | else |
903 | skb->ip_summed = CHECKSUM_NONE; | |
8c198884 | 904 | |
cd0ff491 GFT |
905 | if (rxdesc->descwb.flags & RXWBFLAG_TAGON) { |
906 | if (jme->vlgrp) { | |
cdcdc9eb | 907 | jme->jme_vlan_rx(skb, jme->vlgrp, |
42b1055e | 908 | le32_to_cpu(rxdesc->descwb.vlan)); |
b3821cc5 GFT |
909 | NET_STAT(jme).rx_bytes += 4; |
910 | } | |
cd0ff491 | 911 | } else { |
cdcdc9eb | 912 | jme->jme_rx(skb); |
b3821cc5 | 913 | } |
3bf61c55 | 914 | |
cd0ff491 | 915 | if ((le16_to_cpu(rxdesc->descwb.flags) & RXWBFLAG_DEST) == |
b3821cc5 | 916 | RXWBFLAG_DEST_MUL) |
3bf61c55 GFT |
917 | ++(NET_STAT(jme).multicast); |
918 | ||
919 | jme->dev->last_rx = jiffies; | |
920 | NET_STAT(jme).rx_bytes += framesize; | |
921 | ++(NET_STAT(jme).rx_packets); | |
922 | } | |
923 | ||
924 | jme_set_clean_rxdesc(jme, idx); | |
925 | ||
926 | } | |
927 | ||
928 | static int | |
929 | jme_process_receive(struct jme_adapter *jme, int limit) | |
930 | { | |
931 | struct jme_ring *rxring = &(jme->rxring[0]); | |
cd0ff491 | 932 | struct rxdesc *rxdesc = rxring->desc; |
b3821cc5 | 933 | int i, j, ccnt, desccnt, mask = jme->rx_ring_mask; |
3bf61c55 | 934 | |
cd0ff491 | 935 | if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) |
192570e0 GFT |
936 | goto out_inc; |
937 | ||
cd0ff491 | 938 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
192570e0 GFT |
939 | goto out_inc; |
940 | ||
cd0ff491 | 941 | if (unlikely(!netif_carrier_ok(jme->dev))) |
192570e0 GFT |
942 | goto out_inc; |
943 | ||
cdcdc9eb | 944 | i = atomic_read(&rxring->next_to_clean); |
cd0ff491 | 945 | while (limit-- > 0) { |
3bf61c55 GFT |
946 | rxdesc = rxring->desc; |
947 | rxdesc += i; | |
948 | ||
cd0ff491 | 949 | if ((rxdesc->descwb.flags & RXWBFLAG_OWN) || |
3bf61c55 GFT |
950 | !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL)) |
951 | goto out; | |
d7699f87 | 952 | |
4330c2f2 GFT |
953 | desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; |
954 | ||
cd0ff491 | 955 | if (unlikely(desccnt > 1 || |
192570e0 | 956 | rxdesc->descwb.errstat & RXWBERR_ALLERR)) { |
d7699f87 | 957 | |
cd0ff491 | 958 | if (rxdesc->descwb.errstat & RXWBERR_CRCERR) |
3bf61c55 | 959 | ++(NET_STAT(jme).rx_crc_errors); |
cd0ff491 | 960 | else if (rxdesc->descwb.errstat & RXWBERR_OVERUN) |
3bf61c55 GFT |
961 | ++(NET_STAT(jme).rx_fifo_errors); |
962 | else | |
963 | ++(NET_STAT(jme).rx_errors); | |
4330c2f2 | 964 | |
cd0ff491 | 965 | if (desccnt > 1) |
3bf61c55 | 966 | limit -= desccnt - 1; |
4330c2f2 | 967 | |
cd0ff491 | 968 | for (j = i, ccnt = desccnt ; ccnt-- ; ) { |
4330c2f2 | 969 | jme_set_clean_rxdesc(jme, j); |
b3821cc5 | 970 | j = (j + 1) & (mask); |
4330c2f2 | 971 | } |
3bf61c55 | 972 | |
cd0ff491 | 973 | } else { |
42b1055e | 974 | jme_alloc_and_feed_skb(jme, i); |
3bf61c55 | 975 | } |
4330c2f2 | 976 | |
b3821cc5 | 977 | i = (i + desccnt) & (mask); |
3bf61c55 | 978 | } |
4330c2f2 | 979 | |
3bf61c55 | 980 | out: |
cdcdc9eb | 981 | atomic_set(&rxring->next_to_clean, i); |
4330c2f2 | 982 | |
192570e0 GFT |
983 | out_inc: |
984 | atomic_inc(&jme->rx_cleaning); | |
985 | ||
3bf61c55 | 986 | return limit > 0 ? limit : 0; |
4330c2f2 | 987 | |
3bf61c55 | 988 | } |
d7699f87 | 989 | |
79ce639c GFT |
990 | static void |
991 | jme_attempt_pcc(struct dynpcc_info *dpi, int atmp) | |
992 | { | |
cd0ff491 | 993 | if (likely(atmp == dpi->cur)) { |
192570e0 | 994 | dpi->cnt = 0; |
79ce639c | 995 | return; |
192570e0 | 996 | } |
79ce639c | 997 | |
cd0ff491 | 998 | if (dpi->attempt == atmp) { |
79ce639c | 999 | ++(dpi->cnt); |
cd0ff491 | 1000 | } else { |
79ce639c GFT |
1001 | dpi->attempt = atmp; |
1002 | dpi->cnt = 0; | |
1003 | } | |
1004 | ||
1005 | } | |
1006 | ||
1007 | static void | |
1008 | jme_dynamic_pcc(struct jme_adapter *jme) | |
1009 | { | |
1010 | register struct dynpcc_info *dpi = &(jme->dpi); | |
1011 | ||
cd0ff491 | 1012 | if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) |
79ce639c | 1013 | jme_attempt_pcc(dpi, PCC_P3); |
cd0ff491 | 1014 | else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD |
79ce639c GFT |
1015 | || dpi->intr_cnt > PCC_INTR_THRESHOLD) |
1016 | jme_attempt_pcc(dpi, PCC_P2); | |
1017 | else | |
1018 | jme_attempt_pcc(dpi, PCC_P1); | |
1019 | ||
cd0ff491 GFT |
1020 | if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { |
1021 | if (dpi->attempt < dpi->cur) | |
1022 | tasklet_schedule(&jme->rxclean_task); | |
79ce639c GFT |
1023 | jme_set_rx_pcc(jme, dpi->attempt); |
1024 | dpi->cur = dpi->attempt; | |
1025 | dpi->cnt = 0; | |
1026 | } | |
1027 | } | |
1028 | ||
1029 | static void | |
1030 | jme_start_pcc_timer(struct jme_adapter *jme) | |
1031 | { | |
1032 | struct dynpcc_info *dpi = &(jme->dpi); | |
1033 | dpi->last_bytes = NET_STAT(jme).rx_bytes; | |
1034 | dpi->last_pkts = NET_STAT(jme).rx_packets; | |
1035 | dpi->intr_cnt = 0; | |
1036 | jwrite32(jme, JME_TMCSR, | |
1037 | TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT)); | |
1038 | } | |
1039 | ||
cd0ff491 | 1040 | static inline void |
29bdd921 GFT |
1041 | jme_stop_pcc_timer(struct jme_adapter *jme) |
1042 | { | |
1043 | jwrite32(jme, JME_TMCSR, 0); | |
1044 | } | |
1045 | ||
cd0ff491 GFT |
1046 | static void |
1047 | jme_shutdown_nic(struct jme_adapter *jme) | |
1048 | { | |
1049 | u32 phylink; | |
1050 | ||
1051 | phylink = jme_linkstat_from_phy(jme); | |
1052 | ||
1053 | if (!(phylink & PHY_LINK_UP)) { | |
1054 | /* | |
1055 | * Disable all interrupt before issue timer | |
1056 | */ | |
1057 | jme_stop_irq(jme); | |
1058 | jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE); | |
1059 | } | |
1060 | } | |
1061 | ||
79ce639c GFT |
1062 | static void |
1063 | jme_pcc_tasklet(unsigned long arg) | |
1064 | { | |
cd0ff491 | 1065 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c GFT |
1066 | struct net_device *netdev = jme->dev; |
1067 | ||
cd0ff491 GFT |
1068 | if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) { |
1069 | jme_shutdown_nic(jme); | |
1070 | return; | |
1071 | } | |
29bdd921 | 1072 | |
cd0ff491 | 1073 | if (unlikely(!netif_carrier_ok(netdev) || |
29bdd921 GFT |
1074 | (atomic_read(&jme->link_changing) != 1) |
1075 | )) { | |
1076 | jme_stop_pcc_timer(jme); | |
79ce639c GFT |
1077 | return; |
1078 | } | |
29bdd921 | 1079 | |
cd0ff491 | 1080 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
192570e0 GFT |
1081 | jme_dynamic_pcc(jme); |
1082 | ||
79ce639c GFT |
1083 | jme_start_pcc_timer(jme); |
1084 | } | |
1085 | ||
cd0ff491 | 1086 | static inline void |
192570e0 GFT |
1087 | jme_polling_mode(struct jme_adapter *jme) |
1088 | { | |
1089 | jme_set_rx_pcc(jme, PCC_OFF); | |
1090 | } | |
1091 | ||
cd0ff491 | 1092 | static inline void |
192570e0 GFT |
1093 | jme_interrupt_mode(struct jme_adapter *jme) |
1094 | { | |
1095 | jme_set_rx_pcc(jme, PCC_P1); | |
1096 | } | |
1097 | ||
cd0ff491 GFT |
1098 | static inline int |
1099 | jme_pseudo_hotplug_enabled(struct jme_adapter *jme) | |
1100 | { | |
1101 | u32 apmc; | |
1102 | apmc = jread32(jme, JME_APMC); | |
1103 | return apmc & JME_APMC_PSEUDO_HP_EN; | |
1104 | } | |
1105 | ||
1106 | static void | |
1107 | jme_start_shutdown_timer(struct jme_adapter *jme) | |
1108 | { | |
1109 | u32 apmc; | |
1110 | ||
1111 | apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN; | |
1112 | apmc &= ~JME_APMC_EPIEN_CTRL; | |
1113 | if (!no_extplug) { | |
1114 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN); | |
1115 | wmb(); | |
1116 | } | |
1117 | jwrite32f(jme, JME_APMC, apmc); | |
1118 | ||
1119 | jwrite32f(jme, JME_TIMER2, 0); | |
1120 | set_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1121 | jwrite32(jme, JME_TMCSR, | |
1122 | TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT)); | |
1123 | } | |
1124 | ||
1125 | static void | |
1126 | jme_stop_shutdown_timer(struct jme_adapter *jme) | |
1127 | { | |
1128 | u32 apmc; | |
1129 | ||
1130 | jwrite32f(jme, JME_TMCSR, 0); | |
1131 | jwrite32f(jme, JME_TIMER2, 0); | |
1132 | clear_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1133 | ||
1134 | apmc = jread32(jme, JME_APMC); | |
1135 | apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL); | |
1136 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS); | |
1137 | wmb(); | |
1138 | jwrite32f(jme, JME_APMC, apmc); | |
1139 | } | |
1140 | ||
3bf61c55 GFT |
1141 | static void |
1142 | jme_link_change_tasklet(unsigned long arg) | |
1143 | { | |
cd0ff491 | 1144 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1145 | struct net_device *netdev = jme->dev; |
fcf45b4c GFT |
1146 | int rc; |
1147 | ||
cd0ff491 GFT |
1148 | while (!atomic_dec_and_test(&jme->link_changing)) { |
1149 | atomic_inc(&jme->link_changing); | |
1150 | msg_intr(jme, "Get link change lock failed.\n"); | |
e882564f | 1151 | while (atomic_read(&jme->link_changing) != 1) |
cd0ff491 GFT |
1152 | msg_intr(jme, "Waiting link change lock.\n"); |
1153 | } | |
fcf45b4c | 1154 | |
cd0ff491 | 1155 | if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) |
fcf45b4c GFT |
1156 | goto out; |
1157 | ||
29bdd921 | 1158 | jme->old_mtu = netdev->mtu; |
fcf45b4c | 1159 | netif_stop_queue(netdev); |
cd0ff491 GFT |
1160 | if (jme_pseudo_hotplug_enabled(jme)) |
1161 | jme_stop_shutdown_timer(jme); | |
1162 | ||
1163 | jme_stop_pcc_timer(jme); | |
1164 | tasklet_disable(&jme->txclean_task); | |
1165 | tasklet_disable(&jme->rxclean_task); | |
1166 | tasklet_disable(&jme->rxempty_task); | |
1167 | ||
1168 | if (netif_carrier_ok(netdev)) { | |
1169 | jme_reset_ghc_speed(jme); | |
1170 | jme_disable_rx_engine(jme); | |
1171 | jme_disable_tx_engine(jme); | |
fcf45b4c GFT |
1172 | jme_reset_mac_processor(jme); |
1173 | jme_free_rx_resources(jme); | |
1174 | jme_free_tx_resources(jme); | |
192570e0 | 1175 | |
cd0ff491 | 1176 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1177 | jme_polling_mode(jme); |
cd0ff491 GFT |
1178 | |
1179 | netif_carrier_off(netdev); | |
fcf45b4c GFT |
1180 | } |
1181 | ||
1182 | jme_check_link(netdev, 0); | |
cd0ff491 | 1183 | if (netif_carrier_ok(netdev)) { |
fcf45b4c | 1184 | rc = jme_setup_rx_resources(jme); |
cd0ff491 GFT |
1185 | if (rc) { |
1186 | jeprintk(jme->pdev, "Allocating resources for RX error" | |
fcf45b4c | 1187 | ", Device STOPPED!\n"); |
cd0ff491 | 1188 | goto out_enable_tasklet; |
fcf45b4c GFT |
1189 | } |
1190 | ||
fcf45b4c | 1191 | rc = jme_setup_tx_resources(jme); |
cd0ff491 GFT |
1192 | if (rc) { |
1193 | jeprintk(jme->pdev, "Allocating resources for TX error" | |
fcf45b4c GFT |
1194 | ", Device STOPPED!\n"); |
1195 | goto err_out_free_rx_resources; | |
1196 | } | |
1197 | ||
1198 | jme_enable_rx_engine(jme); | |
1199 | jme_enable_tx_engine(jme); | |
1200 | ||
1201 | netif_start_queue(netdev); | |
192570e0 | 1202 | |
cd0ff491 | 1203 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1204 | jme_interrupt_mode(jme); |
192570e0 | 1205 | |
79ce639c | 1206 | jme_start_pcc_timer(jme); |
cd0ff491 GFT |
1207 | } else if (jme_pseudo_hotplug_enabled(jme)) { |
1208 | jme_start_shutdown_timer(jme); | |
fcf45b4c GFT |
1209 | } |
1210 | ||
cd0ff491 | 1211 | goto out_enable_tasklet; |
fcf45b4c GFT |
1212 | |
1213 | err_out_free_rx_resources: | |
1214 | jme_free_rx_resources(jme); | |
cd0ff491 GFT |
1215 | out_enable_tasklet: |
1216 | tasklet_enable(&jme->txclean_task); | |
1217 | tasklet_hi_enable(&jme->rxclean_task); | |
1218 | tasklet_hi_enable(&jme->rxempty_task); | |
fcf45b4c GFT |
1219 | out: |
1220 | atomic_inc(&jme->link_changing); | |
3bf61c55 | 1221 | } |
d7699f87 | 1222 | |
3bf61c55 GFT |
1223 | static void |
1224 | jme_rx_clean_tasklet(unsigned long arg) | |
1225 | { | |
cd0ff491 | 1226 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c | 1227 | struct dynpcc_info *dpi = &(jme->dpi); |
d7699f87 | 1228 | |
192570e0 GFT |
1229 | jme_process_receive(jme, jme->rx_ring_size); |
1230 | ++(dpi->intr_cnt); | |
42b1055e | 1231 | |
192570e0 | 1232 | } |
fcf45b4c | 1233 | |
192570e0 | 1234 | static int |
cdcdc9eb | 1235 | jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) |
192570e0 | 1236 | { |
cdcdc9eb | 1237 | struct jme_adapter *jme = jme_napi_priv(holder); |
192570e0 GFT |
1238 | struct net_device *netdev = jme->dev; |
1239 | int rest; | |
fcf45b4c | 1240 | |
cdcdc9eb | 1241 | rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget)); |
fcf45b4c | 1242 | |
cd0ff491 | 1243 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb | 1244 | atomic_dec(&jme->rx_empty); |
192570e0 GFT |
1245 | ++(NET_STAT(jme).rx_dropped); |
1246 | jme_restart_rx_engine(jme); | |
1247 | } | |
1248 | atomic_inc(&jme->rx_empty); | |
1249 | ||
cd0ff491 | 1250 | if (rest) { |
cdcdc9eb | 1251 | JME_RX_COMPLETE(netdev, holder); |
192570e0 GFT |
1252 | jme_interrupt_mode(jme); |
1253 | } | |
1254 | ||
cdcdc9eb GFT |
1255 | JME_NAPI_WEIGHT_SET(budget, rest); |
1256 | return JME_NAPI_WEIGHT_VAL(budget) - rest; | |
fcf45b4c GFT |
1257 | } |
1258 | ||
1259 | static void | |
1260 | jme_rx_empty_tasklet(unsigned long arg) | |
1261 | { | |
cd0ff491 | 1262 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1263 | |
cd0ff491 | 1264 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1265 | return; |
1266 | ||
cd0ff491 | 1267 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1268 | return; |
1269 | ||
cd0ff491 | 1270 | msg_rx_status(jme, "RX Queue Full!\n"); |
29bdd921 | 1271 | |
fcf45b4c | 1272 | jme_rx_clean_tasklet(arg); |
cdcdc9eb | 1273 | |
cd0ff491 | 1274 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb GFT |
1275 | atomic_dec(&jme->rx_empty); |
1276 | ++(NET_STAT(jme).rx_dropped); | |
1277 | jme_restart_rx_engine(jme); | |
1278 | } | |
1279 | atomic_inc(&jme->rx_empty); | |
4330c2f2 GFT |
1280 | } |
1281 | ||
b3821cc5 GFT |
1282 | static void |
1283 | jme_wake_queue_if_stopped(struct jme_adapter *jme) | |
1284 | { | |
1285 | struct jme_ring *txring = jme->txring; | |
1286 | ||
1287 | smp_wmb(); | |
cd0ff491 | 1288 | if (unlikely(netif_queue_stopped(jme->dev) && |
b3821cc5 | 1289 | atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) { |
cd0ff491 | 1290 | msg_tx_done(jme, "TX Queue Waked.\n"); |
b3821cc5 | 1291 | netif_wake_queue(jme->dev); |
b3821cc5 GFT |
1292 | } |
1293 | ||
1294 | } | |
1295 | ||
3bf61c55 GFT |
1296 | static void |
1297 | jme_tx_clean_tasklet(unsigned long arg) | |
4330c2f2 | 1298 | { |
cd0ff491 | 1299 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
3bf61c55 | 1300 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1301 | struct txdesc *txdesc = txring->desc; |
3bf61c55 | 1302 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi; |
b3821cc5 | 1303 | int i, j, cnt = 0, max, err, mask; |
3bf61c55 | 1304 | |
cd0ff491 GFT |
1305 | tx_dbg(jme, "Into txclean.\n"); |
1306 | ||
1307 | if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) | |
fcf45b4c GFT |
1308 | goto out; |
1309 | ||
cd0ff491 | 1310 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1311 | goto out; |
1312 | ||
cd0ff491 | 1313 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1314 | goto out; |
1315 | ||
b3821cc5 GFT |
1316 | max = jme->tx_ring_size - atomic_read(&txring->nr_free); |
1317 | mask = jme->tx_ring_mask; | |
3bf61c55 | 1318 | |
cd0ff491 | 1319 | for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { |
3bf61c55 GFT |
1320 | |
1321 | ctxbi = txbi + i; | |
1322 | ||
cd0ff491 | 1323 | if (likely(ctxbi->skb && |
b3821cc5 | 1324 | !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) { |
8c198884 | 1325 | |
cd0ff491 GFT |
1326 | tx_dbg(jme, "txclean: %d+%d@%lu\n", |
1327 | i, ctxbi->nr_desc, jiffies); | |
3bf61c55 | 1328 | |
cd0ff491 | 1329 | err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; |
3bf61c55 | 1330 | |
cd0ff491 | 1331 | for (j = 1 ; j < ctxbi->nr_desc ; ++j) { |
b3821cc5 GFT |
1332 | ttxbi = txbi + ((i + j) & (mask)); |
1333 | txdesc[(i + j) & (mask)].dw[0] = 0; | |
3bf61c55 | 1334 | |
b3821cc5 | 1335 | pci_unmap_page(jme->pdev, |
3bf61c55 GFT |
1336 | ttxbi->mapping, |
1337 | ttxbi->len, | |
1338 | PCI_DMA_TODEVICE); | |
1339 | ||
3bf61c55 GFT |
1340 | ttxbi->mapping = 0; |
1341 | ttxbi->len = 0; | |
1342 | } | |
1343 | ||
1344 | dev_kfree_skb(ctxbi->skb); | |
3bf61c55 GFT |
1345 | |
1346 | cnt += ctxbi->nr_desc; | |
1347 | ||
cd0ff491 | 1348 | if (unlikely(err)) { |
8c198884 | 1349 | ++(NET_STAT(jme).tx_carrier_errors); |
cd0ff491 | 1350 | } else { |
8c198884 | 1351 | ++(NET_STAT(jme).tx_packets); |
b3821cc5 GFT |
1352 | NET_STAT(jme).tx_bytes += ctxbi->len; |
1353 | } | |
1354 | ||
1355 | ctxbi->skb = NULL; | |
1356 | ctxbi->len = 0; | |
cdcdc9eb | 1357 | ctxbi->start_xmit = 0; |
cd0ff491 GFT |
1358 | |
1359 | } else { | |
3bf61c55 GFT |
1360 | break; |
1361 | } | |
1362 | ||
b3821cc5 | 1363 | i = (i + ctxbi->nr_desc) & mask; |
3bf61c55 GFT |
1364 | |
1365 | ctxbi->nr_desc = 0; | |
d7699f87 GFT |
1366 | } |
1367 | ||
cd0ff491 | 1368 | tx_dbg(jme, "txclean: done %d@%lu.\n", i, jiffies); |
cdcdc9eb | 1369 | atomic_set(&txring->next_to_clean, i); |
79ce639c | 1370 | atomic_add(cnt, &txring->nr_free); |
3bf61c55 | 1371 | |
b3821cc5 GFT |
1372 | jme_wake_queue_if_stopped(jme); |
1373 | ||
fcf45b4c GFT |
1374 | out: |
1375 | atomic_inc(&jme->tx_cleaning); | |
d7699f87 GFT |
1376 | } |
1377 | ||
79ce639c | 1378 | static void |
cd0ff491 | 1379 | jme_intr_msi(struct jme_adapter *jme, u32 intrstat) |
d7699f87 | 1380 | { |
3bf61c55 GFT |
1381 | /* |
1382 | * Disable interrupt | |
1383 | */ | |
1384 | jwrite32f(jme, JME_IENC, INTR_ENABLE); | |
d7699f87 | 1385 | |
cd0ff491 | 1386 | if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { |
47220951 GFT |
1387 | /* |
1388 | * Link change event is critical | |
1389 | * all other events are ignored | |
1390 | */ | |
1391 | jwrite32(jme, JME_IEVE, intrstat); | |
3bf61c55 | 1392 | tasklet_schedule(&jme->linkch_task); |
29bdd921 | 1393 | goto out_reenable; |
fcf45b4c | 1394 | } |
d7699f87 | 1395 | |
cd0ff491 | 1396 | if (intrstat & INTR_TMINTR) { |
47220951 | 1397 | jwrite32(jme, JME_IEVE, INTR_TMINTR); |
79ce639c | 1398 | tasklet_schedule(&jme->pcc_task); |
47220951 | 1399 | } |
79ce639c | 1400 | |
cd0ff491 | 1401 | if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { |
47220951 | 1402 | jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0); |
4330c2f2 | 1403 | tasklet_schedule(&jme->txclean_task); |
47220951 GFT |
1404 | } |
1405 | ||
cd0ff491 | 1406 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
47220951 GFT |
1407 | jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO | |
1408 | INTR_PCCRX0 | | |
1409 | INTR_RX0EMP)) | | |
1410 | INTR_RX0); | |
1411 | } | |
d7699f87 | 1412 | |
cd0ff491 GFT |
1413 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
1414 | if (intrstat & INTR_RX0EMP) | |
192570e0 GFT |
1415 | atomic_inc(&jme->rx_empty); |
1416 | ||
cd0ff491 GFT |
1417 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
1418 | if (likely(JME_RX_SCHEDULE_PREP(jme))) { | |
192570e0 | 1419 | jme_polling_mode(jme); |
cdcdc9eb | 1420 | JME_RX_SCHEDULE(jme); |
192570e0 GFT |
1421 | } |
1422 | } | |
cd0ff491 GFT |
1423 | } else { |
1424 | if (intrstat & INTR_RX0EMP) { | |
cdcdc9eb | 1425 | atomic_inc(&jme->rx_empty); |
cd0ff491 GFT |
1426 | tasklet_hi_schedule(&jme->rxempty_task); |
1427 | } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) { | |
1428 | tasklet_hi_schedule(&jme->rxclean_task); | |
cdcdc9eb | 1429 | } |
4330c2f2 | 1430 | } |
d7699f87 | 1431 | |
29bdd921 | 1432 | out_reenable: |
3bf61c55 | 1433 | /* |
fcf45b4c | 1434 | * Re-enable interrupt |
3bf61c55 | 1435 | */ |
fcf45b4c | 1436 | jwrite32f(jme, JME_IENS, INTR_ENABLE); |
79ce639c GFT |
1437 | } |
1438 | ||
1439 | static irqreturn_t | |
1440 | jme_intr(int irq, void *dev_id) | |
1441 | { | |
cd0ff491 GFT |
1442 | struct net_device *netdev = dev_id; |
1443 | struct jme_adapter *jme = netdev_priv(netdev); | |
1444 | u32 intrstat; | |
79ce639c GFT |
1445 | |
1446 | intrstat = jread32(jme, JME_IEVE); | |
1447 | ||
1448 | /* | |
1449 | * Check if it's really an interrupt for us | |
1450 | */ | |
cd0ff491 | 1451 | if (unlikely(intrstat == 0)) |
29bdd921 | 1452 | return IRQ_NONE; |
79ce639c GFT |
1453 | |
1454 | /* | |
1455 | * Check if the device still exist | |
1456 | */ | |
cd0ff491 GFT |
1457 | if (unlikely(intrstat == ~((typeof(intrstat))0))) |
1458 | return IRQ_NONE; | |
79ce639c GFT |
1459 | |
1460 | jme_intr_msi(jme, intrstat); | |
1461 | ||
cd0ff491 | 1462 | return IRQ_HANDLED; |
d7699f87 GFT |
1463 | } |
1464 | ||
79ce639c GFT |
1465 | static irqreturn_t |
1466 | jme_msi(int irq, void *dev_id) | |
1467 | { | |
cd0ff491 GFT |
1468 | struct net_device *netdev = dev_id; |
1469 | struct jme_adapter *jme = netdev_priv(netdev); | |
1470 | u32 intrstat; | |
79ce639c GFT |
1471 | |
1472 | pci_dma_sync_single_for_cpu(jme->pdev, | |
1473 | jme->shadow_dma, | |
cd0ff491 | 1474 | sizeof(u32) * SHADOW_REG_NR, |
79ce639c GFT |
1475 | PCI_DMA_FROMDEVICE); |
1476 | intrstat = jme->shadow_regs[SHADOW_IEVE]; | |
1477 | jme->shadow_regs[SHADOW_IEVE] = 0; | |
1478 | ||
1479 | jme_intr_msi(jme, intrstat); | |
1480 | ||
cd0ff491 | 1481 | return IRQ_HANDLED; |
79ce639c GFT |
1482 | } |
1483 | ||
79ce639c GFT |
1484 | static void |
1485 | jme_reset_link(struct jme_adapter *jme) | |
1486 | { | |
1487 | jwrite32(jme, JME_TMCSR, TMCSR_SWIT); | |
1488 | } | |
1489 | ||
fcf45b4c GFT |
1490 | static void |
1491 | jme_restart_an(struct jme_adapter *jme) | |
1492 | { | |
cd0ff491 | 1493 | u32 bmcr; |
fcf45b4c | 1494 | |
cd0ff491 | 1495 | spin_lock_bh(&jme->phy_lock); |
fcf45b4c GFT |
1496 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1497 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
1498 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
cd0ff491 | 1499 | spin_unlock_bh(&jme->phy_lock); |
79ce639c GFT |
1500 | } |
1501 | ||
1502 | static int | |
1503 | jme_request_irq(struct jme_adapter *jme) | |
1504 | { | |
1505 | int rc; | |
cd0ff491 GFT |
1506 | struct net_device *netdev = jme->dev; |
1507 | irq_handler_t handler = jme_intr; | |
1508 | int irq_flags = IRQF_SHARED; | |
1509 | ||
1510 | if (!pci_enable_msi(jme->pdev)) { | |
1511 | set_bit(JME_FLAG_MSI, &jme->flags); | |
1512 | handler = jme_msi; | |
1513 | irq_flags = 0; | |
1514 | } | |
1515 | ||
1516 | rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, | |
1517 | netdev); | |
1518 | if (rc) { | |
1519 | jeprintk(jme->pdev, | |
b3821cc5 | 1520 | "Unable to request %s interrupt (return: %d)\n", |
cd0ff491 GFT |
1521 | test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx", |
1522 | rc); | |
79ce639c | 1523 | |
cd0ff491 GFT |
1524 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { |
1525 | pci_disable_msi(jme->pdev); | |
1526 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1527 | } |
cd0ff491 | 1528 | } else { |
79ce639c GFT |
1529 | netdev->irq = jme->pdev->irq; |
1530 | } | |
1531 | ||
cd0ff491 | 1532 | return rc; |
79ce639c GFT |
1533 | } |
1534 | ||
1535 | static void | |
1536 | jme_free_irq(struct jme_adapter *jme) | |
1537 | { | |
cd0ff491 GFT |
1538 | free_irq(jme->pdev->irq, jme->dev); |
1539 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { | |
1540 | pci_disable_msi(jme->pdev); | |
1541 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1542 | jme->dev->irq = jme->pdev->irq; |
cd0ff491 | 1543 | } |
fcf45b4c GFT |
1544 | } |
1545 | ||
3bf61c55 GFT |
1546 | static int |
1547 | jme_open(struct net_device *netdev) | |
d7699f87 GFT |
1548 | { |
1549 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 1550 | int rc; |
79ce639c | 1551 | |
42b1055e | 1552 | jme_clear_pm(jme); |
cdcdc9eb | 1553 | JME_NAPI_ENABLE(jme); |
d7699f87 | 1554 | |
cd0ff491 GFT |
1555 | tasklet_enable(&jme->txclean_task); |
1556 | tasklet_hi_enable(&jme->rxclean_task); | |
1557 | tasklet_hi_enable(&jme->rxempty_task); | |
1558 | ||
79ce639c | 1559 | rc = jme_request_irq(jme); |
cd0ff491 | 1560 | if (rc) |
4330c2f2 | 1561 | goto err_out; |
79ce639c | 1562 | |
4330c2f2 | 1563 | jme_enable_shadow(jme); |
d7699f87 | 1564 | jme_start_irq(jme); |
42b1055e | 1565 | |
cd0ff491 | 1566 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
42b1055e GFT |
1567 | jme_set_settings(netdev, &jme->old_ecmd); |
1568 | else | |
1569 | jme_reset_phy_processor(jme); | |
1570 | ||
29bdd921 | 1571 | jme_reset_link(jme); |
d7699f87 GFT |
1572 | |
1573 | return 0; | |
1574 | ||
d7699f87 GFT |
1575 | err_out: |
1576 | netif_stop_queue(netdev); | |
1577 | netif_carrier_off(netdev); | |
4330c2f2 | 1578 | return rc; |
d7699f87 GFT |
1579 | } |
1580 | ||
42b1055e GFT |
1581 | static void |
1582 | jme_set_100m_half(struct jme_adapter *jme) | |
1583 | { | |
cd0ff491 | 1584 | u32 bmcr, tmp; |
42b1055e GFT |
1585 | |
1586 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1587 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | | |
1588 | BMCR_SPEED1000 | BMCR_FULLDPLX); | |
1589 | tmp |= BMCR_SPEED100; | |
1590 | ||
1591 | if (bmcr != tmp) | |
1592 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp); | |
1593 | ||
cd0ff491 | 1594 | if (jme->fpgaver) |
cdcdc9eb GFT |
1595 | jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL); |
1596 | else | |
1597 | jwrite32(jme, JME_GHC, GHC_SPEED_100M); | |
42b1055e GFT |
1598 | } |
1599 | ||
47220951 GFT |
1600 | #define JME_WAIT_LINK_TIME 2000 /* 2000ms */ |
1601 | static void | |
1602 | jme_wait_link(struct jme_adapter *jme) | |
1603 | { | |
cd0ff491 | 1604 | u32 phylink, to = JME_WAIT_LINK_TIME; |
47220951 GFT |
1605 | |
1606 | mdelay(1000); | |
1607 | phylink = jme_linkstat_from_phy(jme); | |
cd0ff491 | 1608 | while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { |
47220951 GFT |
1609 | mdelay(10); |
1610 | phylink = jme_linkstat_from_phy(jme); | |
1611 | } | |
1612 | } | |
1613 | ||
cd0ff491 | 1614 | static inline void |
42b1055e GFT |
1615 | jme_phy_off(struct jme_adapter *jme) |
1616 | { | |
1617 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN); | |
1618 | } | |
1619 | ||
3bf61c55 GFT |
1620 | static int |
1621 | jme_close(struct net_device *netdev) | |
d7699f87 GFT |
1622 | { |
1623 | struct jme_adapter *jme = netdev_priv(netdev); | |
1624 | ||
1625 | netif_stop_queue(netdev); | |
1626 | netif_carrier_off(netdev); | |
1627 | ||
1628 | jme_stop_irq(jme); | |
4330c2f2 | 1629 | jme_disable_shadow(jme); |
79ce639c | 1630 | jme_free_irq(jme); |
d7699f87 | 1631 | |
cdcdc9eb | 1632 | JME_NAPI_DISABLE(jme); |
192570e0 | 1633 | |
4330c2f2 GFT |
1634 | tasklet_kill(&jme->linkch_task); |
1635 | tasklet_kill(&jme->txclean_task); | |
1636 | tasklet_kill(&jme->rxclean_task); | |
fcf45b4c | 1637 | tasklet_kill(&jme->rxempty_task); |
8c198884 | 1638 | |
cd0ff491 GFT |
1639 | jme_reset_ghc_speed(jme); |
1640 | jme_disable_rx_engine(jme); | |
1641 | jme_disable_tx_engine(jme); | |
8c198884 | 1642 | jme_reset_mac_processor(jme); |
d7699f87 GFT |
1643 | jme_free_rx_resources(jme); |
1644 | jme_free_tx_resources(jme); | |
42b1055e | 1645 | jme->phylink = 0; |
b3821cc5 GFT |
1646 | jme_phy_off(jme); |
1647 | ||
1648 | return 0; | |
1649 | } | |
1650 | ||
1651 | static int | |
1652 | jme_alloc_txdesc(struct jme_adapter *jme, | |
1653 | struct sk_buff *skb) | |
1654 | { | |
1655 | struct jme_ring *txring = jme->txring; | |
1656 | int idx, nr_alloc, mask = jme->tx_ring_mask; | |
1657 | ||
1658 | idx = txring->next_to_use; | |
1659 | nr_alloc = skb_shinfo(skb)->nr_frags + 2; | |
1660 | ||
cd0ff491 | 1661 | if (unlikely(atomic_read(&txring->nr_free) < nr_alloc)) |
b3821cc5 GFT |
1662 | return -1; |
1663 | ||
1664 | atomic_sub(nr_alloc, &txring->nr_free); | |
42b1055e | 1665 | |
b3821cc5 GFT |
1666 | txring->next_to_use = (txring->next_to_use + nr_alloc) & mask; |
1667 | ||
1668 | return idx; | |
1669 | } | |
1670 | ||
1671 | static void | |
1672 | jme_fill_tx_map(struct pci_dev *pdev, | |
cd0ff491 | 1673 | struct txdesc *txdesc, |
b3821cc5 GFT |
1674 | struct jme_buffer_info *txbi, |
1675 | struct page *page, | |
cd0ff491 GFT |
1676 | u32 page_offset, |
1677 | u32 len, | |
1678 | u8 hidma) | |
b3821cc5 GFT |
1679 | { |
1680 | dma_addr_t dmaaddr; | |
1681 | ||
1682 | dmaaddr = pci_map_page(pdev, | |
1683 | page, | |
1684 | page_offset, | |
1685 | len, | |
1686 | PCI_DMA_TODEVICE); | |
1687 | ||
1688 | pci_dma_sync_single_for_device(pdev, | |
1689 | dmaaddr, | |
1690 | len, | |
1691 | PCI_DMA_TODEVICE); | |
1692 | ||
1693 | txdesc->dw[0] = 0; | |
1694 | txdesc->dw[1] = 0; | |
1695 | txdesc->desc2.flags = TXFLAG_OWN; | |
cd0ff491 | 1696 | txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0; |
b3821cc5 GFT |
1697 | txdesc->desc2.datalen = cpu_to_le16(len); |
1698 | txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32); | |
1699 | txdesc->desc2.bufaddrl = cpu_to_le32( | |
1700 | (__u64)dmaaddr & 0xFFFFFFFFUL); | |
1701 | ||
1702 | txbi->mapping = dmaaddr; | |
1703 | txbi->len = len; | |
1704 | } | |
1705 | ||
1706 | static void | |
1707 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
1708 | { | |
1709 | struct jme_ring *txring = jme->txring; | |
cd0ff491 | 1710 | struct txdesc *txdesc = txring->desc, *ctxdesc; |
b3821cc5 | 1711 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; |
cd0ff491 | 1712 | u8 hidma = jme->dev->features & NETIF_F_HIGHDMA; |
b3821cc5 GFT |
1713 | int i, nr_frags = skb_shinfo(skb)->nr_frags; |
1714 | int mask = jme->tx_ring_mask; | |
1715 | struct skb_frag_struct *frag; | |
cd0ff491 | 1716 | u32 len; |
b3821cc5 | 1717 | |
cd0ff491 GFT |
1718 | for (i = 0 ; i < nr_frags ; ++i) { |
1719 | frag = &skb_shinfo(skb)->frags[i]; | |
b3821cc5 GFT |
1720 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); |
1721 | ctxbi = txbi + ((idx + i + 2) & (mask)); | |
1722 | ||
1723 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page, | |
1724 | frag->page_offset, frag->size, hidma); | |
42b1055e | 1725 | } |
b3821cc5 | 1726 | |
cd0ff491 | 1727 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
b3821cc5 GFT |
1728 | ctxdesc = txdesc + ((idx + 1) & (mask)); |
1729 | ctxbi = txbi + ((idx + 1) & (mask)); | |
1730 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
1731 | offset_in_page(skb->data), len, hidma); | |
1732 | ||
1733 | } | |
1734 | ||
1735 | static int | |
1736 | jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) | |
1737 | { | |
cd0ff491 | 1738 | if (unlikely(skb_shinfo(skb)->gso_size && |
b3821cc5 GFT |
1739 | skb_header_cloned(skb) && |
1740 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) { | |
1741 | dev_kfree_skb(skb); | |
1742 | return -1; | |
1743 | } | |
1744 | ||
1745 | return 0; | |
1746 | } | |
1747 | ||
1748 | static int | |
1749 | jme_tx_tso(struct sk_buff *skb, | |
cd0ff491 | 1750 | u16 *mss, u8 *flags) |
b3821cc5 | 1751 | { |
cd0ff491 GFT |
1752 | *mss = skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT; |
1753 | if (*mss) { | |
b3821cc5 GFT |
1754 | *flags |= TXFLAG_LSEN; |
1755 | ||
cd0ff491 | 1756 | if (skb->protocol == htons(ETH_P_IP)) { |
b3821cc5 GFT |
1757 | struct iphdr *iph = ip_hdr(skb); |
1758 | ||
1759 | iph->check = 0; | |
cd0ff491 | 1760 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
b3821cc5 GFT |
1761 | iph->daddr, 0, |
1762 | IPPROTO_TCP, | |
1763 | 0); | |
cd0ff491 | 1764 | } else { |
b3821cc5 GFT |
1765 | struct ipv6hdr *ip6h = ipv6_hdr(skb); |
1766 | ||
cd0ff491 | 1767 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, |
b3821cc5 GFT |
1768 | &ip6h->daddr, 0, |
1769 | IPPROTO_TCP, | |
1770 | 0); | |
1771 | } | |
1772 | ||
1773 | return 0; | |
1774 | } | |
1775 | ||
1776 | return 1; | |
1777 | } | |
1778 | ||
1779 | static void | |
cd0ff491 | 1780 | jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags) |
b3821cc5 | 1781 | { |
cd0ff491 GFT |
1782 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
1783 | u8 ip_proto; | |
b3821cc5 GFT |
1784 | |
1785 | switch (skb->protocol) { | |
cd0ff491 | 1786 | case htons(ETH_P_IP): |
b3821cc5 GFT |
1787 | ip_proto = ip_hdr(skb)->protocol; |
1788 | break; | |
cd0ff491 | 1789 | case htons(ETH_P_IPV6): |
b3821cc5 GFT |
1790 | ip_proto = ipv6_hdr(skb)->nexthdr; |
1791 | break; | |
1792 | default: | |
1793 | ip_proto = 0; | |
1794 | break; | |
1795 | } | |
1796 | ||
cd0ff491 | 1797 | switch (ip_proto) { |
b3821cc5 GFT |
1798 | case IPPROTO_TCP: |
1799 | *flags |= TXFLAG_TCPCS; | |
1800 | break; | |
1801 | case IPPROTO_UDP: | |
1802 | *flags |= TXFLAG_UDPCS; | |
1803 | break; | |
1804 | default: | |
cd0ff491 | 1805 | msg_tx_err(jme, "Error upper layer protocol.\n"); |
b3821cc5 GFT |
1806 | break; |
1807 | } | |
1808 | } | |
1809 | } | |
1810 | ||
cd0ff491 GFT |
1811 | static inline void |
1812 | jme_tx_vlan(struct sk_buff *skb, u16 *vlan, u8 *flags) | |
b3821cc5 | 1813 | { |
cd0ff491 | 1814 | if (vlan_tx_tag_present(skb)) { |
b3821cc5 GFT |
1815 | *flags |= TXFLAG_TAGON; |
1816 | *vlan = vlan_tx_tag_get(skb); | |
42b1055e | 1817 | } |
b3821cc5 GFT |
1818 | } |
1819 | ||
1820 | static int | |
1821 | jme_fill_first_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
1822 | { | |
1823 | struct jme_ring *txring = jme->txring; | |
cd0ff491 | 1824 | struct txdesc *txdesc; |
b3821cc5 | 1825 | struct jme_buffer_info *txbi; |
cd0ff491 | 1826 | u8 flags; |
b3821cc5 | 1827 | |
cd0ff491 | 1828 | txdesc = (struct txdesc *)txring->desc + idx; |
b3821cc5 GFT |
1829 | txbi = txring->bufinf + idx; |
1830 | ||
1831 | txdesc->dw[0] = 0; | |
1832 | txdesc->dw[1] = 0; | |
1833 | txdesc->dw[2] = 0; | |
1834 | txdesc->dw[3] = 0; | |
1835 | txdesc->desc1.pktsize = cpu_to_le16(skb->len); | |
1836 | /* | |
1837 | * Set OWN bit at final. | |
1838 | * When kernel transmit faster than NIC. | |
1839 | * And NIC trying to send this descriptor before we tell | |
1840 | * it to start sending this TX queue. | |
1841 | * Other fields are already filled correctly. | |
1842 | */ | |
1843 | wmb(); | |
1844 | flags = TXFLAG_OWN | TXFLAG_INT; | |
cd0ff491 GFT |
1845 | /* |
1846 | * Set checksum flags while not tso | |
1847 | */ | |
1848 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) | |
1849 | jme_tx_csum(jme, skb, &flags); | |
b3821cc5 GFT |
1850 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); |
1851 | txdesc->desc1.flags = flags; | |
1852 | /* | |
1853 | * Set tx buffer info after telling NIC to send | |
1854 | * For better tx_clean timing | |
1855 | */ | |
1856 | wmb(); | |
1857 | txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2; | |
1858 | txbi->skb = skb; | |
1859 | txbi->len = skb->len; | |
cd0ff491 GFT |
1860 | txbi->start_xmit = jiffies; |
1861 | if (!txbi->start_xmit) | |
8d27293f | 1862 | txbi->start_xmit = (0UL-1); |
d7699f87 GFT |
1863 | |
1864 | return 0; | |
1865 | } | |
1866 | ||
b3821cc5 GFT |
1867 | static void |
1868 | jme_stop_queue_if_full(struct jme_adapter *jme) | |
1869 | { | |
1870 | struct jme_ring *txring = jme->txring; | |
cd0ff491 GFT |
1871 | struct jme_buffer_info *txbi = txring->bufinf; |
1872 | int idx = atomic_read(&txring->next_to_clean); | |
cdcdc9eb | 1873 | |
cd0ff491 | 1874 | txbi += idx; |
b3821cc5 GFT |
1875 | |
1876 | smp_wmb(); | |
cd0ff491 | 1877 | if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { |
b3821cc5 | 1878 | netif_stop_queue(jme->dev); |
cd0ff491 | 1879 | msg_tx_queued(jme, "TX Queue Paused.\n"); |
b3821cc5 | 1880 | smp_wmb(); |
cd0ff491 GFT |
1881 | if (atomic_read(&txring->nr_free) |
1882 | >= (jme->tx_wake_threshold)) { | |
b3821cc5 | 1883 | netif_wake_queue(jme->dev); |
cd0ff491 | 1884 | msg_tx_queued(jme, "TX Queue Fast Waked.\n"); |
b3821cc5 GFT |
1885 | } |
1886 | } | |
1887 | ||
cd0ff491 | 1888 | if (unlikely(txbi->start_xmit && |
cdcdc9eb GFT |
1889 | (jiffies - txbi->start_xmit) >= TX_TIMEOUT && |
1890 | txbi->skb)) { | |
1891 | netif_stop_queue(jme->dev); | |
cd0ff491 | 1892 | msg_tx_queued(jme, "TX Queue Stopped %d@%lu.\n", idx, jiffies); |
cdcdc9eb | 1893 | } |
b3821cc5 GFT |
1894 | } |
1895 | ||
3bf61c55 GFT |
1896 | /* |
1897 | * This function is already protected by netif_tx_lock() | |
1898 | */ | |
cd0ff491 | 1899 | |
3bf61c55 GFT |
1900 | static int |
1901 | jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) | |
d7699f87 | 1902 | { |
cd0ff491 | 1903 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 1904 | int idx; |
d7699f87 | 1905 | |
cd0ff491 | 1906 | if (unlikely(jme_expand_header(jme, skb))) { |
b3821cc5 GFT |
1907 | ++(NET_STAT(jme).tx_dropped); |
1908 | return NETDEV_TX_OK; | |
1909 | } | |
1910 | ||
1911 | idx = jme_alloc_txdesc(jme, skb); | |
79ce639c | 1912 | |
cd0ff491 | 1913 | if (unlikely(idx < 0)) { |
b3821cc5 | 1914 | netif_stop_queue(netdev); |
cd0ff491 | 1915 | msg_tx_err(jme, "BUG! Tx ring full when queue awake!\n"); |
d7699f87 | 1916 | |
cd0ff491 | 1917 | return NETDEV_TX_BUSY; |
b3821cc5 GFT |
1918 | } |
1919 | ||
1920 | jme_map_tx_skb(jme, skb, idx); | |
1921 | jme_fill_first_tx_desc(jme, skb, idx); | |
1922 | ||
4330c2f2 GFT |
1923 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
1924 | TXCS_SELECT_QUEUE0 | | |
1925 | TXCS_QUEUE0S | | |
1926 | TXCS_ENABLE); | |
d7699f87 GFT |
1927 | netdev->trans_start = jiffies; |
1928 | ||
cd0ff491 GFT |
1929 | tx_dbg(jme, "xmit: %d+%d@%lu\n", idx, |
1930 | skb_shinfo(skb)->nr_frags + 2, | |
1931 | jiffies); | |
b3821cc5 GFT |
1932 | jme_stop_queue_if_full(jme); |
1933 | ||
cd0ff491 | 1934 | return NETDEV_TX_OK; |
d7699f87 GFT |
1935 | } |
1936 | ||
3bf61c55 GFT |
1937 | static int |
1938 | jme_set_macaddr(struct net_device *netdev, void *p) | |
d7699f87 | 1939 | { |
cd0ff491 | 1940 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 1941 | struct sockaddr *addr = p; |
cd0ff491 | 1942 | u32 val; |
d7699f87 | 1943 | |
cd0ff491 | 1944 | if (netif_running(netdev)) |
d7699f87 GFT |
1945 | return -EBUSY; |
1946 | ||
cd0ff491 | 1947 | spin_lock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
1948 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
1949 | ||
186fc259 GFT |
1950 | val = (addr->sa_data[3] & 0xff) << 24 | |
1951 | (addr->sa_data[2] & 0xff) << 16 | | |
1952 | (addr->sa_data[1] & 0xff) << 8 | | |
1953 | (addr->sa_data[0] & 0xff); | |
4330c2f2 | 1954 | jwrite32(jme, JME_RXUMA_LO, val); |
186fc259 GFT |
1955 | val = (addr->sa_data[5] & 0xff) << 8 | |
1956 | (addr->sa_data[4] & 0xff); | |
4330c2f2 | 1957 | jwrite32(jme, JME_RXUMA_HI, val); |
cd0ff491 | 1958 | spin_unlock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
1959 | |
1960 | return 0; | |
1961 | } | |
1962 | ||
3bf61c55 GFT |
1963 | static void |
1964 | jme_set_multi(struct net_device *netdev) | |
d7699f87 | 1965 | { |
3bf61c55 | 1966 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 1967 | u32 mc_hash[2] = {}; |
d7699f87 GFT |
1968 | int i; |
1969 | ||
cd0ff491 | 1970 | spin_lock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
1971 | |
1972 | jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME; | |
d7699f87 | 1973 | |
cd0ff491 | 1974 | if (netdev->flags & IFF_PROMISC) { |
8c198884 | 1975 | jme->reg_rxmcs |= RXMCS_ALLFRAME; |
cd0ff491 | 1976 | } else if (netdev->flags & IFF_ALLMULTI) { |
8c198884 | 1977 | jme->reg_rxmcs |= RXMCS_ALLMULFRAME; |
cd0ff491 | 1978 | } else if (netdev->flags & IFF_MULTICAST) { |
3bf61c55 GFT |
1979 | struct dev_mc_list *mclist; |
1980 | int bit_nr; | |
d7699f87 | 1981 | |
8c198884 | 1982 | jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED; |
3bf61c55 GFT |
1983 | for (i = 0, mclist = netdev->mc_list; |
1984 | mclist && i < netdev->mc_count; | |
1985 | ++i, mclist = mclist->next) { | |
1986 | ||
cd0ff491 GFT |
1987 | bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F; |
1988 | mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); | |
1989 | } | |
d7699f87 | 1990 | |
4330c2f2 GFT |
1991 | jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]); |
1992 | jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]); | |
d7699f87 GFT |
1993 | } |
1994 | ||
d7699f87 | 1995 | wmb(); |
8c198884 GFT |
1996 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); |
1997 | ||
cd0ff491 | 1998 | spin_unlock_bh(&jme->rxmcs_lock); |
d7699f87 GFT |
1999 | } |
2000 | ||
3bf61c55 | 2001 | static int |
8c198884 | 2002 | jme_change_mtu(struct net_device *netdev, int new_mtu) |
d7699f87 | 2003 | { |
cd0ff491 | 2004 | struct jme_adapter *jme = netdev_priv(netdev); |
79ce639c | 2005 | |
cd0ff491 | 2006 | if (new_mtu == jme->old_mtu) |
29bdd921 GFT |
2007 | return 0; |
2008 | ||
cd0ff491 GFT |
2009 | if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || |
2010 | ((new_mtu) < IPV6_MIN_MTU)) | |
2011 | return -EINVAL; | |
79ce639c | 2012 | |
cd0ff491 | 2013 | if (new_mtu > 4000) { |
79ce639c GFT |
2014 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2015 | jme->reg_rxcs |= RXCS_FIFOTHNP_64QW; | |
2016 | jme_restart_rx_engine(jme); | |
cd0ff491 | 2017 | } else { |
79ce639c GFT |
2018 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2019 | jme->reg_rxcs |= RXCS_FIFOTHNP_128QW; | |
2020 | jme_restart_rx_engine(jme); | |
2021 | } | |
2022 | ||
cd0ff491 | 2023 | if (new_mtu > 1900) { |
b3821cc5 GFT |
2024 | netdev->features &= ~(NETIF_F_HW_CSUM | |
2025 | NETIF_F_TSO | | |
2026 | NETIF_F_TSO6); | |
cd0ff491 GFT |
2027 | } else { |
2028 | if (test_bit(JME_FLAG_TXCSUM, &jme->flags)) | |
b3821cc5 | 2029 | netdev->features |= NETIF_F_HW_CSUM; |
cd0ff491 | 2030 | if (test_bit(JME_FLAG_TSO, &jme->flags)) |
b3821cc5 | 2031 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
79ce639c GFT |
2032 | } |
2033 | ||
cd0ff491 GFT |
2034 | netdev->mtu = new_mtu; |
2035 | jme_reset_link(jme); | |
79ce639c GFT |
2036 | |
2037 | return 0; | |
d7699f87 GFT |
2038 | } |
2039 | ||
8c198884 GFT |
2040 | static void |
2041 | jme_tx_timeout(struct net_device *netdev) | |
2042 | { | |
cd0ff491 | 2043 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 | 2044 | |
cdcdc9eb GFT |
2045 | jme->phylink = 0; |
2046 | jme_reset_phy_processor(jme); | |
cd0ff491 | 2047 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
cdcdc9eb GFT |
2048 | jme_set_settings(netdev, &jme->old_ecmd); |
2049 | ||
8c198884 | 2050 | /* |
cdcdc9eb | 2051 | * Force to Reset the link again |
8c198884 | 2052 | */ |
29bdd921 | 2053 | jme_reset_link(jme); |
8c198884 GFT |
2054 | } |
2055 | ||
42b1055e GFT |
2056 | static void |
2057 | jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
2058 | { | |
2059 | struct jme_adapter *jme = netdev_priv(netdev); | |
2060 | ||
2061 | jme->vlgrp = grp; | |
2062 | } | |
2063 | ||
3bf61c55 GFT |
2064 | static void |
2065 | jme_get_drvinfo(struct net_device *netdev, | |
2066 | struct ethtool_drvinfo *info) | |
d7699f87 | 2067 | { |
cd0ff491 | 2068 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2069 | |
cd0ff491 GFT |
2070 | strcpy(info->driver, DRV_NAME); |
2071 | strcpy(info->version, DRV_VERSION); | |
2072 | strcpy(info->bus_info, pci_name(jme->pdev)); | |
d7699f87 GFT |
2073 | } |
2074 | ||
8c198884 GFT |
2075 | static int |
2076 | jme_get_regs_len(struct net_device *netdev) | |
2077 | { | |
cd0ff491 | 2078 | return JME_REG_LEN; |
8c198884 GFT |
2079 | } |
2080 | ||
2081 | static void | |
cd0ff491 | 2082 | mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len) |
8c198884 GFT |
2083 | { |
2084 | int i; | |
2085 | ||
cd0ff491 | 2086 | for (i = 0 ; i < len ; i += 4) |
79ce639c | 2087 | p[i >> 2] = jread32(jme, reg + i); |
186fc259 | 2088 | } |
8c198884 | 2089 | |
186fc259 | 2090 | static void |
cd0ff491 | 2091 | mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) |
186fc259 GFT |
2092 | { |
2093 | int i; | |
cd0ff491 | 2094 | u16 *p16 = (u16 *)p; |
186fc259 | 2095 | |
cd0ff491 | 2096 | for (i = 0 ; i < reg_nr ; ++i) |
186fc259 | 2097 | p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i); |
8c198884 GFT |
2098 | } |
2099 | ||
2100 | static void | |
2101 | jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) | |
2102 | { | |
cd0ff491 GFT |
2103 | struct jme_adapter *jme = netdev_priv(netdev); |
2104 | u32 *p32 = (u32 *)p; | |
8c198884 | 2105 | |
186fc259 | 2106 | memset(p, 0xFF, JME_REG_LEN); |
8c198884 GFT |
2107 | |
2108 | regs->version = 1; | |
2109 | mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN); | |
2110 | ||
2111 | p32 += 0x100 >> 2; | |
2112 | mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN); | |
2113 | ||
2114 | p32 += 0x100 >> 2; | |
2115 | mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN); | |
2116 | ||
2117 | p32 += 0x100 >> 2; | |
2118 | mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN); | |
2119 | ||
186fc259 GFT |
2120 | p32 += 0x100 >> 2; |
2121 | mdio_memcpy(jme, p32, JME_PHY_REG_NR); | |
8c198884 GFT |
2122 | } |
2123 | ||
2124 | static int | |
2125 | jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2126 | { | |
2127 | struct jme_adapter *jme = netdev_priv(netdev); | |
2128 | ||
8c198884 GFT |
2129 | ecmd->tx_coalesce_usecs = PCC_TX_TO; |
2130 | ecmd->tx_max_coalesced_frames = PCC_TX_CNT; | |
2131 | ||
cd0ff491 | 2132 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
cdcdc9eb GFT |
2133 | ecmd->use_adaptive_rx_coalesce = false; |
2134 | ecmd->rx_coalesce_usecs = 0; | |
2135 | ecmd->rx_max_coalesced_frames = 0; | |
2136 | return 0; | |
2137 | } | |
2138 | ||
2139 | ecmd->use_adaptive_rx_coalesce = true; | |
2140 | ||
cd0ff491 | 2141 | switch (jme->dpi.cur) { |
8c198884 GFT |
2142 | case PCC_P1: |
2143 | ecmd->rx_coalesce_usecs = PCC_P1_TO; | |
2144 | ecmd->rx_max_coalesced_frames = PCC_P1_CNT; | |
2145 | break; | |
2146 | case PCC_P2: | |
2147 | ecmd->rx_coalesce_usecs = PCC_P2_TO; | |
2148 | ecmd->rx_max_coalesced_frames = PCC_P2_CNT; | |
2149 | break; | |
2150 | case PCC_P3: | |
2151 | ecmd->rx_coalesce_usecs = PCC_P3_TO; | |
2152 | ecmd->rx_max_coalesced_frames = PCC_P3_CNT; | |
2153 | break; | |
2154 | default: | |
2155 | break; | |
2156 | } | |
2157 | ||
2158 | return 0; | |
2159 | } | |
2160 | ||
192570e0 GFT |
2161 | static int |
2162 | jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2163 | { | |
2164 | struct jme_adapter *jme = netdev_priv(netdev); | |
2165 | struct dynpcc_info *dpi = &(jme->dpi); | |
2166 | ||
cd0ff491 | 2167 | if (netif_running(netdev)) |
cdcdc9eb GFT |
2168 | return -EBUSY; |
2169 | ||
cd0ff491 GFT |
2170 | if (ecmd->use_adaptive_rx_coalesce |
2171 | && test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2172 | clear_bit(JME_FLAG_POLL, &jme->flags); | |
cdcdc9eb GFT |
2173 | jme->jme_rx = netif_rx; |
2174 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
192570e0 GFT |
2175 | dpi->cur = PCC_P1; |
2176 | dpi->attempt = PCC_P1; | |
2177 | dpi->cnt = 0; | |
2178 | jme_set_rx_pcc(jme, PCC_P1); | |
2179 | jme_interrupt_mode(jme); | |
cd0ff491 GFT |
2180 | } else if (!(ecmd->use_adaptive_rx_coalesce) |
2181 | && !(test_bit(JME_FLAG_POLL, &jme->flags))) { | |
2182 | set_bit(JME_FLAG_POLL, &jme->flags); | |
cdcdc9eb GFT |
2183 | jme->jme_rx = netif_receive_skb; |
2184 | jme->jme_vlan_rx = vlan_hwaccel_receive_skb; | |
192570e0 GFT |
2185 | jme_interrupt_mode(jme); |
2186 | } | |
2187 | ||
2188 | return 0; | |
2189 | } | |
2190 | ||
8c198884 GFT |
2191 | static void |
2192 | jme_get_pauseparam(struct net_device *netdev, | |
2193 | struct ethtool_pauseparam *ecmd) | |
2194 | { | |
2195 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2196 | u32 val; |
8c198884 GFT |
2197 | |
2198 | ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0; | |
2199 | ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0; | |
2200 | ||
cd0ff491 GFT |
2201 | spin_lock_bh(&jme->phy_lock); |
2202 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2203 | spin_unlock_bh(&jme->phy_lock); | |
b3821cc5 GFT |
2204 | |
2205 | ecmd->autoneg = | |
2206 | (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0; | |
8c198884 GFT |
2207 | } |
2208 | ||
2209 | static int | |
2210 | jme_set_pauseparam(struct net_device *netdev, | |
2211 | struct ethtool_pauseparam *ecmd) | |
2212 | { | |
2213 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2214 | u32 val; |
8c198884 | 2215 | |
cd0ff491 | 2216 | if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^ |
8c198884 GFT |
2217 | (ecmd->tx_pause != 0)) { |
2218 | ||
cd0ff491 | 2219 | if (ecmd->tx_pause) |
8c198884 GFT |
2220 | jme->reg_txpfc |= TXPFC_PF_EN; |
2221 | else | |
2222 | jme->reg_txpfc &= ~TXPFC_PF_EN; | |
2223 | ||
2224 | jwrite32(jme, JME_TXPFC, jme->reg_txpfc); | |
2225 | } | |
2226 | ||
cd0ff491 GFT |
2227 | spin_lock_bh(&jme->rxmcs_lock); |
2228 | if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^ | |
8c198884 GFT |
2229 | (ecmd->rx_pause != 0)) { |
2230 | ||
cd0ff491 | 2231 | if (ecmd->rx_pause) |
8c198884 GFT |
2232 | jme->reg_rxmcs |= RXMCS_FLOWCTRL; |
2233 | else | |
2234 | jme->reg_rxmcs &= ~RXMCS_FLOWCTRL; | |
2235 | ||
2236 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2237 | } | |
cd0ff491 | 2238 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 | 2239 | |
cd0ff491 GFT |
2240 | spin_lock_bh(&jme->phy_lock); |
2241 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2242 | if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^ | |
8c198884 GFT |
2243 | (ecmd->autoneg != 0)) { |
2244 | ||
cd0ff491 | 2245 | if (ecmd->autoneg) |
8c198884 GFT |
2246 | val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
2247 | else | |
2248 | val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
2249 | ||
b3821cc5 GFT |
2250 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, |
2251 | MII_ADVERTISE, val); | |
8c198884 | 2252 | } |
cd0ff491 | 2253 | spin_unlock_bh(&jme->phy_lock); |
8c198884 GFT |
2254 | |
2255 | return 0; | |
2256 | } | |
2257 | ||
29bdd921 GFT |
2258 | static void |
2259 | jme_get_wol(struct net_device *netdev, | |
2260 | struct ethtool_wolinfo *wol) | |
2261 | { | |
2262 | struct jme_adapter *jme = netdev_priv(netdev); | |
2263 | ||
2264 | wol->supported = WAKE_MAGIC | WAKE_PHY; | |
2265 | ||
2266 | wol->wolopts = 0; | |
2267 | ||
cd0ff491 | 2268 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
29bdd921 GFT |
2269 | wol->wolopts |= WAKE_PHY; |
2270 | ||
cd0ff491 | 2271 | if (jme->reg_pmcs & PMCS_MFEN) |
29bdd921 GFT |
2272 | wol->wolopts |= WAKE_MAGIC; |
2273 | ||
2274 | } | |
2275 | ||
2276 | static int | |
2277 | jme_set_wol(struct net_device *netdev, | |
2278 | struct ethtool_wolinfo *wol) | |
2279 | { | |
2280 | struct jme_adapter *jme = netdev_priv(netdev); | |
2281 | ||
cd0ff491 | 2282 | if (wol->wolopts & (WAKE_MAGICSECURE | |
29bdd921 GFT |
2283 | WAKE_UCAST | |
2284 | WAKE_MCAST | | |
2285 | WAKE_BCAST | | |
2286 | WAKE_ARP)) | |
2287 | return -EOPNOTSUPP; | |
2288 | ||
2289 | jme->reg_pmcs = 0; | |
2290 | ||
cd0ff491 | 2291 | if (wol->wolopts & WAKE_PHY) |
29bdd921 GFT |
2292 | jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN; |
2293 | ||
cd0ff491 | 2294 | if (wol->wolopts & WAKE_MAGIC) |
29bdd921 GFT |
2295 | jme->reg_pmcs |= PMCS_MFEN; |
2296 | ||
cd0ff491 | 2297 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
42b1055e | 2298 | |
29bdd921 GFT |
2299 | return 0; |
2300 | } | |
b3821cc5 | 2301 | |
3bf61c55 GFT |
2302 | static int |
2303 | jme_get_settings(struct net_device *netdev, | |
2304 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2305 | { |
2306 | struct jme_adapter *jme = netdev_priv(netdev); | |
2307 | int rc; | |
8c198884 | 2308 | |
cd0ff491 | 2309 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2310 | rc = mii_ethtool_gset(&(jme->mii_if), ecmd); |
cd0ff491 | 2311 | spin_unlock_bh(&jme->phy_lock); |
d7699f87 GFT |
2312 | return rc; |
2313 | } | |
2314 | ||
3bf61c55 GFT |
2315 | static int |
2316 | jme_set_settings(struct net_device *netdev, | |
2317 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2318 | { |
2319 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2320 | int rc, fdc = 0; |
fcf45b4c | 2321 | |
cd0ff491 | 2322 | if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE) |
8c198884 GFT |
2323 | return -EINVAL; |
2324 | ||
cd0ff491 | 2325 | if (jme->mii_if.force_media && |
79ce639c GFT |
2326 | ecmd->autoneg != AUTONEG_ENABLE && |
2327 | (jme->mii_if.full_duplex != ecmd->duplex)) | |
2328 | fdc = 1; | |
2329 | ||
cd0ff491 | 2330 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2331 | rc = mii_ethtool_sset(&(jme->mii_if), ecmd); |
cd0ff491 | 2332 | spin_unlock_bh(&jme->phy_lock); |
fcf45b4c | 2333 | |
cd0ff491 | 2334 | if (!rc && fdc) |
79ce639c GFT |
2335 | jme_reset_link(jme); |
2336 | ||
cd0ff491 GFT |
2337 | if (!rc) { |
2338 | set_bit(JME_FLAG_SSET, &jme->flags); | |
29bdd921 GFT |
2339 | jme->old_ecmd = *ecmd; |
2340 | } | |
2341 | ||
d7699f87 GFT |
2342 | return rc; |
2343 | } | |
2344 | ||
cd0ff491 | 2345 | static u32 |
3bf61c55 GFT |
2346 | jme_get_link(struct net_device *netdev) |
2347 | { | |
d7699f87 GFT |
2348 | struct jme_adapter *jme = netdev_priv(netdev); |
2349 | return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP; | |
2350 | } | |
2351 | ||
8c198884 | 2352 | static u32 |
cd0ff491 GFT |
2353 | jme_get_msglevel(struct net_device *netdev) |
2354 | { | |
2355 | struct jme_adapter *jme = netdev_priv(netdev); | |
2356 | return jme->msg_enable; | |
2357 | } | |
2358 | ||
2359 | static void | |
2360 | jme_set_msglevel(struct net_device *netdev, u32 value) | |
8c198884 | 2361 | { |
cd0ff491 GFT |
2362 | struct jme_adapter *jme = netdev_priv(netdev); |
2363 | jme->msg_enable = value; | |
2364 | } | |
8c198884 | 2365 | |
cd0ff491 GFT |
2366 | static u32 |
2367 | jme_get_rx_csum(struct net_device *netdev) | |
2368 | { | |
2369 | struct jme_adapter *jme = netdev_priv(netdev); | |
8c198884 GFT |
2370 | return jme->reg_rxmcs & RXMCS_CHECKSUM; |
2371 | } | |
2372 | ||
2373 | static int | |
2374 | jme_set_rx_csum(struct net_device *netdev, u32 on) | |
2375 | { | |
cd0ff491 | 2376 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2377 | |
cd0ff491 GFT |
2378 | spin_lock_bh(&jme->rxmcs_lock); |
2379 | if (on) | |
8c198884 GFT |
2380 | jme->reg_rxmcs |= RXMCS_CHECKSUM; |
2381 | else | |
2382 | jme->reg_rxmcs &= ~RXMCS_CHECKSUM; | |
2383 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
cd0ff491 | 2384 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2385 | |
2386 | return 0; | |
2387 | } | |
2388 | ||
2389 | static int | |
2390 | jme_set_tx_csum(struct net_device *netdev, u32 on) | |
2391 | { | |
cd0ff491 | 2392 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2393 | |
cd0ff491 GFT |
2394 | if (on) { |
2395 | set_bit(JME_FLAG_TXCSUM, &jme->flags); | |
2396 | if (netdev->mtu <= 1900) | |
b3821cc5 | 2397 | netdev->features |= NETIF_F_HW_CSUM; |
cd0ff491 GFT |
2398 | } else { |
2399 | clear_bit(JME_FLAG_TXCSUM, &jme->flags); | |
8c198884 | 2400 | netdev->features &= ~NETIF_F_HW_CSUM; |
b3821cc5 | 2401 | } |
8c198884 GFT |
2402 | |
2403 | return 0; | |
2404 | } | |
2405 | ||
b3821cc5 GFT |
2406 | static int |
2407 | jme_set_tso(struct net_device *netdev, u32 on) | |
2408 | { | |
cd0ff491 | 2409 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2410 | |
cd0ff491 GFT |
2411 | if (on) { |
2412 | set_bit(JME_FLAG_TSO, &jme->flags); | |
2413 | if (netdev->mtu <= 1900) | |
b3821cc5 | 2414 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
cd0ff491 GFT |
2415 | } else { |
2416 | clear_bit(JME_FLAG_TSO, &jme->flags); | |
2417 | netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); | |
b3821cc5 GFT |
2418 | } |
2419 | ||
cd0ff491 | 2420 | return 0; |
b3821cc5 GFT |
2421 | } |
2422 | ||
8c198884 GFT |
2423 | static int |
2424 | jme_nway_reset(struct net_device *netdev) | |
2425 | { | |
cd0ff491 | 2426 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 GFT |
2427 | jme_restart_an(jme); |
2428 | return 0; | |
2429 | } | |
2430 | ||
cd0ff491 | 2431 | static u8 |
186fc259 GFT |
2432 | jme_smb_read(struct jme_adapter *jme, unsigned int addr) |
2433 | { | |
cd0ff491 | 2434 | u32 val; |
186fc259 GFT |
2435 | int to; |
2436 | ||
2437 | val = jread32(jme, JME_SMBCSR); | |
2438 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2439 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2440 | msleep(1); |
2441 | val = jread32(jme, JME_SMBCSR); | |
2442 | } | |
cd0ff491 GFT |
2443 | if (!to) { |
2444 | msg_hw(jme, "SMB Bus Busy.\n"); | |
186fc259 GFT |
2445 | return 0xFF; |
2446 | } | |
2447 | ||
2448 | jwrite32(jme, JME_SMBINTF, | |
2449 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2450 | SMBINTF_HWRWN_READ | | |
2451 | SMBINTF_HWCMD); | |
2452 | ||
2453 | val = jread32(jme, JME_SMBINTF); | |
2454 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2455 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2456 | msleep(1); |
2457 | val = jread32(jme, JME_SMBINTF); | |
2458 | } | |
cd0ff491 GFT |
2459 | if (!to) { |
2460 | msg_hw(jme, "SMB Bus Busy.\n"); | |
186fc259 GFT |
2461 | return 0xFF; |
2462 | } | |
2463 | ||
2464 | return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT; | |
2465 | } | |
2466 | ||
2467 | static void | |
cd0ff491 | 2468 | jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data) |
186fc259 | 2469 | { |
cd0ff491 | 2470 | u32 val; |
186fc259 GFT |
2471 | int to; |
2472 | ||
2473 | val = jread32(jme, JME_SMBCSR); | |
2474 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2475 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2476 | msleep(1); |
2477 | val = jread32(jme, JME_SMBCSR); | |
2478 | } | |
cd0ff491 GFT |
2479 | if (!to) { |
2480 | msg_hw(jme, "SMB Bus Busy.\n"); | |
186fc259 GFT |
2481 | return; |
2482 | } | |
2483 | ||
2484 | jwrite32(jme, JME_SMBINTF, | |
2485 | ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) | | |
2486 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2487 | SMBINTF_HWRWN_WRITE | | |
2488 | SMBINTF_HWCMD); | |
2489 | ||
2490 | val = jread32(jme, JME_SMBINTF); | |
2491 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2492 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2493 | msleep(1); |
2494 | val = jread32(jme, JME_SMBINTF); | |
2495 | } | |
cd0ff491 GFT |
2496 | if (!to) { |
2497 | msg_hw(jme, "SMB Bus Busy.\n"); | |
186fc259 GFT |
2498 | return; |
2499 | } | |
2500 | ||
2501 | mdelay(2); | |
2502 | } | |
2503 | ||
2504 | static int | |
2505 | jme_get_eeprom_len(struct net_device *netdev) | |
2506 | { | |
cd0ff491 GFT |
2507 | struct jme_adapter *jme = netdev_priv(netdev); |
2508 | u32 val; | |
186fc259 | 2509 | val = jread32(jme, JME_SMBCSR); |
cd0ff491 | 2510 | return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0; |
186fc259 GFT |
2511 | } |
2512 | ||
2513 | static int | |
2514 | jme_get_eeprom(struct net_device *netdev, | |
2515 | struct ethtool_eeprom *eeprom, u8 *data) | |
2516 | { | |
cd0ff491 | 2517 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2518 | int i, offset = eeprom->offset, len = eeprom->len; |
2519 | ||
2520 | /* | |
8d27293f | 2521 | * ethtool will check the boundary for us |
186fc259 GFT |
2522 | */ |
2523 | eeprom->magic = JME_EEPROM_MAGIC; | |
cd0ff491 | 2524 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2525 | data[i] = jme_smb_read(jme, i + offset); |
2526 | ||
2527 | return 0; | |
2528 | } | |
2529 | ||
2530 | static int | |
2531 | jme_set_eeprom(struct net_device *netdev, | |
2532 | struct ethtool_eeprom *eeprom, u8 *data) | |
2533 | { | |
cd0ff491 | 2534 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2535 | int i, offset = eeprom->offset, len = eeprom->len; |
2536 | ||
2537 | if (eeprom->magic != JME_EEPROM_MAGIC) | |
2538 | return -EINVAL; | |
2539 | ||
2540 | /* | |
8d27293f | 2541 | * ethtool will check the boundary for us |
186fc259 | 2542 | */ |
cd0ff491 | 2543 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2544 | jme_smb_write(jme, i + offset, data[i]); |
2545 | ||
2546 | return 0; | |
2547 | } | |
2548 | ||
d7699f87 | 2549 | static const struct ethtool_ops jme_ethtool_ops = { |
cd0ff491 | 2550 | .get_drvinfo = jme_get_drvinfo, |
8c198884 GFT |
2551 | .get_regs_len = jme_get_regs_len, |
2552 | .get_regs = jme_get_regs, | |
2553 | .get_coalesce = jme_get_coalesce, | |
192570e0 | 2554 | .set_coalesce = jme_set_coalesce, |
cd0ff491 GFT |
2555 | .get_pauseparam = jme_get_pauseparam, |
2556 | .set_pauseparam = jme_set_pauseparam, | |
29bdd921 GFT |
2557 | .get_wol = jme_get_wol, |
2558 | .set_wol = jme_set_wol, | |
d7699f87 GFT |
2559 | .get_settings = jme_get_settings, |
2560 | .set_settings = jme_set_settings, | |
2561 | .get_link = jme_get_link, | |
cd0ff491 GFT |
2562 | .get_msglevel = jme_get_msglevel, |
2563 | .set_msglevel = jme_set_msglevel, | |
8c198884 GFT |
2564 | .get_rx_csum = jme_get_rx_csum, |
2565 | .set_rx_csum = jme_set_rx_csum, | |
2566 | .set_tx_csum = jme_set_tx_csum, | |
b3821cc5 GFT |
2567 | .set_tso = jme_set_tso, |
2568 | .set_sg = ethtool_op_set_sg, | |
8c198884 | 2569 | .nway_reset = jme_nway_reset, |
186fc259 GFT |
2570 | .get_eeprom_len = jme_get_eeprom_len, |
2571 | .get_eeprom = jme_get_eeprom, | |
2572 | .set_eeprom = jme_set_eeprom, | |
d7699f87 GFT |
2573 | }; |
2574 | ||
3bf61c55 GFT |
2575 | static int |
2576 | jme_pci_dma64(struct pci_dev *pdev) | |
d7699f87 | 2577 | { |
cd0ff491 GFT |
2578 | if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) |
2579 | if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) | |
3bf61c55 GFT |
2580 | return 1; |
2581 | ||
cd0ff491 GFT |
2582 | if (!pci_set_dma_mask(pdev, DMA_40BIT_MASK)) |
2583 | if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK)) | |
8c198884 GFT |
2584 | return 1; |
2585 | ||
cd0ff491 GFT |
2586 | if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) |
2587 | if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) | |
3bf61c55 GFT |
2588 | return 0; |
2589 | ||
2590 | return -1; | |
2591 | } | |
2592 | ||
cd0ff491 | 2593 | static inline void |
cdcdc9eb GFT |
2594 | jme_phy_init(struct jme_adapter *jme) |
2595 | { | |
cd0ff491 | 2596 | u16 reg26; |
cdcdc9eb GFT |
2597 | |
2598 | reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26); | |
2599 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000); | |
2600 | } | |
2601 | ||
cd0ff491 | 2602 | static inline void |
cdcdc9eb | 2603 | jme_check_hw_ver(struct jme_adapter *jme) |
42b1055e | 2604 | { |
cd0ff491 | 2605 | u32 chipmode; |
cdcdc9eb GFT |
2606 | |
2607 | chipmode = jread32(jme, JME_CHIPMODE); | |
2608 | ||
2609 | jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT; | |
e882564f | 2610 | jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT; |
42b1055e GFT |
2611 | } |
2612 | ||
3bf61c55 GFT |
2613 | static int __devinit |
2614 | jme_init_one(struct pci_dev *pdev, | |
2615 | const struct pci_device_id *ent) | |
2616 | { | |
cdcdc9eb | 2617 | int rc = 0, using_dac, i; |
d7699f87 GFT |
2618 | struct net_device *netdev; |
2619 | struct jme_adapter *jme; | |
cd0ff491 GFT |
2620 | u16 bmcr, bmsr; |
2621 | u32 apmc; | |
d7699f87 GFT |
2622 | |
2623 | /* | |
2624 | * set up PCI device basics | |
2625 | */ | |
4330c2f2 | 2626 | rc = pci_enable_device(pdev); |
cd0ff491 GFT |
2627 | if (rc) { |
2628 | jeprintk(pdev, "Cannot enable PCI device.\n"); | |
4330c2f2 GFT |
2629 | goto err_out; |
2630 | } | |
d7699f87 | 2631 | |
3bf61c55 | 2632 | using_dac = jme_pci_dma64(pdev); |
cd0ff491 GFT |
2633 | if (using_dac < 0) { |
2634 | jeprintk(pdev, "Cannot set PCI DMA Mask.\n"); | |
3bf61c55 GFT |
2635 | rc = -EIO; |
2636 | goto err_out_disable_pdev; | |
2637 | } | |
2638 | ||
cd0ff491 GFT |
2639 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
2640 | jeprintk(pdev, "No PCI resource region found.\n"); | |
4330c2f2 GFT |
2641 | rc = -ENOMEM; |
2642 | goto err_out_disable_pdev; | |
2643 | } | |
d7699f87 | 2644 | |
4330c2f2 | 2645 | rc = pci_request_regions(pdev, DRV_NAME); |
cd0ff491 GFT |
2646 | if (rc) { |
2647 | jeprintk(pdev, "Cannot obtain PCI resource region.\n"); | |
4330c2f2 GFT |
2648 | goto err_out_disable_pdev; |
2649 | } | |
d7699f87 GFT |
2650 | |
2651 | pci_set_master(pdev); | |
2652 | ||
2653 | /* | |
2654 | * alloc and init net device | |
2655 | */ | |
3bf61c55 | 2656 | netdev = alloc_etherdev(sizeof(*jme)); |
cd0ff491 GFT |
2657 | if (!netdev) { |
2658 | jeprintk(pdev, "Cannot allocate netdev structure.\n"); | |
4330c2f2 GFT |
2659 | rc = -ENOMEM; |
2660 | goto err_out_release_regions; | |
d7699f87 GFT |
2661 | } |
2662 | netdev->open = jme_open; | |
2663 | netdev->stop = jme_close; | |
2664 | netdev->hard_start_xmit = jme_start_xmit; | |
d7699f87 GFT |
2665 | netdev->set_mac_address = jme_set_macaddr; |
2666 | netdev->set_multicast_list = jme_set_multi; | |
2667 | netdev->change_mtu = jme_change_mtu; | |
2668 | netdev->ethtool_ops = &jme_ethtool_ops; | |
8c198884 GFT |
2669 | netdev->tx_timeout = jme_tx_timeout; |
2670 | netdev->watchdog_timeo = TX_TIMEOUT; | |
42b1055e | 2671 | netdev->vlan_rx_register = jme_vlan_rx_register; |
3bf61c55 | 2672 | NETDEV_GET_STATS(netdev, &jme_get_stats); |
42b1055e | 2673 | netdev->features = NETIF_F_HW_CSUM | |
b3821cc5 GFT |
2674 | NETIF_F_SG | |
2675 | NETIF_F_TSO | | |
2676 | NETIF_F_TSO6 | | |
42b1055e GFT |
2677 | NETIF_F_HW_VLAN_TX | |
2678 | NETIF_F_HW_VLAN_RX; | |
cd0ff491 | 2679 | if (using_dac) |
8c198884 | 2680 | netdev->features |= NETIF_F_HIGHDMA; |
d7699f87 GFT |
2681 | |
2682 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
2683 | pci_set_drvdata(pdev, netdev); | |
2684 | ||
2685 | /* | |
2686 | * init adapter info | |
2687 | */ | |
2688 | jme = netdev_priv(netdev); | |
2689 | jme->pdev = pdev; | |
2690 | jme->dev = netdev; | |
cdcdc9eb GFT |
2691 | jme->jme_rx = netif_rx; |
2692 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
29bdd921 | 2693 | jme->old_mtu = netdev->mtu = 1500; |
fcf45b4c | 2694 | jme->phylink = 0; |
b3821cc5 GFT |
2695 | jme->tx_ring_size = 1 << 10; |
2696 | jme->tx_ring_mask = jme->tx_ring_size - 1; | |
2697 | jme->tx_wake_threshold = 1 << 9; | |
2698 | jme->rx_ring_size = 1 << 9; | |
2699 | jme->rx_ring_mask = jme->rx_ring_size - 1; | |
cd0ff491 | 2700 | jme->msg_enable = JME_DEF_MSG_ENABLE; |
d7699f87 GFT |
2701 | jme->regs = ioremap(pci_resource_start(pdev, 0), |
2702 | pci_resource_len(pdev, 0)); | |
4330c2f2 | 2703 | if (!(jme->regs)) { |
cd0ff491 | 2704 | jeprintk(pdev, "Mapping PCI resource region error.\n"); |
d7699f87 GFT |
2705 | rc = -ENOMEM; |
2706 | goto err_out_free_netdev; | |
2707 | } | |
4330c2f2 | 2708 | jme->shadow_regs = pci_alloc_consistent(pdev, |
cd0ff491 GFT |
2709 | sizeof(u32) * SHADOW_REG_NR, |
2710 | &(jme->shadow_dma)); | |
4330c2f2 | 2711 | if (!(jme->shadow_regs)) { |
cd0ff491 | 2712 | jeprintk(pdev, "Allocating shadow register mapping error.\n"); |
4330c2f2 GFT |
2713 | rc = -ENOMEM; |
2714 | goto err_out_unmap; | |
2715 | } | |
2716 | ||
cd0ff491 GFT |
2717 | if (no_pseudohp) { |
2718 | apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN; | |
2719 | jwrite32(jme, JME_APMC, apmc); | |
2720 | } else if (force_pseudohp) { | |
2721 | apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN; | |
2722 | jwrite32(jme, JME_APMC, apmc); | |
2723 | } | |
2724 | ||
cdcdc9eb | 2725 | NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2) |
192570e0 | 2726 | |
d7699f87 | 2727 | spin_lock_init(&jme->phy_lock); |
fcf45b4c | 2728 | spin_lock_init(&jme->macaddr_lock); |
8c198884 | 2729 | spin_lock_init(&jme->rxmcs_lock); |
fcf45b4c | 2730 | |
fcf45b4c GFT |
2731 | atomic_set(&jme->link_changing, 1); |
2732 | atomic_set(&jme->rx_cleaning, 1); | |
2733 | atomic_set(&jme->tx_cleaning, 1); | |
192570e0 | 2734 | atomic_set(&jme->rx_empty, 1); |
fcf45b4c | 2735 | |
79ce639c GFT |
2736 | tasklet_init(&jme->pcc_task, |
2737 | &jme_pcc_tasklet, | |
2738 | (unsigned long) jme); | |
4330c2f2 GFT |
2739 | tasklet_init(&jme->linkch_task, |
2740 | &jme_link_change_tasklet, | |
2741 | (unsigned long) jme); | |
2742 | tasklet_init(&jme->txclean_task, | |
2743 | &jme_tx_clean_tasklet, | |
2744 | (unsigned long) jme); | |
2745 | tasklet_init(&jme->rxclean_task, | |
2746 | &jme_rx_clean_tasklet, | |
2747 | (unsigned long) jme); | |
fcf45b4c GFT |
2748 | tasklet_init(&jme->rxempty_task, |
2749 | &jme_rx_empty_tasklet, | |
2750 | (unsigned long) jme); | |
cd0ff491 GFT |
2751 | tasklet_disable_nosync(&jme->txclean_task); |
2752 | tasklet_disable_nosync(&jme->rxclean_task); | |
2753 | tasklet_disable_nosync(&jme->rxempty_task); | |
8c198884 GFT |
2754 | jme->dpi.cur = PCC_P1; |
2755 | ||
cd0ff491 | 2756 | jme->reg_ghc = 0; |
79ce639c | 2757 | jme->reg_rxcs = RXCS_DEFAULT; |
8c198884 GFT |
2758 | jme->reg_rxmcs = RXMCS_DEFAULT; |
2759 | jme->reg_txpfc = 0; | |
47220951 | 2760 | jme->reg_pmcs = PMCS_MFEN; |
cd0ff491 GFT |
2761 | set_bit(JME_FLAG_TXCSUM, &jme->flags); |
2762 | set_bit(JME_FLAG_TSO, &jme->flags); | |
192570e0 | 2763 | |
fcf45b4c GFT |
2764 | /* |
2765 | * Get Max Read Req Size from PCI Config Space | |
2766 | */ | |
cd0ff491 GFT |
2767 | pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs); |
2768 | jme->mrrs &= PCI_DCSR_MRRS_MASK; | |
2769 | switch (jme->mrrs) { | |
2770 | case MRRS_128B: | |
2771 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; | |
2772 | break; | |
2773 | case MRRS_256B: | |
2774 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; | |
2775 | break; | |
2776 | default: | |
2777 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; | |
2778 | break; | |
fcf45b4c GFT |
2779 | }; |
2780 | ||
d7699f87 | 2781 | /* |
cdcdc9eb | 2782 | * Must check before reset_mac_processor |
d7699f87 | 2783 | */ |
cdcdc9eb GFT |
2784 | jme_check_hw_ver(jme); |
2785 | jme->mii_if.dev = netdev; | |
cd0ff491 | 2786 | if (jme->fpgaver) { |
cdcdc9eb | 2787 | jme->mii_if.phy_id = 0; |
cd0ff491 | 2788 | for (i = 1 ; i < 32 ; ++i) { |
cdcdc9eb GFT |
2789 | bmcr = jme_mdio_read(netdev, i, MII_BMCR); |
2790 | bmsr = jme_mdio_read(netdev, i, MII_BMSR); | |
cd0ff491 | 2791 | if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { |
cdcdc9eb GFT |
2792 | jme->mii_if.phy_id = i; |
2793 | break; | |
2794 | } | |
2795 | } | |
2796 | ||
cd0ff491 | 2797 | if (!jme->mii_if.phy_id) { |
cdcdc9eb | 2798 | rc = -EIO; |
cd0ff491 | 2799 | jeprintk(pdev, "Can not find phy_id.\n"); |
cdcdc9eb GFT |
2800 | goto err_out_free_shadow; |
2801 | } | |
2802 | ||
2803 | jme->reg_ghc |= GHC_LINK_POLL; | |
cd0ff491 | 2804 | } else { |
cdcdc9eb GFT |
2805 | jme->mii_if.phy_id = 1; |
2806 | } | |
cd0ff491 | 2807 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
2808 | jme->mii_if.supports_gmii = true; |
2809 | else | |
2810 | jme->mii_if.supports_gmii = false; | |
cdcdc9eb GFT |
2811 | jme->mii_if.mdio_read = jme_mdio_read; |
2812 | jme->mii_if.mdio_write = jme_mdio_write; | |
2813 | ||
d7699f87 | 2814 | jme_clear_pm(jme); |
e882564f | 2815 | jme_set_phyfifoa(jme); |
cd0ff491 GFT |
2816 | pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev); |
2817 | if (!jme->fpgaver) | |
cdcdc9eb | 2818 | jme_phy_init(jme); |
42b1055e | 2819 | jme_phy_off(jme); |
cdcdc9eb GFT |
2820 | |
2821 | /* | |
2822 | * Reset MAC processor and reload EEPROM for MAC Address | |
2823 | */ | |
d7699f87 | 2824 | jme_reset_mac_processor(jme); |
4330c2f2 | 2825 | rc = jme_reload_eeprom(jme); |
cd0ff491 GFT |
2826 | if (rc) { |
2827 | jeprintk(pdev, | |
b3821cc5 | 2828 | "Reload eeprom for reading MAC Address error.\n"); |
4330c2f2 GFT |
2829 | goto err_out_free_shadow; |
2830 | } | |
d7699f87 GFT |
2831 | jme_load_macaddr(netdev); |
2832 | ||
d7699f87 GFT |
2833 | /* |
2834 | * Tell stack that we are not ready to work until open() | |
2835 | */ | |
2836 | netif_carrier_off(netdev); | |
2837 | netif_stop_queue(netdev); | |
2838 | ||
2839 | /* | |
2840 | * Register netdev | |
2841 | */ | |
4330c2f2 | 2842 | rc = register_netdev(netdev); |
cd0ff491 GFT |
2843 | if (rc) { |
2844 | jeprintk(pdev, "Cannot register net device.\n"); | |
4330c2f2 GFT |
2845 | goto err_out_free_shadow; |
2846 | } | |
d7699f87 | 2847 | |
cd0ff491 | 2848 | msg_probe(jme, |
e882564f | 2849 | "JMC250 gigabit%s ver:%x rev:%x " |
cd0ff491 GFT |
2850 | "macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n", |
2851 | (jme->fpgaver != 0) ? " (FPGA)" : "", | |
e882564f GFT |
2852 | (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev, |
2853 | jme->rev, | |
cd0ff491 GFT |
2854 | netdev->dev_addr[0], |
2855 | netdev->dev_addr[1], | |
2856 | netdev->dev_addr[2], | |
2857 | netdev->dev_addr[3], | |
2858 | netdev->dev_addr[4], | |
2859 | netdev->dev_addr[5]); | |
d7699f87 GFT |
2860 | |
2861 | return 0; | |
2862 | ||
4330c2f2 GFT |
2863 | err_out_free_shadow: |
2864 | pci_free_consistent(pdev, | |
cd0ff491 | 2865 | sizeof(u32) * SHADOW_REG_NR, |
4330c2f2 GFT |
2866 | jme->shadow_regs, |
2867 | jme->shadow_dma); | |
d7699f87 GFT |
2868 | err_out_unmap: |
2869 | iounmap(jme->regs); | |
2870 | err_out_free_netdev: | |
2871 | pci_set_drvdata(pdev, NULL); | |
2872 | free_netdev(netdev); | |
4330c2f2 GFT |
2873 | err_out_release_regions: |
2874 | pci_release_regions(pdev); | |
d7699f87 | 2875 | err_out_disable_pdev: |
cd0ff491 | 2876 | pci_disable_device(pdev); |
d7699f87 | 2877 | err_out: |
4330c2f2 | 2878 | return rc; |
d7699f87 GFT |
2879 | } |
2880 | ||
3bf61c55 GFT |
2881 | static void __devexit |
2882 | jme_remove_one(struct pci_dev *pdev) | |
2883 | { | |
d7699f87 GFT |
2884 | struct net_device *netdev = pci_get_drvdata(pdev); |
2885 | struct jme_adapter *jme = netdev_priv(netdev); | |
2886 | ||
2887 | unregister_netdev(netdev); | |
4330c2f2 | 2888 | pci_free_consistent(pdev, |
cd0ff491 | 2889 | sizeof(u32) * SHADOW_REG_NR, |
4330c2f2 GFT |
2890 | jme->shadow_regs, |
2891 | jme->shadow_dma); | |
d7699f87 GFT |
2892 | iounmap(jme->regs); |
2893 | pci_set_drvdata(pdev, NULL); | |
2894 | free_netdev(netdev); | |
2895 | pci_release_regions(pdev); | |
2896 | pci_disable_device(pdev); | |
2897 | ||
2898 | } | |
2899 | ||
29bdd921 GFT |
2900 | static int |
2901 | jme_suspend(struct pci_dev *pdev, pm_message_t state) | |
2902 | { | |
2903 | struct net_device *netdev = pci_get_drvdata(pdev); | |
2904 | struct jme_adapter *jme = netdev_priv(netdev); | |
29bdd921 GFT |
2905 | |
2906 | atomic_dec(&jme->link_changing); | |
2907 | ||
2908 | netif_device_detach(netdev); | |
2909 | netif_stop_queue(netdev); | |
2910 | jme_stop_irq(jme); | |
29bdd921 | 2911 | |
cd0ff491 GFT |
2912 | tasklet_disable(&jme->txclean_task); |
2913 | tasklet_disable(&jme->rxclean_task); | |
2914 | tasklet_disable(&jme->rxempty_task); | |
2915 | ||
29bdd921 GFT |
2916 | jme_disable_shadow(jme); |
2917 | ||
cd0ff491 GFT |
2918 | if (netif_carrier_ok(netdev)) { |
2919 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
47220951 GFT |
2920 | jme_polling_mode(jme); |
2921 | ||
29bdd921 | 2922 | jme_stop_pcc_timer(jme); |
cd0ff491 GFT |
2923 | jme_reset_ghc_speed(jme); |
2924 | jme_disable_rx_engine(jme); | |
2925 | jme_disable_tx_engine(jme); | |
29bdd921 GFT |
2926 | jme_reset_mac_processor(jme); |
2927 | jme_free_rx_resources(jme); | |
2928 | jme_free_tx_resources(jme); | |
2929 | netif_carrier_off(netdev); | |
2930 | jme->phylink = 0; | |
2931 | } | |
2932 | ||
cd0ff491 GFT |
2933 | tasklet_enable(&jme->txclean_task); |
2934 | tasklet_hi_enable(&jme->rxclean_task); | |
2935 | tasklet_hi_enable(&jme->rxempty_task); | |
29bdd921 GFT |
2936 | |
2937 | pci_save_state(pdev); | |
cd0ff491 | 2938 | if (jme->reg_pmcs) { |
42b1055e | 2939 | jme_set_100m_half(jme); |
47220951 | 2940 | |
cd0ff491 | 2941 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
47220951 GFT |
2942 | jme_wait_link(jme); |
2943 | ||
29bdd921 | 2944 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
cd0ff491 | 2945 | |
42b1055e | 2946 | pci_enable_wake(pdev, PCI_D3cold, true); |
cd0ff491 | 2947 | } else { |
42b1055e | 2948 | jme_phy_off(jme); |
29bdd921 | 2949 | } |
cd0ff491 | 2950 | pci_set_power_state(pdev, PCI_D3cold); |
29bdd921 GFT |
2951 | |
2952 | return 0; | |
2953 | } | |
2954 | ||
2955 | static int | |
2956 | jme_resume(struct pci_dev *pdev) | |
2957 | { | |
2958 | struct net_device *netdev = pci_get_drvdata(pdev); | |
2959 | struct jme_adapter *jme = netdev_priv(netdev); | |
2960 | ||
2961 | jme_clear_pm(jme); | |
2962 | pci_restore_state(pdev); | |
2963 | ||
cd0ff491 | 2964 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
29bdd921 GFT |
2965 | jme_set_settings(netdev, &jme->old_ecmd); |
2966 | else | |
2967 | jme_reset_phy_processor(jme); | |
2968 | ||
29bdd921 | 2969 | jme_enable_shadow(jme); |
29bdd921 GFT |
2970 | jme_start_irq(jme); |
2971 | netif_device_attach(netdev); | |
2972 | ||
2973 | atomic_inc(&jme->link_changing); | |
2974 | ||
2975 | jme_reset_link(jme); | |
2976 | ||
2977 | return 0; | |
2978 | } | |
2979 | ||
d7699f87 | 2980 | static struct pci_device_id jme_pci_tbl[] = { |
cd0ff491 GFT |
2981 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) }, |
2982 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) }, | |
d7699f87 GFT |
2983 | { } |
2984 | }; | |
2985 | ||
2986 | static struct pci_driver jme_driver = { | |
cd0ff491 GFT |
2987 | .name = DRV_NAME, |
2988 | .id_table = jme_pci_tbl, | |
2989 | .probe = jme_init_one, | |
2990 | .remove = __devexit_p(jme_remove_one), | |
d7699f87 | 2991 | #ifdef CONFIG_PM |
cd0ff491 GFT |
2992 | .suspend = jme_suspend, |
2993 | .resume = jme_resume, | |
d7699f87 | 2994 | #endif /* CONFIG_PM */ |
d7699f87 GFT |
2995 | }; |
2996 | ||
3bf61c55 GFT |
2997 | static int __init |
2998 | jme_init_module(void) | |
d7699f87 | 2999 | { |
4330c2f2 GFT |
3000 | printk(KERN_INFO PFX "JMicron JMC250 gigabit ethernet " |
3001 | "driver version %s\n", DRV_VERSION); | |
d7699f87 GFT |
3002 | return pci_register_driver(&jme_driver); |
3003 | } | |
3004 | ||
3bf61c55 GFT |
3005 | static void __exit |
3006 | jme_cleanup_module(void) | |
d7699f87 GFT |
3007 | { |
3008 | pci_unregister_driver(&jme_driver); | |
3009 | } | |
3010 | ||
3011 | module_init(jme_init_module); | |
3012 | module_exit(jme_cleanup_module); | |
3013 | ||
3bf61c55 | 3014 | MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>"); |
d7699f87 GFT |
3015 | MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver"); |
3016 | MODULE_LICENSE("GPL"); | |
3017 | MODULE_VERSION(DRV_VERSION); | |
3018 | MODULE_DEVICE_TABLE(pci, jme_pci_tbl); | |
3019 |