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Commit | Line | Data |
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d7699f87 GFT |
1 | /* |
2 | * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver | |
3 | * | |
4 | * Copyright 2008 JMicron Technology Corporation | |
5 | * http://www.jmicron.com/ | |
6 | * | |
3bf61c55 GFT |
7 | * Author: Guo-Fu Tseng <cooldavid@cooldavid.org> |
8 | * | |
d7699f87 GFT |
9 | * This program is free software; you can redistribute it and/or modify |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | * | |
22 | */ | |
23 | ||
4330c2f2 | 24 | #include <linux/version.h> |
d7699f87 GFT |
25 | #include <linux/module.h> |
26 | #include <linux/kernel.h> | |
27 | #include <linux/pci.h> | |
28 | #include <linux/netdevice.h> | |
29 | #include <linux/etherdevice.h> | |
30 | #include <linux/ethtool.h> | |
31 | #include <linux/mii.h> | |
32 | #include <linux/crc32.h> | |
4330c2f2 | 33 | #include <linux/delay.h> |
29bdd921 | 34 | #include <linux/spinlock.h> |
8c198884 GFT |
35 | #include <linux/in.h> |
36 | #include <linux/ip.h> | |
79ce639c GFT |
37 | #include <linux/ipv6.h> |
38 | #include <linux/tcp.h> | |
39 | #include <linux/udp.h> | |
42b1055e | 40 | #include <linux/if_vlan.h> |
d7699f87 GFT |
41 | #include "jme.h" |
42 | ||
cd0ff491 GFT |
43 | static int force_pseudohp = -1; |
44 | static int no_pseudohp = -1; | |
45 | static int no_extplug = -1; | |
46 | module_param(force_pseudohp, int, 0); | |
47 | MODULE_PARM_DESC(force_pseudohp, | |
48 | "Enable pseudo hot-plug feature manually by driver instead of BIOS."); | |
49 | module_param(no_pseudohp, int, 0); | |
50 | MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); | |
51 | module_param(no_extplug, int, 0); | |
52 | MODULE_PARM_DESC(no_extplug, | |
53 | "Do not use external plug signal for pseudo hot-plug."); | |
4330c2f2 | 54 | |
3bf61c55 GFT |
55 | static int |
56 | jme_mdio_read(struct net_device *netdev, int phy, int reg) | |
d7699f87 GFT |
57 | { |
58 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 59 | int i, val, again = (reg == MII_BMSR) ? 1 : 0; |
d7699f87 | 60 | |
186fc259 | 61 | read_again: |
cd0ff491 | 62 | jwrite32(jme, JME_SMI, SMI_OP_REQ | |
3bf61c55 GFT |
63 | smi_phy_addr(phy) | |
64 | smi_reg_addr(reg)); | |
d7699f87 GFT |
65 | |
66 | wmb(); | |
cd0ff491 | 67 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
cdcdc9eb | 68 | udelay(20); |
b3821cc5 GFT |
69 | val = jread32(jme, JME_SMI); |
70 | if ((val & SMI_OP_REQ) == 0) | |
3bf61c55 | 71 | break; |
cd0ff491 | 72 | } |
d7699f87 | 73 | |
cd0ff491 GFT |
74 | if (i == 0) { |
75 | jeprintk(jme->pdev, "phy(%d) read timeout : %d\n", phy, reg); | |
3bf61c55 | 76 | return 0; |
cd0ff491 | 77 | } |
d7699f87 | 78 | |
cd0ff491 | 79 | if (again--) |
186fc259 GFT |
80 | goto read_again; |
81 | ||
cd0ff491 | 82 | return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT; |
d7699f87 GFT |
83 | } |
84 | ||
3bf61c55 GFT |
85 | static void |
86 | jme_mdio_write(struct net_device *netdev, | |
87 | int phy, int reg, int val) | |
d7699f87 GFT |
88 | { |
89 | struct jme_adapter *jme = netdev_priv(netdev); | |
90 | int i; | |
91 | ||
3bf61c55 GFT |
92 | jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ | |
93 | ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | | |
94 | smi_phy_addr(phy) | smi_reg_addr(reg)); | |
d7699f87 GFT |
95 | |
96 | wmb(); | |
cdcdc9eb GFT |
97 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { |
98 | udelay(20); | |
8d27293f | 99 | if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0) |
3bf61c55 GFT |
100 | break; |
101 | } | |
d7699f87 | 102 | |
3bf61c55 | 103 | if (i == 0) |
cd0ff491 | 104 | jeprintk(jme->pdev, "phy(%d) write timeout : %d\n", phy, reg); |
d7699f87 | 105 | |
3bf61c55 | 106 | return; |
d7699f87 GFT |
107 | } |
108 | ||
cd0ff491 GFT |
109 | static void |
110 | jme_spi_start(struct pci_dev *pdev, struct jme_spi_op *spiop) | |
111 | { | |
112 | spiop->sr |= SPI_EN; | |
113 | pci_write_config_byte(pdev, PCI_SPI, spiop->sr); | |
114 | ndelay(spiop->halfclk << 2); | |
115 | if (spiop->mode & SPI_MODE_CPOL) { | |
116 | spiop->sr |= SPI_SCLK; | |
117 | pci_write_config_byte(pdev, PCI_SPI, spiop->sr); | |
118 | ndelay(spiop->halfclk << 2); | |
119 | } | |
120 | spiop->sr &= ~SPI_CS; | |
121 | pci_write_config_byte(pdev, PCI_SPI, spiop->sr); | |
122 | ndelay(spiop->halfclk); | |
123 | } | |
124 | ||
125 | static void | |
126 | jme_spi_write(struct pci_dev *pdev, struct jme_spi_op *spiop, u8 byte) | |
127 | { | |
128 | int bit; | |
129 | ||
130 | for (bit = 0 ; bit < 8 ; ++bit) { | |
131 | if (byte & 0x80) | |
132 | spiop->sr |= SPI_MOSI; | |
133 | else | |
134 | spiop->sr &= ~SPI_MOSI; | |
135 | pci_write_config_byte(pdev, PCI_SPI, spiop->sr); | |
136 | ||
137 | byte <<= 1; | |
138 | ndelay(spiop->halfclk); | |
139 | spiop->sr ^= SPI_SCLK; | |
140 | pci_write_config_byte(pdev, PCI_SPI, spiop->sr); | |
141 | ||
142 | ndelay(spiop->halfclk); | |
143 | spiop->sr ^= SPI_SCLK; | |
144 | pci_write_config_byte(pdev, PCI_SPI, spiop->sr); | |
145 | } | |
146 | } | |
147 | ||
148 | static void | |
149 | jme_spi_read(struct pci_dev *pdev, struct jme_spi_op *spiop, u8 *byte) | |
150 | { | |
151 | int bit; | |
152 | u8 b; | |
153 | ||
154 | spiop->sr &= ~SPI_MOSI; | |
155 | for (bit = 0 ; bit < 8 ; ++bit) { | |
156 | *byte <<= 1; | |
157 | ndelay(spiop->halfclk); | |
158 | spiop->sr ^= SPI_SCLK; | |
159 | pci_write_config_byte(pdev, PCI_SPI, spiop->sr); | |
160 | ||
161 | ndelay(spiop->halfclk); | |
162 | pci_read_config_byte(pdev, PCI_SPI, &b); | |
163 | *byte |= !!(b & SPI_MISO); | |
164 | spiop->sr ^= SPI_SCLK; | |
165 | pci_write_config_byte(pdev, PCI_SPI, spiop->sr); | |
166 | } | |
167 | } | |
168 | ||
169 | static void | |
170 | jme_spi_stop(struct pci_dev *pdev, struct jme_spi_op *spiop) | |
171 | { | |
172 | spiop->sr &= ~SPI_EN; | |
173 | spiop->sr |= SPI_CS; | |
174 | pci_write_config_byte(pdev, PCI_SPI, spiop->sr); | |
175 | } | |
176 | ||
177 | /** | |
178 | * jme_spi_io - SPI Access helper function. | |
179 | * @jme: Adapter informations | |
180 | * @spiop: SPI operation. | |
181 | * | |
182 | * We have a SPI SW Access register in PCI configuration space, | |
183 | * which directly connect to flash controller with SPI interface. | |
184 | * This function is used to communicate with it in SPI protocol. | |
185 | */ | |
186 | static int | |
187 | jme_spi_op(struct jme_adapter *jme, struct jme_spi_op *spiop) | |
188 | { | |
189 | int i; | |
190 | ||
191 | /* | |
192 | * Only support 8 bits for now | |
193 | */ | |
194 | if (spiop->bitn != 8) | |
195 | return -EINVAL; | |
196 | ||
197 | /* | |
198 | * Only support half-duplex for now | |
199 | */ | |
200 | if (spiop->mode & SPI_MODE_DUP) | |
201 | return -EINVAL; | |
202 | ||
203 | spiop->halfclk = HALF_US / spiop->spd; | |
204 | spiop->sr = SPI_CS; | |
205 | jme_spi_start(jme->pdev, spiop); | |
206 | ||
207 | for (i = 0 ; i < spiop->wn ; ++i) | |
208 | jme_spi_write(jme->pdev, spiop, spiop->kwbuf[i]); | |
209 | ||
210 | for (i = 0 ; i < spiop->rn ; ++i) | |
211 | jme_spi_read(jme->pdev, spiop, spiop->krbuf + i); | |
212 | ||
213 | jme_spi_stop(jme->pdev, spiop); | |
214 | ||
215 | return 0; | |
216 | } | |
217 | ||
218 | static inline void | |
3bf61c55 | 219 | jme_reset_phy_processor(struct jme_adapter *jme) |
d7699f87 | 220 | { |
cd0ff491 | 221 | u32 val; |
3bf61c55 GFT |
222 | |
223 | jme_mdio_write(jme->dev, | |
224 | jme->mii_if.phy_id, | |
8c198884 GFT |
225 | MII_ADVERTISE, ADVERTISE_ALL | |
226 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
3bf61c55 | 227 | |
cd0ff491 | 228 | if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
229 | jme_mdio_write(jme->dev, |
230 | jme->mii_if.phy_id, | |
231 | MII_CTRL1000, | |
232 | ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
3bf61c55 | 233 | |
fcf45b4c GFT |
234 | val = jme_mdio_read(jme->dev, |
235 | jme->mii_if.phy_id, | |
236 | MII_BMCR); | |
237 | ||
238 | jme_mdio_write(jme->dev, | |
239 | jme->mii_if.phy_id, | |
240 | MII_BMCR, val | BMCR_RESET); | |
241 | ||
3bf61c55 GFT |
242 | return; |
243 | } | |
244 | ||
b3821cc5 GFT |
245 | static void |
246 | jme_setup_wakeup_frame(struct jme_adapter *jme, | |
cd0ff491 | 247 | u32 *mask, u32 crc, int fnr) |
b3821cc5 GFT |
248 | { |
249 | int i; | |
250 | ||
251 | /* | |
252 | * Setup CRC pattern | |
253 | */ | |
254 | jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL)); | |
255 | wmb(); | |
256 | jwrite32(jme, JME_WFODP, crc); | |
257 | wmb(); | |
258 | ||
259 | /* | |
260 | * Setup Mask | |
261 | */ | |
cd0ff491 | 262 | for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { |
b3821cc5 GFT |
263 | jwrite32(jme, JME_WFOI, |
264 | ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) | | |
265 | (fnr & WFOI_FRAME_SEL)); | |
266 | wmb(); | |
267 | jwrite32(jme, JME_WFODP, mask[i]); | |
268 | wmb(); | |
269 | } | |
270 | } | |
3bf61c55 | 271 | |
cd0ff491 | 272 | static inline void |
3bf61c55 GFT |
273 | jme_reset_mac_processor(struct jme_adapter *jme) |
274 | { | |
cd0ff491 GFT |
275 | u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; |
276 | u32 crc = 0xCDCDCDCD; | |
277 | u32 gpreg0; | |
b3821cc5 GFT |
278 | int i; |
279 | ||
3bf61c55 | 280 | jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST); |
d7699f87 | 281 | udelay(2); |
3bf61c55 | 282 | jwrite32(jme, JME_GHC, jme->reg_ghc); |
cd0ff491 GFT |
283 | |
284 | jwrite32(jme, JME_RXDBA_LO, 0x00000000); | |
285 | jwrite32(jme, JME_RXDBA_HI, 0x00000000); | |
286 | jwrite32(jme, JME_RXQDC, 0x00000000); | |
287 | jwrite32(jme, JME_RXNDA, 0x00000000); | |
288 | jwrite32(jme, JME_TXDBA_LO, 0x00000000); | |
289 | jwrite32(jme, JME_TXDBA_HI, 0x00000000); | |
290 | jwrite32(jme, JME_TXQDC, 0x00000000); | |
291 | jwrite32(jme, JME_TXNDA, 0x00000000); | |
292 | ||
4330c2f2 GFT |
293 | jwrite32(jme, JME_RXMCHT_LO, 0x00000000); |
294 | jwrite32(jme, JME_RXMCHT_HI, 0x00000000); | |
cd0ff491 | 295 | for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i) |
b3821cc5 | 296 | jme_setup_wakeup_frame(jme, mask, crc, i); |
cd0ff491 | 297 | if (jme->fpgaver) |
cdcdc9eb GFT |
298 | gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL; |
299 | else | |
300 | gpreg0 = GPREG0_DEFAULT; | |
301 | jwrite32(jme, JME_GPREG0, gpreg0); | |
4330c2f2 | 302 | jwrite32(jme, JME_GPREG1, 0); |
d7699f87 GFT |
303 | } |
304 | ||
cd0ff491 GFT |
305 | static inline void |
306 | jme_reset_ghc_speed(struct jme_adapter *jme) | |
307 | { | |
308 | jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX); | |
309 | jwrite32(jme, JME_GHC, jme->reg_ghc); | |
310 | } | |
311 | ||
312 | static inline void | |
3bf61c55 | 313 | jme_clear_pm(struct jme_adapter *jme) |
d7699f87 | 314 | { |
29bdd921 | 315 | jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs); |
4330c2f2 | 316 | pci_set_power_state(jme->pdev, PCI_D0); |
42b1055e | 317 | pci_enable_wake(jme->pdev, PCI_D0, false); |
d7699f87 GFT |
318 | } |
319 | ||
3bf61c55 GFT |
320 | static int |
321 | jme_reload_eeprom(struct jme_adapter *jme) | |
d7699f87 | 322 | { |
cd0ff491 | 323 | u32 val; |
d7699f87 GFT |
324 | int i; |
325 | ||
326 | val = jread32(jme, JME_SMBCSR); | |
327 | ||
cd0ff491 | 328 | if (val & SMBCSR_EEPROMD) { |
d7699f87 GFT |
329 | val |= SMBCSR_CNACK; |
330 | jwrite32(jme, JME_SMBCSR, val); | |
331 | val |= SMBCSR_RELOAD; | |
332 | jwrite32(jme, JME_SMBCSR, val); | |
333 | mdelay(12); | |
334 | ||
cd0ff491 | 335 | for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) { |
d7699f87 GFT |
336 | mdelay(1); |
337 | if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0) | |
338 | break; | |
339 | } | |
340 | ||
cd0ff491 GFT |
341 | if (i == 0) { |
342 | jeprintk(jme->pdev, "eeprom reload timeout\n"); | |
d7699f87 GFT |
343 | return -EIO; |
344 | } | |
345 | } | |
3bf61c55 | 346 | |
d7699f87 GFT |
347 | return 0; |
348 | } | |
349 | ||
3bf61c55 GFT |
350 | static void |
351 | jme_load_macaddr(struct net_device *netdev) | |
d7699f87 GFT |
352 | { |
353 | struct jme_adapter *jme = netdev_priv(netdev); | |
354 | unsigned char macaddr[6]; | |
cd0ff491 | 355 | u32 val; |
d7699f87 | 356 | |
cd0ff491 | 357 | spin_lock_bh(&jme->macaddr_lock); |
4330c2f2 | 358 | val = jread32(jme, JME_RXUMA_LO); |
d7699f87 GFT |
359 | macaddr[0] = (val >> 0) & 0xFF; |
360 | macaddr[1] = (val >> 8) & 0xFF; | |
361 | macaddr[2] = (val >> 16) & 0xFF; | |
362 | macaddr[3] = (val >> 24) & 0xFF; | |
4330c2f2 | 363 | val = jread32(jme, JME_RXUMA_HI); |
d7699f87 GFT |
364 | macaddr[4] = (val >> 0) & 0xFF; |
365 | macaddr[5] = (val >> 8) & 0xFF; | |
cd0ff491 GFT |
366 | memcpy(netdev->dev_addr, macaddr, 6); |
367 | spin_unlock_bh(&jme->macaddr_lock); | |
3bf61c55 GFT |
368 | } |
369 | ||
cd0ff491 | 370 | static inline void |
3bf61c55 GFT |
371 | jme_set_rx_pcc(struct jme_adapter *jme, int p) |
372 | { | |
cd0ff491 | 373 | switch (p) { |
192570e0 GFT |
374 | case PCC_OFF: |
375 | jwrite32(jme, JME_PCCRX0, | |
376 | ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
377 | ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
378 | break; | |
3bf61c55 GFT |
379 | case PCC_P1: |
380 | jwrite32(jme, JME_PCCRX0, | |
381 | ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
382 | ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
383 | break; | |
384 | case PCC_P2: | |
385 | jwrite32(jme, JME_PCCRX0, | |
386 | ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
387 | ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
388 | break; | |
389 | case PCC_P3: | |
390 | jwrite32(jme, JME_PCCRX0, | |
391 | ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
392 | ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
393 | break; | |
394 | default: | |
395 | break; | |
396 | } | |
192570e0 | 397 | wmb(); |
3bf61c55 | 398 | |
cd0ff491 GFT |
399 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
400 | msg_rx_status(jme, "Switched to PCC_P%d\n", p); | |
d7699f87 GFT |
401 | } |
402 | ||
fcf45b4c | 403 | static void |
3bf61c55 | 404 | jme_start_irq(struct jme_adapter *jme) |
d7699f87 | 405 | { |
3bf61c55 GFT |
406 | register struct dynpcc_info *dpi = &(jme->dpi); |
407 | ||
408 | jme_set_rx_pcc(jme, PCC_P1); | |
3bf61c55 GFT |
409 | dpi->cur = PCC_P1; |
410 | dpi->attempt = PCC_P1; | |
411 | dpi->cnt = 0; | |
412 | ||
413 | jwrite32(jme, JME_PCCTX, | |
8c198884 GFT |
414 | ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) | |
415 | ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) | | |
3bf61c55 GFT |
416 | PCCTXQ0_EN |
417 | ); | |
418 | ||
d7699f87 GFT |
419 | /* |
420 | * Enable Interrupts | |
421 | */ | |
422 | jwrite32(jme, JME_IENS, INTR_ENABLE); | |
423 | } | |
424 | ||
cd0ff491 | 425 | static inline void |
3bf61c55 | 426 | jme_stop_irq(struct jme_adapter *jme) |
d7699f87 GFT |
427 | { |
428 | /* | |
429 | * Disable Interrupts | |
430 | */ | |
cd0ff491 | 431 | jwrite32f(jme, JME_IENC, INTR_ENABLE); |
d7699f87 GFT |
432 | } |
433 | ||
cd0ff491 | 434 | static inline void |
3bf61c55 | 435 | jme_enable_shadow(struct jme_adapter *jme) |
4330c2f2 GFT |
436 | { |
437 | jwrite32(jme, | |
438 | JME_SHBA_LO, | |
cd0ff491 | 439 | ((u32)jme->shadow_dma & ~((u32)0x1F)) | SHBA_POSTEN); |
4330c2f2 GFT |
440 | } |
441 | ||
cd0ff491 | 442 | static inline void |
3bf61c55 | 443 | jme_disable_shadow(struct jme_adapter *jme) |
4330c2f2 GFT |
444 | { |
445 | jwrite32(jme, JME_SHBA_LO, 0x0); | |
446 | } | |
447 | ||
cd0ff491 | 448 | static u32 |
cdcdc9eb GFT |
449 | jme_linkstat_from_phy(struct jme_adapter *jme) |
450 | { | |
cd0ff491 | 451 | u32 phylink, bmsr; |
cdcdc9eb GFT |
452 | |
453 | phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17); | |
454 | bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR); | |
cd0ff491 | 455 | if (bmsr & BMSR_ANCOMP) |
cdcdc9eb GFT |
456 | phylink |= PHY_LINK_AUTONEG_COMPLETE; |
457 | ||
458 | return phylink; | |
459 | } | |
460 | ||
cd0ff491 GFT |
461 | static inline void |
462 | jme_set_gmii(struct jme_adapter *jme) | |
463 | { | |
464 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); | |
465 | } | |
466 | ||
467 | static inline void | |
468 | jme_set_rgmii(struct jme_adapter *jme) | |
469 | { | |
470 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); | |
471 | } | |
472 | ||
fcf45b4c GFT |
473 | static int |
474 | jme_check_link(struct net_device *netdev, int testonly) | |
d7699f87 GFT |
475 | { |
476 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 477 | u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr; |
79ce639c | 478 | char linkmsg[64]; |
fcf45b4c | 479 | int rc = 0; |
d7699f87 | 480 | |
b3821cc5 | 481 | linkmsg[0] = '\0'; |
cdcdc9eb | 482 | |
cd0ff491 | 483 | if (jme->fpgaver) |
cdcdc9eb GFT |
484 | phylink = jme_linkstat_from_phy(jme); |
485 | else | |
486 | phylink = jread32(jme, JME_PHY_LINK); | |
d7699f87 | 487 | |
cd0ff491 GFT |
488 | if (phylink & PHY_LINK_UP) { |
489 | if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { | |
8c198884 GFT |
490 | /* |
491 | * If we did not enable AN | |
492 | * Speed/Duplex Info should be obtained from SMI | |
493 | */ | |
494 | phylink = PHY_LINK_UP; | |
495 | ||
496 | bmcr = jme_mdio_read(jme->dev, | |
497 | jme->mii_if.phy_id, | |
498 | MII_BMCR); | |
499 | ||
500 | phylink |= ((bmcr & BMCR_SPEED1000) && | |
501 | (bmcr & BMCR_SPEED100) == 0) ? | |
502 | PHY_LINK_SPEED_1000M : | |
503 | (bmcr & BMCR_SPEED100) ? | |
504 | PHY_LINK_SPEED_100M : | |
505 | PHY_LINK_SPEED_10M; | |
506 | ||
507 | phylink |= (bmcr & BMCR_FULLDPLX) ? | |
508 | PHY_LINK_DUPLEX : 0; | |
79ce639c | 509 | |
b3821cc5 | 510 | strcat(linkmsg, "Forced: "); |
cd0ff491 | 511 | } else { |
8c198884 GFT |
512 | /* |
513 | * Keep polling for speed/duplex resolve complete | |
514 | */ | |
cd0ff491 | 515 | while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && |
8c198884 GFT |
516 | --cnt) { |
517 | ||
518 | udelay(1); | |
8c198884 | 519 | |
cd0ff491 | 520 | if (jme->fpgaver) |
cdcdc9eb GFT |
521 | phylink = jme_linkstat_from_phy(jme); |
522 | else | |
523 | phylink = jread32(jme, JME_PHY_LINK); | |
8c198884 | 524 | } |
cd0ff491 GFT |
525 | if (!cnt) |
526 | jeprintk(jme->pdev, | |
8c198884 | 527 | "Waiting speed resolve timeout.\n"); |
79ce639c | 528 | |
b3821cc5 | 529 | strcat(linkmsg, "ANed: "); |
d7699f87 GFT |
530 | } |
531 | ||
cd0ff491 | 532 | if (jme->phylink == phylink) { |
fcf45b4c GFT |
533 | rc = 1; |
534 | goto out; | |
535 | } | |
cd0ff491 | 536 | if (testonly) |
fcf45b4c GFT |
537 | goto out; |
538 | ||
539 | jme->phylink = phylink; | |
540 | ||
cdcdc9eb GFT |
541 | ghc = jme->reg_ghc & ~(GHC_SPEED_10M | |
542 | GHC_SPEED_100M | | |
543 | GHC_SPEED_1000M | | |
544 | GHC_DPX); | |
cd0ff491 GFT |
545 | switch (phylink & PHY_LINK_SPEED_MASK) { |
546 | case PHY_LINK_SPEED_10M: | |
547 | ghc |= GHC_SPEED_10M; | |
548 | strcat(linkmsg, "10 Mbps, "); | |
549 | if (jme->rev == 0x11) | |
550 | jme_set_gmii(jme); | |
551 | break; | |
552 | case PHY_LINK_SPEED_100M: | |
553 | ghc |= GHC_SPEED_100M; | |
554 | strcat(linkmsg, "100 Mbps, "); | |
555 | if (jme->rev == 0x11) | |
556 | jme_set_rgmii(jme); | |
557 | break; | |
558 | case PHY_LINK_SPEED_1000M: | |
559 | ghc |= GHC_SPEED_1000M; | |
560 | strcat(linkmsg, "1000 Mbps, "); | |
561 | if (jme->rev == 0x11) | |
562 | jme_set_gmii(jme); | |
563 | break; | |
564 | default: | |
565 | break; | |
d7699f87 | 566 | } |
cd0ff491 | 567 | ghc |= (phylink & PHY_LINK_DUPLEX) ? GHC_DPX : 0; |
fcf45b4c | 568 | |
cd0ff491 | 569 | strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? |
fcf45b4c GFT |
570 | "Full-Duplex, " : |
571 | "Half-Duplex, "); | |
572 | ||
cd0ff491 | 573 | if (phylink & PHY_LINK_MDI_STAT) |
fcf45b4c | 574 | strcat(linkmsg, "MDI-X"); |
8c198884 GFT |
575 | else |
576 | strcat(linkmsg, "MDI"); | |
d7699f87 | 577 | |
cd0ff491 | 578 | if (phylink & PHY_LINK_DUPLEX) { |
d7699f87 | 579 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); |
cd0ff491 | 580 | } else { |
d7699f87 | 581 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | |
3bf61c55 GFT |
582 | TXMCS_BACKOFF | |
583 | TXMCS_CARRIERSENSE | | |
584 | TXMCS_COLLISION); | |
8c198884 GFT |
585 | jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN | |
586 | ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) | | |
587 | TXTRHD_TXREN | | |
588 | ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL)); | |
589 | } | |
d7699f87 | 590 | |
fcf45b4c GFT |
591 | jme->reg_ghc = ghc; |
592 | jwrite32(jme, JME_GHC, ghc); | |
593 | ||
cd0ff491 GFT |
594 | msg_link(jme, "Link is up at %s.\n", linkmsg); |
595 | netif_carrier_on(netdev); | |
596 | } else { | |
597 | if (testonly) | |
fcf45b4c GFT |
598 | goto out; |
599 | ||
cd0ff491 | 600 | msg_link(jme, "Link is down.\n"); |
fcf45b4c | 601 | jme->phylink = 0; |
cd0ff491 | 602 | netif_carrier_off(netdev); |
d7699f87 | 603 | } |
fcf45b4c GFT |
604 | |
605 | out: | |
606 | return rc; | |
d7699f87 GFT |
607 | } |
608 | ||
3bf61c55 GFT |
609 | static int |
610 | jme_setup_tx_resources(struct jme_adapter *jme) | |
d7699f87 | 611 | { |
d7699f87 GFT |
612 | struct jme_ring *txring = &(jme->txring[0]); |
613 | ||
614 | txring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
615 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
616 | &(txring->dmaalloc), | |
617 | GFP_ATOMIC); | |
fcf45b4c | 618 | |
cd0ff491 | 619 | if (!txring->alloc) { |
4330c2f2 GFT |
620 | txring->desc = NULL; |
621 | txring->dmaalloc = 0; | |
622 | txring->dma = 0; | |
d7699f87 | 623 | return -ENOMEM; |
4330c2f2 | 624 | } |
d7699f87 GFT |
625 | |
626 | /* | |
627 | * 16 Bytes align | |
628 | */ | |
cd0ff491 | 629 | txring->desc = (void *)ALIGN((unsigned long)(txring->alloc), |
3bf61c55 | 630 | RING_DESC_ALIGN); |
4330c2f2 | 631 | txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 632 | txring->next_to_use = 0; |
cdcdc9eb | 633 | atomic_set(&txring->next_to_clean, 0); |
b3821cc5 | 634 | atomic_set(&txring->nr_free, jme->tx_ring_size); |
d7699f87 GFT |
635 | |
636 | /* | |
b3821cc5 | 637 | * Initialize Transmit Descriptors |
d7699f87 | 638 | */ |
b3821cc5 | 639 | memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size)); |
3bf61c55 | 640 | memset(txring->bufinf, 0, |
b3821cc5 | 641 | sizeof(struct jme_buffer_info) * jme->tx_ring_size); |
d7699f87 GFT |
642 | |
643 | return 0; | |
644 | } | |
645 | ||
3bf61c55 GFT |
646 | static void |
647 | jme_free_tx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
648 | { |
649 | int i; | |
650 | struct jme_ring *txring = &(jme->txring[0]); | |
4330c2f2 | 651 | struct jme_buffer_info *txbi = txring->bufinf; |
d7699f87 | 652 | |
cd0ff491 GFT |
653 | if (txring->alloc) { |
654 | for (i = 0 ; i < jme->tx_ring_size ; ++i) { | |
4330c2f2 | 655 | txbi = txring->bufinf + i; |
cd0ff491 | 656 | if (txbi->skb) { |
4330c2f2 GFT |
657 | dev_kfree_skb(txbi->skb); |
658 | txbi->skb = NULL; | |
d7699f87 | 659 | } |
47220951 GFT |
660 | txbi->mapping = 0; |
661 | txbi->len = 0; | |
662 | txbi->nr_desc = 0; | |
663 | txbi->start_xmit = 0; | |
d7699f87 GFT |
664 | } |
665 | ||
666 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 667 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), |
d7699f87 GFT |
668 | txring->alloc, |
669 | txring->dmaalloc); | |
3bf61c55 GFT |
670 | |
671 | txring->alloc = NULL; | |
672 | txring->desc = NULL; | |
673 | txring->dmaalloc = 0; | |
674 | txring->dma = 0; | |
d7699f87 | 675 | } |
3bf61c55 | 676 | txring->next_to_use = 0; |
cdcdc9eb | 677 | atomic_set(&txring->next_to_clean, 0); |
79ce639c | 678 | atomic_set(&txring->nr_free, 0); |
d7699f87 GFT |
679 | |
680 | } | |
681 | ||
cd0ff491 | 682 | static inline void |
3bf61c55 | 683 | jme_enable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
684 | { |
685 | /* | |
686 | * Select Queue 0 | |
687 | */ | |
688 | jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0); | |
cd0ff491 | 689 | wmb(); |
d7699f87 GFT |
690 | |
691 | /* | |
692 | * Setup TX Queue 0 DMA Bass Address | |
693 | */ | |
fcf45b4c | 694 | jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
3bf61c55 | 695 | jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32); |
fcf45b4c | 696 | jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); |
d7699f87 GFT |
697 | |
698 | /* | |
699 | * Setup TX Descptor Count | |
700 | */ | |
b3821cc5 | 701 | jwrite32(jme, JME_TXQDC, jme->tx_ring_size); |
d7699f87 GFT |
702 | |
703 | /* | |
704 | * Enable TX Engine | |
705 | */ | |
706 | wmb(); | |
4330c2f2 GFT |
707 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
708 | TXCS_SELECT_QUEUE0 | | |
709 | TXCS_ENABLE); | |
d7699f87 GFT |
710 | |
711 | } | |
712 | ||
cd0ff491 | 713 | static inline void |
29bdd921 GFT |
714 | jme_restart_tx_engine(struct jme_adapter *jme) |
715 | { | |
716 | /* | |
717 | * Restart TX Engine | |
718 | */ | |
719 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | |
720 | TXCS_SELECT_QUEUE0 | | |
721 | TXCS_ENABLE); | |
722 | } | |
723 | ||
cd0ff491 | 724 | static inline void |
3bf61c55 | 725 | jme_disable_tx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
726 | { |
727 | int i; | |
cd0ff491 | 728 | u32 val; |
d7699f87 GFT |
729 | |
730 | /* | |
731 | * Disable TX Engine | |
732 | */ | |
fcf45b4c | 733 | jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0); |
cd0ff491 | 734 | wmb(); |
d7699f87 GFT |
735 | |
736 | val = jread32(jme, JME_TXCS); | |
cd0ff491 | 737 | for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) { |
fcf45b4c | 738 | mdelay(1); |
d7699f87 | 739 | val = jread32(jme, JME_TXCS); |
cd0ff491 | 740 | rmb(); |
d7699f87 GFT |
741 | } |
742 | ||
cd0ff491 GFT |
743 | if (!i) |
744 | jeprintk(jme->pdev, "Disable TX engine timeout.\n"); | |
d7699f87 GFT |
745 | } |
746 | ||
3bf61c55 GFT |
747 | static void |
748 | jme_set_clean_rxdesc(struct jme_adapter *jme, int i) | |
d7699f87 GFT |
749 | { |
750 | struct jme_ring *rxring = jme->rxring; | |
cd0ff491 | 751 | register struct rxdesc *rxdesc = rxring->desc; |
4330c2f2 GFT |
752 | struct jme_buffer_info *rxbi = rxring->bufinf; |
753 | rxdesc += i; | |
754 | rxbi += i; | |
755 | ||
756 | rxdesc->dw[0] = 0; | |
757 | rxdesc->dw[1] = 0; | |
3bf61c55 | 758 | rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32); |
fcf45b4c GFT |
759 | rxdesc->desc1.bufaddrl = cpu_to_le32( |
760 | (__u64)rxbi->mapping & 0xFFFFFFFFUL); | |
3bf61c55 | 761 | rxdesc->desc1.datalen = cpu_to_le16(rxbi->len); |
cd0ff491 | 762 | if (jme->dev->features & NETIF_F_HIGHDMA) |
3bf61c55 | 763 | rxdesc->desc1.flags = RXFLAG_64BIT; |
d7699f87 | 764 | wmb(); |
3bf61c55 | 765 | rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT; |
d7699f87 GFT |
766 | } |
767 | ||
3bf61c55 GFT |
768 | static int |
769 | jme_make_new_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
770 | { |
771 | struct jme_ring *rxring = &(jme->rxring[0]); | |
b3821cc5 | 772 | struct jme_buffer_info *rxbi = rxring->bufinf + i; |
cd0ff491 | 773 | struct sk_buff *skb; |
4330c2f2 | 774 | |
79ce639c GFT |
775 | skb = netdev_alloc_skb(jme->dev, |
776 | jme->dev->mtu + RX_EXTRA_LEN); | |
cd0ff491 | 777 | if (unlikely(!skb)) |
4330c2f2 | 778 | return -ENOMEM; |
3bf61c55 | 779 | |
4330c2f2 | 780 | rxbi->skb = skb; |
3bf61c55 | 781 | rxbi->len = skb_tailroom(skb); |
b3821cc5 GFT |
782 | rxbi->mapping = pci_map_page(jme->pdev, |
783 | virt_to_page(skb->data), | |
784 | offset_in_page(skb->data), | |
785 | rxbi->len, | |
786 | PCI_DMA_FROMDEVICE); | |
4330c2f2 GFT |
787 | |
788 | return 0; | |
789 | } | |
790 | ||
3bf61c55 GFT |
791 | static void |
792 | jme_free_rx_buf(struct jme_adapter *jme, int i) | |
4330c2f2 GFT |
793 | { |
794 | struct jme_ring *rxring = &(jme->rxring[0]); | |
795 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
796 | rxbi += i; | |
797 | ||
cd0ff491 | 798 | if (rxbi->skb) { |
b3821cc5 | 799 | pci_unmap_page(jme->pdev, |
4330c2f2 | 800 | rxbi->mapping, |
3bf61c55 | 801 | rxbi->len, |
4330c2f2 GFT |
802 | PCI_DMA_FROMDEVICE); |
803 | dev_kfree_skb(rxbi->skb); | |
804 | rxbi->skb = NULL; | |
805 | rxbi->mapping = 0; | |
3bf61c55 | 806 | rxbi->len = 0; |
4330c2f2 GFT |
807 | } |
808 | } | |
809 | ||
3bf61c55 GFT |
810 | static void |
811 | jme_free_rx_resources(struct jme_adapter *jme) | |
812 | { | |
813 | int i; | |
814 | struct jme_ring *rxring = &(jme->rxring[0]); | |
815 | ||
cd0ff491 GFT |
816 | if (rxring->alloc) { |
817 | for (i = 0 ; i < jme->rx_ring_size ; ++i) | |
3bf61c55 GFT |
818 | jme_free_rx_buf(jme, i); |
819 | ||
820 | dma_free_coherent(&(jme->pdev->dev), | |
b3821cc5 | 821 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
3bf61c55 GFT |
822 | rxring->alloc, |
823 | rxring->dmaalloc); | |
824 | rxring->alloc = NULL; | |
825 | rxring->desc = NULL; | |
826 | rxring->dmaalloc = 0; | |
827 | rxring->dma = 0; | |
828 | } | |
829 | rxring->next_to_use = 0; | |
cdcdc9eb | 830 | atomic_set(&rxring->next_to_clean, 0); |
3bf61c55 GFT |
831 | } |
832 | ||
833 | static int | |
834 | jme_setup_rx_resources(struct jme_adapter *jme) | |
d7699f87 GFT |
835 | { |
836 | int i; | |
837 | struct jme_ring *rxring = &(jme->rxring[0]); | |
838 | ||
839 | rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
b3821cc5 GFT |
840 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), |
841 | &(rxring->dmaalloc), | |
842 | GFP_ATOMIC); | |
cd0ff491 | 843 | if (!rxring->alloc) { |
4330c2f2 GFT |
844 | rxring->desc = NULL; |
845 | rxring->dmaalloc = 0; | |
846 | rxring->dma = 0; | |
d7699f87 | 847 | return -ENOMEM; |
4330c2f2 | 848 | } |
d7699f87 GFT |
849 | |
850 | /* | |
851 | * 16 Bytes align | |
852 | */ | |
cd0ff491 | 853 | rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc), |
3bf61c55 | 854 | RING_DESC_ALIGN); |
4330c2f2 | 855 | rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN); |
d7699f87 | 856 | rxring->next_to_use = 0; |
cdcdc9eb | 857 | atomic_set(&rxring->next_to_clean, 0); |
d7699f87 | 858 | |
d7699f87 GFT |
859 | /* |
860 | * Initiallize Receive Descriptors | |
861 | */ | |
cd0ff491 GFT |
862 | for (i = 0 ; i < jme->rx_ring_size ; ++i) { |
863 | if (unlikely(jme_make_new_rx_buf(jme, i))) { | |
3bf61c55 GFT |
864 | jme_free_rx_resources(jme); |
865 | return -ENOMEM; | |
866 | } | |
d7699f87 GFT |
867 | |
868 | jme_set_clean_rxdesc(jme, i); | |
869 | } | |
870 | ||
d7699f87 GFT |
871 | return 0; |
872 | } | |
873 | ||
cd0ff491 | 874 | static inline void |
3bf61c55 | 875 | jme_enable_rx_engine(struct jme_adapter *jme) |
d7699f87 | 876 | { |
cd0ff491 GFT |
877 | /* |
878 | * Select Queue 0 | |
879 | */ | |
880 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | | |
881 | RXCS_QUEUESEL_Q0); | |
882 | wmb(); | |
883 | ||
d7699f87 GFT |
884 | /* |
885 | * Setup RX DMA Bass Address | |
886 | */ | |
fcf45b4c | 887 | jwrite32(jme, JME_RXDBA_LO, (__u64)jme->rxring[0].dma & 0xFFFFFFFFUL); |
3bf61c55 | 888 | jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32); |
fcf45b4c | 889 | jwrite32(jme, JME_RXNDA, (__u64)jme->rxring[0].dma & 0xFFFFFFFFUL); |
d7699f87 GFT |
890 | |
891 | /* | |
b3821cc5 | 892 | * Setup RX Descriptor Count |
d7699f87 | 893 | */ |
b3821cc5 | 894 | jwrite32(jme, JME_RXQDC, jme->rx_ring_size); |
d7699f87 | 895 | |
3bf61c55 | 896 | /* |
d7699f87 GFT |
897 | * Setup Unicast Filter |
898 | */ | |
899 | jme_set_multi(jme->dev); | |
900 | ||
901 | /* | |
902 | * Enable RX Engine | |
903 | */ | |
904 | wmb(); | |
79ce639c | 905 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
906 | RXCS_QUEUESEL_Q0 | |
907 | RXCS_ENABLE | | |
908 | RXCS_QST); | |
d7699f87 GFT |
909 | } |
910 | ||
cd0ff491 | 911 | static inline void |
3bf61c55 | 912 | jme_restart_rx_engine(struct jme_adapter *jme) |
4330c2f2 GFT |
913 | { |
914 | /* | |
3bf61c55 | 915 | * Start RX Engine |
4330c2f2 | 916 | */ |
79ce639c | 917 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | |
4330c2f2 GFT |
918 | RXCS_QUEUESEL_Q0 | |
919 | RXCS_ENABLE | | |
920 | RXCS_QST); | |
921 | } | |
922 | ||
cd0ff491 | 923 | static inline void |
3bf61c55 | 924 | jme_disable_rx_engine(struct jme_adapter *jme) |
d7699f87 GFT |
925 | { |
926 | int i; | |
cd0ff491 | 927 | u32 val; |
d7699f87 GFT |
928 | |
929 | /* | |
930 | * Disable RX Engine | |
931 | */ | |
29bdd921 | 932 | jwrite32(jme, JME_RXCS, jme->reg_rxcs); |
cd0ff491 | 933 | wmb(); |
d7699f87 GFT |
934 | |
935 | val = jread32(jme, JME_RXCS); | |
cd0ff491 | 936 | for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) { |
29bdd921 | 937 | mdelay(1); |
d7699f87 | 938 | val = jread32(jme, JME_RXCS); |
cd0ff491 | 939 | rmb(); |
d7699f87 GFT |
940 | } |
941 | ||
cd0ff491 GFT |
942 | if (!i) |
943 | jeprintk(jme->pdev, "Disable RX engine timeout.\n"); | |
d7699f87 GFT |
944 | |
945 | } | |
946 | ||
192570e0 | 947 | static int |
cd0ff491 | 948 | jme_rxsum_ok(struct jme_adapter *jme, u16 flags) |
192570e0 | 949 | { |
cd0ff491 | 950 | if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) |
192570e0 GFT |
951 | return false; |
952 | ||
cd0ff491 GFT |
953 | if (unlikely(!(flags & RXWBFLAG_MF) && |
954 | (flags & RXWBFLAG_TCPON) && !(flags & RXWBFLAG_TCPCS))) { | |
955 | msg_rx_err(jme, "TCP Checksum error.\n"); | |
cdcdc9eb | 956 | goto out_sumerr; |
192570e0 GFT |
957 | } |
958 | ||
cd0ff491 GFT |
959 | if (unlikely(!(flags & RXWBFLAG_MF) && |
960 | (flags & RXWBFLAG_UDPON) && !(flags & RXWBFLAG_UDPCS))) { | |
961 | msg_rx_err(jme, "UDP Checksum error.\n"); | |
cdcdc9eb | 962 | goto out_sumerr; |
192570e0 GFT |
963 | } |
964 | ||
cd0ff491 GFT |
965 | if (unlikely((flags & RXWBFLAG_IPV4) && !(flags & RXWBFLAG_IPCS))) { |
966 | msg_rx_err(jme, "IPv4 Checksum error.\n"); | |
cdcdc9eb | 967 | goto out_sumerr; |
192570e0 GFT |
968 | } |
969 | ||
970 | return true; | |
cdcdc9eb GFT |
971 | |
972 | out_sumerr: | |
cdcdc9eb | 973 | return false; |
192570e0 GFT |
974 | } |
975 | ||
3bf61c55 | 976 | static void |
42b1055e | 977 | jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) |
d7699f87 | 978 | { |
d7699f87 | 979 | struct jme_ring *rxring = &(jme->rxring[0]); |
cd0ff491 | 980 | struct rxdesc *rxdesc = rxring->desc; |
3bf61c55 | 981 | struct jme_buffer_info *rxbi = rxring->bufinf; |
d7699f87 | 982 | struct sk_buff *skb; |
3bf61c55 | 983 | int framesize; |
d7699f87 | 984 | |
3bf61c55 GFT |
985 | rxdesc += idx; |
986 | rxbi += idx; | |
d7699f87 | 987 | |
3bf61c55 GFT |
988 | skb = rxbi->skb; |
989 | pci_dma_sync_single_for_cpu(jme->pdev, | |
990 | rxbi->mapping, | |
991 | rxbi->len, | |
992 | PCI_DMA_FROMDEVICE); | |
993 | ||
cd0ff491 | 994 | if (unlikely(jme_make_new_rx_buf(jme, idx))) { |
3bf61c55 GFT |
995 | pci_dma_sync_single_for_device(jme->pdev, |
996 | rxbi->mapping, | |
997 | rxbi->len, | |
998 | PCI_DMA_FROMDEVICE); | |
999 | ||
1000 | ++(NET_STAT(jme).rx_dropped); | |
cd0ff491 | 1001 | } else { |
3bf61c55 GFT |
1002 | framesize = le16_to_cpu(rxdesc->descwb.framesize) |
1003 | - RX_PREPAD_SIZE; | |
1004 | ||
1005 | skb_reserve(skb, RX_PREPAD_SIZE); | |
1006 | skb_put(skb, framesize); | |
1007 | skb->protocol = eth_type_trans(skb, jme->dev); | |
1008 | ||
cd0ff491 | 1009 | if (jme_rxsum_ok(jme, rxdesc->descwb.flags)) |
8c198884 | 1010 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
29bdd921 GFT |
1011 | else |
1012 | skb->ip_summed = CHECKSUM_NONE; | |
8c198884 | 1013 | |
cd0ff491 GFT |
1014 | if (rxdesc->descwb.flags & RXWBFLAG_TAGON) { |
1015 | if (jme->vlgrp) { | |
cdcdc9eb | 1016 | jme->jme_vlan_rx(skb, jme->vlgrp, |
42b1055e | 1017 | le32_to_cpu(rxdesc->descwb.vlan)); |
b3821cc5 GFT |
1018 | NET_STAT(jme).rx_bytes += 4; |
1019 | } | |
cd0ff491 | 1020 | } else { |
cdcdc9eb | 1021 | jme->jme_rx(skb); |
b3821cc5 | 1022 | } |
3bf61c55 | 1023 | |
cd0ff491 | 1024 | if ((le16_to_cpu(rxdesc->descwb.flags) & RXWBFLAG_DEST) == |
b3821cc5 | 1025 | RXWBFLAG_DEST_MUL) |
3bf61c55 GFT |
1026 | ++(NET_STAT(jme).multicast); |
1027 | ||
1028 | jme->dev->last_rx = jiffies; | |
1029 | NET_STAT(jme).rx_bytes += framesize; | |
1030 | ++(NET_STAT(jme).rx_packets); | |
1031 | } | |
1032 | ||
1033 | jme_set_clean_rxdesc(jme, idx); | |
1034 | ||
1035 | } | |
1036 | ||
1037 | static int | |
1038 | jme_process_receive(struct jme_adapter *jme, int limit) | |
1039 | { | |
1040 | struct jme_ring *rxring = &(jme->rxring[0]); | |
cd0ff491 | 1041 | struct rxdesc *rxdesc = rxring->desc; |
b3821cc5 | 1042 | int i, j, ccnt, desccnt, mask = jme->rx_ring_mask; |
3bf61c55 | 1043 | |
cd0ff491 | 1044 | if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) |
192570e0 GFT |
1045 | goto out_inc; |
1046 | ||
cd0ff491 | 1047 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
192570e0 GFT |
1048 | goto out_inc; |
1049 | ||
cd0ff491 | 1050 | if (unlikely(!netif_carrier_ok(jme->dev))) |
192570e0 GFT |
1051 | goto out_inc; |
1052 | ||
cdcdc9eb | 1053 | i = atomic_read(&rxring->next_to_clean); |
cd0ff491 | 1054 | while (limit-- > 0) { |
3bf61c55 GFT |
1055 | rxdesc = rxring->desc; |
1056 | rxdesc += i; | |
1057 | ||
cd0ff491 | 1058 | if ((rxdesc->descwb.flags & RXWBFLAG_OWN) || |
3bf61c55 GFT |
1059 | !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL)) |
1060 | goto out; | |
d7699f87 | 1061 | |
4330c2f2 GFT |
1062 | desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; |
1063 | ||
cd0ff491 | 1064 | if (unlikely(desccnt > 1 || |
192570e0 | 1065 | rxdesc->descwb.errstat & RXWBERR_ALLERR)) { |
d7699f87 | 1066 | |
cd0ff491 | 1067 | if (rxdesc->descwb.errstat & RXWBERR_CRCERR) |
3bf61c55 | 1068 | ++(NET_STAT(jme).rx_crc_errors); |
cd0ff491 | 1069 | else if (rxdesc->descwb.errstat & RXWBERR_OVERUN) |
3bf61c55 GFT |
1070 | ++(NET_STAT(jme).rx_fifo_errors); |
1071 | else | |
1072 | ++(NET_STAT(jme).rx_errors); | |
4330c2f2 | 1073 | |
cd0ff491 | 1074 | if (desccnt > 1) |
3bf61c55 | 1075 | limit -= desccnt - 1; |
4330c2f2 | 1076 | |
cd0ff491 | 1077 | for (j = i, ccnt = desccnt ; ccnt-- ; ) { |
4330c2f2 | 1078 | jme_set_clean_rxdesc(jme, j); |
b3821cc5 | 1079 | j = (j + 1) & (mask); |
4330c2f2 | 1080 | } |
3bf61c55 | 1081 | |
cd0ff491 | 1082 | } else { |
42b1055e | 1083 | jme_alloc_and_feed_skb(jme, i); |
3bf61c55 | 1084 | } |
4330c2f2 | 1085 | |
b3821cc5 | 1086 | i = (i + desccnt) & (mask); |
3bf61c55 | 1087 | } |
4330c2f2 | 1088 | |
3bf61c55 | 1089 | out: |
cdcdc9eb | 1090 | atomic_set(&rxring->next_to_clean, i); |
4330c2f2 | 1091 | |
192570e0 GFT |
1092 | out_inc: |
1093 | atomic_inc(&jme->rx_cleaning); | |
1094 | ||
3bf61c55 | 1095 | return limit > 0 ? limit : 0; |
4330c2f2 | 1096 | |
3bf61c55 | 1097 | } |
d7699f87 | 1098 | |
79ce639c GFT |
1099 | static void |
1100 | jme_attempt_pcc(struct dynpcc_info *dpi, int atmp) | |
1101 | { | |
cd0ff491 | 1102 | if (likely(atmp == dpi->cur)) { |
192570e0 | 1103 | dpi->cnt = 0; |
79ce639c | 1104 | return; |
192570e0 | 1105 | } |
79ce639c | 1106 | |
cd0ff491 | 1107 | if (dpi->attempt == atmp) { |
79ce639c | 1108 | ++(dpi->cnt); |
cd0ff491 | 1109 | } else { |
79ce639c GFT |
1110 | dpi->attempt = atmp; |
1111 | dpi->cnt = 0; | |
1112 | } | |
1113 | ||
1114 | } | |
1115 | ||
1116 | static void | |
1117 | jme_dynamic_pcc(struct jme_adapter *jme) | |
1118 | { | |
1119 | register struct dynpcc_info *dpi = &(jme->dpi); | |
1120 | ||
cd0ff491 | 1121 | if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) |
79ce639c | 1122 | jme_attempt_pcc(dpi, PCC_P3); |
cd0ff491 | 1123 | else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD |
79ce639c GFT |
1124 | || dpi->intr_cnt > PCC_INTR_THRESHOLD) |
1125 | jme_attempt_pcc(dpi, PCC_P2); | |
1126 | else | |
1127 | jme_attempt_pcc(dpi, PCC_P1); | |
1128 | ||
cd0ff491 GFT |
1129 | if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { |
1130 | if (dpi->attempt < dpi->cur) | |
1131 | tasklet_schedule(&jme->rxclean_task); | |
79ce639c GFT |
1132 | jme_set_rx_pcc(jme, dpi->attempt); |
1133 | dpi->cur = dpi->attempt; | |
1134 | dpi->cnt = 0; | |
1135 | } | |
1136 | } | |
1137 | ||
1138 | static void | |
1139 | jme_start_pcc_timer(struct jme_adapter *jme) | |
1140 | { | |
1141 | struct dynpcc_info *dpi = &(jme->dpi); | |
1142 | dpi->last_bytes = NET_STAT(jme).rx_bytes; | |
1143 | dpi->last_pkts = NET_STAT(jme).rx_packets; | |
1144 | dpi->intr_cnt = 0; | |
1145 | jwrite32(jme, JME_TMCSR, | |
1146 | TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT)); | |
1147 | } | |
1148 | ||
cd0ff491 | 1149 | static inline void |
29bdd921 GFT |
1150 | jme_stop_pcc_timer(struct jme_adapter *jme) |
1151 | { | |
1152 | jwrite32(jme, JME_TMCSR, 0); | |
1153 | } | |
1154 | ||
cd0ff491 GFT |
1155 | static void |
1156 | jme_shutdown_nic(struct jme_adapter *jme) | |
1157 | { | |
1158 | u32 phylink; | |
1159 | ||
1160 | phylink = jme_linkstat_from_phy(jme); | |
1161 | ||
1162 | if (!(phylink & PHY_LINK_UP)) { | |
1163 | /* | |
1164 | * Disable all interrupt before issue timer | |
1165 | */ | |
1166 | jme_stop_irq(jme); | |
1167 | jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE); | |
1168 | } | |
1169 | } | |
1170 | ||
79ce639c GFT |
1171 | static void |
1172 | jme_pcc_tasklet(unsigned long arg) | |
1173 | { | |
cd0ff491 | 1174 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c GFT |
1175 | struct net_device *netdev = jme->dev; |
1176 | ||
cd0ff491 GFT |
1177 | if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) { |
1178 | jme_shutdown_nic(jme); | |
1179 | return; | |
1180 | } | |
29bdd921 | 1181 | |
cd0ff491 | 1182 | if (unlikely(!netif_carrier_ok(netdev) || |
29bdd921 GFT |
1183 | (atomic_read(&jme->link_changing) != 1) |
1184 | )) { | |
1185 | jme_stop_pcc_timer(jme); | |
79ce639c GFT |
1186 | return; |
1187 | } | |
29bdd921 | 1188 | |
cd0ff491 | 1189 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) |
192570e0 GFT |
1190 | jme_dynamic_pcc(jme); |
1191 | ||
79ce639c GFT |
1192 | jme_start_pcc_timer(jme); |
1193 | } | |
1194 | ||
cd0ff491 | 1195 | static inline void |
192570e0 GFT |
1196 | jme_polling_mode(struct jme_adapter *jme) |
1197 | { | |
1198 | jme_set_rx_pcc(jme, PCC_OFF); | |
1199 | } | |
1200 | ||
cd0ff491 | 1201 | static inline void |
192570e0 GFT |
1202 | jme_interrupt_mode(struct jme_adapter *jme) |
1203 | { | |
1204 | jme_set_rx_pcc(jme, PCC_P1); | |
1205 | } | |
1206 | ||
cd0ff491 GFT |
1207 | static inline int |
1208 | jme_pseudo_hotplug_enabled(struct jme_adapter *jme) | |
1209 | { | |
1210 | u32 apmc; | |
1211 | apmc = jread32(jme, JME_APMC); | |
1212 | return apmc & JME_APMC_PSEUDO_HP_EN; | |
1213 | } | |
1214 | ||
1215 | static void | |
1216 | jme_start_shutdown_timer(struct jme_adapter *jme) | |
1217 | { | |
1218 | u32 apmc; | |
1219 | ||
1220 | apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN; | |
1221 | apmc &= ~JME_APMC_EPIEN_CTRL; | |
1222 | if (!no_extplug) { | |
1223 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN); | |
1224 | wmb(); | |
1225 | } | |
1226 | jwrite32f(jme, JME_APMC, apmc); | |
1227 | ||
1228 | jwrite32f(jme, JME_TIMER2, 0); | |
1229 | set_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1230 | jwrite32(jme, JME_TMCSR, | |
1231 | TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT)); | |
1232 | } | |
1233 | ||
1234 | static void | |
1235 | jme_stop_shutdown_timer(struct jme_adapter *jme) | |
1236 | { | |
1237 | u32 apmc; | |
1238 | ||
1239 | jwrite32f(jme, JME_TMCSR, 0); | |
1240 | jwrite32f(jme, JME_TIMER2, 0); | |
1241 | clear_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1242 | ||
1243 | apmc = jread32(jme, JME_APMC); | |
1244 | apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL); | |
1245 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS); | |
1246 | wmb(); | |
1247 | jwrite32f(jme, JME_APMC, apmc); | |
1248 | } | |
1249 | ||
3bf61c55 GFT |
1250 | static void |
1251 | jme_link_change_tasklet(unsigned long arg) | |
1252 | { | |
cd0ff491 | 1253 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1254 | struct net_device *netdev = jme->dev; |
fcf45b4c GFT |
1255 | int rc; |
1256 | ||
cd0ff491 GFT |
1257 | while (!atomic_dec_and_test(&jme->link_changing)) { |
1258 | atomic_inc(&jme->link_changing); | |
1259 | msg_intr(jme, "Get link change lock failed.\n"); | |
1260 | while(atomic_read(&jme->link_changing) != 1) | |
1261 | msg_intr(jme, "Waiting link change lock.\n"); | |
1262 | } | |
fcf45b4c | 1263 | |
cd0ff491 | 1264 | if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) |
fcf45b4c GFT |
1265 | goto out; |
1266 | ||
29bdd921 | 1267 | jme->old_mtu = netdev->mtu; |
fcf45b4c | 1268 | netif_stop_queue(netdev); |
cd0ff491 GFT |
1269 | if (jme_pseudo_hotplug_enabled(jme)) |
1270 | jme_stop_shutdown_timer(jme); | |
1271 | ||
1272 | jme_stop_pcc_timer(jme); | |
1273 | tasklet_disable(&jme->txclean_task); | |
1274 | tasklet_disable(&jme->rxclean_task); | |
1275 | tasklet_disable(&jme->rxempty_task); | |
1276 | ||
1277 | if (netif_carrier_ok(netdev)) { | |
1278 | jme_reset_ghc_speed(jme); | |
1279 | jme_disable_rx_engine(jme); | |
1280 | jme_disable_tx_engine(jme); | |
fcf45b4c GFT |
1281 | jme_reset_mac_processor(jme); |
1282 | jme_free_rx_resources(jme); | |
1283 | jme_free_tx_resources(jme); | |
192570e0 | 1284 | |
cd0ff491 | 1285 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1286 | jme_polling_mode(jme); |
cd0ff491 GFT |
1287 | |
1288 | netif_carrier_off(netdev); | |
fcf45b4c GFT |
1289 | } |
1290 | ||
1291 | jme_check_link(netdev, 0); | |
cd0ff491 | 1292 | if (netif_carrier_ok(netdev)) { |
fcf45b4c | 1293 | rc = jme_setup_rx_resources(jme); |
cd0ff491 GFT |
1294 | if (rc) { |
1295 | jeprintk(jme->pdev, "Allocating resources for RX error" | |
fcf45b4c | 1296 | ", Device STOPPED!\n"); |
cd0ff491 | 1297 | goto out_enable_tasklet; |
fcf45b4c GFT |
1298 | } |
1299 | ||
fcf45b4c | 1300 | rc = jme_setup_tx_resources(jme); |
cd0ff491 GFT |
1301 | if (rc) { |
1302 | jeprintk(jme->pdev, "Allocating resources for TX error" | |
fcf45b4c GFT |
1303 | ", Device STOPPED!\n"); |
1304 | goto err_out_free_rx_resources; | |
1305 | } | |
1306 | ||
1307 | jme_enable_rx_engine(jme); | |
1308 | jme_enable_tx_engine(jme); | |
1309 | ||
1310 | netif_start_queue(netdev); | |
192570e0 | 1311 | |
cd0ff491 | 1312 | if (test_bit(JME_FLAG_POLL, &jme->flags)) |
192570e0 | 1313 | jme_interrupt_mode(jme); |
192570e0 | 1314 | |
79ce639c | 1315 | jme_start_pcc_timer(jme); |
cd0ff491 GFT |
1316 | } else if (jme_pseudo_hotplug_enabled(jme)) { |
1317 | jme_start_shutdown_timer(jme); | |
fcf45b4c GFT |
1318 | } |
1319 | ||
cd0ff491 | 1320 | goto out_enable_tasklet; |
fcf45b4c GFT |
1321 | |
1322 | err_out_free_rx_resources: | |
1323 | jme_free_rx_resources(jme); | |
cd0ff491 GFT |
1324 | out_enable_tasklet: |
1325 | tasklet_enable(&jme->txclean_task); | |
1326 | tasklet_hi_enable(&jme->rxclean_task); | |
1327 | tasklet_hi_enable(&jme->rxempty_task); | |
fcf45b4c GFT |
1328 | out: |
1329 | atomic_inc(&jme->link_changing); | |
3bf61c55 | 1330 | } |
d7699f87 | 1331 | |
3bf61c55 GFT |
1332 | static void |
1333 | jme_rx_clean_tasklet(unsigned long arg) | |
1334 | { | |
cd0ff491 | 1335 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
79ce639c | 1336 | struct dynpcc_info *dpi = &(jme->dpi); |
d7699f87 | 1337 | |
192570e0 GFT |
1338 | jme_process_receive(jme, jme->rx_ring_size); |
1339 | ++(dpi->intr_cnt); | |
42b1055e | 1340 | |
192570e0 | 1341 | } |
fcf45b4c | 1342 | |
192570e0 | 1343 | static int |
cdcdc9eb | 1344 | jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) |
192570e0 | 1345 | { |
cdcdc9eb | 1346 | struct jme_adapter *jme = jme_napi_priv(holder); |
192570e0 GFT |
1347 | struct net_device *netdev = jme->dev; |
1348 | int rest; | |
fcf45b4c | 1349 | |
cdcdc9eb | 1350 | rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget)); |
fcf45b4c | 1351 | |
cd0ff491 | 1352 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb | 1353 | atomic_dec(&jme->rx_empty); |
192570e0 GFT |
1354 | ++(NET_STAT(jme).rx_dropped); |
1355 | jme_restart_rx_engine(jme); | |
1356 | } | |
1357 | atomic_inc(&jme->rx_empty); | |
1358 | ||
cd0ff491 | 1359 | if (rest) { |
cdcdc9eb | 1360 | JME_RX_COMPLETE(netdev, holder); |
192570e0 GFT |
1361 | jme_interrupt_mode(jme); |
1362 | } | |
1363 | ||
cdcdc9eb GFT |
1364 | JME_NAPI_WEIGHT_SET(budget, rest); |
1365 | return JME_NAPI_WEIGHT_VAL(budget) - rest; | |
fcf45b4c GFT |
1366 | } |
1367 | ||
1368 | static void | |
1369 | jme_rx_empty_tasklet(unsigned long arg) | |
1370 | { | |
cd0ff491 | 1371 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
fcf45b4c | 1372 | |
cd0ff491 | 1373 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1374 | return; |
1375 | ||
cd0ff491 | 1376 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1377 | return; |
1378 | ||
cd0ff491 | 1379 | msg_rx_status(jme, "RX Queue Full!\n"); |
29bdd921 | 1380 | |
fcf45b4c | 1381 | jme_rx_clean_tasklet(arg); |
cdcdc9eb | 1382 | |
cd0ff491 | 1383 | while (atomic_read(&jme->rx_empty) > 0) { |
cdcdc9eb GFT |
1384 | atomic_dec(&jme->rx_empty); |
1385 | ++(NET_STAT(jme).rx_dropped); | |
1386 | jme_restart_rx_engine(jme); | |
1387 | } | |
1388 | atomic_inc(&jme->rx_empty); | |
4330c2f2 GFT |
1389 | } |
1390 | ||
b3821cc5 GFT |
1391 | static void |
1392 | jme_wake_queue_if_stopped(struct jme_adapter *jme) | |
1393 | { | |
1394 | struct jme_ring *txring = jme->txring; | |
1395 | ||
1396 | smp_wmb(); | |
cd0ff491 | 1397 | if (unlikely(netif_queue_stopped(jme->dev) && |
b3821cc5 | 1398 | atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) { |
cd0ff491 | 1399 | msg_tx_done(jme, "TX Queue Waked.\n"); |
b3821cc5 | 1400 | netif_wake_queue(jme->dev); |
b3821cc5 GFT |
1401 | } |
1402 | ||
1403 | } | |
1404 | ||
3bf61c55 GFT |
1405 | static void |
1406 | jme_tx_clean_tasklet(unsigned long arg) | |
4330c2f2 | 1407 | { |
cd0ff491 | 1408 | struct jme_adapter *jme = (struct jme_adapter *)arg; |
3bf61c55 | 1409 | struct jme_ring *txring = &(jme->txring[0]); |
cd0ff491 | 1410 | struct txdesc *txdesc = txring->desc; |
3bf61c55 | 1411 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi; |
b3821cc5 | 1412 | int i, j, cnt = 0, max, err, mask; |
3bf61c55 | 1413 | |
cd0ff491 GFT |
1414 | tx_dbg(jme, "Into txclean.\n"); |
1415 | ||
1416 | if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) | |
fcf45b4c GFT |
1417 | goto out; |
1418 | ||
cd0ff491 | 1419 | if (unlikely(atomic_read(&jme->link_changing) != 1)) |
fcf45b4c GFT |
1420 | goto out; |
1421 | ||
cd0ff491 | 1422 | if (unlikely(!netif_carrier_ok(jme->dev))) |
fcf45b4c GFT |
1423 | goto out; |
1424 | ||
b3821cc5 GFT |
1425 | max = jme->tx_ring_size - atomic_read(&txring->nr_free); |
1426 | mask = jme->tx_ring_mask; | |
3bf61c55 | 1427 | |
cd0ff491 | 1428 | for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { |
3bf61c55 GFT |
1429 | |
1430 | ctxbi = txbi + i; | |
1431 | ||
cd0ff491 | 1432 | if (likely(ctxbi->skb && |
b3821cc5 | 1433 | !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) { |
8c198884 | 1434 | |
cd0ff491 GFT |
1435 | tx_dbg(jme, "txclean: %d+%d@%lu\n", |
1436 | i, ctxbi->nr_desc, jiffies); | |
3bf61c55 | 1437 | |
cd0ff491 | 1438 | err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; |
3bf61c55 | 1439 | |
cd0ff491 | 1440 | for (j = 1 ; j < ctxbi->nr_desc ; ++j) { |
b3821cc5 GFT |
1441 | ttxbi = txbi + ((i + j) & (mask)); |
1442 | txdesc[(i + j) & (mask)].dw[0] = 0; | |
3bf61c55 | 1443 | |
b3821cc5 | 1444 | pci_unmap_page(jme->pdev, |
3bf61c55 GFT |
1445 | ttxbi->mapping, |
1446 | ttxbi->len, | |
1447 | PCI_DMA_TODEVICE); | |
1448 | ||
3bf61c55 GFT |
1449 | ttxbi->mapping = 0; |
1450 | ttxbi->len = 0; | |
1451 | } | |
1452 | ||
1453 | dev_kfree_skb(ctxbi->skb); | |
3bf61c55 GFT |
1454 | |
1455 | cnt += ctxbi->nr_desc; | |
1456 | ||
cd0ff491 | 1457 | if (unlikely(err)) { |
8c198884 | 1458 | ++(NET_STAT(jme).tx_carrier_errors); |
cd0ff491 | 1459 | } else { |
8c198884 | 1460 | ++(NET_STAT(jme).tx_packets); |
b3821cc5 GFT |
1461 | NET_STAT(jme).tx_bytes += ctxbi->len; |
1462 | } | |
1463 | ||
1464 | ctxbi->skb = NULL; | |
1465 | ctxbi->len = 0; | |
cdcdc9eb | 1466 | ctxbi->start_xmit = 0; |
cd0ff491 GFT |
1467 | |
1468 | } else { | |
3bf61c55 GFT |
1469 | break; |
1470 | } | |
1471 | ||
b3821cc5 | 1472 | i = (i + ctxbi->nr_desc) & mask; |
3bf61c55 GFT |
1473 | |
1474 | ctxbi->nr_desc = 0; | |
d7699f87 GFT |
1475 | } |
1476 | ||
cd0ff491 | 1477 | tx_dbg(jme, "txclean: done %d@%lu.\n", i, jiffies); |
cdcdc9eb | 1478 | atomic_set(&txring->next_to_clean, i); |
79ce639c | 1479 | atomic_add(cnt, &txring->nr_free); |
3bf61c55 | 1480 | |
b3821cc5 GFT |
1481 | jme_wake_queue_if_stopped(jme); |
1482 | ||
fcf45b4c GFT |
1483 | out: |
1484 | atomic_inc(&jme->tx_cleaning); | |
d7699f87 GFT |
1485 | } |
1486 | ||
79ce639c | 1487 | static void |
cd0ff491 | 1488 | jme_intr_msi(struct jme_adapter *jme, u32 intrstat) |
d7699f87 | 1489 | { |
3bf61c55 GFT |
1490 | /* |
1491 | * Disable interrupt | |
1492 | */ | |
1493 | jwrite32f(jme, JME_IENC, INTR_ENABLE); | |
d7699f87 | 1494 | |
cd0ff491 | 1495 | if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { |
47220951 GFT |
1496 | /* |
1497 | * Link change event is critical | |
1498 | * all other events are ignored | |
1499 | */ | |
1500 | jwrite32(jme, JME_IEVE, intrstat); | |
3bf61c55 | 1501 | tasklet_schedule(&jme->linkch_task); |
29bdd921 | 1502 | goto out_reenable; |
fcf45b4c | 1503 | } |
d7699f87 | 1504 | |
cd0ff491 | 1505 | if (intrstat & INTR_TMINTR) { |
47220951 | 1506 | jwrite32(jme, JME_IEVE, INTR_TMINTR); |
79ce639c | 1507 | tasklet_schedule(&jme->pcc_task); |
47220951 | 1508 | } |
79ce639c | 1509 | |
cd0ff491 | 1510 | if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { |
47220951 | 1511 | jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0); |
4330c2f2 | 1512 | tasklet_schedule(&jme->txclean_task); |
47220951 GFT |
1513 | } |
1514 | ||
cd0ff491 | 1515 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
47220951 GFT |
1516 | jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO | |
1517 | INTR_PCCRX0 | | |
1518 | INTR_RX0EMP)) | | |
1519 | INTR_RX0); | |
1520 | } | |
d7699f87 | 1521 | |
cd0ff491 GFT |
1522 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
1523 | if (intrstat & INTR_RX0EMP) | |
192570e0 GFT |
1524 | atomic_inc(&jme->rx_empty); |
1525 | ||
cd0ff491 GFT |
1526 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { |
1527 | if (likely(JME_RX_SCHEDULE_PREP(jme))) { | |
192570e0 | 1528 | jme_polling_mode(jme); |
cdcdc9eb | 1529 | JME_RX_SCHEDULE(jme); |
192570e0 GFT |
1530 | } |
1531 | } | |
cd0ff491 GFT |
1532 | } else { |
1533 | if (intrstat & INTR_RX0EMP) { | |
cdcdc9eb | 1534 | atomic_inc(&jme->rx_empty); |
cd0ff491 GFT |
1535 | tasklet_hi_schedule(&jme->rxempty_task); |
1536 | } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) { | |
1537 | tasklet_hi_schedule(&jme->rxclean_task); | |
cdcdc9eb | 1538 | } |
4330c2f2 | 1539 | } |
d7699f87 | 1540 | |
29bdd921 | 1541 | out_reenable: |
3bf61c55 | 1542 | /* |
fcf45b4c | 1543 | * Re-enable interrupt |
3bf61c55 | 1544 | */ |
fcf45b4c | 1545 | jwrite32f(jme, JME_IENS, INTR_ENABLE); |
79ce639c GFT |
1546 | } |
1547 | ||
1548 | static irqreturn_t | |
1549 | jme_intr(int irq, void *dev_id) | |
1550 | { | |
cd0ff491 GFT |
1551 | struct net_device *netdev = dev_id; |
1552 | struct jme_adapter *jme = netdev_priv(netdev); | |
1553 | u32 intrstat; | |
79ce639c GFT |
1554 | |
1555 | intrstat = jread32(jme, JME_IEVE); | |
1556 | ||
1557 | /* | |
1558 | * Check if it's really an interrupt for us | |
1559 | */ | |
cd0ff491 | 1560 | if (unlikely(intrstat == 0)) |
29bdd921 | 1561 | return IRQ_NONE; |
79ce639c GFT |
1562 | |
1563 | /* | |
1564 | * Check if the device still exist | |
1565 | */ | |
cd0ff491 GFT |
1566 | if (unlikely(intrstat == ~((typeof(intrstat))0))) |
1567 | return IRQ_NONE; | |
79ce639c GFT |
1568 | |
1569 | jme_intr_msi(jme, intrstat); | |
1570 | ||
cd0ff491 | 1571 | return IRQ_HANDLED; |
d7699f87 GFT |
1572 | } |
1573 | ||
79ce639c GFT |
1574 | static irqreturn_t |
1575 | jme_msi(int irq, void *dev_id) | |
1576 | { | |
cd0ff491 GFT |
1577 | struct net_device *netdev = dev_id; |
1578 | struct jme_adapter *jme = netdev_priv(netdev); | |
1579 | u32 intrstat; | |
79ce639c GFT |
1580 | |
1581 | pci_dma_sync_single_for_cpu(jme->pdev, | |
1582 | jme->shadow_dma, | |
cd0ff491 | 1583 | sizeof(u32) * SHADOW_REG_NR, |
79ce639c GFT |
1584 | PCI_DMA_FROMDEVICE); |
1585 | intrstat = jme->shadow_regs[SHADOW_IEVE]; | |
1586 | jme->shadow_regs[SHADOW_IEVE] = 0; | |
1587 | ||
1588 | jme_intr_msi(jme, intrstat); | |
1589 | ||
cd0ff491 | 1590 | return IRQ_HANDLED; |
79ce639c GFT |
1591 | } |
1592 | ||
79ce639c GFT |
1593 | static void |
1594 | jme_reset_link(struct jme_adapter *jme) | |
1595 | { | |
1596 | jwrite32(jme, JME_TMCSR, TMCSR_SWIT); | |
1597 | } | |
1598 | ||
fcf45b4c GFT |
1599 | static void |
1600 | jme_restart_an(struct jme_adapter *jme) | |
1601 | { | |
cd0ff491 | 1602 | u32 bmcr; |
fcf45b4c | 1603 | |
cd0ff491 | 1604 | spin_lock_bh(&jme->phy_lock); |
fcf45b4c GFT |
1605 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1606 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
1607 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
cd0ff491 | 1608 | spin_unlock_bh(&jme->phy_lock); |
79ce639c GFT |
1609 | } |
1610 | ||
1611 | static int | |
1612 | jme_request_irq(struct jme_adapter *jme) | |
1613 | { | |
1614 | int rc; | |
cd0ff491 GFT |
1615 | struct net_device *netdev = jme->dev; |
1616 | irq_handler_t handler = jme_intr; | |
1617 | int irq_flags = IRQF_SHARED; | |
1618 | ||
1619 | if (!pci_enable_msi(jme->pdev)) { | |
1620 | set_bit(JME_FLAG_MSI, &jme->flags); | |
1621 | handler = jme_msi; | |
1622 | irq_flags = 0; | |
1623 | } | |
1624 | ||
1625 | rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, | |
1626 | netdev); | |
1627 | if (rc) { | |
1628 | jeprintk(jme->pdev, | |
b3821cc5 | 1629 | "Unable to request %s interrupt (return: %d)\n", |
cd0ff491 GFT |
1630 | test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx", |
1631 | rc); | |
79ce639c | 1632 | |
cd0ff491 GFT |
1633 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { |
1634 | pci_disable_msi(jme->pdev); | |
1635 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1636 | } |
cd0ff491 | 1637 | } else { |
79ce639c GFT |
1638 | netdev->irq = jme->pdev->irq; |
1639 | } | |
1640 | ||
cd0ff491 | 1641 | return rc; |
79ce639c GFT |
1642 | } |
1643 | ||
1644 | static void | |
1645 | jme_free_irq(struct jme_adapter *jme) | |
1646 | { | |
cd0ff491 GFT |
1647 | free_irq(jme->pdev->irq, jme->dev); |
1648 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { | |
1649 | pci_disable_msi(jme->pdev); | |
1650 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
79ce639c | 1651 | jme->dev->irq = jme->pdev->irq; |
cd0ff491 | 1652 | } |
fcf45b4c GFT |
1653 | } |
1654 | ||
3bf61c55 GFT |
1655 | static int |
1656 | jme_open(struct net_device *netdev) | |
d7699f87 GFT |
1657 | { |
1658 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 1659 | int rc; |
79ce639c | 1660 | |
42b1055e | 1661 | jme_clear_pm(jme); |
cdcdc9eb | 1662 | JME_NAPI_ENABLE(jme); |
d7699f87 | 1663 | |
cd0ff491 GFT |
1664 | tasklet_enable(&jme->txclean_task); |
1665 | tasklet_hi_enable(&jme->rxclean_task); | |
1666 | tasklet_hi_enable(&jme->rxempty_task); | |
1667 | ||
79ce639c | 1668 | rc = jme_request_irq(jme); |
cd0ff491 | 1669 | if (rc) |
4330c2f2 | 1670 | goto err_out; |
79ce639c | 1671 | |
4330c2f2 | 1672 | jme_enable_shadow(jme); |
d7699f87 | 1673 | jme_start_irq(jme); |
42b1055e | 1674 | |
cd0ff491 | 1675 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
42b1055e GFT |
1676 | jme_set_settings(netdev, &jme->old_ecmd); |
1677 | else | |
1678 | jme_reset_phy_processor(jme); | |
1679 | ||
29bdd921 | 1680 | jme_reset_link(jme); |
d7699f87 GFT |
1681 | |
1682 | return 0; | |
1683 | ||
d7699f87 GFT |
1684 | err_out: |
1685 | netif_stop_queue(netdev); | |
1686 | netif_carrier_off(netdev); | |
4330c2f2 | 1687 | return rc; |
d7699f87 GFT |
1688 | } |
1689 | ||
42b1055e GFT |
1690 | static void |
1691 | jme_set_100m_half(struct jme_adapter *jme) | |
1692 | { | |
cd0ff491 | 1693 | u32 bmcr, tmp; |
42b1055e GFT |
1694 | |
1695 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1696 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | | |
1697 | BMCR_SPEED1000 | BMCR_FULLDPLX); | |
1698 | tmp |= BMCR_SPEED100; | |
1699 | ||
1700 | if (bmcr != tmp) | |
1701 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp); | |
1702 | ||
cd0ff491 | 1703 | if (jme->fpgaver) |
cdcdc9eb GFT |
1704 | jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL); |
1705 | else | |
1706 | jwrite32(jme, JME_GHC, GHC_SPEED_100M); | |
42b1055e GFT |
1707 | } |
1708 | ||
47220951 GFT |
1709 | #define JME_WAIT_LINK_TIME 2000 /* 2000ms */ |
1710 | static void | |
1711 | jme_wait_link(struct jme_adapter *jme) | |
1712 | { | |
cd0ff491 | 1713 | u32 phylink, to = JME_WAIT_LINK_TIME; |
47220951 GFT |
1714 | |
1715 | mdelay(1000); | |
1716 | phylink = jme_linkstat_from_phy(jme); | |
cd0ff491 | 1717 | while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { |
47220951 GFT |
1718 | mdelay(10); |
1719 | phylink = jme_linkstat_from_phy(jme); | |
1720 | } | |
1721 | } | |
1722 | ||
cd0ff491 | 1723 | static inline void |
42b1055e GFT |
1724 | jme_phy_off(struct jme_adapter *jme) |
1725 | { | |
1726 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN); | |
1727 | } | |
1728 | ||
3bf61c55 GFT |
1729 | static int |
1730 | jme_close(struct net_device *netdev) | |
d7699f87 GFT |
1731 | { |
1732 | struct jme_adapter *jme = netdev_priv(netdev); | |
1733 | ||
1734 | netif_stop_queue(netdev); | |
1735 | netif_carrier_off(netdev); | |
1736 | ||
1737 | jme_stop_irq(jme); | |
4330c2f2 | 1738 | jme_disable_shadow(jme); |
79ce639c | 1739 | jme_free_irq(jme); |
d7699f87 | 1740 | |
cdcdc9eb | 1741 | JME_NAPI_DISABLE(jme); |
192570e0 | 1742 | |
4330c2f2 GFT |
1743 | tasklet_kill(&jme->linkch_task); |
1744 | tasklet_kill(&jme->txclean_task); | |
1745 | tasklet_kill(&jme->rxclean_task); | |
fcf45b4c | 1746 | tasklet_kill(&jme->rxempty_task); |
8c198884 | 1747 | |
cd0ff491 GFT |
1748 | jme_reset_ghc_speed(jme); |
1749 | jme_disable_rx_engine(jme); | |
1750 | jme_disable_tx_engine(jme); | |
8c198884 | 1751 | jme_reset_mac_processor(jme); |
d7699f87 GFT |
1752 | jme_free_rx_resources(jme); |
1753 | jme_free_tx_resources(jme); | |
42b1055e | 1754 | jme->phylink = 0; |
b3821cc5 GFT |
1755 | jme_phy_off(jme); |
1756 | ||
1757 | return 0; | |
1758 | } | |
1759 | ||
1760 | static int | |
1761 | jme_alloc_txdesc(struct jme_adapter *jme, | |
1762 | struct sk_buff *skb) | |
1763 | { | |
1764 | struct jme_ring *txring = jme->txring; | |
1765 | int idx, nr_alloc, mask = jme->tx_ring_mask; | |
1766 | ||
1767 | idx = txring->next_to_use; | |
1768 | nr_alloc = skb_shinfo(skb)->nr_frags + 2; | |
1769 | ||
cd0ff491 | 1770 | if (unlikely(atomic_read(&txring->nr_free) < nr_alloc)) |
b3821cc5 GFT |
1771 | return -1; |
1772 | ||
1773 | atomic_sub(nr_alloc, &txring->nr_free); | |
42b1055e | 1774 | |
b3821cc5 GFT |
1775 | txring->next_to_use = (txring->next_to_use + nr_alloc) & mask; |
1776 | ||
1777 | return idx; | |
1778 | } | |
1779 | ||
1780 | static void | |
1781 | jme_fill_tx_map(struct pci_dev *pdev, | |
cd0ff491 | 1782 | struct txdesc *txdesc, |
b3821cc5 GFT |
1783 | struct jme_buffer_info *txbi, |
1784 | struct page *page, | |
cd0ff491 GFT |
1785 | u32 page_offset, |
1786 | u32 len, | |
1787 | u8 hidma) | |
b3821cc5 GFT |
1788 | { |
1789 | dma_addr_t dmaaddr; | |
1790 | ||
1791 | dmaaddr = pci_map_page(pdev, | |
1792 | page, | |
1793 | page_offset, | |
1794 | len, | |
1795 | PCI_DMA_TODEVICE); | |
1796 | ||
1797 | pci_dma_sync_single_for_device(pdev, | |
1798 | dmaaddr, | |
1799 | len, | |
1800 | PCI_DMA_TODEVICE); | |
1801 | ||
1802 | txdesc->dw[0] = 0; | |
1803 | txdesc->dw[1] = 0; | |
1804 | txdesc->desc2.flags = TXFLAG_OWN; | |
cd0ff491 | 1805 | txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0; |
b3821cc5 GFT |
1806 | txdesc->desc2.datalen = cpu_to_le16(len); |
1807 | txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32); | |
1808 | txdesc->desc2.bufaddrl = cpu_to_le32( | |
1809 | (__u64)dmaaddr & 0xFFFFFFFFUL); | |
1810 | ||
1811 | txbi->mapping = dmaaddr; | |
1812 | txbi->len = len; | |
1813 | } | |
1814 | ||
1815 | static void | |
1816 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
1817 | { | |
1818 | struct jme_ring *txring = jme->txring; | |
cd0ff491 | 1819 | struct txdesc *txdesc = txring->desc, *ctxdesc; |
b3821cc5 | 1820 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; |
cd0ff491 | 1821 | u8 hidma = jme->dev->features & NETIF_F_HIGHDMA; |
b3821cc5 GFT |
1822 | int i, nr_frags = skb_shinfo(skb)->nr_frags; |
1823 | int mask = jme->tx_ring_mask; | |
1824 | struct skb_frag_struct *frag; | |
cd0ff491 | 1825 | u32 len; |
b3821cc5 | 1826 | |
cd0ff491 GFT |
1827 | for (i = 0 ; i < nr_frags ; ++i) { |
1828 | frag = &skb_shinfo(skb)->frags[i]; | |
b3821cc5 GFT |
1829 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); |
1830 | ctxbi = txbi + ((idx + i + 2) & (mask)); | |
1831 | ||
1832 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page, | |
1833 | frag->page_offset, frag->size, hidma); | |
42b1055e | 1834 | } |
b3821cc5 | 1835 | |
cd0ff491 | 1836 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
b3821cc5 GFT |
1837 | ctxdesc = txdesc + ((idx + 1) & (mask)); |
1838 | ctxbi = txbi + ((idx + 1) & (mask)); | |
1839 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
1840 | offset_in_page(skb->data), len, hidma); | |
1841 | ||
1842 | } | |
1843 | ||
1844 | static int | |
1845 | jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) | |
1846 | { | |
cd0ff491 | 1847 | if (unlikely(skb_shinfo(skb)->gso_size && |
b3821cc5 GFT |
1848 | skb_header_cloned(skb) && |
1849 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) { | |
1850 | dev_kfree_skb(skb); | |
1851 | return -1; | |
1852 | } | |
1853 | ||
1854 | return 0; | |
1855 | } | |
1856 | ||
1857 | static int | |
1858 | jme_tx_tso(struct sk_buff *skb, | |
cd0ff491 | 1859 | u16 *mss, u8 *flags) |
b3821cc5 | 1860 | { |
cd0ff491 GFT |
1861 | *mss = skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT; |
1862 | if (*mss) { | |
b3821cc5 GFT |
1863 | *flags |= TXFLAG_LSEN; |
1864 | ||
cd0ff491 | 1865 | if (skb->protocol == htons(ETH_P_IP)) { |
b3821cc5 GFT |
1866 | struct iphdr *iph = ip_hdr(skb); |
1867 | ||
1868 | iph->check = 0; | |
cd0ff491 | 1869 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, |
b3821cc5 GFT |
1870 | iph->daddr, 0, |
1871 | IPPROTO_TCP, | |
1872 | 0); | |
cd0ff491 | 1873 | } else { |
b3821cc5 GFT |
1874 | struct ipv6hdr *ip6h = ipv6_hdr(skb); |
1875 | ||
cd0ff491 | 1876 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, |
b3821cc5 GFT |
1877 | &ip6h->daddr, 0, |
1878 | IPPROTO_TCP, | |
1879 | 0); | |
1880 | } | |
1881 | ||
1882 | return 0; | |
1883 | } | |
1884 | ||
1885 | return 1; | |
1886 | } | |
1887 | ||
1888 | static void | |
cd0ff491 | 1889 | jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags) |
b3821cc5 | 1890 | { |
cd0ff491 GFT |
1891 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
1892 | u8 ip_proto; | |
b3821cc5 GFT |
1893 | |
1894 | switch (skb->protocol) { | |
cd0ff491 | 1895 | case htons(ETH_P_IP): |
b3821cc5 GFT |
1896 | ip_proto = ip_hdr(skb)->protocol; |
1897 | break; | |
cd0ff491 | 1898 | case htons(ETH_P_IPV6): |
b3821cc5 GFT |
1899 | ip_proto = ipv6_hdr(skb)->nexthdr; |
1900 | break; | |
1901 | default: | |
1902 | ip_proto = 0; | |
1903 | break; | |
1904 | } | |
1905 | ||
cd0ff491 | 1906 | switch (ip_proto) { |
b3821cc5 GFT |
1907 | case IPPROTO_TCP: |
1908 | *flags |= TXFLAG_TCPCS; | |
1909 | break; | |
1910 | case IPPROTO_UDP: | |
1911 | *flags |= TXFLAG_UDPCS; | |
1912 | break; | |
1913 | default: | |
cd0ff491 | 1914 | msg_tx_err(jme, "Error upper layer protocol.\n"); |
b3821cc5 GFT |
1915 | break; |
1916 | } | |
1917 | } | |
1918 | } | |
1919 | ||
cd0ff491 GFT |
1920 | static inline void |
1921 | jme_tx_vlan(struct sk_buff *skb, u16 *vlan, u8 *flags) | |
b3821cc5 | 1922 | { |
cd0ff491 | 1923 | if (vlan_tx_tag_present(skb)) { |
b3821cc5 GFT |
1924 | *flags |= TXFLAG_TAGON; |
1925 | *vlan = vlan_tx_tag_get(skb); | |
42b1055e | 1926 | } |
b3821cc5 GFT |
1927 | } |
1928 | ||
1929 | static int | |
1930 | jme_fill_first_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
1931 | { | |
1932 | struct jme_ring *txring = jme->txring; | |
cd0ff491 | 1933 | struct txdesc *txdesc; |
b3821cc5 | 1934 | struct jme_buffer_info *txbi; |
cd0ff491 | 1935 | u8 flags; |
b3821cc5 | 1936 | |
cd0ff491 | 1937 | txdesc = (struct txdesc *)txring->desc + idx; |
b3821cc5 GFT |
1938 | txbi = txring->bufinf + idx; |
1939 | ||
1940 | txdesc->dw[0] = 0; | |
1941 | txdesc->dw[1] = 0; | |
1942 | txdesc->dw[2] = 0; | |
1943 | txdesc->dw[3] = 0; | |
1944 | txdesc->desc1.pktsize = cpu_to_le16(skb->len); | |
1945 | /* | |
1946 | * Set OWN bit at final. | |
1947 | * When kernel transmit faster than NIC. | |
1948 | * And NIC trying to send this descriptor before we tell | |
1949 | * it to start sending this TX queue. | |
1950 | * Other fields are already filled correctly. | |
1951 | */ | |
1952 | wmb(); | |
1953 | flags = TXFLAG_OWN | TXFLAG_INT; | |
cd0ff491 GFT |
1954 | /* |
1955 | * Set checksum flags while not tso | |
1956 | */ | |
1957 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) | |
1958 | jme_tx_csum(jme, skb, &flags); | |
b3821cc5 GFT |
1959 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); |
1960 | txdesc->desc1.flags = flags; | |
1961 | /* | |
1962 | * Set tx buffer info after telling NIC to send | |
1963 | * For better tx_clean timing | |
1964 | */ | |
1965 | wmb(); | |
1966 | txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2; | |
1967 | txbi->skb = skb; | |
1968 | txbi->len = skb->len; | |
cd0ff491 GFT |
1969 | txbi->start_xmit = jiffies; |
1970 | if (!txbi->start_xmit) | |
8d27293f | 1971 | txbi->start_xmit = (0UL-1); |
d7699f87 GFT |
1972 | |
1973 | return 0; | |
1974 | } | |
1975 | ||
b3821cc5 GFT |
1976 | static void |
1977 | jme_stop_queue_if_full(struct jme_adapter *jme) | |
1978 | { | |
1979 | struct jme_ring *txring = jme->txring; | |
cd0ff491 GFT |
1980 | struct jme_buffer_info *txbi = txring->bufinf; |
1981 | int idx = atomic_read(&txring->next_to_clean); | |
cdcdc9eb | 1982 | |
cd0ff491 | 1983 | txbi += idx; |
b3821cc5 GFT |
1984 | |
1985 | smp_wmb(); | |
cd0ff491 | 1986 | if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { |
b3821cc5 | 1987 | netif_stop_queue(jme->dev); |
cd0ff491 | 1988 | msg_tx_queued(jme, "TX Queue Paused.\n"); |
b3821cc5 | 1989 | smp_wmb(); |
cd0ff491 GFT |
1990 | if (atomic_read(&txring->nr_free) |
1991 | >= (jme->tx_wake_threshold)) { | |
b3821cc5 | 1992 | netif_wake_queue(jme->dev); |
cd0ff491 | 1993 | msg_tx_queued(jme, "TX Queue Fast Waked.\n"); |
b3821cc5 GFT |
1994 | } |
1995 | } | |
1996 | ||
cd0ff491 | 1997 | if (unlikely(txbi->start_xmit && |
cdcdc9eb GFT |
1998 | (jiffies - txbi->start_xmit) >= TX_TIMEOUT && |
1999 | txbi->skb)) { | |
2000 | netif_stop_queue(jme->dev); | |
cd0ff491 | 2001 | msg_tx_queued(jme, "TX Queue Stopped %d@%lu.\n", idx, jiffies); |
cdcdc9eb | 2002 | } |
b3821cc5 GFT |
2003 | } |
2004 | ||
3bf61c55 GFT |
2005 | /* |
2006 | * This function is already protected by netif_tx_lock() | |
2007 | */ | |
cd0ff491 | 2008 | |
3bf61c55 GFT |
2009 | static int |
2010 | jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) | |
d7699f87 | 2011 | { |
cd0ff491 | 2012 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2013 | int idx; |
d7699f87 | 2014 | |
cd0ff491 | 2015 | if (unlikely(jme_expand_header(jme, skb))) { |
b3821cc5 GFT |
2016 | ++(NET_STAT(jme).tx_dropped); |
2017 | return NETDEV_TX_OK; | |
2018 | } | |
2019 | ||
2020 | idx = jme_alloc_txdesc(jme, skb); | |
79ce639c | 2021 | |
cd0ff491 | 2022 | if (unlikely(idx < 0)) { |
b3821cc5 | 2023 | netif_stop_queue(netdev); |
cd0ff491 | 2024 | msg_tx_err(jme, "BUG! Tx ring full when queue awake!\n"); |
d7699f87 | 2025 | |
cd0ff491 | 2026 | return NETDEV_TX_BUSY; |
b3821cc5 GFT |
2027 | } |
2028 | ||
2029 | jme_map_tx_skb(jme, skb, idx); | |
2030 | jme_fill_first_tx_desc(jme, skb, idx); | |
2031 | ||
4330c2f2 GFT |
2032 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
2033 | TXCS_SELECT_QUEUE0 | | |
2034 | TXCS_QUEUE0S | | |
2035 | TXCS_ENABLE); | |
d7699f87 GFT |
2036 | netdev->trans_start = jiffies; |
2037 | ||
cd0ff491 GFT |
2038 | tx_dbg(jme, "xmit: %d+%d@%lu\n", idx, |
2039 | skb_shinfo(skb)->nr_frags + 2, | |
2040 | jiffies); | |
b3821cc5 GFT |
2041 | jme_stop_queue_if_full(jme); |
2042 | ||
cd0ff491 | 2043 | return NETDEV_TX_OK; |
d7699f87 GFT |
2044 | } |
2045 | ||
3bf61c55 GFT |
2046 | static int |
2047 | jme_set_macaddr(struct net_device *netdev, void *p) | |
d7699f87 | 2048 | { |
cd0ff491 | 2049 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2050 | struct sockaddr *addr = p; |
cd0ff491 | 2051 | u32 val; |
d7699f87 | 2052 | |
cd0ff491 | 2053 | if (netif_running(netdev)) |
d7699f87 GFT |
2054 | return -EBUSY; |
2055 | ||
cd0ff491 | 2056 | spin_lock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
2057 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); |
2058 | ||
186fc259 GFT |
2059 | val = (addr->sa_data[3] & 0xff) << 24 | |
2060 | (addr->sa_data[2] & 0xff) << 16 | | |
2061 | (addr->sa_data[1] & 0xff) << 8 | | |
2062 | (addr->sa_data[0] & 0xff); | |
4330c2f2 | 2063 | jwrite32(jme, JME_RXUMA_LO, val); |
186fc259 GFT |
2064 | val = (addr->sa_data[5] & 0xff) << 8 | |
2065 | (addr->sa_data[4] & 0xff); | |
4330c2f2 | 2066 | jwrite32(jme, JME_RXUMA_HI, val); |
cd0ff491 | 2067 | spin_unlock_bh(&jme->macaddr_lock); |
d7699f87 GFT |
2068 | |
2069 | return 0; | |
2070 | } | |
2071 | ||
3bf61c55 GFT |
2072 | static void |
2073 | jme_set_multi(struct net_device *netdev) | |
d7699f87 | 2074 | { |
3bf61c55 | 2075 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2076 | u32 mc_hash[2] = {}; |
d7699f87 GFT |
2077 | int i; |
2078 | ||
cd0ff491 | 2079 | spin_lock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2080 | |
2081 | jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME; | |
d7699f87 | 2082 | |
cd0ff491 | 2083 | if (netdev->flags & IFF_PROMISC) { |
8c198884 | 2084 | jme->reg_rxmcs |= RXMCS_ALLFRAME; |
cd0ff491 | 2085 | } else if (netdev->flags & IFF_ALLMULTI) { |
8c198884 | 2086 | jme->reg_rxmcs |= RXMCS_ALLMULFRAME; |
cd0ff491 | 2087 | } else if (netdev->flags & IFF_MULTICAST) { |
3bf61c55 GFT |
2088 | struct dev_mc_list *mclist; |
2089 | int bit_nr; | |
d7699f87 | 2090 | |
8c198884 | 2091 | jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED; |
3bf61c55 GFT |
2092 | for (i = 0, mclist = netdev->mc_list; |
2093 | mclist && i < netdev->mc_count; | |
2094 | ++i, mclist = mclist->next) { | |
2095 | ||
cd0ff491 GFT |
2096 | bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F; |
2097 | mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); | |
2098 | } | |
d7699f87 | 2099 | |
4330c2f2 GFT |
2100 | jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]); |
2101 | jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]); | |
d7699f87 GFT |
2102 | } |
2103 | ||
d7699f87 | 2104 | wmb(); |
8c198884 GFT |
2105 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); |
2106 | ||
cd0ff491 | 2107 | spin_unlock_bh(&jme->rxmcs_lock); |
d7699f87 GFT |
2108 | } |
2109 | ||
3bf61c55 | 2110 | static int |
8c198884 | 2111 | jme_change_mtu(struct net_device *netdev, int new_mtu) |
d7699f87 | 2112 | { |
cd0ff491 | 2113 | struct jme_adapter *jme = netdev_priv(netdev); |
79ce639c | 2114 | |
cd0ff491 | 2115 | if (new_mtu == jme->old_mtu) |
29bdd921 GFT |
2116 | return 0; |
2117 | ||
cd0ff491 GFT |
2118 | if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || |
2119 | ((new_mtu) < IPV6_MIN_MTU)) | |
2120 | return -EINVAL; | |
79ce639c | 2121 | |
cd0ff491 | 2122 | if (new_mtu > 4000) { |
79ce639c GFT |
2123 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2124 | jme->reg_rxcs |= RXCS_FIFOTHNP_64QW; | |
2125 | jme_restart_rx_engine(jme); | |
cd0ff491 | 2126 | } else { |
79ce639c GFT |
2127 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; |
2128 | jme->reg_rxcs |= RXCS_FIFOTHNP_128QW; | |
2129 | jme_restart_rx_engine(jme); | |
2130 | } | |
2131 | ||
cd0ff491 | 2132 | if (new_mtu > 1900) { |
b3821cc5 GFT |
2133 | netdev->features &= ~(NETIF_F_HW_CSUM | |
2134 | NETIF_F_TSO | | |
2135 | NETIF_F_TSO6); | |
cd0ff491 GFT |
2136 | } else { |
2137 | if (test_bit(JME_FLAG_TXCSUM, &jme->flags)) | |
b3821cc5 | 2138 | netdev->features |= NETIF_F_HW_CSUM; |
cd0ff491 | 2139 | if (test_bit(JME_FLAG_TSO, &jme->flags)) |
b3821cc5 | 2140 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
79ce639c GFT |
2141 | } |
2142 | ||
cd0ff491 GFT |
2143 | netdev->mtu = new_mtu; |
2144 | jme_reset_link(jme); | |
79ce639c GFT |
2145 | |
2146 | return 0; | |
d7699f87 GFT |
2147 | } |
2148 | ||
cd0ff491 GFT |
2149 | static int |
2150 | jme_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
2151 | { | |
2152 | struct jme_adapter *jme = netdev_priv(netdev); | |
2153 | struct jme_spi_op spiop; | |
2154 | int rc; | |
2155 | ||
2156 | switch (cmd) { | |
2157 | case JMESPIIOCTL: | |
2158 | if (!capable(CAP_NET_ADMIN)) | |
2159 | return -EPERM; | |
2160 | ||
2161 | copy_from_user(&spiop, ifr->ifr_data, | |
2162 | sizeof(struct jme_spi_op)); | |
2163 | spiop.kwbuf = kmalloc(spiop.wn, GFP_KERNEL); | |
2164 | if (!spiop.kwbuf) { | |
2165 | rc = -ENOMEM; | |
2166 | goto out; | |
2167 | } | |
2168 | spiop.krbuf = kmalloc(spiop.rn, GFP_KERNEL); | |
2169 | if (!spiop.krbuf) { | |
2170 | rc = -ENOMEM; | |
2171 | goto out_free1; | |
2172 | } | |
2173 | copy_from_user(spiop.kwbuf, spiop.uwbuf, spiop.wn); | |
2174 | rc = jme_spi_op(jme, &spiop); | |
2175 | if (rc) | |
2176 | goto out_free; | |
2177 | copy_to_user(spiop.urbuf, spiop.krbuf, spiop.rn); | |
2178 | out_free: | |
2179 | kfree(spiop.krbuf); | |
2180 | out_free1: | |
2181 | kfree(spiop.kwbuf); | |
2182 | out: | |
2183 | return rc; | |
2184 | default: | |
2185 | break; | |
2186 | } | |
2187 | ||
2188 | return -EOPNOTSUPP; | |
2189 | } | |
2190 | ||
8c198884 GFT |
2191 | static void |
2192 | jme_tx_timeout(struct net_device *netdev) | |
2193 | { | |
cd0ff491 | 2194 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 | 2195 | |
cdcdc9eb GFT |
2196 | jme->phylink = 0; |
2197 | jme_reset_phy_processor(jme); | |
cd0ff491 | 2198 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
cdcdc9eb GFT |
2199 | jme_set_settings(netdev, &jme->old_ecmd); |
2200 | ||
8c198884 | 2201 | /* |
cdcdc9eb | 2202 | * Force to Reset the link again |
8c198884 | 2203 | */ |
29bdd921 | 2204 | jme_reset_link(jme); |
8c198884 GFT |
2205 | } |
2206 | ||
42b1055e GFT |
2207 | static void |
2208 | jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
2209 | { | |
2210 | struct jme_adapter *jme = netdev_priv(netdev); | |
2211 | ||
2212 | jme->vlgrp = grp; | |
2213 | } | |
2214 | ||
3bf61c55 GFT |
2215 | static void |
2216 | jme_get_drvinfo(struct net_device *netdev, | |
2217 | struct ethtool_drvinfo *info) | |
d7699f87 | 2218 | { |
cd0ff491 | 2219 | struct jme_adapter *jme = netdev_priv(netdev); |
d7699f87 | 2220 | |
cd0ff491 GFT |
2221 | strcpy(info->driver, DRV_NAME); |
2222 | strcpy(info->version, DRV_VERSION); | |
2223 | strcpy(info->bus_info, pci_name(jme->pdev)); | |
d7699f87 GFT |
2224 | } |
2225 | ||
8c198884 GFT |
2226 | static int |
2227 | jme_get_regs_len(struct net_device *netdev) | |
2228 | { | |
cd0ff491 | 2229 | return JME_REG_LEN; |
8c198884 GFT |
2230 | } |
2231 | ||
2232 | static void | |
cd0ff491 | 2233 | mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len) |
8c198884 GFT |
2234 | { |
2235 | int i; | |
2236 | ||
cd0ff491 | 2237 | for (i = 0 ; i < len ; i += 4) |
79ce639c | 2238 | p[i >> 2] = jread32(jme, reg + i); |
186fc259 | 2239 | } |
8c198884 | 2240 | |
186fc259 | 2241 | static void |
cd0ff491 | 2242 | mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) |
186fc259 GFT |
2243 | { |
2244 | int i; | |
cd0ff491 | 2245 | u16 *p16 = (u16 *)p; |
186fc259 | 2246 | |
cd0ff491 | 2247 | for (i = 0 ; i < reg_nr ; ++i) |
186fc259 | 2248 | p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i); |
8c198884 GFT |
2249 | } |
2250 | ||
2251 | static void | |
2252 | jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) | |
2253 | { | |
cd0ff491 GFT |
2254 | struct jme_adapter *jme = netdev_priv(netdev); |
2255 | u32 *p32 = (u32 *)p; | |
8c198884 | 2256 | |
186fc259 | 2257 | memset(p, 0xFF, JME_REG_LEN); |
8c198884 GFT |
2258 | |
2259 | regs->version = 1; | |
2260 | mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN); | |
2261 | ||
2262 | p32 += 0x100 >> 2; | |
2263 | mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN); | |
2264 | ||
2265 | p32 += 0x100 >> 2; | |
2266 | mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN); | |
2267 | ||
2268 | p32 += 0x100 >> 2; | |
2269 | mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN); | |
2270 | ||
186fc259 GFT |
2271 | p32 += 0x100 >> 2; |
2272 | mdio_memcpy(jme, p32, JME_PHY_REG_NR); | |
8c198884 GFT |
2273 | } |
2274 | ||
2275 | static int | |
2276 | jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2277 | { | |
2278 | struct jme_adapter *jme = netdev_priv(netdev); | |
2279 | ||
8c198884 GFT |
2280 | ecmd->tx_coalesce_usecs = PCC_TX_TO; |
2281 | ecmd->tx_max_coalesced_frames = PCC_TX_CNT; | |
2282 | ||
cd0ff491 | 2283 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { |
cdcdc9eb GFT |
2284 | ecmd->use_adaptive_rx_coalesce = false; |
2285 | ecmd->rx_coalesce_usecs = 0; | |
2286 | ecmd->rx_max_coalesced_frames = 0; | |
2287 | return 0; | |
2288 | } | |
2289 | ||
2290 | ecmd->use_adaptive_rx_coalesce = true; | |
2291 | ||
cd0ff491 | 2292 | switch (jme->dpi.cur) { |
8c198884 GFT |
2293 | case PCC_P1: |
2294 | ecmd->rx_coalesce_usecs = PCC_P1_TO; | |
2295 | ecmd->rx_max_coalesced_frames = PCC_P1_CNT; | |
2296 | break; | |
2297 | case PCC_P2: | |
2298 | ecmd->rx_coalesce_usecs = PCC_P2_TO; | |
2299 | ecmd->rx_max_coalesced_frames = PCC_P2_CNT; | |
2300 | break; | |
2301 | case PCC_P3: | |
2302 | ecmd->rx_coalesce_usecs = PCC_P3_TO; | |
2303 | ecmd->rx_max_coalesced_frames = PCC_P3_CNT; | |
2304 | break; | |
2305 | default: | |
2306 | break; | |
2307 | } | |
2308 | ||
2309 | return 0; | |
2310 | } | |
2311 | ||
192570e0 GFT |
2312 | static int |
2313 | jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2314 | { | |
2315 | struct jme_adapter *jme = netdev_priv(netdev); | |
2316 | struct dynpcc_info *dpi = &(jme->dpi); | |
2317 | ||
cd0ff491 | 2318 | if (netif_running(netdev)) |
cdcdc9eb GFT |
2319 | return -EBUSY; |
2320 | ||
cd0ff491 GFT |
2321 | if (ecmd->use_adaptive_rx_coalesce |
2322 | && test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2323 | clear_bit(JME_FLAG_POLL, &jme->flags); | |
cdcdc9eb GFT |
2324 | jme->jme_rx = netif_rx; |
2325 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
192570e0 GFT |
2326 | dpi->cur = PCC_P1; |
2327 | dpi->attempt = PCC_P1; | |
2328 | dpi->cnt = 0; | |
2329 | jme_set_rx_pcc(jme, PCC_P1); | |
2330 | jme_interrupt_mode(jme); | |
cd0ff491 GFT |
2331 | } else if (!(ecmd->use_adaptive_rx_coalesce) |
2332 | && !(test_bit(JME_FLAG_POLL, &jme->flags))) { | |
2333 | set_bit(JME_FLAG_POLL, &jme->flags); | |
cdcdc9eb GFT |
2334 | jme->jme_rx = netif_receive_skb; |
2335 | jme->jme_vlan_rx = vlan_hwaccel_receive_skb; | |
192570e0 GFT |
2336 | jme_interrupt_mode(jme); |
2337 | } | |
2338 | ||
2339 | return 0; | |
2340 | } | |
2341 | ||
8c198884 GFT |
2342 | static void |
2343 | jme_get_pauseparam(struct net_device *netdev, | |
2344 | struct ethtool_pauseparam *ecmd) | |
2345 | { | |
2346 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2347 | u32 val; |
8c198884 GFT |
2348 | |
2349 | ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0; | |
2350 | ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0; | |
2351 | ||
cd0ff491 GFT |
2352 | spin_lock_bh(&jme->phy_lock); |
2353 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2354 | spin_unlock_bh(&jme->phy_lock); | |
b3821cc5 GFT |
2355 | |
2356 | ecmd->autoneg = | |
2357 | (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0; | |
8c198884 GFT |
2358 | } |
2359 | ||
2360 | static int | |
2361 | jme_set_pauseparam(struct net_device *netdev, | |
2362 | struct ethtool_pauseparam *ecmd) | |
2363 | { | |
2364 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2365 | u32 val; |
8c198884 | 2366 | |
cd0ff491 | 2367 | if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^ |
8c198884 GFT |
2368 | (ecmd->tx_pause != 0)) { |
2369 | ||
cd0ff491 | 2370 | if (ecmd->tx_pause) |
8c198884 GFT |
2371 | jme->reg_txpfc |= TXPFC_PF_EN; |
2372 | else | |
2373 | jme->reg_txpfc &= ~TXPFC_PF_EN; | |
2374 | ||
2375 | jwrite32(jme, JME_TXPFC, jme->reg_txpfc); | |
2376 | } | |
2377 | ||
cd0ff491 GFT |
2378 | spin_lock_bh(&jme->rxmcs_lock); |
2379 | if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^ | |
8c198884 GFT |
2380 | (ecmd->rx_pause != 0)) { |
2381 | ||
cd0ff491 | 2382 | if (ecmd->rx_pause) |
8c198884 GFT |
2383 | jme->reg_rxmcs |= RXMCS_FLOWCTRL; |
2384 | else | |
2385 | jme->reg_rxmcs &= ~RXMCS_FLOWCTRL; | |
2386 | ||
2387 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2388 | } | |
cd0ff491 | 2389 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 | 2390 | |
cd0ff491 GFT |
2391 | spin_lock_bh(&jme->phy_lock); |
2392 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2393 | if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^ | |
8c198884 GFT |
2394 | (ecmd->autoneg != 0)) { |
2395 | ||
cd0ff491 | 2396 | if (ecmd->autoneg) |
8c198884 GFT |
2397 | val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); |
2398 | else | |
2399 | val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
2400 | ||
b3821cc5 GFT |
2401 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, |
2402 | MII_ADVERTISE, val); | |
8c198884 | 2403 | } |
cd0ff491 | 2404 | spin_unlock_bh(&jme->phy_lock); |
8c198884 GFT |
2405 | |
2406 | return 0; | |
2407 | } | |
2408 | ||
29bdd921 GFT |
2409 | static void |
2410 | jme_get_wol(struct net_device *netdev, | |
2411 | struct ethtool_wolinfo *wol) | |
2412 | { | |
2413 | struct jme_adapter *jme = netdev_priv(netdev); | |
2414 | ||
2415 | wol->supported = WAKE_MAGIC | WAKE_PHY; | |
2416 | ||
2417 | wol->wolopts = 0; | |
2418 | ||
cd0ff491 | 2419 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
29bdd921 GFT |
2420 | wol->wolopts |= WAKE_PHY; |
2421 | ||
cd0ff491 | 2422 | if (jme->reg_pmcs & PMCS_MFEN) |
29bdd921 GFT |
2423 | wol->wolopts |= WAKE_MAGIC; |
2424 | ||
2425 | } | |
2426 | ||
2427 | static int | |
2428 | jme_set_wol(struct net_device *netdev, | |
2429 | struct ethtool_wolinfo *wol) | |
2430 | { | |
2431 | struct jme_adapter *jme = netdev_priv(netdev); | |
2432 | ||
cd0ff491 | 2433 | if (wol->wolopts & (WAKE_MAGICSECURE | |
29bdd921 GFT |
2434 | WAKE_UCAST | |
2435 | WAKE_MCAST | | |
2436 | WAKE_BCAST | | |
2437 | WAKE_ARP)) | |
2438 | return -EOPNOTSUPP; | |
2439 | ||
2440 | jme->reg_pmcs = 0; | |
2441 | ||
cd0ff491 | 2442 | if (wol->wolopts & WAKE_PHY) |
29bdd921 GFT |
2443 | jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN; |
2444 | ||
cd0ff491 | 2445 | if (wol->wolopts & WAKE_MAGIC) |
29bdd921 GFT |
2446 | jme->reg_pmcs |= PMCS_MFEN; |
2447 | ||
cd0ff491 | 2448 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
42b1055e | 2449 | |
29bdd921 GFT |
2450 | return 0; |
2451 | } | |
b3821cc5 | 2452 | |
3bf61c55 GFT |
2453 | static int |
2454 | jme_get_settings(struct net_device *netdev, | |
2455 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2456 | { |
2457 | struct jme_adapter *jme = netdev_priv(netdev); | |
2458 | int rc; | |
8c198884 | 2459 | |
cd0ff491 | 2460 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2461 | rc = mii_ethtool_gset(&(jme->mii_if), ecmd); |
cd0ff491 | 2462 | spin_unlock_bh(&jme->phy_lock); |
d7699f87 GFT |
2463 | return rc; |
2464 | } | |
2465 | ||
3bf61c55 GFT |
2466 | static int |
2467 | jme_set_settings(struct net_device *netdev, | |
2468 | struct ethtool_cmd *ecmd) | |
d7699f87 GFT |
2469 | { |
2470 | struct jme_adapter *jme = netdev_priv(netdev); | |
cd0ff491 | 2471 | int rc, fdc = 0; |
fcf45b4c | 2472 | |
cd0ff491 | 2473 | if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE) |
8c198884 GFT |
2474 | return -EINVAL; |
2475 | ||
cd0ff491 | 2476 | if (jme->mii_if.force_media && |
79ce639c GFT |
2477 | ecmd->autoneg != AUTONEG_ENABLE && |
2478 | (jme->mii_if.full_duplex != ecmd->duplex)) | |
2479 | fdc = 1; | |
2480 | ||
cd0ff491 | 2481 | spin_lock_bh(&jme->phy_lock); |
d7699f87 | 2482 | rc = mii_ethtool_sset(&(jme->mii_if), ecmd); |
cd0ff491 | 2483 | spin_unlock_bh(&jme->phy_lock); |
fcf45b4c | 2484 | |
cd0ff491 | 2485 | if (!rc && fdc) |
79ce639c GFT |
2486 | jme_reset_link(jme); |
2487 | ||
cd0ff491 GFT |
2488 | if (!rc) { |
2489 | set_bit(JME_FLAG_SSET, &jme->flags); | |
29bdd921 GFT |
2490 | jme->old_ecmd = *ecmd; |
2491 | } | |
2492 | ||
d7699f87 GFT |
2493 | return rc; |
2494 | } | |
2495 | ||
cd0ff491 | 2496 | static u32 |
3bf61c55 GFT |
2497 | jme_get_link(struct net_device *netdev) |
2498 | { | |
d7699f87 GFT |
2499 | struct jme_adapter *jme = netdev_priv(netdev); |
2500 | return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP; | |
2501 | } | |
2502 | ||
8c198884 | 2503 | static u32 |
cd0ff491 GFT |
2504 | jme_get_msglevel(struct net_device *netdev) |
2505 | { | |
2506 | struct jme_adapter *jme = netdev_priv(netdev); | |
2507 | return jme->msg_enable; | |
2508 | } | |
2509 | ||
2510 | static void | |
2511 | jme_set_msglevel(struct net_device *netdev, u32 value) | |
8c198884 | 2512 | { |
cd0ff491 GFT |
2513 | struct jme_adapter *jme = netdev_priv(netdev); |
2514 | jme->msg_enable = value; | |
2515 | } | |
8c198884 | 2516 | |
cd0ff491 GFT |
2517 | static u32 |
2518 | jme_get_rx_csum(struct net_device *netdev) | |
2519 | { | |
2520 | struct jme_adapter *jme = netdev_priv(netdev); | |
8c198884 GFT |
2521 | return jme->reg_rxmcs & RXMCS_CHECKSUM; |
2522 | } | |
2523 | ||
2524 | static int | |
2525 | jme_set_rx_csum(struct net_device *netdev, u32 on) | |
2526 | { | |
cd0ff491 | 2527 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2528 | |
cd0ff491 GFT |
2529 | spin_lock_bh(&jme->rxmcs_lock); |
2530 | if (on) | |
8c198884 GFT |
2531 | jme->reg_rxmcs |= RXMCS_CHECKSUM; |
2532 | else | |
2533 | jme->reg_rxmcs &= ~RXMCS_CHECKSUM; | |
2534 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
cd0ff491 | 2535 | spin_unlock_bh(&jme->rxmcs_lock); |
8c198884 GFT |
2536 | |
2537 | return 0; | |
2538 | } | |
2539 | ||
2540 | static int | |
2541 | jme_set_tx_csum(struct net_device *netdev, u32 on) | |
2542 | { | |
cd0ff491 | 2543 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2544 | |
cd0ff491 GFT |
2545 | if (on) { |
2546 | set_bit(JME_FLAG_TXCSUM, &jme->flags); | |
2547 | if (netdev->mtu <= 1900) | |
b3821cc5 | 2548 | netdev->features |= NETIF_F_HW_CSUM; |
cd0ff491 GFT |
2549 | } else { |
2550 | clear_bit(JME_FLAG_TXCSUM, &jme->flags); | |
8c198884 | 2551 | netdev->features &= ~NETIF_F_HW_CSUM; |
b3821cc5 | 2552 | } |
8c198884 GFT |
2553 | |
2554 | return 0; | |
2555 | } | |
2556 | ||
b3821cc5 GFT |
2557 | static int |
2558 | jme_set_tso(struct net_device *netdev, u32 on) | |
2559 | { | |
cd0ff491 | 2560 | struct jme_adapter *jme = netdev_priv(netdev); |
b3821cc5 | 2561 | |
cd0ff491 GFT |
2562 | if (on) { |
2563 | set_bit(JME_FLAG_TSO, &jme->flags); | |
2564 | if (netdev->mtu <= 1900) | |
b3821cc5 | 2565 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; |
cd0ff491 GFT |
2566 | } else { |
2567 | clear_bit(JME_FLAG_TSO, &jme->flags); | |
2568 | netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); | |
b3821cc5 GFT |
2569 | } |
2570 | ||
cd0ff491 | 2571 | return 0; |
b3821cc5 GFT |
2572 | } |
2573 | ||
8c198884 GFT |
2574 | static int |
2575 | jme_nway_reset(struct net_device *netdev) | |
2576 | { | |
cd0ff491 | 2577 | struct jme_adapter *jme = netdev_priv(netdev); |
8c198884 GFT |
2578 | jme_restart_an(jme); |
2579 | return 0; | |
2580 | } | |
2581 | ||
cd0ff491 | 2582 | static u8 |
186fc259 GFT |
2583 | jme_smb_read(struct jme_adapter *jme, unsigned int addr) |
2584 | { | |
cd0ff491 | 2585 | u32 val; |
186fc259 GFT |
2586 | int to; |
2587 | ||
2588 | val = jread32(jme, JME_SMBCSR); | |
2589 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2590 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2591 | msleep(1); |
2592 | val = jread32(jme, JME_SMBCSR); | |
2593 | } | |
cd0ff491 GFT |
2594 | if (!to) { |
2595 | msg_hw(jme, "SMB Bus Busy.\n"); | |
186fc259 GFT |
2596 | return 0xFF; |
2597 | } | |
2598 | ||
2599 | jwrite32(jme, JME_SMBINTF, | |
2600 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2601 | SMBINTF_HWRWN_READ | | |
2602 | SMBINTF_HWCMD); | |
2603 | ||
2604 | val = jread32(jme, JME_SMBINTF); | |
2605 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2606 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2607 | msleep(1); |
2608 | val = jread32(jme, JME_SMBINTF); | |
2609 | } | |
cd0ff491 GFT |
2610 | if (!to) { |
2611 | msg_hw(jme, "SMB Bus Busy.\n"); | |
186fc259 GFT |
2612 | return 0xFF; |
2613 | } | |
2614 | ||
2615 | return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT; | |
2616 | } | |
2617 | ||
2618 | static void | |
cd0ff491 | 2619 | jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data) |
186fc259 | 2620 | { |
cd0ff491 | 2621 | u32 val; |
186fc259 GFT |
2622 | int to; |
2623 | ||
2624 | val = jread32(jme, JME_SMBCSR); | |
2625 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2626 | while ((val & SMBCSR_BUSY) && --to) { |
186fc259 GFT |
2627 | msleep(1); |
2628 | val = jread32(jme, JME_SMBCSR); | |
2629 | } | |
cd0ff491 GFT |
2630 | if (!to) { |
2631 | msg_hw(jme, "SMB Bus Busy.\n"); | |
186fc259 GFT |
2632 | return; |
2633 | } | |
2634 | ||
2635 | jwrite32(jme, JME_SMBINTF, | |
2636 | ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) | | |
2637 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2638 | SMBINTF_HWRWN_WRITE | | |
2639 | SMBINTF_HWCMD); | |
2640 | ||
2641 | val = jread32(jme, JME_SMBINTF); | |
2642 | to = JME_SMB_BUSY_TIMEOUT; | |
cd0ff491 | 2643 | while ((val & SMBINTF_HWCMD) && --to) { |
186fc259 GFT |
2644 | msleep(1); |
2645 | val = jread32(jme, JME_SMBINTF); | |
2646 | } | |
cd0ff491 GFT |
2647 | if (!to) { |
2648 | msg_hw(jme, "SMB Bus Busy.\n"); | |
186fc259 GFT |
2649 | return; |
2650 | } | |
2651 | ||
2652 | mdelay(2); | |
2653 | } | |
2654 | ||
2655 | static int | |
2656 | jme_get_eeprom_len(struct net_device *netdev) | |
2657 | { | |
cd0ff491 GFT |
2658 | struct jme_adapter *jme = netdev_priv(netdev); |
2659 | u32 val; | |
186fc259 | 2660 | val = jread32(jme, JME_SMBCSR); |
cd0ff491 | 2661 | return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0; |
186fc259 GFT |
2662 | } |
2663 | ||
2664 | static int | |
2665 | jme_get_eeprom(struct net_device *netdev, | |
2666 | struct ethtool_eeprom *eeprom, u8 *data) | |
2667 | { | |
cd0ff491 | 2668 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2669 | int i, offset = eeprom->offset, len = eeprom->len; |
2670 | ||
2671 | /* | |
8d27293f | 2672 | * ethtool will check the boundary for us |
186fc259 GFT |
2673 | */ |
2674 | eeprom->magic = JME_EEPROM_MAGIC; | |
cd0ff491 | 2675 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2676 | data[i] = jme_smb_read(jme, i + offset); |
2677 | ||
2678 | return 0; | |
2679 | } | |
2680 | ||
2681 | static int | |
2682 | jme_set_eeprom(struct net_device *netdev, | |
2683 | struct ethtool_eeprom *eeprom, u8 *data) | |
2684 | { | |
cd0ff491 | 2685 | struct jme_adapter *jme = netdev_priv(netdev); |
186fc259 GFT |
2686 | int i, offset = eeprom->offset, len = eeprom->len; |
2687 | ||
2688 | if (eeprom->magic != JME_EEPROM_MAGIC) | |
2689 | return -EINVAL; | |
2690 | ||
2691 | /* | |
8d27293f | 2692 | * ethtool will check the boundary for us |
186fc259 | 2693 | */ |
cd0ff491 | 2694 | for (i = 0 ; i < len ; ++i) |
186fc259 GFT |
2695 | jme_smb_write(jme, i + offset, data[i]); |
2696 | ||
2697 | return 0; | |
2698 | } | |
2699 | ||
d7699f87 | 2700 | static const struct ethtool_ops jme_ethtool_ops = { |
cd0ff491 | 2701 | .get_drvinfo = jme_get_drvinfo, |
8c198884 GFT |
2702 | .get_regs_len = jme_get_regs_len, |
2703 | .get_regs = jme_get_regs, | |
2704 | .get_coalesce = jme_get_coalesce, | |
192570e0 | 2705 | .set_coalesce = jme_set_coalesce, |
cd0ff491 GFT |
2706 | .get_pauseparam = jme_get_pauseparam, |
2707 | .set_pauseparam = jme_set_pauseparam, | |
29bdd921 GFT |
2708 | .get_wol = jme_get_wol, |
2709 | .set_wol = jme_set_wol, | |
d7699f87 GFT |
2710 | .get_settings = jme_get_settings, |
2711 | .set_settings = jme_set_settings, | |
2712 | .get_link = jme_get_link, | |
cd0ff491 GFT |
2713 | .get_msglevel = jme_get_msglevel, |
2714 | .set_msglevel = jme_set_msglevel, | |
8c198884 GFT |
2715 | .get_rx_csum = jme_get_rx_csum, |
2716 | .set_rx_csum = jme_set_rx_csum, | |
2717 | .set_tx_csum = jme_set_tx_csum, | |
b3821cc5 GFT |
2718 | .set_tso = jme_set_tso, |
2719 | .set_sg = ethtool_op_set_sg, | |
8c198884 | 2720 | .nway_reset = jme_nway_reset, |
186fc259 GFT |
2721 | .get_eeprom_len = jme_get_eeprom_len, |
2722 | .get_eeprom = jme_get_eeprom, | |
2723 | .set_eeprom = jme_set_eeprom, | |
d7699f87 GFT |
2724 | }; |
2725 | ||
3bf61c55 GFT |
2726 | static int |
2727 | jme_pci_dma64(struct pci_dev *pdev) | |
d7699f87 | 2728 | { |
cd0ff491 GFT |
2729 | if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) |
2730 | if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) | |
3bf61c55 GFT |
2731 | return 1; |
2732 | ||
cd0ff491 GFT |
2733 | if (!pci_set_dma_mask(pdev, DMA_40BIT_MASK)) |
2734 | if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK)) | |
8c198884 GFT |
2735 | return 1; |
2736 | ||
cd0ff491 GFT |
2737 | if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) |
2738 | if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) | |
3bf61c55 GFT |
2739 | return 0; |
2740 | ||
2741 | return -1; | |
2742 | } | |
2743 | ||
cd0ff491 | 2744 | static inline void |
cdcdc9eb GFT |
2745 | jme_phy_init(struct jme_adapter *jme) |
2746 | { | |
cd0ff491 | 2747 | u16 reg26; |
cdcdc9eb GFT |
2748 | |
2749 | reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26); | |
2750 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000); | |
2751 | } | |
2752 | ||
cd0ff491 | 2753 | static inline void |
cdcdc9eb | 2754 | jme_check_hw_ver(struct jme_adapter *jme) |
42b1055e | 2755 | { |
cd0ff491 | 2756 | u32 chipmode; |
cdcdc9eb GFT |
2757 | |
2758 | chipmode = jread32(jme, JME_CHIPMODE); | |
2759 | ||
2760 | jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT; | |
2761 | jme->chipver = (chipmode & CM_CHIPVER_MASK) >> CM_CHIPVER_SHIFT; | |
42b1055e GFT |
2762 | } |
2763 | ||
3bf61c55 GFT |
2764 | static int __devinit |
2765 | jme_init_one(struct pci_dev *pdev, | |
2766 | const struct pci_device_id *ent) | |
2767 | { | |
cdcdc9eb | 2768 | int rc = 0, using_dac, i; |
d7699f87 GFT |
2769 | struct net_device *netdev; |
2770 | struct jme_adapter *jme; | |
cd0ff491 GFT |
2771 | u16 bmcr, bmsr; |
2772 | u32 apmc; | |
d7699f87 GFT |
2773 | |
2774 | /* | |
2775 | * set up PCI device basics | |
2776 | */ | |
4330c2f2 | 2777 | rc = pci_enable_device(pdev); |
cd0ff491 GFT |
2778 | if (rc) { |
2779 | jeprintk(pdev, "Cannot enable PCI device.\n"); | |
4330c2f2 GFT |
2780 | goto err_out; |
2781 | } | |
d7699f87 | 2782 | |
3bf61c55 | 2783 | using_dac = jme_pci_dma64(pdev); |
cd0ff491 GFT |
2784 | if (using_dac < 0) { |
2785 | jeprintk(pdev, "Cannot set PCI DMA Mask.\n"); | |
3bf61c55 GFT |
2786 | rc = -EIO; |
2787 | goto err_out_disable_pdev; | |
2788 | } | |
2789 | ||
cd0ff491 GFT |
2790 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
2791 | jeprintk(pdev, "No PCI resource region found.\n"); | |
4330c2f2 GFT |
2792 | rc = -ENOMEM; |
2793 | goto err_out_disable_pdev; | |
2794 | } | |
d7699f87 | 2795 | |
4330c2f2 | 2796 | rc = pci_request_regions(pdev, DRV_NAME); |
cd0ff491 GFT |
2797 | if (rc) { |
2798 | jeprintk(pdev, "Cannot obtain PCI resource region.\n"); | |
4330c2f2 GFT |
2799 | goto err_out_disable_pdev; |
2800 | } | |
d7699f87 GFT |
2801 | |
2802 | pci_set_master(pdev); | |
2803 | ||
2804 | /* | |
2805 | * alloc and init net device | |
2806 | */ | |
3bf61c55 | 2807 | netdev = alloc_etherdev(sizeof(*jme)); |
cd0ff491 GFT |
2808 | if (!netdev) { |
2809 | jeprintk(pdev, "Cannot allocate netdev structure.\n"); | |
4330c2f2 GFT |
2810 | rc = -ENOMEM; |
2811 | goto err_out_release_regions; | |
d7699f87 GFT |
2812 | } |
2813 | netdev->open = jme_open; | |
2814 | netdev->stop = jme_close; | |
2815 | netdev->hard_start_xmit = jme_start_xmit; | |
d7699f87 GFT |
2816 | netdev->set_mac_address = jme_set_macaddr; |
2817 | netdev->set_multicast_list = jme_set_multi; | |
2818 | netdev->change_mtu = jme_change_mtu; | |
cd0ff491 | 2819 | netdev->do_ioctl = jme_ioctl; |
d7699f87 | 2820 | netdev->ethtool_ops = &jme_ethtool_ops; |
8c198884 GFT |
2821 | netdev->tx_timeout = jme_tx_timeout; |
2822 | netdev->watchdog_timeo = TX_TIMEOUT; | |
42b1055e | 2823 | netdev->vlan_rx_register = jme_vlan_rx_register; |
3bf61c55 | 2824 | NETDEV_GET_STATS(netdev, &jme_get_stats); |
42b1055e | 2825 | netdev->features = NETIF_F_HW_CSUM | |
b3821cc5 GFT |
2826 | NETIF_F_SG | |
2827 | NETIF_F_TSO | | |
2828 | NETIF_F_TSO6 | | |
42b1055e GFT |
2829 | NETIF_F_HW_VLAN_TX | |
2830 | NETIF_F_HW_VLAN_RX; | |
cd0ff491 | 2831 | if (using_dac) |
8c198884 | 2832 | netdev->features |= NETIF_F_HIGHDMA; |
d7699f87 GFT |
2833 | |
2834 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
2835 | pci_set_drvdata(pdev, netdev); | |
2836 | ||
2837 | /* | |
2838 | * init adapter info | |
2839 | */ | |
2840 | jme = netdev_priv(netdev); | |
2841 | jme->pdev = pdev; | |
2842 | jme->dev = netdev; | |
cdcdc9eb GFT |
2843 | jme->jme_rx = netif_rx; |
2844 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
29bdd921 | 2845 | jme->old_mtu = netdev->mtu = 1500; |
fcf45b4c | 2846 | jme->phylink = 0; |
b3821cc5 GFT |
2847 | jme->tx_ring_size = 1 << 10; |
2848 | jme->tx_ring_mask = jme->tx_ring_size - 1; | |
2849 | jme->tx_wake_threshold = 1 << 9; | |
2850 | jme->rx_ring_size = 1 << 9; | |
2851 | jme->rx_ring_mask = jme->rx_ring_size - 1; | |
cd0ff491 | 2852 | jme->msg_enable = JME_DEF_MSG_ENABLE; |
d7699f87 GFT |
2853 | jme->regs = ioremap(pci_resource_start(pdev, 0), |
2854 | pci_resource_len(pdev, 0)); | |
4330c2f2 | 2855 | if (!(jme->regs)) { |
cd0ff491 | 2856 | jeprintk(pdev, "Mapping PCI resource region error.\n"); |
d7699f87 GFT |
2857 | rc = -ENOMEM; |
2858 | goto err_out_free_netdev; | |
2859 | } | |
4330c2f2 | 2860 | jme->shadow_regs = pci_alloc_consistent(pdev, |
cd0ff491 GFT |
2861 | sizeof(u32) * SHADOW_REG_NR, |
2862 | &(jme->shadow_dma)); | |
4330c2f2 | 2863 | if (!(jme->shadow_regs)) { |
cd0ff491 | 2864 | jeprintk(pdev, "Allocating shadow register mapping error.\n"); |
4330c2f2 GFT |
2865 | rc = -ENOMEM; |
2866 | goto err_out_unmap; | |
2867 | } | |
2868 | ||
cd0ff491 GFT |
2869 | if (no_pseudohp) { |
2870 | apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN; | |
2871 | jwrite32(jme, JME_APMC, apmc); | |
2872 | } else if (force_pseudohp) { | |
2873 | apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN; | |
2874 | jwrite32(jme, JME_APMC, apmc); | |
2875 | } | |
2876 | ||
cdcdc9eb | 2877 | NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2) |
192570e0 | 2878 | |
d7699f87 | 2879 | spin_lock_init(&jme->phy_lock); |
fcf45b4c | 2880 | spin_lock_init(&jme->macaddr_lock); |
8c198884 | 2881 | spin_lock_init(&jme->rxmcs_lock); |
fcf45b4c | 2882 | |
fcf45b4c GFT |
2883 | atomic_set(&jme->link_changing, 1); |
2884 | atomic_set(&jme->rx_cleaning, 1); | |
2885 | atomic_set(&jme->tx_cleaning, 1); | |
192570e0 | 2886 | atomic_set(&jme->rx_empty, 1); |
fcf45b4c | 2887 | |
79ce639c GFT |
2888 | tasklet_init(&jme->pcc_task, |
2889 | &jme_pcc_tasklet, | |
2890 | (unsigned long) jme); | |
4330c2f2 GFT |
2891 | tasklet_init(&jme->linkch_task, |
2892 | &jme_link_change_tasklet, | |
2893 | (unsigned long) jme); | |
2894 | tasklet_init(&jme->txclean_task, | |
2895 | &jme_tx_clean_tasklet, | |
2896 | (unsigned long) jme); | |
2897 | tasklet_init(&jme->rxclean_task, | |
2898 | &jme_rx_clean_tasklet, | |
2899 | (unsigned long) jme); | |
fcf45b4c GFT |
2900 | tasklet_init(&jme->rxempty_task, |
2901 | &jme_rx_empty_tasklet, | |
2902 | (unsigned long) jme); | |
cd0ff491 GFT |
2903 | tasklet_disable_nosync(&jme->txclean_task); |
2904 | tasklet_disable_nosync(&jme->rxclean_task); | |
2905 | tasklet_disable_nosync(&jme->rxempty_task); | |
8c198884 GFT |
2906 | jme->dpi.cur = PCC_P1; |
2907 | ||
cd0ff491 | 2908 | jme->reg_ghc = 0; |
79ce639c | 2909 | jme->reg_rxcs = RXCS_DEFAULT; |
8c198884 GFT |
2910 | jme->reg_rxmcs = RXMCS_DEFAULT; |
2911 | jme->reg_txpfc = 0; | |
47220951 | 2912 | jme->reg_pmcs = PMCS_MFEN; |
cd0ff491 GFT |
2913 | set_bit(JME_FLAG_TXCSUM, &jme->flags); |
2914 | set_bit(JME_FLAG_TSO, &jme->flags); | |
192570e0 | 2915 | |
fcf45b4c GFT |
2916 | /* |
2917 | * Get Max Read Req Size from PCI Config Space | |
2918 | */ | |
cd0ff491 GFT |
2919 | pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs); |
2920 | jme->mrrs &= PCI_DCSR_MRRS_MASK; | |
2921 | switch (jme->mrrs) { | |
2922 | case MRRS_128B: | |
2923 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; | |
2924 | break; | |
2925 | case MRRS_256B: | |
2926 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; | |
2927 | break; | |
2928 | default: | |
2929 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; | |
2930 | break; | |
fcf45b4c GFT |
2931 | }; |
2932 | ||
d7699f87 | 2933 | /* |
cdcdc9eb | 2934 | * Must check before reset_mac_processor |
d7699f87 | 2935 | */ |
cdcdc9eb GFT |
2936 | jme_check_hw_ver(jme); |
2937 | jme->mii_if.dev = netdev; | |
cd0ff491 | 2938 | if (jme->fpgaver) { |
cdcdc9eb | 2939 | jme->mii_if.phy_id = 0; |
cd0ff491 | 2940 | for (i = 1 ; i < 32 ; ++i) { |
cdcdc9eb GFT |
2941 | bmcr = jme_mdio_read(netdev, i, MII_BMCR); |
2942 | bmsr = jme_mdio_read(netdev, i, MII_BMSR); | |
cd0ff491 | 2943 | if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { |
cdcdc9eb GFT |
2944 | jme->mii_if.phy_id = i; |
2945 | break; | |
2946 | } | |
2947 | } | |
2948 | ||
cd0ff491 | 2949 | if (!jme->mii_if.phy_id) { |
cdcdc9eb | 2950 | rc = -EIO; |
cd0ff491 | 2951 | jeprintk(pdev, "Can not find phy_id.\n"); |
cdcdc9eb GFT |
2952 | goto err_out_free_shadow; |
2953 | } | |
2954 | ||
2955 | jme->reg_ghc |= GHC_LINK_POLL; | |
cd0ff491 | 2956 | } else { |
cdcdc9eb GFT |
2957 | jme->mii_if.phy_id = 1; |
2958 | } | |
cd0ff491 | 2959 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) |
8d27293f GFT |
2960 | jme->mii_if.supports_gmii = true; |
2961 | else | |
2962 | jme->mii_if.supports_gmii = false; | |
cdcdc9eb GFT |
2963 | jme->mii_if.mdio_read = jme_mdio_read; |
2964 | jme->mii_if.mdio_write = jme_mdio_write; | |
2965 | ||
d7699f87 | 2966 | jme_clear_pm(jme); |
cd0ff491 GFT |
2967 | jme_set_gmii(jme); |
2968 | pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev); | |
2969 | if (!jme->fpgaver) | |
cdcdc9eb | 2970 | jme_phy_init(jme); |
42b1055e | 2971 | jme_phy_off(jme); |
cdcdc9eb GFT |
2972 | |
2973 | /* | |
2974 | * Reset MAC processor and reload EEPROM for MAC Address | |
2975 | */ | |
d7699f87 | 2976 | jme_reset_mac_processor(jme); |
4330c2f2 | 2977 | rc = jme_reload_eeprom(jme); |
cd0ff491 GFT |
2978 | if (rc) { |
2979 | jeprintk(pdev, | |
b3821cc5 | 2980 | "Reload eeprom for reading MAC Address error.\n"); |
4330c2f2 GFT |
2981 | goto err_out_free_shadow; |
2982 | } | |
d7699f87 GFT |
2983 | jme_load_macaddr(netdev); |
2984 | ||
d7699f87 GFT |
2985 | /* |
2986 | * Tell stack that we are not ready to work until open() | |
2987 | */ | |
2988 | netif_carrier_off(netdev); | |
2989 | netif_stop_queue(netdev); | |
2990 | ||
2991 | /* | |
2992 | * Register netdev | |
2993 | */ | |
4330c2f2 | 2994 | rc = register_netdev(netdev); |
cd0ff491 GFT |
2995 | if (rc) { |
2996 | jeprintk(pdev, "Cannot register net device.\n"); | |
4330c2f2 GFT |
2997 | goto err_out_free_shadow; |
2998 | } | |
d7699f87 | 2999 | |
cd0ff491 GFT |
3000 | msg_probe(jme, |
3001 | "JMC250 gigabit%s ver:%u rev:%1x.%1x " | |
3002 | "macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n", | |
3003 | (jme->fpgaver != 0) ? " (FPGA)" : "", | |
3004 | (jme->fpgaver != 0) ? jme->fpgaver : jme->chipver, | |
3005 | jme->rev & 0xf, (jme->rev >> 4) & 0xf, | |
3006 | netdev->dev_addr[0], | |
3007 | netdev->dev_addr[1], | |
3008 | netdev->dev_addr[2], | |
3009 | netdev->dev_addr[3], | |
3010 | netdev->dev_addr[4], | |
3011 | netdev->dev_addr[5]); | |
d7699f87 GFT |
3012 | |
3013 | return 0; | |
3014 | ||
4330c2f2 GFT |
3015 | err_out_free_shadow: |
3016 | pci_free_consistent(pdev, | |
cd0ff491 | 3017 | sizeof(u32) * SHADOW_REG_NR, |
4330c2f2 GFT |
3018 | jme->shadow_regs, |
3019 | jme->shadow_dma); | |
d7699f87 GFT |
3020 | err_out_unmap: |
3021 | iounmap(jme->regs); | |
3022 | err_out_free_netdev: | |
3023 | pci_set_drvdata(pdev, NULL); | |
3024 | free_netdev(netdev); | |
4330c2f2 GFT |
3025 | err_out_release_regions: |
3026 | pci_release_regions(pdev); | |
d7699f87 | 3027 | err_out_disable_pdev: |
cd0ff491 | 3028 | pci_disable_device(pdev); |
d7699f87 | 3029 | err_out: |
4330c2f2 | 3030 | return rc; |
d7699f87 GFT |
3031 | } |
3032 | ||
3bf61c55 GFT |
3033 | static void __devexit |
3034 | jme_remove_one(struct pci_dev *pdev) | |
3035 | { | |
d7699f87 GFT |
3036 | struct net_device *netdev = pci_get_drvdata(pdev); |
3037 | struct jme_adapter *jme = netdev_priv(netdev); | |
3038 | ||
3039 | unregister_netdev(netdev); | |
4330c2f2 | 3040 | pci_free_consistent(pdev, |
cd0ff491 | 3041 | sizeof(u32) * SHADOW_REG_NR, |
4330c2f2 GFT |
3042 | jme->shadow_regs, |
3043 | jme->shadow_dma); | |
d7699f87 GFT |
3044 | iounmap(jme->regs); |
3045 | pci_set_drvdata(pdev, NULL); | |
3046 | free_netdev(netdev); | |
3047 | pci_release_regions(pdev); | |
3048 | pci_disable_device(pdev); | |
3049 | ||
3050 | } | |
3051 | ||
29bdd921 GFT |
3052 | static int |
3053 | jme_suspend(struct pci_dev *pdev, pm_message_t state) | |
3054 | { | |
3055 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3056 | struct jme_adapter *jme = netdev_priv(netdev); | |
29bdd921 GFT |
3057 | |
3058 | atomic_dec(&jme->link_changing); | |
3059 | ||
3060 | netif_device_detach(netdev); | |
3061 | netif_stop_queue(netdev); | |
3062 | jme_stop_irq(jme); | |
29bdd921 | 3063 | |
cd0ff491 GFT |
3064 | tasklet_disable(&jme->txclean_task); |
3065 | tasklet_disable(&jme->rxclean_task); | |
3066 | tasklet_disable(&jme->rxempty_task); | |
3067 | ||
29bdd921 GFT |
3068 | jme_disable_shadow(jme); |
3069 | ||
cd0ff491 GFT |
3070 | if (netif_carrier_ok(netdev)) { |
3071 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
47220951 GFT |
3072 | jme_polling_mode(jme); |
3073 | ||
29bdd921 | 3074 | jme_stop_pcc_timer(jme); |
cd0ff491 GFT |
3075 | jme_reset_ghc_speed(jme); |
3076 | jme_disable_rx_engine(jme); | |
3077 | jme_disable_tx_engine(jme); | |
29bdd921 GFT |
3078 | jme_reset_mac_processor(jme); |
3079 | jme_free_rx_resources(jme); | |
3080 | jme_free_tx_resources(jme); | |
3081 | netif_carrier_off(netdev); | |
3082 | jme->phylink = 0; | |
3083 | } | |
3084 | ||
cd0ff491 GFT |
3085 | tasklet_enable(&jme->txclean_task); |
3086 | tasklet_hi_enable(&jme->rxclean_task); | |
3087 | tasklet_hi_enable(&jme->rxempty_task); | |
29bdd921 GFT |
3088 | |
3089 | pci_save_state(pdev); | |
cd0ff491 | 3090 | if (jme->reg_pmcs) { |
42b1055e | 3091 | jme_set_100m_half(jme); |
47220951 | 3092 | |
cd0ff491 | 3093 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) |
47220951 GFT |
3094 | jme_wait_link(jme); |
3095 | ||
29bdd921 | 3096 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); |
cd0ff491 | 3097 | |
42b1055e | 3098 | pci_enable_wake(pdev, PCI_D3cold, true); |
cd0ff491 | 3099 | } else { |
42b1055e | 3100 | jme_phy_off(jme); |
29bdd921 | 3101 | } |
cd0ff491 | 3102 | pci_set_power_state(pdev, PCI_D3cold); |
29bdd921 GFT |
3103 | |
3104 | return 0; | |
3105 | } | |
3106 | ||
3107 | static int | |
3108 | jme_resume(struct pci_dev *pdev) | |
3109 | { | |
3110 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3111 | struct jme_adapter *jme = netdev_priv(netdev); | |
3112 | ||
3113 | jme_clear_pm(jme); | |
3114 | pci_restore_state(pdev); | |
3115 | ||
cd0ff491 | 3116 | if (test_bit(JME_FLAG_SSET, &jme->flags)) |
29bdd921 GFT |
3117 | jme_set_settings(netdev, &jme->old_ecmd); |
3118 | else | |
3119 | jme_reset_phy_processor(jme); | |
3120 | ||
29bdd921 | 3121 | jme_enable_shadow(jme); |
29bdd921 GFT |
3122 | jme_start_irq(jme); |
3123 | netif_device_attach(netdev); | |
3124 | ||
3125 | atomic_inc(&jme->link_changing); | |
3126 | ||
3127 | jme_reset_link(jme); | |
3128 | ||
3129 | return 0; | |
3130 | } | |
3131 | ||
d7699f87 | 3132 | static struct pci_device_id jme_pci_tbl[] = { |
cd0ff491 GFT |
3133 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) }, |
3134 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) }, | |
d7699f87 GFT |
3135 | { } |
3136 | }; | |
3137 | ||
3138 | static struct pci_driver jme_driver = { | |
cd0ff491 GFT |
3139 | .name = DRV_NAME, |
3140 | .id_table = jme_pci_tbl, | |
3141 | .probe = jme_init_one, | |
3142 | .remove = __devexit_p(jme_remove_one), | |
d7699f87 | 3143 | #ifdef CONFIG_PM |
cd0ff491 GFT |
3144 | .suspend = jme_suspend, |
3145 | .resume = jme_resume, | |
d7699f87 | 3146 | #endif /* CONFIG_PM */ |
d7699f87 GFT |
3147 | }; |
3148 | ||
3bf61c55 GFT |
3149 | static int __init |
3150 | jme_init_module(void) | |
d7699f87 | 3151 | { |
4330c2f2 GFT |
3152 | printk(KERN_INFO PFX "JMicron JMC250 gigabit ethernet " |
3153 | "driver version %s\n", DRV_VERSION); | |
d7699f87 GFT |
3154 | return pci_register_driver(&jme_driver); |
3155 | } | |
3156 | ||
3bf61c55 GFT |
3157 | static void __exit |
3158 | jme_cleanup_module(void) | |
d7699f87 GFT |
3159 | { |
3160 | pci_unregister_driver(&jme_driver); | |
3161 | } | |
3162 | ||
3163 | module_init(jme_init_module); | |
3164 | module_exit(jme_cleanup_module); | |
3165 | ||
3bf61c55 | 3166 | MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>"); |
d7699f87 GFT |
3167 | MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver"); |
3168 | MODULE_LICENSE("GPL"); | |
3169 | MODULE_VERSION(DRV_VERSION); | |
3170 | MODULE_DEVICE_TABLE(pci, jme_pci_tbl); | |
3171 |