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swiotlb: rename unmap_single to do_unmap_single
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CommitLineData
1da177e4
LT
1/*
2 * Dynamic DMA mapping support.
3 *
563aaf06 4 * This implementation is a fallback for platforms that do not support
1da177e4
LT
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
569c8bf5
JL
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
fb05a379 17 * 08/12/11 beckyb Add highmem support
1da177e4
LT
18 */
19
20#include <linux/cache.h>
17e5ad6c 21#include <linux/dma-mapping.h>
1da177e4
LT
22#include <linux/mm.h>
23#include <linux/module.h>
1da177e4
LT
24#include <linux/spinlock.h>
25#include <linux/string.h>
0016fdee 26#include <linux/swiotlb.h>
fb05a379 27#include <linux/pfn.h>
1da177e4
LT
28#include <linux/types.h>
29#include <linux/ctype.h>
ef9b1893 30#include <linux/highmem.h>
1da177e4
LT
31
32#include <asm/io.h>
1da177e4 33#include <asm/dma.h>
17e5ad6c 34#include <asm/scatterlist.h>
1da177e4
LT
35
36#include <linux/init.h>
37#include <linux/bootmem.h>
a8522509 38#include <linux/iommu-helper.h>
1da177e4
LT
39
40#define OFFSET(val,align) ((unsigned long) \
41 ( (val) & ( (align) - 1)))
42
0b9afede
AW
43#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
44
45/*
46 * Minimum IO TLB size to bother booting with. Systems with mainly
47 * 64bit capable cards will only lightly use the swiotlb. If we can't
48 * allocate a contiguous 1MB, we're probably in trouble anyway.
49 */
50#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
51
de69e0f0
JL
52/*
53 * Enumeration for sync targets
54 */
55enum dma_sync_target {
56 SYNC_FOR_CPU = 0,
57 SYNC_FOR_DEVICE = 1,
58};
59
1da177e4
LT
60int swiotlb_force;
61
62/*
ceb5ac32
BB
63 * Used to do a quick range check in unmap_single and
64 * sync_single_*, to see if the memory was in fact allocated by this
1da177e4
LT
65 * API.
66 */
67static char *io_tlb_start, *io_tlb_end;
68
69/*
70 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
71 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
72 */
73static unsigned long io_tlb_nslabs;
74
75/*
76 * When the IOMMU overflows we return a fallback buffer. This sets the size.
77 */
78static unsigned long io_tlb_overflow = 32*1024;
79
80void *io_tlb_overflow_buffer;
81
82/*
83 * This is a free list describing the number of free entries available from
84 * each index
85 */
86static unsigned int *io_tlb_list;
87static unsigned int io_tlb_index;
88
89/*
90 * We need to save away the original address corresponding to a mapped entry
91 * for the sync operations.
92 */
bc40ac66 93static phys_addr_t *io_tlb_orig_addr;
1da177e4
LT
94
95/*
96 * Protect the above data structures in the map and unmap calls
97 */
98static DEFINE_SPINLOCK(io_tlb_lock);
99
100static int __init
101setup_io_tlb_npages(char *str)
102{
103 if (isdigit(*str)) {
e8579e72 104 io_tlb_nslabs = simple_strtoul(str, &str, 0);
1da177e4
LT
105 /* avoid tail segment of size < IO_TLB_SEGSIZE */
106 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
107 }
108 if (*str == ',')
109 ++str;
110 if (!strcmp(str, "force"))
111 swiotlb_force = 1;
112 return 1;
113}
114__setup("swiotlb=", setup_io_tlb_npages);
115/* make io_tlb_overflow tunable too? */
116
79ff56eb 117void * __weak __init swiotlb_alloc_boot(size_t size, unsigned long nslabs)
8c5df16b
JF
118{
119 return alloc_bootmem_low_pages(size);
120}
121
122void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
123{
124 return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
125}
126
70a7d3cc 127dma_addr_t __weak swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr)
e08e1f7a
IC
128{
129 return paddr;
130}
131
132phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr)
133{
134 return baddr;
135}
136
70a7d3cc
JF
137static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
138 volatile void *address)
e08e1f7a 139{
70a7d3cc 140 return swiotlb_phys_to_bus(hwdev, virt_to_phys(address));
e08e1f7a
IC
141}
142
143static void *swiotlb_bus_to_virt(dma_addr_t address)
144{
145 return phys_to_virt(swiotlb_bus_to_phys(address));
146}
147
ef5722f6
BB
148int __weak swiotlb_arch_address_needs_mapping(struct device *hwdev,
149 dma_addr_t addr, size_t size)
150{
151 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
152}
153
0b8698ab 154int __weak swiotlb_arch_range_needs_mapping(phys_addr_t paddr, size_t size)
b81ea27b
IC
155{
156 return 0;
157}
158
2e5b2b86
IC
159static void swiotlb_print_info(unsigned long bytes)
160{
161 phys_addr_t pstart, pend;
2e5b2b86
IC
162
163 pstart = virt_to_phys(io_tlb_start);
164 pend = virt_to_phys(io_tlb_end);
165
2e5b2b86
IC
166 printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
167 bytes >> 20, io_tlb_start, io_tlb_end);
70a7d3cc
JF
168 printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
169 (unsigned long long)pstart,
170 (unsigned long long)pend);
2e5b2b86
IC
171}
172
1da177e4
LT
173/*
174 * Statically reserve bounce buffer space and initialize bounce buffer data
17e5ad6c 175 * structures for the software IO TLB used to implement the DMA API.
1da177e4 176 */
563aaf06
JB
177void __init
178swiotlb_init_with_default_size(size_t default_size)
1da177e4 179{
563aaf06 180 unsigned long i, bytes;
1da177e4
LT
181
182 if (!io_tlb_nslabs) {
e8579e72 183 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
1da177e4
LT
184 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
185 }
186
563aaf06
JB
187 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
188
1da177e4
LT
189 /*
190 * Get IO TLB memory from the low pages
191 */
8c5df16b 192 io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
1da177e4
LT
193 if (!io_tlb_start)
194 panic("Cannot allocate SWIOTLB buffer");
563aaf06 195 io_tlb_end = io_tlb_start + bytes;
1da177e4
LT
196
197 /*
198 * Allocate and initialize the free list array. This array is used
199 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
200 * between io_tlb_start and io_tlb_end.
201 */
202 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
25667d67 203 for (i = 0; i < io_tlb_nslabs; i++)
1da177e4
LT
204 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
205 io_tlb_index = 0;
bc40ac66 206 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(phys_addr_t));
1da177e4
LT
207
208 /*
209 * Get the overflow emergency buffer
210 */
211 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
563aaf06
JB
212 if (!io_tlb_overflow_buffer)
213 panic("Cannot allocate SWIOTLB overflow buffer!\n");
214
2e5b2b86 215 swiotlb_print_info(bytes);
1da177e4
LT
216}
217
563aaf06
JB
218void __init
219swiotlb_init(void)
1da177e4 220{
25667d67 221 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
1da177e4
LT
222}
223
0b9afede
AW
224/*
225 * Systems with larger DMA zones (those that don't support ISA) can
226 * initialize the swiotlb later using the slab allocator if needed.
227 * This should be just like above, but with some error catching.
228 */
229int
563aaf06 230swiotlb_late_init_with_default_size(size_t default_size)
0b9afede 231{
563aaf06 232 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
0b9afede
AW
233 unsigned int order;
234
235 if (!io_tlb_nslabs) {
236 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
237 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
238 }
239
240 /*
241 * Get IO TLB memory from the low pages
242 */
563aaf06 243 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
0b9afede 244 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 245 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede
AW
246
247 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
8c5df16b 248 io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
0b9afede
AW
249 if (io_tlb_start)
250 break;
251 order--;
252 }
253
254 if (!io_tlb_start)
255 goto cleanup1;
256
563aaf06 257 if (order != get_order(bytes)) {
0b9afede
AW
258 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
259 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
260 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 261 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede 262 }
563aaf06
JB
263 io_tlb_end = io_tlb_start + bytes;
264 memset(io_tlb_start, 0, bytes);
0b9afede
AW
265
266 /*
267 * Allocate and initialize the free list array. This array is used
268 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
269 * between io_tlb_start and io_tlb_end.
270 */
271 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
272 get_order(io_tlb_nslabs * sizeof(int)));
273 if (!io_tlb_list)
274 goto cleanup2;
275
276 for (i = 0; i < io_tlb_nslabs; i++)
277 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
278 io_tlb_index = 0;
279
bc40ac66
BB
280 io_tlb_orig_addr = (phys_addr_t *)
281 __get_free_pages(GFP_KERNEL,
282 get_order(io_tlb_nslabs *
283 sizeof(phys_addr_t)));
0b9afede
AW
284 if (!io_tlb_orig_addr)
285 goto cleanup3;
286
bc40ac66 287 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
0b9afede
AW
288
289 /*
290 * Get the overflow emergency buffer
291 */
292 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
293 get_order(io_tlb_overflow));
294 if (!io_tlb_overflow_buffer)
295 goto cleanup4;
296
2e5b2b86 297 swiotlb_print_info(bytes);
0b9afede
AW
298
299 return 0;
300
301cleanup4:
bc40ac66
BB
302 free_pages((unsigned long)io_tlb_orig_addr,
303 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
0b9afede
AW
304 io_tlb_orig_addr = NULL;
305cleanup3:
25667d67
TL
306 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
307 sizeof(int)));
0b9afede 308 io_tlb_list = NULL;
0b9afede 309cleanup2:
563aaf06 310 io_tlb_end = NULL;
0b9afede
AW
311 free_pages((unsigned long)io_tlb_start, order);
312 io_tlb_start = NULL;
313cleanup1:
314 io_tlb_nslabs = req_nslabs;
315 return -ENOMEM;
316}
317
ef5722f6 318static inline int
2797982e 319address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
1da177e4 320{
ef5722f6 321 return swiotlb_arch_address_needs_mapping(hwdev, addr, size);
1da177e4
LT
322}
323
0b8698ab 324static inline int range_needs_mapping(phys_addr_t paddr, size_t size)
b81ea27b 325{
0b8698ab 326 return swiotlb_force || swiotlb_arch_range_needs_mapping(paddr, size);
b81ea27b
IC
327}
328
640aebfe
FT
329static int is_swiotlb_buffer(char *addr)
330{
331 return addr >= io_tlb_start && addr < io_tlb_end;
332}
333
fb05a379
BB
334/*
335 * Bounce: copy the swiotlb buffer back to the original dma location
336 */
337static void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
338 enum dma_data_direction dir)
339{
340 unsigned long pfn = PFN_DOWN(phys);
341
342 if (PageHighMem(pfn_to_page(pfn))) {
343 /* The buffer does not have a mapping. Map it in and copy */
344 unsigned int offset = phys & ~PAGE_MASK;
345 char *buffer;
346 unsigned int sz = 0;
347 unsigned long flags;
348
349 while (size) {
67131ad0 350 sz = min_t(size_t, PAGE_SIZE - offset, size);
fb05a379
BB
351
352 local_irq_save(flags);
353 buffer = kmap_atomic(pfn_to_page(pfn),
354 KM_BOUNCE_READ);
355 if (dir == DMA_TO_DEVICE)
356 memcpy(dma_addr, buffer + offset, sz);
ef9b1893 357 else
fb05a379
BB
358 memcpy(buffer + offset, dma_addr, sz);
359 kunmap_atomic(buffer, KM_BOUNCE_READ);
ef9b1893 360 local_irq_restore(flags);
fb05a379
BB
361
362 size -= sz;
363 pfn++;
364 dma_addr += sz;
365 offset = 0;
ef9b1893
JF
366 }
367 } else {
ef9b1893 368 if (dir == DMA_TO_DEVICE)
fb05a379 369 memcpy(dma_addr, phys_to_virt(phys), size);
ef9b1893 370 else
fb05a379 371 memcpy(phys_to_virt(phys), dma_addr, size);
ef9b1893 372 }
1b548f66
JF
373}
374
1da177e4
LT
375/*
376 * Allocates bounce buffer and returns its kernel virtual address.
377 */
378static void *
bc40ac66 379map_single(struct device *hwdev, phys_addr_t phys, size_t size, int dir)
1da177e4
LT
380{
381 unsigned long flags;
382 char *dma_addr;
383 unsigned int nslots, stride, index, wrap;
384 int i;
681cc5cd
FT
385 unsigned long start_dma_addr;
386 unsigned long mask;
387 unsigned long offset_slots;
388 unsigned long max_slots;
389
390 mask = dma_get_seg_boundary(hwdev);
70a7d3cc 391 start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start) & mask;
681cc5cd
FT
392
393 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
a5ddde4a
IC
394
395 /*
396 * Carefully handle integer overflow which can occur when mask == ~0UL.
397 */
b15a3891
JB
398 max_slots = mask + 1
399 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
400 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
1da177e4
LT
401
402 /*
403 * For mappings greater than a page, we limit the stride (and
404 * hence alignment) to a page size.
405 */
406 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
407 if (size > PAGE_SIZE)
408 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
409 else
410 stride = 1;
411
34814545 412 BUG_ON(!nslots);
1da177e4
LT
413
414 /*
415 * Find suitable number of IO TLB entries size that will fit this
416 * request and allocate a buffer from that IO TLB pool.
417 */
418 spin_lock_irqsave(&io_tlb_lock, flags);
a7133a15
AM
419 index = ALIGN(io_tlb_index, stride);
420 if (index >= io_tlb_nslabs)
421 index = 0;
422 wrap = index;
423
424 do {
a8522509
FT
425 while (iommu_is_span_boundary(index, nslots, offset_slots,
426 max_slots)) {
b15a3891
JB
427 index += stride;
428 if (index >= io_tlb_nslabs)
429 index = 0;
a7133a15
AM
430 if (index == wrap)
431 goto not_found;
432 }
433
434 /*
435 * If we find a slot that indicates we have 'nslots' number of
436 * contiguous buffers, we allocate the buffers from that slot
437 * and mark the entries as '0' indicating unavailable.
438 */
439 if (io_tlb_list[index] >= nslots) {
440 int count = 0;
441
442 for (i = index; i < (int) (index + nslots); i++)
443 io_tlb_list[i] = 0;
444 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
445 io_tlb_list[i] = ++count;
446 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
1da177e4 447
a7133a15
AM
448 /*
449 * Update the indices to avoid searching in the next
450 * round.
451 */
452 io_tlb_index = ((index + nslots) < io_tlb_nslabs
453 ? (index + nslots) : 0);
454
455 goto found;
456 }
457 index += stride;
458 if (index >= io_tlb_nslabs)
459 index = 0;
460 } while (index != wrap);
461
462not_found:
463 spin_unlock_irqrestore(&io_tlb_lock, flags);
464 return NULL;
465found:
1da177e4
LT
466 spin_unlock_irqrestore(&io_tlb_lock, flags);
467
468 /*
469 * Save away the mapping from the original address to the DMA address.
470 * This is needed when we sync the memory. Then we sync the buffer if
471 * needed.
472 */
bc40ac66
BB
473 for (i = 0; i < nslots; i++)
474 io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
1da177e4 475 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
fb05a379 476 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
1da177e4
LT
477
478 return dma_addr;
479}
480
481/*
482 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
483 */
484static void
7fcebbd2 485do_unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
1da177e4
LT
486{
487 unsigned long flags;
488 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
489 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
bc40ac66 490 phys_addr_t phys = io_tlb_orig_addr[index];
1da177e4
LT
491
492 /*
493 * First, sync the memory before unmapping the entry
494 */
bc40ac66 495 if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
fb05a379 496 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
1da177e4
LT
497
498 /*
499 * Return the buffer to the free list by setting the corresponding
500 * entries to indicate the number of contigous entries available.
501 * While returning the entries to the free list, we merge the entries
502 * with slots below and above the pool being returned.
503 */
504 spin_lock_irqsave(&io_tlb_lock, flags);
505 {
506 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
507 io_tlb_list[index + nslots] : 0);
508 /*
509 * Step 1: return the slots to the free list, merging the
510 * slots with superceeding slots
511 */
512 for (i = index + nslots - 1; i >= index; i--)
513 io_tlb_list[i] = ++count;
514 /*
515 * Step 2: merge the returned slots with the preceding slots,
516 * if available (non zero)
517 */
518 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
519 io_tlb_list[i] = ++count;
520 }
521 spin_unlock_irqrestore(&io_tlb_lock, flags);
522}
523
524static void
de69e0f0
JL
525sync_single(struct device *hwdev, char *dma_addr, size_t size,
526 int dir, int target)
1da177e4 527{
bc40ac66
BB
528 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
529 phys_addr_t phys = io_tlb_orig_addr[index];
530
531 phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
df336d1c 532
de69e0f0
JL
533 switch (target) {
534 case SYNC_FOR_CPU:
535 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
fb05a379 536 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
34814545
ES
537 else
538 BUG_ON(dir != DMA_TO_DEVICE);
de69e0f0
JL
539 break;
540 case SYNC_FOR_DEVICE:
541 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
fb05a379 542 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
34814545
ES
543 else
544 BUG_ON(dir != DMA_FROM_DEVICE);
de69e0f0
JL
545 break;
546 default:
1da177e4 547 BUG();
de69e0f0 548 }
1da177e4
LT
549}
550
551void *
552swiotlb_alloc_coherent(struct device *hwdev, size_t size,
06a54497 553 dma_addr_t *dma_handle, gfp_t flags)
1da177e4 554{
563aaf06 555 dma_addr_t dev_addr;
1da177e4
LT
556 void *ret;
557 int order = get_order(size);
284901a9 558 u64 dma_mask = DMA_BIT_MASK(32);
1e74f300
FT
559
560 if (hwdev && hwdev->coherent_dma_mask)
561 dma_mask = hwdev->coherent_dma_mask;
1da177e4 562
25667d67 563 ret = (void *)__get_free_pages(flags, order);
70a7d3cc
JF
564 if (ret &&
565 !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(hwdev, ret),
566 size)) {
1da177e4
LT
567 /*
568 * The allocated memory isn't reachable by the device.
1da177e4
LT
569 */
570 free_pages((unsigned long) ret, order);
571 ret = NULL;
572 }
573 if (!ret) {
574 /*
575 * We are either out of memory or the device can't DMA
ceb5ac32
BB
576 * to GFP_DMA memory; fall back on map_single(), which
577 * will grab memory from the lowest available address range.
1da177e4 578 */
bc40ac66 579 ret = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
9dfda12b 580 if (!ret)
1da177e4 581 return NULL;
1da177e4
LT
582 }
583
584 memset(ret, 0, size);
70a7d3cc 585 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
1da177e4
LT
586
587 /* Confirm address can be DMA'd by device */
1e74f300 588 if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
563aaf06 589 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
1e74f300 590 (unsigned long long)dma_mask,
563aaf06 591 (unsigned long long)dev_addr);
a2b89b59
FT
592
593 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
7fcebbd2 594 do_unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
a2b89b59 595 return NULL;
1da177e4
LT
596 }
597 *dma_handle = dev_addr;
598 return ret;
599}
874d6a95 600EXPORT_SYMBOL(swiotlb_alloc_coherent);
1da177e4
LT
601
602void
603swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
604 dma_addr_t dma_handle)
605{
aa24886e 606 WARN_ON(irqs_disabled());
640aebfe 607 if (!is_swiotlb_buffer(vaddr))
1da177e4
LT
608 free_pages((unsigned long) vaddr, get_order(size));
609 else
610 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
7fcebbd2 611 do_unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
1da177e4 612}
874d6a95 613EXPORT_SYMBOL(swiotlb_free_coherent);
1da177e4
LT
614
615static void
616swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
617{
618 /*
619 * Ran out of IOMMU space for this operation. This is very bad.
620 * Unfortunately the drivers cannot handle this operation properly.
17e5ad6c 621 * unless they check for dma_mapping_error (most don't)
1da177e4
LT
622 * When the mapping is small enough return a static buffer to limit
623 * the damage, or panic when the transfer is too big.
624 */
563aaf06 625 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
94b32486 626 "device %s\n", size, dev ? dev_name(dev) : "?");
1da177e4
LT
627
628 if (size > io_tlb_overflow && do_panic) {
17e5ad6c
TL
629 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
630 panic("DMA: Memory would be corrupted\n");
631 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
632 panic("DMA: Random memory would be DMAed\n");
1da177e4
LT
633 }
634}
635
636/*
637 * Map a single buffer of the indicated size for DMA in streaming mode. The
17e5ad6c 638 * physical address to use is returned.
1da177e4
LT
639 *
640 * Once the device is given the dma address, the device owns this memory until
ceb5ac32 641 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
1da177e4 642 */
f98eee8e
FT
643dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
644 unsigned long offset, size_t size,
645 enum dma_data_direction dir,
646 struct dma_attrs *attrs)
1da177e4 647{
f98eee8e 648 phys_addr_t phys = page_to_phys(page) + offset;
f98eee8e 649 dma_addr_t dev_addr = swiotlb_phys_to_bus(dev, phys);
1da177e4
LT
650 void *map;
651
34814545 652 BUG_ON(dir == DMA_NONE);
1da177e4 653 /*
ceb5ac32 654 * If the address happens to be in the device's DMA window,
1da177e4
LT
655 * we can safely return the device addr and not worry about bounce
656 * buffering it.
657 */
f98eee8e 658 if (!address_needs_mapping(dev, dev_addr, size) &&
dd6b02fe 659 !range_needs_mapping(phys, size))
1da177e4
LT
660 return dev_addr;
661
662 /*
663 * Oh well, have to allocate and map a bounce buffer.
664 */
f98eee8e 665 map = map_single(dev, phys, size, dir);
1da177e4 666 if (!map) {
f98eee8e 667 swiotlb_full(dev, size, dir, 1);
1da177e4
LT
668 map = io_tlb_overflow_buffer;
669 }
670
f98eee8e 671 dev_addr = swiotlb_virt_to_bus(dev, map);
1da177e4
LT
672
673 /*
674 * Ensure that the address returned is DMA'ble
675 */
f98eee8e 676 if (address_needs_mapping(dev, dev_addr, size))
1da177e4
LT
677 panic("map_single: bounce buffer is not DMA'ble");
678
679 return dev_addr;
680}
f98eee8e 681EXPORT_SYMBOL_GPL(swiotlb_map_page);
1da177e4 682
1da177e4
LT
683/*
684 * Unmap a single streaming mode DMA translation. The dma_addr and size must
ceb5ac32 685 * match what was provided for in a previous swiotlb_map_page call. All
1da177e4
LT
686 * other usages are undefined.
687 *
688 * After this call, reads by the cpu to the buffer are guaranteed to see
689 * whatever the device wrote there.
690 */
7fcebbd2
BB
691static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
692 size_t size, int dir)
1da177e4 693{
e08e1f7a 694 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
1da177e4 695
34814545 696 BUG_ON(dir == DMA_NONE);
7fcebbd2
BB
697
698 if (is_swiotlb_buffer(dma_addr)) {
699 do_unmap_single(hwdev, dma_addr, size, dir);
700 return;
701 }
702
703 if (dir != DMA_FROM_DEVICE)
704 return;
705
706 dma_mark_clean(dma_addr, size);
707}
708
709void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
710 size_t size, enum dma_data_direction dir,
711 struct dma_attrs *attrs)
712{
713 unmap_single(hwdev, dev_addr, size, dir);
1da177e4 714}
f98eee8e 715EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
874d6a95 716
1da177e4
LT
717/*
718 * Make physical memory consistent for a single streaming mode DMA translation
719 * after a transfer.
720 *
ceb5ac32 721 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
17e5ad6c
TL
722 * using the cpu, yet do not wish to teardown the dma mapping, you must
723 * call this function before doing so. At the next point you give the dma
1da177e4
LT
724 * address back to the card, you must first perform a
725 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
726 */
be6b0267 727static void
8270f3f1 728swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0 729 size_t size, int dir, int target)
1da177e4 730{
e08e1f7a 731 char *dma_addr = swiotlb_bus_to_virt(dev_addr);
1da177e4 732
34814545 733 BUG_ON(dir == DMA_NONE);
640aebfe 734 if (is_swiotlb_buffer(dma_addr))
de69e0f0 735 sync_single(hwdev, dma_addr, size, dir, target);
1da177e4 736 else if (dir == DMA_FROM_DEVICE)
cde14bbf 737 dma_mark_clean(dma_addr, size);
1da177e4
LT
738}
739
8270f3f1
JL
740void
741swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
160c1d8e 742 size_t size, enum dma_data_direction dir)
8270f3f1 743{
de69e0f0 744 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
8270f3f1 745}
874d6a95 746EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
8270f3f1 747
1da177e4
LT
748void
749swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
160c1d8e 750 size_t size, enum dma_data_direction dir)
1da177e4 751{
de69e0f0 752 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
1da177e4 753}
874d6a95 754EXPORT_SYMBOL(swiotlb_sync_single_for_device);
1da177e4 755
878a97cf
JL
756/*
757 * Same as above, but for a sub-range of the mapping.
758 */
be6b0267 759static void
878a97cf 760swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0
JL
761 unsigned long offset, size_t size,
762 int dir, int target)
878a97cf 763{
e08e1f7a 764 char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset;
878a97cf 765
34814545 766 BUG_ON(dir == DMA_NONE);
640aebfe 767 if (is_swiotlb_buffer(dma_addr))
de69e0f0 768 sync_single(hwdev, dma_addr, size, dir, target);
878a97cf 769 else if (dir == DMA_FROM_DEVICE)
cde14bbf 770 dma_mark_clean(dma_addr, size);
878a97cf
JL
771}
772
773void
774swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
160c1d8e
FT
775 unsigned long offset, size_t size,
776 enum dma_data_direction dir)
878a97cf 777{
de69e0f0
JL
778 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
779 SYNC_FOR_CPU);
878a97cf 780}
874d6a95 781EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
878a97cf
JL
782
783void
784swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
160c1d8e
FT
785 unsigned long offset, size_t size,
786 enum dma_data_direction dir)
878a97cf 787{
de69e0f0
JL
788 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
789 SYNC_FOR_DEVICE);
878a97cf 790}
874d6a95 791EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
878a97cf 792
1da177e4
LT
793/*
794 * Map a set of buffers described by scatterlist in streaming mode for DMA.
ceb5ac32 795 * This is the scatter-gather version of the above swiotlb_map_page
1da177e4
LT
796 * interface. Here the scatter gather list elements are each tagged with the
797 * appropriate dma address and length. They are obtained via
798 * sg_dma_{address,length}(SG).
799 *
800 * NOTE: An implementation may be able to use a smaller number of
801 * DMA address/length pairs than there are SG table elements.
802 * (for example via virtual mapping capabilities)
803 * The routine returns the number of addr/length pairs actually
804 * used, at most nents.
805 *
ceb5ac32 806 * Device ownership issues as mentioned above for swiotlb_map_page are the
1da177e4
LT
807 * same here.
808 */
809int
309df0c5 810swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
160c1d8e 811 enum dma_data_direction dir, struct dma_attrs *attrs)
1da177e4 812{
dbfd49fe 813 struct scatterlist *sg;
1da177e4
LT
814 int i;
815
34814545 816 BUG_ON(dir == DMA_NONE);
1da177e4 817
dbfd49fe 818 for_each_sg(sgl, sg, nelems, i) {
961d7d0e
IC
819 phys_addr_t paddr = sg_phys(sg);
820 dma_addr_t dev_addr = swiotlb_phys_to_bus(hwdev, paddr);
bc40ac66 821
961d7d0e 822 if (range_needs_mapping(paddr, sg->length) ||
2797982e 823 address_needs_mapping(hwdev, dev_addr, sg->length)) {
bc40ac66
BB
824 void *map = map_single(hwdev, sg_phys(sg),
825 sg->length, dir);
7e870233 826 if (!map) {
1da177e4
LT
827 /* Don't panic here, we expect map_sg users
828 to do proper error handling. */
829 swiotlb_full(hwdev, sg->length, dir, 0);
309df0c5
AK
830 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
831 attrs);
dbfd49fe 832 sgl[0].dma_length = 0;
1da177e4
LT
833 return 0;
834 }
70a7d3cc 835 sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
1da177e4
LT
836 } else
837 sg->dma_address = dev_addr;
838 sg->dma_length = sg->length;
839 }
840 return nelems;
841}
309df0c5
AK
842EXPORT_SYMBOL(swiotlb_map_sg_attrs);
843
844int
845swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
846 int dir)
847{
848 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
849}
874d6a95 850EXPORT_SYMBOL(swiotlb_map_sg);
1da177e4
LT
851
852/*
853 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
ceb5ac32 854 * concerning calls here are the same as for swiotlb_unmap_page() above.
1da177e4
LT
855 */
856void
309df0c5 857swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
160c1d8e 858 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
1da177e4 859{
dbfd49fe 860 struct scatterlist *sg;
1da177e4
LT
861 int i;
862
34814545 863 BUG_ON(dir == DMA_NONE);
1da177e4 864
7fcebbd2
BB
865 for_each_sg(sgl, sg, nelems, i)
866 unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
867
1da177e4 868}
309df0c5
AK
869EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
870
871void
872swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
873 int dir)
874{
875 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
876}
874d6a95 877EXPORT_SYMBOL(swiotlb_unmap_sg);
1da177e4
LT
878
879/*
880 * Make physical memory consistent for a set of streaming mode DMA translations
881 * after a transfer.
882 *
883 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
884 * and usage.
885 */
be6b0267 886static void
dbfd49fe 887swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
de69e0f0 888 int nelems, int dir, int target)
1da177e4 889{
dbfd49fe 890 struct scatterlist *sg;
1da177e4
LT
891 int i;
892
34814545 893 BUG_ON(dir == DMA_NONE);
1da177e4 894
dbfd49fe 895 for_each_sg(sgl, sg, nelems, i) {
961d7d0e 896 if (sg->dma_address != swiotlb_phys_to_bus(hwdev, sg_phys(sg)))
e08e1f7a 897 sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
de69e0f0 898 sg->dma_length, dir, target);
cde14bbf 899 else if (dir == DMA_FROM_DEVICE)
961d7d0e 900 dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
dbfd49fe 901 }
1da177e4
LT
902}
903
8270f3f1
JL
904void
905swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
160c1d8e 906 int nelems, enum dma_data_direction dir)
8270f3f1 907{
de69e0f0 908 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
8270f3f1 909}
874d6a95 910EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
8270f3f1 911
1da177e4
LT
912void
913swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
160c1d8e 914 int nelems, enum dma_data_direction dir)
1da177e4 915{
de69e0f0 916 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1da177e4 917}
874d6a95 918EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
1da177e4
LT
919
920int
8d8bb39b 921swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
1da177e4 922{
70a7d3cc 923 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
1da177e4 924}
874d6a95 925EXPORT_SYMBOL(swiotlb_dma_mapping_error);
1da177e4
LT
926
927/*
17e5ad6c 928 * Return whether the given device DMA address mask can be supported
1da177e4 929 * properly. For example, if your device can only drive the low 24-bits
17e5ad6c 930 * during bus mastering, then you would pass 0x00ffffff as the mask to
1da177e4
LT
931 * this function.
932 */
933int
563aaf06 934swiotlb_dma_supported(struct device *hwdev, u64 mask)
1da177e4 935{
70a7d3cc 936 return swiotlb_virt_to_bus(hwdev, io_tlb_end - 1) <= mask;
1da177e4 937}
1da177e4 938EXPORT_SYMBOL(swiotlb_dma_supported);