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CommitLineData
1da177e4
LT
1/*
2 * Dynamic DMA mapping support.
3 *
563aaf06 4 * This implementation is a fallback for platforms that do not support
1da177e4
LT
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
569c8bf5
JL
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
1da177e4
LT
17 */
18
19#include <linux/cache.h>
17e5ad6c 20#include <linux/dma-mapping.h>
1da177e4
LT
21#include <linux/mm.h>
22#include <linux/module.h>
1da177e4
LT
23#include <linux/spinlock.h>
24#include <linux/string.h>
25#include <linux/types.h>
26#include <linux/ctype.h>
27
28#include <asm/io.h>
1da177e4 29#include <asm/dma.h>
17e5ad6c 30#include <asm/scatterlist.h>
1da177e4
LT
31
32#include <linux/init.h>
33#include <linux/bootmem.h>
34
35#define OFFSET(val,align) ((unsigned long) \
36 ( (val) & ( (align) - 1)))
37
f9527f12 38#define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
93fbff63 39#define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
1da177e4
LT
40
41/*
42 * Maximum allowable number of contiguous slabs to map,
43 * must be a power of 2. What is the appropriate value ?
44 * The complexity of {map,unmap}_single is linearly dependent on this value.
45 */
46#define IO_TLB_SEGSIZE 128
47
48/*
49 * log of the size of each IO TLB slab. The number of slabs is command line
50 * controllable.
51 */
52#define IO_TLB_SHIFT 11
53
0b9afede
AW
54#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
55
56/*
57 * Minimum IO TLB size to bother booting with. Systems with mainly
58 * 64bit capable cards will only lightly use the swiotlb. If we can't
59 * allocate a contiguous 1MB, we're probably in trouble anyway.
60 */
61#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
62
de69e0f0
JL
63/*
64 * Enumeration for sync targets
65 */
66enum dma_sync_target {
67 SYNC_FOR_CPU = 0,
68 SYNC_FOR_DEVICE = 1,
69};
70
1da177e4
LT
71int swiotlb_force;
72
73/*
74 * Used to do a quick range check in swiotlb_unmap_single and
75 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
76 * API.
77 */
78static char *io_tlb_start, *io_tlb_end;
79
80/*
81 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
82 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
83 */
84static unsigned long io_tlb_nslabs;
85
86/*
87 * When the IOMMU overflows we return a fallback buffer. This sets the size.
88 */
89static unsigned long io_tlb_overflow = 32*1024;
90
91void *io_tlb_overflow_buffer;
92
93/*
94 * This is a free list describing the number of free entries available from
95 * each index
96 */
97static unsigned int *io_tlb_list;
98static unsigned int io_tlb_index;
99
100/*
101 * We need to save away the original address corresponding to a mapped entry
102 * for the sync operations.
103 */
25667d67 104static unsigned char **io_tlb_orig_addr;
1da177e4
LT
105
106/*
107 * Protect the above data structures in the map and unmap calls
108 */
109static DEFINE_SPINLOCK(io_tlb_lock);
110
111static int __init
112setup_io_tlb_npages(char *str)
113{
114 if (isdigit(*str)) {
e8579e72 115 io_tlb_nslabs = simple_strtoul(str, &str, 0);
1da177e4
LT
116 /* avoid tail segment of size < IO_TLB_SEGSIZE */
117 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
118 }
119 if (*str == ',')
120 ++str;
121 if (!strcmp(str, "force"))
122 swiotlb_force = 1;
123 return 1;
124}
125__setup("swiotlb=", setup_io_tlb_npages);
126/* make io_tlb_overflow tunable too? */
127
128/*
129 * Statically reserve bounce buffer space and initialize bounce buffer data
17e5ad6c 130 * structures for the software IO TLB used to implement the DMA API.
1da177e4 131 */
563aaf06
JB
132void __init
133swiotlb_init_with_default_size(size_t default_size)
1da177e4 134{
563aaf06 135 unsigned long i, bytes;
1da177e4
LT
136
137 if (!io_tlb_nslabs) {
e8579e72 138 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
1da177e4
LT
139 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
140 }
141
563aaf06
JB
142 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
143
1da177e4
LT
144 /*
145 * Get IO TLB memory from the low pages
146 */
563aaf06 147 io_tlb_start = alloc_bootmem_low_pages(bytes);
1da177e4
LT
148 if (!io_tlb_start)
149 panic("Cannot allocate SWIOTLB buffer");
563aaf06 150 io_tlb_end = io_tlb_start + bytes;
1da177e4
LT
151
152 /*
153 * Allocate and initialize the free list array. This array is used
154 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
155 * between io_tlb_start and io_tlb_end.
156 */
157 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
25667d67 158 for (i = 0; i < io_tlb_nslabs; i++)
1da177e4
LT
159 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
160 io_tlb_index = 0;
25667d67 161 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
1da177e4
LT
162
163 /*
164 * Get the overflow emergency buffer
165 */
166 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
563aaf06
JB
167 if (!io_tlb_overflow_buffer)
168 panic("Cannot allocate SWIOTLB overflow buffer!\n");
169
25667d67
TL
170 printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
171 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
1da177e4
LT
172}
173
563aaf06
JB
174void __init
175swiotlb_init(void)
1da177e4 176{
25667d67 177 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
1da177e4
LT
178}
179
0b9afede
AW
180/*
181 * Systems with larger DMA zones (those that don't support ISA) can
182 * initialize the swiotlb later using the slab allocator if needed.
183 * This should be just like above, but with some error catching.
184 */
185int
563aaf06 186swiotlb_late_init_with_default_size(size_t default_size)
0b9afede 187{
563aaf06 188 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
0b9afede
AW
189 unsigned int order;
190
191 if (!io_tlb_nslabs) {
192 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
193 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
194 }
195
196 /*
197 * Get IO TLB memory from the low pages
198 */
563aaf06 199 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
0b9afede 200 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 201 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede
AW
202
203 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
204 io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
205 order);
206 if (io_tlb_start)
207 break;
208 order--;
209 }
210
211 if (!io_tlb_start)
212 goto cleanup1;
213
563aaf06 214 if (order != get_order(bytes)) {
0b9afede
AW
215 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
216 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
217 io_tlb_nslabs = SLABS_PER_PAGE << order;
563aaf06 218 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
0b9afede 219 }
563aaf06
JB
220 io_tlb_end = io_tlb_start + bytes;
221 memset(io_tlb_start, 0, bytes);
0b9afede
AW
222
223 /*
224 * Allocate and initialize the free list array. This array is used
225 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
226 * between io_tlb_start and io_tlb_end.
227 */
228 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
229 get_order(io_tlb_nslabs * sizeof(int)));
230 if (!io_tlb_list)
231 goto cleanup2;
232
233 for (i = 0; i < io_tlb_nslabs; i++)
234 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
235 io_tlb_index = 0;
236
25667d67
TL
237 io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
238 get_order(io_tlb_nslabs * sizeof(char *)));
0b9afede
AW
239 if (!io_tlb_orig_addr)
240 goto cleanup3;
241
25667d67 242 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
0b9afede
AW
243
244 /*
245 * Get the overflow emergency buffer
246 */
247 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
248 get_order(io_tlb_overflow));
249 if (!io_tlb_overflow_buffer)
250 goto cleanup4;
251
25667d67
TL
252 printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
253 "0x%lx\n", bytes >> 20,
254 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
0b9afede
AW
255
256 return 0;
257
258cleanup4:
25667d67
TL
259 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
260 sizeof(char *)));
0b9afede
AW
261 io_tlb_orig_addr = NULL;
262cleanup3:
25667d67
TL
263 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
264 sizeof(int)));
0b9afede 265 io_tlb_list = NULL;
0b9afede 266cleanup2:
563aaf06 267 io_tlb_end = NULL;
0b9afede
AW
268 free_pages((unsigned long)io_tlb_start, order);
269 io_tlb_start = NULL;
270cleanup1:
271 io_tlb_nslabs = req_nslabs;
272 return -ENOMEM;
273}
274
be6b0267 275static int
1da177e4
LT
276address_needs_mapping(struct device *hwdev, dma_addr_t addr)
277{
278 dma_addr_t mask = 0xffffffff;
279 /* If the device has a mask, use it, otherwise default to 32 bits */
280 if (hwdev && hwdev->dma_mask)
281 mask = *hwdev->dma_mask;
282 return (addr & ~mask) != 0;
283}
284
681cc5cd
FT
285static inline unsigned int is_span_boundary(unsigned int index,
286 unsigned int nslots,
287 unsigned long offset_slots,
288 unsigned long max_slots)
289{
290 unsigned long offset = (offset_slots + index) & (max_slots - 1);
291 return offset + nslots > max_slots;
292}
293
1da177e4
LT
294/*
295 * Allocates bounce buffer and returns its kernel virtual address.
296 */
297static void *
25667d67 298map_single(struct device *hwdev, char *buffer, size_t size, int dir)
1da177e4
LT
299{
300 unsigned long flags;
301 char *dma_addr;
302 unsigned int nslots, stride, index, wrap;
303 int i;
681cc5cd
FT
304 unsigned long start_dma_addr;
305 unsigned long mask;
306 unsigned long offset_slots;
307 unsigned long max_slots;
308
309 mask = dma_get_seg_boundary(hwdev);
310 start_dma_addr = virt_to_bus(io_tlb_start) & mask;
311
312 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
b15a3891
JB
313 max_slots = mask + 1
314 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
315 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
1da177e4
LT
316
317 /*
318 * For mappings greater than a page, we limit the stride (and
319 * hence alignment) to a page size.
320 */
321 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
322 if (size > PAGE_SIZE)
323 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
324 else
325 stride = 1;
326
34814545 327 BUG_ON(!nslots);
1da177e4
LT
328
329 /*
330 * Find suitable number of IO TLB entries size that will fit this
331 * request and allocate a buffer from that IO TLB pool.
332 */
333 spin_lock_irqsave(&io_tlb_lock, flags);
a7133a15
AM
334 index = ALIGN(io_tlb_index, stride);
335 if (index >= io_tlb_nslabs)
336 index = 0;
337 wrap = index;
338
339 do {
340 while (is_span_boundary(index, nslots, offset_slots,
341 max_slots)) {
b15a3891
JB
342 index += stride;
343 if (index >= io_tlb_nslabs)
344 index = 0;
a7133a15
AM
345 if (index == wrap)
346 goto not_found;
347 }
348
349 /*
350 * If we find a slot that indicates we have 'nslots' number of
351 * contiguous buffers, we allocate the buffers from that slot
352 * and mark the entries as '0' indicating unavailable.
353 */
354 if (io_tlb_list[index] >= nslots) {
355 int count = 0;
356
357 for (i = index; i < (int) (index + nslots); i++)
358 io_tlb_list[i] = 0;
359 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
360 io_tlb_list[i] = ++count;
361 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
1da177e4 362
a7133a15
AM
363 /*
364 * Update the indices to avoid searching in the next
365 * round.
366 */
367 io_tlb_index = ((index + nslots) < io_tlb_nslabs
368 ? (index + nslots) : 0);
369
370 goto found;
371 }
372 index += stride;
373 if (index >= io_tlb_nslabs)
374 index = 0;
375 } while (index != wrap);
376
377not_found:
378 spin_unlock_irqrestore(&io_tlb_lock, flags);
379 return NULL;
380found:
1da177e4
LT
381 spin_unlock_irqrestore(&io_tlb_lock, flags);
382
383 /*
384 * Save away the mapping from the original address to the DMA address.
385 * This is needed when we sync the memory. Then we sync the buffer if
386 * needed.
387 */
df336d1c
KF
388 for (i = 0; i < nslots; i++)
389 io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
1da177e4 390 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
25667d67 391 memcpy(dma_addr, buffer, size);
1da177e4
LT
392
393 return dma_addr;
394}
395
396/*
397 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
398 */
399static void
400unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
401{
402 unsigned long flags;
403 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
404 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
25667d67 405 char *buffer = io_tlb_orig_addr[index];
1da177e4
LT
406
407 /*
408 * First, sync the memory before unmapping the entry
409 */
25667d67 410 if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
1da177e4
LT
411 /*
412 * bounce... copy the data back into the original buffer * and
413 * delete the bounce buffer.
414 */
25667d67 415 memcpy(buffer, dma_addr, size);
1da177e4
LT
416
417 /*
418 * Return the buffer to the free list by setting the corresponding
419 * entries to indicate the number of contigous entries available.
420 * While returning the entries to the free list, we merge the entries
421 * with slots below and above the pool being returned.
422 */
423 spin_lock_irqsave(&io_tlb_lock, flags);
424 {
425 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
426 io_tlb_list[index + nslots] : 0);
427 /*
428 * Step 1: return the slots to the free list, merging the
429 * slots with superceeding slots
430 */
431 for (i = index + nslots - 1; i >= index; i--)
432 io_tlb_list[i] = ++count;
433 /*
434 * Step 2: merge the returned slots with the preceding slots,
435 * if available (non zero)
436 */
437 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
438 io_tlb_list[i] = ++count;
439 }
440 spin_unlock_irqrestore(&io_tlb_lock, flags);
441}
442
443static void
de69e0f0
JL
444sync_single(struct device *hwdev, char *dma_addr, size_t size,
445 int dir, int target)
1da177e4
LT
446{
447 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
25667d67 448 char *buffer = io_tlb_orig_addr[index];
1da177e4 449
df336d1c
KF
450 buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
451
de69e0f0
JL
452 switch (target) {
453 case SYNC_FOR_CPU:
454 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
25667d67 455 memcpy(buffer, dma_addr, size);
34814545
ES
456 else
457 BUG_ON(dir != DMA_TO_DEVICE);
de69e0f0
JL
458 break;
459 case SYNC_FOR_DEVICE:
460 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
25667d67 461 memcpy(dma_addr, buffer, size);
34814545
ES
462 else
463 BUG_ON(dir != DMA_FROM_DEVICE);
de69e0f0
JL
464 break;
465 default:
1da177e4 466 BUG();
de69e0f0 467 }
1da177e4
LT
468}
469
470void *
471swiotlb_alloc_coherent(struct device *hwdev, size_t size,
06a54497 472 dma_addr_t *dma_handle, gfp_t flags)
1da177e4 473{
563aaf06 474 dma_addr_t dev_addr;
1da177e4
LT
475 void *ret;
476 int order = get_order(size);
477
478 /*
479 * XXX fix me: the DMA API should pass us an explicit DMA mask
480 * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
481 * bit range instead of a 16MB one).
482 */
483 flags |= GFP_DMA;
484
25667d67 485 ret = (void *)__get_free_pages(flags, order);
93fbff63 486 if (ret && address_needs_mapping(hwdev, virt_to_bus(ret))) {
1da177e4
LT
487 /*
488 * The allocated memory isn't reachable by the device.
489 * Fall back on swiotlb_map_single().
490 */
491 free_pages((unsigned long) ret, order);
492 ret = NULL;
493 }
494 if (!ret) {
495 /*
496 * We are either out of memory or the device can't DMA
497 * to GFP_DMA memory; fall back on
498 * swiotlb_map_single(), which will grab memory from
499 * the lowest available address range.
500 */
501 dma_addr_t handle;
502 handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
17a941d8 503 if (swiotlb_dma_mapping_error(handle))
1da177e4
LT
504 return NULL;
505
93fbff63 506 ret = bus_to_virt(handle);
1da177e4
LT
507 }
508
509 memset(ret, 0, size);
93fbff63 510 dev_addr = virt_to_bus(ret);
1da177e4
LT
511
512 /* Confirm address can be DMA'd by device */
513 if (address_needs_mapping(hwdev, dev_addr)) {
563aaf06
JB
514 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
515 (unsigned long long)*hwdev->dma_mask,
516 (unsigned long long)dev_addr);
1da177e4
LT
517 panic("swiotlb_alloc_coherent: allocated memory is out of "
518 "range for device");
519 }
520 *dma_handle = dev_addr;
521 return ret;
522}
523
524void
525swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
526 dma_addr_t dma_handle)
527{
aa24886e 528 WARN_ON(irqs_disabled());
1da177e4
LT
529 if (!(vaddr >= (void *)io_tlb_start
530 && vaddr < (void *)io_tlb_end))
531 free_pages((unsigned long) vaddr, get_order(size));
532 else
533 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
534 swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
535}
536
537static void
538swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
539{
540 /*
541 * Ran out of IOMMU space for this operation. This is very bad.
542 * Unfortunately the drivers cannot handle this operation properly.
17e5ad6c 543 * unless they check for dma_mapping_error (most don't)
1da177e4
LT
544 * When the mapping is small enough return a static buffer to limit
545 * the damage, or panic when the transfer is too big.
546 */
563aaf06 547 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
1da177e4
LT
548 "device %s\n", size, dev ? dev->bus_id : "?");
549
550 if (size > io_tlb_overflow && do_panic) {
17e5ad6c
TL
551 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
552 panic("DMA: Memory would be corrupted\n");
553 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
554 panic("DMA: Random memory would be DMAed\n");
1da177e4
LT
555 }
556}
557
558/*
559 * Map a single buffer of the indicated size for DMA in streaming mode. The
17e5ad6c 560 * physical address to use is returned.
1da177e4
LT
561 *
562 * Once the device is given the dma address, the device owns this memory until
563 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
564 */
565dma_addr_t
566swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
567{
563aaf06 568 dma_addr_t dev_addr = virt_to_bus(ptr);
1da177e4
LT
569 void *map;
570
34814545 571 BUG_ON(dir == DMA_NONE);
1da177e4
LT
572 /*
573 * If the pointer passed in happens to be in the device's DMA window,
574 * we can safely return the device addr and not worry about bounce
575 * buffering it.
576 */
25667d67 577 if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force)
1da177e4
LT
578 return dev_addr;
579
580 /*
581 * Oh well, have to allocate and map a bounce buffer.
582 */
25667d67 583 map = map_single(hwdev, ptr, size, dir);
1da177e4
LT
584 if (!map) {
585 swiotlb_full(hwdev, size, dir, 1);
586 map = io_tlb_overflow_buffer;
587 }
588
93fbff63 589 dev_addr = virt_to_bus(map);
1da177e4
LT
590
591 /*
592 * Ensure that the address returned is DMA'ble
593 */
594 if (address_needs_mapping(hwdev, dev_addr))
595 panic("map_single: bounce buffer is not DMA'ble");
596
597 return dev_addr;
598}
599
1da177e4
LT
600/*
601 * Unmap a single streaming mode DMA translation. The dma_addr and size must
602 * match what was provided for in a previous swiotlb_map_single call. All
603 * other usages are undefined.
604 *
605 * After this call, reads by the cpu to the buffer are guaranteed to see
606 * whatever the device wrote there.
607 */
608void
609swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
610 int dir)
611{
93fbff63 612 char *dma_addr = bus_to_virt(dev_addr);
1da177e4 613
34814545 614 BUG_ON(dir == DMA_NONE);
1da177e4
LT
615 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
616 unmap_single(hwdev, dma_addr, size, dir);
617 else if (dir == DMA_FROM_DEVICE)
cde14bbf 618 dma_mark_clean(dma_addr, size);
1da177e4
LT
619}
620
621/*
622 * Make physical memory consistent for a single streaming mode DMA translation
623 * after a transfer.
624 *
625 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
17e5ad6c
TL
626 * using the cpu, yet do not wish to teardown the dma mapping, you must
627 * call this function before doing so. At the next point you give the dma
1da177e4
LT
628 * address back to the card, you must first perform a
629 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
630 */
be6b0267 631static void
8270f3f1 632swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0 633 size_t size, int dir, int target)
1da177e4 634{
93fbff63 635 char *dma_addr = bus_to_virt(dev_addr);
1da177e4 636
34814545 637 BUG_ON(dir == DMA_NONE);
1da177e4 638 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
de69e0f0 639 sync_single(hwdev, dma_addr, size, dir, target);
1da177e4 640 else if (dir == DMA_FROM_DEVICE)
cde14bbf 641 dma_mark_clean(dma_addr, size);
1da177e4
LT
642}
643
8270f3f1
JL
644void
645swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
646 size_t size, int dir)
647{
de69e0f0 648 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
8270f3f1
JL
649}
650
1da177e4
LT
651void
652swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
653 size_t size, int dir)
654{
de69e0f0 655 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
1da177e4
LT
656}
657
878a97cf
JL
658/*
659 * Same as above, but for a sub-range of the mapping.
660 */
be6b0267 661static void
878a97cf 662swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
de69e0f0
JL
663 unsigned long offset, size_t size,
664 int dir, int target)
878a97cf 665{
93fbff63 666 char *dma_addr = bus_to_virt(dev_addr) + offset;
878a97cf 667
34814545 668 BUG_ON(dir == DMA_NONE);
878a97cf 669 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
de69e0f0 670 sync_single(hwdev, dma_addr, size, dir, target);
878a97cf 671 else if (dir == DMA_FROM_DEVICE)
cde14bbf 672 dma_mark_clean(dma_addr, size);
878a97cf
JL
673}
674
675void
676swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
677 unsigned long offset, size_t size, int dir)
678{
de69e0f0
JL
679 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
680 SYNC_FOR_CPU);
878a97cf
JL
681}
682
683void
684swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
685 unsigned long offset, size_t size, int dir)
686{
de69e0f0
JL
687 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
688 SYNC_FOR_DEVICE);
878a97cf
JL
689}
690
1da177e4
LT
691/*
692 * Map a set of buffers described by scatterlist in streaming mode for DMA.
693 * This is the scatter-gather version of the above swiotlb_map_single
694 * interface. Here the scatter gather list elements are each tagged with the
695 * appropriate dma address and length. They are obtained via
696 * sg_dma_{address,length}(SG).
697 *
698 * NOTE: An implementation may be able to use a smaller number of
699 * DMA address/length pairs than there are SG table elements.
700 * (for example via virtual mapping capabilities)
701 * The routine returns the number of addr/length pairs actually
702 * used, at most nents.
703 *
704 * Device ownership issues as mentioned above for swiotlb_map_single are the
705 * same here.
706 */
707int
dbfd49fe 708swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
1da177e4
LT
709 int dir)
710{
dbfd49fe 711 struct scatterlist *sg;
25667d67 712 void *addr;
563aaf06 713 dma_addr_t dev_addr;
1da177e4
LT
714 int i;
715
34814545 716 BUG_ON(dir == DMA_NONE);
1da177e4 717
dbfd49fe 718 for_each_sg(sgl, sg, nelems, i) {
25667d67
TL
719 addr = SG_ENT_VIRT_ADDRESS(sg);
720 dev_addr = virt_to_bus(addr);
721 if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) {
722 void *map = map_single(hwdev, addr, sg->length, dir);
7e870233 723 if (!map) {
1da177e4
LT
724 /* Don't panic here, we expect map_sg users
725 to do proper error handling. */
726 swiotlb_full(hwdev, sg->length, dir, 0);
9e91fdb3 727 swiotlb_unmap_sg(hwdev, sgl, i, dir);
dbfd49fe 728 sgl[0].dma_length = 0;
1da177e4
LT
729 return 0;
730 }
cde14bbf 731 sg->dma_address = virt_to_bus(map);
1da177e4
LT
732 } else
733 sg->dma_address = dev_addr;
734 sg->dma_length = sg->length;
735 }
736 return nelems;
737}
738
739/*
740 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
741 * concerning calls here are the same as for swiotlb_unmap_single() above.
742 */
743void
dbfd49fe 744swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
1da177e4
LT
745 int dir)
746{
dbfd49fe 747 struct scatterlist *sg;
1da177e4
LT
748 int i;
749
34814545 750 BUG_ON(dir == DMA_NONE);
1da177e4 751
dbfd49fe 752 for_each_sg(sgl, sg, nelems, i) {
1da177e4 753 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
93fbff63
JB
754 unmap_single(hwdev, bus_to_virt(sg->dma_address),
755 sg->dma_length, dir);
1da177e4 756 else if (dir == DMA_FROM_DEVICE)
cde14bbf 757 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
dbfd49fe 758 }
1da177e4
LT
759}
760
761/*
762 * Make physical memory consistent for a set of streaming mode DMA translations
763 * after a transfer.
764 *
765 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
766 * and usage.
767 */
be6b0267 768static void
dbfd49fe 769swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
de69e0f0 770 int nelems, int dir, int target)
1da177e4 771{
dbfd49fe 772 struct scatterlist *sg;
1da177e4
LT
773 int i;
774
34814545 775 BUG_ON(dir == DMA_NONE);
1da177e4 776
dbfd49fe 777 for_each_sg(sgl, sg, nelems, i) {
1da177e4 778 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
93fbff63 779 sync_single(hwdev, bus_to_virt(sg->dma_address),
de69e0f0 780 sg->dma_length, dir, target);
cde14bbf
JB
781 else if (dir == DMA_FROM_DEVICE)
782 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
dbfd49fe 783 }
1da177e4
LT
784}
785
8270f3f1
JL
786void
787swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
788 int nelems, int dir)
789{
de69e0f0 790 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
8270f3f1
JL
791}
792
1da177e4
LT
793void
794swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
795 int nelems, int dir)
796{
de69e0f0 797 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1da177e4
LT
798}
799
800int
801swiotlb_dma_mapping_error(dma_addr_t dma_addr)
802{
93fbff63 803 return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
1da177e4
LT
804}
805
806/*
17e5ad6c 807 * Return whether the given device DMA address mask can be supported
1da177e4 808 * properly. For example, if your device can only drive the low 24-bits
17e5ad6c 809 * during bus mastering, then you would pass 0x00ffffff as the mask to
1da177e4
LT
810 * this function.
811 */
812int
563aaf06 813swiotlb_dma_supported(struct device *hwdev, u64 mask)
1da177e4 814{
25667d67 815 return virt_to_bus(io_tlb_end - 1) <= mask;
1da177e4
LT
816}
817
1da177e4
LT
818EXPORT_SYMBOL(swiotlb_map_single);
819EXPORT_SYMBOL(swiotlb_unmap_single);
820EXPORT_SYMBOL(swiotlb_map_sg);
821EXPORT_SYMBOL(swiotlb_unmap_sg);
822EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
823EXPORT_SYMBOL(swiotlb_sync_single_for_device);
878a97cf
JL
824EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
825EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
1da177e4
LT
826EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
827EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
828EXPORT_SYMBOL(swiotlb_dma_mapping_error);
25667d67
TL
829EXPORT_SYMBOL(swiotlb_alloc_coherent);
830EXPORT_SYMBOL(swiotlb_free_coherent);
1da177e4 831EXPORT_SYMBOL(swiotlb_dma_supported);