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be2net: Fix rx_drops_no_fragments stat being incorrectly indexed
[net-next-2.6.git] / drivers / net / benet / be_main.c
CommitLineData
6b7c5b94
SP		 1/*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#include "be.h"
8788fdc2 19#include "be_cmds.h"
65f71b8b 20#include <asm/div64.h>
6b7c5b94
SP		 21
22MODULE_VERSION(DRV_VER);
23MODULE_DEVICE_TABLE(pci, be_dev_ids);
24MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25MODULE_AUTHOR("ServerEngines Corporation");
26MODULE_LICENSE("GPL");
27
28static unsigned int rx_frag_size = 2048;
29module_param(rx_frag_size, uint, S_IRUGO);
30MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
31
6b7c5b94 32static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
c4ca2374 33 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
59fd5d87 34 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
c4ca2374
AK		 35 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
36 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
59fd5d87 37 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
6b7c5b94
SP		 38 { 0 }
39};
40MODULE_DEVICE_TABLE(pci, be_dev_ids);
41
42static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
43{
44 struct be_dma_mem *mem = &q->dma_mem;
45 if (mem->va)
46 pci_free_consistent(adapter->pdev, mem->size,
47 mem->va, mem->dma);
48}
49
50static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
51 u16 len, u16 entry_size)
52{
53 struct be_dma_mem *mem = &q->dma_mem;
54
55 memset(q, 0, sizeof(*q));
56 q->len = len;
57 q->entry_size = entry_size;
58 mem->size = len * entry_size;
59 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
60 if (!mem->va)
61 return -1;
62 memset(mem->va, 0, mem->size);
63 return 0;
64}
65
8788fdc2 66static void be_intr_set(struct be_adapter *adapter, bool enable)
6b7c5b94 67{
8788fdc2 68 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
6b7c5b94
SP		 69 u32 reg = ioread32(addr);
70 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e
SP		 71
72 if (!enabled && enable)
6b7c5b94 73 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 74 else if (enabled && !enable)
6b7c5b94 75 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 76 else
6b7c5b94 77 return;
5f0b849e 78
6b7c5b94
SP		 79 iowrite32(reg, addr);
80}
81
8788fdc2 82static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 83{
84 u32 val = 0;
85 val |= qid & DB_RQ_RING_ID_MASK;
86 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
8788fdc2 87 iowrite32(val, adapter->db + DB_RQ_OFFSET);
6b7c5b94
SP		 88}
89
8788fdc2 90static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 91{
92 u32 val = 0;
93 val |= qid & DB_TXULP_RING_ID_MASK;
94 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
8788fdc2 95 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
6b7c5b94
SP		 96}
97
8788fdc2 98static void be_eq_notify(struct be_adapter *adapter, u16 qid,
6b7c5b94
SP		 99 bool arm, bool clear_int, u16 num_popped)
100{
101 u32 val = 0;
102 val |= qid & DB_EQ_RING_ID_MASK;
103 if (arm)
104 val |= 1 << DB_EQ_REARM_SHIFT;
105 if (clear_int)
106 val |= 1 << DB_EQ_CLR_SHIFT;
107 val |= 1 << DB_EQ_EVNT_SHIFT;
108 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
8788fdc2 109 iowrite32(val, adapter->db + DB_EQ_OFFSET);
6b7c5b94
SP		 110}
111
8788fdc2 112void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
6b7c5b94
SP		 113{
114 u32 val = 0;
115 val |= qid & DB_CQ_RING_ID_MASK;
116 if (arm)
117 val |= 1 << DB_CQ_REARM_SHIFT;
118 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
8788fdc2 119 iowrite32(val, adapter->db + DB_CQ_OFFSET);
6b7c5b94
SP		 120}
121
6b7c5b94
SP		 122static int be_mac_addr_set(struct net_device *netdev, void *p)
123{
124 struct be_adapter *adapter = netdev_priv(netdev);
125 struct sockaddr *addr = p;
126 int status = 0;
127
a65027e4
SP		 128 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
129 if (status)
130 return status;
6b7c5b94 131
a65027e4
SP		 132 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
133 adapter->if_handle, &adapter->pmac_id);
6b7c5b94
SP		 134 if (!status)
135 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
136
137 return status;
138}
139
b31c50a7 140void netdev_stats_update(struct be_adapter *adapter)
6b7c5b94
SP		 141{
142 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
143 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
144 struct be_port_rxf_stats *port_stats =
145 &rxf_stats->port[adapter->port_num];
78122a52 146 struct net_device_stats *dev_stats = &adapter->netdev->stats;
68110868 147 struct be_erx_stats *erx_stats = &hw_stats->erx;
6b7c5b94
SP		 148
149 dev_stats->rx_packets = port_stats->rx_total_frames;
150 dev_stats->tx_packets = port_stats->tx_unicastframes +
151 port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
152 dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
153 (u64) port_stats->rx_bytes_lsd;
154 dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
155 (u64) port_stats->tx_bytes_lsd;
156
157 /* bad pkts received */
158 dev_stats->rx_errors = port_stats->rx_crc_errors +
159 port_stats->rx_alignment_symbol_errors +
160 port_stats->rx_in_range_errors +
68110868
SP		 161 port_stats->rx_out_range_errors +
162 port_stats->rx_frame_too_long +
163 port_stats->rx_dropped_too_small +
164 port_stats->rx_dropped_too_short +
165 port_stats->rx_dropped_header_too_small +
166 port_stats->rx_dropped_tcp_length +
167 port_stats->rx_dropped_runt +
168 port_stats->rx_tcp_checksum_errs +
169 port_stats->rx_ip_checksum_errs +
170 port_stats->rx_udp_checksum_errs;
171
172 /* no space in linux buffers: best possible approximation */
01ed30da
SP		 173 dev_stats->rx_dropped =
174 erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
6b7c5b94
SP		 175
176 /* detailed rx errors */
177 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
68110868
SP		 178 port_stats->rx_out_range_errors +
179 port_stats->rx_frame_too_long;
180
6b7c5b94
SP		 181 /* receive ring buffer overflow */
182 dev_stats->rx_over_errors = 0;
68110868 183
6b7c5b94
SP		 184 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
185
186 /* frame alignment errors */
187 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
68110868 188
6b7c5b94
SP		 189 /* receiver fifo overrun */
190 /* drops_no_pbuf is no per i/f, it's per BE card */
191 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
192 port_stats->rx_input_fifo_overflow +
193 rxf_stats->rx_drops_no_pbuf;
194 /* receiver missed packetd */
195 dev_stats->rx_missed_errors = 0;
68110868
SP		 196
197 /* packet transmit problems */
198 dev_stats->tx_errors = 0;
199
200 /* no space available in linux */
201 dev_stats->tx_dropped = 0;
202
c5b9b92e 203 dev_stats->multicast = port_stats->rx_multicast_frames;
68110868
SP		 204 dev_stats->collisions = 0;
205
6b7c5b94
SP		 206 /* detailed tx_errors */
207 dev_stats->tx_aborted_errors = 0;
208 dev_stats->tx_carrier_errors = 0;
209 dev_stats->tx_fifo_errors = 0;
210 dev_stats->tx_heartbeat_errors = 0;
211 dev_stats->tx_window_errors = 0;
212}
213
8788fdc2 214void be_link_status_update(struct be_adapter *adapter, bool link_up)
6b7c5b94 215{
6b7c5b94
SP		 216 struct net_device *netdev = adapter->netdev;
217
6b7c5b94 218 /* If link came up or went down */
a8f447bd
SP		 219 if (adapter->link_up != link_up) {
220 if (link_up) {
6b7c5b94
SP		 221 netif_start_queue(netdev);
222 netif_carrier_on(netdev);
223 printk(KERN_INFO "%s: Link up\n", netdev->name);
a8f447bd
SP		 224 } else {
225 netif_stop_queue(netdev);
226 netif_carrier_off(netdev);
227 printk(KERN_INFO "%s: Link down\n", netdev->name);
6b7c5b94 228 }
a8f447bd 229 adapter->link_up = link_up;
6b7c5b94 230 }
6b7c5b94
SP		 231}
232
233/* Update the EQ delay n BE based on the RX frags consumed / sec */
234static void be_rx_eqd_update(struct be_adapter *adapter)
235{
6b7c5b94
SP		 236 struct be_eq_obj *rx_eq = &adapter->rx_eq;
237 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
4097f663
SP		 238 ulong now = jiffies;
239 u32 eqd;
240
241 if (!rx_eq->enable_aic)
242 return;
243
244 /* Wrapped around */
245 if (time_before(now, stats->rx_fps_jiffies)) {
246 stats->rx_fps_jiffies = now;
247 return;
248 }
6b7c5b94
SP		 249
250 /* Update once a second */
4097f663 251 if ((now - stats->rx_fps_jiffies) < HZ)
6b7c5b94
SP		 252 return;
253
254 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
4097f663 255 ((now - stats->rx_fps_jiffies) / HZ);
6b7c5b94 256
4097f663 257 stats->rx_fps_jiffies = now;
6b7c5b94
SP		 258 stats->be_prev_rx_frags = stats->be_rx_frags;
259 eqd = stats->be_rx_fps / 110000;
260 eqd = eqd << 3;
261 if (eqd > rx_eq->max_eqd)
262 eqd = rx_eq->max_eqd;
263 if (eqd < rx_eq->min_eqd)
264 eqd = rx_eq->min_eqd;
265 if (eqd < 10)
266 eqd = 0;
267 if (eqd != rx_eq->cur_eqd)
8788fdc2 268 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
6b7c5b94
SP		 269
270 rx_eq->cur_eqd = eqd;
271}
272
6b7c5b94
SP		 273static struct net_device_stats *be_get_stats(struct net_device *dev)
274{
78122a52 275 return &dev->stats;
6b7c5b94
SP		 276}
277
65f71b8b
SH		 278static u32 be_calc_rate(u64 bytes, unsigned long ticks)
279{
280 u64 rate = bytes;
281
282 do_div(rate, ticks / HZ);
283 rate <<= 3; /* bytes/sec -> bits/sec */
284 do_div(rate, 1000000ul); /* MB/Sec */
285
286 return rate;
287}
288
4097f663
SP		 289static void be_tx_rate_update(struct be_adapter *adapter)
290{
291 struct be_drvr_stats *stats = drvr_stats(adapter);
292 ulong now = jiffies;
293
294 /* Wrapped around? */
295 if (time_before(now, stats->be_tx_jiffies)) {
296 stats->be_tx_jiffies = now;
297 return;
298 }
299
300 /* Update tx rate once in two seconds */
301 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
65f71b8b
SH		 302 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
303 - stats->be_tx_bytes_prev,
304 now - stats->be_tx_jiffies);
4097f663
SP		 305 stats->be_tx_jiffies = now;
306 stats->be_tx_bytes_prev = stats->be_tx_bytes;
307 }
308}
309
6b7c5b94
SP		 310static void be_tx_stats_update(struct be_adapter *adapter,
311 u32 wrb_cnt, u32 copied, bool stopped)
312{
4097f663 313 struct be_drvr_stats *stats = drvr_stats(adapter);
6b7c5b94
SP		 314 stats->be_tx_reqs++;
315 stats->be_tx_wrbs += wrb_cnt;
316 stats->be_tx_bytes += copied;
317 if (stopped)
318 stats->be_tx_stops++;
6b7c5b94
SP		 319}
320
321/* Determine number of WRB entries needed to xmit data in an skb */
322static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
323{
ebc8d2ab
DM		 324 int cnt = (skb->len > skb->data_len);
325
326 cnt += skb_shinfo(skb)->nr_frags;
327
6b7c5b94
SP		 328 /* to account for hdr wrb */
329 cnt++;
330 if (cnt & 1) {
331 /* add a dummy to make it an even num */
332 cnt++;
333 *dummy = true;
334 } else
335 *dummy = false;
336 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
337 return cnt;
338}
339
340static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
341{
342 wrb->frag_pa_hi = upper_32_bits(addr);
343 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
344 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
345}
346
347static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
348 bool vlan, u32 wrb_cnt, u32 len)
349{
350 memset(hdr, 0, sizeof(*hdr));
351
352 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
353
354 if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
355 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
356 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
357 hdr, skb_shinfo(skb)->gso_size);
358 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
359 if (is_tcp_pkt(skb))
360 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
361 else if (is_udp_pkt(skb))
362 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
363 }
364
365 if (vlan && vlan_tx_tag_present(skb)) {
366 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
367 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
368 hdr, vlan_tx_tag_get(skb));
369 }
370
371 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
372 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
373 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
374 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
375}
376
377
378static int make_tx_wrbs(struct be_adapter *adapter,
379 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
380{
381 u64 busaddr;
382 u32 i, copied = 0;
383 struct pci_dev *pdev = adapter->pdev;
384 struct sk_buff *first_skb = skb;
385 struct be_queue_info *txq = &adapter->tx_obj.q;
386 struct be_eth_wrb *wrb;
387 struct be_eth_hdr_wrb *hdr;
388
6b7c5b94 389 hdr = queue_head_node(txq);
c190e3c8 390 atomic_add(wrb_cnt, &txq->used);
6b7c5b94
SP		 391 queue_head_inc(txq);
392
c190e3c8
AK		 393 if (skb_dma_map(&pdev->dev, skb, DMA_TO_DEVICE)) {
394 dev_err(&pdev->dev, "TX DMA mapping failed\n");
395 return 0;
396 }
397
ebc8d2ab
DM		 398 if (skb->len > skb->data_len) {
399 int len = skb->len - skb->data_len;
ebc8d2ab 400 wrb = queue_head_node(txq);
c190e3c8 401 busaddr = skb_shinfo(skb)->dma_head;
ebc8d2ab
DM		 402 wrb_fill(wrb, busaddr, len);
403 be_dws_cpu_to_le(wrb, sizeof(*wrb));
404 queue_head_inc(txq);
405 copied += len;
406 }
6b7c5b94 407
ebc8d2ab
DM		 408 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
409 struct skb_frag_struct *frag =
410 &skb_shinfo(skb)->frags[i];
c190e3c8
AK		 411
412 busaddr = skb_shinfo(skb)->dma_maps[i];
ebc8d2ab
DM		 413 wrb = queue_head_node(txq);
414 wrb_fill(wrb, busaddr, frag->size);
415 be_dws_cpu_to_le(wrb, sizeof(*wrb));
416 queue_head_inc(txq);
417 copied += frag->size;
6b7c5b94
SP		 418 }
419
420 if (dummy_wrb) {
421 wrb = queue_head_node(txq);
422 wrb_fill(wrb, 0, 0);
423 be_dws_cpu_to_le(wrb, sizeof(*wrb));
424 queue_head_inc(txq);
425 }
426
427 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
428 wrb_cnt, copied);
429 be_dws_cpu_to_le(hdr, sizeof(*hdr));
430
431 return copied;
432}
433
61357325 434static netdev_tx_t be_xmit(struct sk_buff *skb,
b31c50a7 435 struct net_device *netdev)
6b7c5b94
SP		 436{
437 struct be_adapter *adapter = netdev_priv(netdev);
438 struct be_tx_obj *tx_obj = &adapter->tx_obj;
439 struct be_queue_info *txq = &tx_obj->q;
440 u32 wrb_cnt = 0, copied = 0;
441 u32 start = txq->head;
442 bool dummy_wrb, stopped = false;
443
444 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
445
446 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
c190e3c8
AK		 447 if (copied) {
448 /* record the sent skb in the sent_skb table */
449 BUG_ON(tx_obj->sent_skb_list[start]);
450 tx_obj->sent_skb_list[start] = skb;
451
452 /* Ensure txq has space for the next skb; Else stop the queue
453 * *BEFORE* ringing the tx doorbell, so that we serialze the
454 * tx compls of the current transmit which'll wake up the queue
455 */
456 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
457 txq->len) {
458 netif_stop_queue(netdev);
459 stopped = true;
460 }
6b7c5b94 461
c190e3c8 462 be_txq_notify(adapter, txq->id, wrb_cnt);
6b7c5b94 463
c190e3c8
AK		 464 be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
465 } else {
466 txq->head = start;
467 dev_kfree_skb_any(skb);
6b7c5b94 468 }
6b7c5b94
SP		 469 return NETDEV_TX_OK;
470}
471
472static int be_change_mtu(struct net_device *netdev, int new_mtu)
473{
474 struct be_adapter *adapter = netdev_priv(netdev);
475 if (new_mtu < BE_MIN_MTU ||
476 new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
477 dev_info(&adapter->pdev->dev,
478 "MTU must be between %d and %d bytes\n",
479 BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
480 return -EINVAL;
481 }
482 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
483 netdev->mtu, new_mtu);
484 netdev->mtu = new_mtu;
485 return 0;
486}
487
488/*
489 * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
490 * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
491 * set the BE in promiscuous VLAN mode.
492 */
b31c50a7 493static int be_vid_config(struct be_adapter *adapter)
6b7c5b94 494{
6b7c5b94
SP		 495 u16 vtag[BE_NUM_VLANS_SUPPORTED];
496 u16 ntags = 0, i;
b31c50a7 497 int status;
6b7c5b94
SP		 498
499 if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
500 /* Construct VLAN Table to give to HW */
501 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
502 if (adapter->vlan_tag[i]) {
503 vtag[ntags] = cpu_to_le16(i);
504 ntags++;
505 }
506 }
b31c50a7
SP		 507 status = be_cmd_vlan_config(adapter, adapter->if_handle,
508 vtag, ntags, 1, 0);
6b7c5b94 509 } else {
b31c50a7
SP		 510 status = be_cmd_vlan_config(adapter, adapter->if_handle,
511 NULL, 0, 1, 1);
6b7c5b94 512 }
b31c50a7 513 return status;
6b7c5b94
SP		 514}
515
516static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
517{
518 struct be_adapter *adapter = netdev_priv(netdev);
519 struct be_eq_obj *rx_eq = &adapter->rx_eq;
520 struct be_eq_obj *tx_eq = &adapter->tx_eq;
6b7c5b94 521
8788fdc2
SP		 522 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
523 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
6b7c5b94 524 adapter->vlan_grp = grp;
8788fdc2
SP		 525 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
526 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
6b7c5b94
SP		 527}
528
529static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
530{
531 struct be_adapter *adapter = netdev_priv(netdev);
532
533 adapter->num_vlans++;
534 adapter->vlan_tag[vid] = 1;
535
b31c50a7 536 be_vid_config(adapter);
6b7c5b94
SP		 537}
538
539static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
540{
541 struct be_adapter *adapter = netdev_priv(netdev);
542
543 adapter->num_vlans--;
544 adapter->vlan_tag[vid] = 0;
545
546 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
b31c50a7 547 be_vid_config(adapter);
6b7c5b94
SP		 548}
549
24307eef 550static void be_set_multicast_list(struct net_device *netdev)
6b7c5b94
SP		 551{
552 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94 553
24307eef 554 if (netdev->flags & IFF_PROMISC) {
8788fdc2 555 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
24307eef
SP		 556 adapter->promiscuous = true;
557 goto done;
6b7c5b94
SP		 558 }
559
24307eef
SP		 560 /* BE was previously in promiscous mode; disable it */
561 if (adapter->promiscuous) {
562 adapter->promiscuous = false;
8788fdc2 563 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
6b7c5b94
SP		 564 }
565
e7b909a6
SP		 566 /* Enable multicast promisc if num configured exceeds what we support */
567 if (netdev->flags & IFF_ALLMULTI || netdev->mc_count > BE_MAX_MC) {
568 be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
569 &adapter->mc_cmd_mem);
24307eef 570 goto done;
6b7c5b94 571 }
6b7c5b94 572
8788fdc2 573 be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
e7b909a6 574 netdev->mc_count, &adapter->mc_cmd_mem);
24307eef
SP		 575done:
576 return;
6b7c5b94
SP		 577}
578
4097f663 579static void be_rx_rate_update(struct be_adapter *adapter)
6b7c5b94 580{
4097f663
SP		 581 struct be_drvr_stats *stats = drvr_stats(adapter);
582 ulong now = jiffies;
6b7c5b94 583
4097f663
SP		 584 /* Wrapped around */
585 if (time_before(now, stats->be_rx_jiffies)) {
586 stats->be_rx_jiffies = now;
587 return;
588 }
6b7c5b94
SP		 589
590 /* Update the rate once in two seconds */
4097f663 591 if ((now - stats->be_rx_jiffies) < 2 * HZ)
6b7c5b94
SP		 592 return;
593
65f71b8b
SH		 594 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
595 - stats->be_rx_bytes_prev,
596 now - stats->be_rx_jiffies);
4097f663 597 stats->be_rx_jiffies = now;
6b7c5b94
SP		 598 stats->be_rx_bytes_prev = stats->be_rx_bytes;
599}
600
4097f663
SP		 601static void be_rx_stats_update(struct be_adapter *adapter,
602 u32 pktsize, u16 numfrags)
603{
604 struct be_drvr_stats *stats = drvr_stats(adapter);
605
606 stats->be_rx_compl++;
607 stats->be_rx_frags += numfrags;
608 stats->be_rx_bytes += pktsize;
609}
610
728a9972
AK		 611static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
612{
613 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
614
615 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
616 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
617 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
618 if (ip_version) {
619 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
620 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
621 }
622 ipv6_chk = (ip_version && (tcpf || udpf));
623
624 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
625}
626
6b7c5b94
SP		 627static struct be_rx_page_info *
628get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
629{
630 struct be_rx_page_info *rx_page_info;
631 struct be_queue_info *rxq = &adapter->rx_obj.q;
632
633 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
634 BUG_ON(!rx_page_info->page);
635
636 if (rx_page_info->last_page_user)
637 pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
638 adapter->big_page_size, PCI_DMA_FROMDEVICE);
639
640 atomic_dec(&rxq->used);
641 return rx_page_info;
642}
643
644/* Throwaway the data in the Rx completion */
645static void be_rx_compl_discard(struct be_adapter *adapter,
646 struct be_eth_rx_compl *rxcp)
647{
648 struct be_queue_info *rxq = &adapter->rx_obj.q;
649 struct be_rx_page_info *page_info;
650 u16 rxq_idx, i, num_rcvd;
651
652 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
653 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
654
655 for (i = 0; i < num_rcvd; i++) {
656 page_info = get_rx_page_info(adapter, rxq_idx);
657 put_page(page_info->page);
658 memset(page_info, 0, sizeof(*page_info));
659 index_inc(&rxq_idx, rxq->len);
660 }
661}
662
663/*
664 * skb_fill_rx_data forms a complete skb for an ether frame
665 * indicated by rxcp.
666 */
667static void skb_fill_rx_data(struct be_adapter *adapter,
668 struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
669{
670 struct be_queue_info *rxq = &adapter->rx_obj.q;
671 struct be_rx_page_info *page_info;
bd46cb6c 672 u16 rxq_idx, i, num_rcvd, j;
fa77406a 673 u32 pktsize, hdr_len, curr_frag_len, size;
6b7c5b94
SP		 674 u8 *start;
675
676 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
677 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
678 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
679
680 page_info = get_rx_page_info(adapter, rxq_idx);
681
682 start = page_address(page_info->page) + page_info->page_offset;
683 prefetch(start);
684
685 /* Copy data in the first descriptor of this completion */
686 curr_frag_len = min(pktsize, rx_frag_size);
687
688 /* Copy the header portion into skb_data */
689 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
690 memcpy(skb->data, start, hdr_len);
691 skb->len = curr_frag_len;
692 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
693 /* Complete packet has now been moved to data */
694 put_page(page_info->page);
695 skb->data_len = 0;
696 skb->tail += curr_frag_len;
697 } else {
698 skb_shinfo(skb)->nr_frags = 1;
699 skb_shinfo(skb)->frags[0].page = page_info->page;
700 skb_shinfo(skb)->frags[0].page_offset =
701 page_info->page_offset + hdr_len;
702 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
703 skb->data_len = curr_frag_len - hdr_len;
704 skb->tail += hdr_len;
705 }
706 memset(page_info, 0, sizeof(*page_info));
707
708 if (pktsize <= rx_frag_size) {
709 BUG_ON(num_rcvd != 1);
76fbb429 710 goto done;
6b7c5b94
SP		 711 }
712
713 /* More frags present for this completion */
fa77406a 714 size = pktsize;
bd46cb6c 715 for (i = 1, j = 0; i < num_rcvd; i++) {
fa77406a 716 size -= curr_frag_len;
6b7c5b94
SP		 717 index_inc(&rxq_idx, rxq->len);
718 page_info = get_rx_page_info(adapter, rxq_idx);
719
fa77406a 720 curr_frag_len = min(size, rx_frag_size);
6b7c5b94 721
bd46cb6c
AK		 722 /* Coalesce all frags from the same physical page in one slot */
723 if (page_info->page_offset == 0) {
724 /* Fresh page */
725 j++;
726 skb_shinfo(skb)->frags[j].page = page_info->page;
727 skb_shinfo(skb)->frags[j].page_offset =
728 page_info->page_offset;
729 skb_shinfo(skb)->frags[j].size = 0;
730 skb_shinfo(skb)->nr_frags++;
731 } else {
732 put_page(page_info->page);
733 }
734
735 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94
SP		 736 skb->len += curr_frag_len;
737 skb->data_len += curr_frag_len;
6b7c5b94
SP		 738
739 memset(page_info, 0, sizeof(*page_info));
740 }
bd46cb6c 741 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 742
76fbb429 743done:
4097f663 744 be_rx_stats_update(adapter, pktsize, num_rcvd);
6b7c5b94
SP		 745 return;
746}
747
5be93b9a 748/* Process the RX completion indicated by rxcp when GRO is disabled */
6b7c5b94
SP		 749static void be_rx_compl_process(struct be_adapter *adapter,
750 struct be_eth_rx_compl *rxcp)
751{
752 struct sk_buff *skb;
dcb9b564
AK		 753 u32 vlanf, vid;
754 u8 vtm;
6b7c5b94 755
dcb9b564
AK		 756 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
757 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
758
759 /* vlanf could be wrongly set in some cards.
760 * ignore if vtm is not set */
761 if ((adapter->cap == 0x400) && !vtm)
762 vlanf = 0;
6b7c5b94 763
89d71a66 764 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
6b7c5b94
SP		 765 if (!skb) {
766 if (net_ratelimit())
767 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
768 be_rx_compl_discard(adapter, rxcp);
769 return;
770 }
771
6b7c5b94
SP		 772 skb_fill_rx_data(adapter, skb, rxcp);
773
728a9972 774 if (do_pkt_csum(rxcp, adapter->rx_csum))
6b7c5b94 775 skb->ip_summed = CHECKSUM_NONE;
728a9972
AK		 776 else
777 skb->ip_summed = CHECKSUM_UNNECESSARY;
6b7c5b94
SP		 778
779 skb->truesize = skb->len + sizeof(struct sk_buff);
780 skb->protocol = eth_type_trans(skb, adapter->netdev);
781 skb->dev = adapter->netdev;
782
dcb9b564 783 if (vlanf) {
6b7c5b94
SP		 784 if (!adapter->vlan_grp || adapter->num_vlans == 0) {
785 kfree_skb(skb);
786 return;
787 }
788 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
789 vid = be16_to_cpu(vid);
790 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
791 } else {
792 netif_receive_skb(skb);
793 }
794
6b7c5b94
SP		 795 return;
796}
797
5be93b9a
AK		 798/* Process the RX completion indicated by rxcp when GRO is enabled */
799static void be_rx_compl_process_gro(struct be_adapter *adapter,
6b7c5b94
SP		 800 struct be_eth_rx_compl *rxcp)
801{
802 struct be_rx_page_info *page_info;
5be93b9a 803 struct sk_buff *skb = NULL;
6b7c5b94 804 struct be_queue_info *rxq = &adapter->rx_obj.q;
5be93b9a 805 struct be_eq_obj *eq_obj = &adapter->rx_eq;
6b7c5b94 806 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
bd46cb6c 807 u16 i, rxq_idx = 0, vid, j;
dcb9b564 808 u8 vtm;
6b7c5b94
SP		 809
810 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
811 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
812 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
813 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
dcb9b564
AK		 814 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
815
816 /* vlanf could be wrongly set in some cards.
817 * ignore if vtm is not set */
818 if ((adapter->cap == 0x400) && !vtm)
819 vlanf = 0;
6b7c5b94 820
5be93b9a
AK		 821 skb = napi_get_frags(&eq_obj->napi);
822 if (!skb) {
823 be_rx_compl_discard(adapter, rxcp);
824 return;
825 }
826
6b7c5b94 827 remaining = pkt_size;
bd46cb6c 828 for (i = 0, j = -1; i < num_rcvd; i++) {
6b7c5b94
SP		 829 page_info = get_rx_page_info(adapter, rxq_idx);
830
831 curr_frag_len = min(remaining, rx_frag_size);
832
bd46cb6c
AK		 833 /* Coalesce all frags from the same physical page in one slot */
834 if (i == 0 || page_info->page_offset == 0) {
835 /* First frag or Fresh page */
836 j++;
5be93b9a
AK		 837 skb_shinfo(skb)->frags[j].page = page_info->page;
838 skb_shinfo(skb)->frags[j].page_offset =
839 page_info->page_offset;
840 skb_shinfo(skb)->frags[j].size = 0;
bd46cb6c
AK		 841 } else {
842 put_page(page_info->page);
843 }
5be93b9a 844 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94 845
bd46cb6c 846 remaining -= curr_frag_len;
6b7c5b94 847 index_inc(&rxq_idx, rxq->len);
6b7c5b94
SP		 848 memset(page_info, 0, sizeof(*page_info));
849 }
bd46cb6c 850 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 851
5be93b9a
AK		 852 skb_shinfo(skb)->nr_frags = j + 1;
853 skb->len = pkt_size;
854 skb->data_len = pkt_size;
855 skb->truesize += pkt_size;
856 skb->ip_summed = CHECKSUM_UNNECESSARY;
857
6b7c5b94 858 if (likely(!vlanf)) {
5be93b9a 859 napi_gro_frags(&eq_obj->napi);
6b7c5b94
SP		 860 } else {
861 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
862 vid = be16_to_cpu(vid);
863
864 if (!adapter->vlan_grp || adapter->num_vlans == 0)
865 return;
866
5be93b9a 867 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
6b7c5b94
SP		 868 }
869
4097f663 870 be_rx_stats_update(adapter, pkt_size, num_rcvd);
6b7c5b94
SP		 871 return;
872}
873
874static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
875{
876 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
877
878 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
879 return NULL;
880
881 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
882
6b7c5b94
SP		 883 queue_tail_inc(&adapter->rx_obj.cq);
884 return rxcp;
885}
886
a7a0ef31
SP		 887/* To reset the valid bit, we need to reset the whole word as
888 * when walking the queue the valid entries are little-endian
889 * and invalid entries are host endian
890 */
891static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
892{
893 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
894}
895
6b7c5b94
SP		 896static inline struct page *be_alloc_pages(u32 size)
897{
898 gfp_t alloc_flags = GFP_ATOMIC;
899 u32 order = get_order(size);
900 if (order > 0)
901 alloc_flags |= __GFP_COMP;
902 return alloc_pages(alloc_flags, order);
903}
904
905/*
906 * Allocate a page, split it to fragments of size rx_frag_size and post as
907 * receive buffers to BE
908 */
909static void be_post_rx_frags(struct be_adapter *adapter)
910{
911 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
912 struct be_rx_page_info *page_info = NULL;
913 struct be_queue_info *rxq = &adapter->rx_obj.q;
914 struct page *pagep = NULL;
915 struct be_eth_rx_d *rxd;
916 u64 page_dmaaddr = 0, frag_dmaaddr;
917 u32 posted, page_offset = 0;
918
6b7c5b94
SP		 919 page_info = &page_info_tbl[rxq->head];
920 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
921 if (!pagep) {
922 pagep = be_alloc_pages(adapter->big_page_size);
923 if (unlikely(!pagep)) {
924 drvr_stats(adapter)->be_ethrx_post_fail++;
925 break;
926 }
927 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
928 adapter->big_page_size,
929 PCI_DMA_FROMDEVICE);
930 page_info->page_offset = 0;
931 } else {
932 get_page(pagep);
933 page_info->page_offset = page_offset + rx_frag_size;
934 }
935 page_offset = page_info->page_offset;
936 page_info->page = pagep;
937 pci_unmap_addr_set(page_info, bus, page_dmaaddr);
938 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
939
940 rxd = queue_head_node(rxq);
941 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
942 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
943 queue_head_inc(rxq);
944
945 /* Any space left in the current big page for another frag? */
946 if ((page_offset + rx_frag_size + rx_frag_size) >
947 adapter->big_page_size) {
948 pagep = NULL;
949 page_info->last_page_user = true;
950 }
951 page_info = &page_info_tbl[rxq->head];
952 }
953 if (pagep)
954 page_info->last_page_user = true;
955
956 if (posted) {
6b7c5b94 957 atomic_add(posted, &rxq->used);
8788fdc2 958 be_rxq_notify(adapter, rxq->id, posted);
ea1dae11
SP		 959 } else if (atomic_read(&rxq->used) == 0) {
960 /* Let be_worker replenish when memory is available */
961 adapter->rx_post_starved = true;
6b7c5b94
SP		 962 }
963
964 return;
965}
966
5fb379ee 967static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
6b7c5b94 968{
6b7c5b94
SP		 969 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
970
971 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
972 return NULL;
973
974 be_dws_le_to_cpu(txcp, sizeof(*txcp));
975
976 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
977
978 queue_tail_inc(tx_cq);
979 return txcp;
980}
981
982static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
983{
984 struct be_queue_info *txq = &adapter->tx_obj.q;
6b7c5b94
SP		 985 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
986 struct sk_buff *sent_skb;
6b7c5b94
SP		 987 u16 cur_index, num_wrbs = 0;
988
989 cur_index = txq->tail;
990 sent_skb = sent_skbs[cur_index];
991 BUG_ON(!sent_skb);
992 sent_skbs[cur_index] = NULL;
993
994 do {
995 cur_index = txq->tail;
6b7c5b94
SP		 996 num_wrbs++;
997 queue_tail_inc(txq);
998 } while (cur_index != last_index);
999
1000 atomic_sub(num_wrbs, &txq->used);
c190e3c8 1001 skb_dma_unmap(&adapter->pdev->dev, sent_skb, DMA_TO_DEVICE);
6b7c5b94
SP		 1002 kfree_skb(sent_skb);
1003}
1004
859b1e4e
SP		 1005static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1006{
1007 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1008
1009 if (!eqe->evt)
1010 return NULL;
1011
1012 eqe->evt = le32_to_cpu(eqe->evt);
1013 queue_tail_inc(&eq_obj->q);
1014 return eqe;
1015}
1016
1017static int event_handle(struct be_adapter *adapter,
1018 struct be_eq_obj *eq_obj)
1019{
1020 struct be_eq_entry *eqe;
1021 u16 num = 0;
1022
1023 while ((eqe = event_get(eq_obj)) != NULL) {
1024 eqe->evt = 0;
1025 num++;
1026 }
1027
1028 /* Deal with any spurious interrupts that come
1029 * without events
1030 */
1031 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1032 if (num)
1033 napi_schedule(&eq_obj->napi);
1034
1035 return num;
1036}
1037
1038/* Just read and notify events without processing them.
1039 * Used at the time of destroying event queues */
1040static void be_eq_clean(struct be_adapter *adapter,
1041 struct be_eq_obj *eq_obj)
1042{
1043 struct be_eq_entry *eqe;
1044 u16 num = 0;
1045
1046 while ((eqe = event_get(eq_obj)) != NULL) {
1047 eqe->evt = 0;
1048 num++;
1049 }
1050
1051 if (num)
1052 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1053}
1054
6b7c5b94
SP		 1055static void be_rx_q_clean(struct be_adapter *adapter)
1056{
1057 struct be_rx_page_info *page_info;
1058 struct be_queue_info *rxq = &adapter->rx_obj.q;
1059 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1060 struct be_eth_rx_compl *rxcp;
1061 u16 tail;
1062
1063 /* First cleanup pending rx completions */
1064 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1065 be_rx_compl_discard(adapter, rxcp);
a7a0ef31 1066 be_rx_compl_reset(rxcp);
8788fdc2 1067 be_cq_notify(adapter, rx_cq->id, true, 1);
6b7c5b94
SP		 1068 }
1069
1070 /* Then free posted rx buffer that were not used */
1071 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
cdab23b7 1072 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
6b7c5b94
SP		 1073 page_info = get_rx_page_info(adapter, tail);
1074 put_page(page_info->page);
1075 memset(page_info, 0, sizeof(*page_info));
1076 }
1077 BUG_ON(atomic_read(&rxq->used));
1078}
1079
a8e9179a 1080static void be_tx_compl_clean(struct be_adapter *adapter)
6b7c5b94 1081{
a8e9179a 1082 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94 1083 struct be_queue_info *txq = &adapter->tx_obj.q;
a8e9179a
SP		 1084 struct be_eth_tx_compl *txcp;
1085 u16 end_idx, cmpl = 0, timeo = 0;
1086
1087 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1088 do {
1089 while ((txcp = be_tx_compl_get(tx_cq))) {
1090 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1091 wrb_index, txcp);
1092 be_tx_compl_process(adapter, end_idx);
1093 cmpl++;
1094 }
1095 if (cmpl) {
1096 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1097 cmpl = 0;
1098 }
1099
1100 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1101 break;
1102
1103 mdelay(1);
1104 } while (true);
1105
1106 if (atomic_read(&txq->used))
1107 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1108 atomic_read(&txq->used));
6b7c5b94
SP		 1109}
1110
5fb379ee
SP		 1111static void be_mcc_queues_destroy(struct be_adapter *adapter)
1112{
1113 struct be_queue_info *q;
5fb379ee 1114
8788fdc2 1115 q = &adapter->mcc_obj.q;
5fb379ee 1116 if (q->created)
8788fdc2 1117 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
5fb379ee
SP		 1118 be_queue_free(adapter, q);
1119
8788fdc2 1120 q = &adapter->mcc_obj.cq;
5fb379ee 1121 if (q->created)
8788fdc2 1122 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
5fb379ee
SP		 1123 be_queue_free(adapter, q);
1124}
1125
1126/* Must be called only after TX qs are created as MCC shares TX EQ */
1127static int be_mcc_queues_create(struct be_adapter *adapter)
1128{
1129 struct be_queue_info *q, *cq;
5fb379ee
SP		 1130
1131 /* Alloc MCC compl queue */
8788fdc2 1132 cq = &adapter->mcc_obj.cq;
5fb379ee 1133 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
efd2e40a 1134 sizeof(struct be_mcc_compl)))
5fb379ee
SP		 1135 goto err;
1136
1137 /* Ask BE to create MCC compl queue; share TX's eq */
8788fdc2 1138 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
5fb379ee
SP		 1139 goto mcc_cq_free;
1140
1141 /* Alloc MCC queue */
8788fdc2 1142 q = &adapter->mcc_obj.q;
5fb379ee
SP		 1143 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1144 goto mcc_cq_destroy;
1145
1146 /* Ask BE to create MCC queue */
8788fdc2 1147 if (be_cmd_mccq_create(adapter, q, cq))
5fb379ee
SP		 1148 goto mcc_q_free;
1149
1150 return 0;
1151
1152mcc_q_free:
1153 be_queue_free(adapter, q);
1154mcc_cq_destroy:
8788fdc2 1155 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
5fb379ee
SP		 1156mcc_cq_free:
1157 be_queue_free(adapter, cq);
1158err:
1159 return -1;
1160}
1161
6b7c5b94
SP		 1162static void be_tx_queues_destroy(struct be_adapter *adapter)
1163{
1164 struct be_queue_info *q;
1165
1166 q = &adapter->tx_obj.q;
a8e9179a 1167 if (q->created)
8788fdc2 1168 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
6b7c5b94
SP		 1169 be_queue_free(adapter, q);
1170
1171 q = &adapter->tx_obj.cq;
1172 if (q->created)
8788fdc2 1173 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1174 be_queue_free(adapter, q);
1175
859b1e4e
SP		 1176 /* Clear any residual events */
1177 be_eq_clean(adapter, &adapter->tx_eq);
1178
6b7c5b94
SP		 1179 q = &adapter->tx_eq.q;
1180 if (q->created)
8788fdc2 1181 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1182 be_queue_free(adapter, q);
1183}
1184
1185static int be_tx_queues_create(struct be_adapter *adapter)
1186{
1187 struct be_queue_info *eq, *q, *cq;
1188
1189 adapter->tx_eq.max_eqd = 0;
1190 adapter->tx_eq.min_eqd = 0;
1191 adapter->tx_eq.cur_eqd = 96;
1192 adapter->tx_eq.enable_aic = false;
1193 /* Alloc Tx Event queue */
1194 eq = &adapter->tx_eq.q;
1195 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1196 return -1;
1197
1198 /* Ask BE to create Tx Event queue */
8788fdc2 1199 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
6b7c5b94
SP		 1200 goto tx_eq_free;
1201 /* Alloc TX eth compl queue */
1202 cq = &adapter->tx_obj.cq;
1203 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1204 sizeof(struct be_eth_tx_compl)))
1205 goto tx_eq_destroy;
1206
1207 /* Ask BE to create Tx eth compl queue */
8788fdc2 1208 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
6b7c5b94
SP		 1209 goto tx_cq_free;
1210
1211 /* Alloc TX eth queue */
1212 q = &adapter->tx_obj.q;
1213 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1214 goto tx_cq_destroy;
1215
1216 /* Ask BE to create Tx eth queue */
8788fdc2 1217 if (be_cmd_txq_create(adapter, q, cq))
6b7c5b94
SP		 1218 goto tx_q_free;
1219 return 0;
1220
1221tx_q_free:
1222 be_queue_free(adapter, q);
1223tx_cq_destroy:
8788fdc2 1224 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1225tx_cq_free:
1226 be_queue_free(adapter, cq);
1227tx_eq_destroy:
8788fdc2 1228 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1229tx_eq_free:
1230 be_queue_free(adapter, eq);
1231 return -1;
1232}
1233
1234static void be_rx_queues_destroy(struct be_adapter *adapter)
1235{
1236 struct be_queue_info *q;
1237
1238 q = &adapter->rx_obj.q;
1239 if (q->created) {
8788fdc2 1240 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
6b7c5b94
SP		 1241 be_rx_q_clean(adapter);
1242 }
1243 be_queue_free(adapter, q);
1244
1245 q = &adapter->rx_obj.cq;
1246 if (q->created)
8788fdc2 1247 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1248 be_queue_free(adapter, q);
1249
859b1e4e
SP		 1250 /* Clear any residual events */
1251 be_eq_clean(adapter, &adapter->rx_eq);
1252
6b7c5b94
SP		 1253 q = &adapter->rx_eq.q;
1254 if (q->created)
8788fdc2 1255 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1256 be_queue_free(adapter, q);
1257}
1258
1259static int be_rx_queues_create(struct be_adapter *adapter)
1260{
1261 struct be_queue_info *eq, *q, *cq;
1262 int rc;
1263
6b7c5b94
SP		 1264 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1265 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1266 adapter->rx_eq.min_eqd = 0;
1267 adapter->rx_eq.cur_eqd = 0;
1268 adapter->rx_eq.enable_aic = true;
1269
1270 /* Alloc Rx Event queue */
1271 eq = &adapter->rx_eq.q;
1272 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1273 sizeof(struct be_eq_entry));
1274 if (rc)
1275 return rc;
1276
1277 /* Ask BE to create Rx Event queue */
8788fdc2 1278 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
6b7c5b94
SP		 1279 if (rc)
1280 goto rx_eq_free;
1281
1282 /* Alloc RX eth compl queue */
1283 cq = &adapter->rx_obj.cq;
1284 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1285 sizeof(struct be_eth_rx_compl));
1286 if (rc)
1287 goto rx_eq_destroy;
1288
1289 /* Ask BE to create Rx eth compl queue */
8788fdc2 1290 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
6b7c5b94
SP		 1291 if (rc)
1292 goto rx_cq_free;
1293
1294 /* Alloc RX eth queue */
1295 q = &adapter->rx_obj.q;
1296 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1297 if (rc)
1298 goto rx_cq_destroy;
1299
1300 /* Ask BE to create Rx eth queue */
8788fdc2 1301 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
6b7c5b94
SP		 1302 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1303 if (rc)
1304 goto rx_q_free;
1305
1306 return 0;
1307rx_q_free:
1308 be_queue_free(adapter, q);
1309rx_cq_destroy:
8788fdc2 1310 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1311rx_cq_free:
1312 be_queue_free(adapter, cq);
1313rx_eq_destroy:
8788fdc2 1314 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1315rx_eq_free:
1316 be_queue_free(adapter, eq);
1317 return rc;
1318}
6b7c5b94 1319
b628bde2
SP		 1320/* There are 8 evt ids per func. Retruns the evt id's bit number */
1321static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1322{
1323 return eq_id - 8 * be_pci_func(adapter);
1324}
1325
6b7c5b94
SP		 1326static irqreturn_t be_intx(int irq, void *dev)
1327{
1328 struct be_adapter *adapter = dev;
8788fdc2 1329 int isr;
6b7c5b94 1330
8788fdc2 1331 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
eec368fb 1332 be_pci_func(adapter) * CEV_ISR_SIZE);
c001c213 1333 if (!isr)
8788fdc2 1334 return IRQ_NONE;
6b7c5b94 1335
8788fdc2
SP		 1336 event_handle(adapter, &adapter->tx_eq);
1337 event_handle(adapter, &adapter->rx_eq);
c001c213 1338
8788fdc2 1339 return IRQ_HANDLED;
6b7c5b94
SP		 1340}
1341
1342static irqreturn_t be_msix_rx(int irq, void *dev)
1343{
1344 struct be_adapter *adapter = dev;
1345
8788fdc2 1346 event_handle(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1347
1348 return IRQ_HANDLED;
1349}
1350
5fb379ee 1351static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
6b7c5b94
SP		 1352{
1353 struct be_adapter *adapter = dev;
1354
8788fdc2 1355 event_handle(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1356
1357 return IRQ_HANDLED;
1358}
1359
5be93b9a 1360static inline bool do_gro(struct be_adapter *adapter,
6b7c5b94
SP		 1361 struct be_eth_rx_compl *rxcp)
1362{
1363 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1364 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1365
1366 if (err)
1367 drvr_stats(adapter)->be_rxcp_err++;
1368
5be93b9a 1369 return (tcp_frame && !err) ? true : false;
6b7c5b94
SP		 1370}
1371
1372int be_poll_rx(struct napi_struct *napi, int budget)
1373{
1374 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1375 struct be_adapter *adapter =
1376 container_of(rx_eq, struct be_adapter, rx_eq);
1377 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1378 struct be_eth_rx_compl *rxcp;
1379 u32 work_done;
1380
1381 for (work_done = 0; work_done < budget; work_done++) {
1382 rxcp = be_rx_compl_get(adapter);
1383 if (!rxcp)
1384 break;
1385
5be93b9a
AK		 1386 if (do_gro(adapter, rxcp))
1387 be_rx_compl_process_gro(adapter, rxcp);
6b7c5b94
SP		 1388 else
1389 be_rx_compl_process(adapter, rxcp);
a7a0ef31
SP		 1390
1391 be_rx_compl_reset(rxcp);
6b7c5b94
SP		 1392 }
1393
6b7c5b94
SP		 1394 /* Refill the queue */
1395 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1396 be_post_rx_frags(adapter);
1397
1398 /* All consumed */
1399 if (work_done < budget) {
1400 napi_complete(napi);
8788fdc2 1401 be_cq_notify(adapter, rx_cq->id, true, work_done);
6b7c5b94
SP		 1402 } else {
1403 /* More to be consumed; continue with interrupts disabled */
8788fdc2 1404 be_cq_notify(adapter, rx_cq->id, false, work_done);
6b7c5b94
SP		 1405 }
1406 return work_done;
1407}
1408
5fb379ee 1409void be_process_tx(struct be_adapter *adapter)
6b7c5b94 1410{
5fb379ee
SP		 1411 struct be_queue_info *txq = &adapter->tx_obj.q;
1412 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94
SP		 1413 struct be_eth_tx_compl *txcp;
1414 u32 num_cmpl = 0;
1415 u16 end_idx;
1416
5fb379ee 1417 while ((txcp = be_tx_compl_get(tx_cq))) {
6b7c5b94
SP		 1418 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1419 wrb_index, txcp);
1420 be_tx_compl_process(adapter, end_idx);
1421 num_cmpl++;
1422 }
1423
5fb379ee 1424 if (num_cmpl) {
8788fdc2 1425 be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
5fb379ee
SP		 1426
1427 /* As Tx wrbs have been freed up, wake up netdev queue if
1428 * it was stopped due to lack of tx wrbs.
1429 */
1430 if (netif_queue_stopped(adapter->netdev) &&
6b7c5b94 1431 atomic_read(&txq->used) < txq->len / 2) {
5fb379ee
SP		 1432 netif_wake_queue(adapter->netdev);
1433 }
1434
1435 drvr_stats(adapter)->be_tx_events++;
1436 drvr_stats(adapter)->be_tx_compl += num_cmpl;
6b7c5b94 1437 }
5fb379ee
SP		 1438}
1439
1440/* As TX and MCC share the same EQ check for both TX and MCC completions.
1441 * For TX/MCC we don't honour budget; consume everything
1442 */
1443static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1444{
1445 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1446 struct be_adapter *adapter =
1447 container_of(tx_eq, struct be_adapter, tx_eq);
6b7c5b94
SP		 1448
1449 napi_complete(napi);
1450
5fb379ee 1451 be_process_tx(adapter);
6b7c5b94 1452
8788fdc2 1453 be_process_mcc(adapter);
6b7c5b94
SP		 1454
1455 return 1;
1456}
1457
ea1dae11
SP		 1458static void be_worker(struct work_struct *work)
1459{
1460 struct be_adapter *adapter =
1461 container_of(work, struct be_adapter, work.work);
ea1dae11 1462
b31c50a7 1463 be_cmd_get_stats(adapter, &adapter->stats.cmd);
ea1dae11
SP		 1464
1465 /* Set EQ delay */
1466 be_rx_eqd_update(adapter);
1467
4097f663
SP		 1468 be_tx_rate_update(adapter);
1469 be_rx_rate_update(adapter);
1470
ea1dae11
SP		 1471 if (adapter->rx_post_starved) {
1472 adapter->rx_post_starved = false;
1473 be_post_rx_frags(adapter);
1474 }
1475
1476 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1477}
1478
6b7c5b94
SP		 1479static void be_msix_enable(struct be_adapter *adapter)
1480{
1481 int i, status;
1482
1483 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1484 adapter->msix_entries[i].entry = i;
1485
1486 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1487 BE_NUM_MSIX_VECTORS);
1488 if (status == 0)
1489 adapter->msix_enabled = true;
1490 return;
1491}
1492
1493static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1494{
b628bde2
SP		 1495 return adapter->msix_entries[
1496 be_evt_bit_get(adapter, eq_id)].vector;
6b7c5b94
SP		 1497}
1498
b628bde2
SP		 1499static int be_request_irq(struct be_adapter *adapter,
1500 struct be_eq_obj *eq_obj,
1501 void *handler, char *desc)
6b7c5b94
SP		 1502{
1503 struct net_device *netdev = adapter->netdev;
b628bde2
SP		 1504 int vec;
1505
1506 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1507 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1508 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1509}
1510
1511static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1512{
1513 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1514 free_irq(vec, adapter);
1515}
6b7c5b94 1516
b628bde2
SP		 1517static int be_msix_register(struct be_adapter *adapter)
1518{
1519 int status;
1520
1521 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
6b7c5b94
SP		 1522 if (status)
1523 goto err;
1524
b628bde2
SP		 1525 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1526 if (status)
1527 goto free_tx_irq;
1528
6b7c5b94 1529 return 0;
b628bde2
SP		 1530
1531free_tx_irq:
1532 be_free_irq(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1533err:
1534 dev_warn(&adapter->pdev->dev,
1535 "MSIX Request IRQ failed - err %d\n", status);
1536 pci_disable_msix(adapter->pdev);
1537 adapter->msix_enabled = false;
1538 return status;
1539}
1540
1541static int be_irq_register(struct be_adapter *adapter)
1542{
1543 struct net_device *netdev = adapter->netdev;
1544 int status;
1545
1546 if (adapter->msix_enabled) {
1547 status = be_msix_register(adapter);
1548 if (status == 0)
1549 goto done;
1550 }
1551
1552 /* INTx */
1553 netdev->irq = adapter->pdev->irq;
1554 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1555 adapter);
1556 if (status) {
1557 dev_err(&adapter->pdev->dev,
1558 "INTx request IRQ failed - err %d\n", status);
1559 return status;
1560 }
1561done:
1562 adapter->isr_registered = true;
1563 return 0;
1564}
1565
1566static void be_irq_unregister(struct be_adapter *adapter)
1567{
1568 struct net_device *netdev = adapter->netdev;
6b7c5b94
SP		 1569
1570 if (!adapter->isr_registered)
1571 return;
1572
1573 /* INTx */
1574 if (!adapter->msix_enabled) {
1575 free_irq(netdev->irq, adapter);
1576 goto done;
1577 }
1578
1579 /* MSIx */
b628bde2
SP		 1580 be_free_irq(adapter, &adapter->tx_eq);
1581 be_free_irq(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1582done:
1583 adapter->isr_registered = false;
1584 return;
1585}
1586
1587static int be_open(struct net_device *netdev)
1588{
1589 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1590 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1591 struct be_eq_obj *tx_eq = &adapter->tx_eq;
a8f447bd
SP		 1592 bool link_up;
1593 int status;
0388f251
SB		 1594 u8 mac_speed;
1595 u16 link_speed;
5fb379ee
SP		 1596
1597 /* First time posting */
1598 be_post_rx_frags(adapter);
1599
1600 napi_enable(&rx_eq->napi);
1601 napi_enable(&tx_eq->napi);
1602
1603 be_irq_register(adapter);
1604
8788fdc2 1605 be_intr_set(adapter, true);
5fb379ee
SP		 1606
1607 /* The evt queues are created in unarmed state; arm them */
8788fdc2
SP		 1608 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
1609 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
5fb379ee
SP		 1610
1611 /* Rx compl queue may be in unarmed state; rearm it */
8788fdc2 1612 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
5fb379ee 1613
0388f251
SB		 1614 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
1615 &link_speed);
a8f447bd 1616 if (status)
4f2aa89c 1617 goto ret_sts;
a8f447bd 1618 be_link_status_update(adapter, link_up);
5fb379ee 1619
4f2aa89c
AK		 1620 status = be_vid_config(adapter);
1621 if (status)
1622 goto ret_sts;
1623
1624 status = be_cmd_set_flow_control(adapter,
1625 adapter->tx_fc, adapter->rx_fc);
1626 if (status)
1627 goto ret_sts;
1628
5fb379ee 1629 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
4f2aa89c
AK		 1630ret_sts:
1631 return status;
5fb379ee
SP		 1632}
1633
1634static int be_setup(struct be_adapter *adapter)
1635{
5fb379ee 1636 struct net_device *netdev = adapter->netdev;
73d540f2 1637 u32 cap_flags, en_flags;
6b7c5b94
SP		 1638 int status;
1639
73d540f2
SP		 1640 cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1641 BE_IF_FLAGS_MCAST_PROMISCUOUS |
1642 BE_IF_FLAGS_PROMISCUOUS |
1643 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1644 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1645 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1646
1647 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1648 netdev->dev_addr, false/* pmac_invalid */,
1649 &adapter->if_handle, &adapter->pmac_id);
6b7c5b94
SP		 1650 if (status != 0)
1651 goto do_none;
1652
6b7c5b94
SP		 1653 status = be_tx_queues_create(adapter);
1654 if (status != 0)
1655 goto if_destroy;
1656
1657 status = be_rx_queues_create(adapter);
1658 if (status != 0)
1659 goto tx_qs_destroy;
1660
5fb379ee
SP		 1661 status = be_mcc_queues_create(adapter);
1662 if (status != 0)
1663 goto rx_qs_destroy;
6b7c5b94 1664
6b7c5b94
SP		 1665 return 0;
1666
5fb379ee
SP		 1667rx_qs_destroy:
1668 be_rx_queues_destroy(adapter);
6b7c5b94
SP		 1669tx_qs_destroy:
1670 be_tx_queues_destroy(adapter);
1671if_destroy:
8788fdc2 1672 be_cmd_if_destroy(adapter, adapter->if_handle);
6b7c5b94
SP		 1673do_none:
1674 return status;
1675}
1676
5fb379ee
SP		 1677static int be_clear(struct be_adapter *adapter)
1678{
1a8887d8 1679 be_mcc_queues_destroy(adapter);
5fb379ee
SP		 1680 be_rx_queues_destroy(adapter);
1681 be_tx_queues_destroy(adapter);
1682
8788fdc2 1683 be_cmd_if_destroy(adapter, adapter->if_handle);
5fb379ee 1684
5fb379ee
SP		 1685 return 0;
1686}
1687
6b7c5b94
SP		 1688static int be_close(struct net_device *netdev)
1689{
1690 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1691 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1692 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1693 int vec;
1694
b305be78 1695 cancel_delayed_work_sync(&adapter->work);
6b7c5b94
SP		 1696
1697 netif_stop_queue(netdev);
1698 netif_carrier_off(netdev);
a8f447bd 1699 adapter->link_up = false;
6b7c5b94 1700
8788fdc2 1701 be_intr_set(adapter, false);
6b7c5b94
SP		 1702
1703 if (adapter->msix_enabled) {
1704 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1705 synchronize_irq(vec);
1706 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1707 synchronize_irq(vec);
1708 } else {
1709 synchronize_irq(netdev->irq);
1710 }
1711 be_irq_unregister(adapter);
1712
1713 napi_disable(&rx_eq->napi);
1714 napi_disable(&tx_eq->napi);
1715
a8e9179a
SP		 1716 /* Wait for all pending tx completions to arrive so that
1717 * all tx skbs are freed.
1718 */
1719 be_tx_compl_clean(adapter);
1720
6b7c5b94
SP		 1721 return 0;
1722}
1723
84517482
AK		 1724#define FW_FILE_HDR_SIGN "ServerEngines Corp. "
1725char flash_cookie[2][16] = {"*** SE FLAS",
1726 "H DIRECTORY *** "};
fa9a6fed
SB		 1727
1728static bool be_flash_redboot(struct be_adapter *adapter,
1729 const u8 *p)
1730{
1731 u32 crc_offset;
1732 u8 flashed_crc[4];
1733 int status;
1734 crc_offset = FLASH_REDBOOT_START + FLASH_REDBOOT_IMAGE_MAX_SIZE - 4
1735 + sizeof(struct flash_file_hdr) - 32*1024;
1736 p += crc_offset;
1737 status = be_cmd_get_flash_crc(adapter, flashed_crc);
1738 if (status) {
1739 dev_err(&adapter->pdev->dev,
1740 "could not get crc from flash, not flashing redboot\n");
1741 return false;
1742 }
1743
1744 /*update redboot only if crc does not match*/
1745 if (!memcmp(flashed_crc, p, 4))
1746 return false;
1747 else
1748 return true;
1749
1750}
1751
84517482
AK		 1752static int be_flash_image(struct be_adapter *adapter,
1753 const struct firmware *fw,
1754 struct be_dma_mem *flash_cmd, u32 flash_type)
1755{
1756 int status;
1757 u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
1758 int num_bytes;
1759 const u8 *p = fw->data;
1760 struct be_cmd_write_flashrom *req = flash_cmd->va;
1761
1762 switch (flash_type) {
1763 case FLASHROM_TYPE_ISCSI_ACTIVE:
1764 image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
1765 image_size = FLASH_IMAGE_MAX_SIZE;
1766 break;
1767 case FLASHROM_TYPE_ISCSI_BACKUP:
1768 image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
1769 image_size = FLASH_IMAGE_MAX_SIZE;
1770 break;
1771 case FLASHROM_TYPE_FCOE_FW_ACTIVE:
1772 image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
1773 image_size = FLASH_IMAGE_MAX_SIZE;
1774 break;
1775 case FLASHROM_TYPE_FCOE_FW_BACKUP:
1776 image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
1777 image_size = FLASH_IMAGE_MAX_SIZE;
1778 break;
1779 case FLASHROM_TYPE_BIOS:
1780 image_offset = FLASH_iSCSI_BIOS_START;
1781 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1782 break;
1783 case FLASHROM_TYPE_FCOE_BIOS:
1784 image_offset = FLASH_FCoE_BIOS_START;
1785 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1786 break;
1787 case FLASHROM_TYPE_PXE_BIOS:
1788 image_offset = FLASH_PXE_BIOS_START;
1789 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1790 break;
fa9a6fed
SB		 1791 case FLASHROM_TYPE_REDBOOT:
1792 if (!be_flash_redboot(adapter, fw->data))
1793 return 0;
1794 image_offset = FLASH_REDBOOT_ISM_START;
1795 image_size = FLASH_REDBOOT_IMAGE_MAX_SIZE;
1796 break;
84517482
AK		 1797 default:
1798 return 0;
1799 }
1800
1801 p += sizeof(struct flash_file_hdr) + image_offset;
1802 if (p + image_size > fw->data + fw->size)
1803 return -1;
1804
1805 total_bytes = image_size;
1806
1807 while (total_bytes) {
1808 if (total_bytes > 32*1024)
1809 num_bytes = 32*1024;
1810 else
1811 num_bytes = total_bytes;
1812 total_bytes -= num_bytes;
1813
1814 if (!total_bytes)
1815 flash_op = FLASHROM_OPER_FLASH;
1816 else
1817 flash_op = FLASHROM_OPER_SAVE;
1818 memcpy(req->params.data_buf, p, num_bytes);
1819 p += num_bytes;
1820 status = be_cmd_write_flashrom(adapter, flash_cmd,
1821 flash_type, flash_op, num_bytes);
1822 if (status) {
1823 dev_err(&adapter->pdev->dev,
1824 "cmd to write to flash rom failed. type/op %d/%d\n",
1825 flash_type, flash_op);
1826 return -1;
1827 }
1828 yield();
1829 }
1830
1831 return 0;
1832}
1833
1834int be_load_fw(struct be_adapter *adapter, u8 *func)
1835{
1836 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
1837 const struct firmware *fw;
1838 struct flash_file_hdr *fhdr;
1839 struct flash_section_info *fsec = NULL;
1840 struct be_dma_mem flash_cmd;
1841 int status;
1842 const u8 *p;
1843 bool entry_found = false;
1844 int flash_type;
1845 char fw_ver[FW_VER_LEN];
1846 char fw_cfg;
1847
1848 status = be_cmd_get_fw_ver(adapter, fw_ver);
1849 if (status)
1850 return status;
1851
1852 fw_cfg = *(fw_ver + 2);
1853 if (fw_cfg == '0')
1854 fw_cfg = '1';
1855 strcpy(fw_file, func);
1856
1857 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
1858 if (status)
1859 goto fw_exit;
1860
1861 p = fw->data;
1862 fhdr = (struct flash_file_hdr *) p;
1863 if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
1864 dev_err(&adapter->pdev->dev,
1865 "Firmware(%s) load error (signature did not match)\n",
1866 fw_file);
1867 status = -1;
1868 goto fw_exit;
1869 }
1870
1871 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
1872
1873 p += sizeof(struct flash_file_hdr);
1874 while (p < (fw->data + fw->size)) {
1875 fsec = (struct flash_section_info *)p;
1876 if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
1877 entry_found = true;
1878 break;
1879 }
1880 p += 32;
1881 }
1882
1883 if (!entry_found) {
1884 status = -1;
1885 dev_err(&adapter->pdev->dev,
1886 "Flash cookie not found in firmware image\n");
1887 goto fw_exit;
1888 }
1889
1890 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
1891 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
1892 &flash_cmd.dma);
1893 if (!flash_cmd.va) {
1894 status = -ENOMEM;
1895 dev_err(&adapter->pdev->dev,
1896 "Memory allocation failure while flashing\n");
1897 goto fw_exit;
1898 }
1899
1900 for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
1901 flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
1902 status = be_flash_image(adapter, fw, &flash_cmd,
1903 flash_type);
1904 if (status)
1905 break;
1906 }
1907
1908 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
1909 flash_cmd.dma);
1910 if (status) {
1911 dev_err(&adapter->pdev->dev, "Firmware load error\n");
1912 goto fw_exit;
1913 }
1914
1915 dev_info(&adapter->pdev->dev, "Firmware flashed succesfully\n");
1916
1917fw_exit:
1918 release_firmware(fw);
1919 return status;
1920}
1921
6b7c5b94
SP		 1922static struct net_device_ops be_netdev_ops = {
1923 .ndo_open = be_open,
1924 .ndo_stop = be_close,
1925 .ndo_start_xmit = be_xmit,
1926 .ndo_get_stats = be_get_stats,
1927 .ndo_set_rx_mode = be_set_multicast_list,
1928 .ndo_set_mac_address = be_mac_addr_set,
1929 .ndo_change_mtu = be_change_mtu,
1930 .ndo_validate_addr = eth_validate_addr,
1931 .ndo_vlan_rx_register = be_vlan_register,
1932 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
1933 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
1934};
1935
1936static void be_netdev_init(struct net_device *netdev)
1937{
1938 struct be_adapter *adapter = netdev_priv(netdev);
1939
1940 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
583e3f34
AK		 1941 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
1942 NETIF_F_GRO;
6b7c5b94
SP		 1943
1944 netdev->flags |= IFF_MULTICAST;
1945
728a9972
AK		 1946 adapter->rx_csum = true;
1947
9e90c961
AK		 1948 /* Default settings for Rx and Tx flow control */
1949 adapter->rx_fc = true;
1950 adapter->tx_fc = true;
1951
c190e3c8
AK		 1952 netif_set_gso_max_size(netdev, 65535);
1953
6b7c5b94
SP		 1954 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
1955
1956 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
1957
6b7c5b94
SP		 1958 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
1959 BE_NAPI_WEIGHT);
5fb379ee 1960 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
6b7c5b94
SP		 1961 BE_NAPI_WEIGHT);
1962
1963 netif_carrier_off(netdev);
1964 netif_stop_queue(netdev);
1965}
1966
1967static void be_unmap_pci_bars(struct be_adapter *adapter)
1968{
8788fdc2
SP		 1969 if (adapter->csr)
1970 iounmap(adapter->csr);
1971 if (adapter->db)
1972 iounmap(adapter->db);
1973 if (adapter->pcicfg)
1974 iounmap(adapter->pcicfg);
6b7c5b94
SP		 1975}
1976
1977static int be_map_pci_bars(struct be_adapter *adapter)
1978{
1979 u8 __iomem *addr;
1980
1981 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
1982 pci_resource_len(adapter->pdev, 2));
1983 if (addr == NULL)
1984 return -ENOMEM;
8788fdc2 1985 adapter->csr = addr;
6b7c5b94
SP		 1986
1987 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
1988 128 * 1024);
1989 if (addr == NULL)
1990 goto pci_map_err;
8788fdc2 1991 adapter->db = addr;
6b7c5b94
SP		 1992
1993 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
1994 pci_resource_len(adapter->pdev, 1));
1995 if (addr == NULL)
1996 goto pci_map_err;
8788fdc2 1997 adapter->pcicfg = addr;
6b7c5b94
SP		 1998
1999 return 0;
2000pci_map_err:
2001 be_unmap_pci_bars(adapter);
2002 return -ENOMEM;
2003}
2004
2005
2006static void be_ctrl_cleanup(struct be_adapter *adapter)
2007{
8788fdc2 2008 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
6b7c5b94
SP		 2009
2010 be_unmap_pci_bars(adapter);
2011
2012 if (mem->va)
2013 pci_free_consistent(adapter->pdev, mem->size,
2014 mem->va, mem->dma);
e7b909a6
SP		 2015
2016 mem = &adapter->mc_cmd_mem;
2017 if (mem->va)
2018 pci_free_consistent(adapter->pdev, mem->size,
2019 mem->va, mem->dma);
6b7c5b94
SP		 2020}
2021
6b7c5b94
SP		 2022static int be_ctrl_init(struct be_adapter *adapter)
2023{
8788fdc2
SP		 2024 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2025 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
e7b909a6 2026 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
6b7c5b94 2027 int status;
6b7c5b94
SP		 2028
2029 status = be_map_pci_bars(adapter);
2030 if (status)
e7b909a6 2031 goto done;
6b7c5b94
SP		 2032
2033 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2034 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2035 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2036 if (!mbox_mem_alloc->va) {
e7b909a6
SP		 2037 status = -ENOMEM;
2038 goto unmap_pci_bars;
6b7c5b94 2039 }
e7b909a6 2040
6b7c5b94
SP		 2041 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2042 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2043 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2044 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
e7b909a6
SP		 2045
2046 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2047 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2048 &mc_cmd_mem->dma);
2049 if (mc_cmd_mem->va == NULL) {
2050 status = -ENOMEM;
2051 goto free_mbox;
2052 }
2053 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2054
8788fdc2
SP		 2055 spin_lock_init(&adapter->mbox_lock);
2056 spin_lock_init(&adapter->mcc_lock);
2057 spin_lock_init(&adapter->mcc_cq_lock);
a8f447bd 2058
6b7c5b94 2059 return 0;
e7b909a6
SP		 2060
2061free_mbox:
2062 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2063 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2064
2065unmap_pci_bars:
2066 be_unmap_pci_bars(adapter);
2067
2068done:
2069 return status;
6b7c5b94
SP		 2070}
2071
2072static void be_stats_cleanup(struct be_adapter *adapter)
2073{
2074 struct be_stats_obj *stats = &adapter->stats;
2075 struct be_dma_mem *cmd = &stats->cmd;
2076
2077 if (cmd->va)
2078 pci_free_consistent(adapter->pdev, cmd->size,
2079 cmd->va, cmd->dma);
2080}
2081
2082static int be_stats_init(struct be_adapter *adapter)
2083{
2084 struct be_stats_obj *stats = &adapter->stats;
2085 struct be_dma_mem *cmd = &stats->cmd;
2086
2087 cmd->size = sizeof(struct be_cmd_req_get_stats);
2088 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2089 if (cmd->va == NULL)
2090 return -1;
2091 return 0;
2092}
2093
2094static void __devexit be_remove(struct pci_dev *pdev)
2095{
2096 struct be_adapter *adapter = pci_get_drvdata(pdev);
2097 if (!adapter)
2098 return;
2099
2100 unregister_netdev(adapter->netdev);
2101
5fb379ee
SP		 2102 be_clear(adapter);
2103
6b7c5b94
SP		 2104 be_stats_cleanup(adapter);
2105
2106 be_ctrl_cleanup(adapter);
2107
2108 if (adapter->msix_enabled) {
2109 pci_disable_msix(adapter->pdev);
2110 adapter->msix_enabled = false;
2111 }
2112
2113 pci_set_drvdata(pdev, NULL);
2114 pci_release_regions(pdev);
2115 pci_disable_device(pdev);
2116
2117 free_netdev(adapter->netdev);
2118}
2119
2120static int be_hw_up(struct be_adapter *adapter)
2121{
6b7c5b94
SP		 2122 int status;
2123
8788fdc2 2124 status = be_cmd_POST(adapter);
6b7c5b94
SP		 2125 if (status)
2126 return status;
2127
43a04fdc
SP		 2128 status = be_cmd_reset_function(adapter);
2129 if (status)
2130 return status;
2131
8788fdc2 2132 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
6b7c5b94
SP		 2133 if (status)
2134 return status;
2135
dcb9b564
AK		 2136 status = be_cmd_query_fw_cfg(adapter,
2137 &adapter->port_num, &adapter->cap);
6b7c5b94
SP		 2138 return status;
2139}
2140
2141static int __devinit be_probe(struct pci_dev *pdev,
2142 const struct pci_device_id *pdev_id)
2143{
2144 int status = 0;
2145 struct be_adapter *adapter;
2146 struct net_device *netdev;
6b7c5b94
SP		 2147 u8 mac[ETH_ALEN];
2148
2149 status = pci_enable_device(pdev);
2150 if (status)
2151 goto do_none;
2152
2153 status = pci_request_regions(pdev, DRV_NAME);
2154 if (status)
2155 goto disable_dev;
2156 pci_set_master(pdev);
2157
2158 netdev = alloc_etherdev(sizeof(struct be_adapter));
2159 if (netdev == NULL) {
2160 status = -ENOMEM;
2161 goto rel_reg;
2162 }
2163 adapter = netdev_priv(netdev);
2164 adapter->pdev = pdev;
2165 pci_set_drvdata(pdev, adapter);
2166 adapter->netdev = netdev;
2167
2168 be_msix_enable(adapter);
2169
e930438c 2170 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
6b7c5b94
SP		 2171 if (!status) {
2172 netdev->features |= NETIF_F_HIGHDMA;
2173 } else {
e930438c 2174 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6b7c5b94
SP		 2175 if (status) {
2176 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2177 goto free_netdev;
2178 }
2179 }
2180
6b7c5b94
SP		 2181 status = be_ctrl_init(adapter);
2182 if (status)
2183 goto free_netdev;
2184
2185 status = be_stats_init(adapter);
2186 if (status)
2187 goto ctrl_clean;
2188
2189 status = be_hw_up(adapter);
2190 if (status)
2191 goto stats_clean;
2192
8788fdc2 2193 status = be_cmd_mac_addr_query(adapter, mac, MAC_ADDRESS_TYPE_NETWORK,
6b7c5b94
SP		 2194 true /* permanent */, 0);
2195 if (status)
2196 goto stats_clean;
2197 memcpy(netdev->dev_addr, mac, ETH_ALEN);
2198
2199 INIT_DELAYED_WORK(&adapter->work, be_worker);
2200 be_netdev_init(netdev);
2201 SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
2202
5fb379ee
SP		 2203 status = be_setup(adapter);
2204 if (status)
2205 goto stats_clean;
6b7c5b94
SP		 2206 status = register_netdev(netdev);
2207 if (status != 0)
5fb379ee 2208 goto unsetup;
6b7c5b94 2209
c4ca2374 2210 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
6b7c5b94
SP		 2211 return 0;
2212
5fb379ee
SP		 2213unsetup:
2214 be_clear(adapter);
6b7c5b94
SP		 2215stats_clean:
2216 be_stats_cleanup(adapter);
2217ctrl_clean:
2218 be_ctrl_cleanup(adapter);
2219free_netdev:
2220 free_netdev(adapter->netdev);
2221rel_reg:
2222 pci_release_regions(pdev);
2223disable_dev:
2224 pci_disable_device(pdev);
2225do_none:
c4ca2374 2226 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
6b7c5b94
SP		 2227 return status;
2228}
2229
2230static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2231{
2232 struct be_adapter *adapter = pci_get_drvdata(pdev);
2233 struct net_device *netdev = adapter->netdev;
2234
2235 netif_device_detach(netdev);
2236 if (netif_running(netdev)) {
2237 rtnl_lock();
2238 be_close(netdev);
2239 rtnl_unlock();
2240 }
9e90c961 2241 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
9b0365f1 2242 be_clear(adapter);
6b7c5b94
SP		 2243
2244 pci_save_state(pdev);
2245 pci_disable_device(pdev);
2246 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2247 return 0;
2248}
2249
2250static int be_resume(struct pci_dev *pdev)
2251{
2252 int status = 0;
2253 struct be_adapter *adapter = pci_get_drvdata(pdev);
2254 struct net_device *netdev = adapter->netdev;
2255
2256 netif_device_detach(netdev);
2257
2258 status = pci_enable_device(pdev);
2259 if (status)
2260 return status;
2261
2262 pci_set_power_state(pdev, 0);
2263 pci_restore_state(pdev);
2264
9b0365f1 2265 be_setup(adapter);
6b7c5b94
SP		 2266 if (netif_running(netdev)) {
2267 rtnl_lock();
2268 be_open(netdev);
2269 rtnl_unlock();
2270 }
2271 netif_device_attach(netdev);
2272 return 0;
2273}
2274
2275static struct pci_driver be_driver = {
2276 .name = DRV_NAME,
2277 .id_table = be_dev_ids,
2278 .probe = be_probe,
2279 .remove = be_remove,
2280 .suspend = be_suspend,
2281 .resume = be_resume
2282};
2283
2284static int __init be_init_module(void)
2285{
2286 if (rx_frag_size != 8192 && rx_frag_size != 4096
2287 && rx_frag_size != 2048) {
2288 printk(KERN_WARNING DRV_NAME
2289 " : Module param rx_frag_size must be 2048/4096/8192."
2290 " Using 2048\n");
2291 rx_frag_size = 2048;
2292 }
6b7c5b94
SP		 2293
2294 return pci_register_driver(&be_driver);
2295}
2296module_init(be_init_module);
2297
2298static void __exit be_exit_module(void)
2299{
2300 pci_unregister_driver(&be_driver);
2301}
2302module_exit(be_exit_module);
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