]> bbs.cooldavid.org Git - net-next-2.6.git/commitdiff
Merge branch 'next-s5p' into for-next
authorKukjin Kim <kgene.kim@samsung.com>
Fri, 6 Aug 2010 12:34:55 +0000 (21:34 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Fri, 6 Aug 2010 12:34:55 +0000 (21:34 +0900)
Conflicts:
arch/arm/mach-s5pv210/mach-aquila.c
arch/arm/mach-s5pv210/mach-goni.c

1  2 
arch/arm/mach-s5p6440/mach-smdk6440.c
arch/arm/mach-s5p6442/mach-smdk6442.c
arch/arm/mach-s5pc100/include/mach/irqs.h
arch/arm/mach-s5pc100/mach-smdkc100.c
arch/arm/mach-s5pv210/include/mach/irqs.h
arch/arm/mach-s5pv210/mach-aquila.c
arch/arm/mach-s5pv210/mach-goni.c
arch/arm/mach-s5pv210/mach-smdkc110.c
arch/arm/mach-s5pv210/mach-smdkv210.c
arch/arm/plat-s5p/cpu.c

Simple merge
Simple merge
index 83a5d648a98058a2853368839b3b8a18939d4a15,c708db35960d03c639e063a104137f8085c32c49..a63c8a46571d09815328835a0056fe498566ebfc
  #include <plat/s5pc100.h>
  #include <plat/fb.h>
  #include <plat/iic.h>
 +#include <plat/ata.h>
 +#include <plat/adc.h>
 +#include <plat/keypad.h>
 +#include <plat/ts.h>
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
- #define S5PC100_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
+ #define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |        \
                                 S3C2410_UCON_TXIRQMODE |       \
                                 S3C2410_UCON_RXIRQMODE |       \
index 0c894010e278be5dfeb3496cf7280b6e9caf8dd8,9d30213463ef6b61c245836bc728760ddc9c3cd1..a6b4ed364840c94c63d74924e2267f05115f593d
  #include <plat/devs.h>
  #include <plat/cpu.h>
  #include <plat/fb.h>
 +#include <plat/sdhci.h>
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
- #define S5PV210_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
+ #define AQUILA_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |        \
                                 S3C2410_UCON_TXIRQMODE |       \
                                 S3C2410_UCON_RXIRQMODE |       \
                                 S3C2410_UCON_RXFIFO_TOI |      \
                                 S3C2443_UCON_RXERR_IRQEN)
  
- #define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
+ #define AQUILA_ULCON_DEFAULT  S3C2410_LCON_CS8
  
- #define S5PV210_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
 -#define AQUILA_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
 -                               S5PV210_UFCON_TXTRIG4 |        \
 -                               S5PV210_UFCON_RXTRIG4)
++#define AQUILA_UFCON_DEFAULT  S3C2410_UFCON_FIFOMODE
  
 -static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
 +static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = {
        [0] = {
                .hwport         = 0,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
+               .ucon           = AQUILA_UCON_DEFAULT,
+               .ulcon          = AQUILA_ULCON_DEFAULT,
 -              .ufcon          = AQUILA_UFCON_DEFAULT,
 +              /*
 +               * Actually UART0 can support 256 bytes fifo, but aquila board
 +               * supports 128 bytes fifo because of initial chip bug
 +               */
-               .ufcon          = S5PV210_UFCON_DEFAULT |
++              .ufcon          = AQUILA_UFCON_DEFAULT |
 +                      S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128,
        },
        [1] = {
                .hwport         = 1,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT |
+               .ucon           = AQUILA_UCON_DEFAULT,
+               .ulcon          = AQUILA_ULCON_DEFAULT,
 -              .ufcon          = AQUILA_UFCON_DEFAULT,
++              .ufcon          = AQUILA_UFCON_DEFAULT |
 +                      S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
        },
        [2] = {
                .hwport         = 2,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT |
+               .ucon           = AQUILA_UCON_DEFAULT,
+               .ulcon          = AQUILA_ULCON_DEFAULT,
 -              .ufcon          = AQUILA_UFCON_DEFAULT,
++              .ufcon          = AQUILA_UFCON_DEFAULT |
 +                      S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
        },
        [3] = {
                .hwport         = 3,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT |
+               .ucon           = AQUILA_UCON_DEFAULT,
+               .ulcon          = AQUILA_ULCON_DEFAULT,
 -              .ufcon          = AQUILA_UFCON_DEFAULT,
++              .ufcon          = AQUILA_UFCON_DEFAULT |
 +                      S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
        },
  };
  
index a094b44a43e898d9814ffff8d6a209326345a4e3,1521ea11e8c70c09ee2d5f07a87eef1b2697b16a..0be739e5bfe6339ff65c64ee95494cba3245fa19
  #include <plat/s5pv210.h>
  #include <plat/devs.h>
  #include <plat/cpu.h>
 +#include <plat/fb.h>
 +#include <plat/sdhci.h>
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
- #define S5PV210_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
+ #define GONI_UCON_DEFAULT     (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |        \
                                 S3C2410_UCON_TXIRQMODE |       \
                                 S3C2410_UCON_RXIRQMODE |       \
                                 S3C2410_UCON_RXFIFO_TOI |      \
                                 S3C2443_UCON_RXERR_IRQEN)
  
- #define S5PV210_ULCON_DEFAULT S3C2410_LCON_CS8
+ #define GONI_ULCON_DEFAULT    S3C2410_LCON_CS8
  
- #define S5PV210_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE
 -#define GONI_UFCON_DEFAULT    (S3C2410_UFCON_FIFOMODE |       \
 -                               S5PV210_UFCON_TXTRIG4 |        \
 -                               S5PV210_UFCON_RXTRIG4)
++#define GONI_UFCON_DEFAULT    S3C2410_UFCON_FIFOMODE
  
  static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = {
        [0] = {
                .hwport         = 0,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT |
+               .ucon           = GONI_UCON_DEFAULT,
+               .ulcon          = GONI_ULCON_DEFAULT,
 -              .ufcon          = GONI_UFCON_DEFAULT,
++              .ufcon          = GONI_UFCON_DEFAULT |
 +                      S5PV210_UFCON_TXTRIG256 | S5PV210_UFCON_RXTRIG256,
        },
        [1] = {
                .hwport         = 1,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT |
+               .ucon           = GONI_UCON_DEFAULT,
+               .ulcon          = GONI_ULCON_DEFAULT,
 -              .ufcon          = GONI_UFCON_DEFAULT,
++              .ufcon          = GONI_UFCON_DEFAULT |
 +                      S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64,
        },
        [2] = {
                .hwport         = 2,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT |
+               .ucon           = GONI_UCON_DEFAULT,
+               .ulcon          = GONI_ULCON_DEFAULT,
 -              .ufcon          = GONI_UFCON_DEFAULT,
++              .ufcon          = GONI_UFCON_DEFAULT |
 +                      S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
        },
        [3] = {
                .hwport         = 3,
                .flags          = 0,
-               .ucon           = S5PV210_UCON_DEFAULT,
-               .ulcon          = S5PV210_ULCON_DEFAULT,
-               .ufcon          = S5PV210_UFCON_DEFAULT |
+               .ucon           = GONI_UCON_DEFAULT,
+               .ulcon          = GONI_ULCON_DEFAULT,
 -              .ufcon          = GONI_UFCON_DEFAULT,
++              .ufcon          = GONI_UFCON_DEFAULT |
 +                      S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16,
        },
  };
  
index 9f4f0bdd2cc32a6f90699a614b1e9d11cf5693d6,7878f695f2ced1f02993809e758bebb855c691e2..8211bb87c54bbd5a03127689a5ffc9a76f06b82d
  #include <plat/s5pv210.h>
  #include <plat/devs.h>
  #include <plat/cpu.h>
 +#include <plat/ata.h>
 +#include <plat/iic.h>
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
- #define S5PV210_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
+ #define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |        \
                                 S3C2410_UCON_TXIRQMODE |       \
                                 S3C2410_UCON_RXIRQMODE |       \
index 1e4ed147dbc7f01158646383904ac568c154b1d2,d1df1882ab189d51c630f3076b795a802a4814fa..fbbc0a3c3738aaf2f99bab6556a139b708ee4985
  #include <plat/cpu.h>
  #include <plat/adc.h>
  #include <plat/ts.h>
 +#include <plat/ata.h>
 +#include <plat/iic.h>
 +#include <plat/keypad.h>
  
  /* Following are default values for UCON, ULCON and UFCON UART registers */
- #define S5PV210_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
+ #define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL |        \
                                 S3C2410_UCON_RXILEVEL |        \
                                 S3C2410_UCON_TXIRQMODE |       \
                                 S3C2410_UCON_RXIRQMODE |       \
Simple merge