DMAENGINE: correct PL080 register header file

This PL008 among all other variables named PL080 doesn't seem
right. Fix it. Also add some missing defined that I use in the
new PL08x driver.

Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>

diff --git a/arch/arm/include/asm/hardware/pl080.h b/arch/arm/include/asm/hardware/pl080.h
index 6a6c66be7f656b89b8bda2e3dd1fc820eb87b603..f35b86e68dd59d92bcc9d5375b0a1a1b11d58080 100644 (file)
--- a/arch/arm/include/asm/hardware/pl080.h
+++ b/arch/arm/include/asm/hardware/pl080.h
@@ -43,7 +43,7 @@
 
 /* Per channel configuration registers */
 
-#define PL008_Cx_STRIDE                                (0x20)
+#define PL080_Cx_STRIDE                                (0x20)
 #define PL080_Cx_BASE(x)                       ((0x100 + (x * 0x20)))
 #define PL080_Cx_SRC_ADDR(x)                   ((0x100 + (x * 0x20)))
 #define PL080_Cx_DST_ADDR(x)                   ((0x104 + (x * 0x20)))
@@ -68,6 +68,8 @@
 #define PL080_CONTROL_TC_IRQ_EN                        (1 << 31)
 #define PL080_CONTROL_PROT_MASK                        (0x7 << 28)
 #define PL080_CONTROL_PROT_SHIFT               (28)
+#define PL080_CONTROL_PROT_CACHE               (1 << 30)
+#define PL080_CONTROL_PROT_BUFF                        (1 << 29)
 #define PL080_CONTROL_PROT_SYS                 (1 << 28)
 #define PL080_CONTROL_DST_INCR                 (1 << 27)
 #define PL080_CONTROL_SRC_INCR                 (1 << 26)

diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c
index 5567e037b0d15a9d890c31c7a05a57deb9baf7c7..e7d03ab41d80d58b412aa383670e9daa27d10386 100644 (file)
--- a/arch/arm/mach-s3c64xx/dma.c
+++ b/arch/arm/mach-s3c64xx/dma.c
@@ -697,7 +697,7 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase,
                chptr->number = chno;
                chptr->dmac = dmac;
                chptr->regs = regptr;
-               regptr += PL008_Cx_STRIDE;
+               regptr += PL080_Cx_STRIDE;
        }
 
        /* for the moment, permanently enable the controller */