]> bbs.cooldavid.org Git - net-next-2.6.git/commitdiff
davinci: cpuidle: move mapping of DDR2 controller registers out of driver
authorSekhar Nori <nsekhar@ti.com>
Mon, 16 Nov 2009 11:51:37 +0000 (17:21 +0530)
committerKevin Hilman <khilman@deeprootsystems.com>
Thu, 4 Feb 2010 21:29:38 +0000 (13:29 -0800)
When suspend is supported, both cpuidle and suspend code
need to work on DDR2 registers. Instead of mapping the
DDR2 registers twice, do it once outside of cpuidle
driver and let cpuidle driver get the virtual base address
of DDR2 registers.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
arch/arm/mach-davinci/cpuidle.c
arch/arm/mach-davinci/devices-da8xx.c
arch/arm/mach-davinci/include/mach/cpuidle.h
arch/arm/mach-davinci/include/mach/da8xx.h

index beda3b5796885b16aa9f082101a43297e65240bd..bd59f31b8a95b2a04e0f0d8de50c9122d1831e38 100644 (file)
@@ -106,8 +106,6 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev)
        int ret;
        struct cpuidle_device *device;
        struct davinci_cpuidle_config *pdata = pdev->dev.platform_data;
-       struct resource *ddr2_regs;
-       resource_size_t len;
 
        device = &per_cpu(davinci_cpuidle_device, smp_processor_id());
 
@@ -116,28 +114,12 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev)
                return -ENOENT;
        }
 
-       ddr2_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-       if (!ddr2_regs) {
-               dev_err(&pdev->dev, "cannot get DDR2 controller register base");
-               return -ENODEV;
-       }
-
-       len = resource_size(ddr2_regs);
-
-       ddr2_regs = request_mem_region(ddr2_regs->start, len, ddr2_regs->name);
-       if (!ddr2_regs)
-               return -EBUSY;
-
-       ddr2_reg_base = ioremap(ddr2_regs->start, len);
-       if (!ddr2_reg_base) {
-               ret = -ENOMEM;
-               goto ioremap_fail;
-       }
+       ddr2_reg_base = pdata->ddr2_ctlr_base;
 
        ret = cpuidle_register_driver(&davinci_idle_driver);
        if (ret) {
                dev_err(&pdev->dev, "failed to register driver\n");
-               goto driver_register_fail;
+               return ret;
        }
 
        /* Wait for interrupt state */
@@ -164,18 +146,11 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev)
        ret = cpuidle_register_device(device);
        if (ret) {
                dev_err(&pdev->dev, "failed to register device\n");
-               goto device_register_fail;
+               cpuidle_unregister_driver(&davinci_idle_driver);
+               return ret;
        }
 
        return 0;
-
-device_register_fail:
-       cpuidle_unregister_driver(&davinci_idle_driver);
-driver_register_fail:
-       iounmap(ddr2_reg_base);
-ioremap_fail:
-       release_mem_region(ddr2_regs->start, len);
-       return ret;
 }
 
 static struct platform_driver davinci_cpuidle_driver = {
index 745534eb63c72be9b69ff62e5ac045e3f8f99c4c..0c759ad0aeee4753751c5c621805f5ef511e89e7 100644 (file)
@@ -496,6 +496,19 @@ int da8xx_register_rtc(void)
        return ret;
 }
 
+static void __iomem *da8xx_ddr2_ctlr_base;
+void __iomem * __init da8xx_get_mem_ctlr(void)
+{
+       if (da8xx_ddr2_ctlr_base)
+               return da8xx_ddr2_ctlr_base;
+
+       da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K);
+       if (!da8xx_ddr2_ctlr_base)
+               pr_warning("%s: Unable to map DDR2 controller", __func__);
+
+       return da8xx_ddr2_ctlr_base;
+}
+
 static struct resource da8xx_cpuidle_resources[] = {
        {
                .start          = DA8XX_DDR2_CTL_BASE,
@@ -521,6 +534,7 @@ static struct platform_device da8xx_cpuidle_device = {
 
 int __init da8xx_register_cpuidle(void)
 {
+       da8xx_cpuidle_pdata.ddr2_ctlr_base = da8xx_get_mem_ctlr();
+
        return platform_device_register(&da8xx_cpuidle_device);
 }
-
index cbfc6a9c81b42d1d7bc2f3a1e53a7f6a9319fed9..74f088b0edfb0c141794833c34e9622d4357358a 100644 (file)
@@ -12,6 +12,7 @@
 
 struct davinci_cpuidle_config {
        u32 ddr2_pdown;
+       void __iomem *ddr2_ctlr_base;
 };
 
 #endif
index bddc4d4a806e71f5f82aac7ced674f2d5ca6b740..cab4a25ebe4feb3514e3f1365f2f9dbed3d1bc62 100644 (file)
@@ -94,6 +94,7 @@ void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
 int da8xx_register_rtc(void);
 int da850_register_cpufreq(void);
 int da8xx_register_cpuidle(void);
+void __iomem * __init da8xx_get_mem_ctlr(void);
 
 extern struct platform_device da8xx_serial_device;
 extern struct emac_platform_data da8xx_emac_pdata;