]> bbs.cooldavid.org Git - net-next-2.6.git/commitdiff
x86/amd-iommu: Move reset_iommu_command_buffer out of locked code
authorJoerg Roedel <joerg.roedel@amd.com>
Thu, 26 Nov 2009 14:45:41 +0000 (15:45 +0100)
committerJoerg Roedel <joerg.roedel@amd.com>
Fri, 27 Nov 2009 13:20:37 +0000 (14:20 +0100)
This patch removes the ugly contruct where the
iommu->lock must be released while before calling the
reset_iommu_command_buffer function.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
arch/x86/kernel/amd_iommu.c

index 0eafca58926f0e6cf5a1f861b2a2317f8d3f054f..b75fcd9b6a0fe9886b94f49b768b770f30e9aed7 100644 (file)
@@ -285,6 +285,7 @@ static void iommu_print_event(struct amd_iommu *iommu, void *__evt)
                break;
        case EVENT_TYPE_ILL_CMD:
                printk("ILLEGAL_COMMAND_ERROR address=0x%016llx]\n", address);
+               iommu->reset_in_progress = true;
                reset_iommu_command_buffer(iommu);
                dump_command(address);
                break;
@@ -407,11 +408,8 @@ static void __iommu_wait_for_completion(struct amd_iommu *iommu)
        status &= ~MMIO_STATUS_COM_WAIT_INT_MASK;
        writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET);
 
-       if (unlikely(i == EXIT_LOOP_COUNT)) {
-               spin_unlock(&iommu->lock);
-               reset_iommu_command_buffer(iommu);
-               spin_lock(&iommu->lock);
-       }
+       if (unlikely(i == EXIT_LOOP_COUNT))
+               iommu->reset_in_progress = true;
 }
 
 /*
@@ -458,6 +456,9 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
 out:
        spin_unlock_irqrestore(&iommu->lock, flags);
 
+       if (iommu->reset_in_progress)
+               reset_iommu_command_buffer(iommu);
+
        return 0;
 }
 
@@ -649,8 +650,6 @@ static void reset_iommu_command_buffer(struct amd_iommu *iommu)
        if (iommu->reset_in_progress)
                panic("AMD-Vi: ILLEGAL_COMMAND_ERROR while resetting command buffer\n");
 
-       iommu->reset_in_progress = true;
-
        amd_iommu_reset_cmd_buffer(iommu);
        amd_iommu_flush_all_devices();
        amd_iommu_flush_all_domains();