davinci: cleanup mdio arch code and switch to phy_id

This patch removes davinci architecture code that has now been rendered
useless by the previous patches in the MDIO separation series.

In addition, the earlier phy_mask definitions have been replaced with
corresponding phy_id definitions.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Tested-by: Michael Williamson <michael.williamson@criticallink.com>
Tested-by: Caglar Akyuz <caglarakyuz@gmail.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index ef1ab0b6576e506c852f39c4f814de6bdc50b789..1bb89d3f9b1fb4062c5a95d2f2e43022b3be42bb 100644 (file)
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -31,9 +31,7 @@
 #include <mach/usb.h>
 #include <mach/aemif.h>
 
-#define DA830_EVM_PHY_MASK             0x0
-#define DA830_EVM_MDIO_FREQUENCY       2200000 /* PHY bus frequency */
-
+#define DA830_EVM_PHY_ID               ""
 /*
  * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
  */
@@ -558,9 +556,8 @@ static __init void da830_evm_init(void)
 
        da830_evm_usb_init();
 
-       soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
-       soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
        soc_info->emac_pdata->rmii_en = 1;
+       soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
 
        ret = davinci_cfg_reg_list(da830_cpgmac_pins);
        if (ret)

diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index ac2297c69a922f85de484066f18096e11faf6d85..5e435b0686619f62346b7231ee907e66a58927cc 100644 (file)
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -38,9 +38,7 @@
 #include <mach/mux.h>
 #include <mach/aemif.h>
 
-#define DA850_EVM_PHY_MASK             0x1
-#define DA850_EVM_MDIO_FREQUENCY       2200000 /* PHY bus frequency */
-
+#define DA850_EVM_PHY_ID               "0:00"
 #define DA850_LCD_PWR_PIN              GPIO_TO_PIN(2, 8)
 #define DA850_LCD_BL_PIN               GPIO_TO_PIN(2, 15)
 
@@ -678,8 +676,7 @@ static int __init da850_evm_config_emac(void)
        /* Enable/Disable MII MDIO clock */
        gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
 
-       soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
-       soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
+       soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
 
        ret = da8xx_register_emac();
        if (ret)

diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index bdea2da0b2031d0d5d808d18c0691d6409f7c4c0..a06b84c1b7d84faff635dd9bc82aee2e1c4cef1e 100644 (file)
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -54,9 +54,7 @@ static inline int have_tvp7002(void)
        return 0;
 }
 
-#define DM365_EVM_PHY_MASK             (0x2)
-#define DM365_EVM_MDIO_FREQUENCY       (2200000) /* PHY bus frequency */
-
+#define DM365_EVM_PHY_ID               "0:01"
 /*
  * A MAX-II CPLD is used for various board control functions.
  */
@@ -535,8 +533,7 @@ fail:
 
                /* ... and ENET ... */
                dm365evm_emac_configure();
-               soc_info->emac_pdata->phy_mask = DM365_EVM_PHY_MASK;
-               soc_info->emac_pdata->mdio_max_freq = DM365_EVM_MDIO_FREQUENCY;
+               soc_info->emac_pdata->phy_id = DM365_EVM_PHY_ID;
                resets &= ~BIT(3);
 
                /* ... and AIC33 */

diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 65bb94064feb51a845df02a978c9992e3d85c03a..44a2f0a59285c1d9ea95d2568172aaad419ec7ef 100644 (file)
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -39,9 +39,7 @@
 #include <mach/usb.h>
 #include <mach/aemif.h>
 
-#define DM644X_EVM_PHY_MASK            (0x2)
-#define DM644X_EVM_MDIO_FREQUENCY      (2200000) /* PHY bus frequency */
-
+#define DM644X_EVM_PHY_ID              "0:01"
 #define LXT971_PHY_ID  (0x001378e2)
 #define LXT971_PHY_MASK        (0xfffffff0)
 
@@ -707,9 +705,7 @@ static __init void davinci_evm_init(void)
        davinci_serial_init(&uart_config);
        dm644x_init_asp(&dm644x_evm_snd_data);
 
-       soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK;
-       soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY;
-
+       soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
        /* Register the fixup for PHY on DaVinci */
        phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
                                        davinci_phy_fixup);

diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 5a29955b2f5cb95cc4a869fcb2bd81ca9b8a0e41..67669bba922c192b85c9e562e6199d60d20a6905 100644 (file)
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -729,9 +729,7 @@ static struct davinci_uart_config uart_config __initdata = {
        .enabled_uarts = (1 << 0),
 };
 
-#define DM646X_EVM_PHY_MASK            (0x2)
-#define DM646X_EVM_MDIO_FREQUENCY      (2200000) /* PHY bus frequency */
-
+#define DM646X_EVM_PHY_ID              "0:01"
 /*
  * The following EDMA channels/slots are not being used by drivers (for
  * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
@@ -784,8 +782,7 @@ static __init void evm_init(void)
        if (HAS_ATA)
                davinci_init_ide();
 
-       soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK;
-       soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY;
+       soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
 }
 
 #define DM646X_EVM_REF_FREQ            27000000

diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 84d5aff50de413ca31957fc7c1688e690effb467..6f12a182333b327d6f5f00c29a0c4244b3e85809 100644 (file)
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -24,9 +24,7 @@
 #include <mach/nand.h>
 #include <mach/mux.h>
 
-#define MITYOMAPL138_PHY_MASK          0x08 /* hardcoded for now */
-#define MITYOMAPL138_MDIO_FREQUENCY    (2200000) /* PHY bus frequency */
-
+#define MITYOMAPL138_PHY_ID            "0:03"
 static struct davinci_i2c_platform_data mityomap_i2c_0_pdata = {
        .bus_freq       = 100,  /* kHz */
        .bus_delay      = 0,    /* usec */
@@ -273,9 +271,7 @@ static void __init mityomapl138_config_emac(void)
        /* configure the CFGCHIP3 register for RMII or MII */
        __raw_writel(val, cfg_chip3_base);
 
-       soc_info->emac_pdata->phy_mask = MITYOMAPL138_PHY_MASK;
-       pr_debug("setting phy_mask to %x\n", soc_info->emac_pdata->phy_mask);
-       soc_info->emac_pdata->mdio_max_freq = MITYOMAPL138_MDIO_FREQUENCY;
+       soc_info->emac_pdata->phy_id = MITYOMAPL138_PHY_ID;
 
        ret = da8xx_register_emac();
        if (ret)

diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 4c30e929bbf94231f53d6ee64178a148061961db..04a8d16f2224d01713700e004795a9abee489df9 100644 (file)
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -39,9 +39,7 @@
 #include <mach/mmc.h>
 #include <mach/usb.h>
 
-#define NEUROS_OSD2_PHY_MASK           0x2
-#define NEUROS_OSD2_MDIO_FREQUENCY     2200000 /* PHY bus frequency */
-
+#define NEUROS_OSD2_PHY_ID             "0:01"
 #define LXT971_PHY_ID                  0x001378e2
 #define LXT971_PHY_MASK                        0xfffffff0
 
@@ -252,8 +250,7 @@ static __init void davinci_ntosd2_init(void)
        davinci_serial_init(&uart_config);
        dm644x_init_asp(&dm644x_ntosd2_snd_data);
 
-       soc_info->emac_pdata->phy_mask = NEUROS_OSD2_PHY_MASK;
-       soc_info->emac_pdata->mdio_max_freq = NEUROS_OSD2_MDIO_FREQUENCY;
+       soc_info->emac_pdata->phy_id = NEUROS_OSD2_PHY_ID;
 
        davinci_setup_usb(1000, 8);
        /*

diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 23e664a1a802a2c3d22b058cccd8b221b337dabf..ab4292d4f80b7ba5cd199db065ed3c967d420f2e 100644 (file)
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -42,9 +42,7 @@
 #include <mach/mux.h>
 #include <mach/usb.h>
 
-#define SFFSDR_PHY_MASK                (0x2)
-#define SFFSDR_MDIO_FREQUENCY  (2200000) /* PHY bus frequency */
-
+#define SFFSDR_PHY_ID          "0:01"
 static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
        /* U-Boot Environment: Block 0
         * UBL:                Block 1
@@ -143,8 +141,7 @@ static __init void davinci_sffsdr_init(void)
                             ARRAY_SIZE(davinci_sffsdr_devices));
        sffsdr_init_i2c();
        davinci_serial_init(&uart_config);
-       soc_info->emac_pdata->phy_mask = SFFSDR_PHY_MASK;
-       soc_info->emac_pdata->mdio_max_freq = SFFSDR_MDIO_FREQUENCY;
+       soc_info->emac_pdata->phy_id = SFFSDR_PHY_ID;
        davinci_setup_usb(0, 0); /* We support only peripheral mode. */
 
        /* mux VLYNQ pins */

diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 9039221649d4d9587cf27c465e0b8786cc2d90a7..9eec63070e0c35b42c2fc55a6f7282635d99b737 100644 (file)
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -42,7 +42,6 @@
 #define DA8XX_EMAC_CTRL_REG_OFFSET     0x3000
 #define DA8XX_EMAC_MOD_REG_OFFSET      0x2000
 #define DA8XX_EMAC_RAM_OFFSET          0x0000
-#define DA8XX_MDIO_REG_OFFSET          0x4000
 #define DA8XX_EMAC_CTRL_RAM_SIZE       SZ_8K
 
 void __iomem *da8xx_syscfg0_base;
@@ -381,7 +380,6 @@ struct emac_platform_data da8xx_emac_pdata = {
        .ctrl_reg_offset        = DA8XX_EMAC_CTRL_REG_OFFSET,
        .ctrl_mod_reg_offset    = DA8XX_EMAC_MOD_REG_OFFSET,
        .ctrl_ram_offset        = DA8XX_EMAC_RAM_OFFSET,
-       .mdio_reg_offset        = DA8XX_MDIO_REG_OFFSET,
        .ctrl_ram_size          = DA8XX_EMAC_CTRL_RAM_SIZE,
        .version                = EMAC_VERSION_2,
 };

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 71f0f9d5c56a38c36a5ba079a907cb6a66099350..240f392e18a8f92df522fcda8371eda8015a2205 100644 (file)
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -691,7 +691,6 @@ static struct emac_platform_data dm365_emac_pdata = {
        .ctrl_reg_offset        = DM365_EMAC_CNTRL_OFFSET,
        .ctrl_mod_reg_offset    = DM365_EMAC_CNTRL_MOD_OFFSET,
        .ctrl_ram_offset        = DM365_EMAC_CNTRL_RAM_OFFSET,
-       .mdio_reg_offset        = DM365_EMAC_MDIO_OFFSET,
        .ctrl_ram_size          = DM365_EMAC_CNTRL_RAM_SIZE,
        .version                = EMAC_VERSION_2,
 };

diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index c103b2c8caff28ad4cc7cc2012a10bd9d19aa9a7..41b7a95f22d344901e72c9ed5ba968744f67b417 100644 (file)
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -322,7 +322,6 @@ static struct emac_platform_data dm644x_emac_pdata = {
        .ctrl_reg_offset        = DM644X_EMAC_CNTRL_OFFSET,
        .ctrl_mod_reg_offset    = DM644X_EMAC_CNTRL_MOD_OFFSET,
        .ctrl_ram_offset        = DM644X_EMAC_CNTRL_RAM_OFFSET,
-       .mdio_reg_offset        = DM644X_EMAC_MDIO_OFFSET,
        .ctrl_ram_size          = DM644X_EMAC_CNTRL_RAM_SIZE,
        .version                = EMAC_VERSION_1,
 };

diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 8da886bc6df5fd86ae72b0e8a8d7af7e07d3e5b2..08db90f142875b0d7e5a6159835f6c386d74c560 100644 (file)
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -358,7 +358,6 @@ static struct emac_platform_data dm646x_emac_pdata = {
        .ctrl_reg_offset        = DM646X_EMAC_CNTRL_OFFSET,
        .ctrl_mod_reg_offset    = DM646X_EMAC_CNTRL_MOD_OFFSET,
        .ctrl_ram_offset        = DM646X_EMAC_CNTRL_RAM_OFFSET,
-       .mdio_reg_offset        = DM646X_EMAC_MDIO_OFFSET,
        .ctrl_ram_size          = DM646X_EMAC_CNTRL_RAM_SIZE,
        .version                = EMAC_VERSION_2,
 };

diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
index dbb5052b6c85f796071e4178359c622a21c48e31..2563bf4e93a10e1cc655f0cff4ca7b04f188a5b7 100644 (file)
--- a/arch/arm/mach-davinci/include/mach/dm365.h
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -25,7 +25,6 @@
 #define DM365_EMAC_CNTRL_OFFSET                (0x0000)
 #define DM365_EMAC_CNTRL_MOD_OFFSET    (0x3000)
 #define DM365_EMAC_CNTRL_RAM_OFFSET    (0x1000)
-#define DM365_EMAC_MDIO_OFFSET         (0x4000)
 #define DM365_EMAC_CNTRL_RAM_SIZE      (0x2000)
 
 /* Base of key scan register bank */

diff --git a/arch/arm/mach-davinci/include/mach/dm644x.h b/arch/arm/mach-davinci/include/mach/dm644x.h
index 515911711a29bffbf8b43e6ce67ec16e75f922c6..5a1b26d4e68b41936ac16ee574d34d7be8342e6c 100644 (file)
--- a/arch/arm/mach-davinci/include/mach/dm644x.h
+++ b/arch/arm/mach-davinci/include/mach/dm644x.h
@@ -32,7 +32,6 @@
 #define DM644X_EMAC_CNTRL_OFFSET       (0x0000)
 #define DM644X_EMAC_CNTRL_MOD_OFFSET   (0x1000)
 #define DM644X_EMAC_CNTRL_RAM_OFFSET   (0x2000)
-#define DM644X_EMAC_MDIO_OFFSET                (0x4000)
 #define DM644X_EMAC_CNTRL_RAM_SIZE     (0x2000)
 
 #define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01E00000

diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h b/arch/arm/mach-davinci/include/mach/dm646x.h
index 1c4dca924ac0b8d2b55570255c505e8df082f742..7a27f3f139137258b517d589606041e275f5cf13 100644 (file)
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -23,7 +23,6 @@
 #define DM646X_EMAC_CNTRL_OFFSET       (0x0000)
 #define DM646X_EMAC_CNTRL_MOD_OFFSET   (0x1000)
 #define DM646X_EMAC_CNTRL_RAM_OFFSET   (0x2000)
-#define DM646X_EMAC_MDIO_OFFSET                (0x4000)
 #define DM646X_EMAC_CNTRL_RAM_SIZE     (0x2000)
 
 #define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000