]> bbs.cooldavid.org Git - net-next-2.6.git/commitdiff
omap1: mmc: Add platform init for omap7xx
authorCory Maccarrone <darkstar6262@gmail.com>
Sun, 22 Nov 2009 18:10:50 +0000 (10:10 -0800)
committerTony Lindgren <tony@atomide.com>
Sun, 22 Nov 2009 18:24:32 +0000 (10:24 -0800)
The MMC mux pins normally used by omap chips in devices.c
are different from what is needed by omap7xx chips.  This
change adds a conditional around the mux setup code to
enable the correct mux pins.

The omap730 and omap850 both use a different clock for the "fck"
clock of the MMC interface than other omap processors based on the
SOFT_REQ_REG, pin 12.  The "ick" clock is the same as that used
by other omap processors.

* Added the missing clock definition as mmc3_ck to clock.h
* Added the clock definition to omap_clks in clock.c
* Added CK_7XX to the mmci-omap.0 "ick" clock already in clock.c

With these changes, it is now possible to initialize and use MMC
cards with omap730 and omap850 devices.

Signed-off-by: Cory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap1/clock.c
arch/arm/mach-omap1/clock.h
arch/arm/mach-omap1/devices.c
arch/arm/mach-omap1/mux.c
arch/arm/plat-omap/include/plat/mux.h

index b4fec9a6e89eea3d397ec0bc7aed707c45cb59e9..7b146c06ca8a2412ce7b496125c57b16be04c5d5 100644 (file)
@@ -125,7 +125,8 @@ static struct omap_clk omap_clks[] = {
        CLK(NULL,       "bclk",         &bclk_1510,     CK_1510 | CK_310),
        CLK(NULL,       "bclk",         &bclk_16xx,     CK_16XX),
        CLK("mmci-omap.0", "fck",       &mmc1_ck,       CK_16XX | CK_1510 | CK_310),
-       CLK("mmci-omap.0", "ick",       &armper_ck.clk, CK_16XX | CK_1510 | CK_310),
+       CLK("mmci-omap.0", "fck",       &mmc3_ck,       CK_7XX),
+       CLK("mmci-omap.0", "ick",       &armper_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_7XX),
        CLK("mmci-omap.1", "fck",       &mmc2_ck,       CK_16XX),
        CLK("mmci-omap.1", "ick",       &armper_ck.clk, CK_16XX),
        /* Virtual clocks */
index 17f87427125543f47cbcf4c368b01712ea01f409..fac921c00bfe103ae5582421cccaadccfa64468d 100644 (file)
@@ -637,6 +637,18 @@ static struct clk mmc2_ck = {
        .enable_bit     = 20,
 };
 
+static struct clk mmc3_ck = {
+       .name           = "mmc_ck",
+       .id             = 2,
+       .ops            = &clkops_generic,
+       /* Functional clock is direct from ULPD, interface clock is ARMPER */
+       .parent         = &armper_ck.clk,
+       .rate           = 48000000,
+       .flags          = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT,
+       .enable_reg     = OMAP1_IO_ADDRESS(SOFT_REQ_REG),
+       .enable_bit     = 12,
+};
+
 static struct clk virtual_ck_mpu = {
        .name           = "mpu",
        .ops            = &clkops_null,
index 6d2f72dcbb04ed0d2ca0fa9dda2e99e67b6e4046..23ded2d49600d8eb316179365b53322674e40af3 100644 (file)
@@ -108,15 +108,22 @@ static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
                        int controller_nr)
 {
        if (controller_nr == 0) {
-               omap_cfg_reg(MMC_CMD);
-               omap_cfg_reg(MMC_CLK);
-               omap_cfg_reg(MMC_DAT0);
+               if (cpu_is_omap7xx()) {
+                       omap_cfg_reg(MMC_7XX_CMD);
+                       omap_cfg_reg(MMC_7XX_CLK);
+                       omap_cfg_reg(MMC_7XX_DAT0);
+               } else {
+                       omap_cfg_reg(MMC_CMD);
+                       omap_cfg_reg(MMC_CLK);
+                       omap_cfg_reg(MMC_DAT0);
+               }
+
                if (cpu_is_omap1710()) {
                        omap_cfg_reg(M15_1710_MMC_CLKI);
                        omap_cfg_reg(P19_1710_MMC_CMDDIR);
                        omap_cfg_reg(P20_1710_MMC_DATDIR0);
                }
-               if (mmc_controller->slots[0].wires == 4) {
+               if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
                        omap_cfg_reg(MMC_DAT1);
                        /* NOTE: DAT2 can be on W10 (here) or M15 */
                        if (!mmc_controller->slots[0].nomux)
index 1e6145c9ee933899ecbf3295a732441cf7055d35..785371e982fc3296e40b2340676e04bbb6118018 100644 (file)
@@ -51,6 +51,11 @@ MUX_CFG_7XX("E3_7XX_KBC4",        13,   25,    0,   24,   1, 0)
 MUX_CFG_7XX("AA17_7XX_USB_DM",     2,   21,    0,   20,   0, 0)
 MUX_CFG_7XX("W16_7XX_USB_PU_EN",   2,   25,    0,   24,   0, 0)
 MUX_CFG_7XX("W17_7XX_USB_VBUSI",   2,   29,    0,   28,   0, 0)
+
+/* MMC Pins */
+MUX_CFG_7XX("MMC_7XX_CMD",         2,    9,    0,    8,   1, 0)
+MUX_CFG_7XX("MMC_7XX_CLK",         2,   13,    0,   12,   1, 0)
+MUX_CFG_7XX("MMC_7XX_DAT0",        2,   17,    0,   16,   1, 0)
 };
 #define OMAP7XX_PINS_SZ                ARRAY_SIZE(omap7xx_pins)
 #else
index f3c1d8a90456096a13f7a22c11c2ae1b464ab06c..56e357e9ec4e78d006b22a1a410bb9e1ffbc390c 100644 (file)
@@ -219,6 +219,11 @@ enum omap7xx_index {
        AA17_7XX_USB_DM,
        W16_7XX_USB_PU_EN,
        W17_7XX_USB_VBUSI,
+
+       /* MMC */
+       MMC_7XX_CMD,
+       MMC_7XX_CLK,
+       MMC_7XX_DAT0,
 };
 
 enum omap1xxx_index {