[ARM] S3C64XX: Mask the pll values correctly

Correct the PLL field masks to ensure the PLL functions return the
right value.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[ben-linux@fluff.org: improve the description text]
Signed-off-by: Ben Dooks <ben-linux@fluff.org>

diff --git a/arch/arm/plat-s3c64xx/include/plat/pll.h b/arch/arm/plat-s3c64xx/include/plat/pll.h
index 1a8576422f1746b7040338bc2c39c4bf32e48a3e..90bbd72fdc4ef356b177722625c384f9fb2e474f 100644 (file)
--- a/arch/arm/plat-s3c64xx/include/plat/pll.h
+++ b/arch/arm/plat-s3c64xx/include/plat/pll.h
@@ -12,9 +12,9 @@
  * published by the Free Software Foundation.
 */
 
-#define S3C6400_PLL_MDIV_MASK  ((1 << (25-16)) - 1)
-#define S3C6400_PLL_PDIV_MASK  ((1 << (13-8)) - 1)
-#define S3C6400_PLL_SDIV_MASK  ((1 << (2-0)) - 1)
+#define S3C6400_PLL_MDIV_MASK  ((1 << (25-16+1)) - 1)
+#define S3C6400_PLL_PDIV_MASK  ((1 << (13-8+1)) - 1)
+#define S3C6400_PLL_SDIV_MASK  ((1 << (2-0+1)) - 1)
 #define S3C6400_PLL_MDIV_SHIFT (16)
 #define S3C6400_PLL_PDIV_SHIFT (8)
 #define S3C6400_PLL_SDIV_SHIFT (0)