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stmmac: add init/exit callback in plat_stmmacenet_data struct
[net-next-2.6.git] / drivers / net / stmmac / stmmac_main.c
1 /*******************************************************************************
2   This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
3   ST Ethernet IPs are built around a Synopsys IP Core.
4
5   Copyright (C) 2007-2009  STMicroelectronics Ltd
6
7   This program is free software; you can redistribute it and/or modify it
8   under the terms and conditions of the GNU General Public License,
9   version 2, as published by the Free Software Foundation.
10
11   This program is distributed in the hope it will be useful, but WITHOUT
12   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14   more details.
15
16   You should have received a copy of the GNU General Public License along with
17   this program; if not, write to the Free Software Foundation, Inc.,
18   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19
20   The full GNU General Public License is included in this distribution in
21   the file called "COPYING".
22
23   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
24
25   Documentation available at:
26         http://www.stlinux.com
27   Support available at:
28         https://bugzilla.stlinux.com/
29 *******************************************************************************/
30
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/kernel.h>
34 #include <linux/interrupt.h>
35 #include <linux/etherdevice.h>
36 #include <linux/platform_device.h>
37 #include <linux/ip.h>
38 #include <linux/tcp.h>
39 #include <linux/skbuff.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_ether.h>
42 #include <linux/crc32.h>
43 #include <linux/mii.h>
44 #include <linux/phy.h>
45 #include <linux/if_vlan.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/slab.h>
48 #include "stmmac.h"
49
50 #define STMMAC_RESOURCE_NAME    "stmmaceth"
51 #define PHY_RESOURCE_NAME       "stmmacphy"
52
53 #undef STMMAC_DEBUG
54 /*#define STMMAC_DEBUG*/
55 #ifdef STMMAC_DEBUG
56 #define DBG(nlevel, klevel, fmt, args...) \
57                 ((void)(netif_msg_##nlevel(priv) && \
58                 printk(KERN_##klevel fmt, ## args)))
59 #else
60 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
61 #endif
62
63 #undef STMMAC_RX_DEBUG
64 /*#define STMMAC_RX_DEBUG*/
65 #ifdef STMMAC_RX_DEBUG
66 #define RX_DBG(fmt, args...)  printk(fmt, ## args)
67 #else
68 #define RX_DBG(fmt, args...)  do { } while (0)
69 #endif
70
71 #undef STMMAC_XMIT_DEBUG
72 /*#define STMMAC_XMIT_DEBUG*/
73 #ifdef STMMAC_TX_DEBUG
74 #define TX_DBG(fmt, args...)  printk(fmt, ## args)
75 #else
76 #define TX_DBG(fmt, args...)  do { } while (0)
77 #endif
78
79 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
80 #define JUMBO_LEN       9000
81
82 /* Module parameters */
83 #define TX_TIMEO 5000 /* default 5 seconds */
84 static int watchdog = TX_TIMEO;
85 module_param(watchdog, int, S_IRUGO | S_IWUSR);
86 MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
87
88 static int debug = -1;          /* -1: default, 0: no output, 16:  all */
89 module_param(debug, int, S_IRUGO | S_IWUSR);
90 MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
91
92 static int phyaddr = -1;
93 module_param(phyaddr, int, S_IRUGO);
94 MODULE_PARM_DESC(phyaddr, "Physical device address");
95
96 #define DMA_TX_SIZE 256
97 static int dma_txsize = DMA_TX_SIZE;
98 module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
99 MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
100
101 #define DMA_RX_SIZE 256
102 static int dma_rxsize = DMA_RX_SIZE;
103 module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
104 MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
105
106 static int flow_ctrl = FLOW_OFF;
107 module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
108 MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
109
110 static int pause = PAUSE_TIME;
111 module_param(pause, int, S_IRUGO | S_IWUSR);
112 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
113
114 #define TC_DEFAULT 64
115 static int tc = TC_DEFAULT;
116 module_param(tc, int, S_IRUGO | S_IWUSR);
117 MODULE_PARM_DESC(tc, "DMA threshold control value");
118
119 #define RX_NO_COALESCE  1       /* Always interrupt on completion */
120 #define TX_NO_COALESCE  -1      /* No moderation by default */
121
122 /* Pay attention to tune this parameter; take care of both
123  * hardware capability and network stabitily/performance impact.
124  * Many tests showed that ~4ms latency seems to be good enough. */
125 #ifdef CONFIG_STMMAC_TIMER
126 #define DEFAULT_PERIODIC_RATE   256
127 static int tmrate = DEFAULT_PERIODIC_RATE;
128 module_param(tmrate, int, S_IRUGO | S_IWUSR);
129 MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
130 #endif
131
132 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
133 static int buf_sz = DMA_BUFFER_SIZE;
134 module_param(buf_sz, int, S_IRUGO | S_IWUSR);
135 MODULE_PARM_DESC(buf_sz, "DMA buffer size");
136
137 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
138                                       NETIF_MSG_LINK | NETIF_MSG_IFUP |
139                                       NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
140
141 static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
142 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev);
143
144 /**
145  * stmmac_verify_args - verify the driver parameters.
146  * Description: it verifies if some wrong parameter is passed to the driver.
147  * Note that wrong parameters are replaced with the default values.
148  */
149 static void stmmac_verify_args(void)
150 {
151         if (unlikely(watchdog < 0))
152                 watchdog = TX_TIMEO;
153         if (unlikely(dma_rxsize < 0))
154                 dma_rxsize = DMA_RX_SIZE;
155         if (unlikely(dma_txsize < 0))
156                 dma_txsize = DMA_TX_SIZE;
157         if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
158                 buf_sz = DMA_BUFFER_SIZE;
159         if (unlikely(flow_ctrl > 1))
160                 flow_ctrl = FLOW_AUTO;
161         else if (likely(flow_ctrl < 0))
162                 flow_ctrl = FLOW_OFF;
163         if (unlikely((pause < 0) || (pause > 0xffff)))
164                 pause = PAUSE_TIME;
165 }
166
167 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
168 static void print_pkt(unsigned char *buf, int len)
169 {
170         int j;
171         pr_info("len = %d byte, buf addr: 0x%p", len, buf);
172         for (j = 0; j < len; j++) {
173                 if ((j % 16) == 0)
174                         pr_info("\n %03x:", j);
175                 pr_info(" %02x", buf[j]);
176         }
177         pr_info("\n");
178 }
179 #endif
180
181 /* minimum number of free TX descriptors required to wake up TX process */
182 #define STMMAC_TX_THRESH(x)     (x->dma_tx_size/4)
183
184 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
185 {
186         return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
187 }
188
189 /* On some ST platforms, some HW system configuraton registers have to be
190  * set according to the link speed negotiated.
191  */
192 static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
193 {
194         struct phy_device *phydev = priv->phydev;
195
196         if (likely(priv->plat->fix_mac_speed))
197                 priv->plat->fix_mac_speed(priv->plat->bsp_priv,
198                                           phydev->speed);
199 }
200
201 /**
202  * stmmac_adjust_link
203  * @dev: net device structure
204  * Description: it adjusts the link parameters.
205  */
206 static void stmmac_adjust_link(struct net_device *dev)
207 {
208         struct stmmac_priv *priv = netdev_priv(dev);
209         struct phy_device *phydev = priv->phydev;
210         unsigned long flags;
211         int new_state = 0;
212         unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
213
214         if (phydev == NULL)
215                 return;
216
217         DBG(probe, DEBUG, "stmmac_adjust_link: called.  address %d link %d\n",
218             phydev->addr, phydev->link);
219
220         spin_lock_irqsave(&priv->lock, flags);
221         if (phydev->link) {
222                 u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
223
224                 /* Now we make sure that we can be in full duplex mode.
225                  * If not, we operate in half-duplex mode. */
226                 if (phydev->duplex != priv->oldduplex) {
227                         new_state = 1;
228                         if (!(phydev->duplex))
229                                 ctrl &= ~priv->hw->link.duplex;
230                         else
231                                 ctrl |= priv->hw->link.duplex;
232                         priv->oldduplex = phydev->duplex;
233                 }
234                 /* Flow Control operation */
235                 if (phydev->pause)
236                         priv->hw->mac->flow_ctrl(priv->ioaddr, phydev->duplex,
237                                                  fc, pause_time);
238
239                 if (phydev->speed != priv->speed) {
240                         new_state = 1;
241                         switch (phydev->speed) {
242                         case 1000:
243                                 if (likely(priv->plat->has_gmac))
244                                         ctrl &= ~priv->hw->link.port;
245                                 stmmac_hw_fix_mac_speed(priv);
246                                 break;
247                         case 100:
248                         case 10:
249                                 if (priv->plat->has_gmac) {
250                                         ctrl |= priv->hw->link.port;
251                                         if (phydev->speed == SPEED_100) {
252                                                 ctrl |= priv->hw->link.speed;
253                                         } else {
254                                                 ctrl &= ~(priv->hw->link.speed);
255                                         }
256                                 } else {
257                                         ctrl &= ~priv->hw->link.port;
258                                 }
259                                 stmmac_hw_fix_mac_speed(priv);
260                                 break;
261                         default:
262                                 if (netif_msg_link(priv))
263                                         pr_warning("%s: Speed (%d) is not 10"
264                                        " or 100!\n", dev->name, phydev->speed);
265                                 break;
266                         }
267
268                         priv->speed = phydev->speed;
269                 }
270
271                 writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
272
273                 if (!priv->oldlink) {
274                         new_state = 1;
275                         priv->oldlink = 1;
276                 }
277         } else if (priv->oldlink) {
278                 new_state = 1;
279                 priv->oldlink = 0;
280                 priv->speed = 0;
281                 priv->oldduplex = -1;
282         }
283
284         if (new_state && netif_msg_link(priv))
285                 phy_print_status(phydev);
286
287         spin_unlock_irqrestore(&priv->lock, flags);
288
289         DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
290 }
291
292 /**
293  * stmmac_init_phy - PHY initialization
294  * @dev: net device structure
295  * Description: it initializes the driver's PHY state, and attaches the PHY
296  * to the mac driver.
297  *  Return value:
298  *  0 on success
299  */
300 static int stmmac_init_phy(struct net_device *dev)
301 {
302         struct stmmac_priv *priv = netdev_priv(dev);
303         struct phy_device *phydev;
304         char phy_id[MII_BUS_ID_SIZE + 3];
305         char bus_id[MII_BUS_ID_SIZE];
306
307         priv->oldlink = 0;
308         priv->speed = 0;
309         priv->oldduplex = -1;
310
311         if (priv->phy_addr == -1) {
312                 /* We don't have a PHY, so do nothing */
313                 return 0;
314         }
315
316         snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
317         snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
318                  priv->phy_addr);
319         pr_debug("stmmac_init_phy:  trying to attach to %s\n", phy_id);
320
321         phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0,
322                         priv->phy_interface);
323
324         if (IS_ERR(phydev)) {
325                 pr_err("%s: Could not attach to PHY\n", dev->name);
326                 return PTR_ERR(phydev);
327         }
328
329         /*
330          * Broken HW is sometimes missing the pull-up resistor on the
331          * MDIO line, which results in reads to non-existent devices returning
332          * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
333          * device as well.
334          * Note: phydev->phy_id is the result of reading the UID PHY registers.
335          */
336         if (phydev->phy_id == 0) {
337                 phy_disconnect(phydev);
338                 return -ENODEV;
339         }
340         pr_debug("stmmac_init_phy:  %s: attached to PHY (UID 0x%x)"
341                " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
342
343         priv->phydev = phydev;
344
345         return 0;
346 }
347
348 static inline void stmmac_enable_mac(void __iomem *ioaddr)
349 {
350         u32 value = readl(ioaddr + MAC_CTRL_REG);
351
352         value |= MAC_RNABLE_RX | MAC_ENABLE_TX;
353         writel(value, ioaddr + MAC_CTRL_REG);
354 }
355
356 static inline void stmmac_disable_mac(void __iomem *ioaddr)
357 {
358         u32 value = readl(ioaddr + MAC_CTRL_REG);
359
360         value &= ~(MAC_ENABLE_TX | MAC_RNABLE_RX);
361         writel(value, ioaddr + MAC_CTRL_REG);
362 }
363
364 /**
365  * display_ring
366  * @p: pointer to the ring.
367  * @size: size of the ring.
368  * Description: display all the descriptors within the ring.
369  */
370 static void display_ring(struct dma_desc *p, int size)
371 {
372         struct tmp_s {
373                 u64 a;
374                 unsigned int b;
375                 unsigned int c;
376         };
377         int i;
378         for (i = 0; i < size; i++) {
379                 struct tmp_s *x = (struct tmp_s *)(p + i);
380                 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
381                        i, (unsigned int)virt_to_phys(&p[i]),
382                        (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
383                        x->b, x->c);
384                 pr_info("\n");
385         }
386 }
387
388 /**
389  * init_dma_desc_rings - init the RX/TX descriptor rings
390  * @dev: net device structure
391  * Description:  this function initializes the DMA RX/TX descriptors
392  * and allocates the socket buffers.
393  */
394 static void init_dma_desc_rings(struct net_device *dev)
395 {
396         int i;
397         struct stmmac_priv *priv = netdev_priv(dev);
398         struct sk_buff *skb;
399         unsigned int txsize = priv->dma_tx_size;
400         unsigned int rxsize = priv->dma_rx_size;
401         unsigned int bfsize = priv->dma_buf_sz;
402         int buff2_needed = 0, dis_ic = 0;
403
404         /* Set the Buffer size according to the MTU;
405          * indeed, in case of jumbo we need to bump-up the buffer sizes.
406          */
407         if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
408                 bfsize = BUF_SIZE_16KiB;
409         else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
410                 bfsize = BUF_SIZE_8KiB;
411         else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
412                 bfsize = BUF_SIZE_4KiB;
413         else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
414                 bfsize = BUF_SIZE_2KiB;
415         else
416                 bfsize = DMA_BUFFER_SIZE;
417
418 #ifdef CONFIG_STMMAC_TIMER
419         /* Disable interrupts on completion for the reception if timer is on */
420         if (likely(priv->tm->enable))
421                 dis_ic = 1;
422 #endif
423         /* If the MTU exceeds 8k so use the second buffer in the chain */
424         if (bfsize >= BUF_SIZE_8KiB)
425                 buff2_needed = 1;
426
427         DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
428             txsize, rxsize, bfsize);
429
430         priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
431         priv->rx_skbuff =
432             kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
433         priv->dma_rx =
434             (struct dma_desc *)dma_alloc_coherent(priv->device,
435                                                   rxsize *
436                                                   sizeof(struct dma_desc),
437                                                   &priv->dma_rx_phy,
438                                                   GFP_KERNEL);
439         priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
440                                        GFP_KERNEL);
441         priv->dma_tx =
442             (struct dma_desc *)dma_alloc_coherent(priv->device,
443                                                   txsize *
444                                                   sizeof(struct dma_desc),
445                                                   &priv->dma_tx_phy,
446                                                   GFP_KERNEL);
447
448         if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
449                 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
450                 return;
451         }
452
453         DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
454             "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
455             dev->name, priv->dma_rx, priv->dma_tx,
456             (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
457
458         /* RX INITIALIZATION */
459         DBG(probe, INFO, "stmmac: SKB addresses:\n"
460                          "skb\t\tskb data\tdma data\n");
461
462         for (i = 0; i < rxsize; i++) {
463                 struct dma_desc *p = priv->dma_rx + i;
464
465                 skb = netdev_alloc_skb_ip_align(dev, bfsize);
466                 if (unlikely(skb == NULL)) {
467                         pr_err("%s: Rx init fails; skb is NULL\n", __func__);
468                         break;
469                 }
470                 priv->rx_skbuff[i] = skb;
471                 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
472                                                 bfsize, DMA_FROM_DEVICE);
473
474                 p->des2 = priv->rx_skbuff_dma[i];
475                 if (unlikely(buff2_needed))
476                         p->des3 = p->des2 + BUF_SIZE_8KiB;
477                 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
478                         priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
479         }
480         priv->cur_rx = 0;
481         priv->dirty_rx = (unsigned int)(i - rxsize);
482         priv->dma_buf_sz = bfsize;
483         buf_sz = bfsize;
484
485         /* TX INITIALIZATION */
486         for (i = 0; i < txsize; i++) {
487                 priv->tx_skbuff[i] = NULL;
488                 priv->dma_tx[i].des2 = 0;
489         }
490         priv->dirty_tx = 0;
491         priv->cur_tx = 0;
492
493         /* Clear the Rx/Tx descriptors */
494         priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
495         priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
496
497         if (netif_msg_hw(priv)) {
498                 pr_info("RX descriptor ring:\n");
499                 display_ring(priv->dma_rx, rxsize);
500                 pr_info("TX descriptor ring:\n");
501                 display_ring(priv->dma_tx, txsize);
502         }
503 }
504
505 static void dma_free_rx_skbufs(struct stmmac_priv *priv)
506 {
507         int i;
508
509         for (i = 0; i < priv->dma_rx_size; i++) {
510                 if (priv->rx_skbuff[i]) {
511                         dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
512                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
513                         dev_kfree_skb_any(priv->rx_skbuff[i]);
514                 }
515                 priv->rx_skbuff[i] = NULL;
516         }
517 }
518
519 static void dma_free_tx_skbufs(struct stmmac_priv *priv)
520 {
521         int i;
522
523         for (i = 0; i < priv->dma_tx_size; i++) {
524                 if (priv->tx_skbuff[i] != NULL) {
525                         struct dma_desc *p = priv->dma_tx + i;
526                         if (p->des2)
527                                 dma_unmap_single(priv->device, p->des2,
528                                                  priv->hw->desc->get_tx_len(p),
529                                                  DMA_TO_DEVICE);
530                         dev_kfree_skb_any(priv->tx_skbuff[i]);
531                         priv->tx_skbuff[i] = NULL;
532                 }
533         }
534 }
535
536 static void free_dma_desc_resources(struct stmmac_priv *priv)
537 {
538         /* Release the DMA TX/RX socket buffers */
539         dma_free_rx_skbufs(priv);
540         dma_free_tx_skbufs(priv);
541
542         /* Free the region of consistent memory previously allocated for
543          * the DMA */
544         dma_free_coherent(priv->device,
545                           priv->dma_tx_size * sizeof(struct dma_desc),
546                           priv->dma_tx, priv->dma_tx_phy);
547         dma_free_coherent(priv->device,
548                           priv->dma_rx_size * sizeof(struct dma_desc),
549                           priv->dma_rx, priv->dma_rx_phy);
550         kfree(priv->rx_skbuff_dma);
551         kfree(priv->rx_skbuff);
552         kfree(priv->tx_skbuff);
553 }
554
555 /**
556  *  stmmac_dma_operation_mode - HW DMA operation mode
557  *  @priv : pointer to the private device structure.
558  *  Description: it sets the DMA operation mode: tx/rx DMA thresholds
559  *  or Store-And-Forward capability.
560  */
561 static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
562 {
563         if (likely((priv->plat->tx_coe) && (!priv->no_csum_insertion))) {
564                 /* In case of GMAC, SF mode has to be enabled
565                  * to perform the TX COE. This depends on:
566                  * 1) TX COE if actually supported
567                  * 2) There is no bugged Jumbo frame support
568                  *    that needs to not insert csum in the TDES.
569                  */
570                 priv->hw->dma->dma_mode(priv->ioaddr,
571                                         SF_DMA_MODE, SF_DMA_MODE);
572                 tc = SF_DMA_MODE;
573         } else
574                 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
575 }
576
577 /**
578  * stmmac_tx:
579  * @priv: private driver structure
580  * Description: it reclaims resources after transmission completes.
581  */
582 static void stmmac_tx(struct stmmac_priv *priv)
583 {
584         unsigned int txsize = priv->dma_tx_size;
585
586         while (priv->dirty_tx != priv->cur_tx) {
587                 int last;
588                 unsigned int entry = priv->dirty_tx % txsize;
589                 struct sk_buff *skb = priv->tx_skbuff[entry];
590                 struct dma_desc *p = priv->dma_tx + entry;
591
592                 /* Check if the descriptor is owned by the DMA. */
593                 if (priv->hw->desc->get_tx_owner(p))
594                         break;
595
596                 /* Verify tx error by looking at the last segment */
597                 last = priv->hw->desc->get_tx_ls(p);
598                 if (likely(last)) {
599                         int tx_error =
600                                 priv->hw->desc->tx_status(&priv->dev->stats,
601                                                           &priv->xstats, p,
602                                                           priv->ioaddr);
603                         if (likely(tx_error == 0)) {
604                                 priv->dev->stats.tx_packets++;
605                                 priv->xstats.tx_pkt_n++;
606                         } else
607                                 priv->dev->stats.tx_errors++;
608                 }
609                 TX_DBG("%s: curr %d, dirty %d\n", __func__,
610                         priv->cur_tx, priv->dirty_tx);
611
612                 if (likely(p->des2))
613                         dma_unmap_single(priv->device, p->des2,
614                                          priv->hw->desc->get_tx_len(p),
615                                          DMA_TO_DEVICE);
616                 if (unlikely(p->des3))
617                         p->des3 = 0;
618
619                 if (likely(skb != NULL)) {
620                         /*
621                          * If there's room in the queue (limit it to size)
622                          * we add this skb back into the pool,
623                          * if it's the right size.
624                          */
625                         if ((skb_queue_len(&priv->rx_recycle) <
626                                 priv->dma_rx_size) &&
627                                 skb_recycle_check(skb, priv->dma_buf_sz))
628                                 __skb_queue_head(&priv->rx_recycle, skb);
629                         else
630                                 dev_kfree_skb(skb);
631
632                         priv->tx_skbuff[entry] = NULL;
633                 }
634
635                 priv->hw->desc->release_tx_desc(p);
636
637                 entry = (++priv->dirty_tx) % txsize;
638         }
639         if (unlikely(netif_queue_stopped(priv->dev) &&
640                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
641                 netif_tx_lock(priv->dev);
642                 if (netif_queue_stopped(priv->dev) &&
643                      stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
644                         TX_DBG("%s: restart transmit\n", __func__);
645                         netif_wake_queue(priv->dev);
646                 }
647                 netif_tx_unlock(priv->dev);
648         }
649 }
650
651 static inline void stmmac_enable_irq(struct stmmac_priv *priv)
652 {
653 #ifdef CONFIG_STMMAC_TIMER
654         if (likely(priv->tm->enable))
655                 priv->tm->timer_start(tmrate);
656         else
657 #endif
658                 priv->hw->dma->enable_dma_irq(priv->ioaddr);
659 }
660
661 static inline void stmmac_disable_irq(struct stmmac_priv *priv)
662 {
663 #ifdef CONFIG_STMMAC_TIMER
664         if (likely(priv->tm->enable))
665                 priv->tm->timer_stop();
666         else
667 #endif
668                 priv->hw->dma->disable_dma_irq(priv->ioaddr);
669 }
670
671 static int stmmac_has_work(struct stmmac_priv *priv)
672 {
673         unsigned int has_work = 0;
674         int rxret, tx_work = 0;
675
676         rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
677                 (priv->cur_rx % priv->dma_rx_size));
678
679         if (priv->dirty_tx != priv->cur_tx)
680                 tx_work = 1;
681
682         if (likely(!rxret || tx_work))
683                 has_work = 1;
684
685         return has_work;
686 }
687
688 static inline void _stmmac_schedule(struct stmmac_priv *priv)
689 {
690         if (likely(stmmac_has_work(priv))) {
691                 stmmac_disable_irq(priv);
692                 napi_schedule(&priv->napi);
693         }
694 }
695
696 #ifdef CONFIG_STMMAC_TIMER
697 void stmmac_schedule(struct net_device *dev)
698 {
699         struct stmmac_priv *priv = netdev_priv(dev);
700
701         priv->xstats.sched_timer_n++;
702
703         _stmmac_schedule(priv);
704 }
705
706 static void stmmac_no_timer_started(unsigned int x)
707 {;
708 };
709
710 static void stmmac_no_timer_stopped(void)
711 {;
712 };
713 #endif
714
715 /**
716  * stmmac_tx_err:
717  * @priv: pointer to the private device structure
718  * Description: it cleans the descriptors and restarts the transmission
719  * in case of errors.
720  */
721 static void stmmac_tx_err(struct stmmac_priv *priv)
722 {
723
724         netif_stop_queue(priv->dev);
725
726         priv->hw->dma->stop_tx(priv->ioaddr);
727         dma_free_tx_skbufs(priv);
728         priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
729         priv->dirty_tx = 0;
730         priv->cur_tx = 0;
731         priv->hw->dma->start_tx(priv->ioaddr);
732
733         priv->dev->stats.tx_errors++;
734         netif_wake_queue(priv->dev);
735 }
736
737
738 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
739 {
740         int status;
741
742         status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
743         if (likely(status == handle_tx_rx))
744                 _stmmac_schedule(priv);
745
746         else if (unlikely(status == tx_hard_error_bump_tc)) {
747                 /* Try to bump up the dma threshold on this failure */
748                 if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
749                         tc += 64;
750                         priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
751                         priv->xstats.threshold = tc;
752                 }
753                 stmmac_tx_err(priv);
754         } else if (unlikely(status == tx_hard_error))
755                 stmmac_tx_err(priv);
756 }
757
758 /**
759  *  stmmac_open - open entry point of the driver
760  *  @dev : pointer to the device structure.
761  *  Description:
762  *  This function is the open entry point of the driver.
763  *  Return value:
764  *  0 on success and an appropriate (-)ve integer as defined in errno.h
765  *  file on failure.
766  */
767 static int stmmac_open(struct net_device *dev)
768 {
769         struct stmmac_priv *priv = netdev_priv(dev);
770         int ret;
771
772         /* Check that the MAC address is valid.  If its not, refuse
773          * to bring the device up. The user must specify an
774          * address using the following linux command:
775          *      ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx  */
776         if (!is_valid_ether_addr(dev->dev_addr)) {
777                 random_ether_addr(dev->dev_addr);
778                 pr_warning("%s: generated random MAC address %pM\n", dev->name,
779                         dev->dev_addr);
780         }
781
782         stmmac_verify_args();
783
784         ret = stmmac_init_phy(dev);
785         if (unlikely(ret)) {
786                 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
787                 return ret;
788         }
789
790         /* Request the IRQ lines */
791         ret = request_irq(dev->irq, stmmac_interrupt,
792                           IRQF_SHARED, dev->name, dev);
793         if (unlikely(ret < 0)) {
794                 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
795                        __func__, dev->irq, ret);
796                 return ret;
797         }
798
799 #ifdef CONFIG_STMMAC_TIMER
800         priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
801         if (unlikely(priv->tm == NULL)) {
802                 pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
803                 return -ENOMEM;
804         }
805         priv->tm->freq = tmrate;
806
807         /* Test if the external timer can be actually used.
808          * In case of failure continue without timer. */
809         if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
810                 pr_warning("stmmaceth: cannot attach the external timer.\n");
811                 priv->tm->freq = 0;
812                 priv->tm->timer_start = stmmac_no_timer_started;
813                 priv->tm->timer_stop = stmmac_no_timer_stopped;
814         } else
815                 priv->tm->enable = 1;
816 #endif
817
818         /* Create and initialize the TX/RX descriptors chains. */
819         priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
820         priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
821         priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
822         init_dma_desc_rings(dev);
823
824         /* DMA initialization and SW reset */
825         if (unlikely(priv->hw->dma->init(priv->ioaddr, priv->plat->pbl,
826                                          priv->dma_tx_phy,
827                                          priv->dma_rx_phy) < 0)) {
828
829                 pr_err("%s: DMA initialization failed\n", __func__);
830                 return -1;
831         }
832
833         /* Copy the MAC addr into the HW  */
834         priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
835         /* If required, perform hw setup of the bus. */
836         if (priv->plat->bus_setup)
837                 priv->plat->bus_setup(priv->ioaddr);
838         /* Initialize the MAC Core */
839         priv->hw->mac->core_init(priv->ioaddr);
840
841         priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
842         if (priv->rx_coe)
843                 pr_info("stmmac: Rx Checksum Offload Engine supported\n");
844         if (priv->plat->tx_coe)
845                 pr_info("\tTX Checksum insertion supported\n");
846
847         priv->shutdown = 0;
848
849         /* Initialise the MMC (if present) to disable all interrupts. */
850         writel(0xffffffff, priv->ioaddr + MMC_HIGH_INTR_MASK);
851         writel(0xffffffff, priv->ioaddr + MMC_LOW_INTR_MASK);
852
853         /* Enable the MAC Rx/Tx */
854         stmmac_enable_mac(priv->ioaddr);
855
856         /* Set the HW DMA mode and the COE */
857         stmmac_dma_operation_mode(priv);
858
859         /* Extra statistics */
860         memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
861         priv->xstats.threshold = tc;
862
863         /* Start the ball rolling... */
864         DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
865         priv->hw->dma->start_tx(priv->ioaddr);
866         priv->hw->dma->start_rx(priv->ioaddr);
867
868 #ifdef CONFIG_STMMAC_TIMER
869         priv->tm->timer_start(tmrate);
870 #endif
871         /* Dump DMA/MAC registers */
872         if (netif_msg_hw(priv)) {
873                 priv->hw->mac->dump_regs(priv->ioaddr);
874                 priv->hw->dma->dump_regs(priv->ioaddr);
875         }
876
877         if (priv->phydev)
878                 phy_start(priv->phydev);
879
880         napi_enable(&priv->napi);
881         skb_queue_head_init(&priv->rx_recycle);
882         netif_start_queue(dev);
883         return 0;
884 }
885
886 /**
887  *  stmmac_release - close entry point of the driver
888  *  @dev : device pointer.
889  *  Description:
890  *  This is the stop entry point of the driver.
891  */
892 static int stmmac_release(struct net_device *dev)
893 {
894         struct stmmac_priv *priv = netdev_priv(dev);
895
896         /* Stop and disconnect the PHY */
897         if (priv->phydev) {
898                 phy_stop(priv->phydev);
899                 phy_disconnect(priv->phydev);
900                 priv->phydev = NULL;
901         }
902
903         netif_stop_queue(dev);
904
905 #ifdef CONFIG_STMMAC_TIMER
906         /* Stop and release the timer */
907         stmmac_close_ext_timer();
908         if (priv->tm != NULL)
909                 kfree(priv->tm);
910 #endif
911         napi_disable(&priv->napi);
912         skb_queue_purge(&priv->rx_recycle);
913
914         /* Free the IRQ lines */
915         free_irq(dev->irq, dev);
916
917         /* Stop TX/RX DMA and clear the descriptors */
918         priv->hw->dma->stop_tx(priv->ioaddr);
919         priv->hw->dma->stop_rx(priv->ioaddr);
920
921         /* Release and free the Rx/Tx resources */
922         free_dma_desc_resources(priv);
923
924         /* Disable the MAC Rx/Tx */
925         stmmac_disable_mac(priv->ioaddr);
926
927         netif_carrier_off(dev);
928
929         return 0;
930 }
931
932 /*
933  * To perform emulated hardware segmentation on skb.
934  */
935 static int stmmac_sw_tso(struct stmmac_priv *priv, struct sk_buff *skb)
936 {
937         struct sk_buff *segs, *curr_skb;
938         int gso_segs = skb_shinfo(skb)->gso_segs;
939
940         /* Estimate the number of fragments in the worst case */
941         if (unlikely(stmmac_tx_avail(priv) < gso_segs)) {
942                 netif_stop_queue(priv->dev);
943                 TX_DBG(KERN_ERR "%s: TSO BUG! Tx Ring full when queue awake\n",
944                        __func__);
945                 if (stmmac_tx_avail(priv) < gso_segs)
946                         return NETDEV_TX_BUSY;
947
948                 netif_wake_queue(priv->dev);
949         }
950         TX_DBG("\tstmmac_sw_tso: segmenting: skb %p (len %d)\n",
951                skb, skb->len);
952
953         segs = skb_gso_segment(skb, priv->dev->features & ~NETIF_F_TSO);
954         if (unlikely(IS_ERR(segs)))
955                 goto sw_tso_end;
956
957         do {
958                 curr_skb = segs;
959                 segs = segs->next;
960                 TX_DBG("\t\tcurrent skb->len: %d, *curr %p,"
961                        "*next %p\n", curr_skb->len, curr_skb, segs);
962                 curr_skb->next = NULL;
963                 stmmac_xmit(curr_skb, priv->dev);
964         } while (segs);
965
966 sw_tso_end:
967         dev_kfree_skb(skb);
968
969         return NETDEV_TX_OK;
970 }
971
972 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
973                                                struct net_device *dev,
974                                                int csum_insertion)
975 {
976         struct stmmac_priv *priv = netdev_priv(dev);
977         unsigned int nopaged_len = skb_headlen(skb);
978         unsigned int txsize = priv->dma_tx_size;
979         unsigned int entry = priv->cur_tx % txsize;
980         struct dma_desc *desc = priv->dma_tx + entry;
981
982         if (nopaged_len > BUF_SIZE_8KiB) {
983
984                 int buf2_size = nopaged_len - BUF_SIZE_8KiB;
985
986                 desc->des2 = dma_map_single(priv->device, skb->data,
987                                             BUF_SIZE_8KiB, DMA_TO_DEVICE);
988                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
989                 priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
990                                                 csum_insertion);
991
992                 entry = (++priv->cur_tx) % txsize;
993                 desc = priv->dma_tx + entry;
994
995                 desc->des2 = dma_map_single(priv->device,
996                                         skb->data + BUF_SIZE_8KiB,
997                                         buf2_size, DMA_TO_DEVICE);
998                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
999                 priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
1000                                                 csum_insertion);
1001                 priv->hw->desc->set_tx_owner(desc);
1002                 priv->tx_skbuff[entry] = NULL;
1003         } else {
1004                 desc->des2 = dma_map_single(priv->device, skb->data,
1005                                         nopaged_len, DMA_TO_DEVICE);
1006                 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1007                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1008                                                 csum_insertion);
1009         }
1010         return entry;
1011 }
1012
1013 /**
1014  *  stmmac_xmit:
1015  *  @skb : the socket buffer
1016  *  @dev : device pointer
1017  *  Description : Tx entry point of the driver.
1018  */
1019 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
1020 {
1021         struct stmmac_priv *priv = netdev_priv(dev);
1022         unsigned int txsize = priv->dma_tx_size;
1023         unsigned int entry;
1024         int i, csum_insertion = 0;
1025         int nfrags = skb_shinfo(skb)->nr_frags;
1026         struct dma_desc *desc, *first;
1027
1028         if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
1029                 if (!netif_queue_stopped(dev)) {
1030                         netif_stop_queue(dev);
1031                         /* This is a hard error, log it. */
1032                         pr_err("%s: BUG! Tx Ring full when queue awake\n",
1033                                 __func__);
1034                 }
1035                 return NETDEV_TX_BUSY;
1036         }
1037
1038         entry = priv->cur_tx % txsize;
1039
1040 #ifdef STMMAC_XMIT_DEBUG
1041         if ((skb->len > ETH_FRAME_LEN) || nfrags)
1042                 pr_info("stmmac xmit:\n"
1043                        "\tskb addr %p - len: %d - nopaged_len: %d\n"
1044                        "\tn_frags: %d - ip_summed: %d - %s gso\n",
1045                        skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1046                        !skb_is_gso(skb) ? "isn't" : "is");
1047 #endif
1048
1049         if (unlikely(skb_is_gso(skb)))
1050                 return stmmac_sw_tso(priv, skb);
1051
1052         if (likely((skb->ip_summed == CHECKSUM_PARTIAL))) {
1053                 if (unlikely((!priv->plat->tx_coe) ||
1054                              (priv->no_csum_insertion)))
1055                         skb_checksum_help(skb);
1056                 else
1057                         csum_insertion = 1;
1058         }
1059
1060         desc = priv->dma_tx + entry;
1061         first = desc;
1062
1063 #ifdef STMMAC_XMIT_DEBUG
1064         if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1065                 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1066                        "\t\tn_frags: %d, ip_summed: %d\n",
1067                        skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1068 #endif
1069         priv->tx_skbuff[entry] = skb;
1070         if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1071                 entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1072                 desc = priv->dma_tx + entry;
1073         } else {
1074                 unsigned int nopaged_len = skb_headlen(skb);
1075                 desc->des2 = dma_map_single(priv->device, skb->data,
1076                                         nopaged_len, DMA_TO_DEVICE);
1077                 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1078                                                 csum_insertion);
1079         }
1080
1081         for (i = 0; i < nfrags; i++) {
1082                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1083                 int len = frag->size;
1084
1085                 entry = (++priv->cur_tx) % txsize;
1086                 desc = priv->dma_tx + entry;
1087
1088                 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1089                 desc->des2 = dma_map_page(priv->device, frag->page,
1090                                           frag->page_offset,
1091                                           len, DMA_TO_DEVICE);
1092                 priv->tx_skbuff[entry] = NULL;
1093                 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1094                 priv->hw->desc->set_tx_owner(desc);
1095         }
1096
1097         /* Interrupt on completition only for the latest segment */
1098         priv->hw->desc->close_tx_desc(desc);
1099
1100 #ifdef CONFIG_STMMAC_TIMER
1101         /* Clean IC while using timer */
1102         if (likely(priv->tm->enable))
1103                 priv->hw->desc->clear_tx_ic(desc);
1104 #endif
1105         /* To avoid raise condition */
1106         priv->hw->desc->set_tx_owner(first);
1107
1108         priv->cur_tx++;
1109
1110 #ifdef STMMAC_XMIT_DEBUG
1111         if (netif_msg_pktdata(priv)) {
1112                 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1113                        "first=%p, nfrags=%d\n",
1114                        (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1115                        entry, first, nfrags);
1116                 display_ring(priv->dma_tx, txsize);
1117                 pr_info(">>> frame to be transmitted: ");
1118                 print_pkt(skb->data, skb->len);
1119         }
1120 #endif
1121         if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1122                 TX_DBG("%s: stop transmitted packets\n", __func__);
1123                 netif_stop_queue(dev);
1124         }
1125
1126         dev->stats.tx_bytes += skb->len;
1127
1128         priv->hw->dma->enable_dma_transmission(priv->ioaddr);
1129
1130         return NETDEV_TX_OK;
1131 }
1132
1133 static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1134 {
1135         unsigned int rxsize = priv->dma_rx_size;
1136         int bfsize = priv->dma_buf_sz;
1137         struct dma_desc *p = priv->dma_rx;
1138
1139         for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1140                 unsigned int entry = priv->dirty_rx % rxsize;
1141                 if (likely(priv->rx_skbuff[entry] == NULL)) {
1142                         struct sk_buff *skb;
1143
1144                         skb = __skb_dequeue(&priv->rx_recycle);
1145                         if (skb == NULL)
1146                                 skb = netdev_alloc_skb_ip_align(priv->dev,
1147                                                                 bfsize);
1148
1149                         if (unlikely(skb == NULL))
1150                                 break;
1151
1152                         priv->rx_skbuff[entry] = skb;
1153                         priv->rx_skbuff_dma[entry] =
1154                             dma_map_single(priv->device, skb->data, bfsize,
1155                                            DMA_FROM_DEVICE);
1156
1157                         (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1158                         if (unlikely(priv->plat->has_gmac)) {
1159                                 if (bfsize >= BUF_SIZE_8KiB)
1160                                         (p + entry)->des3 =
1161                                             (p + entry)->des2 + BUF_SIZE_8KiB;
1162                         }
1163                         RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1164                 }
1165                 priv->hw->desc->set_rx_owner(p + entry);
1166         }
1167 }
1168
1169 static int stmmac_rx(struct stmmac_priv *priv, int limit)
1170 {
1171         unsigned int rxsize = priv->dma_rx_size;
1172         unsigned int entry = priv->cur_rx % rxsize;
1173         unsigned int next_entry;
1174         unsigned int count = 0;
1175         struct dma_desc *p = priv->dma_rx + entry;
1176         struct dma_desc *p_next;
1177
1178 #ifdef STMMAC_RX_DEBUG
1179         if (netif_msg_hw(priv)) {
1180                 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1181                 display_ring(priv->dma_rx, rxsize);
1182         }
1183 #endif
1184         count = 0;
1185         while (!priv->hw->desc->get_rx_owner(p)) {
1186                 int status;
1187
1188                 if (count >= limit)
1189                         break;
1190
1191                 count++;
1192
1193                 next_entry = (++priv->cur_rx) % rxsize;
1194                 p_next = priv->dma_rx + next_entry;
1195                 prefetch(p_next);
1196
1197                 /* read the status of the incoming frame */
1198                 status = (priv->hw->desc->rx_status(&priv->dev->stats,
1199                                                     &priv->xstats, p));
1200                 if (unlikely(status == discard_frame))
1201                         priv->dev->stats.rx_errors++;
1202                 else {
1203                         struct sk_buff *skb;
1204                         int frame_len;
1205
1206                         frame_len = priv->hw->desc->get_rx_frame_len(p);
1207                         /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1208                          * Type frames (LLC/LLC-SNAP) */
1209                         if (unlikely(status != llc_snap))
1210                                 frame_len -= ETH_FCS_LEN;
1211 #ifdef STMMAC_RX_DEBUG
1212                         if (frame_len > ETH_FRAME_LEN)
1213                                 pr_debug("\tRX frame size %d, COE status: %d\n",
1214                                         frame_len, status);
1215
1216                         if (netif_msg_hw(priv))
1217                                 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1218                                         p, entry, p->des2);
1219 #endif
1220                         skb = priv->rx_skbuff[entry];
1221                         if (unlikely(!skb)) {
1222                                 pr_err("%s: Inconsistent Rx descriptor chain\n",
1223                                         priv->dev->name);
1224                                 priv->dev->stats.rx_dropped++;
1225                                 break;
1226                         }
1227                         prefetch(skb->data - NET_IP_ALIGN);
1228                         priv->rx_skbuff[entry] = NULL;
1229
1230                         skb_put(skb, frame_len);
1231                         dma_unmap_single(priv->device,
1232                                          priv->rx_skbuff_dma[entry],
1233                                          priv->dma_buf_sz, DMA_FROM_DEVICE);
1234 #ifdef STMMAC_RX_DEBUG
1235                         if (netif_msg_pktdata(priv)) {
1236                                 pr_info(" frame received (%dbytes)", frame_len);
1237                                 print_pkt(skb->data, frame_len);
1238                         }
1239 #endif
1240                         skb->protocol = eth_type_trans(skb, priv->dev);
1241
1242                         if (unlikely(status == csum_none)) {
1243                                 /* always for the old mac 10/100 */
1244                                 skb_checksum_none_assert(skb);
1245                                 netif_receive_skb(skb);
1246                         } else {
1247                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1248                                 napi_gro_receive(&priv->napi, skb);
1249                         }
1250
1251                         priv->dev->stats.rx_packets++;
1252                         priv->dev->stats.rx_bytes += frame_len;
1253                 }
1254                 entry = next_entry;
1255                 p = p_next;     /* use prefetched values */
1256         }
1257
1258         stmmac_rx_refill(priv);
1259
1260         priv->xstats.rx_pkt_n += count;
1261
1262         return count;
1263 }
1264
1265 /**
1266  *  stmmac_poll - stmmac poll method (NAPI)
1267  *  @napi : pointer to the napi structure.
1268  *  @budget : maximum number of packets that the current CPU can receive from
1269  *            all interfaces.
1270  *  Description :
1271  *   This function implements the the reception process.
1272  *   Also it runs the TX completion thread
1273  */
1274 static int stmmac_poll(struct napi_struct *napi, int budget)
1275 {
1276         struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1277         int work_done = 0;
1278
1279         priv->xstats.poll_n++;
1280         stmmac_tx(priv);
1281         work_done = stmmac_rx(priv, budget);
1282
1283         if (work_done < budget) {
1284                 napi_complete(napi);
1285                 stmmac_enable_irq(priv);
1286         }
1287         return work_done;
1288 }
1289
1290 /**
1291  *  stmmac_tx_timeout
1292  *  @dev : Pointer to net device structure
1293  *  Description: this function is called when a packet transmission fails to
1294  *   complete within a reasonable tmrate. The driver will mark the error in the
1295  *   netdev structure and arrange for the device to be reset to a sane state
1296  *   in order to transmit a new packet.
1297  */
1298 static void stmmac_tx_timeout(struct net_device *dev)
1299 {
1300         struct stmmac_priv *priv = netdev_priv(dev);
1301
1302         /* Clear Tx resources and restart transmitting again */
1303         stmmac_tx_err(priv);
1304 }
1305
1306 /* Configuration changes (passed on by ifconfig) */
1307 static int stmmac_config(struct net_device *dev, struct ifmap *map)
1308 {
1309         if (dev->flags & IFF_UP)        /* can't act on a running interface */
1310                 return -EBUSY;
1311
1312         /* Don't allow changing the I/O address */
1313         if (map->base_addr != dev->base_addr) {
1314                 pr_warning("%s: can't change I/O address\n", dev->name);
1315                 return -EOPNOTSUPP;
1316         }
1317
1318         /* Don't allow changing the IRQ */
1319         if (map->irq != dev->irq) {
1320                 pr_warning("%s: can't change IRQ number %d\n",
1321                        dev->name, dev->irq);
1322                 return -EOPNOTSUPP;
1323         }
1324
1325         /* ignore other fields */
1326         return 0;
1327 }
1328
1329 /**
1330  *  stmmac_multicast_list - entry point for multicast addressing
1331  *  @dev : pointer to the device structure
1332  *  Description:
1333  *  This function is a driver entry point which gets called by the kernel
1334  *  whenever multicast addresses must be enabled/disabled.
1335  *  Return value:
1336  *  void.
1337  */
1338 static void stmmac_multicast_list(struct net_device *dev)
1339 {
1340         struct stmmac_priv *priv = netdev_priv(dev);
1341
1342         spin_lock(&priv->lock);
1343         priv->hw->mac->set_filter(dev);
1344         spin_unlock(&priv->lock);
1345 }
1346
1347 /**
1348  *  stmmac_change_mtu - entry point to change MTU size for the device.
1349  *  @dev : device pointer.
1350  *  @new_mtu : the new MTU size for the device.
1351  *  Description: the Maximum Transfer Unit (MTU) is used by the network layer
1352  *  to drive packet transmission. Ethernet has an MTU of 1500 octets
1353  *  (ETH_DATA_LEN). This value can be changed with ifconfig.
1354  *  Return value:
1355  *  0 on success and an appropriate (-)ve integer as defined in errno.h
1356  *  file on failure.
1357  */
1358 static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1359 {
1360         struct stmmac_priv *priv = netdev_priv(dev);
1361         int max_mtu;
1362
1363         if (netif_running(dev)) {
1364                 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1365                 return -EBUSY;
1366         }
1367
1368         if (priv->plat->has_gmac)
1369                 max_mtu = JUMBO_LEN;
1370         else
1371                 max_mtu = ETH_DATA_LEN;
1372
1373         if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1374                 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1375                 return -EINVAL;
1376         }
1377
1378         /* Some GMAC devices have a bugged Jumbo frame support that
1379          * needs to have the Tx COE disabled for oversized frames
1380          * (due to limited buffer sizes). In this case we disable
1381          * the TX csum insertionin the TDES and not use SF. */
1382         if ((priv->plat->bugged_jumbo) && (priv->dev->mtu > ETH_DATA_LEN))
1383                 priv->no_csum_insertion = 1;
1384         else
1385                 priv->no_csum_insertion = 0;
1386
1387         dev->mtu = new_mtu;
1388
1389         return 0;
1390 }
1391
1392 static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1393 {
1394         struct net_device *dev = (struct net_device *)dev_id;
1395         struct stmmac_priv *priv = netdev_priv(dev);
1396
1397         if (unlikely(!dev)) {
1398                 pr_err("%s: invalid dev pointer\n", __func__);
1399                 return IRQ_NONE;
1400         }
1401
1402         if (priv->plat->has_gmac)
1403                 /* To handle GMAC own interrupts */
1404                 priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
1405
1406         stmmac_dma_interrupt(priv);
1407
1408         return IRQ_HANDLED;
1409 }
1410
1411 #ifdef CONFIG_NET_POLL_CONTROLLER
1412 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1413  * to allow network I/O with interrupts disabled. */
1414 static void stmmac_poll_controller(struct net_device *dev)
1415 {
1416         disable_irq(dev->irq);
1417         stmmac_interrupt(dev->irq, dev);
1418         enable_irq(dev->irq);
1419 }
1420 #endif
1421
1422 /**
1423  *  stmmac_ioctl - Entry point for the Ioctl
1424  *  @dev: Device pointer.
1425  *  @rq: An IOCTL specefic structure, that can contain a pointer to
1426  *  a proprietary structure used to pass information to the driver.
1427  *  @cmd: IOCTL command
1428  *  Description:
1429  *  Currently there are no special functionality supported in IOCTL, just the
1430  *  phy_mii_ioctl(...) can be invoked.
1431  */
1432 static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1433 {
1434         struct stmmac_priv *priv = netdev_priv(dev);
1435         int ret;
1436
1437         if (!netif_running(dev))
1438                 return -EINVAL;
1439
1440         if (!priv->phydev)
1441                 return -EINVAL;
1442
1443         spin_lock(&priv->lock);
1444         ret = phy_mii_ioctl(priv->phydev, rq, cmd);
1445         spin_unlock(&priv->lock);
1446
1447         return ret;
1448 }
1449
1450 #ifdef STMMAC_VLAN_TAG_USED
1451 static void stmmac_vlan_rx_register(struct net_device *dev,
1452                                     struct vlan_group *grp)
1453 {
1454         struct stmmac_priv *priv = netdev_priv(dev);
1455
1456         DBG(probe, INFO, "%s: Setting vlgrp to %p\n", dev->name, grp);
1457
1458         spin_lock(&priv->lock);
1459         priv->vlgrp = grp;
1460         spin_unlock(&priv->lock);
1461 }
1462 #endif
1463
1464 static const struct net_device_ops stmmac_netdev_ops = {
1465         .ndo_open = stmmac_open,
1466         .ndo_start_xmit = stmmac_xmit,
1467         .ndo_stop = stmmac_release,
1468         .ndo_change_mtu = stmmac_change_mtu,
1469         .ndo_set_multicast_list = stmmac_multicast_list,
1470         .ndo_tx_timeout = stmmac_tx_timeout,
1471         .ndo_do_ioctl = stmmac_ioctl,
1472         .ndo_set_config = stmmac_config,
1473 #ifdef STMMAC_VLAN_TAG_USED
1474         .ndo_vlan_rx_register = stmmac_vlan_rx_register,
1475 #endif
1476 #ifdef CONFIG_NET_POLL_CONTROLLER
1477         .ndo_poll_controller = stmmac_poll_controller,
1478 #endif
1479         .ndo_set_mac_address = eth_mac_addr,
1480 };
1481
1482 /**
1483  * stmmac_probe - Initialization of the adapter .
1484  * @dev : device pointer
1485  * Description: The function initializes the network device structure for
1486  * the STMMAC driver. It also calls the low level routines
1487  * in order to init the HW (i.e. the DMA engine)
1488  */
1489 static int stmmac_probe(struct net_device *dev)
1490 {
1491         int ret = 0;
1492         struct stmmac_priv *priv = netdev_priv(dev);
1493
1494         ether_setup(dev);
1495
1496         dev->netdev_ops = &stmmac_netdev_ops;
1497         stmmac_set_ethtool_ops(dev);
1498
1499         dev->features |= (NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA);
1500         dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1501 #ifdef STMMAC_VLAN_TAG_USED
1502         /* Both mac100 and gmac support receive VLAN tag detection */
1503         dev->features |= NETIF_F_HW_VLAN_RX;
1504 #endif
1505         priv->msg_enable = netif_msg_init(debug, default_msg_level);
1506
1507         if (flow_ctrl)
1508                 priv->flow_ctrl = FLOW_AUTO;    /* RX/TX pause on */
1509
1510         priv->pause = pause;
1511         netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1512
1513         /* Get the MAC address */
1514         priv->hw->mac->get_umac_addr((void __iomem *) dev->base_addr,
1515                                      dev->dev_addr, 0);
1516
1517         if (!is_valid_ether_addr(dev->dev_addr))
1518                 pr_warning("\tno valid MAC address;"
1519                         "please, use ifconfig or nwhwconfig!\n");
1520
1521         ret = register_netdev(dev);
1522         if (ret) {
1523                 pr_err("%s: ERROR %i registering the device\n",
1524                        __func__, ret);
1525                 return -ENODEV;
1526         }
1527
1528         DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1529             dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1530             (dev->features & NETIF_F_HW_CSUM) ? "on" : "off");
1531
1532         spin_lock_init(&priv->lock);
1533
1534         return ret;
1535 }
1536
1537 /**
1538  * stmmac_mac_device_setup
1539  * @dev : device pointer
1540  * Description: select and initialise the mac device (mac100 or Gmac).
1541  */
1542 static int stmmac_mac_device_setup(struct net_device *dev)
1543 {
1544         struct stmmac_priv *priv = netdev_priv(dev);
1545
1546         struct mac_device_info *device;
1547
1548         if (priv->plat->has_gmac)
1549                 device = dwmac1000_setup(priv->ioaddr);
1550         else
1551                 device = dwmac100_setup(priv->ioaddr);
1552
1553         if (!device)
1554                 return -ENOMEM;
1555
1556         if (priv->plat->enh_desc) {
1557                 device->desc = &enh_desc_ops;
1558                 pr_info("\tEnhanced descriptor structure\n");
1559         } else
1560                 device->desc = &ndesc_ops;
1561
1562         priv->hw = device;
1563
1564         if (device_can_wakeup(priv->device))
1565                 priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */
1566
1567         return 0;
1568 }
1569
1570 static int stmmacphy_dvr_probe(struct platform_device *pdev)
1571 {
1572         struct plat_stmmacphy_data *plat_dat = pdev->dev.platform_data;
1573
1574         pr_debug("stmmacphy_dvr_probe: added phy for bus %d\n",
1575                plat_dat->bus_id);
1576
1577         return 0;
1578 }
1579
1580 static int stmmacphy_dvr_remove(struct platform_device *pdev)
1581 {
1582         return 0;
1583 }
1584
1585 static struct platform_driver stmmacphy_driver = {
1586         .driver = {
1587                    .name = PHY_RESOURCE_NAME,
1588                    },
1589         .probe = stmmacphy_dvr_probe,
1590         .remove = stmmacphy_dvr_remove,
1591 };
1592
1593 /**
1594  * stmmac_associate_phy
1595  * @dev: pointer to device structure
1596  * @data: points to the private structure.
1597  * Description: Scans through all the PHYs we have registered and checks if
1598  * any are associated with our MAC.  If so, then just fill in
1599  * the blanks in our local context structure
1600  */
1601 static int stmmac_associate_phy(struct device *dev, void *data)
1602 {
1603         struct stmmac_priv *priv = (struct stmmac_priv *)data;
1604         struct plat_stmmacphy_data *plat_dat = dev->platform_data;
1605
1606         DBG(probe, DEBUG, "%s: checking phy for bus %d\n", __func__,
1607                 plat_dat->bus_id);
1608
1609         /* Check that this phy is for the MAC being initialised */
1610         if (priv->plat->bus_id != plat_dat->bus_id)
1611                 return 0;
1612
1613         /* OK, this PHY is connected to the MAC.
1614            Go ahead and get the parameters */
1615         DBG(probe, DEBUG, "%s: OK. Found PHY config\n", __func__);
1616         priv->phy_irq =
1617             platform_get_irq_byname(to_platform_device(dev), "phyirq");
1618         DBG(probe, DEBUG, "%s: PHY irq on bus %d is %d\n", __func__,
1619             plat_dat->bus_id, priv->phy_irq);
1620
1621         /* Override with kernel parameters if supplied XXX CRS XXX
1622          * this needs to have multiple instances */
1623         if ((phyaddr >= 0) && (phyaddr <= 31))
1624                 plat_dat->phy_addr = phyaddr;
1625
1626         priv->phy_addr = plat_dat->phy_addr;
1627         priv->phy_mask = plat_dat->phy_mask;
1628         priv->phy_interface = plat_dat->interface;
1629         priv->phy_reset = plat_dat->phy_reset;
1630
1631         DBG(probe, DEBUG, "%s: exiting\n", __func__);
1632         return 1;       /* forces exit of driver_for_each_device() */
1633 }
1634
1635 /**
1636  * stmmac_dvr_probe
1637  * @pdev: platform device pointer
1638  * Description: the driver is initialized through platform_device.
1639  */
1640 static int stmmac_dvr_probe(struct platform_device *pdev)
1641 {
1642         int ret = 0;
1643         struct resource *res;
1644         void __iomem *addr = NULL;
1645         struct net_device *ndev = NULL;
1646         struct stmmac_priv *priv = NULL;
1647         struct plat_stmmacenet_data *plat_dat;
1648
1649         pr_info("STMMAC driver:\n\tplatform registration... ");
1650         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1651         if (!res) {
1652                 ret = -ENODEV;
1653                 goto out;
1654         }
1655         pr_info("\tdone!\n");
1656
1657         if (!request_mem_region(res->start, resource_size(res),
1658                                 pdev->name)) {
1659                 pr_err("%s: ERROR: memory allocation failed"
1660                        "cannot get the I/O addr 0x%x\n",
1661                        __func__, (unsigned int)res->start);
1662                 ret = -EBUSY;
1663                 goto out;
1664         }
1665
1666         addr = ioremap(res->start, resource_size(res));
1667         if (!addr) {
1668                 pr_err("%s: ERROR: memory mapping failed\n", __func__);
1669                 ret = -ENOMEM;
1670                 goto out;
1671         }
1672
1673         ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1674         if (!ndev) {
1675                 pr_err("%s: ERROR: allocating the device\n", __func__);
1676                 ret = -ENOMEM;
1677                 goto out;
1678         }
1679
1680         SET_NETDEV_DEV(ndev, &pdev->dev);
1681
1682         /* Get the MAC information */
1683         ndev->irq = platform_get_irq_byname(pdev, "macirq");
1684         if (ndev->irq == -ENXIO) {
1685                 pr_err("%s: ERROR: MAC IRQ configuration "
1686                        "information not found\n", __func__);
1687                 ret = -ENODEV;
1688                 goto out;
1689         }
1690
1691         priv = netdev_priv(ndev);
1692         priv->device = &(pdev->dev);
1693         priv->dev = ndev;
1694         plat_dat = pdev->dev.platform_data;
1695
1696         priv->plat = plat_dat;
1697
1698         priv->ioaddr = addr;
1699
1700         /* PMT module is not integrated in all the MAC devices. */
1701         if (plat_dat->pmt) {
1702                 pr_info("\tPMT module supported\n");
1703                 device_set_wakeup_capable(&pdev->dev, 1);
1704         }
1705
1706         platform_set_drvdata(pdev, ndev);
1707
1708         /* Set the I/O base addr */
1709         ndev->base_addr = (unsigned long)addr;
1710
1711         /* Custom initialisation */
1712         if (priv->plat->init) {
1713                 ret = priv->plat->init(pdev);
1714                 if (unlikely(ret))
1715                         goto out;
1716         }
1717
1718         /* MAC HW revice detection */
1719         ret = stmmac_mac_device_setup(ndev);
1720         if (ret < 0)
1721                 goto out;
1722
1723         /* Network Device Registration */
1724         ret = stmmac_probe(ndev);
1725         if (ret < 0)
1726                 goto out;
1727
1728         /* associate a PHY - it is provided by another platform bus */
1729         if (!driver_for_each_device
1730             (&(stmmacphy_driver.driver), NULL, (void *)priv,
1731              stmmac_associate_phy)) {
1732                 pr_err("No PHY device is associated with this MAC!\n");
1733                 ret = -ENODEV;
1734                 goto out;
1735         }
1736
1737         pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1738                "\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
1739                pdev->id, ndev->irq, addr);
1740
1741         /* MDIO bus Registration */
1742         pr_debug("\tMDIO bus (id: %d)...", priv->plat->bus_id);
1743         ret = stmmac_mdio_register(ndev);
1744         if (ret < 0)
1745                 goto out;
1746         pr_debug("registered!\n");
1747
1748 out:
1749         if (ret < 0) {
1750                 if (priv->plat->exit)
1751                         priv->plat->exit(pdev);
1752
1753                 platform_set_drvdata(pdev, NULL);
1754                 release_mem_region(res->start, resource_size(res));
1755                 if (addr != NULL)
1756                         iounmap(addr);
1757         }
1758
1759         return ret;
1760 }
1761
1762 /**
1763  * stmmac_dvr_remove
1764  * @pdev: platform device pointer
1765  * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1766  * changes the link status, releases the DMA descriptor rings,
1767  * unregisters the MDIO bus and unmaps the allocated memory.
1768  */
1769 static int stmmac_dvr_remove(struct platform_device *pdev)
1770 {
1771         struct net_device *ndev = platform_get_drvdata(pdev);
1772         struct stmmac_priv *priv = netdev_priv(ndev);
1773         struct resource *res;
1774
1775         pr_info("%s:\n\tremoving driver", __func__);
1776
1777         priv->hw->dma->stop_rx(priv->ioaddr);
1778         priv->hw->dma->stop_tx(priv->ioaddr);
1779
1780         stmmac_disable_mac(priv->ioaddr);
1781
1782         netif_carrier_off(ndev);
1783
1784         stmmac_mdio_unregister(ndev);
1785
1786         if (priv->plat->exit)
1787                 priv->plat->exit(pdev);
1788
1789         platform_set_drvdata(pdev, NULL);
1790         unregister_netdev(ndev);
1791
1792         iounmap((void *)priv->ioaddr);
1793         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1794         release_mem_region(res->start, resource_size(res));
1795
1796         free_netdev(ndev);
1797
1798         return 0;
1799 }
1800
1801 #ifdef CONFIG_PM
1802 static int stmmac_suspend(struct platform_device *pdev, pm_message_t state)
1803 {
1804         struct net_device *dev = platform_get_drvdata(pdev);
1805         struct stmmac_priv *priv = netdev_priv(dev);
1806         int dis_ic = 0;
1807
1808         if (!dev || !netif_running(dev))
1809                 return 0;
1810
1811         spin_lock(&priv->lock);
1812
1813         if (state.event == PM_EVENT_SUSPEND) {
1814                 netif_device_detach(dev);
1815                 netif_stop_queue(dev);
1816                 if (priv->phydev)
1817                         phy_stop(priv->phydev);
1818
1819 #ifdef CONFIG_STMMAC_TIMER
1820                 priv->tm->timer_stop();
1821                 if (likely(priv->tm->enable))
1822                         dis_ic = 1;
1823 #endif
1824                 napi_disable(&priv->napi);
1825
1826                 /* Stop TX/RX DMA */
1827                 priv->hw->dma->stop_tx(priv->ioaddr);
1828                 priv->hw->dma->stop_rx(priv->ioaddr);
1829                 /* Clear the Rx/Tx descriptors */
1830                 priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
1831                                              dis_ic);
1832                 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
1833
1834                 /* Enable Power down mode by programming the PMT regs */
1835                 if (device_can_wakeup(priv->device))
1836                         priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
1837                 else
1838                         stmmac_disable_mac(priv->ioaddr);
1839         } else {
1840                 priv->shutdown = 1;
1841                 /* Although this can appear slightly redundant it actually
1842                  * makes fast the standby operation and guarantees the driver
1843                  * working if hibernation is on media. */
1844                 stmmac_release(dev);
1845         }
1846
1847         spin_unlock(&priv->lock);
1848         return 0;
1849 }
1850
1851 static int stmmac_resume(struct platform_device *pdev)
1852 {
1853         struct net_device *dev = platform_get_drvdata(pdev);
1854         struct stmmac_priv *priv = netdev_priv(dev);
1855
1856         if (!netif_running(dev))
1857                 return 0;
1858
1859         if (priv->shutdown) {
1860                 /* Re-open the interface and re-init the MAC/DMA
1861                    and the rings (i.e. on hibernation stage) */
1862                 stmmac_open(dev);
1863                 return 0;
1864         }
1865
1866         spin_lock(&priv->lock);
1867
1868         /* Power Down bit, into the PM register, is cleared
1869          * automatically as soon as a magic packet or a Wake-up frame
1870          * is received. Anyway, it's better to manually clear
1871          * this bit because it can generate problems while resuming
1872          * from another devices (e.g. serial console). */
1873         if (device_can_wakeup(priv->device))
1874                 priv->hw->mac->pmt(priv->ioaddr, 0);
1875
1876         netif_device_attach(dev);
1877
1878         /* Enable the MAC and DMA */
1879         stmmac_enable_mac(priv->ioaddr);
1880         priv->hw->dma->start_tx(priv->ioaddr);
1881         priv->hw->dma->start_rx(priv->ioaddr);
1882
1883 #ifdef CONFIG_STMMAC_TIMER
1884         priv->tm->timer_start(tmrate);
1885 #endif
1886         napi_enable(&priv->napi);
1887
1888         if (priv->phydev)
1889                 phy_start(priv->phydev);
1890
1891         netif_start_queue(dev);
1892
1893         spin_unlock(&priv->lock);
1894         return 0;
1895 }
1896 #endif
1897
1898 static struct platform_driver stmmac_driver = {
1899         .driver = {
1900                    .name = STMMAC_RESOURCE_NAME,
1901                    },
1902         .probe = stmmac_dvr_probe,
1903         .remove = stmmac_dvr_remove,
1904 #ifdef CONFIG_PM
1905         .suspend = stmmac_suspend,
1906         .resume = stmmac_resume,
1907 #endif
1908
1909 };
1910
1911 /**
1912  * stmmac_init_module - Entry point for the driver
1913  * Description: This function is the entry point for the driver.
1914  */
1915 static int __init stmmac_init_module(void)
1916 {
1917         int ret;
1918
1919         if (platform_driver_register(&stmmacphy_driver)) {
1920                 pr_err("No PHY devices registered!\n");
1921                 return -ENODEV;
1922         }
1923
1924         ret = platform_driver_register(&stmmac_driver);
1925         return ret;
1926 }
1927
1928 /**
1929  * stmmac_cleanup_module - Cleanup routine for the driver
1930  * Description: This function is the cleanup routine for the driver.
1931  */
1932 static void __exit stmmac_cleanup_module(void)
1933 {
1934         platform_driver_unregister(&stmmacphy_driver);
1935         platform_driver_unregister(&stmmac_driver);
1936 }
1937
1938 #ifndef MODULE
1939 static int __init stmmac_cmdline_opt(char *str)
1940 {
1941         char *opt;
1942
1943         if (!str || !*str)
1944                 return -EINVAL;
1945         while ((opt = strsep(&str, ",")) != NULL) {
1946                 if (!strncmp(opt, "debug:", 6))
1947                         strict_strtoul(opt + 6, 0, (unsigned long *)&debug);
1948                 else if (!strncmp(opt, "phyaddr:", 8))
1949                         strict_strtoul(opt + 8, 0, (unsigned long *)&phyaddr);
1950                 else if (!strncmp(opt, "dma_txsize:", 11))
1951                         strict_strtoul(opt + 11, 0,
1952                                        (unsigned long *)&dma_txsize);
1953                 else if (!strncmp(opt, "dma_rxsize:", 11))
1954                         strict_strtoul(opt + 11, 0,
1955                                        (unsigned long *)&dma_rxsize);
1956                 else if (!strncmp(opt, "buf_sz:", 7))
1957                         strict_strtoul(opt + 7, 0, (unsigned long *)&buf_sz);
1958                 else if (!strncmp(opt, "tc:", 3))
1959                         strict_strtoul(opt + 3, 0, (unsigned long *)&tc);
1960                 else if (!strncmp(opt, "watchdog:", 9))
1961                         strict_strtoul(opt + 9, 0, (unsigned long *)&watchdog);
1962                 else if (!strncmp(opt, "flow_ctrl:", 10))
1963                         strict_strtoul(opt + 10, 0,
1964                                        (unsigned long *)&flow_ctrl);
1965                 else if (!strncmp(opt, "pause:", 6))
1966                         strict_strtoul(opt + 6, 0, (unsigned long *)&pause);
1967 #ifdef CONFIG_STMMAC_TIMER
1968                 else if (!strncmp(opt, "tmrate:", 7))
1969                         strict_strtoul(opt + 7, 0, (unsigned long *)&tmrate);
1970 #endif
1971         }
1972         return 0;
1973 }
1974
1975 __setup("stmmaceth=", stmmac_cmdline_opt);
1976 #endif
1977
1978 module_init(stmmac_init_module);
1979 module_exit(stmmac_cleanup_module);
1980
1981 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
1982 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
1983 MODULE_LICENSE("GPL");