2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
8 Daniel J Blueman <daniel.blueman@gmail.com>
10 Shamelessly ripped from the w83627hf driver
11 Copyright (C) 2003 Mark Studebaker
13 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
14 in testing and debugging this driver.
16 This driver also supports the W83627EHG, which is the lead-free
17 version of the W83627EHF.
19 This program is free software; you can redistribute it and/or modify
20 it under the terms of the GNU General Public License as published by
21 the Free Software Foundation; either version 2 of the License, or
22 (at your option) any later version.
24 This program is distributed in the hope that it will be useful,
25 but WITHOUT ANY WARRANTY; without even the implied warranty of
26 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 GNU General Public License for more details.
29 You should have received a copy of the GNU General Public License
30 along with this program; if not, write to the Free Software
31 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
34 Supports the following chips:
36 Chip #vin #fan #pwm #temp chip IDs man ID
37 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
39 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
40 w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3
41 w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3
44 #include <linux/module.h>
45 #include <linux/init.h>
46 #include <linux/slab.h>
47 #include <linux/jiffies.h>
48 #include <linux/platform_device.h>
49 #include <linux/hwmon.h>
50 #include <linux/hwmon-sysfs.h>
51 #include <linux/hwmon-vid.h>
52 #include <linux/err.h>
53 #include <linux/mutex.h>
54 #include <linux/acpi.h>
58 enum kinds { w83627ehf, w83627dhg, w83627dhg_p, w83667hg };
60 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
61 static const char * w83627ehf_device_names[] = {
68 static unsigned short force_id;
69 module_param(force_id, ushort, 0);
70 MODULE_PARM_DESC(force_id, "Override the detected device ID");
72 #define DRVNAME "w83627ehf"
75 * Super-I/O constants and functions
78 #define W83627EHF_LD_HWM 0x0b
79 #define W83667HG_LD_VID 0x0d
81 #define SIO_REG_LDSEL 0x07 /* Logical device select */
82 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
83 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
84 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
85 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
86 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
87 #define SIO_REG_VID_DATA 0xF1 /* VID data */
89 #define SIO_W83627EHF_ID 0x8850
90 #define SIO_W83627EHG_ID 0x8860
91 #define SIO_W83627DHG_ID 0xa020
92 #define SIO_W83627DHG_P_ID 0xb070
93 #define SIO_W83667HG_ID 0xa510
94 #define SIO_ID_MASK 0xFFF0
97 superio_outb(int ioreg, int reg, int val)
100 outb(val, ioreg + 1);
104 superio_inb(int ioreg, int reg)
107 return inb(ioreg + 1);
111 superio_select(int ioreg, int ld)
113 outb(SIO_REG_LDSEL, ioreg);
118 superio_enter(int ioreg)
125 superio_exit(int ioreg)
128 outb(0x02, ioreg + 1);
135 #define IOREGION_ALIGNMENT ~7
136 #define IOREGION_OFFSET 5
137 #define IOREGION_LENGTH 2
138 #define ADDR_REG_OFFSET 0
139 #define DATA_REG_OFFSET 1
141 #define W83627EHF_REG_BANK 0x4E
142 #define W83627EHF_REG_CONFIG 0x40
144 /* Not currently used:
145 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
146 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
147 * REG_MAN_ID is at port 0x4f
148 * REG_CHIP_ID is at port 0x58 */
150 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
151 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
153 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
154 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
155 (0x554 + (((nr) - 7) * 2)))
156 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
157 (0x555 + (((nr) - 7) * 2)))
158 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
161 #define W83627EHF_REG_TEMP1 0x27
162 #define W83627EHF_REG_TEMP1_HYST 0x3a
163 #define W83627EHF_REG_TEMP1_OVER 0x39
164 static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
165 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
166 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
167 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };
169 /* Fan clock dividers are spread over the following five registers */
170 #define W83627EHF_REG_FANDIV1 0x47
171 #define W83627EHF_REG_FANDIV2 0x4B
172 #define W83627EHF_REG_VBAT 0x5D
173 #define W83627EHF_REG_DIODE 0x59
174 #define W83627EHF_REG_SMI_OVT 0x4C
176 #define W83627EHF_REG_ALARM1 0x459
177 #define W83627EHF_REG_ALARM2 0x45A
178 #define W83627EHF_REG_ALARM3 0x45B
180 /* SmartFan registers */
181 #define W83627EHF_REG_FAN_STEPUP_TIME 0x0f
182 #define W83627EHF_REG_FAN_STEPDOWN_TIME 0x0e
184 /* DC or PWM output fan configuration */
185 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
186 0x04, /* SYS FAN0 output mode and PWM mode */
187 0x04, /* CPU FAN0 output mode and PWM mode */
188 0x12, /* AUX FAN mode */
189 0x62, /* CPU FAN1 mode */
192 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
193 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
195 /* FAN Duty Cycle, be used to control */
196 static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
197 static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
198 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
200 /* Advanced Fan control, some values are common for all fans */
201 static const u8 W83627EHF_REG_FAN_START_OUTPUT[] = { 0x0a, 0x0b, 0x16, 0x65 };
202 static const u8 W83627EHF_REG_FAN_STOP_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
203 static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0c, 0x0d, 0x17, 0x66 };
204 static const u8 W83627EHF_REG_FAN_MAX_OUTPUT[] = { 0xff, 0x67, 0xff, 0x69 };
205 static const u8 W83627EHF_REG_FAN_STEP_OUTPUT[] = { 0xff, 0x68, 0xff, 0x6a };
211 /* 1 is PWM mode, output in ms */
212 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
214 return mode ? 100 * reg : 400 * reg;
217 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
219 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
220 (msec + 200) / 400), 1, 255);
223 static inline unsigned int
224 fan_from_reg(u8 reg, unsigned int div)
226 if (reg == 0 || reg == 255)
228 return 1350000U / (reg * div);
231 static inline unsigned int
238 temp1_from_reg(s8 reg)
244 temp1_to_reg(long temp, int min, int max)
251 return (temp - 500) / 1000;
252 return (temp + 500) / 1000;
255 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
257 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
259 static inline long in_from_reg(u8 reg, u8 nr)
261 return reg * scale_in[nr];
264 static inline u8 in_to_reg(u32 val, u8 nr)
266 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255);
270 * Data structures and manipulation thereof
273 struct w83627ehf_data {
274 int addr; /* IO base of hw monitor block */
277 struct device *hwmon_dev;
280 const u8 *REG_FAN_START_OUTPUT;
281 const u8 *REG_FAN_STOP_OUTPUT;
282 const u8 *REG_FAN_MAX_OUTPUT;
283 const u8 *REG_FAN_STEP_OUTPUT;
285 struct mutex update_lock;
286 char valid; /* !=0 if following fields are valid */
287 unsigned long last_updated; /* In jiffies */
289 /* Register values */
290 u8 in_num; /* number of in inputs we have */
291 u8 in[10]; /* Register value */
292 u8 in_max[10]; /* Register value */
293 u8 in_min[10]; /* Register value */
297 u8 has_fan; /* some fan inputs can be disabled */
304 s16 temp_max_hyst[2];
307 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
308 u8 pwm_enable[4]; /* 1->manual
309 2->thermal cruise mode (also called SmartFan I)
310 3->fan speed cruise mode
311 4->variable thermal cruise (also called SmartFan III) */
312 u8 pwm_num; /* number of pwm */
317 u8 fan_start_output[4]; /* minimum fan speed when spinning up */
318 u8 fan_stop_output[4]; /* minimum fan speed when spinning down */
319 u8 fan_stop_time[4]; /* time at minimum before disabling fan */
320 u8 fan_max_output[4]; /* maximum fan speed */
321 u8 fan_step_output[4]; /* rate of change output value */
330 struct w83627ehf_sio_data {
335 static inline int is_word_sized(u16 reg)
337 return (((reg & 0xff00) == 0x100
338 || (reg & 0xff00) == 0x200)
339 && ((reg & 0x00ff) == 0x50
340 || (reg & 0x00ff) == 0x53
341 || (reg & 0x00ff) == 0x55));
344 /* Registers 0x50-0x5f are banked */
345 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
347 if ((reg & 0x00f0) == 0x50) {
348 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
349 outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
353 /* Not strictly necessary, but play it safe for now */
354 static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
357 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
358 outb_p(0, data->addr + DATA_REG_OFFSET);
362 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
364 int res, word_sized = is_word_sized(reg);
366 mutex_lock(&data->lock);
368 w83627ehf_set_bank(data, reg);
369 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
370 res = inb_p(data->addr + DATA_REG_OFFSET);
372 outb_p((reg & 0xff) + 1,
373 data->addr + ADDR_REG_OFFSET);
374 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
376 w83627ehf_reset_bank(data, reg);
378 mutex_unlock(&data->lock);
383 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
385 int word_sized = is_word_sized(reg);
387 mutex_lock(&data->lock);
389 w83627ehf_set_bank(data, reg);
390 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
392 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
393 outb_p((reg & 0xff) + 1,
394 data->addr + ADDR_REG_OFFSET);
396 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
397 w83627ehf_reset_bank(data, reg);
399 mutex_unlock(&data->lock);
403 /* This function assumes that the caller holds data->update_lock */
404 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
410 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
411 | ((data->fan_div[0] & 0x03) << 4);
412 /* fan5 input control bit is write only, compute the value */
413 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
414 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
415 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
416 | ((data->fan_div[0] & 0x04) << 3);
417 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
420 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
421 | ((data->fan_div[1] & 0x03) << 6);
422 /* fan5 input control bit is write only, compute the value */
423 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
424 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
425 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
426 | ((data->fan_div[1] & 0x04) << 4);
427 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
430 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
431 | ((data->fan_div[2] & 0x03) << 6);
432 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
433 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
434 | ((data->fan_div[2] & 0x04) << 5);
435 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
438 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
439 | (data->fan_div[3] & 0x03);
440 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
441 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
442 | ((data->fan_div[3] & 0x04) << 5);
443 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
446 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
447 | ((data->fan_div[4] & 0x03) << 2)
448 | ((data->fan_div[4] & 0x04) << 5);
449 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
454 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
458 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
459 data->fan_div[0] = (i >> 4) & 0x03;
460 data->fan_div[1] = (i >> 6) & 0x03;
461 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
462 data->fan_div[2] = (i >> 6) & 0x03;
463 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
464 data->fan_div[0] |= (i >> 3) & 0x04;
465 data->fan_div[1] |= (i >> 4) & 0x04;
466 data->fan_div[2] |= (i >> 5) & 0x04;
467 if (data->has_fan & ((1 << 3) | (1 << 4))) {
468 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
469 data->fan_div[3] = i & 0x03;
470 data->fan_div[4] = ((i >> 2) & 0x03)
473 if (data->has_fan & (1 << 3)) {
474 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
475 data->fan_div[3] |= (i >> 5) & 0x04;
479 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
481 struct w83627ehf_data *data = dev_get_drvdata(dev);
482 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
485 mutex_lock(&data->update_lock);
487 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
489 /* Fan clock dividers */
490 w83627ehf_update_fan_div(data);
492 /* Measured voltages and limits */
493 for (i = 0; i < data->in_num; i++) {
494 data->in[i] = w83627ehf_read_value(data,
495 W83627EHF_REG_IN(i));
496 data->in_min[i] = w83627ehf_read_value(data,
497 W83627EHF_REG_IN_MIN(i));
498 data->in_max[i] = w83627ehf_read_value(data,
499 W83627EHF_REG_IN_MAX(i));
502 /* Measured fan speeds and limits */
503 for (i = 0; i < 5; i++) {
504 if (!(data->has_fan & (1 << i)))
507 data->fan[i] = w83627ehf_read_value(data,
508 W83627EHF_REG_FAN[i]);
509 data->fan_min[i] = w83627ehf_read_value(data,
510 W83627EHF_REG_FAN_MIN[i]);
512 /* If we failed to measure the fan speed and clock
513 divider can be increased, let's try that for next
515 if (data->fan[i] == 0xff
516 && data->fan_div[i] < 0x07) {
517 dev_dbg(dev, "Increasing fan%d "
518 "clock divider from %u to %u\n",
519 i + 1, div_from_reg(data->fan_div[i]),
520 div_from_reg(data->fan_div[i] + 1));
522 w83627ehf_write_fan_div(data, i);
523 /* Preserve min limit if possible */
524 if (data->fan_min[i] >= 2
525 && data->fan_min[i] != 255)
526 w83627ehf_write_value(data,
527 W83627EHF_REG_FAN_MIN[i],
528 (data->fan_min[i] /= 2));
532 for (i = 0; i < data->pwm_num; i++) {
533 if (!(data->has_fan & (1 << i)))
536 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
538 pwmcfg = w83627ehf_read_value(data,
539 W83627EHF_REG_PWM_ENABLE[i]);
540 tolerance = w83627ehf_read_value(data,
541 W83627EHF_REG_TOLERANCE[i]);
544 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
546 data->pwm_enable[i] =
547 ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
549 data->pwm[i] = w83627ehf_read_value(data,
550 W83627EHF_REG_PWM[i]);
551 data->fan_start_output[i] = w83627ehf_read_value(data,
552 W83627EHF_REG_FAN_START_OUTPUT[i]);
553 data->fan_stop_output[i] = w83627ehf_read_value(data,
554 W83627EHF_REG_FAN_STOP_OUTPUT[i]);
555 data->fan_stop_time[i] = w83627ehf_read_value(data,
556 W83627EHF_REG_FAN_STOP_TIME[i]);
558 if (data->REG_FAN_MAX_OUTPUT[i] != 0xff)
559 data->fan_max_output[i] =
560 w83627ehf_read_value(data,
561 data->REG_FAN_MAX_OUTPUT[i]);
563 if (data->REG_FAN_STEP_OUTPUT[i] != 0xff)
564 data->fan_step_output[i] =
565 w83627ehf_read_value(data,
566 data->REG_FAN_STEP_OUTPUT[i]);
568 data->target_temp[i] =
569 w83627ehf_read_value(data,
570 W83627EHF_REG_TARGET[i]) &
571 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
572 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
576 /* Measured temperatures and limits */
577 data->temp1 = w83627ehf_read_value(data,
578 W83627EHF_REG_TEMP1);
579 data->temp1_max = w83627ehf_read_value(data,
580 W83627EHF_REG_TEMP1_OVER);
581 data->temp1_max_hyst = w83627ehf_read_value(data,
582 W83627EHF_REG_TEMP1_HYST);
583 for (i = 0; i < 2; i++) {
584 data->temp[i] = w83627ehf_read_value(data,
585 W83627EHF_REG_TEMP[i]);
586 data->temp_max[i] = w83627ehf_read_value(data,
587 W83627EHF_REG_TEMP_OVER[i]);
588 data->temp_max_hyst[i] = w83627ehf_read_value(data,
589 W83627EHF_REG_TEMP_HYST[i]);
592 data->alarms = w83627ehf_read_value(data,
593 W83627EHF_REG_ALARM1) |
594 (w83627ehf_read_value(data,
595 W83627EHF_REG_ALARM2) << 8) |
596 (w83627ehf_read_value(data,
597 W83627EHF_REG_ALARM3) << 16);
599 data->last_updated = jiffies;
603 mutex_unlock(&data->update_lock);
608 * Sysfs callback functions
610 #define show_in_reg(reg) \
612 show_##reg(struct device *dev, struct device_attribute *attr, \
615 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
616 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
617 int nr = sensor_attr->index; \
618 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
624 #define store_in_reg(REG, reg) \
626 store_in_##reg (struct device *dev, struct device_attribute *attr, \
627 const char *buf, size_t count) \
629 struct w83627ehf_data *data = dev_get_drvdata(dev); \
630 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
631 int nr = sensor_attr->index; \
632 u32 val = simple_strtoul(buf, NULL, 10); \
634 mutex_lock(&data->update_lock); \
635 data->in_##reg[nr] = in_to_reg(val, nr); \
636 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
637 data->in_##reg[nr]); \
638 mutex_unlock(&data->update_lock); \
642 store_in_reg(MIN, min)
643 store_in_reg(MAX, max)
645 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
647 struct w83627ehf_data *data = w83627ehf_update_device(dev);
648 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
649 int nr = sensor_attr->index;
650 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
653 static struct sensor_device_attribute sda_in_input[] = {
654 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
655 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
656 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
657 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
658 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
659 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
660 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
661 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
662 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
663 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
666 static struct sensor_device_attribute sda_in_alarm[] = {
667 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
668 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
669 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
670 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
671 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
672 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
673 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
674 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
675 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
676 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
679 static struct sensor_device_attribute sda_in_min[] = {
680 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
681 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
682 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
683 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
684 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
685 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
686 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
687 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
688 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
689 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
692 static struct sensor_device_attribute sda_in_max[] = {
693 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
694 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
695 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
696 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
697 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
698 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
699 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
700 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
701 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
702 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
705 #define show_fan_reg(reg) \
707 show_##reg(struct device *dev, struct device_attribute *attr, \
710 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
711 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
712 int nr = sensor_attr->index; \
713 return sprintf(buf, "%d\n", \
714 fan_from_reg(data->reg[nr], \
715 div_from_reg(data->fan_div[nr]))); \
718 show_fan_reg(fan_min);
721 show_fan_div(struct device *dev, struct device_attribute *attr,
724 struct w83627ehf_data *data = w83627ehf_update_device(dev);
725 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
726 int nr = sensor_attr->index;
727 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
731 store_fan_min(struct device *dev, struct device_attribute *attr,
732 const char *buf, size_t count)
734 struct w83627ehf_data *data = dev_get_drvdata(dev);
735 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
736 int nr = sensor_attr->index;
737 unsigned int val = simple_strtoul(buf, NULL, 10);
741 mutex_lock(&data->update_lock);
743 /* No min limit, alarm disabled */
744 data->fan_min[nr] = 255;
745 new_div = data->fan_div[nr]; /* No change */
746 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
747 } else if ((reg = 1350000U / val) >= 128 * 255) {
748 /* Speed below this value cannot possibly be represented,
749 even with the highest divider (128) */
750 data->fan_min[nr] = 254;
751 new_div = 7; /* 128 == (1 << 7) */
752 dev_warn(dev, "fan%u low limit %u below minimum %u, set to "
753 "minimum\n", nr + 1, val, fan_from_reg(254, 128));
755 /* Speed above this value cannot possibly be represented,
756 even with the lowest divider (1) */
757 data->fan_min[nr] = 1;
758 new_div = 0; /* 1 == (1 << 0) */
759 dev_warn(dev, "fan%u low limit %u above maximum %u, set to "
760 "maximum\n", nr + 1, val, fan_from_reg(1, 1));
762 /* Automatically pick the best divider, i.e. the one such
763 that the min limit will correspond to a register value
764 in the 96..192 range */
766 while (reg > 192 && new_div < 7) {
770 data->fan_min[nr] = reg;
773 /* Write both the fan clock divider (if it changed) and the new
774 fan min (unconditionally) */
775 if (new_div != data->fan_div[nr]) {
776 /* Preserve the fan speed reading */
777 if (data->fan[nr] != 0xff) {
778 if (new_div > data->fan_div[nr])
779 data->fan[nr] >>= new_div - data->fan_div[nr];
780 else if (data->fan[nr] & 0x80)
781 data->fan[nr] = 0xff;
783 data->fan[nr] <<= data->fan_div[nr] - new_div;
786 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
787 nr + 1, div_from_reg(data->fan_div[nr]),
788 div_from_reg(new_div));
789 data->fan_div[nr] = new_div;
790 w83627ehf_write_fan_div(data, nr);
791 /* Give the chip time to sample a new speed value */
792 data->last_updated = jiffies;
794 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
796 mutex_unlock(&data->update_lock);
801 static struct sensor_device_attribute sda_fan_input[] = {
802 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
803 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
804 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
805 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
806 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
809 static struct sensor_device_attribute sda_fan_alarm[] = {
810 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
811 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
812 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
813 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
814 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
817 static struct sensor_device_attribute sda_fan_min[] = {
818 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
820 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
822 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
824 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
826 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
830 static struct sensor_device_attribute sda_fan_div[] = {
831 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
832 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
833 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
834 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
835 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
838 #define show_temp1_reg(reg) \
840 show_##reg(struct device *dev, struct device_attribute *attr, \
843 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
844 return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \
846 show_temp1_reg(temp1);
847 show_temp1_reg(temp1_max);
848 show_temp1_reg(temp1_max_hyst);
850 #define store_temp1_reg(REG, reg) \
852 store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
853 const char *buf, size_t count) \
855 struct w83627ehf_data *data = dev_get_drvdata(dev); \
856 long val = simple_strtol(buf, NULL, 10); \
858 mutex_lock(&data->update_lock); \
859 data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
860 w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
861 data->temp1_##reg); \
862 mutex_unlock(&data->update_lock); \
865 store_temp1_reg(OVER, max);
866 store_temp1_reg(HYST, max_hyst);
868 #define show_temp_reg(reg) \
870 show_##reg(struct device *dev, struct device_attribute *attr, \
873 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
874 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
875 int nr = sensor_attr->index; \
876 return sprintf(buf, "%d\n", \
877 LM75_TEMP_FROM_REG(data->reg[nr])); \
880 show_temp_reg(temp_max);
881 show_temp_reg(temp_max_hyst);
883 #define store_temp_reg(REG, reg) \
885 store_##reg(struct device *dev, struct device_attribute *attr, \
886 const char *buf, size_t count) \
888 struct w83627ehf_data *data = dev_get_drvdata(dev); \
889 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
890 int nr = sensor_attr->index; \
891 long val = simple_strtol(buf, NULL, 10); \
893 mutex_lock(&data->update_lock); \
894 data->reg[nr] = LM75_TEMP_TO_REG(val); \
895 w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
897 mutex_unlock(&data->update_lock); \
900 store_temp_reg(OVER, temp_max);
901 store_temp_reg(HYST, temp_max_hyst);
904 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
906 struct w83627ehf_data *data = w83627ehf_update_device(dev);
907 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
908 int nr = sensor_attr->index;
909 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
912 static struct sensor_device_attribute sda_temp_input[] = {
913 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
914 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
915 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1),
918 static struct sensor_device_attribute sda_temp_max[] = {
919 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max,
921 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
923 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
927 static struct sensor_device_attribute sda_temp_max_hyst[] = {
928 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst,
929 store_temp1_max_hyst, 0),
930 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
931 store_temp_max_hyst, 0),
932 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
933 store_temp_max_hyst, 1),
936 static struct sensor_device_attribute sda_temp_alarm[] = {
937 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
938 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
939 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
942 static struct sensor_device_attribute sda_temp_type[] = {
943 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
944 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
945 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
948 #define show_pwm_reg(reg) \
949 static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
952 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
953 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
954 int nr = sensor_attr->index; \
955 return sprintf(buf, "%d\n", data->reg[nr]); \
958 show_pwm_reg(pwm_mode)
959 show_pwm_reg(pwm_enable)
963 store_pwm_mode(struct device *dev, struct device_attribute *attr,
964 const char *buf, size_t count)
966 struct w83627ehf_data *data = dev_get_drvdata(dev);
967 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
968 int nr = sensor_attr->index;
969 u32 val = simple_strtoul(buf, NULL, 10);
974 mutex_lock(&data->update_lock);
975 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
976 data->pwm_mode[nr] = val;
977 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
979 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
980 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
981 mutex_unlock(&data->update_lock);
986 store_pwm(struct device *dev, struct device_attribute *attr,
987 const char *buf, size_t count)
989 struct w83627ehf_data *data = dev_get_drvdata(dev);
990 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
991 int nr = sensor_attr->index;
992 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);
994 mutex_lock(&data->update_lock);
996 w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
997 mutex_unlock(&data->update_lock);
1002 store_pwm_enable(struct device *dev, struct device_attribute *attr,
1003 const char *buf, size_t count)
1005 struct w83627ehf_data *data = dev_get_drvdata(dev);
1006 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1007 int nr = sensor_attr->index;
1008 u32 val = simple_strtoul(buf, NULL, 10);
1011 if (!val || (val > 4))
1013 mutex_lock(&data->update_lock);
1014 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
1015 data->pwm_enable[nr] = val;
1016 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
1017 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
1018 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
1019 mutex_unlock(&data->update_lock);
1024 #define show_tol_temp(reg) \
1025 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1028 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1029 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1030 int nr = sensor_attr->index; \
1031 return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \
1034 show_tol_temp(tolerance)
1035 show_tol_temp(target_temp)
1038 store_target_temp(struct device *dev, struct device_attribute *attr,
1039 const char *buf, size_t count)
1041 struct w83627ehf_data *data = dev_get_drvdata(dev);
1042 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1043 int nr = sensor_attr->index;
1044 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);
1046 mutex_lock(&data->update_lock);
1047 data->target_temp[nr] = val;
1048 w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
1049 mutex_unlock(&data->update_lock);
1054 store_tolerance(struct device *dev, struct device_attribute *attr,
1055 const char *buf, size_t count)
1057 struct w83627ehf_data *data = dev_get_drvdata(dev);
1058 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1059 int nr = sensor_attr->index;
1061 /* Limit the temp to 0C - 15C */
1062 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);
1064 mutex_lock(&data->update_lock);
1065 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1066 data->tolerance[nr] = val;
1068 reg = (reg & 0x0f) | (val << 4);
1070 reg = (reg & 0xf0) | val;
1071 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1072 mutex_unlock(&data->update_lock);
1076 static struct sensor_device_attribute sda_pwm[] = {
1077 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1078 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1079 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1080 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1083 static struct sensor_device_attribute sda_pwm_mode[] = {
1084 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1086 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1088 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1090 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1094 static struct sensor_device_attribute sda_pwm_enable[] = {
1095 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1096 store_pwm_enable, 0),
1097 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1098 store_pwm_enable, 1),
1099 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1100 store_pwm_enable, 2),
1101 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1102 store_pwm_enable, 3),
1105 static struct sensor_device_attribute sda_target_temp[] = {
1106 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1107 store_target_temp, 0),
1108 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1109 store_target_temp, 1),
1110 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1111 store_target_temp, 2),
1112 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1113 store_target_temp, 3),
1116 static struct sensor_device_attribute sda_tolerance[] = {
1117 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1118 store_tolerance, 0),
1119 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1120 store_tolerance, 1),
1121 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1122 store_tolerance, 2),
1123 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1124 store_tolerance, 3),
1127 /* Smart Fan registers */
1129 #define fan_functions(reg, REG) \
1130 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1133 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1134 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1135 int nr = sensor_attr->index; \
1136 return sprintf(buf, "%d\n", data->reg[nr]); \
1139 store_##reg(struct device *dev, struct device_attribute *attr, \
1140 const char *buf, size_t count) \
1142 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1143 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1144 int nr = sensor_attr->index; \
1145 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
1146 mutex_lock(&data->update_lock); \
1147 data->reg[nr] = val; \
1148 w83627ehf_write_value(data, data->REG_##REG[nr], val); \
1149 mutex_unlock(&data->update_lock); \
1153 fan_functions(fan_start_output, FAN_START_OUTPUT)
1154 fan_functions(fan_stop_output, FAN_STOP_OUTPUT)
1155 fan_functions(fan_max_output, FAN_MAX_OUTPUT)
1156 fan_functions(fan_step_output, FAN_STEP_OUTPUT)
1158 #define fan_time_functions(reg, REG) \
1159 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1162 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1163 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1164 int nr = sensor_attr->index; \
1165 return sprintf(buf, "%d\n", \
1166 step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \
1170 store_##reg(struct device *dev, struct device_attribute *attr, \
1171 const char *buf, size_t count) \
1173 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1174 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1175 int nr = sensor_attr->index; \
1176 u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
1177 data->pwm_mode[nr]); \
1178 mutex_lock(&data->update_lock); \
1179 data->reg[nr] = val; \
1180 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1181 mutex_unlock(&data->update_lock); \
1185 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1187 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1190 struct w83627ehf_data *data = dev_get_drvdata(dev);
1192 return sprintf(buf, "%s\n", data->name);
1194 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1196 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1197 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1198 store_fan_stop_time, 3),
1199 SENSOR_ATTR(pwm4_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1200 store_fan_start_output, 3),
1201 SENSOR_ATTR(pwm4_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1202 store_fan_stop_output, 3),
1203 SENSOR_ATTR(pwm4_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1204 store_fan_max_output, 3),
1205 SENSOR_ATTR(pwm4_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1206 store_fan_step_output, 3),
1209 static struct sensor_device_attribute sda_sf3_arrays[] = {
1210 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1211 store_fan_stop_time, 0),
1212 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1213 store_fan_stop_time, 1),
1214 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1215 store_fan_stop_time, 2),
1216 SENSOR_ATTR(pwm1_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1217 store_fan_start_output, 0),
1218 SENSOR_ATTR(pwm2_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1219 store_fan_start_output, 1),
1220 SENSOR_ATTR(pwm3_start_output, S_IWUSR | S_IRUGO, show_fan_start_output,
1221 store_fan_start_output, 2),
1222 SENSOR_ATTR(pwm1_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1223 store_fan_stop_output, 0),
1224 SENSOR_ATTR(pwm2_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1225 store_fan_stop_output, 1),
1226 SENSOR_ATTR(pwm3_stop_output, S_IWUSR | S_IRUGO, show_fan_stop_output,
1227 store_fan_stop_output, 2),
1232 * pwm1 and pwm3 don't support max and step settings on all chips.
1233 * Need to check support while generating/removing attribute files.
1235 static struct sensor_device_attribute sda_sf3_max_step_arrays[] = {
1236 SENSOR_ATTR(pwm1_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1237 store_fan_max_output, 0),
1238 SENSOR_ATTR(pwm1_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1239 store_fan_step_output, 0),
1240 SENSOR_ATTR(pwm2_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1241 store_fan_max_output, 1),
1242 SENSOR_ATTR(pwm2_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1243 store_fan_step_output, 1),
1244 SENSOR_ATTR(pwm3_max_output, S_IWUSR | S_IRUGO, show_fan_max_output,
1245 store_fan_max_output, 2),
1246 SENSOR_ATTR(pwm3_step_output, S_IWUSR | S_IRUGO, show_fan_step_output,
1247 store_fan_step_output, 2),
1251 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1253 struct w83627ehf_data *data = dev_get_drvdata(dev);
1254 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1256 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1259 * Driver and device management
1262 static void w83627ehf_device_remove_files(struct device *dev)
1264 /* some entries in the following arrays may not have been used in
1265 * device_create_file(), but device_remove_file() will ignore them */
1267 struct w83627ehf_data *data = dev_get_drvdata(dev);
1269 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1270 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1271 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1272 struct sensor_device_attribute *attr =
1273 &sda_sf3_max_step_arrays[i];
1274 if (data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff)
1275 device_remove_file(dev, &attr->dev_attr);
1277 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1278 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1279 for (i = 0; i < data->in_num; i++) {
1280 if ((i == 6) && data->in6_skip)
1282 device_remove_file(dev, &sda_in_input[i].dev_attr);
1283 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1284 device_remove_file(dev, &sda_in_min[i].dev_attr);
1285 device_remove_file(dev, &sda_in_max[i].dev_attr);
1287 for (i = 0; i < 5; i++) {
1288 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1289 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1290 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1291 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1293 for (i = 0; i < data->pwm_num; i++) {
1294 device_remove_file(dev, &sda_pwm[i].dev_attr);
1295 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1296 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1297 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1298 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1300 for (i = 0; i < 3; i++) {
1301 if ((i == 2) && data->temp3_disable)
1303 device_remove_file(dev, &sda_temp_input[i].dev_attr);
1304 device_remove_file(dev, &sda_temp_max[i].dev_attr);
1305 device_remove_file(dev, &sda_temp_max_hyst[i].dev_attr);
1306 device_remove_file(dev, &sda_temp_alarm[i].dev_attr);
1307 device_remove_file(dev, &sda_temp_type[i].dev_attr);
1310 device_remove_file(dev, &dev_attr_name);
1311 device_remove_file(dev, &dev_attr_cpu0_vid);
1314 /* Get the monitoring functions started */
1315 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1320 /* Start monitoring is needed */
1321 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1323 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1326 /* Enable temp2 and temp3 if needed */
1327 for (i = 0; i < 2; i++) {
1328 tmp = w83627ehf_read_value(data,
1329 W83627EHF_REG_TEMP_CONFIG[i]);
1330 if ((i == 1) && data->temp3_disable)
1333 w83627ehf_write_value(data,
1334 W83627EHF_REG_TEMP_CONFIG[i],
1338 /* Enable VBAT monitoring if needed */
1339 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1341 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1343 /* Get thermal sensor types */
1344 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1345 for (i = 0; i < 3; i++) {
1346 if ((tmp & (0x02 << i)))
1347 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 2;
1349 data->temp_type[i] = 4; /* thermistor */
1353 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1355 struct device *dev = &pdev->dev;
1356 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1357 struct w83627ehf_data *data;
1358 struct resource *res;
1359 u8 fan4pin, fan5pin, en_vrm10;
1362 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1363 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1365 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1366 (unsigned long)res->start,
1367 (unsigned long)res->start + IOREGION_LENGTH - 1);
1371 if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) {
1376 data->addr = res->start;
1377 mutex_init(&data->lock);
1378 mutex_init(&data->update_lock);
1379 data->name = w83627ehf_device_names[sio_data->kind];
1380 platform_set_drvdata(pdev, data);
1382 /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */
1383 data->in_num = (sio_data->kind == w83627ehf) ? 10 : 9;
1384 /* 667HG has 3 pwms */
1385 data->pwm_num = (sio_data->kind == w83667hg) ? 3 : 4;
1387 /* Check temp3 configuration bit for 667HG */
1388 if (sio_data->kind == w83667hg) {
1389 data->temp3_disable = w83627ehf_read_value(data,
1390 W83627EHF_REG_TEMP_CONFIG[1]) & 0x01;
1391 data->in6_skip = !data->temp3_disable;
1394 data->REG_FAN_START_OUTPUT = W83627EHF_REG_FAN_START_OUTPUT;
1395 data->REG_FAN_STOP_OUTPUT = W83627EHF_REG_FAN_STOP_OUTPUT;
1396 data->REG_FAN_MAX_OUTPUT = W83627EHF_REG_FAN_MAX_OUTPUT;
1397 data->REG_FAN_STEP_OUTPUT = W83627EHF_REG_FAN_STEP_OUTPUT;
1399 /* Initialize the chip */
1400 w83627ehf_init_device(data);
1402 data->vrm = vid_which_vrm();
1403 superio_enter(sio_data->sioreg);
1404 /* Read VID value */
1405 if (sio_data->kind == w83667hg) {
1406 /* W83667HG has different pins for VID input and output, so
1407 we can get the VID input values directly at logical device D
1409 superio_select(sio_data->sioreg, W83667HG_LD_VID);
1410 data->vid = superio_inb(sio_data->sioreg, 0xe3);
1411 err = device_create_file(dev, &dev_attr_cpu0_vid);
1415 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1416 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
1417 /* Set VID input sensibility if needed. In theory the
1418 BIOS should have set it, but in practice it's not
1419 always the case. We only do it for the W83627EHF/EHG
1420 because the W83627DHG is more complex in this
1422 if (sio_data->kind == w83627ehf) {
1423 en_vrm10 = superio_inb(sio_data->sioreg,
1425 if ((en_vrm10 & 0x08) && data->vrm == 90) {
1426 dev_warn(dev, "Setting VID input "
1427 "voltage to TTL\n");
1428 superio_outb(sio_data->sioreg,
1431 } else if (!(en_vrm10 & 0x08)
1432 && data->vrm == 100) {
1433 dev_warn(dev, "Setting VID input "
1434 "voltage to VRM10\n");
1435 superio_outb(sio_data->sioreg,
1441 data->vid = superio_inb(sio_data->sioreg,
1443 if (sio_data->kind == w83627ehf) /* 6 VID pins only */
1446 err = device_create_file(dev, &dev_attr_cpu0_vid);
1450 dev_info(dev, "VID pins in output mode, CPU VID not "
1455 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1456 if (sio_data->kind == w83667hg) {
1457 fan5pin = superio_inb(sio_data->sioreg, 0x27) & 0x20;
1458 fan4pin = superio_inb(sio_data->sioreg, 0x27) & 0x40;
1460 fan5pin = !(superio_inb(sio_data->sioreg, 0x24) & 0x02);
1461 fan4pin = !(superio_inb(sio_data->sioreg, 0x29) & 0x06);
1463 superio_exit(sio_data->sioreg);
1465 /* It looks like fan4 and fan5 pins can be alternatively used
1466 as fan on/off switches, but fan5 control is write only :/
1467 We assume that if the serial interface is disabled, designers
1468 connected fan5 as input unless they are emitting log 1, which
1469 is not the default. */
1471 data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1472 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1473 if ((i & (1 << 2)) && fan4pin)
1474 data->has_fan |= (1 << 3);
1475 if (!(i & (1 << 1)) && fan5pin)
1476 data->has_fan |= (1 << 4);
1478 /* Read fan clock dividers immediately */
1479 w83627ehf_update_fan_div(data);
1481 /* Register sysfs hooks */
1482 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1483 if ((err = device_create_file(dev,
1484 &sda_sf3_arrays[i].dev_attr)))
1487 for (i = 0; i < ARRAY_SIZE(sda_sf3_max_step_arrays); i++) {
1488 struct sensor_device_attribute *attr =
1489 &sda_sf3_max_step_arrays[i];
1490 if (data->REG_FAN_STEP_OUTPUT[attr->index] != 0xff) {
1491 err = device_create_file(dev, &attr->dev_attr);
1496 /* if fan4 is enabled create the sf3 files for it */
1497 if ((data->has_fan & (1 << 3)) && data->pwm_num >= 4)
1498 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
1499 if ((err = device_create_file(dev,
1500 &sda_sf3_arrays_fan4[i].dev_attr)))
1504 for (i = 0; i < data->in_num; i++) {
1505 if ((i == 6) && data->in6_skip)
1507 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
1508 || (err = device_create_file(dev,
1509 &sda_in_alarm[i].dev_attr))
1510 || (err = device_create_file(dev,
1511 &sda_in_min[i].dev_attr))
1512 || (err = device_create_file(dev,
1513 &sda_in_max[i].dev_attr)))
1517 for (i = 0; i < 5; i++) {
1518 if (data->has_fan & (1 << i)) {
1519 if ((err = device_create_file(dev,
1520 &sda_fan_input[i].dev_attr))
1521 || (err = device_create_file(dev,
1522 &sda_fan_alarm[i].dev_attr))
1523 || (err = device_create_file(dev,
1524 &sda_fan_div[i].dev_attr))
1525 || (err = device_create_file(dev,
1526 &sda_fan_min[i].dev_attr)))
1528 if (i < data->pwm_num &&
1529 ((err = device_create_file(dev,
1530 &sda_pwm[i].dev_attr))
1531 || (err = device_create_file(dev,
1532 &sda_pwm_mode[i].dev_attr))
1533 || (err = device_create_file(dev,
1534 &sda_pwm_enable[i].dev_attr))
1535 || (err = device_create_file(dev,
1536 &sda_target_temp[i].dev_attr))
1537 || (err = device_create_file(dev,
1538 &sda_tolerance[i].dev_attr))))
1543 for (i = 0; i < 3; i++) {
1544 if ((i == 2) && data->temp3_disable)
1546 if ((err = device_create_file(dev,
1547 &sda_temp_input[i].dev_attr))
1548 || (err = device_create_file(dev,
1549 &sda_temp_max[i].dev_attr))
1550 || (err = device_create_file(dev,
1551 &sda_temp_max_hyst[i].dev_attr))
1552 || (err = device_create_file(dev,
1553 &sda_temp_alarm[i].dev_attr))
1554 || (err = device_create_file(dev,
1555 &sda_temp_type[i].dev_attr)))
1559 err = device_create_file(dev, &dev_attr_name);
1563 data->hwmon_dev = hwmon_device_register(dev);
1564 if (IS_ERR(data->hwmon_dev)) {
1565 err = PTR_ERR(data->hwmon_dev);
1572 w83627ehf_device_remove_files(dev);
1574 platform_set_drvdata(pdev, NULL);
1576 release_region(res->start, IOREGION_LENGTH);
1581 static int __devexit w83627ehf_remove(struct platform_device *pdev)
1583 struct w83627ehf_data *data = platform_get_drvdata(pdev);
1585 hwmon_device_unregister(data->hwmon_dev);
1586 w83627ehf_device_remove_files(&pdev->dev);
1587 release_region(data->addr, IOREGION_LENGTH);
1588 platform_set_drvdata(pdev, NULL);
1594 static struct platform_driver w83627ehf_driver = {
1596 .owner = THIS_MODULE,
1599 .probe = w83627ehf_probe,
1600 .remove = __devexit_p(w83627ehf_remove),
1603 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
1604 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
1605 struct w83627ehf_sio_data *sio_data)
1607 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
1608 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
1609 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
1610 static const char __initdata sio_name_W83627DHG_P[] = "W83627DHG-P";
1611 static const char __initdata sio_name_W83667HG[] = "W83667HG";
1614 const char *sio_name;
1616 superio_enter(sioaddr);
1621 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1622 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1623 switch (val & SIO_ID_MASK) {
1624 case SIO_W83627EHF_ID:
1625 sio_data->kind = w83627ehf;
1626 sio_name = sio_name_W83627EHF;
1628 case SIO_W83627EHG_ID:
1629 sio_data->kind = w83627ehf;
1630 sio_name = sio_name_W83627EHG;
1632 case SIO_W83627DHG_ID:
1633 sio_data->kind = w83627dhg;
1634 sio_name = sio_name_W83627DHG;
1636 case SIO_W83627DHG_P_ID:
1637 sio_data->kind = w83627dhg_p;
1638 sio_name = sio_name_W83627DHG_P;
1640 case SIO_W83667HG_ID:
1641 sio_data->kind = w83667hg;
1642 sio_name = sio_name_W83667HG;
1646 pr_debug(DRVNAME ": unsupported chip ID: 0x%04x\n",
1648 superio_exit(sioaddr);
1652 /* We have a known chip, find the HWM I/O address */
1653 superio_select(sioaddr, W83627EHF_LD_HWM);
1654 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1655 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1656 *addr = val & IOREGION_ALIGNMENT;
1658 printk(KERN_ERR DRVNAME ": Refusing to enable a Super-I/O "
1659 "device with a base I/O port 0.\n");
1660 superio_exit(sioaddr);
1664 /* Activate logical device if needed */
1665 val = superio_inb(sioaddr, SIO_REG_ENABLE);
1666 if (!(val & 0x01)) {
1667 printk(KERN_WARNING DRVNAME ": Forcibly enabling Super-I/O. "
1668 "Sensor is probably unusable.\n");
1669 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1672 superio_exit(sioaddr);
1673 pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr);
1674 sio_data->sioreg = sioaddr;
1679 /* when Super-I/O functions move to a separate file, the Super-I/O
1680 * bus will manage the lifetime of the device and this module will only keep
1681 * track of the w83627ehf driver. But since we platform_device_alloc(), we
1682 * must keep track of the device */
1683 static struct platform_device *pdev;
1685 static int __init sensors_w83627ehf_init(void)
1688 unsigned short address;
1689 struct resource res;
1690 struct w83627ehf_sio_data sio_data;
1692 /* initialize sio_data->kind and sio_data->sioreg.
1694 * when Super-I/O functions move to a separate file, the Super-I/O
1695 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1696 * w83627ehf hardware monitor, and call probe() */
1697 if (w83627ehf_find(0x2e, &address, &sio_data) &&
1698 w83627ehf_find(0x4e, &address, &sio_data))
1701 err = platform_driver_register(&w83627ehf_driver);
1705 if (!(pdev = platform_device_alloc(DRVNAME, address))) {
1707 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1708 goto exit_unregister;
1711 err = platform_device_add_data(pdev, &sio_data,
1712 sizeof(struct w83627ehf_sio_data));
1714 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1715 goto exit_device_put;
1718 memset(&res, 0, sizeof(res));
1720 res.start = address + IOREGION_OFFSET;
1721 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1722 res.flags = IORESOURCE_IO;
1724 err = acpi_check_resource_conflict(&res);
1726 goto exit_device_put;
1728 err = platform_device_add_resources(pdev, &res, 1);
1730 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1732 goto exit_device_put;
1735 /* platform_device_add calls probe() */
1736 err = platform_device_add(pdev);
1738 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1740 goto exit_device_put;
1746 platform_device_put(pdev);
1748 platform_driver_unregister(&w83627ehf_driver);
1753 static void __exit sensors_w83627ehf_exit(void)
1755 platform_device_unregister(pdev);
1756 platform_driver_unregister(&w83627ehf_driver);
1759 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
1760 MODULE_DESCRIPTION("W83627EHF driver");
1761 MODULE_LICENSE("GPL");
1763 module_init(sensors_w83627ehf_init);
1764 module_exit(sensors_w83627ehf_exit);