jme.c

   1 /*
   2  * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
   3  *
   4  * Copyright 2008 JMicron Technology Corporation
   5  * http://www.jmicron.com/
   6  * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org>
   7  *
   8  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  */
  24
  25 #include <linux/version.h>
  26 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
  27 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  28 #endif
  29
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/pci.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/etherdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/mii.h>
  37 #include <linux/crc32.h>
  38 #include <linux/delay.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/in.h>
  41 #include <linux/ip.h>
  42 #include <linux/ipv6.h>
  43 #include <linux/tcp.h>
  44 #include <linux/udp.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/slab.h>
  47 #include <net/ip6_checksum.h>
  48 #include "jme.h"
  49
  50 static int force_pseudohp = -1;
  51 static int no_pseudohp = -1;
  52 static int no_extplug = -1;
  53 static int delay_time = 11;
  54 module_param(force_pseudohp, int, 0);
  55 MODULE_PARM_DESC(force_pseudohp,
  56         "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
  57 module_param(no_pseudohp, int, 0);
  58 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
  59 module_param(no_extplug, int, 0);
  60 MODULE_PARM_DESC(no_extplug,
  61         "Do not use external plug signal for pseudo hot-plug.");
  62 module_param(delay_time, uint, 0);
  63 MODULE_PARM_DESC(delay_time,
  64         "Seconds to delay before switching lower speed; default = 11 seconds(3 trials)");
  65
  66 static int
  67 jme_mdio_read(struct net_device *netdev, int phy, int reg)
  68 {
  69         struct jme_adapter *jme = netdev_priv(netdev);
  70         int i, val, again = (reg == MII_BMSR) ? 1 : 0;
  71
  72 read_again:
  73         jwrite32(jme, JME_SMI, SMI_OP_REQ |
  74                                 smi_phy_addr(phy) |
  75                                 smi_reg_addr(reg));
  76
  77         wmb();
  78         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
  79                 udelay(20);
  80                 val = jread32(jme, JME_SMI);
  81                 if ((val & SMI_OP_REQ) == 0)
  82                         break;
  83         }
  84
  85         if (i == 0) {
  86                 pr_err("phy(%d) read timeout : %d\n", phy, reg);
  87                 return 0;
  88         }
  89
  90         if (again--)
  91                 goto read_again;
  92
  93         return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
  94 }
  95
  96 static void
  97 jme_mdio_write(struct net_device *netdev,
  98                                 int phy, int reg, int val)
  99 {
 100         struct jme_adapter *jme = netdev_priv(netdev);
 101         int i;
 102
 103         jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
 104                 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
 105                 smi_phy_addr(phy) | smi_reg_addr(reg));
 106
 107         wmb();
 108         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
 109                 udelay(20);
 110                 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
 111                         break;
 112         }
 113
 114         if (i == 0)
 115                 pr_err("phy(%d) write timeout : %d\n", phy, reg);
 116 }
 117
 118 static inline void
 119 jme_reset_phy_processor(struct jme_adapter *jme)
 120 {
 121         u32 val;
 122
 123         jme_mdio_write(jme->dev,
 124                         jme->mii_if.phy_id,
 125                         MII_ADVERTISE, ADVERTISE_ALL |
 126                         ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 127
 128         if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
 129                 jme_mdio_write(jme->dev,
 130                                 jme->mii_if.phy_id,
 131                                 MII_CTRL1000,
 132                                 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 133
 134         val = jme_mdio_read(jme->dev,
 135                                 jme->mii_if.phy_id,
 136                                 MII_BMCR);
 137
 138         jme_mdio_write(jme->dev,
 139                         jme->mii_if.phy_id,
 140                         MII_BMCR, val | BMCR_RESET);
 141 }
 142
 143 static void
 144 jme_setup_wakeup_frame(struct jme_adapter *jme,
 145                        const u32 *mask, u32 crc, int fnr)
 146 {
 147         int i;
 148
 149         /*
 150          * Setup CRC pattern
 151          */
 152         jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
 153         wmb();
 154         jwrite32(jme, JME_WFODP, crc);
 155         wmb();
 156
 157         /*
 158          * Setup Mask
 159          */
 160         for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
 161                 jwrite32(jme, JME_WFOI,
 162                                 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
 163                                 (fnr & WFOI_FRAME_SEL));
 164                 wmb();
 165                 jwrite32(jme, JME_WFODP, mask[i]);
 166                 wmb();
 167         }
 168 }
 169
 170 static inline void
 171 jme_mac_rxclk_off(struct jme_adapter *jme)
 172 {
 173         jme->reg_gpreg1 |= GPREG1_RXCLKOFF;
 174         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 175 }
 176
 177 static inline void
 178 jme_mac_rxclk_on(struct jme_adapter *jme)
 179 {
 180         jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF;
 181         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 182 }
 183
 184 static inline void
 185 jme_mac_txclk_off(struct jme_adapter *jme)
 186 {
 187         jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC);
 188         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 189 }
 190
 191 static inline void
 192 jme_mac_txclk_on(struct jme_adapter *jme)
 193 {
 194         u32 speed = jme->reg_ghc & GHC_SPEED;
 195         if (speed == GHC_SPEED_1000M)
 196                 jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
 197         else
 198                 jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
 199         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 200 }
 201
 202 static inline void
 203 jme_reset_ghc_speed(struct jme_adapter *jme)
 204 {
 205         jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX);
 206         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 207 }
 208
 209 static inline void
 210 jme_reset_250A2_workaround(struct jme_adapter *jme)
 211 {
 212         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 213                              GPREG1_RSSPATCH);
 214         jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 215 }
 216
 217 static inline void
 218 jme_assert_ghc_reset(struct jme_adapter *jme)
 219 {
 220         jme->reg_ghc |= GHC_SWRST;
 221         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 222 }
 223
 224 static inline void
 225 jme_clear_ghc_reset(struct jme_adapter *jme)
 226 {
 227         jme->reg_ghc &= ~GHC_SWRST;
 228         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 229 }
 230
 231 static inline void
 232 jme_reset_mac_processor(struct jme_adapter *jme)
 233 {
 234         static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
 235         u32 crc = 0xCDCDCDCD;
 236         u32 gpreg0;
 237         int i;
 238
 239         jme_reset_ghc_speed(jme);
 240         jme_reset_250A2_workaround(jme);
 241
 242         jme_mac_rxclk_on(jme);
 243         jme_mac_txclk_on(jme);
 244         udelay(1);
 245         jme_assert_ghc_reset(jme);
 246         udelay(1);
 247         jme_mac_rxclk_off(jme);
 248         jme_mac_txclk_off(jme);
 249         udelay(1);
 250         jme_clear_ghc_reset(jme);
 251         udelay(1);
 252         jme_mac_rxclk_on(jme);
 253         jme_mac_txclk_on(jme);
 254         udelay(1);
 255         jme_mac_rxclk_off(jme);
 256         jme_mac_txclk_off(jme);
 257
 258         jwrite32(jme, JME_RXDBA_LO, 0x00000000);
 259         jwrite32(jme, JME_RXDBA_HI, 0x00000000);
 260         jwrite32(jme, JME_RXQDC, 0x00000000);
 261         jwrite32(jme, JME_RXNDA, 0x00000000);
 262         jwrite32(jme, JME_TXDBA_LO, 0x00000000);
 263         jwrite32(jme, JME_TXDBA_HI, 0x00000000);
 264         jwrite32(jme, JME_TXQDC, 0x00000000);
 265         jwrite32(jme, JME_TXNDA, 0x00000000);
 266
 267         jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
 268         jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
 269         for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
 270                 jme_setup_wakeup_frame(jme, mask, crc, i);
 271         if (jme->fpgaver)
 272                 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
 273         else
 274                 gpreg0 = GPREG0_DEFAULT;
 275         jwrite32(jme, JME_GPREG0, gpreg0);
 276 }
 277
 278 static inline void
 279 jme_clear_pm(struct jme_adapter *jme)
 280 {
 281         jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
 282         pci_set_power_state(jme->pdev, PCI_D0);
 283         pci_enable_wake(jme->pdev, PCI_D0, false);
 284 }
 285
 286 static int
 287 jme_reload_eeprom(struct jme_adapter *jme)
 288 {
 289         u32 val;
 290         int i;
 291
 292         val = jread32(jme, JME_SMBCSR);
 293
 294         if (val & SMBCSR_EEPROMD) {
 295                 val |= SMBCSR_CNACK;
 296                 jwrite32(jme, JME_SMBCSR, val);
 297                 val |= SMBCSR_RELOAD;
 298                 jwrite32(jme, JME_SMBCSR, val);
 299                 mdelay(12);
 300
 301                 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
 302                         mdelay(1);
 303                         if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
 304                                 break;
 305                 }
 306
 307                 if (i == 0) {
 308                         pr_err("eeprom reload timeout\n");
 309                         return -EIO;
 310                 }
 311         }
 312
 313         return 0;
 314 }
 315
 316 static void
 317 jme_load_macaddr(struct net_device *netdev)
 318 {
 319         struct jme_adapter *jme = netdev_priv(netdev);
 320         unsigned char macaddr[6];
 321         u32 val;
 322
 323         spin_lock_bh(&jme->macaddr_lock);
 324         val = jread32(jme, JME_RXUMA_LO);
 325         macaddr[0] = (val >>  0) & 0xFF;
 326         macaddr[1] = (val >>  8) & 0xFF;
 327         macaddr[2] = (val >> 16) & 0xFF;
 328         macaddr[3] = (val >> 24) & 0xFF;
 329         val = jread32(jme, JME_RXUMA_HI);
 330         macaddr[4] = (val >>  0) & 0xFF;
 331         macaddr[5] = (val >>  8) & 0xFF;
 332         memcpy(netdev->dev_addr, macaddr, 6);
 333         spin_unlock_bh(&jme->macaddr_lock);
 334 }
 335
 336 static inline void
 337 jme_set_rx_pcc(struct jme_adapter *jme, int p)
 338 {
 339         switch (p) {
 340         case PCC_OFF:
 341                 jwrite32(jme, JME_PCCRX0,
 342                         ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 343                         ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 344                 break;
 345         case PCC_P1:
 346                 jwrite32(jme, JME_PCCRX0,
 347                         ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 348                         ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 349                 break;
 350         case PCC_P2:
 351                 jwrite32(jme, JME_PCCRX0,
 352                         ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 353                         ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 354                 break;
 355         case PCC_P3:
 356                 jwrite32(jme, JME_PCCRX0,
 357                         ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 358                         ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 359                 break;
 360         default:
 361                 break;
 362         }
 363         wmb();
 364
 365         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
 366                 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
 367 }
 368
 369 static void
 370 jme_start_irq(struct jme_adapter *jme)
 371 {
 372         register struct dynpcc_info *dpi = &(jme->dpi);
 373
 374         jme_set_rx_pcc(jme, PCC_P1);
 375         dpi->cur                = PCC_P1;
 376         dpi->attempt            = PCC_P1;
 377         dpi->cnt                = 0;
 378
 379         jwrite32(jme, JME_PCCTX,
 380                         ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
 381                         ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
 382                         PCCTXQ0_EN
 383                 );
 384
 385         /*
 386          * Enable Interrupts
 387          */
 388         jwrite32(jme, JME_IENS, INTR_ENABLE);
 389 }
 390
 391 static inline void
 392 jme_stop_irq(struct jme_adapter *jme)
 393 {
 394         /*
 395          * Disable Interrupts
 396          */
 397         jwrite32f(jme, JME_IENC, INTR_ENABLE);
 398 }
 399
 400 static u32
 401 jme_linkstat_from_phy(struct jme_adapter *jme)
 402 {
 403         u32 phylink, bmsr;
 404
 405         phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
 406         bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
 407         if (bmsr & BMSR_ANCOMP)
 408                 phylink |= PHY_LINK_AUTONEG_COMPLETE;
 409
 410         return phylink;
 411 }
 412
 413 /*      setting as RMII mode ??*/
 414 static inline void
 415 jme_set_phyfifo_5level(struct jme_adapter *jme)
 416 {
 417         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
 418 }
 419
 420 /*      setting MII     mode    ??*/
 421 static inline void
 422 jme_set_phyfifo_8level(struct jme_adapter *jme)
 423 {
 424         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
 425 }
 426
 427 static int
 428 jme_check_link(struct net_device *netdev, int testonly)
 429 {
 430         struct jme_adapter *jme = netdev_priv(netdev);
 431         u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr;
 432         char linkmsg[64];
 433         int rc = 0;
 434
 435         linkmsg[0] = '\0';
 436
 437         if (jme->fpgaver)
 438                 phylink = jme_linkstat_from_phy(jme);
 439         else
 440                 phylink = jread32(jme, JME_PHY_LINK);
 441
 442         if (phylink & PHY_LINK_UP) {
 443                 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
 444                         /*
 445                          * If we did not enable AN
 446                          * Speed/Duplex Info should be obtained from SMI
 447                          */
 448                         phylink = PHY_LINK_UP;
 449
 450                         bmcr = jme_mdio_read(jme->dev,
 451                                                 jme->mii_if.phy_id,
 452                                                 MII_BMCR);
 453
 454                         phylink |= ((bmcr & BMCR_SPEED1000) &&
 455                                         (bmcr & BMCR_SPEED100) == 0) ?
 456                                         PHY_LINK_SPEED_1000M :
 457                                         (bmcr & BMCR_SPEED100) ?
 458                                         PHY_LINK_SPEED_100M :
 459                                         PHY_LINK_SPEED_10M;
 460
 461                         phylink |= (bmcr & BMCR_FULLDPLX) ?
 462                                          PHY_LINK_DUPLEX : 0;
 463
 464                         strcat(linkmsg, "Forced: ");
 465                 } else {
 466                         /*
 467                          * Keep polling for speed/duplex resolve complete
 468                          */
 469                         while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
 470                                 --cnt) {
 471
 472                                 udelay(1);
 473
 474                                 if (jme->fpgaver)
 475                                         phylink = jme_linkstat_from_phy(jme);
 476                                 else
 477                                         phylink = jread32(jme, JME_PHY_LINK);
 478                         }
 479                         if (!cnt)
 480                                 pr_err("Waiting speed resolve timeout\n");
 481
 482                         strcat(linkmsg, "ANed: ");
 483                 }
 484
 485                 if (jme->phylink == phylink) {
 486                         rc = 1;
 487                         goto out;
 488                 }
 489                 if (testonly)
 490                         goto out;
 491
 492                 jme->phylink = phylink;
 493
 494                 /*
 495                  * The speed/duplex setting of jme->reg_ghc already cleared
 496                  * by jme_reset_mac_processor()
 497                  */
 498                 switch (phylink & PHY_LINK_SPEED_MASK) {
 499                 case PHY_LINK_SPEED_10M:
 500                         jme->reg_ghc |= GHC_SPEED_10M;
 501                         strcat(linkmsg, "10 Mbps, ");
 502                         break;
 503                 case PHY_LINK_SPEED_100M:
 504                         jme->reg_ghc |= GHC_SPEED_100M;
 505                         strcat(linkmsg, "100 Mbps, ");
 506                         break;
 507                 case PHY_LINK_SPEED_1000M:
 508                         jme->reg_ghc |= GHC_SPEED_1000M;
 509                         strcat(linkmsg, "1000 Mbps, ");
 510                         break;
 511                 default:
 512                         break;
 513                 }
 514
 515                 if (phylink & PHY_LINK_DUPLEX) {
 516                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
 517                         jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX);
 518                         jme->reg_ghc |= GHC_DPX;
 519                 } else {
 520                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
 521                                                 TXMCS_BACKOFF |
 522                                                 TXMCS_CARRIERSENSE |
 523                                                 TXMCS_COLLISION);
 524                         jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX);
 525                 }
 526
 527                 jwrite32(jme, JME_GHC, jme->reg_ghc);
 528
 529                 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
 530                         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 531                                              GPREG1_RSSPATCH);
 532                         if (!(phylink & PHY_LINK_DUPLEX))
 533                                 jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH;
 534                         switch (phylink & PHY_LINK_SPEED_MASK) {
 535                         case PHY_LINK_SPEED_10M:
 536                                 jme_set_phyfifo_8level(jme);
 537                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 538                                 break;
 539                         case PHY_LINK_SPEED_100M:
 540                                 jme_set_phyfifo_5level(jme);
 541                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 542                                 break;
 543                         case PHY_LINK_SPEED_1000M:
 544                                 jme_set_phyfifo_8level(jme);
 545                                 break;
 546                         default:
 547                                 break;
 548                         }
 549                 }
 550                 jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 551
 552                 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
 553                                         "Full-Duplex, " :
 554                                         "Half-Duplex, ");
 555                 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
 556                                         "MDI-X" :
 557                                         "MDI");
 558                 netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg);
 559                 netif_carrier_on(netdev);
 560         } else {
 561                 if (testonly)
 562                         goto out;
 563
 564                 netif_info(jme, link, jme->dev, "Link is down\n");
 565                 jme->phylink = 0;
 566                 netif_carrier_off(netdev);
 567         }
 568
 569 out:
 570         return rc;
 571 }
 572
 573 static int
 574 jme_setup_tx_resources(struct jme_adapter *jme)
 575 {
 576         struct jme_ring *txring = &(jme->txring[0]);
 577
 578         txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 579                                    TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 580                                    &(txring->dmaalloc),
 581                                    GFP_ATOMIC);
 582
 583         if (!txring->alloc)
 584                 goto err_set_null;
 585
 586         /*
 587          * 16 Bytes align
 588          */
 589         txring->desc            = (void *)ALIGN((unsigned long)(txring->alloc),
 590                                                 RING_DESC_ALIGN);
 591         txring->dma             = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
 592         txring->next_to_use     = 0;
 593         atomic_set(&txring->next_to_clean, 0);
 594         atomic_set(&txring->nr_free, jme->tx_ring_size);
 595
 596         txring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 597                                         jme->tx_ring_size, GFP_ATOMIC);
 598         if (unlikely(!(txring->bufinf)))
 599                 goto err_free_txring;
 600
 601         /*
 602          * Initialize Transmit Descriptors
 603          */
 604         memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
 605         memset(txring->bufinf, 0,
 606                 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
 607
 608         return 0;
 609
 610 err_free_txring:
 611         dma_free_coherent(&(jme->pdev->dev),
 612                           TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 613                           txring->alloc,
 614                           txring->dmaalloc);
 615
 616 err_set_null:
 617         txring->desc = NULL;
 618         txring->dmaalloc = 0;
 619         txring->dma = 0;
 620         txring->bufinf = NULL;
 621
 622         return -ENOMEM;
 623 }
 624
 625 static void
 626 jme_free_tx_resources(struct jme_adapter *jme)
 627 {
 628         int i;
 629         struct jme_ring *txring = &(jme->txring[0]);
 630         struct jme_buffer_info *txbi;
 631
 632         if (txring->alloc) {
 633                 if (txring->bufinf) {
 634                         for (i = 0 ; i < jme->tx_ring_size ; ++i) {
 635                                 txbi = txring->bufinf + i;
 636                                 if (txbi->skb) {
 637                                         dev_kfree_skb(txbi->skb);
 638                                         txbi->skb = NULL;
 639                                 }
 640                                 txbi->mapping           = 0;
 641                                 txbi->len               = 0;
 642                                 txbi->nr_desc           = 0;
 643                                 txbi->start_xmit        = 0;
 644                         }
 645                         kfree(txring->bufinf);
 646                 }
 647
 648                 dma_free_coherent(&(jme->pdev->dev),
 649                                   TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 650                                   txring->alloc,
 651                                   txring->dmaalloc);
 652
 653                 txring->alloc           = NULL;
 654                 txring->desc            = NULL;
 655                 txring->dmaalloc        = 0;
 656                 txring->dma             = 0;
 657                 txring->bufinf          = NULL;
 658         }
 659         txring->next_to_use     = 0;
 660         atomic_set(&txring->next_to_clean, 0);
 661         atomic_set(&txring->nr_free, 0);
 662 }
 663
 664 static inline void
 665 jme_enable_tx_engine(struct jme_adapter *jme)
 666 {
 667         /*
 668          * Select Queue 0
 669          */
 670         jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
 671         wmb();
 672
 673         /*
 674          * Setup TX Queue 0 DMA Bass Address
 675          */
 676         jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 677         jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
 678         jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 679
 680         /*
 681          * Setup TX Descptor Count
 682          */
 683         jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
 684
 685         /*
 686          * Enable TX Engine
 687          */
 688         wmb();
 689         jwrite32f(jme, JME_TXCS, jme->reg_txcs |
 690                                 TXCS_SELECT_QUEUE0 |
 691                                 TXCS_ENABLE);
 692
 693         /*
 694          * Start clock for TX MAC Processor
 695          */
 696         jme_mac_txclk_on(jme);
 697 }
 698
 699 static inline void
 700 jme_restart_tx_engine(struct jme_adapter *jme)
 701 {
 702         /*
 703          * Restart TX Engine
 704          */
 705         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 706                                 TXCS_SELECT_QUEUE0 |
 707                                 TXCS_ENABLE);
 708 }
 709
 710 static inline void
 711 jme_disable_tx_engine(struct jme_adapter *jme)
 712 {
 713         int i;
 714         u32 val;
 715
 716         /*
 717          * Disable TX Engine
 718          */
 719         jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
 720         wmb();
 721
 722         val = jread32(jme, JME_TXCS);
 723         for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
 724                 mdelay(1);
 725                 val = jread32(jme, JME_TXCS);
 726                 rmb();
 727         }
 728
 729         if (!i)
 730                 pr_err("Disable TX engine timeout\n");
 731
 732         /*
 733          * Stop clock for TX MAC Processor
 734          */
 735         jme_mac_txclk_off(jme);
 736 }
 737
 738 static void
 739 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
 740 {
 741         struct jme_ring *rxring = &(jme->rxring[0]);
 742         register struct rxdesc *rxdesc = rxring->desc;
 743         struct jme_buffer_info *rxbi = rxring->bufinf;
 744         rxdesc += i;
 745         rxbi += i;
 746
 747         rxdesc->dw[0] = 0;
 748         rxdesc->dw[1] = 0;
 749         rxdesc->desc1.bufaddrh  = cpu_to_le32((__u64)rxbi->mapping >> 32);
 750         rxdesc->desc1.bufaddrl  = cpu_to_le32(
 751                                         (__u64)rxbi->mapping & 0xFFFFFFFFUL);
 752         rxdesc->desc1.datalen   = cpu_to_le16(rxbi->len);
 753         if (jme->dev->features & NETIF_F_HIGHDMA)
 754                 rxdesc->desc1.flags = RXFLAG_64BIT;
 755         wmb();
 756         rxdesc->desc1.flags     |= RXFLAG_OWN | RXFLAG_INT;
 757 }
 758
 759 static int
 760 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
 761 {
 762         struct jme_ring *rxring = &(jme->rxring[0]);
 763         struct jme_buffer_info *rxbi = rxring->bufinf + i;
 764         struct sk_buff *skb;
 765
 766         skb = netdev_alloc_skb(jme->dev,
 767                 jme->dev->mtu + RX_EXTRA_LEN);
 768         if (unlikely(!skb))
 769                 return -ENOMEM;
 770 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
 771         skb->dev = jme->dev;
 772 #endif
 773
 774         rxbi->skb = skb;
 775         rxbi->len = skb_tailroom(skb);
 776         rxbi->mapping = pci_map_page(jme->pdev,
 777                                         virt_to_page(skb->data),
 778                                         offset_in_page(skb->data),
 779                                         rxbi->len,
 780                                         PCI_DMA_FROMDEVICE);
 781
 782         return 0;
 783 }
 784
 785 static void
 786 jme_free_rx_buf(struct jme_adapter *jme, int i)
 787 {
 788         struct jme_ring *rxring = &(jme->rxring[0]);
 789         struct jme_buffer_info *rxbi = rxring->bufinf;
 790         rxbi += i;
 791
 792         if (rxbi->skb) {
 793                 pci_unmap_page(jme->pdev,
 794                                  rxbi->mapping,
 795                                  rxbi->len,
 796                                  PCI_DMA_FROMDEVICE);
 797                 dev_kfree_skb(rxbi->skb);
 798                 rxbi->skb = NULL;
 799                 rxbi->mapping = 0;
 800                 rxbi->len = 0;
 801         }
 802 }
 803
 804 static void
 805 jme_free_rx_resources(struct jme_adapter *jme)
 806 {
 807         int i;
 808         struct jme_ring *rxring = &(jme->rxring[0]);
 809
 810         if (rxring->alloc) {
 811                 if (rxring->bufinf) {
 812                         for (i = 0 ; i < jme->rx_ring_size ; ++i)
 813                                 jme_free_rx_buf(jme, i);
 814                         kfree(rxring->bufinf);
 815                 }
 816
 817                 dma_free_coherent(&(jme->pdev->dev),
 818                                   RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 819                                   rxring->alloc,
 820                                   rxring->dmaalloc);
 821                 rxring->alloc    = NULL;
 822                 rxring->desc     = NULL;
 823                 rxring->dmaalloc = 0;
 824                 rxring->dma      = 0;
 825                 rxring->bufinf   = NULL;
 826         }
 827         rxring->next_to_use   = 0;
 828         atomic_set(&rxring->next_to_clean, 0);
 829 }
 830
 831 static int
 832 jme_setup_rx_resources(struct jme_adapter *jme)
 833 {
 834         int i;
 835         struct jme_ring *rxring = &(jme->rxring[0]);
 836
 837         rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 838                                    RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 839                                    &(rxring->dmaalloc),
 840                                    GFP_ATOMIC);
 841         if (!rxring->alloc)
 842                 goto err_set_null;
 843
 844         /*
 845          * 16 Bytes align
 846          */
 847         rxring->desc            = (void *)ALIGN((unsigned long)(rxring->alloc),
 848                                                 RING_DESC_ALIGN);
 849         rxring->dma             = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
 850         rxring->next_to_use     = 0;
 851         atomic_set(&rxring->next_to_clean, 0);
 852
 853         rxring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 854                                         jme->rx_ring_size, GFP_ATOMIC);
 855         if (unlikely(!(rxring->bufinf)))
 856                 goto err_free_rxring;
 857
 858         /*
 859          * Initiallize Receive Descriptors
 860          */
 861         memset(rxring->bufinf, 0,
 862                 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
 863         for (i = 0 ; i < jme->rx_ring_size ; ++i) {
 864                 if (unlikely(jme_make_new_rx_buf(jme, i))) {
 865                         jme_free_rx_resources(jme);
 866                         return -ENOMEM;
 867                 }
 868
 869                 jme_set_clean_rxdesc(jme, i);
 870         }
 871
 872         return 0;
 873
 874 err_free_rxring:
 875         dma_free_coherent(&(jme->pdev->dev),
 876                           RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 877                           rxring->alloc,
 878                           rxring->dmaalloc);
 879 err_set_null:
 880         rxring->desc = NULL;
 881         rxring->dmaalloc = 0;
 882         rxring->dma = 0;
 883         rxring->bufinf = NULL;
 884
 885         return -ENOMEM;
 886 }
 887
 888 static inline void
 889 jme_enable_rx_engine(struct jme_adapter *jme)
 890 {
 891         /*
 892          * Select Queue 0
 893          */
 894         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 895                                 RXCS_QUEUESEL_Q0);
 896         wmb();
 897
 898         /*
 899          * Setup RX DMA Bass Address
 900          */
 901         jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 902         jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
 903         jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 904
 905         /*
 906          * Setup RX Descriptor Count
 907          */
 908         jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
 909
 910         /*
 911          * Setup Unicast Filter
 912          */
 913         jme_set_unicastaddr(jme->dev);
 914         jme_set_multi(jme->dev);
 915
 916         /*
 917          * Enable RX Engine
 918          */
 919         wmb();
 920         jwrite32f(jme, JME_RXCS, jme->reg_rxcs |
 921                                 RXCS_QUEUESEL_Q0 |
 922                                 RXCS_ENABLE |
 923                                 RXCS_QST);
 924
 925         /*
 926          * Start clock for RX MAC Processor
 927          */
 928         jme_mac_rxclk_on(jme);
 929 }
 930
 931 static inline void
 932 jme_restart_rx_engine(struct jme_adapter *jme)
 933 {
 934         /*
 935          * Start RX Engine
 936          */
 937         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 938                                 RXCS_QUEUESEL_Q0 |
 939                                 RXCS_ENABLE |
 940                                 RXCS_QST);
 941 }
 942
 943 static inline void
 944 jme_disable_rx_engine(struct jme_adapter *jme)
 945 {
 946         int i;
 947         u32 val;
 948
 949         /*
 950          * Disable RX Engine
 951          */
 952         jwrite32(jme, JME_RXCS, jme->reg_rxcs);
 953         wmb();
 954
 955         val = jread32(jme, JME_RXCS);
 956         for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
 957                 mdelay(1);
 958                 val = jread32(jme, JME_RXCS);
 959                 rmb();
 960         }
 961
 962         if (!i)
 963                 pr_err("Disable RX engine timeout\n");
 964
 965         /*
 966          * Stop clock for RX MAC Processor
 967          */
 968         jme_mac_rxclk_off(jme);
 969 }
 970
 971 static u16
 972 jme_udpsum(struct sk_buff *skb)
 973 {
 974         u16 csum = 0xFFFFu;
 975
 976         if (skb->len < (ETH_HLEN + sizeof(struct iphdr)))
 977                 return csum;
 978         if (skb->protocol != htons(ETH_P_IP))
 979                 return csum;
 980         skb_set_network_header(skb, ETH_HLEN);
 981         if ((ip_hdr(skb)->protocol != IPPROTO_UDP) ||
 982             (skb->len < (ETH_HLEN +
 983                         (ip_hdr(skb)->ihl << 2) +
 984                         sizeof(struct udphdr)))) {
 985                 skb_reset_network_header(skb);
 986                 return csum;
 987         }
 988         skb_set_transport_header(skb,
 989                         ETH_HLEN + (ip_hdr(skb)->ihl << 2));
 990         csum = udp_hdr(skb)->check;
 991         skb_reset_transport_header(skb);
 992         skb_reset_network_header(skb);
 993
 994         return csum;
 995 }
 996
 997 static int
 998 jme_rxsum_ok(struct jme_adapter *jme, u16 flags, struct sk_buff *skb)
 999 {
1000         if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
1001                 return false;
1002
1003         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
1004                         == RXWBFLAG_TCPON)) {
1005                 if (flags & RXWBFLAG_IPV4)
1006                         netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
1007                 return false;
1008         }
1009
1010         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
1011                         == RXWBFLAG_UDPON) && jme_udpsum(skb)) {
1012                 if (flags & RXWBFLAG_IPV4)
1013                         netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n");
1014                 return false;
1015         }
1016
1017         if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
1018                         == RXWBFLAG_IPV4)) {
1019                 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n");
1020                 return false;
1021         }
1022
1023         return true;
1024 }
1025
1026 static void
1027 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
1028 {
1029         struct jme_ring *rxring = &(jme->rxring[0]);
1030         struct rxdesc *rxdesc = rxring->desc;
1031         struct jme_buffer_info *rxbi = rxring->bufinf;
1032         struct sk_buff *skb;
1033         int framesize;
1034
1035         rxdesc += idx;
1036         rxbi += idx;
1037
1038         skb = rxbi->skb;
1039         pci_dma_sync_single_for_cpu(jme->pdev,
1040                                         rxbi->mapping,
1041                                         rxbi->len,
1042                                         PCI_DMA_FROMDEVICE);
1043
1044         if (unlikely(jme_make_new_rx_buf(jme, idx))) {
1045                 pci_dma_sync_single_for_device(jme->pdev,
1046                                                 rxbi->mapping,
1047                                                 rxbi->len,
1048                                                 PCI_DMA_FROMDEVICE);
1049
1050                 ++(NET_STAT(jme).rx_dropped);
1051         } else {
1052                 framesize = le16_to_cpu(rxdesc->descwb.framesize)
1053                                 - RX_PREPAD_SIZE;
1054
1055                 skb_reserve(skb, RX_PREPAD_SIZE);
1056                 skb_put(skb, framesize);
1057                 skb->protocol = eth_type_trans(skb, jme->dev);
1058
1059                 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags), skb))
1060                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1061                 else
1062 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35)
1063                         skb->ip_summed = CHECKSUM_NONE;
1064 #else
1065                         skb_checksum_none_assert(skb);
1066 #endif
1067
1068                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
1069                         if (jme->vlgrp) {
1070                                 jme->jme_vlan_rx(skb, jme->vlgrp,
1071                                         le16_to_cpu(rxdesc->descwb.vlan));
1072                                 NET_STAT(jme).rx_bytes += 4;
1073                         } else {
1074                                 dev_kfree_skb(skb);
1075                         }
1076                 } else {
1077                         jme->jme_rx(skb);
1078                 }
1079
1080                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
1081                     cpu_to_le16(RXWBFLAG_DEST_MUL))
1082                         ++(NET_STAT(jme).multicast);
1083
1084                 NET_STAT(jme).rx_bytes += framesize;
1085                 ++(NET_STAT(jme).rx_packets);
1086         }
1087
1088         jme_set_clean_rxdesc(jme, idx);
1089
1090 }
1091
1092 static int
1093 jme_process_receive(struct jme_adapter *jme, int limit)
1094 {
1095         struct jme_ring *rxring = &(jme->rxring[0]);
1096         struct rxdesc *rxdesc = rxring->desc;
1097         int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1098
1099         if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1100                 goto out_inc;
1101
1102         if (unlikely(atomic_read(&jme->link_changing) != 1))
1103                 goto out_inc;
1104
1105         if (unlikely(!netif_carrier_ok(jme->dev)))
1106                 goto out_inc;
1107
1108         i = atomic_read(&rxring->next_to_clean);
1109         while (limit > 0) {
1110                 rxdesc = rxring->desc;
1111                 rxdesc += i;
1112
1113                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1114                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1115                         goto out;
1116                 --limit;
1117
1118                 rmb();
1119                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1120
1121                 if (unlikely(desccnt > 1 ||
1122                 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1123
1124                         if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1125                                 ++(NET_STAT(jme).rx_crc_errors);
1126                         else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1127                                 ++(NET_STAT(jme).rx_fifo_errors);
1128                         else
1129                                 ++(NET_STAT(jme).rx_errors);
1130
1131                         if (desccnt > 1)
1132                                 limit -= desccnt - 1;
1133
1134                         for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1135                                 jme_set_clean_rxdesc(jme, j);
1136                                 j = (j + 1) & (mask);
1137                         }
1138
1139                 } else {
1140                         jme_alloc_and_feed_skb(jme, i);
1141                 }
1142
1143                 i = (i + desccnt) & (mask);
1144         }
1145
1146 out:
1147         atomic_set(&rxring->next_to_clean, i);
1148
1149 out_inc:
1150         atomic_inc(&jme->rx_cleaning);
1151
1152         return limit > 0 ? limit : 0;
1153
1154 }
1155
1156 static void
1157 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1158 {
1159         if (likely(atmp == dpi->cur)) {
1160                 dpi->cnt = 0;
1161                 return;
1162         }
1163
1164         if (dpi->attempt == atmp) {
1165                 ++(dpi->cnt);
1166         } else {
1167                 dpi->attempt = atmp;
1168                 dpi->cnt = 0;
1169         }
1170
1171 }
1172
1173 static void
1174 jme_dynamic_pcc(struct jme_adapter *jme)
1175 {
1176         register struct dynpcc_info *dpi = &(jme->dpi);
1177
1178         if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1179                 jme_attempt_pcc(dpi, PCC_P3);
1180         else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1181                  dpi->intr_cnt > PCC_INTR_THRESHOLD)
1182                 jme_attempt_pcc(dpi, PCC_P2);
1183         else
1184                 jme_attempt_pcc(dpi, PCC_P1);
1185
1186         if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1187                 if (dpi->attempt < dpi->cur)
1188                         tasklet_schedule(&jme->rxclean_task);
1189                 jme_set_rx_pcc(jme, dpi->attempt);
1190                 dpi->cur = dpi->attempt;
1191                 dpi->cnt = 0;
1192         }
1193 }
1194
1195 static void
1196 jme_start_pcc_timer(struct jme_adapter *jme)
1197 {
1198         struct dynpcc_info *dpi = &(jme->dpi);
1199         dpi->last_bytes         = NET_STAT(jme).rx_bytes;
1200         dpi->last_pkts          = NET_STAT(jme).rx_packets;
1201         dpi->intr_cnt           = 0;
1202         jwrite32(jme, JME_TMCSR,
1203                 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1204 }
1205
1206 static inline void
1207 jme_stop_pcc_timer(struct jme_adapter *jme)
1208 {
1209         jwrite32(jme, JME_TMCSR, 0);
1210 }
1211
1212 static void
1213 jme_shutdown_nic(struct jme_adapter *jme)
1214 {
1215         u32 phylink;
1216
1217         phylink = jme_linkstat_from_phy(jme);
1218
1219         if (!(phylink & PHY_LINK_UP)) {
1220                 /*
1221                  * Disable all interrupt before issue timer
1222                  */
1223                 jme_stop_irq(jme);
1224                 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1225         }
1226 }
1227
1228 static void
1229 jme_pcc_tasklet(unsigned long arg)
1230 {
1231         struct jme_adapter *jme = (struct jme_adapter *)arg;
1232         struct net_device *netdev = jme->dev;
1233
1234         if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1235                 jme_shutdown_nic(jme);
1236                 return;
1237         }
1238
1239         if (unlikely(!netif_carrier_ok(netdev) ||
1240                 (atomic_read(&jme->link_changing) != 1)
1241         )) {
1242                 jme_stop_pcc_timer(jme);
1243                 return;
1244         }
1245
1246         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1247                 jme_dynamic_pcc(jme);
1248
1249         jme_start_pcc_timer(jme);
1250 }
1251
1252 static inline void
1253 jme_polling_mode(struct jme_adapter *jme)
1254 {
1255         jme_set_rx_pcc(jme, PCC_OFF);
1256 }
1257
1258 static inline void
1259 jme_interrupt_mode(struct jme_adapter *jme)
1260 {
1261         jme_set_rx_pcc(jme, PCC_P1);
1262 }
1263
1264 static inline int
1265 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1266 {
1267         u32 apmc;
1268         apmc = jread32(jme, JME_APMC);
1269         return apmc & JME_APMC_PSEUDO_HP_EN;
1270 }
1271
1272 static void
1273 jme_start_shutdown_timer(struct jme_adapter *jme)
1274 {
1275         u32 apmc;
1276
1277         apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1278         apmc &= ~JME_APMC_EPIEN_CTRL;
1279         if (!no_extplug) {
1280                 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1281                 wmb();
1282         }
1283         jwrite32f(jme, JME_APMC, apmc);
1284
1285         jwrite32f(jme, JME_TIMER2, 0);
1286         set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1287         jwrite32(jme, JME_TMCSR,
1288                 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1289 }
1290
1291 static void
1292 jme_stop_shutdown_timer(struct jme_adapter *jme)
1293 {
1294         u32 apmc;
1295
1296         jwrite32f(jme, JME_TMCSR, 0);
1297         jwrite32f(jme, JME_TIMER2, 0);
1298         clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1299
1300         apmc = jread32(jme, JME_APMC);
1301         apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1302         jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1303         wmb();
1304         jwrite32f(jme, JME_APMC, apmc);
1305 }
1306
1307
1308 static void
1309 jme_set_physpeed_capability(struct jme_adapter *jme,u16 speed)
1310 {
1311         u32  advert, advert2;
1312
1313         spin_lock_bh(&jme->phy_lock);
1314         if (speed == SPEED_1000){
1315                 advert2 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
1316                 advert2  = (advert2|ADVERTISE_1000HALF|ADVERTISE_1000FULL);
1317                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, advert2);
1318                 advert  = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
1319                 advert  = (advert|ADVERTISE_100HALF|ADVERTISE_100FULL);
1320                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE, advert);
1321         }else if (speed == SPEED_100){
1322                 advert2 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
1323                 advert2 = advert2 & ~(ADVERTISE_1000HALF|ADVERTISE_1000FULL);
1324                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, advert2);
1325                 advert  = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
1326                 advert  = (advert|ADVERTISE_100HALF|ADVERTISE_100FULL);
1327                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE, advert);
1328         }else{
1329                 advert2 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
1330                 advert2 = advert2 & ~(ADVERTISE_1000HALF|ADVERTISE_1000FULL);
1331                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, advert2);
1332                 advert  = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
1333                 advert  = advert & ~(ADVERTISE_100HALF|ADVERTISE_100FULL);
1334                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE, advert);
1335         }
1336         spin_unlock_bh(&jme->phy_lock);
1337         return;
1338 }
1339
1340 /*      PHY reg: MII_FCSCOUNTER is read and clear, we have to continuing read until RJ45 is attached, then cache this result. */
1341 static int
1342 jme_check_ANcomplete(struct jme_adapter *jme)
1343 {
1344         u32 val;
1345
1346         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_FCSCOUNTER);
1347         return ((val&(PHY_SPEC_STATUS_AN_FAIL|PHY_SPEC_STATUS_AN_COMPLETE))==PHY_SPEC_STATUS_AN_COMPLETE) ? true : false;
1348 }
1349
1350 static int
1351 jme_media_connected(struct jme_adapter *jme)
1352 {
1353         if (jme->flag_media_connected == true)
1354                 return true;
1355
1356         jme->flag_media_connected = jme_check_ANcomplete(jme);
1357
1358         return jme->flag_media_connected;
1359 }
1360
1361 static void
1362 asd_polling_func(unsigned long data)
1363 {
1364         struct jme_adapter *jme = (struct jme_adapter *)data;
1365
1366         /*
1367                 check condition term by term.
1368                 1. link is up()                                                         ==>     reset all thing, exit the process.
1369                 2. there is no RJ45 cable attached.                     ==>     do nothing but polling.
1370                 3. RJ45 cable attached. but link is down        ==>     downspeed if the timeing is over 3.5 second.
1371         */
1372         if (jme->flag_run_asd == true){
1373                 printk("%s: run polling \n", __FUNCTION__ );
1374                 if (jme_media_connected(jme)){
1375                         jme->mc_count++;
1376                         printk("%s:  pos1 mc_count=%d  flag_media_connected=%d \n", \
1377                                         __FUNCTION__, jme->mc_count , jme->flag_media_connected);
1378                         if (jme->mc_count == (delay_time*3-5)){
1379                                 /* RJ45 is attached but unable to link anyway, it CANT
1380                                    be resolved by speed, restore the capability                         */
1381                                 jme_set_physpeed_capability(jme,SPEED_1000);
1382                                 jme->flag_media_connected = false;
1383                                 jme->mc_count = 0;
1384                         }else if (jme->mc_count == (delay_time*2-5)){
1385                                 if (jme_check_ANcomplete(jme))
1386                                         jme_set_physpeed_capability(jme,SPEED_10);
1387                                 else{
1388                                         jme->flag_media_connected = false;
1389                                         jme->mc_count = 0;
1390                                 }
1391                         }else if (jme->mc_count == delay_time-5){
1392                                 if (jme_check_ANcomplete(jme))
1393                                         jme_set_physpeed_capability(jme,SPEED_100);
1394                                 else{
1395                                         jme->flag_media_connected = false;
1396                                         jme->mc_count = 0;
1397                                 }
1398                         }
1399                 }
1400         mod_timer(&jme->asd_timer, jiffies+HZ);
1401                 return ;
1402         }
1403
1404 //out:
1405                 printk("%s stop polling \n", __FUNCTION__);
1406                 jme->flag_media_connected = false;
1407                 jme->mc_count = 0;
1408                 return;
1409 }
1410
1411 static int jme_check_linkup(struct jme_adapter *jme)
1412 {
1413         u32 phylink;
1414
1415         if (jme->fpgaver)
1416                 phylink = jme_linkstat_from_phy(jme);
1417         else
1418                 phylink = jread32(jme, JME_PHY_LINK);
1419
1420         return  (phylink & PHY_LINK_UP)? true : false;
1421 }
1422
1423 static void
1424 jme_link_change_tasklet(unsigned long arg)
1425 {
1426         struct jme_adapter *jme = (struct jme_adapter *)arg;
1427         struct net_device *netdev = jme->dev;
1428         int rc;
1429
1430         while (!atomic_dec_and_test(&jme->link_changing)) {
1431                 atomic_inc(&jme->link_changing);
1432                 netif_info(jme, intr, jme->dev, "Get link change lock failed\n");
1433                 while (atomic_read(&jme->link_changing) != 1)
1434                         netif_info(jme, intr, jme->dev, "Waiting link change lock\n");
1435         }
1436         printk("====== change_tasklet()=%d =======\n",jme->flag_run_asd);
1437 //      if (jme->chip_main_rev   < 4 ){
1438                 if (jme_check_linkup(jme)){
1439                         if (jme->flag_run_asd){
1440                                 /*      stop asd_polling_timer();               */
1441                                 printk("===stop asd_polling_timer()==\n");
1442                                 jme->flag_run_asd = false;
1443                                 del_timer_sync(&jme->asd_timer);
1444                         }
1445                 }
1446                 else{
1447                         if (!jme->flag_run_asd){
1448                                 printk("===start asd_polling_timer()==\n");
1449                                 /*      start asd_polling_timer();              */
1450                                 jme_set_physpeed_capability(jme,SPEED_1000);
1451                                 jme_check_ANcomplete(jme);                                      /*      clear PHY 0x13*/
1452                                 jme->flag_media_connected = false;
1453                                 jme->flag_run_asd = true;
1454                                 jme->mc_count = 0;
1455                                 jme->asd_timer.expires  = jiffies + 4*HZ;
1456                                 jme->asd_timer.function = &asd_polling_func;
1457                                 jme->asd_timer.data     = (unsigned long)jme;
1458                                 add_timer(&jme->asd_timer);
1459                         }
1460                 }
1461 //      }
1462         if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1463                 goto out;
1464
1465         jme->old_mtu = netdev->mtu;
1466         netif_stop_queue(netdev);
1467         if (jme_pseudo_hotplug_enabled(jme))
1468                 jme_stop_shutdown_timer(jme);
1469
1470         jme_stop_pcc_timer(jme);
1471         tasklet_disable(&jme->txclean_task);
1472         tasklet_disable(&jme->rxclean_task);
1473         tasklet_disable(&jme->rxempty_task);
1474
1475         if (netif_carrier_ok(netdev)) {
1476                 jme_disable_rx_engine(jme);
1477                 jme_disable_tx_engine(jme);
1478                 jme_reset_mac_processor(jme);
1479                 jme_free_rx_resources(jme);
1480                 jme_free_tx_resources(jme);
1481
1482                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1483                         jme_polling_mode(jme);
1484
1485                 netif_carrier_off(netdev);
1486         }
1487
1488         jme_check_link(netdev, 0);
1489         if (netif_carrier_ok(netdev)) {
1490                 rc = jme_setup_rx_resources(jme);
1491                 if (rc) {
1492                         pr_err("Allocating resources for RX error, Device STOPPED!\n");
1493                         goto out_enable_tasklet;
1494                 }
1495
1496                 rc = jme_setup_tx_resources(jme);
1497                 if (rc) {
1498                         pr_err("Allocating resources for TX error, Device STOPPED!\n");
1499                         goto err_out_free_rx_resources;
1500                 }
1501
1502                 jme_enable_rx_engine(jme);
1503                 jme_enable_tx_engine(jme);
1504
1505                 netif_start_queue(netdev);
1506
1507                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1508                         jme_interrupt_mode(jme);
1509
1510                 jme_start_pcc_timer(jme);
1511         } else if (jme_pseudo_hotplug_enabled(jme)) {
1512                 jme_start_shutdown_timer(jme);
1513         }
1514
1515         goto out_enable_tasklet;
1516
1517 err_out_free_rx_resources:
1518         jme_free_rx_resources(jme);
1519 out_enable_tasklet:
1520         tasklet_enable(&jme->txclean_task);
1521         tasklet_hi_enable(&jme->rxclean_task);
1522         tasklet_hi_enable(&jme->rxempty_task);
1523 out:
1524         atomic_inc(&jme->link_changing);
1525 }
1526
1527 static void
1528 jme_rx_clean_tasklet(unsigned long arg)
1529 {
1530         struct jme_adapter *jme = (struct jme_adapter *)arg;
1531         struct dynpcc_info *dpi = &(jme->dpi);
1532
1533         jme_process_receive(jme, jme->rx_ring_size);
1534         ++(dpi->intr_cnt);
1535
1536 }
1537
1538 static int
1539 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1540 {
1541         struct jme_adapter *jme = jme_napi_priv(holder);
1542         DECLARE_NETDEV
1543         int rest;
1544
1545         rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1546
1547         while (atomic_read(&jme->rx_empty) > 0) {
1548                 atomic_dec(&jme->rx_empty);
1549                 ++(NET_STAT(jme).rx_dropped);
1550                 jme_restart_rx_engine(jme);
1551         }
1552         atomic_inc(&jme->rx_empty);
1553
1554         if (rest) {
1555                 JME_RX_COMPLETE(netdev, holder);
1556                 jme_interrupt_mode(jme);
1557         }
1558
1559         JME_NAPI_WEIGHT_SET(budget, rest);
1560         return JME_NAPI_WEIGHT_VAL(budget) - rest;
1561 }
1562
1563 static void
1564 jme_rx_empty_tasklet(unsigned long arg)
1565 {
1566         struct jme_adapter *jme = (struct jme_adapter *)arg;
1567
1568         if (unlikely(atomic_read(&jme->link_changing) != 1))
1569                 return;
1570
1571         if (unlikely(!netif_carrier_ok(jme->dev)))
1572                 return;
1573
1574         netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1575
1576         jme_rx_clean_tasklet(arg);
1577
1578         while (atomic_read(&jme->rx_empty) > 0) {
1579                 atomic_dec(&jme->rx_empty);
1580                 ++(NET_STAT(jme).rx_dropped);
1581                 jme_restart_rx_engine(jme);
1582         }
1583         atomic_inc(&jme->rx_empty);
1584 }
1585
1586 static void
1587 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1588 {
1589         struct jme_ring *txring = &(jme->txring[0]);
1590
1591         smp_wmb();
1592         if (unlikely(netif_queue_stopped(jme->dev) &&
1593         atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1594                 netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n");
1595                 netif_wake_queue(jme->dev);
1596         }
1597
1598 }
1599
1600 static void
1601 jme_tx_clean_tasklet(unsigned long arg)
1602 {
1603         struct jme_adapter *jme = (struct jme_adapter *)arg;
1604         struct jme_ring *txring = &(jme->txring[0]);
1605         struct txdesc *txdesc = txring->desc;
1606         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1607         int i, j, cnt = 0, max, err, mask;
1608
1609         tx_dbg(jme, "Into txclean\n");
1610
1611         if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1612                 goto out;
1613
1614         if (unlikely(atomic_read(&jme->link_changing) != 1))
1615                 goto out;
1616
1617         if (unlikely(!netif_carrier_ok(jme->dev)))
1618                 goto out;
1619
1620         max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1621         mask = jme->tx_ring_mask;
1622
1623         for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1624
1625                 ctxbi = txbi + i;
1626
1627                 if (likely(ctxbi->skb &&
1628                 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1629
1630                         tx_dbg(jme, "txclean: %d+%d@%lu\n",
1631                                i, ctxbi->nr_desc, jiffies);
1632
1633                         err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1634
1635                         for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1636                                 ttxbi = txbi + ((i + j) & (mask));
1637                                 txdesc[(i + j) & (mask)].dw[0] = 0;
1638
1639                                 pci_unmap_page(jme->pdev,
1640                                                  ttxbi->mapping,
1641                                                  ttxbi->len,
1642                                                  PCI_DMA_TODEVICE);
1643
1644                                 ttxbi->mapping = 0;
1645                                 ttxbi->len = 0;
1646                         }
1647
1648                         dev_kfree_skb(ctxbi->skb);
1649
1650                         cnt += ctxbi->nr_desc;
1651
1652                         if (unlikely(err)) {
1653                                 ++(NET_STAT(jme).tx_carrier_errors);
1654                         } else {
1655                                 ++(NET_STAT(jme).tx_packets);
1656                                 NET_STAT(jme).tx_bytes += ctxbi->len;
1657                         }
1658
1659                         ctxbi->skb = NULL;
1660                         ctxbi->len = 0;
1661                         ctxbi->start_xmit = 0;
1662
1663                 } else {
1664                         break;
1665                 }
1666
1667                 i = (i + ctxbi->nr_desc) & mask;
1668
1669                 ctxbi->nr_desc = 0;
1670         }
1671
1672         tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies);
1673         atomic_set(&txring->next_to_clean, i);
1674         atomic_add(cnt, &txring->nr_free);
1675
1676         jme_wake_queue_if_stopped(jme);
1677
1678 out:
1679         atomic_inc(&jme->tx_cleaning);
1680 }
1681
1682 static void
1683 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1684 {
1685         /*
1686          * Disable interrupt
1687          */
1688         jwrite32f(jme, JME_IENC, INTR_ENABLE);
1689
1690         if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1691                 /*
1692                  * Link change event is critical
1693                  * all other events are ignored
1694                  */
1695                 jwrite32(jme, JME_IEVE, intrstat);
1696                 tasklet_schedule(&jme->linkch_task);
1697                 goto out_reenable;
1698         }
1699
1700         if (intrstat & INTR_TMINTR) {
1701                 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1702                 tasklet_schedule(&jme->pcc_task);
1703         }
1704
1705         if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1706                 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1707                 tasklet_schedule(&jme->txclean_task);
1708         }
1709
1710         if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1711                 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1712                                                      INTR_PCCRX0 |
1713                                                      INTR_RX0EMP)) |
1714                                         INTR_RX0);
1715         }
1716
1717         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1718                 if (intrstat & INTR_RX0EMP)
1719                         atomic_inc(&jme->rx_empty);
1720
1721                 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1722                         if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1723                                 jme_polling_mode(jme);
1724                                 JME_RX_SCHEDULE(jme);
1725                         }
1726                 }
1727         } else {
1728                 if (intrstat & INTR_RX0EMP) {
1729                         atomic_inc(&jme->rx_empty);
1730                         tasklet_hi_schedule(&jme->rxempty_task);
1731                 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1732                         tasklet_hi_schedule(&jme->rxclean_task);
1733                 }
1734         }
1735
1736 out_reenable:
1737         /*
1738          * Re-enable interrupt
1739          */
1740         jwrite32f(jme, JME_IENS, INTR_ENABLE);
1741 }
1742
1743 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1744 static irqreturn_t
1745 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1746 #else
1747 static irqreturn_t
1748 jme_intr(int irq, void *dev_id)
1749 #endif
1750 {
1751         struct net_device *netdev = dev_id;
1752         struct jme_adapter *jme = netdev_priv(netdev);
1753         u32 intrstat;
1754
1755         intrstat = jread32(jme, JME_IEVE);
1756
1757         /*
1758          * Check if it's really an interrupt for us
1759          */
1760         if (unlikely((intrstat & INTR_ENABLE) == 0))
1761                 return IRQ_NONE;
1762
1763         /*
1764          * Check if the device still exist
1765          */
1766         if (unlikely(intrstat == ~((typeof(intrstat))0)))
1767                 return IRQ_NONE;
1768
1769         jme_intr_msi(jme, intrstat);
1770
1771         return IRQ_HANDLED;
1772 }
1773
1774 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1775 static irqreturn_t
1776 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1777 #else
1778 static irqreturn_t
1779 jme_msi(int irq, void *dev_id)
1780 #endif
1781 {
1782         struct net_device *netdev = dev_id;
1783         struct jme_adapter *jme = netdev_priv(netdev);
1784         u32 intrstat;
1785
1786         intrstat = jread32(jme, JME_IEVE);
1787
1788         jme_intr_msi(jme, intrstat);
1789
1790         return IRQ_HANDLED;
1791 }
1792
1793 static void
1794 jme_reset_link(struct jme_adapter *jme)
1795 {
1796         jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1797 }
1798
1799 static void
1800 jme_restart_an(struct jme_adapter *jme)
1801 {
1802         u32 bmcr;
1803
1804         spin_lock_bh(&jme->phy_lock);
1805         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1806         bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1807         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1808         spin_unlock_bh(&jme->phy_lock);
1809 }
1810
1811 static int
1812 jme_request_irq(struct jme_adapter *jme)
1813 {
1814         int rc;
1815         struct net_device *netdev = jme->dev;
1816 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1817         irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1818         int irq_flags = SA_SHIRQ;
1819 #else
1820         irq_handler_t handler = jme_intr;
1821         int irq_flags = IRQF_SHARED;
1822 #endif
1823
1824         if (!pci_enable_msi(jme->pdev)) {
1825                 set_bit(JME_FLAG_MSI, &jme->flags);
1826                 handler = jme_msi;
1827                 irq_flags = 0;
1828         }
1829
1830         rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1831                           netdev);
1832         if (rc) {
1833                 netdev_err(netdev,
1834                            "Unable to request %s interrupt (return: %d)\n",
1835                            test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1836                            rc);
1837
1838                 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1839                         pci_disable_msi(jme->pdev);
1840                         clear_bit(JME_FLAG_MSI, &jme->flags);
1841                 }
1842         } else {
1843                 netdev->irq = jme->pdev->irq;
1844         }
1845
1846         return rc;
1847 }
1848
1849 static void
1850 jme_free_irq(struct jme_adapter *jme)
1851 {
1852         free_irq(jme->pdev->irq, jme->dev);
1853         if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1854                 pci_disable_msi(jme->pdev);
1855                 clear_bit(JME_FLAG_MSI, &jme->flags);
1856                 jme->dev->irq = jme->pdev->irq;
1857         }
1858 }
1859
1860 static inline void
1861 jme_new_phy_on(struct jme_adapter *jme)
1862 {
1863         u32 reg;
1864
1865         reg = jread32(jme, JME_PHY_PWR);
1866         reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1867                  PHY_PWR_DWN2 | PHY_PWR_CLKSEL);
1868         jwrite32(jme, JME_PHY_PWR, reg);
1869
1870         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1871         reg &= ~PE1_GPREG0_PBG;
1872         reg |= PE1_GPREG0_ENBG;
1873         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1874 }
1875
1876 static inline void
1877 jme_new_phy_off(struct jme_adapter *jme)
1878 {
1879         u32 reg;
1880
1881         reg = jread32(jme, JME_PHY_PWR);
1882         reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1883                PHY_PWR_DWN2 | PHY_PWR_CLKSEL;
1884         jwrite32(jme, JME_PHY_PWR, reg);
1885
1886         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1887         reg &= ~PE1_GPREG0_PBG;
1888         reg |= PE1_GPREG0_PDD3COLD;
1889         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1890 }
1891
1892 static inline void
1893 jme_phy_on(struct jme_adapter *jme)
1894 {
1895         u32 bmcr;
1896
1897         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1898         bmcr &= ~BMCR_PDOWN;
1899         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1900
1901         if (new_phy_power_ctrl(jme->chip_main_rev))
1902                 jme_new_phy_on(jme);
1903 }
1904
1905 static inline void
1906 jme_phy_off(struct jme_adapter *jme)
1907 {
1908         u32 bmcr;
1909
1910         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1911         bmcr |= BMCR_PDOWN;
1912         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1913
1914         if (new_phy_power_ctrl(jme->chip_main_rev))
1915                 jme_new_phy_off(jme);
1916 }
1917
1918 static int
1919 jme_open(struct net_device *netdev)
1920 {
1921         struct jme_adapter *jme = netdev_priv(netdev);
1922         int rc;
1923
1924         jme_clear_pm(jme);
1925         JME_NAPI_ENABLE(jme);
1926
1927         tasklet_enable(&jme->linkch_task);
1928         tasklet_enable(&jme->txclean_task);
1929         tasklet_hi_enable(&jme->rxclean_task);
1930         tasklet_hi_enable(&jme->rxempty_task);
1931
1932         rc = jme_request_irq(jme);
1933         if (rc)
1934                 goto err_out;
1935
1936         jme_start_irq(jme);
1937
1938         jme_phy_on(jme);
1939         if (test_bit(JME_FLAG_SSET, &jme->flags))
1940                 jme_set_settings(netdev, &jme->old_ecmd);
1941         else
1942                 jme_reset_phy_processor(jme);
1943
1944         jme_reset_link(jme);
1945
1946         return 0;
1947
1948 err_out:
1949         netif_stop_queue(netdev);
1950         netif_carrier_off(netdev);
1951         return rc;
1952 }
1953
1954 static void
1955 jme_set_100m_half(struct jme_adapter *jme)
1956 {
1957         u32 bmcr, tmp;
1958
1959         jme_phy_on(jme);
1960         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1961         tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1962                        BMCR_SPEED1000 | BMCR_FULLDPLX);
1963         tmp |= BMCR_SPEED100;
1964
1965         if (bmcr != tmp)
1966                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1967
1968         if (jme->fpgaver)
1969                 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1970         else
1971                 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1972 }
1973
1974 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1975 static void
1976 jme_wait_link(struct jme_adapter *jme)
1977 {
1978         u32 phylink, to = JME_WAIT_LINK_TIME;
1979
1980         mdelay(1000);
1981         phylink = jme_linkstat_from_phy(jme);
1982         while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1983                 mdelay(10);
1984                 phylink = jme_linkstat_from_phy(jme);
1985         }
1986 }
1987
1988 static void
1989 jme_powersave_phy(struct jme_adapter *jme)
1990 {
1991         if (jme->reg_pmcs) {
1992                 jme_set_100m_half(jme);
1993
1994                 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
1995                         jme_wait_link(jme);
1996
1997                 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
1998         } else {
1999                 jme_phy_off(jme);
2000         }
2001 }
2002
2003 static int
2004 jme_close(struct net_device *netdev)
2005 {
2006         struct jme_adapter *jme = netdev_priv(netdev);
2007
2008         netif_stop_queue(netdev);
2009         netif_carrier_off(netdev);
2010
2011         jme_stop_irq(jme);
2012         jme_free_irq(jme);
2013
2014         JME_NAPI_DISABLE(jme);
2015
2016         tasklet_disable(&jme->linkch_task);
2017         tasklet_disable(&jme->txclean_task);
2018         tasklet_disable(&jme->rxclean_task);
2019         tasklet_disable(&jme->rxempty_task);
2020
2021         jme_disable_rx_engine(jme);
2022         jme_disable_tx_engine(jme);
2023         jme_reset_mac_processor(jme);
2024         jme_free_rx_resources(jme);
2025         jme_free_tx_resources(jme);
2026         jme->phylink = 0;
2027         jme_phy_off(jme);
2028
2029         return 0;
2030 }
2031
2032 static int
2033 jme_alloc_txdesc(struct jme_adapter *jme,
2034                         struct sk_buff *skb)
2035 {
2036         struct jme_ring *txring = &(jme->txring[0]);
2037         int idx, nr_alloc, mask = jme->tx_ring_mask;
2038
2039         idx = txring->next_to_use;
2040         nr_alloc = skb_shinfo(skb)->nr_frags + 2;
2041
2042         if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
2043                 return -1;
2044
2045         atomic_sub(nr_alloc, &txring->nr_free);
2046
2047         txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
2048
2049         return idx;
2050 }
2051
2052 static void
2053 jme_fill_tx_map(struct pci_dev *pdev,
2054                 struct txdesc *txdesc,
2055                 struct jme_buffer_info *txbi,
2056                 struct page *page,
2057                 u32 page_offset,
2058                 u32 len,
2059                 u8 hidma)
2060 {
2061         dma_addr_t dmaaddr;
2062
2063         dmaaddr = pci_map_page(pdev,
2064                                 page,
2065                                 page_offset,
2066                                 len,
2067                                 PCI_DMA_TODEVICE);
2068
2069         pci_dma_sync_single_for_device(pdev,
2070                                        dmaaddr,
2071                                        len,
2072                                        PCI_DMA_TODEVICE);
2073
2074         txdesc->dw[0] = 0;
2075         txdesc->dw[1] = 0;
2076         txdesc->desc2.flags     = TXFLAG_OWN;
2077         txdesc->desc2.flags     |= (hidma) ? TXFLAG_64BIT : 0;
2078         txdesc->desc2.datalen   = cpu_to_le16(len);
2079         txdesc->desc2.bufaddrh  = cpu_to_le32((__u64)dmaaddr >> 32);
2080         txdesc->desc2.bufaddrl  = cpu_to_le32(
2081                                         (__u64)dmaaddr & 0xFFFFFFFFUL);
2082
2083         txbi->mapping = dmaaddr;
2084         txbi->len = len;
2085 }
2086
2087 static void
2088 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
2089 {
2090         struct jme_ring *txring = &(jme->txring[0]);
2091         struct txdesc *txdesc = txring->desc, *ctxdesc;
2092         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
2093         u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
2094         int i, nr_frags = skb_shinfo(skb)->nr_frags;
2095         int mask = jme->tx_ring_mask;
2096         struct skb_frag_struct *frag;
2097         u32 len;
2098
2099         for (i = 0 ; i < nr_frags ; ++i) {
2100                 frag = &skb_shinfo(skb)->frags[i];
2101                 ctxdesc = txdesc + ((idx + i + 2) & (mask));
2102                 ctxbi = txbi + ((idx + i + 2) & (mask));
2103
2104                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
2105                                  frag->page_offset, frag->size, hidma);
2106         }
2107
2108         len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
2109         ctxdesc = txdesc + ((idx + 1) & (mask));
2110         ctxbi = txbi + ((idx + 1) & (mask));
2111         jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
2112                         offset_in_page(skb->data), len, hidma);
2113
2114 }
2115
2116 static int
2117 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
2118 {
2119         if (unlikely(
2120 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
2121         skb_shinfo(skb)->tso_size
2122 #else
2123         skb_shinfo(skb)->gso_size
2124 #endif
2125                         && skb_header_cloned(skb) &&
2126                         pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
2127                 dev_kfree_skb(skb);
2128                 return -1;
2129         }
2130
2131         return 0;
2132 }
2133
2134 static int
2135 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
2136 {
2137 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
2138         *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
2139 #else
2140         *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
2141 #endif
2142         if (*mss) {
2143                 *flags |= TXFLAG_LSEN;
2144
2145                 if (skb->protocol == htons(ETH_P_IP)) {
2146                         struct iphdr *iph = ip_hdr(skb);
2147
2148                         iph->check = 0;
2149                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2150                                                                 iph->daddr, 0,
2151                                                                 IPPROTO_TCP,
2152                                                                 0);
2153                 } else {
2154                         struct ipv6hdr *ip6h = ipv6_hdr(skb);
2155
2156                         tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
2157                                                                 &ip6h->daddr, 0,
2158                                                                 IPPROTO_TCP,
2159                                                                 0);
2160                 }
2161
2162                 return 0;
2163         }
2164
2165         return 1;
2166 }
2167
2168 static void
2169 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
2170 {
2171 #ifdef CHECKSUM_PARTIAL
2172         if (skb->ip_summed == CHECKSUM_PARTIAL)
2173 #else
2174         if (skb->ip_summed == CHECKSUM_HW)
2175 #endif
2176         {
2177                 u8 ip_proto;
2178
2179 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2180                 if (skb->protocol == htons(ETH_P_IP))
2181                         ip_proto = ip_hdr(skb)->protocol;
2182                 else if (skb->protocol == htons(ETH_P_IPV6))
2183                         ip_proto = ipv6_hdr(skb)->nexthdr;
2184                 else
2185                         ip_proto = 0;
2186 #else
2187                 switch (skb->protocol) {
2188                 case htons(ETH_P_IP):
2189                         ip_proto = ip_hdr(skb)->protocol;
2190                         break;
2191                 case htons(ETH_P_IPV6):
2192                         ip_proto = ipv6_hdr(skb)->nexthdr;
2193                         break;
2194                 default:
2195                         ip_proto = 0;
2196                         break;
2197                 }
2198 #endif
2199
2200                 switch (ip_proto) {
2201                 case IPPROTO_TCP:
2202                         *flags |= TXFLAG_TCPCS;
2203                         break;
2204                 case IPPROTO_UDP:
2205                         *flags |= TXFLAG_UDPCS;
2206                         break;
2207                 default:
2208                         netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n");
2209                         break;
2210                 }
2211         }
2212 }
2213
2214 static inline void
2215 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
2216 {
2217         if (vlan_tx_tag_present(skb)) {
2218                 *flags |= TXFLAG_TAGON;
2219                 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2220         }
2221 }
2222
2223 static int
2224 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
2225 {
2226         struct jme_ring *txring = &(jme->txring[0]);
2227         struct txdesc *txdesc;
2228         struct jme_buffer_info *txbi;
2229         u8 flags;
2230
2231         txdesc = (struct txdesc *)txring->desc + idx;
2232         txbi = txring->bufinf + idx;
2233
2234         txdesc->dw[0] = 0;
2235         txdesc->dw[1] = 0;
2236         txdesc->dw[2] = 0;
2237         txdesc->dw[3] = 0;
2238         txdesc->desc1.pktsize = cpu_to_le16(skb->len);
2239         /*
2240          * Set OWN bit at final.
2241          * When kernel transmit faster than NIC.
2242          * And NIC trying to send this descriptor before we tell
2243          * it to start sending this TX queue.
2244          * Other fields are already filled correctly.
2245          */
2246         wmb();
2247         flags = TXFLAG_OWN | TXFLAG_INT;
2248         /*
2249          * Set checksum flags while not tso
2250          */
2251         if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
2252                 jme_tx_csum(jme, skb, &flags);
2253         jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
2254         jme_map_tx_skb(jme, skb, idx);
2255         txdesc->desc1.flags = flags;
2256         /*
2257          * Set tx buffer info after telling NIC to send
2258          * For better tx_clean timing
2259          */
2260         wmb();
2261         txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
2262         txbi->skb = skb;
2263         txbi->len = skb->len;
2264         txbi->start_xmit = jiffies;
2265         if (!txbi->start_xmit)
2266                 txbi->start_xmit = (0UL-1);
2267
2268         return 0;
2269 }
2270
2271 static void
2272 jme_stop_queue_if_full(struct jme_adapter *jme)
2273 {
2274         struct jme_ring *txring = &(jme->txring[0]);
2275         struct jme_buffer_info *txbi = txring->bufinf;
2276         int idx = atomic_read(&txring->next_to_clean);
2277
2278         txbi += idx;
2279
2280         smp_wmb();
2281         if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2282                 netif_stop_queue(jme->dev);
2283                 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n");
2284                 smp_wmb();
2285                 if (atomic_read(&txring->nr_free)
2286                         >= (jme->tx_wake_threshold)) {
2287                         netif_wake_queue(jme->dev);
2288                         netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n");
2289                 }
2290         }
2291
2292         if (unlikely(txbi->start_xmit &&
2293                         (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2294                         txbi->skb)) {
2295                 netif_stop_queue(jme->dev);
2296                 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu\n", idx, jiffies);
2297         }
2298 }
2299
2300 /*
2301  * This function is already protected by netif_tx_lock()
2302  */
2303
2304 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2305 static int
2306 #else
2307 static netdev_tx_t
2308 #endif
2309 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2310 {
2311         struct jme_adapter *jme = netdev_priv(netdev);
2312         int idx;
2313
2314         if (unlikely(jme_expand_header(jme, skb))) {
2315                 ++(NET_STAT(jme).tx_dropped);
2316                 return NETDEV_TX_OK;
2317         }
2318
2319         idx = jme_alloc_txdesc(jme, skb);
2320
2321         if (unlikely(idx < 0)) {
2322                 netif_stop_queue(netdev);
2323                 netif_err(jme, tx_err, jme->dev,
2324                           "BUG! Tx ring full when queue awake!\n");
2325
2326                 return NETDEV_TX_BUSY;
2327         }
2328
2329         jme_fill_tx_desc(jme, skb, idx);
2330
2331         jwrite32(jme, JME_TXCS, jme->reg_txcs |
2332                                 TXCS_SELECT_QUEUE0 |
2333                                 TXCS_QUEUE0S |
2334                                 TXCS_ENABLE);
2335 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2336         netdev->trans_start = jiffies;
2337 #endif
2338
2339         tx_dbg(jme, "xmit: %d+%d@%lu\n",
2340                idx, skb_shinfo(skb)->nr_frags + 2, jiffies);
2341         jme_stop_queue_if_full(jme);
2342
2343         return NETDEV_TX_OK;
2344 }
2345
2346 static void
2347 jme_set_unicastaddr(struct net_device *netdev)
2348 {
2349         struct jme_adapter *jme = netdev_priv(netdev);
2350         u32 val;
2351
2352         val = (netdev->dev_addr[3] & 0xff) << 24 |
2353               (netdev->dev_addr[2] & 0xff) << 16 |
2354               (netdev->dev_addr[1] & 0xff) <<  8 |
2355               (netdev->dev_addr[0] & 0xff);
2356         jwrite32(jme, JME_RXUMA_LO, val);
2357         val = (netdev->dev_addr[5] & 0xff) << 8 |
2358               (netdev->dev_addr[4] & 0xff);
2359         jwrite32(jme, JME_RXUMA_HI, val);
2360 }
2361
2362 static int
2363 jme_set_macaddr(struct net_device *netdev, void *p)
2364 {
2365         struct jme_adapter *jme = netdev_priv(netdev);
2366         struct sockaddr *addr = p;
2367
2368         if (netif_running(netdev))
2369                 return -EBUSY;
2370
2371         spin_lock_bh(&jme->macaddr_lock);
2372         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2373         jme_set_unicastaddr(netdev);
2374         spin_unlock_bh(&jme->macaddr_lock);
2375
2376         return 0;
2377 }
2378
2379 static void
2380 jme_set_multi(struct net_device *netdev)
2381 {
2382         struct jme_adapter *jme = netdev_priv(netdev);
2383         u32 mc_hash[2] = {};
2384 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2385         int i;
2386 #endif
2387
2388         spin_lock_bh(&jme->rxmcs_lock);
2389
2390         jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2391
2392         if (netdev->flags & IFF_PROMISC) {
2393                 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2394         } else if (netdev->flags & IFF_ALLMULTI) {
2395                 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2396         } else if (netdev->flags & IFF_MULTICAST) {
2397 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2398                 struct dev_mc_list *mclist;
2399 #else
2400                 struct netdev_hw_addr *ha;
2401 #endif
2402                 int bit_nr;
2403
2404                 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2405 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2406                 for (i = 0, mclist = netdev->mc_list;
2407                         mclist && i < netdev->mc_count;
2408                         ++i, mclist = mclist->next) {
2409 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2410                 netdev_for_each_mc_addr(mclist, netdev) {
2411 #else
2412                 netdev_for_each_mc_addr(ha, netdev) {
2413 #endif
2414 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2415                         bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2416 #else
2417                         bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2418 #endif
2419                         mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2420                 }
2421
2422                 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2423                 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2424         }
2425
2426         wmb();
2427         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2428
2429         spin_unlock_bh(&jme->rxmcs_lock);
2430 }
2431
2432 static int
2433 jme_change_mtu(struct net_device *netdev, int new_mtu)
2434 {
2435         struct jme_adapter *jme = netdev_priv(netdev);
2436
2437         if (new_mtu == jme->old_mtu)
2438                 return 0;
2439
2440         if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2441                 ((new_mtu) < IPV6_MIN_MTU))
2442                 return -EINVAL;
2443
2444         if (new_mtu > 4000) {
2445                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2446                 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2447                 jme_restart_rx_engine(jme);
2448         } else {
2449                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2450                 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2451                 jme_restart_rx_engine(jme);
2452         }
2453
2454         if (new_mtu > 1900) {
2455                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2456                                 NETIF_F_TSO | NETIF_F_TSO6);
2457         } else {
2458                 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2459                         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2460                 if (test_bit(JME_FLAG_TSO, &jme->flags))
2461                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2462         }
2463
2464         netdev->mtu = new_mtu;
2465         jme_reset_link(jme);
2466
2467         return 0;
2468 }
2469
2470 static void
2471 jme_tx_timeout(struct net_device *netdev)
2472 {
2473         struct jme_adapter *jme = netdev_priv(netdev);
2474
2475         jme->phylink = 0;
2476         jme_reset_phy_processor(jme);
2477         if (test_bit(JME_FLAG_SSET, &jme->flags))
2478                 jme_set_settings(netdev, &jme->old_ecmd);
2479
2480         /*
2481          * Force to Reset the link again
2482          */
2483         jme_reset_link(jme);
2484 }
2485
2486 static inline void jme_pause_rx(struct jme_adapter *jme)
2487 {
2488         atomic_dec(&jme->link_changing);
2489
2490         jme_set_rx_pcc(jme, PCC_OFF);
2491         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2492                 JME_NAPI_DISABLE(jme);
2493         } else {
2494                 tasklet_disable(&jme->rxclean_task);
2495                 tasklet_disable(&jme->rxempty_task);
2496         }
2497 }
2498
2499 static inline void jme_resume_rx(struct jme_adapter *jme)
2500 {
2501         struct dynpcc_info *dpi = &(jme->dpi);
2502
2503         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2504                 JME_NAPI_ENABLE(jme);
2505         } else {
2506                 tasklet_hi_enable(&jme->rxclean_task);
2507                 tasklet_hi_enable(&jme->rxempty_task);
2508         }
2509         dpi->cur                = PCC_P1;
2510         dpi->attempt            = PCC_P1;
2511         dpi->cnt                = 0;
2512         jme_set_rx_pcc(jme, PCC_P1);
2513
2514         atomic_inc(&jme->link_changing);
2515 }
2516
2517 static void
2518 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2519 {
2520         struct jme_adapter *jme = netdev_priv(netdev);
2521
2522         jme_pause_rx(jme);
2523         jme->vlgrp = grp;
2524         jme_resume_rx(jme);
2525 }
2526
2527 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2528 static void
2529 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2530 {
2531         struct jme_adapter *jme = netdev_priv(netdev);
2532
2533         if(jme->vlgrp) {
2534                 jme_pause_rx(jme);
2535 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2536                 jme->vlgrp->vlan_devices[vid] = NULL;
2537 #else
2538                 vlan_group_set_device(jme->vlgrp, vid, NULL);
2539 #endif
2540                 jme_resume_rx(jme);
2541         }
2542 }
2543 #endif
2544
2545 static void
2546 jme_get_drvinfo(struct net_device *netdev,
2547                      struct ethtool_drvinfo *info)
2548 {
2549         struct jme_adapter *jme = netdev_priv(netdev);
2550
2551         strcpy(info->driver, DRV_NAME);
2552         strcpy(info->version, DRV_VERSION);
2553         strcpy(info->bus_info, pci_name(jme->pdev));
2554 }
2555
2556 static int
2557 jme_get_regs_len(struct net_device *netdev)
2558 {
2559         return JME_REG_LEN;
2560 }
2561
2562 static void
2563 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2564 {
2565         int i;
2566
2567         for (i = 0 ; i < len ; i += 4)
2568                 p[i >> 2] = jread32(jme, reg + i);
2569 }
2570
2571 static void
2572 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2573 {
2574         int i;
2575         u16 *p16 = (u16 *)p;
2576
2577         for (i = 0 ; i < reg_nr ; ++i)
2578                 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2579 }
2580
2581 static void
2582 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2583 {
2584         struct jme_adapter *jme = netdev_priv(netdev);
2585         u32 *p32 = (u32 *)p;
2586
2587         memset(p, 0xFF, JME_REG_LEN);
2588
2589         regs->version = 1;
2590         mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2591
2592         p32 += 0x100 >> 2;
2593         mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2594
2595         p32 += 0x100 >> 2;
2596         mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2597
2598         p32 += 0x100 >> 2;
2599         mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2600
2601         p32 += 0x100 >> 2;
2602         mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2603 }
2604
2605 static int
2606 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2607 {
2608         struct jme_adapter *jme = netdev_priv(netdev);
2609
2610         ecmd->tx_coalesce_usecs = PCC_TX_TO;
2611         ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2612
2613         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2614                 ecmd->use_adaptive_rx_coalesce = false;
2615                 ecmd->rx_coalesce_usecs = 0;
2616                 ecmd->rx_max_coalesced_frames = 0;
2617                 return 0;
2618         }
2619
2620         ecmd->use_adaptive_rx_coalesce = true;
2621
2622         switch (jme->dpi.cur) {
2623         case PCC_P1:
2624                 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2625                 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2626                 break;
2627         case PCC_P2:
2628                 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2629                 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2630                 break;
2631         case PCC_P3:
2632                 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2633                 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2634                 break;
2635         default:
2636                 break;
2637         }
2638
2639         return 0;
2640 }
2641
2642 static int
2643 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2644 {
2645         struct jme_adapter *jme = netdev_priv(netdev);
2646         struct dynpcc_info *dpi = &(jme->dpi);
2647
2648         if (netif_running(netdev))
2649                 return -EBUSY;
2650
2651         if (ecmd->use_adaptive_rx_coalesce &&
2652             test_bit(JME_FLAG_POLL, &jme->flags)) {
2653                 clear_bit(JME_FLAG_POLL, &jme->flags);
2654                 jme->jme_rx = netif_rx;
2655                 jme->jme_vlan_rx = vlan_hwaccel_rx;
2656                 dpi->cur                = PCC_P1;
2657                 dpi->attempt            = PCC_P1;
2658                 dpi->cnt                = 0;
2659                 jme_set_rx_pcc(jme, PCC_P1);
2660                 jme_interrupt_mode(jme);
2661         } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2662                    !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2663                 set_bit(JME_FLAG_POLL, &jme->flags);
2664                 jme->jme_rx = netif_receive_skb;
2665                 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2666                 jme_interrupt_mode(jme);
2667         }
2668
2669         return 0;
2670 }
2671
2672 static void
2673 jme_get_pauseparam(struct net_device *netdev,
2674                         struct ethtool_pauseparam *ecmd)
2675 {
2676         struct jme_adapter *jme = netdev_priv(netdev);
2677         u32 val;
2678
2679         ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2680         ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2681
2682         spin_lock_bh(&jme->phy_lock);
2683         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2684         spin_unlock_bh(&jme->phy_lock);
2685
2686         ecmd->autoneg =
2687                 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2688 }
2689
2690 static int
2691 jme_set_pauseparam(struct net_device *netdev,
2692                         struct ethtool_pauseparam *ecmd)
2693 {
2694         struct jme_adapter *jme = netdev_priv(netdev);
2695         u32 val;
2696
2697         if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2698                 (ecmd->tx_pause != 0)) {
2699
2700                 if (ecmd->tx_pause)
2701                         jme->reg_txpfc |= TXPFC_PF_EN;
2702                 else
2703                         jme->reg_txpfc &= ~TXPFC_PF_EN;
2704
2705                 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2706         }
2707
2708         spin_lock_bh(&jme->rxmcs_lock);
2709         if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2710                 (ecmd->rx_pause != 0)) {
2711
2712                 if (ecmd->rx_pause)
2713                         jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2714                 else
2715                         jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2716
2717                 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2718         }
2719         spin_unlock_bh(&jme->rxmcs_lock);
2720
2721         spin_lock_bh(&jme->phy_lock);
2722         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2723         if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2724                 (ecmd->autoneg != 0)) {
2725
2726                 if (ecmd->autoneg)
2727                         val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2728                 else
2729                         val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2730
2731                 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2732                                 MII_ADVERTISE, val);
2733         }
2734         spin_unlock_bh(&jme->phy_lock);
2735
2736         return 0;
2737 }
2738
2739 static void
2740 jme_get_wol(struct net_device *netdev,
2741                 struct ethtool_wolinfo *wol)
2742 {
2743         struct jme_adapter *jme = netdev_priv(netdev);
2744
2745         wol->supported = WAKE_MAGIC | WAKE_PHY;
2746
2747         wol->wolopts = 0;
2748
2749         if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2750                 wol->wolopts |= WAKE_PHY;
2751
2752         if (jme->reg_pmcs & PMCS_MFEN)
2753                 wol->wolopts |= WAKE_MAGIC;
2754
2755 }
2756
2757 static int
2758 jme_set_wol(struct net_device *netdev,
2759                 struct ethtool_wolinfo *wol)
2760 {
2761         struct jme_adapter *jme = netdev_priv(netdev);
2762
2763         if (wol->wolopts & (WAKE_MAGICSECURE |
2764                                 WAKE_UCAST |
2765                                 WAKE_MCAST |
2766                                 WAKE_BCAST |
2767                                 WAKE_ARP))
2768                 return -EOPNOTSUPP;
2769
2770         jme->reg_pmcs = 0;
2771
2772         if (wol->wolopts & WAKE_PHY)
2773                 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2774
2775         if (wol->wolopts & WAKE_MAGIC)
2776                 jme->reg_pmcs |= PMCS_MFEN;
2777
2778         jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2779
2780         return 0;
2781 }
2782
2783 static int
2784 jme_get_settings(struct net_device *netdev,
2785                      struct ethtool_cmd *ecmd)
2786 {
2787         struct jme_adapter *jme = netdev_priv(netdev);
2788         int rc;
2789
2790         spin_lock_bh(&jme->phy_lock);
2791         rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2792         spin_unlock_bh(&jme->phy_lock);
2793         return rc;
2794 }
2795
2796 static int
2797 jme_set_settings(struct net_device *netdev,
2798                      struct ethtool_cmd *ecmd)
2799 {
2800         struct jme_adapter *jme = netdev_priv(netdev);
2801         int rc, fdc = 0;
2802
2803         if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2804                 return -EINVAL;
2805
2806         /*
2807          * Check If user changed duplex only while force_media.
2808          * Hardware would not generate link change interrupt.
2809          */
2810         if (jme->mii_if.force_media &&
2811         ecmd->autoneg != AUTONEG_ENABLE &&
2812         (jme->mii_if.full_duplex != ecmd->duplex))
2813                 fdc = 1;
2814
2815         spin_lock_bh(&jme->phy_lock);
2816         rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2817         spin_unlock_bh(&jme->phy_lock);
2818
2819         if (!rc) {
2820                 if (fdc)
2821                         jme_reset_link(jme);
2822                 jme->old_ecmd = *ecmd;
2823                 set_bit(JME_FLAG_SSET, &jme->flags);
2824         }
2825
2826         return rc;
2827 }
2828
2829 static int
2830 jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
2831 {
2832         int rc;
2833         struct jme_adapter *jme = netdev_priv(netdev);
2834         struct mii_ioctl_data *mii_data = if_mii(rq);
2835         unsigned int duplex_chg;
2836         u16 val ;
2837
2838         if (cmd == SIOCSMIIREG) {
2839                 val = mii_data->val_in;
2840                 if (!(val & (BMCR_RESET|BMCR_ANENABLE)) &&
2841                     (val & BMCR_SPEED1000))
2842                         return -EINVAL;
2843         }
2844
2845         spin_lock_bh(&jme->phy_lock);
2846         rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg);
2847         spin_unlock_bh(&jme->phy_lock);
2848
2849         if (!rc && (cmd == SIOCSMIIREG)) {
2850                 if (duplex_chg)
2851                         jme_reset_link(jme);
2852                 jme_get_settings(netdev, &jme->old_ecmd);
2853                 set_bit(JME_FLAG_SSET, &jme->flags);
2854         }
2855
2856         return rc;
2857 }
2858
2859 static u32
2860 jme_get_link(struct net_device *netdev)
2861 {
2862         struct jme_adapter *jme = netdev_priv(netdev);
2863         return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2864 }
2865
2866 static u32
2867 jme_get_msglevel(struct net_device *netdev)
2868 {
2869         struct jme_adapter *jme = netdev_priv(netdev);
2870         return jme->msg_enable;
2871 }
2872
2873 static void
2874 jme_set_msglevel(struct net_device *netdev, u32 value)
2875 {
2876         struct jme_adapter *jme = netdev_priv(netdev);
2877         jme->msg_enable = value;
2878 }
2879
2880 static u32
2881 jme_get_rx_csum(struct net_device *netdev)
2882 {
2883         struct jme_adapter *jme = netdev_priv(netdev);
2884         return jme->reg_rxmcs & RXMCS_CHECKSUM;
2885 }
2886
2887 static int
2888 jme_set_rx_csum(struct net_device *netdev, u32 on)
2889 {
2890         struct jme_adapter *jme = netdev_priv(netdev);
2891
2892         spin_lock_bh(&jme->rxmcs_lock);
2893         if (on)
2894                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2895         else
2896                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2897         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2898         spin_unlock_bh(&jme->rxmcs_lock);
2899
2900         return 0;
2901 }
2902
2903 static int
2904 jme_set_tx_csum(struct net_device *netdev, u32 on)
2905 {
2906         struct jme_adapter *jme = netdev_priv(netdev);
2907
2908         if (on) {
2909                 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2910                 if (netdev->mtu <= 1900)
2911                         netdev->features |=
2912                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2913         } else {
2914                 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2915                 netdev->features &=
2916                                 ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
2917         }
2918
2919         return 0;
2920 }
2921
2922 static int
2923 jme_set_tso(struct net_device *netdev, u32 on)
2924 {
2925         struct jme_adapter *jme = netdev_priv(netdev);
2926
2927         if (on) {
2928                 set_bit(JME_FLAG_TSO, &jme->flags);
2929                 if (netdev->mtu <= 1900)
2930                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2931         } else {
2932                 clear_bit(JME_FLAG_TSO, &jme->flags);
2933                 netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
2934         }
2935
2936         return 0;
2937 }
2938
2939 static int
2940 jme_nway_reset(struct net_device *netdev)
2941 {
2942         struct jme_adapter *jme = netdev_priv(netdev);
2943         jme_restart_an(jme);
2944         return 0;
2945 }
2946
2947 static u8
2948 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2949 {
2950         u32 val;
2951         int to;
2952
2953         val = jread32(jme, JME_SMBCSR);
2954         to = JME_SMB_BUSY_TIMEOUT;
2955         while ((val & SMBCSR_BUSY) && --to) {
2956                 msleep(1);
2957                 val = jread32(jme, JME_SMBCSR);
2958         }
2959         if (!to) {
2960                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2961                 return 0xFF;
2962         }
2963
2964         jwrite32(jme, JME_SMBINTF,
2965                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2966                 SMBINTF_HWRWN_READ |
2967                 SMBINTF_HWCMD);
2968
2969         val = jread32(jme, JME_SMBINTF);
2970         to = JME_SMB_BUSY_TIMEOUT;
2971         while ((val & SMBINTF_HWCMD) && --to) {
2972                 msleep(1);
2973                 val = jread32(jme, JME_SMBINTF);
2974         }
2975         if (!to) {
2976                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2977                 return 0xFF;
2978         }
2979
2980         return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2981 }
2982
2983 static void
2984 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2985 {
2986         u32 val;
2987         int to;
2988
2989         val = jread32(jme, JME_SMBCSR);
2990         to = JME_SMB_BUSY_TIMEOUT;
2991         while ((val & SMBCSR_BUSY) && --to) {
2992                 msleep(1);
2993                 val = jread32(jme, JME_SMBCSR);
2994         }
2995         if (!to) {
2996                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2997                 return;
2998         }
2999
3000         jwrite32(jme, JME_SMBINTF,
3001                 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
3002                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
3003                 SMBINTF_HWRWN_WRITE |
3004                 SMBINTF_HWCMD);
3005
3006         val = jread32(jme, JME_SMBINTF);
3007         to = JME_SMB_BUSY_TIMEOUT;
3008         while ((val & SMBINTF_HWCMD) && --to) {
3009                 msleep(1);
3010                 val = jread32(jme, JME_SMBINTF);
3011         }
3012         if (!to) {
3013                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
3014                 return;
3015         }
3016
3017         mdelay(2);
3018 }
3019
3020 static int
3021 jme_get_eeprom_len(struct net_device *netdev)
3022 {
3023         struct jme_adapter *jme = netdev_priv(netdev);
3024         u32 val;
3025         val = jread32(jme, JME_SMBCSR);
3026         return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
3027 }
3028
3029 static int
3030 jme_get_eeprom(struct net_device *netdev,
3031                 struct ethtool_eeprom *eeprom, u8 *data)
3032 {
3033         struct jme_adapter *jme = netdev_priv(netdev);
3034         int i, offset = eeprom->offset, len = eeprom->len;
3035
3036         /*
3037          * ethtool will check the boundary for us
3038          */
3039         eeprom->magic = JME_EEPROM_MAGIC;
3040         for (i = 0 ; i < len ; ++i)
3041                 data[i] = jme_smb_read(jme, i + offset);
3042
3043         return 0;
3044 }
3045
3046 static int
3047 jme_set_eeprom(struct net_device *netdev,
3048                 struct ethtool_eeprom *eeprom, u8 *data)
3049 {
3050         struct jme_adapter *jme = netdev_priv(netdev);
3051         int i, offset = eeprom->offset, len = eeprom->len;
3052
3053         if (eeprom->magic != JME_EEPROM_MAGIC)
3054                 return -EINVAL;
3055
3056         /*
3057          * ethtool will check the boundary for us
3058          */
3059         for (i = 0 ; i < len ; ++i)
3060                 jme_smb_write(jme, i + offset, data[i]);
3061
3062         return 0;
3063 }
3064
3065 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
3066 static struct ethtool_ops jme_ethtool_ops = {
3067 #else
3068 static const struct ethtool_ops jme_ethtool_ops = {
3069 #endif
3070         .get_drvinfo            = jme_get_drvinfo,
3071         .get_regs_len           = jme_get_regs_len,
3072         .get_regs               = jme_get_regs,
3073         .get_coalesce           = jme_get_coalesce,
3074         .set_coalesce           = jme_set_coalesce,
3075         .get_pauseparam         = jme_get_pauseparam,
3076         .set_pauseparam         = jme_set_pauseparam,
3077         .get_wol                = jme_get_wol,
3078         .set_wol                = jme_set_wol,
3079         .get_settings           = jme_get_settings,
3080         .set_settings           = jme_set_settings,
3081         .get_link               = jme_get_link,
3082         .get_msglevel           = jme_get_msglevel,
3083         .set_msglevel           = jme_set_msglevel,
3084         .get_rx_csum            = jme_get_rx_csum,
3085         .set_rx_csum            = jme_set_rx_csum,
3086         .set_tx_csum            = jme_set_tx_csum,
3087         .set_tso                = jme_set_tso,
3088         .set_sg                 = ethtool_op_set_sg,
3089         .nway_reset             = jme_nway_reset,
3090         .get_eeprom_len         = jme_get_eeprom_len,
3091         .get_eeprom             = jme_get_eeprom,
3092         .set_eeprom             = jme_set_eeprom,
3093 };
3094
3095 static int
3096 jme_pci_dma64(struct pci_dev *pdev)
3097 {
3098         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
3099 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3100             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
3101 #else
3102             !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
3103 #endif
3104            )
3105 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3106                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
3107 #else
3108                 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
3109 #endif
3110                         return 1;
3111
3112         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
3113 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3114             !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
3115 #else
3116             !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
3117 #endif
3118            )
3119 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3120                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
3121 #else
3122                 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
3123 #endif
3124                         return 1;
3125
3126 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3127         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
3128                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
3129 #else
3130         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
3131                 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
3132 #endif
3133                         return 0;
3134
3135         return -1;
3136 }
3137
3138 static inline void
3139 jme_phy_init(struct jme_adapter *jme)
3140 {
3141         u16 reg26;
3142
3143         reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
3144         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
3145 }
3146
3147 static inline void
3148 jme_check_hw_ver(struct jme_adapter *jme)
3149 {
3150         u32 chipmode;
3151
3152         chipmode = jread32(jme, JME_CHIPMODE);
3153
3154         jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
3155         jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
3156         jme->chip_main_rev = jme->chiprev & 0xF;
3157         jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF;
3158 }
3159
3160 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3161 static const struct net_device_ops jme_netdev_ops = {
3162         .ndo_open               = jme_open,
3163         .ndo_stop               = jme_close,
3164         .ndo_validate_addr      = eth_validate_addr,
3165         .ndo_do_ioctl           = jme_ioctl,
3166         .ndo_start_xmit         = jme_start_xmit,
3167         .ndo_set_mac_address    = jme_set_macaddr,
3168         .ndo_set_multicast_list = jme_set_multi,
3169         .ndo_change_mtu         = jme_change_mtu,
3170         .ndo_tx_timeout         = jme_tx_timeout,
3171         .ndo_vlan_rx_register   = jme_vlan_rx_register,
3172 };
3173 #endif
3174
3175 static int __devinit
3176 jme_init_one(struct pci_dev *pdev,
3177              const struct pci_device_id *ent)
3178 {
3179         int rc = 0, using_dac, i;
3180         struct net_device *netdev;
3181         struct jme_adapter *jme;
3182         u16 bmcr, bmsr;
3183         u32 apmc;
3184
3185         /*
3186          * set up PCI device basics
3187          */
3188         rc = pci_enable_device(pdev);
3189         if (rc) {
3190                 pr_err("Cannot enable PCI device\n");
3191                 goto err_out;
3192         }
3193
3194         using_dac = jme_pci_dma64(pdev);
3195         if (using_dac < 0) {
3196                 pr_err("Cannot set PCI DMA Mask\n");
3197                 rc = -EIO;
3198                 goto err_out_disable_pdev;
3199         }
3200
3201         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
3202                 pr_err("No PCI resource region found\n");
3203                 rc = -ENOMEM;
3204                 goto err_out_disable_pdev;
3205         }
3206
3207         rc = pci_request_regions(pdev, DRV_NAME);
3208         if (rc) {
3209                 pr_err("Cannot obtain PCI resource region\n");
3210                 goto err_out_disable_pdev;
3211         }
3212
3213         pci_set_master(pdev);
3214
3215         /*
3216          * alloc and init net device
3217          */
3218         netdev = alloc_etherdev(sizeof(*jme));
3219         if (!netdev) {
3220                 pr_err("Cannot allocate netdev structure\n");
3221                 rc = -ENOMEM;
3222                 goto err_out_release_regions;
3223         }
3224 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3225         netdev->netdev_ops = &jme_netdev_ops;
3226 #else
3227         netdev->open                    = jme_open;
3228         netdev->stop                    = jme_close;
3229         netdev->do_ioctl                = jme_ioctl;
3230         netdev->hard_start_xmit         = jme_start_xmit;
3231         netdev->set_mac_address         = jme_set_macaddr;
3232         netdev->set_multicast_list      = jme_set_multi;
3233         netdev->change_mtu              = jme_change_mtu;
3234         netdev->tx_timeout              = jme_tx_timeout;
3235         netdev->vlan_rx_register        = jme_vlan_rx_register;
3236 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
3237         netdev->vlan_rx_kill_vid        = jme_vlan_rx_kill_vid;
3238 #endif
3239         NETDEV_GET_STATS(netdev, &jme_get_stats);
3240 #endif
3241         netdev->ethtool_ops             = &jme_ethtool_ops;
3242         netdev->watchdog_timeo          = TX_TIMEOUT;
3243         netdev->features                =       NETIF_F_IP_CSUM |
3244                                                 NETIF_F_IPV6_CSUM |
3245                                                 NETIF_F_SG |
3246                                                 NETIF_F_TSO |
3247                                                 NETIF_F_TSO6 |
3248                                                 NETIF_F_HW_VLAN_TX |
3249                                                 NETIF_F_HW_VLAN_RX;
3250         if (using_dac)
3251                 netdev->features        |=      NETIF_F_HIGHDMA;
3252
3253         SET_NETDEV_DEV(netdev, &pdev->dev);
3254         pci_set_drvdata(pdev, netdev);
3255
3256         /*
3257          * init adapter info
3258          */
3259         jme = netdev_priv(netdev);
3260         jme->pdev = pdev;
3261         jme->dev = netdev;
3262         jme->jme_rx = netif_rx;
3263         jme->jme_vlan_rx = vlan_hwaccel_rx;
3264         jme->old_mtu = netdev->mtu = 1500;
3265         jme->phylink = 0;
3266         jme->tx_ring_size = 1 << 10;
3267         jme->tx_ring_mask = jme->tx_ring_size - 1;
3268         jme->tx_wake_threshold = 1 << 9;
3269         jme->rx_ring_size = 1 << 9;
3270         jme->rx_ring_mask = jme->rx_ring_size - 1;
3271         jme->msg_enable = JME_DEF_MSG_ENABLE;
3272         jme->regs = ioremap(pci_resource_start(pdev, 0),
3273                              pci_resource_len(pdev, 0));
3274
3275
3276         if (!(jme->regs)) {
3277                 pr_err("Mapping PCI resource region error\n");
3278                 rc = -ENOMEM;
3279                 goto err_out_free_netdev;
3280         }
3281
3282         if (no_pseudohp) {
3283                 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
3284                 jwrite32(jme, JME_APMC, apmc);
3285         } else if (force_pseudohp) {
3286                 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
3287                 jwrite32(jme, JME_APMC, apmc);
3288         }
3289
3290         NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3291
3292         spin_lock_init(&jme->phy_lock);
3293         spin_lock_init(&jme->macaddr_lock);
3294         spin_lock_init(&jme->rxmcs_lock);
3295
3296         atomic_set(&jme->link_changing, 1);
3297         atomic_set(&jme->rx_cleaning, 1);
3298         atomic_set(&jme->tx_cleaning, 1);
3299         atomic_set(&jme->rx_empty, 1);
3300
3301         tasklet_init(&jme->pcc_task,
3302                      jme_pcc_tasklet,
3303                      (unsigned long) jme);
3304         tasklet_init(&jme->linkch_task,
3305                      jme_link_change_tasklet,
3306                      (unsigned long) jme);
3307         tasklet_init(&jme->txclean_task,
3308                      jme_tx_clean_tasklet,
3309                      (unsigned long) jme);
3310         tasklet_init(&jme->rxclean_task,
3311                      jme_rx_clean_tasklet,
3312                      (unsigned long) jme);
3313         tasklet_init(&jme->rxempty_task,
3314                      jme_rx_empty_tasklet,
3315                      (unsigned long) jme);
3316         tasklet_disable_nosync(&jme->linkch_task);
3317         tasklet_disable_nosync(&jme->txclean_task);
3318         tasklet_disable_nosync(&jme->rxclean_task);
3319         tasklet_disable_nosync(&jme->rxempty_task);
3320
3321         jme->dpi.cur = PCC_P1;
3322
3323         jme->reg_ghc = 0;
3324         jme->reg_rxcs = RXCS_DEFAULT;
3325         jme->reg_rxmcs = RXMCS_DEFAULT;
3326         jme->reg_txpfc = 0;
3327         jme->reg_pmcs = PMCS_MFEN;
3328         jme->reg_gpreg1 = GPREG1_DEFAULT;
3329         set_bit(JME_FLAG_TXCSUM, &jme->flags);
3330         set_bit(JME_FLAG_TSO, &jme->flags);
3331
3332         /*
3333          * Get Max Read Req Size from PCI Config Space
3334          */
3335         pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3336         jme->mrrs &= PCI_DCSR_MRRS_MASK;
3337         switch (jme->mrrs) {
3338         case MRRS_128B:
3339                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3340                 break;
3341         case MRRS_256B:
3342                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3343                 break;
3344         default:
3345                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3346                 break;
3347         }
3348
3349         /*
3350          * Must check before reset_mac_processor
3351          */
3352         jme_check_hw_ver(jme);
3353         jme->mii_if.dev = netdev;
3354         if (jme->fpgaver) {
3355                 jme->mii_if.phy_id = 0;
3356                 for (i = 1 ; i < 32 ; ++i) {
3357                         bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3358                         bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3359                         if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3360                                 jme->mii_if.phy_id = i;
3361                                 break;
3362                         }
3363                 }
3364
3365                 if (!jme->mii_if.phy_id) {
3366                         rc = -EIO;
3367                         pr_err("Can not find phy_id\n");
3368                         goto err_out_unmap;
3369                 }
3370
3371                 jme->reg_ghc |= GHC_LINK_POLL;
3372         } else {
3373                 jme->mii_if.phy_id = 1;
3374         }
3375         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3376                 jme->mii_if.supports_gmii = true;
3377         else
3378                 jme->mii_if.supports_gmii = false;
3379         jme->mii_if.phy_id_mask = 0x1F;
3380         jme->mii_if.reg_num_mask = 0x1F;
3381         jme->mii_if.mdio_read = jme_mdio_read;
3382         jme->mii_if.mdio_write = jme_mdio_write;
3383         jme_clear_pm(jme);
3384         jme_set_phyfifo_5level(jme);
3385         pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev);
3386         if (!jme->fpgaver)
3387                 jme_phy_init(jme);
3388         jme_phy_off(jme);
3389
3390         /*
3391          * Reset MAC processor and reload EEPROM for MAC Address
3392          */
3393         jme_reset_mac_processor(jme);
3394         rc = jme_reload_eeprom(jme);
3395         if (rc) {
3396                 pr_err("Reload eeprom for reading MAC Address error\n");
3397                 goto err_out_unmap;
3398         }
3399         jme_load_macaddr(netdev);
3400
3401         /*
3402          * Tell stack that we are not ready to work until open()
3403          */
3404         netif_carrier_off(netdev);
3405         rc = register_netdev(netdev);
3406         if (rc) {
3407                 pr_err("Cannot register net device\n");
3408                 goto err_out_unmap;
3409         }
3410
3411         init_timer(&(jme->asd_timer));
3412         jme->mc_count = 0;
3413         jme->flag_run_asd = false;
3414         jme->flag_media_connected = false;
3415
3416         netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x "
3417                    "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3418                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3419                    "JMC250 Gigabit Ethernet" :
3420                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3421                    "JMC260 Fast Ethernet" : "Unknown",
3422                    (jme->fpgaver != 0) ? " (FPGA)" : "",
3423                    (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3424                    jme->pcirev,
3425                    netdev->dev_addr[0],
3426                    netdev->dev_addr[1],
3427                    netdev->dev_addr[2],
3428                    netdev->dev_addr[3],
3429                    netdev->dev_addr[4],
3430                    netdev->dev_addr[5]);
3431
3432         return 0;
3433
3434 err_out_unmap:
3435         iounmap(jme->regs);
3436 err_out_free_netdev:
3437         pci_set_drvdata(pdev, NULL);
3438         free_netdev(netdev);
3439 err_out_release_regions:
3440         pci_release_regions(pdev);
3441 err_out_disable_pdev:
3442         pci_disable_device(pdev);
3443 err_out:
3444         return rc;
3445 }
3446
3447 static void __devexit
3448 jme_remove_one(struct pci_dev *pdev)
3449 {
3450         struct net_device *netdev = pci_get_drvdata(pdev);
3451         struct jme_adapter *jme = netdev_priv(netdev);
3452
3453         del_timer_sync(&jme->asd_timer);        /* Kill if running      */
3454         unregister_netdev(netdev);
3455         iounmap(jme->regs);
3456         pci_set_drvdata(pdev, NULL);
3457         free_netdev(netdev);
3458         pci_release_regions(pdev);
3459         pci_disable_device(pdev);
3460
3461 }
3462
3463 static void
3464 jme_shutdown(struct pci_dev *pdev)
3465 {
3466         struct net_device *netdev = pci_get_drvdata(pdev);
3467         struct jme_adapter *jme = netdev_priv(netdev);
3468
3469         jme_powersave_phy(jme);
3470 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)
3471         pci_enable_wake(pdev, PCI_D3hot, true);
3472 #else
3473         pci_pme_active(pdev, true);
3474 #endif
3475 }
3476
3477 #ifdef CONFIG_PM
3478 static int
3479 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3480 {
3481         struct net_device *netdev = pci_get_drvdata(pdev);
3482         struct jme_adapter *jme = netdev_priv(netdev);
3483
3484         atomic_dec(&jme->link_changing);
3485
3486         netif_device_detach(netdev);
3487         netif_stop_queue(netdev);
3488         jme_stop_irq(jme);
3489
3490 //      del_timer_sync(&jme->asd_timer);        /* Kill if running      */
3491
3492         tasklet_disable(&jme->txclean_task);
3493         tasklet_disable(&jme->rxclean_task);
3494         tasklet_disable(&jme->rxempty_task);
3495
3496         if (netif_carrier_ok(netdev)) {
3497                 if (test_bit(JME_FLAG_POLL, &jme->flags))
3498                         jme_polling_mode(jme);
3499
3500                 jme_stop_pcc_timer(jme);
3501                 jme_disable_rx_engine(jme);
3502                 jme_disable_tx_engine(jme);
3503                 jme_reset_mac_processor(jme);
3504                 jme_free_rx_resources(jme);
3505                 jme_free_tx_resources(jme);
3506                 netif_carrier_off(netdev);
3507                 jme->phylink = 0;
3508         }
3509
3510         tasklet_enable(&jme->txclean_task);
3511         tasklet_hi_enable(&jme->rxclean_task);
3512         tasklet_hi_enable(&jme->rxempty_task);
3513
3514         pci_save_state(pdev);
3515         jme_powersave_phy(jme);
3516 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)
3517         pci_enable_wake(pdev, PCI_D3hot, true);
3518 #else
3519         pci_pme_active(pdev, true);
3520 #endif
3521         pci_set_power_state(pdev, PCI_D3hot);
3522
3523         jme->mc_count = 0;
3524         jme->flag_media_connected = false;
3525         return 0;
3526 }
3527
3528 static int
3529 jme_resume(struct pci_dev *pdev)
3530 {
3531         struct net_device *netdev = pci_get_drvdata(pdev);
3532         struct jme_adapter *jme = netdev_priv(netdev);
3533
3534         jme_clear_pm(jme);
3535         pci_restore_state(pdev);
3536
3537         jme_phy_on(jme);
3538         if (test_bit(JME_FLAG_SSET, &jme->flags))
3539                 jme_set_settings(netdev, &jme->old_ecmd);
3540         else
3541                 jme_reset_phy_processor(jme);
3542
3543         jme_start_irq(jme);
3544         netif_device_attach(netdev);
3545
3546         atomic_inc(&jme->link_changing);
3547
3548         jme_reset_link(jme);
3549
3550         return 0;
3551 }
3552 #endif
3553
3554 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3555 static struct pci_device_id jme_pci_tbl[] = {
3556 #else
3557 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3558 #endif
3559         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3560         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3561         { }
3562 };
3563
3564 static struct pci_driver jme_driver = {
3565         .name           = DRV_NAME,
3566         .id_table       = jme_pci_tbl,
3567         .probe          = jme_init_one,
3568         .remove         = __devexit_p(jme_remove_one),
3569 #ifdef CONFIG_PM
3570         .suspend        = jme_suspend,
3571         .resume         = jme_resume,
3572 #endif /* CONFIG_PM */
3573         .shutdown       = jme_shutdown,
3574 };
3575
3576 static int __init
3577 jme_init_module(void)
3578 {
3579         pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION);
3580         return pci_register_driver(&jme_driver);
3581 }
3582
3583 static void __exit
3584 jme_cleanup_module(void)
3585 {
3586         pci_unregister_driver(&jme_driver);
3587 }
3588
3589 module_init(jme_init_module);
3590 module_exit(jme_cleanup_module);
3591
3592 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3593 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3594 MODULE_LICENSE("GPL");
3595 MODULE_VERSION(DRV_VERSION);
3596 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3597