jme.c

   1 /*
   2  * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
   3  *
   4  * Copyright 2008 JMicron Technology Corporation
   5  * http://www.jmicron.com/
   6  * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org>
   7  *
   8  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  */
  24
  25 #include <linux/version.h>
  26 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
  27 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  28 #endif
  29
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/pci.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/etherdevice.h>
  35 #include <linux/ethtool.h>
  36 #include <linux/mii.h>
  37 #include <linux/crc32.h>
  38 #include <linux/delay.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/in.h>
  41 #include <linux/ip.h>
  42 #include <linux/ipv6.h>
  43 #include <linux/tcp.h>
  44 #include <linux/udp.h>
  45 #include <linux/if_vlan.h>
  46 #include <linux/slab.h>
  47 #include <net/ip6_checksum.h>
  48 #include "jme.h"
  49
  50 static int force_pseudohp = -1;
  51 static int no_pseudohp = -1;
  52 static int no_extplug = -1;
  53 module_param(force_pseudohp, int, 0);
  54 MODULE_PARM_DESC(force_pseudohp,
  55         "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
  56 module_param(no_pseudohp, int, 0);
  57 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
  58 module_param(no_extplug, int, 0);
  59 MODULE_PARM_DESC(no_extplug,
  60         "Do not use external plug signal for pseudo hot-plug.");
  61
  62 static void
  63 jme_pci_wakeup_enable(struct jme_adapter *jme, int enable)
  64 {
  65 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)
  66         pci_enable_wake(jme->pdev, PCI_D1, enable);
  67         pci_enable_wake(jme->pdev, PCI_D2, enable);
  68         pci_enable_wake(jme->pdev, PCI_D3hot, enable);
  69         pci_enable_wake(jme->pdev, PCI_D3cold, enable);
  70 #else
  71         pci_pme_active(jme->pdev, enable);
  72 #endif
  73 }
  74
  75 static int
  76 jme_mdio_read(struct net_device *netdev, int phy, int reg)
  77 {
  78         struct jme_adapter *jme = netdev_priv(netdev);
  79         int i, val, again = (reg == MII_BMSR) ? 1 : 0;
  80
  81 read_again:
  82         jwrite32(jme, JME_SMI, SMI_OP_REQ |
  83                                 smi_phy_addr(phy) |
  84                                 smi_reg_addr(reg));
  85
  86         wmb();
  87         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
  88                 udelay(20);
  89                 val = jread32(jme, JME_SMI);
  90                 if ((val & SMI_OP_REQ) == 0)
  91                         break;
  92         }
  93
  94         if (i == 0) {
  95                 pr_err("phy(%d) read timeout : %d\n", phy, reg);
  96                 return 0;
  97         }
  98
  99         if (again--)
 100                 goto read_again;
 101
 102         return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
 103 }
 104
 105 static void
 106 jme_mdio_write(struct net_device *netdev,
 107                                 int phy, int reg, int val)
 108 {
 109         struct jme_adapter *jme = netdev_priv(netdev);
 110         int i;
 111
 112         jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
 113                 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
 114                 smi_phy_addr(phy) | smi_reg_addr(reg));
 115
 116         wmb();
 117         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
 118                 udelay(20);
 119                 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
 120                         break;
 121         }
 122
 123         if (i == 0)
 124                 pr_err("phy(%d) write timeout : %d\n", phy, reg);
 125 }
 126
 127 static inline void
 128 jme_reset_phy_processor(struct jme_adapter *jme)
 129 {
 130         u32 val;
 131
 132         jme_mdio_write(jme->dev,
 133                         jme->mii_if.phy_id,
 134                         MII_ADVERTISE, ADVERTISE_ALL |
 135                         ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 136
 137         if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
 138                 jme_mdio_write(jme->dev,
 139                                 jme->mii_if.phy_id,
 140                                 MII_CTRL1000,
 141                                 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
 142
 143         val = jme_mdio_read(jme->dev,
 144                                 jme->mii_if.phy_id,
 145                                 MII_BMCR);
 146
 147         jme_mdio_write(jme->dev,
 148                         jme->mii_if.phy_id,
 149                         MII_BMCR, val | BMCR_RESET);
 150 }
 151
 152 static void
 153 jme_setup_wakeup_frame(struct jme_adapter *jme,
 154                        const u32 *mask, u32 crc, int fnr)
 155 {
 156         int i;
 157
 158         /*
 159          * Setup CRC pattern
 160          */
 161         jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
 162         wmb();
 163         jwrite32(jme, JME_WFODP, crc);
 164         wmb();
 165
 166         /*
 167          * Setup Mask
 168          */
 169         for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
 170                 jwrite32(jme, JME_WFOI,
 171                                 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
 172                                 (fnr & WFOI_FRAME_SEL));
 173                 wmb();
 174                 jwrite32(jme, JME_WFODP, mask[i]);
 175                 wmb();
 176         }
 177 }
 178
 179 static inline void
 180 jme_mac_rxclk_off(struct jme_adapter *jme)
 181 {
 182         jme->reg_gpreg1 |= GPREG1_RXCLKOFF;
 183         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 184 }
 185
 186 static inline void
 187 jme_mac_rxclk_on(struct jme_adapter *jme)
 188 {
 189         jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF;
 190         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
 191 }
 192
 193 static inline void
 194 jme_mac_txclk_off(struct jme_adapter *jme)
 195 {
 196         jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC);
 197         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 198 }
 199
 200 static inline void
 201 jme_mac_txclk_on(struct jme_adapter *jme)
 202 {
 203         u32 speed = jme->reg_ghc & GHC_SPEED;
 204         if (speed == GHC_SPEED_1000M)
 205                 jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
 206         else
 207                 jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
 208         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 209 }
 210
 211 static inline void
 212 jme_reset_ghc_speed(struct jme_adapter *jme)
 213 {
 214         jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX);
 215         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 216 }
 217
 218 static inline void
 219 jme_reset_250A2_workaround(struct jme_adapter *jme)
 220 {
 221         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 222                              GPREG1_RSSPATCH);
 223         jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 224 }
 225
 226 static inline void
 227 jme_assert_ghc_reset(struct jme_adapter *jme)
 228 {
 229         jme->reg_ghc |= GHC_SWRST;
 230         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 231 }
 232
 233 static inline void
 234 jme_clear_ghc_reset(struct jme_adapter *jme)
 235 {
 236         jme->reg_ghc &= ~GHC_SWRST;
 237         jwrite32f(jme, JME_GHC, jme->reg_ghc);
 238 }
 239
 240 static inline void
 241 jme_reset_mac_processor(struct jme_adapter *jme)
 242 {
 243         static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
 244         u32 crc = 0xCDCDCDCD;
 245         u32 gpreg0;
 246         int i;
 247
 248         jme_reset_ghc_speed(jme);
 249         jme_reset_250A2_workaround(jme);
 250
 251         jme_mac_rxclk_on(jme);
 252         jme_mac_txclk_on(jme);
 253         udelay(1);
 254         jme_assert_ghc_reset(jme);
 255         udelay(1);
 256         jme_mac_rxclk_off(jme);
 257         jme_mac_txclk_off(jme);
 258         udelay(1);
 259         jme_clear_ghc_reset(jme);
 260         udelay(1);
 261         jme_mac_rxclk_on(jme);
 262         jme_mac_txclk_on(jme);
 263         udelay(1);
 264         jme_mac_rxclk_off(jme);
 265         jme_mac_txclk_off(jme);
 266
 267         jwrite32(jme, JME_RXDBA_LO, 0x00000000);
 268         jwrite32(jme, JME_RXDBA_HI, 0x00000000);
 269         jwrite32(jme, JME_RXQDC, 0x00000000);
 270         jwrite32(jme, JME_RXNDA, 0x00000000);
 271         jwrite32(jme, JME_TXDBA_LO, 0x00000000);
 272         jwrite32(jme, JME_TXDBA_HI, 0x00000000);
 273         jwrite32(jme, JME_TXQDC, 0x00000000);
 274         jwrite32(jme, JME_TXNDA, 0x00000000);
 275
 276         jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
 277         jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
 278         for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
 279                 jme_setup_wakeup_frame(jme, mask, crc, i);
 280         if (jme->fpgaver)
 281                 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
 282         else
 283                 gpreg0 = GPREG0_DEFAULT;
 284         jwrite32(jme, JME_GPREG0, gpreg0);
 285 }
 286
 287 static inline void
 288 jme_clear_pm(struct jme_adapter *jme)
 289 {
 290         jwrite32(jme, JME_PMCS, PMCS_STMASK | jme->reg_pmcs);
 291 }
 292
 293 static int
 294 jme_reload_eeprom(struct jme_adapter *jme)
 295 {
 296         u32 val;
 297         int i;
 298
 299         val = jread32(jme, JME_SMBCSR);
 300
 301         if (val & SMBCSR_EEPROMD) {
 302                 val |= SMBCSR_CNACK;
 303                 jwrite32(jme, JME_SMBCSR, val);
 304                 val |= SMBCSR_RELOAD;
 305                 jwrite32(jme, JME_SMBCSR, val);
 306                 mdelay(12);
 307
 308                 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
 309                         mdelay(1);
 310                         if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
 311                                 break;
 312                 }
 313
 314                 if (i == 0) {
 315                         pr_err("eeprom reload timeout\n");
 316                         return -EIO;
 317                 }
 318         }
 319
 320         return 0;
 321 }
 322
 323 static void
 324 jme_load_macaddr(struct net_device *netdev)
 325 {
 326         struct jme_adapter *jme = netdev_priv(netdev);
 327         unsigned char macaddr[6];
 328         u32 val;
 329
 330         spin_lock_bh(&jme->macaddr_lock);
 331         val = jread32(jme, JME_RXUMA_LO);
 332         macaddr[0] = (val >>  0) & 0xFF;
 333         macaddr[1] = (val >>  8) & 0xFF;
 334         macaddr[2] = (val >> 16) & 0xFF;
 335         macaddr[3] = (val >> 24) & 0xFF;
 336         val = jread32(jme, JME_RXUMA_HI);
 337         macaddr[4] = (val >>  0) & 0xFF;
 338         macaddr[5] = (val >>  8) & 0xFF;
 339         memcpy(netdev->dev_addr, macaddr, 6);
 340         spin_unlock_bh(&jme->macaddr_lock);
 341 }
 342
 343 static inline void
 344 jme_set_rx_pcc(struct jme_adapter *jme, int p)
 345 {
 346         switch (p) {
 347         case PCC_OFF:
 348                 jwrite32(jme, JME_PCCRX0,
 349                         ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 350                         ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 351                 break;
 352         case PCC_P1:
 353                 jwrite32(jme, JME_PCCRX0,
 354                         ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 355                         ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 356                 break;
 357         case PCC_P2:
 358                 jwrite32(jme, JME_PCCRX0,
 359                         ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 360                         ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 361                 break;
 362         case PCC_P3:
 363                 jwrite32(jme, JME_PCCRX0,
 364                         ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
 365                         ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
 366                 break;
 367         default:
 368                 break;
 369         }
 370         wmb();
 371
 372         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
 373                 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
 374 }
 375
 376 static void
 377 jme_start_irq(struct jme_adapter *jme)
 378 {
 379         register struct dynpcc_info *dpi = &(jme->dpi);
 380
 381         jme_set_rx_pcc(jme, PCC_P1);
 382         dpi->cur                = PCC_P1;
 383         dpi->attempt            = PCC_P1;
 384         dpi->cnt                = 0;
 385
 386         jwrite32(jme, JME_PCCTX,
 387                         ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
 388                         ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
 389                         PCCTXQ0_EN
 390                 );
 391
 392         /*
 393          * Enable Interrupts
 394          */
 395         jwrite32(jme, JME_IENS, INTR_ENABLE);
 396 }
 397
 398 static inline void
 399 jme_stop_irq(struct jme_adapter *jme)
 400 {
 401         /*
 402          * Disable Interrupts
 403          */
 404         jwrite32f(jme, JME_IENC, INTR_ENABLE);
 405 }
 406
 407 static u32
 408 jme_linkstat_from_phy(struct jme_adapter *jme)
 409 {
 410         u32 phylink, bmsr;
 411
 412         phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
 413         bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
 414         if (bmsr & BMSR_ANCOMP)
 415                 phylink |= PHY_LINK_AUTONEG_COMPLETE;
 416
 417         return phylink;
 418 }
 419
 420 static inline void
 421 jme_set_phyfifo_5level(struct jme_adapter *jme)
 422 {
 423         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
 424 }
 425
 426 static inline void
 427 jme_set_phyfifo_8level(struct jme_adapter *jme)
 428 {
 429         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
 430 }
 431
 432 static int
 433 jme_check_link(struct net_device *netdev, int testonly)
 434 {
 435         struct jme_adapter *jme = netdev_priv(netdev);
 436         u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr;
 437         char linkmsg[64];
 438         int rc = 0;
 439
 440         linkmsg[0] = '\0';
 441
 442         if (jme->fpgaver)
 443                 phylink = jme_linkstat_from_phy(jme);
 444         else
 445                 phylink = jread32(jme, JME_PHY_LINK);
 446
 447         if (phylink & PHY_LINK_UP) {
 448                 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
 449                         /*
 450                          * If we did not enable AN
 451                          * Speed/Duplex Info should be obtained from SMI
 452                          */
 453                         phylink = PHY_LINK_UP;
 454
 455                         bmcr = jme_mdio_read(jme->dev,
 456                                                 jme->mii_if.phy_id,
 457                                                 MII_BMCR);
 458
 459                         phylink |= ((bmcr & BMCR_SPEED1000) &&
 460                                         (bmcr & BMCR_SPEED100) == 0) ?
 461                                         PHY_LINK_SPEED_1000M :
 462                                         (bmcr & BMCR_SPEED100) ?
 463                                         PHY_LINK_SPEED_100M :
 464                                         PHY_LINK_SPEED_10M;
 465
 466                         phylink |= (bmcr & BMCR_FULLDPLX) ?
 467                                          PHY_LINK_DUPLEX : 0;
 468
 469                         strcat(linkmsg, "Forced: ");
 470                 } else {
 471                         /*
 472                          * Keep polling for speed/duplex resolve complete
 473                          */
 474                         while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
 475                                 --cnt) {
 476
 477                                 udelay(1);
 478
 479                                 if (jme->fpgaver)
 480                                         phylink = jme_linkstat_from_phy(jme);
 481                                 else
 482                                         phylink = jread32(jme, JME_PHY_LINK);
 483                         }
 484                         if (!cnt)
 485                                 pr_err("Waiting speed resolve timeout\n");
 486
 487                         strcat(linkmsg, "ANed: ");
 488                 }
 489
 490                 if (jme->phylink == phylink) {
 491                         rc = 1;
 492                         goto out;
 493                 }
 494                 if (testonly)
 495                         goto out;
 496
 497                 jme->phylink = phylink;
 498
 499                 /*
 500                  * The speed/duplex setting of jme->reg_ghc already cleared
 501                  * by jme_reset_mac_processor()
 502                  */
 503                 switch (phylink & PHY_LINK_SPEED_MASK) {
 504                 case PHY_LINK_SPEED_10M:
 505                         jme->reg_ghc |= GHC_SPEED_10M;
 506                         strcat(linkmsg, "10 Mbps, ");
 507                         break;
 508                 case PHY_LINK_SPEED_100M:
 509                         jme->reg_ghc |= GHC_SPEED_100M;
 510                         strcat(linkmsg, "100 Mbps, ");
 511                         break;
 512                 case PHY_LINK_SPEED_1000M:
 513                         jme->reg_ghc |= GHC_SPEED_1000M;
 514                         strcat(linkmsg, "1000 Mbps, ");
 515                         break;
 516                 default:
 517                         break;
 518                 }
 519
 520                 if (phylink & PHY_LINK_DUPLEX) {
 521                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
 522                         jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX);
 523                         jme->reg_ghc |= GHC_DPX;
 524                 } else {
 525                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
 526                                                 TXMCS_BACKOFF |
 527                                                 TXMCS_CARRIERSENSE |
 528                                                 TXMCS_COLLISION);
 529                         jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX);
 530                 }
 531
 532                 jwrite32(jme, JME_GHC, jme->reg_ghc);
 533
 534                 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
 535                         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
 536                                              GPREG1_RSSPATCH);
 537                         if (!(phylink & PHY_LINK_DUPLEX))
 538                                 jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH;
 539                         switch (phylink & PHY_LINK_SPEED_MASK) {
 540                         case PHY_LINK_SPEED_10M:
 541                                 jme_set_phyfifo_8level(jme);
 542                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 543                                 break;
 544                         case PHY_LINK_SPEED_100M:
 545                                 jme_set_phyfifo_5level(jme);
 546                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
 547                                 break;
 548                         case PHY_LINK_SPEED_1000M:
 549                                 jme_set_phyfifo_8level(jme);
 550                                 break;
 551                         default:
 552                                 break;
 553                         }
 554                 }
 555                 jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
 556
 557                 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
 558                                         "Full-Duplex, " :
 559                                         "Half-Duplex, ");
 560                 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
 561                                         "MDI-X" :
 562                                         "MDI");
 563                 netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg);
 564                 netif_carrier_on(netdev);
 565         } else {
 566                 if (testonly)
 567                         goto out;
 568
 569                 netif_info(jme, link, jme->dev, "Link is down\n");
 570                 jme->phylink = 0;
 571                 netif_carrier_off(netdev);
 572         }
 573
 574 out:
 575         return rc;
 576 }
 577
 578 static int
 579 jme_setup_tx_resources(struct jme_adapter *jme)
 580 {
 581         struct jme_ring *txring = &(jme->txring[0]);
 582
 583         txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 584                                    TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 585                                    &(txring->dmaalloc),
 586                                    GFP_ATOMIC);
 587
 588         if (!txring->alloc)
 589                 goto err_set_null;
 590
 591         /*
 592          * 16 Bytes align
 593          */
 594         txring->desc            = (void *)ALIGN((unsigned long)(txring->alloc),
 595                                                 RING_DESC_ALIGN);
 596         txring->dma             = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
 597         txring->next_to_use     = 0;
 598         atomic_set(&txring->next_to_clean, 0);
 599         atomic_set(&txring->nr_free, jme->tx_ring_size);
 600
 601         txring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 602                                         jme->tx_ring_size, GFP_ATOMIC);
 603         if (unlikely(!(txring->bufinf)))
 604                 goto err_free_txring;
 605
 606         /*
 607          * Initialize Transmit Descriptors
 608          */
 609         memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
 610         memset(txring->bufinf, 0,
 611                 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
 612
 613         return 0;
 614
 615 err_free_txring:
 616         dma_free_coherent(&(jme->pdev->dev),
 617                           TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 618                           txring->alloc,
 619                           txring->dmaalloc);
 620
 621 err_set_null:
 622         txring->desc = NULL;
 623         txring->dmaalloc = 0;
 624         txring->dma = 0;
 625         txring->bufinf = NULL;
 626
 627         return -ENOMEM;
 628 }
 629
 630 static void
 631 jme_free_tx_resources(struct jme_adapter *jme)
 632 {
 633         int i;
 634         struct jme_ring *txring = &(jme->txring[0]);
 635         struct jme_buffer_info *txbi;
 636
 637         if (txring->alloc) {
 638                 if (txring->bufinf) {
 639                         for (i = 0 ; i < jme->tx_ring_size ; ++i) {
 640                                 txbi = txring->bufinf + i;
 641                                 if (txbi->skb) {
 642                                         dev_kfree_skb(txbi->skb);
 643                                         txbi->skb = NULL;
 644                                 }
 645                                 txbi->mapping           = 0;
 646                                 txbi->len               = 0;
 647                                 txbi->nr_desc           = 0;
 648                                 txbi->start_xmit        = 0;
 649                         }
 650                         kfree(txring->bufinf);
 651                 }
 652
 653                 dma_free_coherent(&(jme->pdev->dev),
 654                                   TX_RING_ALLOC_SIZE(jme->tx_ring_size),
 655                                   txring->alloc,
 656                                   txring->dmaalloc);
 657
 658                 txring->alloc           = NULL;
 659                 txring->desc            = NULL;
 660                 txring->dmaalloc        = 0;
 661                 txring->dma             = 0;
 662                 txring->bufinf          = NULL;
 663         }
 664         txring->next_to_use     = 0;
 665         atomic_set(&txring->next_to_clean, 0);
 666         atomic_set(&txring->nr_free, 0);
 667 }
 668
 669 static inline void
 670 jme_enable_tx_engine(struct jme_adapter *jme)
 671 {
 672         /*
 673          * Select Queue 0
 674          */
 675         jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
 676         wmb();
 677
 678         /*
 679          * Setup TX Queue 0 DMA Bass Address
 680          */
 681         jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 682         jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
 683         jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
 684
 685         /*
 686          * Setup TX Descptor Count
 687          */
 688         jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
 689
 690         /*
 691          * Enable TX Engine
 692          */
 693         wmb();
 694         jwrite32f(jme, JME_TXCS, jme->reg_txcs |
 695                                 TXCS_SELECT_QUEUE0 |
 696                                 TXCS_ENABLE);
 697
 698         /*
 699          * Start clock for TX MAC Processor
 700          */
 701         jme_mac_txclk_on(jme);
 702 }
 703
 704 static inline void
 705 jme_restart_tx_engine(struct jme_adapter *jme)
 706 {
 707         /*
 708          * Restart TX Engine
 709          */
 710         jwrite32(jme, JME_TXCS, jme->reg_txcs |
 711                                 TXCS_SELECT_QUEUE0 |
 712                                 TXCS_ENABLE);
 713 }
 714
 715 static inline void
 716 jme_disable_tx_engine(struct jme_adapter *jme)
 717 {
 718         int i;
 719         u32 val;
 720
 721         /*
 722          * Disable TX Engine
 723          */
 724         jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
 725         wmb();
 726
 727         val = jread32(jme, JME_TXCS);
 728         for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
 729                 mdelay(1);
 730                 val = jread32(jme, JME_TXCS);
 731                 rmb();
 732         }
 733
 734         if (!i)
 735                 pr_err("Disable TX engine timeout\n");
 736
 737         /*
 738          * Stop clock for TX MAC Processor
 739          */
 740         jme_mac_txclk_off(jme);
 741 }
 742
 743 static void
 744 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
 745 {
 746         struct jme_ring *rxring = &(jme->rxring[0]);
 747         register struct rxdesc *rxdesc = rxring->desc;
 748         struct jme_buffer_info *rxbi = rxring->bufinf;
 749         rxdesc += i;
 750         rxbi += i;
 751
 752         rxdesc->dw[0] = 0;
 753         rxdesc->dw[1] = 0;
 754         rxdesc->desc1.bufaddrh  = cpu_to_le32((__u64)rxbi->mapping >> 32);
 755         rxdesc->desc1.bufaddrl  = cpu_to_le32(
 756                                         (__u64)rxbi->mapping & 0xFFFFFFFFUL);
 757         rxdesc->desc1.datalen   = cpu_to_le16(rxbi->len);
 758         if (jme->dev->features & NETIF_F_HIGHDMA)
 759                 rxdesc->desc1.flags = RXFLAG_64BIT;
 760         wmb();
 761         rxdesc->desc1.flags     |= RXFLAG_OWN | RXFLAG_INT;
 762 }
 763
 764 static int
 765 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
 766 {
 767         struct jme_ring *rxring = &(jme->rxring[0]);
 768         struct jme_buffer_info *rxbi = rxring->bufinf + i;
 769         struct sk_buff *skb;
 770
 771         skb = netdev_alloc_skb(jme->dev,
 772                 jme->dev->mtu + RX_EXTRA_LEN);
 773         if (unlikely(!skb))
 774                 return -ENOMEM;
 775 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
 776         skb->dev = jme->dev;
 777 #endif
 778
 779         rxbi->skb = skb;
 780         rxbi->len = skb_tailroom(skb);
 781         rxbi->mapping = pci_map_page(jme->pdev,
 782                                         virt_to_page(skb->data),
 783                                         offset_in_page(skb->data),
 784                                         rxbi->len,
 785                                         PCI_DMA_FROMDEVICE);
 786
 787         return 0;
 788 }
 789
 790 static void
 791 jme_free_rx_buf(struct jme_adapter *jme, int i)
 792 {
 793         struct jme_ring *rxring = &(jme->rxring[0]);
 794         struct jme_buffer_info *rxbi = rxring->bufinf;
 795         rxbi += i;
 796
 797         if (rxbi->skb) {
 798                 pci_unmap_page(jme->pdev,
 799                                  rxbi->mapping,
 800                                  rxbi->len,
 801                                  PCI_DMA_FROMDEVICE);
 802                 dev_kfree_skb(rxbi->skb);
 803                 rxbi->skb = NULL;
 804                 rxbi->mapping = 0;
 805                 rxbi->len = 0;
 806         }
 807 }
 808
 809 static void
 810 jme_free_rx_resources(struct jme_adapter *jme)
 811 {
 812         int i;
 813         struct jme_ring *rxring = &(jme->rxring[0]);
 814
 815         if (rxring->alloc) {
 816                 if (rxring->bufinf) {
 817                         for (i = 0 ; i < jme->rx_ring_size ; ++i)
 818                                 jme_free_rx_buf(jme, i);
 819                         kfree(rxring->bufinf);
 820                 }
 821
 822                 dma_free_coherent(&(jme->pdev->dev),
 823                                   RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 824                                   rxring->alloc,
 825                                   rxring->dmaalloc);
 826                 rxring->alloc    = NULL;
 827                 rxring->desc     = NULL;
 828                 rxring->dmaalloc = 0;
 829                 rxring->dma      = 0;
 830                 rxring->bufinf   = NULL;
 831         }
 832         rxring->next_to_use   = 0;
 833         atomic_set(&rxring->next_to_clean, 0);
 834 }
 835
 836 static int
 837 jme_setup_rx_resources(struct jme_adapter *jme)
 838 {
 839         int i;
 840         struct jme_ring *rxring = &(jme->rxring[0]);
 841
 842         rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
 843                                    RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 844                                    &(rxring->dmaalloc),
 845                                    GFP_ATOMIC);
 846         if (!rxring->alloc)
 847                 goto err_set_null;
 848
 849         /*
 850          * 16 Bytes align
 851          */
 852         rxring->desc            = (void *)ALIGN((unsigned long)(rxring->alloc),
 853                                                 RING_DESC_ALIGN);
 854         rxring->dma             = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
 855         rxring->next_to_use     = 0;
 856         atomic_set(&rxring->next_to_clean, 0);
 857
 858         rxring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
 859                                         jme->rx_ring_size, GFP_ATOMIC);
 860         if (unlikely(!(rxring->bufinf)))
 861                 goto err_free_rxring;
 862
 863         /*
 864          * Initiallize Receive Descriptors
 865          */
 866         memset(rxring->bufinf, 0,
 867                 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
 868         for (i = 0 ; i < jme->rx_ring_size ; ++i) {
 869                 if (unlikely(jme_make_new_rx_buf(jme, i))) {
 870                         jme_free_rx_resources(jme);
 871                         return -ENOMEM;
 872                 }
 873
 874                 jme_set_clean_rxdesc(jme, i);
 875         }
 876
 877         return 0;
 878
 879 err_free_rxring:
 880         dma_free_coherent(&(jme->pdev->dev),
 881                           RX_RING_ALLOC_SIZE(jme->rx_ring_size),
 882                           rxring->alloc,
 883                           rxring->dmaalloc);
 884 err_set_null:
 885         rxring->desc = NULL;
 886         rxring->dmaalloc = 0;
 887         rxring->dma = 0;
 888         rxring->bufinf = NULL;
 889
 890         return -ENOMEM;
 891 }
 892
 893 static inline void
 894 jme_enable_rx_engine(struct jme_adapter *jme)
 895 {
 896         /*
 897          * Select Queue 0
 898          */
 899         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 900                                 RXCS_QUEUESEL_Q0);
 901         wmb();
 902
 903         /*
 904          * Setup RX DMA Bass Address
 905          */
 906         jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 907         jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
 908         jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
 909
 910         /*
 911          * Setup RX Descriptor Count
 912          */
 913         jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
 914
 915         /*
 916          * Setup Unicast Filter
 917          */
 918         jme_set_unicastaddr(jme->dev);
 919         jme_set_multi(jme->dev);
 920
 921         /*
 922          * Enable RX Engine
 923          */
 924         wmb();
 925         jwrite32f(jme, JME_RXCS, jme->reg_rxcs |
 926                                 RXCS_QUEUESEL_Q0 |
 927                                 RXCS_ENABLE |
 928                                 RXCS_QST);
 929
 930         /*
 931          * Start clock for RX MAC Processor
 932          */
 933         jme_mac_rxclk_on(jme);
 934 }
 935
 936 static inline void
 937 jme_restart_rx_engine(struct jme_adapter *jme)
 938 {
 939         /*
 940          * Start RX Engine
 941          */
 942         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
 943                                 RXCS_QUEUESEL_Q0 |
 944                                 RXCS_ENABLE |
 945                                 RXCS_QST);
 946 }
 947
 948 static inline void
 949 jme_disable_rx_engine(struct jme_adapter *jme)
 950 {
 951         int i;
 952         u32 val;
 953
 954         /*
 955          * Disable RX Engine
 956          */
 957         jwrite32(jme, JME_RXCS, jme->reg_rxcs);
 958         wmb();
 959
 960         val = jread32(jme, JME_RXCS);
 961         for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
 962                 mdelay(1);
 963                 val = jread32(jme, JME_RXCS);
 964                 rmb();
 965         }
 966
 967         if (!i)
 968                 pr_err("Disable RX engine timeout\n");
 969
 970         /*
 971          * Stop clock for RX MAC Processor
 972          */
 973         jme_mac_rxclk_off(jme);
 974 }
 975
 976 static u16
 977 jme_udpsum(struct sk_buff *skb)
 978 {
 979         u16 csum = 0xFFFFu;
 980
 981         if (skb->len < (ETH_HLEN + sizeof(struct iphdr)))
 982                 return csum;
 983         if (skb->protocol != htons(ETH_P_IP))
 984                 return csum;
 985         skb_set_network_header(skb, ETH_HLEN);
 986         if ((ip_hdr(skb)->protocol != IPPROTO_UDP) ||
 987             (skb->len < (ETH_HLEN +
 988                         (ip_hdr(skb)->ihl << 2) +
 989                         sizeof(struct udphdr)))) {
 990                 skb_reset_network_header(skb);
 991                 return csum;
 992         }
 993         skb_set_transport_header(skb,
 994                         ETH_HLEN + (ip_hdr(skb)->ihl << 2));
 995         csum = udp_hdr(skb)->check;
 996         skb_reset_transport_header(skb);
 997         skb_reset_network_header(skb);
 998
 999         return csum;
1000 }
1001
1002 static int
1003 jme_rxsum_ok(struct jme_adapter *jme, u16 flags, struct sk_buff *skb)
1004 {
1005         if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
1006                 return false;
1007
1008         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
1009                         == RXWBFLAG_TCPON)) {
1010                 if (flags & RXWBFLAG_IPV4)
1011                         netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
1012                 return false;
1013         }
1014
1015         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
1016                         == RXWBFLAG_UDPON) && jme_udpsum(skb)) {
1017                 if (flags & RXWBFLAG_IPV4)
1018                         netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n");
1019                 return false;
1020         }
1021
1022         if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
1023                         == RXWBFLAG_IPV4)) {
1024                 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n");
1025                 return false;
1026         }
1027
1028         return true;
1029 }
1030
1031 static void
1032 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
1033 {
1034         struct jme_ring *rxring = &(jme->rxring[0]);
1035         struct rxdesc *rxdesc = rxring->desc;
1036         struct jme_buffer_info *rxbi = rxring->bufinf;
1037         struct sk_buff *skb;
1038         int framesize;
1039
1040         rxdesc += idx;
1041         rxbi += idx;
1042
1043         skb = rxbi->skb;
1044         pci_dma_sync_single_for_cpu(jme->pdev,
1045                                         rxbi->mapping,
1046                                         rxbi->len,
1047                                         PCI_DMA_FROMDEVICE);
1048
1049         if (unlikely(jme_make_new_rx_buf(jme, idx))) {
1050                 pci_dma_sync_single_for_device(jme->pdev,
1051                                                 rxbi->mapping,
1052                                                 rxbi->len,
1053                                                 PCI_DMA_FROMDEVICE);
1054
1055                 ++(NET_STAT(jme).rx_dropped);
1056         } else {
1057                 framesize = le16_to_cpu(rxdesc->descwb.framesize)
1058                                 - RX_PREPAD_SIZE;
1059
1060                 skb_reserve(skb, RX_PREPAD_SIZE);
1061                 skb_put(skb, framesize);
1062                 skb->protocol = eth_type_trans(skb, jme->dev);
1063
1064                 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags), skb))
1065                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1066                 else
1067 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,36)
1068                         skb->ip_summed = CHECKSUM_NONE;
1069 #else
1070                         skb_checksum_none_assert(skb);
1071 #endif
1072
1073                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
1074                         if (jme->vlgrp) {
1075                                 jme->jme_vlan_rx(skb, jme->vlgrp,
1076                                         le16_to_cpu(rxdesc->descwb.vlan));
1077                                 NET_STAT(jme).rx_bytes += 4;
1078                         } else {
1079                                 dev_kfree_skb(skb);
1080                         }
1081                 } else {
1082                         jme->jme_rx(skb);
1083                 }
1084
1085                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
1086                     cpu_to_le16(RXWBFLAG_DEST_MUL))
1087                         ++(NET_STAT(jme).multicast);
1088
1089                 NET_STAT(jme).rx_bytes += framesize;
1090                 ++(NET_STAT(jme).rx_packets);
1091         }
1092
1093         jme_set_clean_rxdesc(jme, idx);
1094
1095 }
1096
1097 static int
1098 jme_process_receive(struct jme_adapter *jme, int limit)
1099 {
1100         struct jme_ring *rxring = &(jme->rxring[0]);
1101         struct rxdesc *rxdesc = rxring->desc;
1102         int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1103
1104         if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1105                 goto out_inc;
1106
1107         if (unlikely(atomic_read(&jme->link_changing) != 1))
1108                 goto out_inc;
1109
1110         if (unlikely(!netif_carrier_ok(jme->dev)))
1111                 goto out_inc;
1112
1113         i = atomic_read(&rxring->next_to_clean);
1114         while (limit > 0) {
1115                 rxdesc = rxring->desc;
1116                 rxdesc += i;
1117
1118                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1119                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1120                         goto out;
1121                 --limit;
1122
1123                 rmb();
1124                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1125
1126                 if (unlikely(desccnt > 1 ||
1127                 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1128
1129                         if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1130                                 ++(NET_STAT(jme).rx_crc_errors);
1131                         else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1132                                 ++(NET_STAT(jme).rx_fifo_errors);
1133                         else
1134                                 ++(NET_STAT(jme).rx_errors);
1135
1136                         if (desccnt > 1)
1137                                 limit -= desccnt - 1;
1138
1139                         for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1140                                 jme_set_clean_rxdesc(jme, j);
1141                                 j = (j + 1) & (mask);
1142                         }
1143
1144                 } else {
1145                         jme_alloc_and_feed_skb(jme, i);
1146                 }
1147
1148                 i = (i + desccnt) & (mask);
1149         }
1150
1151 out:
1152         atomic_set(&rxring->next_to_clean, i);
1153
1154 out_inc:
1155         atomic_inc(&jme->rx_cleaning);
1156
1157         return limit > 0 ? limit : 0;
1158
1159 }
1160
1161 static void
1162 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1163 {
1164         if (likely(atmp == dpi->cur)) {
1165                 dpi->cnt = 0;
1166                 return;
1167         }
1168
1169         if (dpi->attempt == atmp) {
1170                 ++(dpi->cnt);
1171         } else {
1172                 dpi->attempt = atmp;
1173                 dpi->cnt = 0;
1174         }
1175
1176 }
1177
1178 static void
1179 jme_dynamic_pcc(struct jme_adapter *jme)
1180 {
1181         register struct dynpcc_info *dpi = &(jme->dpi);
1182
1183         if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1184                 jme_attempt_pcc(dpi, PCC_P3);
1185         else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1186                  dpi->intr_cnt > PCC_INTR_THRESHOLD)
1187                 jme_attempt_pcc(dpi, PCC_P2);
1188         else
1189                 jme_attempt_pcc(dpi, PCC_P1);
1190
1191         if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1192                 if (dpi->attempt < dpi->cur)
1193                         tasklet_schedule(&jme->rxclean_task);
1194                 jme_set_rx_pcc(jme, dpi->attempt);
1195                 dpi->cur = dpi->attempt;
1196                 dpi->cnt = 0;
1197         }
1198 }
1199
1200 static void
1201 jme_start_pcc_timer(struct jme_adapter *jme)
1202 {
1203         struct dynpcc_info *dpi = &(jme->dpi);
1204         dpi->last_bytes         = NET_STAT(jme).rx_bytes;
1205         dpi->last_pkts          = NET_STAT(jme).rx_packets;
1206         dpi->intr_cnt           = 0;
1207         jwrite32(jme, JME_TMCSR,
1208                 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1209 }
1210
1211 static inline void
1212 jme_stop_pcc_timer(struct jme_adapter *jme)
1213 {
1214         jwrite32(jme, JME_TMCSR, 0);
1215 }
1216
1217 static void
1218 jme_shutdown_nic(struct jme_adapter *jme)
1219 {
1220         u32 phylink;
1221
1222         phylink = jme_linkstat_from_phy(jme);
1223
1224         if (!(phylink & PHY_LINK_UP)) {
1225                 /*
1226                  * Disable all interrupt before issue timer
1227                  */
1228                 jme_stop_irq(jme);
1229                 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1230         }
1231 }
1232
1233 static void
1234 jme_pcc_tasklet(unsigned long arg)
1235 {
1236         struct jme_adapter *jme = (struct jme_adapter *)arg;
1237         struct net_device *netdev = jme->dev;
1238
1239         if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1240                 jme_shutdown_nic(jme);
1241                 return;
1242         }
1243
1244         if (unlikely(!netif_carrier_ok(netdev) ||
1245                 (atomic_read(&jme->link_changing) != 1)
1246         )) {
1247                 jme_stop_pcc_timer(jme);
1248                 return;
1249         }
1250
1251         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1252                 jme_dynamic_pcc(jme);
1253
1254         jme_start_pcc_timer(jme);
1255 }
1256
1257 static inline void
1258 jme_polling_mode(struct jme_adapter *jme)
1259 {
1260         jme_set_rx_pcc(jme, PCC_OFF);
1261 }
1262
1263 static inline void
1264 jme_interrupt_mode(struct jme_adapter *jme)
1265 {
1266         jme_set_rx_pcc(jme, PCC_P1);
1267 }
1268
1269 static inline int
1270 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1271 {
1272         u32 apmc;
1273         apmc = jread32(jme, JME_APMC);
1274         return apmc & JME_APMC_PSEUDO_HP_EN;
1275 }
1276
1277 static void
1278 jme_start_shutdown_timer(struct jme_adapter *jme)
1279 {
1280         u32 apmc;
1281
1282         apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1283         apmc &= ~JME_APMC_EPIEN_CTRL;
1284         if (!no_extplug) {
1285                 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1286                 wmb();
1287         }
1288         jwrite32f(jme, JME_APMC, apmc);
1289
1290         jwrite32f(jme, JME_TIMER2, 0);
1291         set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1292         jwrite32(jme, JME_TMCSR,
1293                 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1294 }
1295
1296 static void
1297 jme_stop_shutdown_timer(struct jme_adapter *jme)
1298 {
1299         u32 apmc;
1300
1301         jwrite32f(jme, JME_TMCSR, 0);
1302         jwrite32f(jme, JME_TIMER2, 0);
1303         clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1304
1305         apmc = jread32(jme, JME_APMC);
1306         apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1307         jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1308         wmb();
1309         jwrite32f(jme, JME_APMC, apmc);
1310 }
1311
1312 static void
1313 jme_link_change_tasklet(unsigned long arg)
1314 {
1315         struct jme_adapter *jme = (struct jme_adapter *)arg;
1316         struct net_device *netdev = jme->dev;
1317         int rc;
1318
1319         while (!atomic_dec_and_test(&jme->link_changing)) {
1320                 atomic_inc(&jme->link_changing);
1321                 netif_info(jme, intr, jme->dev, "Get link change lock failed\n");
1322                 while (atomic_read(&jme->link_changing) != 1)
1323                         netif_info(jme, intr, jme->dev, "Waiting link change lock\n");
1324         }
1325
1326         if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1327                 goto out;
1328
1329         jme->old_mtu = netdev->mtu;
1330         netif_stop_queue(netdev);
1331         if (jme_pseudo_hotplug_enabled(jme))
1332                 jme_stop_shutdown_timer(jme);
1333
1334         jme_stop_pcc_timer(jme);
1335         tasklet_disable(&jme->txclean_task);
1336         tasklet_disable(&jme->rxclean_task);
1337         tasklet_disable(&jme->rxempty_task);
1338
1339         if (netif_carrier_ok(netdev)) {
1340                 jme_disable_rx_engine(jme);
1341                 jme_disable_tx_engine(jme);
1342                 jme_reset_mac_processor(jme);
1343                 jme_free_rx_resources(jme);
1344                 jme_free_tx_resources(jme);
1345
1346                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1347                         jme_polling_mode(jme);
1348
1349                 netif_carrier_off(netdev);
1350         }
1351
1352         jme_check_link(netdev, 0);
1353         if (netif_carrier_ok(netdev)) {
1354                 rc = jme_setup_rx_resources(jme);
1355                 if (rc) {
1356                         pr_err("Allocating resources for RX error, Device STOPPED!\n");
1357                         goto out_enable_tasklet;
1358                 }
1359
1360                 rc = jme_setup_tx_resources(jme);
1361                 if (rc) {
1362                         pr_err("Allocating resources for TX error, Device STOPPED!\n");
1363                         goto err_out_free_rx_resources;
1364                 }
1365
1366                 jme_enable_rx_engine(jme);
1367                 jme_enable_tx_engine(jme);
1368
1369                 netif_start_queue(netdev);
1370
1371                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1372                         jme_interrupt_mode(jme);
1373
1374                 jme_start_pcc_timer(jme);
1375         } else if (jme_pseudo_hotplug_enabled(jme)) {
1376                 jme_start_shutdown_timer(jme);
1377         }
1378
1379         goto out_enable_tasklet;
1380
1381 err_out_free_rx_resources:
1382         jme_free_rx_resources(jme);
1383 out_enable_tasklet:
1384         tasklet_enable(&jme->txclean_task);
1385         tasklet_hi_enable(&jme->rxclean_task);
1386         tasklet_hi_enable(&jme->rxempty_task);
1387 out:
1388         atomic_inc(&jme->link_changing);
1389 }
1390
1391 static void
1392 jme_rx_clean_tasklet(unsigned long arg)
1393 {
1394         struct jme_adapter *jme = (struct jme_adapter *)arg;
1395         struct dynpcc_info *dpi = &(jme->dpi);
1396
1397         jme_process_receive(jme, jme->rx_ring_size);
1398         ++(dpi->intr_cnt);
1399
1400 }
1401
1402 static int
1403 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1404 {
1405         struct jme_adapter *jme = jme_napi_priv(holder);
1406         DECLARE_NETDEV
1407         int rest;
1408
1409         rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1410
1411         while (atomic_read(&jme->rx_empty) > 0) {
1412                 atomic_dec(&jme->rx_empty);
1413                 ++(NET_STAT(jme).rx_dropped);
1414                 jme_restart_rx_engine(jme);
1415         }
1416         atomic_inc(&jme->rx_empty);
1417
1418         if (rest) {
1419                 JME_RX_COMPLETE(netdev, holder);
1420                 jme_interrupt_mode(jme);
1421         }
1422
1423         JME_NAPI_WEIGHT_SET(budget, rest);
1424         return JME_NAPI_WEIGHT_VAL(budget) - rest;
1425 }
1426
1427 static void
1428 jme_rx_empty_tasklet(unsigned long arg)
1429 {
1430         struct jme_adapter *jme = (struct jme_adapter *)arg;
1431
1432         if (unlikely(atomic_read(&jme->link_changing) != 1))
1433                 return;
1434
1435         if (unlikely(!netif_carrier_ok(jme->dev)))
1436                 return;
1437
1438         netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1439
1440         jme_rx_clean_tasklet(arg);
1441
1442         while (atomic_read(&jme->rx_empty) > 0) {
1443                 atomic_dec(&jme->rx_empty);
1444                 ++(NET_STAT(jme).rx_dropped);
1445                 jme_restart_rx_engine(jme);
1446         }
1447         atomic_inc(&jme->rx_empty);
1448 }
1449
1450 static void
1451 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1452 {
1453         struct jme_ring *txring = &(jme->txring[0]);
1454
1455         smp_wmb();
1456         if (unlikely(netif_queue_stopped(jme->dev) &&
1457         atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1458                 netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n");
1459                 netif_wake_queue(jme->dev);
1460         }
1461
1462 }
1463
1464 static void
1465 jme_tx_clean_tasklet(unsigned long arg)
1466 {
1467         struct jme_adapter *jme = (struct jme_adapter *)arg;
1468         struct jme_ring *txring = &(jme->txring[0]);
1469         struct txdesc *txdesc = txring->desc;
1470         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1471         int i, j, cnt = 0, max, err, mask;
1472
1473         tx_dbg(jme, "Into txclean\n");
1474
1475         if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1476                 goto out;
1477
1478         if (unlikely(atomic_read(&jme->link_changing) != 1))
1479                 goto out;
1480
1481         if (unlikely(!netif_carrier_ok(jme->dev)))
1482                 goto out;
1483
1484         max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1485         mask = jme->tx_ring_mask;
1486
1487         for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1488
1489                 ctxbi = txbi + i;
1490
1491                 if (likely(ctxbi->skb &&
1492                 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1493
1494                         tx_dbg(jme, "txclean: %d+%d@%lu\n",
1495                                i, ctxbi->nr_desc, jiffies);
1496
1497                         err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1498
1499                         for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1500                                 ttxbi = txbi + ((i + j) & (mask));
1501                                 txdesc[(i + j) & (mask)].dw[0] = 0;
1502
1503                                 pci_unmap_page(jme->pdev,
1504                                                  ttxbi->mapping,
1505                                                  ttxbi->len,
1506                                                  PCI_DMA_TODEVICE);
1507
1508                                 ttxbi->mapping = 0;
1509                                 ttxbi->len = 0;
1510                         }
1511
1512                         dev_kfree_skb(ctxbi->skb);
1513
1514                         cnt += ctxbi->nr_desc;
1515
1516                         if (unlikely(err)) {
1517                                 ++(NET_STAT(jme).tx_carrier_errors);
1518                         } else {
1519                                 ++(NET_STAT(jme).tx_packets);
1520                                 NET_STAT(jme).tx_bytes += ctxbi->len;
1521                         }
1522
1523                         ctxbi->skb = NULL;
1524                         ctxbi->len = 0;
1525                         ctxbi->start_xmit = 0;
1526
1527                 } else {
1528                         break;
1529                 }
1530
1531                 i = (i + ctxbi->nr_desc) & mask;
1532
1533                 ctxbi->nr_desc = 0;
1534         }
1535
1536         tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies);
1537         atomic_set(&txring->next_to_clean, i);
1538         atomic_add(cnt, &txring->nr_free);
1539
1540         jme_wake_queue_if_stopped(jme);
1541
1542 out:
1543         atomic_inc(&jme->tx_cleaning);
1544 }
1545
1546 static void
1547 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1548 {
1549         /*
1550          * Disable interrupt
1551          */
1552         jwrite32f(jme, JME_IENC, INTR_ENABLE);
1553
1554         if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1555                 /*
1556                  * Link change event is critical
1557                  * all other events are ignored
1558                  */
1559                 jwrite32(jme, JME_IEVE, intrstat);
1560                 tasklet_schedule(&jme->linkch_task);
1561                 goto out_reenable;
1562         }
1563
1564         if (intrstat & INTR_TMINTR) {
1565                 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1566                 tasklet_schedule(&jme->pcc_task);
1567         }
1568
1569         if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1570                 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1571                 tasklet_schedule(&jme->txclean_task);
1572         }
1573
1574         if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1575                 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1576                                                      INTR_PCCRX0 |
1577                                                      INTR_RX0EMP)) |
1578                                         INTR_RX0);
1579         }
1580
1581         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1582                 if (intrstat & INTR_RX0EMP)
1583                         atomic_inc(&jme->rx_empty);
1584
1585                 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1586                         if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1587                                 jme_polling_mode(jme);
1588                                 JME_RX_SCHEDULE(jme);
1589                         }
1590                 }
1591         } else {
1592                 if (intrstat & INTR_RX0EMP) {
1593                         atomic_inc(&jme->rx_empty);
1594                         tasklet_hi_schedule(&jme->rxempty_task);
1595                 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1596                         tasklet_hi_schedule(&jme->rxclean_task);
1597                 }
1598         }
1599
1600 out_reenable:
1601         /*
1602          * Re-enable interrupt
1603          */
1604         jwrite32f(jme, JME_IENS, INTR_ENABLE);
1605 }
1606
1607 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1608 static irqreturn_t
1609 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1610 #else
1611 static irqreturn_t
1612 jme_intr(int irq, void *dev_id)
1613 #endif
1614 {
1615         struct net_device *netdev = dev_id;
1616         struct jme_adapter *jme = netdev_priv(netdev);
1617         u32 intrstat;
1618
1619         intrstat = jread32(jme, JME_IEVE);
1620
1621         /*
1622          * Check if it's really an interrupt for us
1623          */
1624         if (unlikely((intrstat & INTR_ENABLE) == 0))
1625                 return IRQ_NONE;
1626
1627         /*
1628          * Check if the device still exist
1629          */
1630         if (unlikely(intrstat == ~((typeof(intrstat))0)))
1631                 return IRQ_NONE;
1632
1633         jme_intr_msi(jme, intrstat);
1634
1635         return IRQ_HANDLED;
1636 }
1637
1638 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1639 static irqreturn_t
1640 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1641 #else
1642 static irqreturn_t
1643 jme_msi(int irq, void *dev_id)
1644 #endif
1645 {
1646         struct net_device *netdev = dev_id;
1647         struct jme_adapter *jme = netdev_priv(netdev);
1648         u32 intrstat;
1649
1650         intrstat = jread32(jme, JME_IEVE);
1651
1652         jme_intr_msi(jme, intrstat);
1653
1654         return IRQ_HANDLED;
1655 }
1656
1657 static void
1658 jme_reset_link(struct jme_adapter *jme)
1659 {
1660         jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1661 }
1662
1663 static void
1664 jme_restart_an(struct jme_adapter *jme)
1665 {
1666         u32 bmcr;
1667
1668         spin_lock_bh(&jme->phy_lock);
1669         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1670         bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1671         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1672         spin_unlock_bh(&jme->phy_lock);
1673 }
1674
1675 static int
1676 jme_request_irq(struct jme_adapter *jme)
1677 {
1678         int rc;
1679         struct net_device *netdev = jme->dev;
1680 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1681         irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1682         int irq_flags = SA_SHIRQ;
1683 #else
1684         irq_handler_t handler = jme_intr;
1685         int irq_flags = IRQF_SHARED;
1686 #endif
1687
1688         if (!pci_enable_msi(jme->pdev)) {
1689                 set_bit(JME_FLAG_MSI, &jme->flags);
1690                 handler = jme_msi;
1691                 irq_flags = 0;
1692         }
1693
1694         rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1695                           netdev);
1696         if (rc) {
1697                 netdev_err(netdev,
1698                            "Unable to request %s interrupt (return: %d)\n",
1699                            test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1700                            rc);
1701
1702                 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1703                         pci_disable_msi(jme->pdev);
1704                         clear_bit(JME_FLAG_MSI, &jme->flags);
1705                 }
1706         } else {
1707                 netdev->irq = jme->pdev->irq;
1708         }
1709
1710         return rc;
1711 }
1712
1713 static void
1714 jme_free_irq(struct jme_adapter *jme)
1715 {
1716         free_irq(jme->pdev->irq, jme->dev);
1717         if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1718                 pci_disable_msi(jme->pdev);
1719                 clear_bit(JME_FLAG_MSI, &jme->flags);
1720                 jme->dev->irq = jme->pdev->irq;
1721         }
1722 }
1723
1724 static inline void
1725 jme_new_phy_on(struct jme_adapter *jme)
1726 {
1727         u32 reg;
1728
1729         reg = jread32(jme, JME_PHY_PWR);
1730         reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1731                  PHY_PWR_DWN2 | PHY_PWR_CLKSEL);
1732         jwrite32(jme, JME_PHY_PWR, reg);
1733
1734         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1735         reg &= ~PE1_GPREG0_PBG;
1736         reg |= PE1_GPREG0_ENBG;
1737         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1738 }
1739
1740 static inline void
1741 jme_new_phy_off(struct jme_adapter *jme)
1742 {
1743         u32 reg;
1744
1745         reg = jread32(jme, JME_PHY_PWR);
1746         reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1747                PHY_PWR_DWN2 | PHY_PWR_CLKSEL;
1748         jwrite32(jme, JME_PHY_PWR, reg);
1749
1750         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1751         reg &= ~PE1_GPREG0_PBG;
1752         reg |= PE1_GPREG0_PDD3COLD;
1753         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1754 }
1755
1756 static inline void
1757 jme_phy_on(struct jme_adapter *jme)
1758 {
1759         u32 bmcr;
1760
1761         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1762         bmcr &= ~BMCR_PDOWN;
1763         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1764
1765         if (new_phy_power_ctrl(jme->chip_main_rev))
1766                 jme_new_phy_on(jme);
1767 }
1768
1769 static inline void
1770 jme_phy_off(struct jme_adapter *jme)
1771 {
1772         u32 bmcr;
1773
1774         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1775         bmcr |= BMCR_PDOWN;
1776         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1777
1778         if (new_phy_power_ctrl(jme->chip_main_rev))
1779                 jme_new_phy_off(jme);
1780 }
1781
1782 static int
1783 jme_open(struct net_device *netdev)
1784 {
1785         struct jme_adapter *jme = netdev_priv(netdev);
1786         int rc;
1787
1788         jme_clear_pm(jme);
1789         JME_NAPI_ENABLE(jme);
1790
1791         tasklet_enable(&jme->linkch_task);
1792         tasklet_enable(&jme->txclean_task);
1793         tasklet_hi_enable(&jme->rxclean_task);
1794         tasklet_hi_enable(&jme->rxempty_task);
1795
1796         rc = jme_request_irq(jme);
1797         if (rc)
1798                 goto err_out;
1799
1800         jme_start_irq(jme);
1801
1802         jme_phy_on(jme);
1803         if (test_bit(JME_FLAG_SSET, &jme->flags))
1804                 jme_set_settings(netdev, &jme->old_ecmd);
1805         else
1806                 jme_reset_phy_processor(jme);
1807
1808         jme_reset_link(jme);
1809
1810         return 0;
1811
1812 err_out:
1813         netif_stop_queue(netdev);
1814         netif_carrier_off(netdev);
1815         return rc;
1816 }
1817
1818 static void
1819 jme_set_100m_half(struct jme_adapter *jme)
1820 {
1821         u32 bmcr, tmp;
1822
1823         jme_phy_on(jme);
1824         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1825         tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1826                        BMCR_SPEED1000 | BMCR_FULLDPLX);
1827         tmp |= BMCR_SPEED100;
1828
1829         if (bmcr != tmp)
1830                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1831
1832         if (jme->fpgaver)
1833                 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1834         else
1835                 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1836 }
1837
1838 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1839 static void
1840 jme_wait_link(struct jme_adapter *jme)
1841 {
1842         u32 phylink, to = JME_WAIT_LINK_TIME;
1843
1844         mdelay(1000);
1845         phylink = jme_linkstat_from_phy(jme);
1846         while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1847                 mdelay(10);
1848                 phylink = jme_linkstat_from_phy(jme);
1849         }
1850 }
1851
1852 static void
1853 jme_powersave_phy(struct jme_adapter *jme)
1854 {
1855         if (jme->reg_pmcs) {
1856                 jme_set_100m_half(jme);
1857
1858                 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
1859                         jme_wait_link(jme);
1860
1861                 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
1862         } else {
1863                 jme_phy_off(jme);
1864         }
1865 }
1866
1867 static int
1868 jme_close(struct net_device *netdev)
1869 {
1870         struct jme_adapter *jme = netdev_priv(netdev);
1871
1872         netif_stop_queue(netdev);
1873         netif_carrier_off(netdev);
1874
1875         jme_stop_irq(jme);
1876         jme_free_irq(jme);
1877
1878         JME_NAPI_DISABLE(jme);
1879
1880         tasklet_disable(&jme->linkch_task);
1881         tasklet_disable(&jme->txclean_task);
1882         tasklet_disable(&jme->rxclean_task);
1883         tasklet_disable(&jme->rxempty_task);
1884
1885         jme_disable_rx_engine(jme);
1886         jme_disable_tx_engine(jme);
1887         jme_reset_mac_processor(jme);
1888         jme_free_rx_resources(jme);
1889         jme_free_tx_resources(jme);
1890         jme->phylink = 0;
1891         jme_phy_off(jme);
1892
1893         return 0;
1894 }
1895
1896 static int
1897 jme_alloc_txdesc(struct jme_adapter *jme,
1898                         struct sk_buff *skb)
1899 {
1900         struct jme_ring *txring = &(jme->txring[0]);
1901         int idx, nr_alloc, mask = jme->tx_ring_mask;
1902
1903         idx = txring->next_to_use;
1904         nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1905
1906         if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1907                 return -1;
1908
1909         atomic_sub(nr_alloc, &txring->nr_free);
1910
1911         txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1912
1913         return idx;
1914 }
1915
1916 static void
1917 jme_fill_tx_map(struct pci_dev *pdev,
1918                 struct txdesc *txdesc,
1919                 struct jme_buffer_info *txbi,
1920                 struct page *page,
1921                 u32 page_offset,
1922                 u32 len,
1923                 u8 hidma)
1924 {
1925         dma_addr_t dmaaddr;
1926
1927         dmaaddr = pci_map_page(pdev,
1928                                 page,
1929                                 page_offset,
1930                                 len,
1931                                 PCI_DMA_TODEVICE);
1932
1933         pci_dma_sync_single_for_device(pdev,
1934                                        dmaaddr,
1935                                        len,
1936                                        PCI_DMA_TODEVICE);
1937
1938         txdesc->dw[0] = 0;
1939         txdesc->dw[1] = 0;
1940         txdesc->desc2.flags     = TXFLAG_OWN;
1941         txdesc->desc2.flags     |= (hidma) ? TXFLAG_64BIT : 0;
1942         txdesc->desc2.datalen   = cpu_to_le16(len);
1943         txdesc->desc2.bufaddrh  = cpu_to_le32((__u64)dmaaddr >> 32);
1944         txdesc->desc2.bufaddrl  = cpu_to_le32(
1945                                         (__u64)dmaaddr & 0xFFFFFFFFUL);
1946
1947         txbi->mapping = dmaaddr;
1948         txbi->len = len;
1949 }
1950
1951 static void
1952 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1953 {
1954         struct jme_ring *txring = &(jme->txring[0]);
1955         struct txdesc *txdesc = txring->desc, *ctxdesc;
1956         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1957         u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1958         int i, nr_frags = skb_shinfo(skb)->nr_frags;
1959         int mask = jme->tx_ring_mask;
1960         struct skb_frag_struct *frag;
1961         u32 len;
1962
1963         for (i = 0 ; i < nr_frags ; ++i) {
1964                 frag = &skb_shinfo(skb)->frags[i];
1965                 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1966                 ctxbi = txbi + ((idx + i + 2) & (mask));
1967
1968                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1969                                  frag->page_offset, frag->size, hidma);
1970         }
1971
1972         len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1973         ctxdesc = txdesc + ((idx + 1) & (mask));
1974         ctxbi = txbi + ((idx + 1) & (mask));
1975         jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1976                         offset_in_page(skb->data), len, hidma);
1977
1978 }
1979
1980 static int
1981 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1982 {
1983         if (unlikely(
1984 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1985         skb_shinfo(skb)->tso_size
1986 #else
1987         skb_shinfo(skb)->gso_size
1988 #endif
1989                         && skb_header_cloned(skb) &&
1990                         pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1991                 dev_kfree_skb(skb);
1992                 return -1;
1993         }
1994
1995         return 0;
1996 }
1997
1998 static int
1999 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
2000 {
2001 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
2002         *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
2003 #else
2004         *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
2005 #endif
2006         if (*mss) {
2007                 *flags |= TXFLAG_LSEN;
2008
2009                 if (skb->protocol == htons(ETH_P_IP)) {
2010                         struct iphdr *iph = ip_hdr(skb);
2011
2012                         iph->check = 0;
2013                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2014                                                                 iph->daddr, 0,
2015                                                                 IPPROTO_TCP,
2016                                                                 0);
2017                 } else {
2018                         struct ipv6hdr *ip6h = ipv6_hdr(skb);
2019
2020                         tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
2021                                                                 &ip6h->daddr, 0,
2022                                                                 IPPROTO_TCP,
2023                                                                 0);
2024                 }
2025
2026                 return 0;
2027         }
2028
2029         return 1;
2030 }
2031
2032 static void
2033 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
2034 {
2035 #ifdef CHECKSUM_PARTIAL
2036         if (skb->ip_summed == CHECKSUM_PARTIAL)
2037 #else
2038         if (skb->ip_summed == CHECKSUM_HW)
2039 #endif
2040         {
2041                 u8 ip_proto;
2042
2043 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2044                 if (skb->protocol == htons(ETH_P_IP))
2045                         ip_proto = ip_hdr(skb)->protocol;
2046                 else if (skb->protocol == htons(ETH_P_IPV6))
2047                         ip_proto = ipv6_hdr(skb)->nexthdr;
2048                 else
2049                         ip_proto = 0;
2050 #else
2051                 switch (skb->protocol) {
2052                 case htons(ETH_P_IP):
2053                         ip_proto = ip_hdr(skb)->protocol;
2054                         break;
2055                 case htons(ETH_P_IPV6):
2056                         ip_proto = ipv6_hdr(skb)->nexthdr;
2057                         break;
2058                 default:
2059                         ip_proto = 0;
2060                         break;
2061                 }
2062 #endif
2063
2064                 switch (ip_proto) {
2065                 case IPPROTO_TCP:
2066                         *flags |= TXFLAG_TCPCS;
2067                         break;
2068                 case IPPROTO_UDP:
2069                         *flags |= TXFLAG_UDPCS;
2070                         break;
2071                 default:
2072                         netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n");
2073                         break;
2074                 }
2075         }
2076 }
2077
2078 static inline void
2079 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
2080 {
2081         if (vlan_tx_tag_present(skb)) {
2082                 *flags |= TXFLAG_TAGON;
2083                 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2084         }
2085 }
2086
2087 static int
2088 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
2089 {
2090         struct jme_ring *txring = &(jme->txring[0]);
2091         struct txdesc *txdesc;
2092         struct jme_buffer_info *txbi;
2093         u8 flags;
2094
2095         txdesc = (struct txdesc *)txring->desc + idx;
2096         txbi = txring->bufinf + idx;
2097
2098         txdesc->dw[0] = 0;
2099         txdesc->dw[1] = 0;
2100         txdesc->dw[2] = 0;
2101         txdesc->dw[3] = 0;
2102         txdesc->desc1.pktsize = cpu_to_le16(skb->len);
2103         /*
2104          * Set OWN bit at final.
2105          * When kernel transmit faster than NIC.
2106          * And NIC trying to send this descriptor before we tell
2107          * it to start sending this TX queue.
2108          * Other fields are already filled correctly.
2109          */
2110         wmb();
2111         flags = TXFLAG_OWN | TXFLAG_INT;
2112         /*
2113          * Set checksum flags while not tso
2114          */
2115         if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
2116                 jme_tx_csum(jme, skb, &flags);
2117         jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
2118         jme_map_tx_skb(jme, skb, idx);
2119         txdesc->desc1.flags = flags;
2120         /*
2121          * Set tx buffer info after telling NIC to send
2122          * For better tx_clean timing
2123          */
2124         wmb();
2125         txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
2126         txbi->skb = skb;
2127         txbi->len = skb->len;
2128         txbi->start_xmit = jiffies;
2129         if (!txbi->start_xmit)
2130                 txbi->start_xmit = (0UL-1);
2131
2132         return 0;
2133 }
2134
2135 static void
2136 jme_stop_queue_if_full(struct jme_adapter *jme)
2137 {
2138         struct jme_ring *txring = &(jme->txring[0]);
2139         struct jme_buffer_info *txbi = txring->bufinf;
2140         int idx = atomic_read(&txring->next_to_clean);
2141
2142         txbi += idx;
2143
2144         smp_wmb();
2145         if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2146                 netif_stop_queue(jme->dev);
2147                 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n");
2148                 smp_wmb();
2149                 if (atomic_read(&txring->nr_free)
2150                         >= (jme->tx_wake_threshold)) {
2151                         netif_wake_queue(jme->dev);
2152                         netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n");
2153                 }
2154         }
2155
2156         if (unlikely(txbi->start_xmit &&
2157                         (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2158                         txbi->skb)) {
2159                 netif_stop_queue(jme->dev);
2160                 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu\n", idx, jiffies);
2161         }
2162 }
2163
2164 /*
2165  * This function is already protected by netif_tx_lock()
2166  */
2167
2168 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2169 static int
2170 #else
2171 static netdev_tx_t
2172 #endif
2173 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2174 {
2175         struct jme_adapter *jme = netdev_priv(netdev);
2176         int idx;
2177
2178         if (unlikely(jme_expand_header(jme, skb))) {
2179                 ++(NET_STAT(jme).tx_dropped);
2180                 return NETDEV_TX_OK;
2181         }
2182
2183         idx = jme_alloc_txdesc(jme, skb);
2184
2185         if (unlikely(idx < 0)) {
2186                 netif_stop_queue(netdev);
2187                 netif_err(jme, tx_err, jme->dev,
2188                           "BUG! Tx ring full when queue awake!\n");
2189
2190                 return NETDEV_TX_BUSY;
2191         }
2192
2193         jme_fill_tx_desc(jme, skb, idx);
2194
2195         jwrite32(jme, JME_TXCS, jme->reg_txcs |
2196                                 TXCS_SELECT_QUEUE0 |
2197                                 TXCS_QUEUE0S |
2198                                 TXCS_ENABLE);
2199 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2200         netdev->trans_start = jiffies;
2201 #endif
2202
2203         tx_dbg(jme, "xmit: %d+%d@%lu\n",
2204                idx, skb_shinfo(skb)->nr_frags + 2, jiffies);
2205         jme_stop_queue_if_full(jme);
2206
2207         return NETDEV_TX_OK;
2208 }
2209
2210 static void
2211 jme_set_unicastaddr(struct net_device *netdev)
2212 {
2213         struct jme_adapter *jme = netdev_priv(netdev);
2214         u32 val;
2215
2216         val = (netdev->dev_addr[3] & 0xff) << 24 |
2217               (netdev->dev_addr[2] & 0xff) << 16 |
2218               (netdev->dev_addr[1] & 0xff) <<  8 |
2219               (netdev->dev_addr[0] & 0xff);
2220         jwrite32(jme, JME_RXUMA_LO, val);
2221         val = (netdev->dev_addr[5] & 0xff) << 8 |
2222               (netdev->dev_addr[4] & 0xff);
2223         jwrite32(jme, JME_RXUMA_HI, val);
2224 }
2225
2226 static int
2227 jme_set_macaddr(struct net_device *netdev, void *p)
2228 {
2229         struct jme_adapter *jme = netdev_priv(netdev);
2230         struct sockaddr *addr = p;
2231
2232         if (netif_running(netdev))
2233                 return -EBUSY;
2234
2235         spin_lock_bh(&jme->macaddr_lock);
2236         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2237         jme_set_unicastaddr(netdev);
2238         spin_unlock_bh(&jme->macaddr_lock);
2239
2240         return 0;
2241 }
2242
2243 static void
2244 jme_set_multi(struct net_device *netdev)
2245 {
2246         struct jme_adapter *jme = netdev_priv(netdev);
2247         u32 mc_hash[2] = {};
2248 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2249         int i;
2250 #endif
2251
2252         spin_lock_bh(&jme->rxmcs_lock);
2253
2254         jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2255
2256         if (netdev->flags & IFF_PROMISC) {
2257                 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2258         } else if (netdev->flags & IFF_ALLMULTI) {
2259                 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2260         } else if (netdev->flags & IFF_MULTICAST) {
2261 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2262                 struct dev_mc_list *mclist;
2263 #else
2264                 struct netdev_hw_addr *ha;
2265 #endif
2266                 int bit_nr;
2267
2268                 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2269 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2270                 for (i = 0, mclist = netdev->mc_list;
2271                         mclist && i < netdev->mc_count;
2272                         ++i, mclist = mclist->next) {
2273 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2274                 netdev_for_each_mc_addr(mclist, netdev) {
2275 #else
2276                 netdev_for_each_mc_addr(ha, netdev) {
2277 #endif
2278 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2279                         bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2280 #else
2281                         bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2282 #endif
2283                         mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2284                 }
2285
2286                 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2287                 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2288         }
2289
2290         wmb();
2291         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2292
2293         spin_unlock_bh(&jme->rxmcs_lock);
2294 }
2295
2296 static int
2297 jme_change_mtu(struct net_device *netdev, int new_mtu)
2298 {
2299         struct jme_adapter *jme = netdev_priv(netdev);
2300
2301         if (new_mtu == jme->old_mtu)
2302                 return 0;
2303
2304         if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2305                 ((new_mtu) < IPV6_MIN_MTU))
2306                 return -EINVAL;
2307
2308         if (new_mtu > 4000) {
2309                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2310                 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2311                 jme_restart_rx_engine(jme);
2312         } else {
2313                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2314                 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2315                 jme_restart_rx_engine(jme);
2316         }
2317
2318         if (new_mtu > 1900) {
2319                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2320                                 NETIF_F_TSO | NETIF_F_TSO6);
2321         } else {
2322                 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2323                         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2324                 if (test_bit(JME_FLAG_TSO, &jme->flags))
2325                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2326         }
2327
2328         netdev->mtu = new_mtu;
2329         jme_reset_link(jme);
2330
2331         return 0;
2332 }
2333
2334 static void
2335 jme_tx_timeout(struct net_device *netdev)
2336 {
2337         struct jme_adapter *jme = netdev_priv(netdev);
2338
2339         jme->phylink = 0;
2340         jme_reset_phy_processor(jme);
2341         if (test_bit(JME_FLAG_SSET, &jme->flags))
2342                 jme_set_settings(netdev, &jme->old_ecmd);
2343
2344         /*
2345          * Force to Reset the link again
2346          */
2347         jme_reset_link(jme);
2348 }
2349
2350 static inline void jme_pause_rx(struct jme_adapter *jme)
2351 {
2352         atomic_dec(&jme->link_changing);
2353
2354         jme_set_rx_pcc(jme, PCC_OFF);
2355         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2356                 JME_NAPI_DISABLE(jme);
2357         } else {
2358                 tasklet_disable(&jme->rxclean_task);
2359                 tasklet_disable(&jme->rxempty_task);
2360         }
2361 }
2362
2363 static inline void jme_resume_rx(struct jme_adapter *jme)
2364 {
2365         struct dynpcc_info *dpi = &(jme->dpi);
2366
2367         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2368                 JME_NAPI_ENABLE(jme);
2369         } else {
2370                 tasklet_hi_enable(&jme->rxclean_task);
2371                 tasklet_hi_enable(&jme->rxempty_task);
2372         }
2373         dpi->cur                = PCC_P1;
2374         dpi->attempt            = PCC_P1;
2375         dpi->cnt                = 0;
2376         jme_set_rx_pcc(jme, PCC_P1);
2377
2378         atomic_inc(&jme->link_changing);
2379 }
2380
2381 static void
2382 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2383 {
2384         struct jme_adapter *jme = netdev_priv(netdev);
2385
2386         jme_pause_rx(jme);
2387         jme->vlgrp = grp;
2388         jme_resume_rx(jme);
2389 }
2390
2391 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2392 static void
2393 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2394 {
2395         struct jme_adapter *jme = netdev_priv(netdev);
2396
2397         if(jme->vlgrp) {
2398                 jme_pause_rx(jme);
2399 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2400                 jme->vlgrp->vlan_devices[vid] = NULL;
2401 #else
2402                 vlan_group_set_device(jme->vlgrp, vid, NULL);
2403 #endif
2404                 jme_resume_rx(jme);
2405         }
2406 }
2407 #endif
2408
2409 static void
2410 jme_get_drvinfo(struct net_device *netdev,
2411                      struct ethtool_drvinfo *info)
2412 {
2413         struct jme_adapter *jme = netdev_priv(netdev);
2414
2415         strcpy(info->driver, DRV_NAME);
2416         strcpy(info->version, DRV_VERSION);
2417         strcpy(info->bus_info, pci_name(jme->pdev));
2418 }
2419
2420 static int
2421 jme_get_regs_len(struct net_device *netdev)
2422 {
2423         return JME_REG_LEN;
2424 }
2425
2426 static void
2427 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2428 {
2429         int i;
2430
2431         for (i = 0 ; i < len ; i += 4)
2432                 p[i >> 2] = jread32(jme, reg + i);
2433 }
2434
2435 static void
2436 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2437 {
2438         int i;
2439         u16 *p16 = (u16 *)p;
2440
2441         for (i = 0 ; i < reg_nr ; ++i)
2442                 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2443 }
2444
2445 static void
2446 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2447 {
2448         struct jme_adapter *jme = netdev_priv(netdev);
2449         u32 *p32 = (u32 *)p;
2450
2451         memset(p, 0xFF, JME_REG_LEN);
2452
2453         regs->version = 1;
2454         mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2455
2456         p32 += 0x100 >> 2;
2457         mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2458
2459         p32 += 0x100 >> 2;
2460         mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2461
2462         p32 += 0x100 >> 2;
2463         mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2464
2465         p32 += 0x100 >> 2;
2466         mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2467 }
2468
2469 static int
2470 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2471 {
2472         struct jme_adapter *jme = netdev_priv(netdev);
2473
2474         ecmd->tx_coalesce_usecs = PCC_TX_TO;
2475         ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2476
2477         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2478                 ecmd->use_adaptive_rx_coalesce = false;
2479                 ecmd->rx_coalesce_usecs = 0;
2480                 ecmd->rx_max_coalesced_frames = 0;
2481                 return 0;
2482         }
2483
2484         ecmd->use_adaptive_rx_coalesce = true;
2485
2486         switch (jme->dpi.cur) {
2487         case PCC_P1:
2488                 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2489                 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2490                 break;
2491         case PCC_P2:
2492                 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2493                 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2494                 break;
2495         case PCC_P3:
2496                 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2497                 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2498                 break;
2499         default:
2500                 break;
2501         }
2502
2503         return 0;
2504 }
2505
2506 static int
2507 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2508 {
2509         struct jme_adapter *jme = netdev_priv(netdev);
2510         struct dynpcc_info *dpi = &(jme->dpi);
2511
2512         if (netif_running(netdev))
2513                 return -EBUSY;
2514
2515         if (ecmd->use_adaptive_rx_coalesce &&
2516             test_bit(JME_FLAG_POLL, &jme->flags)) {
2517                 clear_bit(JME_FLAG_POLL, &jme->flags);
2518                 jme->jme_rx = netif_rx;
2519                 jme->jme_vlan_rx = vlan_hwaccel_rx;
2520                 dpi->cur                = PCC_P1;
2521                 dpi->attempt            = PCC_P1;
2522                 dpi->cnt                = 0;
2523                 jme_set_rx_pcc(jme, PCC_P1);
2524                 jme_interrupt_mode(jme);
2525         } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2526                    !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2527                 set_bit(JME_FLAG_POLL, &jme->flags);
2528                 jme->jme_rx = netif_receive_skb;
2529                 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2530                 jme_interrupt_mode(jme);
2531         }
2532
2533         return 0;
2534 }
2535
2536 static void
2537 jme_get_pauseparam(struct net_device *netdev,
2538                         struct ethtool_pauseparam *ecmd)
2539 {
2540         struct jme_adapter *jme = netdev_priv(netdev);
2541         u32 val;
2542
2543         ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2544         ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2545
2546         spin_lock_bh(&jme->phy_lock);
2547         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2548         spin_unlock_bh(&jme->phy_lock);
2549
2550         ecmd->autoneg =
2551                 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2552 }
2553
2554 static int
2555 jme_set_pauseparam(struct net_device *netdev,
2556                         struct ethtool_pauseparam *ecmd)
2557 {
2558         struct jme_adapter *jme = netdev_priv(netdev);
2559         u32 val;
2560
2561         if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2562                 (ecmd->tx_pause != 0)) {
2563
2564                 if (ecmd->tx_pause)
2565                         jme->reg_txpfc |= TXPFC_PF_EN;
2566                 else
2567                         jme->reg_txpfc &= ~TXPFC_PF_EN;
2568
2569                 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2570         }
2571
2572         spin_lock_bh(&jme->rxmcs_lock);
2573         if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2574                 (ecmd->rx_pause != 0)) {
2575
2576                 if (ecmd->rx_pause)
2577                         jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2578                 else
2579                         jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2580
2581                 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2582         }
2583         spin_unlock_bh(&jme->rxmcs_lock);
2584
2585         spin_lock_bh(&jme->phy_lock);
2586         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2587         if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2588                 (ecmd->autoneg != 0)) {
2589
2590                 if (ecmd->autoneg)
2591                         val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2592                 else
2593                         val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2594
2595                 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2596                                 MII_ADVERTISE, val);
2597         }
2598         spin_unlock_bh(&jme->phy_lock);
2599
2600         return 0;
2601 }
2602
2603 static void
2604 jme_get_wol(struct net_device *netdev,
2605                 struct ethtool_wolinfo *wol)
2606 {
2607         struct jme_adapter *jme = netdev_priv(netdev);
2608
2609         wol->supported = WAKE_MAGIC | WAKE_PHY;
2610
2611         wol->wolopts = 0;
2612
2613         if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2614                 wol->wolopts |= WAKE_PHY;
2615
2616         if (jme->reg_pmcs & PMCS_MFEN)
2617                 wol->wolopts |= WAKE_MAGIC;
2618
2619 }
2620
2621 static int
2622 jme_set_wol(struct net_device *netdev,
2623                 struct ethtool_wolinfo *wol)
2624 {
2625         struct jme_adapter *jme = netdev_priv(netdev);
2626
2627         if (wol->wolopts & (WAKE_MAGICSECURE |
2628                                 WAKE_UCAST |
2629                                 WAKE_MCAST |
2630                                 WAKE_BCAST |
2631                                 WAKE_ARP))
2632                 return -EOPNOTSUPP;
2633
2634         jme->reg_pmcs = 0;
2635
2636         if (wol->wolopts & WAKE_PHY)
2637                 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2638
2639         if (wol->wolopts & WAKE_MAGIC)
2640                 jme->reg_pmcs |= PMCS_MFEN;
2641
2642         jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2643
2644 #ifndef JME_NEW_PM_API
2645         jme_pci_wakeup_enable(jme, !!(jme->reg_pmcs));
2646 #endif
2647 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
2648         device_set_wakeup_enable(&jme->pdev->dev, !!(jme->reg_pmcs));
2649 #endif
2650         return 0;
2651 }
2652
2653 static int
2654 jme_get_settings(struct net_device *netdev,
2655                      struct ethtool_cmd *ecmd)
2656 {
2657         struct jme_adapter *jme = netdev_priv(netdev);
2658         int rc;
2659
2660         spin_lock_bh(&jme->phy_lock);
2661         rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2662         spin_unlock_bh(&jme->phy_lock);
2663         return rc;
2664 }
2665
2666 static int
2667 jme_set_settings(struct net_device *netdev,
2668                      struct ethtool_cmd *ecmd)
2669 {
2670         struct jme_adapter *jme = netdev_priv(netdev);
2671         int rc, fdc = 0;
2672
2673         if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2674                 return -EINVAL;
2675
2676         /*
2677          * Check If user changed duplex only while force_media.
2678          * Hardware would not generate link change interrupt.
2679          */
2680         if (jme->mii_if.force_media &&
2681         ecmd->autoneg != AUTONEG_ENABLE &&
2682         (jme->mii_if.full_duplex != ecmd->duplex))
2683                 fdc = 1;
2684
2685         spin_lock_bh(&jme->phy_lock);
2686         rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2687         spin_unlock_bh(&jme->phy_lock);
2688
2689         if (!rc) {
2690                 if (fdc)
2691                         jme_reset_link(jme);
2692                 jme->old_ecmd = *ecmd;
2693                 set_bit(JME_FLAG_SSET, &jme->flags);
2694         }
2695
2696         return rc;
2697 }
2698
2699 static int
2700 jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
2701 {
2702         int rc;
2703         struct jme_adapter *jme = netdev_priv(netdev);
2704         struct mii_ioctl_data *mii_data = if_mii(rq);
2705         unsigned int duplex_chg;
2706
2707         if (cmd == SIOCSMIIREG) {
2708                 u16 val = mii_data->val_in;
2709                 if (!(val & (BMCR_RESET|BMCR_ANENABLE)) &&
2710                     (val & BMCR_SPEED1000))
2711                         return -EINVAL;
2712         }
2713
2714         spin_lock_bh(&jme->phy_lock);
2715         rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg);
2716         spin_unlock_bh(&jme->phy_lock);
2717
2718         if (!rc && (cmd == SIOCSMIIREG)) {
2719                 if (duplex_chg)
2720                         jme_reset_link(jme);
2721                 jme_get_settings(netdev, &jme->old_ecmd);
2722                 set_bit(JME_FLAG_SSET, &jme->flags);
2723         }
2724
2725         return rc;
2726 }
2727
2728 static u32
2729 jme_get_link(struct net_device *netdev)
2730 {
2731         struct jme_adapter *jme = netdev_priv(netdev);
2732         return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2733 }
2734
2735 static u32
2736 jme_get_msglevel(struct net_device *netdev)
2737 {
2738         struct jme_adapter *jme = netdev_priv(netdev);
2739         return jme->msg_enable;
2740 }
2741
2742 static void
2743 jme_set_msglevel(struct net_device *netdev, u32 value)
2744 {
2745         struct jme_adapter *jme = netdev_priv(netdev);
2746         jme->msg_enable = value;
2747 }
2748
2749 static u32
2750 jme_get_rx_csum(struct net_device *netdev)
2751 {
2752         struct jme_adapter *jme = netdev_priv(netdev);
2753         return jme->reg_rxmcs & RXMCS_CHECKSUM;
2754 }
2755
2756 static int
2757 jme_set_rx_csum(struct net_device *netdev, u32 on)
2758 {
2759         struct jme_adapter *jme = netdev_priv(netdev);
2760
2761         spin_lock_bh(&jme->rxmcs_lock);
2762         if (on)
2763                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2764         else
2765                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2766         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2767         spin_unlock_bh(&jme->rxmcs_lock);
2768
2769         return 0;
2770 }
2771
2772 static int
2773 jme_set_tx_csum(struct net_device *netdev, u32 on)
2774 {
2775         struct jme_adapter *jme = netdev_priv(netdev);
2776
2777         if (on) {
2778                 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2779                 if (netdev->mtu <= 1900)
2780                         netdev->features |=
2781                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2782         } else {
2783                 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2784                 netdev->features &=
2785                                 ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
2786         }
2787
2788         return 0;
2789 }
2790
2791 static int
2792 jme_set_tso(struct net_device *netdev, u32 on)
2793 {
2794         struct jme_adapter *jme = netdev_priv(netdev);
2795
2796         if (on) {
2797                 set_bit(JME_FLAG_TSO, &jme->flags);
2798                 if (netdev->mtu <= 1900)
2799                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2800         } else {
2801                 clear_bit(JME_FLAG_TSO, &jme->flags);
2802                 netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
2803         }
2804
2805         return 0;
2806 }
2807
2808 static int
2809 jme_nway_reset(struct net_device *netdev)
2810 {
2811         struct jme_adapter *jme = netdev_priv(netdev);
2812         jme_restart_an(jme);
2813         return 0;
2814 }
2815
2816 static u8
2817 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2818 {
2819         u32 val;
2820         int to;
2821
2822         val = jread32(jme, JME_SMBCSR);
2823         to = JME_SMB_BUSY_TIMEOUT;
2824         while ((val & SMBCSR_BUSY) && --to) {
2825                 msleep(1);
2826                 val = jread32(jme, JME_SMBCSR);
2827         }
2828         if (!to) {
2829                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2830                 return 0xFF;
2831         }
2832
2833         jwrite32(jme, JME_SMBINTF,
2834                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2835                 SMBINTF_HWRWN_READ |
2836                 SMBINTF_HWCMD);
2837
2838         val = jread32(jme, JME_SMBINTF);
2839         to = JME_SMB_BUSY_TIMEOUT;
2840         while ((val & SMBINTF_HWCMD) && --to) {
2841                 msleep(1);
2842                 val = jread32(jme, JME_SMBINTF);
2843         }
2844         if (!to) {
2845                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2846                 return 0xFF;
2847         }
2848
2849         return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2850 }
2851
2852 static void
2853 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2854 {
2855         u32 val;
2856         int to;
2857
2858         val = jread32(jme, JME_SMBCSR);
2859         to = JME_SMB_BUSY_TIMEOUT;
2860         while ((val & SMBCSR_BUSY) && --to) {
2861                 msleep(1);
2862                 val = jread32(jme, JME_SMBCSR);
2863         }
2864         if (!to) {
2865                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2866                 return;
2867         }
2868
2869         jwrite32(jme, JME_SMBINTF,
2870                 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2871                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2872                 SMBINTF_HWRWN_WRITE |
2873                 SMBINTF_HWCMD);
2874
2875         val = jread32(jme, JME_SMBINTF);
2876         to = JME_SMB_BUSY_TIMEOUT;
2877         while ((val & SMBINTF_HWCMD) && --to) {
2878                 msleep(1);
2879                 val = jread32(jme, JME_SMBINTF);
2880         }
2881         if (!to) {
2882                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2883                 return;
2884         }
2885
2886         mdelay(2);
2887 }
2888
2889 static int
2890 jme_get_eeprom_len(struct net_device *netdev)
2891 {
2892         struct jme_adapter *jme = netdev_priv(netdev);
2893         u32 val;
2894         val = jread32(jme, JME_SMBCSR);
2895         return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2896 }
2897
2898 static int
2899 jme_get_eeprom(struct net_device *netdev,
2900                 struct ethtool_eeprom *eeprom, u8 *data)
2901 {
2902         struct jme_adapter *jme = netdev_priv(netdev);
2903         int i, offset = eeprom->offset, len = eeprom->len;
2904
2905         /*
2906          * ethtool will check the boundary for us
2907          */
2908         eeprom->magic = JME_EEPROM_MAGIC;
2909         for (i = 0 ; i < len ; ++i)
2910                 data[i] = jme_smb_read(jme, i + offset);
2911
2912         return 0;
2913 }
2914
2915 static int
2916 jme_set_eeprom(struct net_device *netdev,
2917                 struct ethtool_eeprom *eeprom, u8 *data)
2918 {
2919         struct jme_adapter *jme = netdev_priv(netdev);
2920         int i, offset = eeprom->offset, len = eeprom->len;
2921
2922         if (eeprom->magic != JME_EEPROM_MAGIC)
2923                 return -EINVAL;
2924
2925         /*
2926          * ethtool will check the boundary for us
2927          */
2928         for (i = 0 ; i < len ; ++i)
2929                 jme_smb_write(jme, i + offset, data[i]);
2930
2931         return 0;
2932 }
2933
2934 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2935 static struct ethtool_ops jme_ethtool_ops = {
2936 #else
2937 static const struct ethtool_ops jme_ethtool_ops = {
2938 #endif
2939         .get_drvinfo            = jme_get_drvinfo,
2940         .get_regs_len           = jme_get_regs_len,
2941         .get_regs               = jme_get_regs,
2942         .get_coalesce           = jme_get_coalesce,
2943         .set_coalesce           = jme_set_coalesce,
2944         .get_pauseparam         = jme_get_pauseparam,
2945         .set_pauseparam         = jme_set_pauseparam,
2946         .get_wol                = jme_get_wol,
2947         .set_wol                = jme_set_wol,
2948         .get_settings           = jme_get_settings,
2949         .set_settings           = jme_set_settings,
2950         .get_link               = jme_get_link,
2951         .get_msglevel           = jme_get_msglevel,
2952         .set_msglevel           = jme_set_msglevel,
2953         .get_rx_csum            = jme_get_rx_csum,
2954         .set_rx_csum            = jme_set_rx_csum,
2955         .set_tx_csum            = jme_set_tx_csum,
2956         .set_tso                = jme_set_tso,
2957         .set_sg                 = ethtool_op_set_sg,
2958         .nway_reset             = jme_nway_reset,
2959         .get_eeprom_len         = jme_get_eeprom_len,
2960         .get_eeprom             = jme_get_eeprom,
2961         .set_eeprom             = jme_set_eeprom,
2962 };
2963
2964 static int
2965 jme_pci_dma64(struct pci_dev *pdev)
2966 {
2967         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2968 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2969             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2970 #else
2971             !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2972 #endif
2973            )
2974 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2975                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2976 #else
2977                 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2978 #endif
2979                         return 1;
2980
2981         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2982 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2983             !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2984 #else
2985             !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2986 #endif
2987            )
2988 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2989                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2990 #else
2991                 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2992 #endif
2993                         return 1;
2994
2995 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2996         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2997                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2998 #else
2999         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
3000                 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
3001 #endif
3002                         return 0;
3003
3004         return -1;
3005 }
3006
3007 static inline void
3008 jme_phy_init(struct jme_adapter *jme)
3009 {
3010         u16 reg26;
3011
3012         reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
3013         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
3014 }
3015
3016 static inline void
3017 jme_check_hw_ver(struct jme_adapter *jme)
3018 {
3019         u32 chipmode;
3020
3021         chipmode = jread32(jme, JME_CHIPMODE);
3022
3023         jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
3024         jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
3025         jme->chip_main_rev = jme->chiprev & 0xF;
3026         jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF;
3027 }
3028
3029 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3030 static const struct net_device_ops jme_netdev_ops = {
3031         .ndo_open               = jme_open,
3032         .ndo_stop               = jme_close,
3033         .ndo_validate_addr      = eth_validate_addr,
3034         .ndo_do_ioctl           = jme_ioctl,
3035         .ndo_start_xmit         = jme_start_xmit,
3036         .ndo_set_mac_address    = jme_set_macaddr,
3037         .ndo_set_multicast_list = jme_set_multi,
3038         .ndo_change_mtu         = jme_change_mtu,
3039         .ndo_tx_timeout         = jme_tx_timeout,
3040         .ndo_vlan_rx_register   = jme_vlan_rx_register,
3041 };
3042 #endif
3043
3044 static int __devinit
3045 jme_init_one(struct pci_dev *pdev,
3046              const struct pci_device_id *ent)
3047 {
3048         int rc = 0, using_dac, i;
3049         struct net_device *netdev;
3050         struct jme_adapter *jme;
3051         u16 bmcr, bmsr;
3052         u32 apmc;
3053
3054         /*
3055          * set up PCI device basics
3056          */
3057         rc = pci_enable_device(pdev);
3058         if (rc) {
3059                 pr_err("Cannot enable PCI device\n");
3060                 goto err_out;
3061         }
3062
3063         using_dac = jme_pci_dma64(pdev);
3064         if (using_dac < 0) {
3065                 pr_err("Cannot set PCI DMA Mask\n");
3066                 rc = -EIO;
3067                 goto err_out_disable_pdev;
3068         }
3069
3070         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
3071                 pr_err("No PCI resource region found\n");
3072                 rc = -ENOMEM;
3073                 goto err_out_disable_pdev;
3074         }
3075
3076         rc = pci_request_regions(pdev, DRV_NAME);
3077         if (rc) {
3078                 pr_err("Cannot obtain PCI resource region\n");
3079                 goto err_out_disable_pdev;
3080         }
3081
3082         pci_set_master(pdev);
3083
3084         /*
3085          * alloc and init net device
3086          */
3087         netdev = alloc_etherdev(sizeof(*jme));
3088         if (!netdev) {
3089                 pr_err("Cannot allocate netdev structure\n");
3090                 rc = -ENOMEM;
3091                 goto err_out_release_regions;
3092         }
3093 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3094         netdev->netdev_ops = &jme_netdev_ops;
3095 #else
3096         netdev->open                    = jme_open;
3097         netdev->stop                    = jme_close;
3098         netdev->do_ioctl                = jme_ioctl;
3099         netdev->hard_start_xmit         = jme_start_xmit;
3100         netdev->set_mac_address         = jme_set_macaddr;
3101         netdev->set_multicast_list      = jme_set_multi;
3102         netdev->change_mtu              = jme_change_mtu;
3103         netdev->tx_timeout              = jme_tx_timeout;
3104         netdev->vlan_rx_register        = jme_vlan_rx_register;
3105 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
3106         netdev->vlan_rx_kill_vid        = jme_vlan_rx_kill_vid;
3107 #endif
3108         NETDEV_GET_STATS(netdev, &jme_get_stats);
3109 #endif
3110         netdev->ethtool_ops             = &jme_ethtool_ops;
3111         netdev->watchdog_timeo          = TX_TIMEOUT;
3112         netdev->features                =       NETIF_F_IP_CSUM |
3113                                                 NETIF_F_IPV6_CSUM |
3114                                                 NETIF_F_SG |
3115                                                 NETIF_F_TSO |
3116                                                 NETIF_F_TSO6 |
3117                                                 NETIF_F_HW_VLAN_TX |
3118                                                 NETIF_F_HW_VLAN_RX;
3119         if (using_dac)
3120                 netdev->features        |=      NETIF_F_HIGHDMA;
3121
3122         SET_NETDEV_DEV(netdev, &pdev->dev);
3123         pci_set_drvdata(pdev, netdev);
3124
3125         /*
3126          * init adapter info
3127          */
3128         jme = netdev_priv(netdev);
3129         jme->pdev = pdev;
3130         jme->dev = netdev;
3131         jme->jme_rx = netif_rx;
3132         jme->jme_vlan_rx = vlan_hwaccel_rx;
3133         jme->old_mtu = netdev->mtu = 1500;
3134         jme->phylink = 0;
3135         jme->tx_ring_size = 1 << 10;
3136         jme->tx_ring_mask = jme->tx_ring_size - 1;
3137         jme->tx_wake_threshold = 1 << 9;
3138         jme->rx_ring_size = 1 << 9;
3139         jme->rx_ring_mask = jme->rx_ring_size - 1;
3140         jme->msg_enable = JME_DEF_MSG_ENABLE;
3141         jme->regs = ioremap(pci_resource_start(pdev, 0),
3142                              pci_resource_len(pdev, 0));
3143         if (!(jme->regs)) {
3144                 pr_err("Mapping PCI resource region error\n");
3145                 rc = -ENOMEM;
3146                 goto err_out_free_netdev;
3147         }
3148
3149         if (no_pseudohp) {
3150                 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
3151                 jwrite32(jme, JME_APMC, apmc);
3152         } else if (force_pseudohp) {
3153                 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
3154                 jwrite32(jme, JME_APMC, apmc);
3155         }
3156
3157         NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3158
3159         spin_lock_init(&jme->phy_lock);
3160         spin_lock_init(&jme->macaddr_lock);
3161         spin_lock_init(&jme->rxmcs_lock);
3162
3163         atomic_set(&jme->link_changing, 1);
3164         atomic_set(&jme->rx_cleaning, 1);
3165         atomic_set(&jme->tx_cleaning, 1);
3166         atomic_set(&jme->rx_empty, 1);
3167
3168         tasklet_init(&jme->pcc_task,
3169                      jme_pcc_tasklet,
3170                      (unsigned long) jme);
3171         tasklet_init(&jme->linkch_task,
3172                      jme_link_change_tasklet,
3173                      (unsigned long) jme);
3174         tasklet_init(&jme->txclean_task,
3175                      jme_tx_clean_tasklet,
3176                      (unsigned long) jme);
3177         tasklet_init(&jme->rxclean_task,
3178                      jme_rx_clean_tasklet,
3179                      (unsigned long) jme);
3180         tasklet_init(&jme->rxempty_task,
3181                      jme_rx_empty_tasklet,
3182                      (unsigned long) jme);
3183         tasklet_disable_nosync(&jme->linkch_task);
3184         tasklet_disable_nosync(&jme->txclean_task);
3185         tasklet_disable_nosync(&jme->rxclean_task);
3186         tasklet_disable_nosync(&jme->rxempty_task);
3187         jme->dpi.cur = PCC_P1;
3188
3189         jme->reg_ghc = 0;
3190         jme->reg_rxcs = RXCS_DEFAULT;
3191         jme->reg_rxmcs = RXMCS_DEFAULT;
3192         jme->reg_txpfc = 0;
3193         jme->reg_pmcs = PMCS_MFEN;
3194         jme->reg_gpreg1 = GPREG1_DEFAULT;
3195         set_bit(JME_FLAG_TXCSUM, &jme->flags);
3196         set_bit(JME_FLAG_TSO, &jme->flags);
3197
3198         jme_clear_pm(jme);
3199         pci_set_power_state(jme->pdev, PCI_D0);
3200 #ifndef JME_NEW_PM_API
3201         jme_pci_wakeup_enable(jme, true);
3202 #endif
3203 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
3204         device_set_wakeup_enable(&jme->pdev->dev, true);
3205 #endif
3206
3207         /*
3208          * Get Max Read Req Size from PCI Config Space
3209          */
3210         pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3211         jme->mrrs &= PCI_DCSR_MRRS_MASK;
3212         switch (jme->mrrs) {
3213         case MRRS_128B:
3214                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3215                 break;
3216         case MRRS_256B:
3217                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3218                 break;
3219         default:
3220                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3221                 break;
3222         }
3223
3224         /*
3225          * Must check before reset_mac_processor
3226          */
3227         jme_check_hw_ver(jme);
3228         jme->mii_if.dev = netdev;
3229         if (jme->fpgaver) {
3230                 jme->mii_if.phy_id = 0;
3231                 for (i = 1 ; i < 32 ; ++i) {
3232                         bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3233                         bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3234                         if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3235                                 jme->mii_if.phy_id = i;
3236                                 break;
3237                         }
3238                 }
3239
3240                 if (!jme->mii_if.phy_id) {
3241                         rc = -EIO;
3242                         pr_err("Can not find phy_id\n");
3243                         goto err_out_unmap;
3244                 }
3245
3246                 jme->reg_ghc |= GHC_LINK_POLL;
3247         } else {
3248                 jme->mii_if.phy_id = 1;
3249         }
3250         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3251                 jme->mii_if.supports_gmii = true;
3252         else
3253                 jme->mii_if.supports_gmii = false;
3254         jme->mii_if.phy_id_mask = 0x1F;
3255         jme->mii_if.reg_num_mask = 0x1F;
3256         jme->mii_if.mdio_read = jme_mdio_read;
3257         jme->mii_if.mdio_write = jme_mdio_write;
3258
3259         jme_set_phyfifo_5level(jme);
3260 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,22)
3261         pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev);
3262 #else
3263         jme->pcirev = pdev->revision;
3264 #endif
3265         if (!jme->fpgaver)
3266                 jme_phy_init(jme);
3267         jme_phy_off(jme);
3268
3269         /*
3270          * Reset MAC processor and reload EEPROM for MAC Address
3271          */
3272         jme_reset_mac_processor(jme);
3273         rc = jme_reload_eeprom(jme);
3274         if (rc) {
3275                 pr_err("Reload eeprom for reading MAC Address error\n");
3276                 goto err_out_unmap;
3277         }
3278         jme_load_macaddr(netdev);
3279
3280         /*
3281          * Tell stack that we are not ready to work until open()
3282          */
3283         netif_carrier_off(netdev);
3284
3285         rc = register_netdev(netdev);
3286         if (rc) {
3287                 pr_err("Cannot register net device\n");
3288                 goto err_out_unmap;
3289         }
3290
3291         netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x "
3292                    "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3293                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3294                    "JMC250 Gigabit Ethernet" :
3295                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3296                    "JMC260 Fast Ethernet" : "Unknown",
3297                    (jme->fpgaver != 0) ? " (FPGA)" : "",
3298                    (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3299                    jme->pcirev,
3300                    netdev->dev_addr[0],
3301                    netdev->dev_addr[1],
3302                    netdev->dev_addr[2],
3303                    netdev->dev_addr[3],
3304                    netdev->dev_addr[4],
3305                    netdev->dev_addr[5]);
3306
3307         return 0;
3308
3309 err_out_unmap:
3310         iounmap(jme->regs);
3311 err_out_free_netdev:
3312         pci_set_drvdata(pdev, NULL);
3313         free_netdev(netdev);
3314 err_out_release_regions:
3315         pci_release_regions(pdev);
3316 err_out_disable_pdev:
3317         pci_disable_device(pdev);
3318 err_out:
3319         return rc;
3320 }
3321
3322 static void __devexit
3323 jme_remove_one(struct pci_dev *pdev)
3324 {
3325         struct net_device *netdev = pci_get_drvdata(pdev);
3326         struct jme_adapter *jme = netdev_priv(netdev);
3327
3328         unregister_netdev(netdev);
3329         iounmap(jme->regs);
3330         pci_set_drvdata(pdev, NULL);
3331         free_netdev(netdev);
3332         pci_release_regions(pdev);
3333         pci_disable_device(pdev);
3334
3335 }
3336
3337 static void
3338 jme_shutdown(struct pci_dev *pdev)
3339 {
3340         struct net_device *netdev = pci_get_drvdata(pdev);
3341         struct jme_adapter *jme = netdev_priv(netdev);
3342
3343         if (jme->reg_pmcs) {
3344                 jme_powersave_phy(jme);
3345                 jme_pci_wakeup_enable(jme, true);
3346 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
3347                 device_set_wakeup_enable(&jme->pdev->dev, true);
3348 #endif
3349         } else {
3350                 jme_phy_off(jme);
3351         }
3352 }
3353
3354 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,25)
3355         #ifdef CONFIG_PM
3356                 #define JME_HAVE_PM
3357         #endif
3358 #else
3359         #ifdef CONFIG_PM_SLEEP
3360                 #define JME_HAVE_PM
3361         #endif
3362 #endif
3363
3364 #ifdef JME_HAVE_PM
3365 static int
3366 #ifdef JME_NEW_PM_API
3367 jme_suspend(struct device *dev)
3368 #else
3369 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3370 #endif
3371 {
3372 #ifdef JME_NEW_PM_API
3373         struct pci_dev *pdev = to_pci_dev(dev);
3374 #endif
3375         struct net_device *netdev = pci_get_drvdata(pdev);
3376         struct jme_adapter *jme = netdev_priv(netdev);
3377
3378         atomic_dec(&jme->link_changing);
3379
3380         netif_device_detach(netdev);
3381         netif_stop_queue(netdev);
3382         jme_stop_irq(jme);
3383
3384         tasklet_disable(&jme->txclean_task);
3385         tasklet_disable(&jme->rxclean_task);
3386         tasklet_disable(&jme->rxempty_task);
3387
3388         if (netif_carrier_ok(netdev)) {
3389                 if (test_bit(JME_FLAG_POLL, &jme->flags))
3390                         jme_polling_mode(jme);
3391
3392                 jme_stop_pcc_timer(jme);
3393                 jme_disable_rx_engine(jme);
3394                 jme_disable_tx_engine(jme);
3395                 jme_reset_mac_processor(jme);
3396                 jme_free_rx_resources(jme);
3397                 jme_free_tx_resources(jme);
3398                 netif_carrier_off(netdev);
3399                 jme->phylink = 0;
3400         }
3401
3402         tasklet_enable(&jme->txclean_task);
3403         tasklet_hi_enable(&jme->rxclean_task);
3404         tasklet_hi_enable(&jme->rxempty_task);
3405
3406         jme_powersave_phy(jme);
3407 #ifndef JME_NEW_PM_API
3408         pci_save_state(pdev);
3409         jme_pci_wakeup_enable(jme, true);
3410         pci_set_power_state(pdev, PCI_D3hot);
3411 #endif
3412         jme_clear_pm(jme);
3413
3414         return 0;
3415 }
3416
3417 static int
3418 #ifdef JME_NEW_PM_API
3419 jme_resume(struct device *dev)
3420 #else
3421 jme_resume(struct pci_dev *pdev)
3422 #endif
3423 {
3424 #ifdef JME_NEW_PM_API
3425         struct pci_dev *pdev = to_pci_dev(dev);
3426 #endif
3427         struct net_device *netdev = pci_get_drvdata(pdev);
3428         struct jme_adapter *jme = netdev_priv(netdev);
3429
3430         jme_clear_pm(jme);
3431 #ifndef JME_NEW_PM_API
3432         pci_set_power_state(pdev, PCI_D0);
3433         pci_restore_state(pdev);
3434 #endif
3435
3436         jme_phy_on(jme);
3437         if (test_bit(JME_FLAG_SSET, &jme->flags))
3438                 jme_set_settings(netdev, &jme->old_ecmd);
3439         else
3440                 jme_reset_phy_processor(jme);
3441
3442         jme_start_irq(jme);
3443         netif_device_attach(netdev);
3444
3445         atomic_inc(&jme->link_changing);
3446
3447         jme_reset_link(jme);
3448
3449         return 0;
3450 }
3451
3452 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,38)
3453 static SIMPLE_DEV_PM_OPS(jme_pm_ops, jme_suspend, jme_resume);
3454 #define JME_PM_OPS (&jme_pm_ops)
3455 #endif
3456
3457 #else
3458
3459 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,38)
3460 #define JME_PM_OPS NULL
3461 #endif
3462 #endif
3463
3464 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3465 static struct pci_device_id jme_pci_tbl[] = {
3466 #else
3467 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3468 #endif
3469         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3470         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3471         { }
3472 };
3473
3474 static struct pci_driver jme_driver = {
3475         .name           = DRV_NAME,
3476         .id_table       = jme_pci_tbl,
3477         .probe          = jme_init_one,
3478         .remove         = __devexit_p(jme_remove_one),
3479         .shutdown       = jme_shutdown,
3480 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,38)
3481         .suspend        = jme_suspend,
3482         .resume         = jme_resume
3483 #else
3484         .driver.pm      = JME_PM_OPS,
3485 #endif
3486 };
3487
3488 static int __init
3489 jme_init_module(void)
3490 {
3491         pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION);
3492         return pci_register_driver(&jme_driver);
3493 }
3494
3495 static void __exit
3496 jme_cleanup_module(void)
3497 {
3498         pci_unregister_driver(&jme_driver);
3499 }
3500
3501 module_init(jme_init_module);
3502 module_exit(jme_cleanup_module);
3503
3504 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3505 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3506 MODULE_LICENSE("GPL");
3507 MODULE_VERSION(DRV_VERSION);
3508 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3509