jme: Don't show UDP Checksum error if HW misjudged
[jme.git] / jme.c
1 /*
2  * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
3  *
4  * Copyright 2008 JMicron Technology Corporation
5  * http://www.jmicron.com/
6  * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org>
7  *
8  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22  *
23  */
24
25 #include <linux/version.h>
26 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
27 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
28 #endif
29
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/pci.h>
33 #include <linux/netdevice.h>
34 #include <linux/etherdevice.h>
35 #include <linux/ethtool.h>
36 #include <linux/mii.h>
37 #include <linux/crc32.h>
38 #include <linux/delay.h>
39 #include <linux/spinlock.h>
40 #include <linux/in.h>
41 #include <linux/ip.h>
42 #include <linux/ipv6.h>
43 #include <linux/tcp.h>
44 #include <linux/udp.h>
45 #include <linux/if_vlan.h>
46 #include <linux/slab.h>
47 #include <net/ip6_checksum.h>
48 #include "jme.h"
49
50 static int force_pseudohp = -1;
51 static int no_pseudohp = -1;
52 static int no_extplug = -1;
53 module_param(force_pseudohp, int, 0);
54 MODULE_PARM_DESC(force_pseudohp,
55         "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
56 module_param(no_pseudohp, int, 0);
57 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
58 module_param(no_extplug, int, 0);
59 MODULE_PARM_DESC(no_extplug,
60         "Do not use external plug signal for pseudo hot-plug.");
61
62 static int
63 jme_mdio_read(struct net_device *netdev, int phy, int reg)
64 {
65         struct jme_adapter *jme = netdev_priv(netdev);
66         int i, val, again = (reg == MII_BMSR) ? 1 : 0;
67
68 read_again:
69         jwrite32(jme, JME_SMI, SMI_OP_REQ |
70                                 smi_phy_addr(phy) |
71                                 smi_reg_addr(reg));
72
73         wmb();
74         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
75                 udelay(20);
76                 val = jread32(jme, JME_SMI);
77                 if ((val & SMI_OP_REQ) == 0)
78                         break;
79         }
80
81         if (i == 0) {
82                 pr_err("phy(%d) read timeout : %d\n", phy, reg);
83                 return 0;
84         }
85
86         if (again--)
87                 goto read_again;
88
89         return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
90 }
91
92 static void
93 jme_mdio_write(struct net_device *netdev,
94                                 int phy, int reg, int val)
95 {
96         struct jme_adapter *jme = netdev_priv(netdev);
97         int i;
98
99         jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
100                 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
101                 smi_phy_addr(phy) | smi_reg_addr(reg));
102
103         wmb();
104         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
105                 udelay(20);
106                 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
107                         break;
108         }
109
110         if (i == 0)
111                 pr_err("phy(%d) write timeout : %d\n", phy, reg);
112 }
113
114 static inline void
115 jme_reset_phy_processor(struct jme_adapter *jme)
116 {
117         u32 val;
118
119         jme_mdio_write(jme->dev,
120                         jme->mii_if.phy_id,
121                         MII_ADVERTISE, ADVERTISE_ALL |
122                         ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
123
124         if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
125                 jme_mdio_write(jme->dev,
126                                 jme->mii_if.phy_id,
127                                 MII_CTRL1000,
128                                 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
129
130         val = jme_mdio_read(jme->dev,
131                                 jme->mii_if.phy_id,
132                                 MII_BMCR);
133
134         jme_mdio_write(jme->dev,
135                         jme->mii_if.phy_id,
136                         MII_BMCR, val | BMCR_RESET);
137 }
138
139 static void
140 jme_setup_wakeup_frame(struct jme_adapter *jme,
141                        const u32 *mask, u32 crc, int fnr)
142 {
143         int i;
144
145         /*
146          * Setup CRC pattern
147          */
148         jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
149         wmb();
150         jwrite32(jme, JME_WFODP, crc);
151         wmb();
152
153         /*
154          * Setup Mask
155          */
156         for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
157                 jwrite32(jme, JME_WFOI,
158                                 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
159                                 (fnr & WFOI_FRAME_SEL));
160                 wmb();
161                 jwrite32(jme, JME_WFODP, mask[i]);
162                 wmb();
163         }
164 }
165
166 static inline void
167 jme_mac_rxclk_off(struct jme_adapter *jme)
168 {
169         jme->reg_gpreg1 |= GPREG1_RXCLKOFF;
170         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
171 }
172
173 static inline void
174 jme_mac_rxclk_on(struct jme_adapter *jme)
175 {
176         jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF;
177         jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1);
178 }
179
180 static inline void
181 jme_mac_txclk_off(struct jme_adapter *jme)
182 {
183         jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC);
184         jwrite32f(jme, JME_GHC, jme->reg_ghc);
185 }
186
187 static inline void
188 jme_mac_txclk_on(struct jme_adapter *jme)
189 {
190         u32 speed = jme->reg_ghc & GHC_SPEED;
191         if (speed == GHC_SPEED_1000M)
192                 jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
193         else
194                 jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
195         jwrite32f(jme, JME_GHC, jme->reg_ghc);
196 }
197
198 static inline void
199 jme_reset_ghc_speed(struct jme_adapter *jme)
200 {
201         jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX);
202         jwrite32f(jme, JME_GHC, jme->reg_ghc);
203 }
204
205 static inline void
206 jme_reset_250A2_workaround(struct jme_adapter *jme)
207 {
208         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
209                              GPREG1_RSSPATCH);
210         jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
211 }
212
213 static inline void
214 jme_assert_ghc_reset(struct jme_adapter *jme)
215 {
216         jme->reg_ghc |= GHC_SWRST;
217         jwrite32f(jme, JME_GHC, jme->reg_ghc);
218 }
219
220 static inline void
221 jme_clear_ghc_reset(struct jme_adapter *jme)
222 {
223         jme->reg_ghc &= ~GHC_SWRST;
224         jwrite32f(jme, JME_GHC, jme->reg_ghc);
225 }
226
227 static inline void
228 jme_reset_mac_processor(struct jme_adapter *jme)
229 {
230         static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
231         u32 crc = 0xCDCDCDCD;
232         u32 gpreg0;
233         int i;
234
235         jme_reset_ghc_speed(jme);
236         jme_reset_250A2_workaround(jme);
237
238         jme_mac_rxclk_on(jme);
239         jme_mac_txclk_on(jme);
240         udelay(1);
241         jme_assert_ghc_reset(jme);
242         udelay(1);
243         jme_mac_rxclk_off(jme);
244         jme_mac_txclk_off(jme);
245         udelay(1);
246         jme_clear_ghc_reset(jme);
247         udelay(1);
248         jme_mac_rxclk_on(jme);
249         jme_mac_txclk_on(jme);
250         udelay(1);
251         jme_mac_rxclk_off(jme);
252         jme_mac_txclk_off(jme);
253
254         jwrite32(jme, JME_RXDBA_LO, 0x00000000);
255         jwrite32(jme, JME_RXDBA_HI, 0x00000000);
256         jwrite32(jme, JME_RXQDC, 0x00000000);
257         jwrite32(jme, JME_RXNDA, 0x00000000);
258         jwrite32(jme, JME_TXDBA_LO, 0x00000000);
259         jwrite32(jme, JME_TXDBA_HI, 0x00000000);
260         jwrite32(jme, JME_TXQDC, 0x00000000);
261         jwrite32(jme, JME_TXNDA, 0x00000000);
262
263         jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
264         jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
265         for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
266                 jme_setup_wakeup_frame(jme, mask, crc, i);
267         if (jme->fpgaver)
268                 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
269         else
270                 gpreg0 = GPREG0_DEFAULT;
271         jwrite32(jme, JME_GPREG0, gpreg0);
272 }
273
274 static inline void
275 jme_clear_pm(struct jme_adapter *jme)
276 {
277         jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
278         pci_set_power_state(jme->pdev, PCI_D0);
279         pci_enable_wake(jme->pdev, PCI_D0, false);
280 }
281
282 static int
283 jme_reload_eeprom(struct jme_adapter *jme)
284 {
285         u32 val;
286         int i;
287
288         val = jread32(jme, JME_SMBCSR);
289
290         if (val & SMBCSR_EEPROMD) {
291                 val |= SMBCSR_CNACK;
292                 jwrite32(jme, JME_SMBCSR, val);
293                 val |= SMBCSR_RELOAD;
294                 jwrite32(jme, JME_SMBCSR, val);
295                 mdelay(12);
296
297                 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
298                         mdelay(1);
299                         if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
300                                 break;
301                 }
302
303                 if (i == 0) {
304                         pr_err("eeprom reload timeout\n");
305                         return -EIO;
306                 }
307         }
308
309         return 0;
310 }
311
312 static void
313 jme_load_macaddr(struct net_device *netdev)
314 {
315         struct jme_adapter *jme = netdev_priv(netdev);
316         unsigned char macaddr[6];
317         u32 val;
318
319         spin_lock_bh(&jme->macaddr_lock);
320         val = jread32(jme, JME_RXUMA_LO);
321         macaddr[0] = (val >>  0) & 0xFF;
322         macaddr[1] = (val >>  8) & 0xFF;
323         macaddr[2] = (val >> 16) & 0xFF;
324         macaddr[3] = (val >> 24) & 0xFF;
325         val = jread32(jme, JME_RXUMA_HI);
326         macaddr[4] = (val >>  0) & 0xFF;
327         macaddr[5] = (val >>  8) & 0xFF;
328         memcpy(netdev->dev_addr, macaddr, 6);
329         spin_unlock_bh(&jme->macaddr_lock);
330 }
331
332 static inline void
333 jme_set_rx_pcc(struct jme_adapter *jme, int p)
334 {
335         switch (p) {
336         case PCC_OFF:
337                 jwrite32(jme, JME_PCCRX0,
338                         ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
339                         ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
340                 break;
341         case PCC_P1:
342                 jwrite32(jme, JME_PCCRX0,
343                         ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
344                         ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
345                 break;
346         case PCC_P2:
347                 jwrite32(jme, JME_PCCRX0,
348                         ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
349                         ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
350                 break;
351         case PCC_P3:
352                 jwrite32(jme, JME_PCCRX0,
353                         ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
354                         ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
355                 break;
356         default:
357                 break;
358         }
359         wmb();
360
361         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
362                 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
363 }
364
365 static void
366 jme_start_irq(struct jme_adapter *jme)
367 {
368         register struct dynpcc_info *dpi = &(jme->dpi);
369
370         jme_set_rx_pcc(jme, PCC_P1);
371         dpi->cur                = PCC_P1;
372         dpi->attempt            = PCC_P1;
373         dpi->cnt                = 0;
374
375         jwrite32(jme, JME_PCCTX,
376                         ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
377                         ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
378                         PCCTXQ0_EN
379                 );
380
381         /*
382          * Enable Interrupts
383          */
384         jwrite32(jme, JME_IENS, INTR_ENABLE);
385 }
386
387 static inline void
388 jme_stop_irq(struct jme_adapter *jme)
389 {
390         /*
391          * Disable Interrupts
392          */
393         jwrite32f(jme, JME_IENC, INTR_ENABLE);
394 }
395
396 static u32
397 jme_linkstat_from_phy(struct jme_adapter *jme)
398 {
399         u32 phylink, bmsr;
400
401         phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
402         bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
403         if (bmsr & BMSR_ANCOMP)
404                 phylink |= PHY_LINK_AUTONEG_COMPLETE;
405
406         return phylink;
407 }
408
409 static inline void
410 jme_set_phyfifo_5level(struct jme_adapter *jme)
411 {
412         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
413 }
414
415 static inline void
416 jme_set_phyfifo_8level(struct jme_adapter *jme)
417 {
418         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
419 }
420
421 static int
422 jme_check_link(struct net_device *netdev, int testonly)
423 {
424         struct jme_adapter *jme = netdev_priv(netdev);
425         u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr;
426         char linkmsg[64];
427         int rc = 0;
428
429         linkmsg[0] = '\0';
430
431         if (jme->fpgaver)
432                 phylink = jme_linkstat_from_phy(jme);
433         else
434                 phylink = jread32(jme, JME_PHY_LINK);
435
436         if (phylink & PHY_LINK_UP) {
437                 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
438                         /*
439                          * If we did not enable AN
440                          * Speed/Duplex Info should be obtained from SMI
441                          */
442                         phylink = PHY_LINK_UP;
443
444                         bmcr = jme_mdio_read(jme->dev,
445                                                 jme->mii_if.phy_id,
446                                                 MII_BMCR);
447
448                         phylink |= ((bmcr & BMCR_SPEED1000) &&
449                                         (bmcr & BMCR_SPEED100) == 0) ?
450                                         PHY_LINK_SPEED_1000M :
451                                         (bmcr & BMCR_SPEED100) ?
452                                         PHY_LINK_SPEED_100M :
453                                         PHY_LINK_SPEED_10M;
454
455                         phylink |= (bmcr & BMCR_FULLDPLX) ?
456                                          PHY_LINK_DUPLEX : 0;
457
458                         strcat(linkmsg, "Forced: ");
459                 } else {
460                         /*
461                          * Keep polling for speed/duplex resolve complete
462                          */
463                         while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
464                                 --cnt) {
465
466                                 udelay(1);
467
468                                 if (jme->fpgaver)
469                                         phylink = jme_linkstat_from_phy(jme);
470                                 else
471                                         phylink = jread32(jme, JME_PHY_LINK);
472                         }
473                         if (!cnt)
474                                 pr_err("Waiting speed resolve timeout\n");
475
476                         strcat(linkmsg, "ANed: ");
477                 }
478
479                 if (jme->phylink == phylink) {
480                         rc = 1;
481                         goto out;
482                 }
483                 if (testonly)
484                         goto out;
485
486                 jme->phylink = phylink;
487
488                 /*
489                  * The speed/duplex setting of jme->reg_ghc already cleared
490                  * by jme_reset_mac_processor()
491                  */
492                 switch (phylink & PHY_LINK_SPEED_MASK) {
493                 case PHY_LINK_SPEED_10M:
494                         jme->reg_ghc |= GHC_SPEED_10M;
495                         strcat(linkmsg, "10 Mbps, ");
496                         break;
497                 case PHY_LINK_SPEED_100M:
498                         jme->reg_ghc |= GHC_SPEED_100M;
499                         strcat(linkmsg, "100 Mbps, ");
500                         break;
501                 case PHY_LINK_SPEED_1000M:
502                         jme->reg_ghc |= GHC_SPEED_1000M;
503                         strcat(linkmsg, "1000 Mbps, ");
504                         break;
505                 default:
506                         break;
507                 }
508
509                 if (phylink & PHY_LINK_DUPLEX) {
510                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
511                         jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX);
512                         jme->reg_ghc |= GHC_DPX;
513                 } else {
514                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
515                                                 TXMCS_BACKOFF |
516                                                 TXMCS_CARRIERSENSE |
517                                                 TXMCS_COLLISION);
518                         jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX);
519                 }
520
521                 jwrite32(jme, JME_GHC, jme->reg_ghc);
522
523                 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
524                         jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH |
525                                              GPREG1_RSSPATCH);
526                         if (!(phylink & PHY_LINK_DUPLEX))
527                                 jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH;
528                         switch (phylink & PHY_LINK_SPEED_MASK) {
529                         case PHY_LINK_SPEED_10M:
530                                 jme_set_phyfifo_8level(jme);
531                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
532                                 break;
533                         case PHY_LINK_SPEED_100M:
534                                 jme_set_phyfifo_5level(jme);
535                                 jme->reg_gpreg1 |= GPREG1_RSSPATCH;
536                                 break;
537                         case PHY_LINK_SPEED_1000M:
538                                 jme_set_phyfifo_8level(jme);
539                                 break;
540                         default:
541                                 break;
542                         }
543                 }
544                 jwrite32(jme, JME_GPREG1, jme->reg_gpreg1);
545
546                 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
547                                         "Full-Duplex, " :
548                                         "Half-Duplex, ");
549                 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
550                                         "MDI-X" :
551                                         "MDI");
552                 netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg);
553                 netif_carrier_on(netdev);
554         } else {
555                 if (testonly)
556                         goto out;
557
558                 netif_info(jme, link, jme->dev, "Link is down\n");
559                 jme->phylink = 0;
560                 netif_carrier_off(netdev);
561         }
562
563 out:
564         return rc;
565 }
566
567 static int
568 jme_setup_tx_resources(struct jme_adapter *jme)
569 {
570         struct jme_ring *txring = &(jme->txring[0]);
571
572         txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
573                                    TX_RING_ALLOC_SIZE(jme->tx_ring_size),
574                                    &(txring->dmaalloc),
575                                    GFP_ATOMIC);
576
577         if (!txring->alloc)
578                 goto err_set_null;
579
580         /*
581          * 16 Bytes align
582          */
583         txring->desc            = (void *)ALIGN((unsigned long)(txring->alloc),
584                                                 RING_DESC_ALIGN);
585         txring->dma             = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
586         txring->next_to_use     = 0;
587         atomic_set(&txring->next_to_clean, 0);
588         atomic_set(&txring->nr_free, jme->tx_ring_size);
589
590         txring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
591                                         jme->tx_ring_size, GFP_ATOMIC);
592         if (unlikely(!(txring->bufinf)))
593                 goto err_free_txring;
594
595         /*
596          * Initialize Transmit Descriptors
597          */
598         memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
599         memset(txring->bufinf, 0,
600                 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
601
602         return 0;
603
604 err_free_txring:
605         dma_free_coherent(&(jme->pdev->dev),
606                           TX_RING_ALLOC_SIZE(jme->tx_ring_size),
607                           txring->alloc,
608                           txring->dmaalloc);
609
610 err_set_null:
611         txring->desc = NULL;
612         txring->dmaalloc = 0;
613         txring->dma = 0;
614         txring->bufinf = NULL;
615
616         return -ENOMEM;
617 }
618
619 static void
620 jme_free_tx_resources(struct jme_adapter *jme)
621 {
622         int i;
623         struct jme_ring *txring = &(jme->txring[0]);
624         struct jme_buffer_info *txbi;
625
626         if (txring->alloc) {
627                 if (txring->bufinf) {
628                         for (i = 0 ; i < jme->tx_ring_size ; ++i) {
629                                 txbi = txring->bufinf + i;
630                                 if (txbi->skb) {
631                                         dev_kfree_skb(txbi->skb);
632                                         txbi->skb = NULL;
633                                 }
634                                 txbi->mapping           = 0;
635                                 txbi->len               = 0;
636                                 txbi->nr_desc           = 0;
637                                 txbi->start_xmit        = 0;
638                         }
639                         kfree(txring->bufinf);
640                 }
641
642                 dma_free_coherent(&(jme->pdev->dev),
643                                   TX_RING_ALLOC_SIZE(jme->tx_ring_size),
644                                   txring->alloc,
645                                   txring->dmaalloc);
646
647                 txring->alloc           = NULL;
648                 txring->desc            = NULL;
649                 txring->dmaalloc        = 0;
650                 txring->dma             = 0;
651                 txring->bufinf          = NULL;
652         }
653         txring->next_to_use     = 0;
654         atomic_set(&txring->next_to_clean, 0);
655         atomic_set(&txring->nr_free, 0);
656 }
657
658 static inline void
659 jme_enable_tx_engine(struct jme_adapter *jme)
660 {
661         /*
662          * Select Queue 0
663          */
664         jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
665         wmb();
666
667         /*
668          * Setup TX Queue 0 DMA Bass Address
669          */
670         jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
671         jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
672         jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
673
674         /*
675          * Setup TX Descptor Count
676          */
677         jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
678
679         /*
680          * Enable TX Engine
681          */
682         wmb();
683         jwrite32f(jme, JME_TXCS, jme->reg_txcs |
684                                 TXCS_SELECT_QUEUE0 |
685                                 TXCS_ENABLE);
686
687         /*
688          * Start clock for TX MAC Processor
689          */
690         jme_mac_txclk_on(jme);
691 }
692
693 static inline void
694 jme_restart_tx_engine(struct jme_adapter *jme)
695 {
696         /*
697          * Restart TX Engine
698          */
699         jwrite32(jme, JME_TXCS, jme->reg_txcs |
700                                 TXCS_SELECT_QUEUE0 |
701                                 TXCS_ENABLE);
702 }
703
704 static inline void
705 jme_disable_tx_engine(struct jme_adapter *jme)
706 {
707         int i;
708         u32 val;
709
710         /*
711          * Disable TX Engine
712          */
713         jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
714         wmb();
715
716         val = jread32(jme, JME_TXCS);
717         for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
718                 mdelay(1);
719                 val = jread32(jme, JME_TXCS);
720                 rmb();
721         }
722
723         if (!i)
724                 pr_err("Disable TX engine timeout\n");
725
726         /*
727          * Stop clock for TX MAC Processor
728          */
729         jme_mac_txclk_off(jme);
730 }
731
732 static void
733 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
734 {
735         struct jme_ring *rxring = &(jme->rxring[0]);
736         register struct rxdesc *rxdesc = rxring->desc;
737         struct jme_buffer_info *rxbi = rxring->bufinf;
738         rxdesc += i;
739         rxbi += i;
740
741         rxdesc->dw[0] = 0;
742         rxdesc->dw[1] = 0;
743         rxdesc->desc1.bufaddrh  = cpu_to_le32((__u64)rxbi->mapping >> 32);
744         rxdesc->desc1.bufaddrl  = cpu_to_le32(
745                                         (__u64)rxbi->mapping & 0xFFFFFFFFUL);
746         rxdesc->desc1.datalen   = cpu_to_le16(rxbi->len);
747         if (jme->dev->features & NETIF_F_HIGHDMA)
748                 rxdesc->desc1.flags = RXFLAG_64BIT;
749         wmb();
750         rxdesc->desc1.flags     |= RXFLAG_OWN | RXFLAG_INT;
751 }
752
753 static int
754 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
755 {
756         struct jme_ring *rxring = &(jme->rxring[0]);
757         struct jme_buffer_info *rxbi = rxring->bufinf + i;
758         struct sk_buff *skb;
759
760         skb = netdev_alloc_skb(jme->dev,
761                 jme->dev->mtu + RX_EXTRA_LEN);
762         if (unlikely(!skb))
763                 return -ENOMEM;
764 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
765         skb->dev = jme->dev;
766 #endif
767
768         rxbi->skb = skb;
769         rxbi->len = skb_tailroom(skb);
770         rxbi->mapping = pci_map_page(jme->pdev,
771                                         virt_to_page(skb->data),
772                                         offset_in_page(skb->data),
773                                         rxbi->len,
774                                         PCI_DMA_FROMDEVICE);
775
776         return 0;
777 }
778
779 static void
780 jme_free_rx_buf(struct jme_adapter *jme, int i)
781 {
782         struct jme_ring *rxring = &(jme->rxring[0]);
783         struct jme_buffer_info *rxbi = rxring->bufinf;
784         rxbi += i;
785
786         if (rxbi->skb) {
787                 pci_unmap_page(jme->pdev,
788                                  rxbi->mapping,
789                                  rxbi->len,
790                                  PCI_DMA_FROMDEVICE);
791                 dev_kfree_skb(rxbi->skb);
792                 rxbi->skb = NULL;
793                 rxbi->mapping = 0;
794                 rxbi->len = 0;
795         }
796 }
797
798 static void
799 jme_free_rx_resources(struct jme_adapter *jme)
800 {
801         int i;
802         struct jme_ring *rxring = &(jme->rxring[0]);
803
804         if (rxring->alloc) {
805                 if (rxring->bufinf) {
806                         for (i = 0 ; i < jme->rx_ring_size ; ++i)
807                                 jme_free_rx_buf(jme, i);
808                         kfree(rxring->bufinf);
809                 }
810
811                 dma_free_coherent(&(jme->pdev->dev),
812                                   RX_RING_ALLOC_SIZE(jme->rx_ring_size),
813                                   rxring->alloc,
814                                   rxring->dmaalloc);
815                 rxring->alloc    = NULL;
816                 rxring->desc     = NULL;
817                 rxring->dmaalloc = 0;
818                 rxring->dma      = 0;
819                 rxring->bufinf   = NULL;
820         }
821         rxring->next_to_use   = 0;
822         atomic_set(&rxring->next_to_clean, 0);
823 }
824
825 static int
826 jme_setup_rx_resources(struct jme_adapter *jme)
827 {
828         int i;
829         struct jme_ring *rxring = &(jme->rxring[0]);
830
831         rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
832                                    RX_RING_ALLOC_SIZE(jme->rx_ring_size),
833                                    &(rxring->dmaalloc),
834                                    GFP_ATOMIC);
835         if (!rxring->alloc)
836                 goto err_set_null;
837
838         /*
839          * 16 Bytes align
840          */
841         rxring->desc            = (void *)ALIGN((unsigned long)(rxring->alloc),
842                                                 RING_DESC_ALIGN);
843         rxring->dma             = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
844         rxring->next_to_use     = 0;
845         atomic_set(&rxring->next_to_clean, 0);
846
847         rxring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
848                                         jme->rx_ring_size, GFP_ATOMIC);
849         if (unlikely(!(rxring->bufinf)))
850                 goto err_free_rxring;
851
852         /*
853          * Initiallize Receive Descriptors
854          */
855         memset(rxring->bufinf, 0,
856                 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
857         for (i = 0 ; i < jme->rx_ring_size ; ++i) {
858                 if (unlikely(jme_make_new_rx_buf(jme, i))) {
859                         jme_free_rx_resources(jme);
860                         return -ENOMEM;
861                 }
862
863                 jme_set_clean_rxdesc(jme, i);
864         }
865
866         return 0;
867
868 err_free_rxring:
869         dma_free_coherent(&(jme->pdev->dev),
870                           RX_RING_ALLOC_SIZE(jme->rx_ring_size),
871                           rxring->alloc,
872                           rxring->dmaalloc);
873 err_set_null:
874         rxring->desc = NULL;
875         rxring->dmaalloc = 0;
876         rxring->dma = 0;
877         rxring->bufinf = NULL;
878
879         return -ENOMEM;
880 }
881
882 static inline void
883 jme_enable_rx_engine(struct jme_adapter *jme)
884 {
885         /*
886          * Select Queue 0
887          */
888         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
889                                 RXCS_QUEUESEL_Q0);
890         wmb();
891
892         /*
893          * Setup RX DMA Bass Address
894          */
895         jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
896         jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
897         jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
898
899         /*
900          * Setup RX Descriptor Count
901          */
902         jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
903
904         /*
905          * Setup Unicast Filter
906          */
907         jme_set_unicastaddr(jme->dev);
908         jme_set_multi(jme->dev);
909
910         /*
911          * Enable RX Engine
912          */
913         wmb();
914         jwrite32f(jme, JME_RXCS, jme->reg_rxcs |
915                                 RXCS_QUEUESEL_Q0 |
916                                 RXCS_ENABLE |
917                                 RXCS_QST);
918
919         /*
920          * Start clock for RX MAC Processor
921          */
922         jme_mac_rxclk_on(jme);
923 }
924
925 static inline void
926 jme_restart_rx_engine(struct jme_adapter *jme)
927 {
928         /*
929          * Start RX Engine
930          */
931         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
932                                 RXCS_QUEUESEL_Q0 |
933                                 RXCS_ENABLE |
934                                 RXCS_QST);
935 }
936
937 static inline void
938 jme_disable_rx_engine(struct jme_adapter *jme)
939 {
940         int i;
941         u32 val;
942
943         /*
944          * Disable RX Engine
945          */
946         jwrite32(jme, JME_RXCS, jme->reg_rxcs);
947         wmb();
948
949         val = jread32(jme, JME_RXCS);
950         for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
951                 mdelay(1);
952                 val = jread32(jme, JME_RXCS);
953                 rmb();
954         }
955
956         if (!i)
957                 pr_err("Disable RX engine timeout\n");
958
959         /*
960          * Stop clock for RX MAC Processor
961          */
962         jme_mac_rxclk_off(jme);
963 }
964
965 static u16
966 jme_udpsum(struct sk_buff *skb)
967 {
968         u16 csum = 0xFFFFu;
969
970         if (skb->len < (ETH_HLEN + sizeof(struct iphdr)))
971                 return csum;
972         if (skb->protocol != htons(ETH_P_IP))
973                 return csum;
974         skb_set_network_header(skb, ETH_HLEN);
975         if ((ip_hdr(skb)->protocol != IPPROTO_UDP) ||
976             (skb->len < (ETH_HLEN +
977                         (ip_hdr(skb)->ihl << 2) +
978                         sizeof(struct udphdr)))) {
979                 skb_reset_network_header(skb);
980                 return csum;
981         }
982         skb_set_transport_header(skb,
983                         ETH_HLEN + (ip_hdr(skb)->ihl << 2));
984         csum = udp_hdr(skb)->check;
985         skb_reset_transport_header(skb);
986         skb_reset_network_header(skb);
987
988         return csum;
989 }
990
991 static int
992 jme_rxsum_ok(struct jme_adapter *jme, u16 flags, struct sk_buff *skb)
993 {
994         if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
995                 return false;
996
997         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
998                         == RXWBFLAG_TCPON)) {
999                 if (flags & RXWBFLAG_IPV4)
1000                         netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
1001                 return false;
1002         }
1003
1004         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
1005                         == RXWBFLAG_UDPON) && jme_udpsum(skb)) {
1006                 if (flags & RXWBFLAG_IPV4)
1007                         netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n");
1008                 return false;
1009         }
1010
1011         if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
1012                         == RXWBFLAG_IPV4)) {
1013                 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n");
1014                 return false;
1015         }
1016
1017         return true;
1018 }
1019
1020 static void
1021 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
1022 {
1023         struct jme_ring *rxring = &(jme->rxring[0]);
1024         struct rxdesc *rxdesc = rxring->desc;
1025         struct jme_buffer_info *rxbi = rxring->bufinf;
1026         struct sk_buff *skb;
1027         int framesize;
1028
1029         rxdesc += idx;
1030         rxbi += idx;
1031
1032         skb = rxbi->skb;
1033         pci_dma_sync_single_for_cpu(jme->pdev,
1034                                         rxbi->mapping,
1035                                         rxbi->len,
1036                                         PCI_DMA_FROMDEVICE);
1037
1038         if (unlikely(jme_make_new_rx_buf(jme, idx))) {
1039                 pci_dma_sync_single_for_device(jme->pdev,
1040                                                 rxbi->mapping,
1041                                                 rxbi->len,
1042                                                 PCI_DMA_FROMDEVICE);
1043
1044                 ++(NET_STAT(jme).rx_dropped);
1045         } else {
1046                 framesize = le16_to_cpu(rxdesc->descwb.framesize)
1047                                 - RX_PREPAD_SIZE;
1048
1049                 skb_reserve(skb, RX_PREPAD_SIZE);
1050                 skb_put(skb, framesize);
1051                 skb->protocol = eth_type_trans(skb, jme->dev);
1052
1053                 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags), skb))
1054                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1055                 else
1056 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35)
1057                         skb->ip_summed = CHECKSUM_NONE;
1058 #else
1059                         skb_checksum_none_assert(skb);
1060 #endif
1061
1062                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
1063                         if (jme->vlgrp) {
1064                                 jme->jme_vlan_rx(skb, jme->vlgrp,
1065                                         le16_to_cpu(rxdesc->descwb.vlan));
1066                                 NET_STAT(jme).rx_bytes += 4;
1067                         } else {
1068                                 dev_kfree_skb(skb);
1069                         }
1070                 } else {
1071                         jme->jme_rx(skb);
1072                 }
1073
1074                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
1075                     cpu_to_le16(RXWBFLAG_DEST_MUL))
1076                         ++(NET_STAT(jme).multicast);
1077
1078                 NET_STAT(jme).rx_bytes += framesize;
1079                 ++(NET_STAT(jme).rx_packets);
1080         }
1081
1082         jme_set_clean_rxdesc(jme, idx);
1083
1084 }
1085
1086 static int
1087 jme_process_receive(struct jme_adapter *jme, int limit)
1088 {
1089         struct jme_ring *rxring = &(jme->rxring[0]);
1090         struct rxdesc *rxdesc = rxring->desc;
1091         int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
1092
1093         if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
1094                 goto out_inc;
1095
1096         if (unlikely(atomic_read(&jme->link_changing) != 1))
1097                 goto out_inc;
1098
1099         if (unlikely(!netif_carrier_ok(jme->dev)))
1100                 goto out_inc;
1101
1102         i = atomic_read(&rxring->next_to_clean);
1103         while (limit > 0) {
1104                 rxdesc = rxring->desc;
1105                 rxdesc += i;
1106
1107                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
1108                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
1109                         goto out;
1110                 --limit;
1111
1112                 rmb();
1113                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1114
1115                 if (unlikely(desccnt > 1 ||
1116                 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1117
1118                         if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1119                                 ++(NET_STAT(jme).rx_crc_errors);
1120                         else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1121                                 ++(NET_STAT(jme).rx_fifo_errors);
1122                         else
1123                                 ++(NET_STAT(jme).rx_errors);
1124
1125                         if (desccnt > 1)
1126                                 limit -= desccnt - 1;
1127
1128                         for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1129                                 jme_set_clean_rxdesc(jme, j);
1130                                 j = (j + 1) & (mask);
1131                         }
1132
1133                 } else {
1134                         jme_alloc_and_feed_skb(jme, i);
1135                 }
1136
1137                 i = (i + desccnt) & (mask);
1138         }
1139
1140 out:
1141         atomic_set(&rxring->next_to_clean, i);
1142
1143 out_inc:
1144         atomic_inc(&jme->rx_cleaning);
1145
1146         return limit > 0 ? limit : 0;
1147
1148 }
1149
1150 static void
1151 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1152 {
1153         if (likely(atmp == dpi->cur)) {
1154                 dpi->cnt = 0;
1155                 return;
1156         }
1157
1158         if (dpi->attempt == atmp) {
1159                 ++(dpi->cnt);
1160         } else {
1161                 dpi->attempt = atmp;
1162                 dpi->cnt = 0;
1163         }
1164
1165 }
1166
1167 static void
1168 jme_dynamic_pcc(struct jme_adapter *jme)
1169 {
1170         register struct dynpcc_info *dpi = &(jme->dpi);
1171
1172         if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1173                 jme_attempt_pcc(dpi, PCC_P3);
1174         else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1175                  dpi->intr_cnt > PCC_INTR_THRESHOLD)
1176                 jme_attempt_pcc(dpi, PCC_P2);
1177         else
1178                 jme_attempt_pcc(dpi, PCC_P1);
1179
1180         if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1181                 if (dpi->attempt < dpi->cur)
1182                         tasklet_schedule(&jme->rxclean_task);
1183                 jme_set_rx_pcc(jme, dpi->attempt);
1184                 dpi->cur = dpi->attempt;
1185                 dpi->cnt = 0;
1186         }
1187 }
1188
1189 static void
1190 jme_start_pcc_timer(struct jme_adapter *jme)
1191 {
1192         struct dynpcc_info *dpi = &(jme->dpi);
1193         dpi->last_bytes         = NET_STAT(jme).rx_bytes;
1194         dpi->last_pkts          = NET_STAT(jme).rx_packets;
1195         dpi->intr_cnt           = 0;
1196         jwrite32(jme, JME_TMCSR,
1197                 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1198 }
1199
1200 static inline void
1201 jme_stop_pcc_timer(struct jme_adapter *jme)
1202 {
1203         jwrite32(jme, JME_TMCSR, 0);
1204 }
1205
1206 static void
1207 jme_shutdown_nic(struct jme_adapter *jme)
1208 {
1209         u32 phylink;
1210
1211         phylink = jme_linkstat_from_phy(jme);
1212
1213         if (!(phylink & PHY_LINK_UP)) {
1214                 /*
1215                  * Disable all interrupt before issue timer
1216                  */
1217                 jme_stop_irq(jme);
1218                 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1219         }
1220 }
1221
1222 static void
1223 jme_pcc_tasklet(unsigned long arg)
1224 {
1225         struct jme_adapter *jme = (struct jme_adapter *)arg;
1226         struct net_device *netdev = jme->dev;
1227
1228         if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1229                 jme_shutdown_nic(jme);
1230                 return;
1231         }
1232
1233         if (unlikely(!netif_carrier_ok(netdev) ||
1234                 (atomic_read(&jme->link_changing) != 1)
1235         )) {
1236                 jme_stop_pcc_timer(jme);
1237                 return;
1238         }
1239
1240         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1241                 jme_dynamic_pcc(jme);
1242
1243         jme_start_pcc_timer(jme);
1244 }
1245
1246 static inline void
1247 jme_polling_mode(struct jme_adapter *jme)
1248 {
1249         jme_set_rx_pcc(jme, PCC_OFF);
1250 }
1251
1252 static inline void
1253 jme_interrupt_mode(struct jme_adapter *jme)
1254 {
1255         jme_set_rx_pcc(jme, PCC_P1);
1256 }
1257
1258 static inline int
1259 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1260 {
1261         u32 apmc;
1262         apmc = jread32(jme, JME_APMC);
1263         return apmc & JME_APMC_PSEUDO_HP_EN;
1264 }
1265
1266 static void
1267 jme_start_shutdown_timer(struct jme_adapter *jme)
1268 {
1269         u32 apmc;
1270
1271         apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1272         apmc &= ~JME_APMC_EPIEN_CTRL;
1273         if (!no_extplug) {
1274                 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1275                 wmb();
1276         }
1277         jwrite32f(jme, JME_APMC, apmc);
1278
1279         jwrite32f(jme, JME_TIMER2, 0);
1280         set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1281         jwrite32(jme, JME_TMCSR,
1282                 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1283 }
1284
1285 static void
1286 jme_stop_shutdown_timer(struct jme_adapter *jme)
1287 {
1288         u32 apmc;
1289
1290         jwrite32f(jme, JME_TMCSR, 0);
1291         jwrite32f(jme, JME_TIMER2, 0);
1292         clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1293
1294         apmc = jread32(jme, JME_APMC);
1295         apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1296         jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1297         wmb();
1298         jwrite32f(jme, JME_APMC, apmc);
1299 }
1300
1301 static void
1302 jme_link_change_tasklet(unsigned long arg)
1303 {
1304         struct jme_adapter *jme = (struct jme_adapter *)arg;
1305         struct net_device *netdev = jme->dev;
1306         int rc;
1307
1308         while (!atomic_dec_and_test(&jme->link_changing)) {
1309                 atomic_inc(&jme->link_changing);
1310                 netif_info(jme, intr, jme->dev, "Get link change lock failed\n");
1311                 while (atomic_read(&jme->link_changing) != 1)
1312                         netif_info(jme, intr, jme->dev, "Waiting link change lock\n");
1313         }
1314
1315         if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1316                 goto out;
1317
1318         jme->old_mtu = netdev->mtu;
1319         netif_stop_queue(netdev);
1320         if (jme_pseudo_hotplug_enabled(jme))
1321                 jme_stop_shutdown_timer(jme);
1322
1323         jme_stop_pcc_timer(jme);
1324         tasklet_disable(&jme->txclean_task);
1325         tasklet_disable(&jme->rxclean_task);
1326         tasklet_disable(&jme->rxempty_task);
1327
1328         if (netif_carrier_ok(netdev)) {
1329                 jme_disable_rx_engine(jme);
1330                 jme_disable_tx_engine(jme);
1331                 jme_reset_mac_processor(jme);
1332                 jme_free_rx_resources(jme);
1333                 jme_free_tx_resources(jme);
1334
1335                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1336                         jme_polling_mode(jme);
1337
1338                 netif_carrier_off(netdev);
1339         }
1340
1341         jme_check_link(netdev, 0);
1342         if (netif_carrier_ok(netdev)) {
1343                 rc = jme_setup_rx_resources(jme);
1344                 if (rc) {
1345                         pr_err("Allocating resources for RX error, Device STOPPED!\n");
1346                         goto out_enable_tasklet;
1347                 }
1348
1349                 rc = jme_setup_tx_resources(jme);
1350                 if (rc) {
1351                         pr_err("Allocating resources for TX error, Device STOPPED!\n");
1352                         goto err_out_free_rx_resources;
1353                 }
1354
1355                 jme_enable_rx_engine(jme);
1356                 jme_enable_tx_engine(jme);
1357
1358                 netif_start_queue(netdev);
1359
1360                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1361                         jme_interrupt_mode(jme);
1362
1363                 jme_start_pcc_timer(jme);
1364         } else if (jme_pseudo_hotplug_enabled(jme)) {
1365                 jme_start_shutdown_timer(jme);
1366         }
1367
1368         goto out_enable_tasklet;
1369
1370 err_out_free_rx_resources:
1371         jme_free_rx_resources(jme);
1372 out_enable_tasklet:
1373         tasklet_enable(&jme->txclean_task);
1374         tasklet_hi_enable(&jme->rxclean_task);
1375         tasklet_hi_enable(&jme->rxempty_task);
1376 out:
1377         atomic_inc(&jme->link_changing);
1378 }
1379
1380 static void
1381 jme_rx_clean_tasklet(unsigned long arg)
1382 {
1383         struct jme_adapter *jme = (struct jme_adapter *)arg;
1384         struct dynpcc_info *dpi = &(jme->dpi);
1385
1386         jme_process_receive(jme, jme->rx_ring_size);
1387         ++(dpi->intr_cnt);
1388
1389 }
1390
1391 static int
1392 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1393 {
1394         struct jme_adapter *jme = jme_napi_priv(holder);
1395         DECLARE_NETDEV
1396         int rest;
1397
1398         rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1399
1400         while (atomic_read(&jme->rx_empty) > 0) {
1401                 atomic_dec(&jme->rx_empty);
1402                 ++(NET_STAT(jme).rx_dropped);
1403                 jme_restart_rx_engine(jme);
1404         }
1405         atomic_inc(&jme->rx_empty);
1406
1407         if (rest) {
1408                 JME_RX_COMPLETE(netdev, holder);
1409                 jme_interrupt_mode(jme);
1410         }
1411
1412         JME_NAPI_WEIGHT_SET(budget, rest);
1413         return JME_NAPI_WEIGHT_VAL(budget) - rest;
1414 }
1415
1416 static void
1417 jme_rx_empty_tasklet(unsigned long arg)
1418 {
1419         struct jme_adapter *jme = (struct jme_adapter *)arg;
1420
1421         if (unlikely(atomic_read(&jme->link_changing) != 1))
1422                 return;
1423
1424         if (unlikely(!netif_carrier_ok(jme->dev)))
1425                 return;
1426
1427         netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1428
1429         jme_rx_clean_tasklet(arg);
1430
1431         while (atomic_read(&jme->rx_empty) > 0) {
1432                 atomic_dec(&jme->rx_empty);
1433                 ++(NET_STAT(jme).rx_dropped);
1434                 jme_restart_rx_engine(jme);
1435         }
1436         atomic_inc(&jme->rx_empty);
1437 }
1438
1439 static void
1440 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1441 {
1442         struct jme_ring *txring = &(jme->txring[0]);
1443
1444         smp_wmb();
1445         if (unlikely(netif_queue_stopped(jme->dev) &&
1446         atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1447                 netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n");
1448                 netif_wake_queue(jme->dev);
1449         }
1450
1451 }
1452
1453 static void
1454 jme_tx_clean_tasklet(unsigned long arg)
1455 {
1456         struct jme_adapter *jme = (struct jme_adapter *)arg;
1457         struct jme_ring *txring = &(jme->txring[0]);
1458         struct txdesc *txdesc = txring->desc;
1459         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1460         int i, j, cnt = 0, max, err, mask;
1461
1462         tx_dbg(jme, "Into txclean\n");
1463
1464         if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1465                 goto out;
1466
1467         if (unlikely(atomic_read(&jme->link_changing) != 1))
1468                 goto out;
1469
1470         if (unlikely(!netif_carrier_ok(jme->dev)))
1471                 goto out;
1472
1473         max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1474         mask = jme->tx_ring_mask;
1475
1476         for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1477
1478                 ctxbi = txbi + i;
1479
1480                 if (likely(ctxbi->skb &&
1481                 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1482
1483                         tx_dbg(jme, "txclean: %d+%d@%lu\n",
1484                                i, ctxbi->nr_desc, jiffies);
1485
1486                         err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1487
1488                         for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1489                                 ttxbi = txbi + ((i + j) & (mask));
1490                                 txdesc[(i + j) & (mask)].dw[0] = 0;
1491
1492                                 pci_unmap_page(jme->pdev,
1493                                                  ttxbi->mapping,
1494                                                  ttxbi->len,
1495                                                  PCI_DMA_TODEVICE);
1496
1497                                 ttxbi->mapping = 0;
1498                                 ttxbi->len = 0;
1499                         }
1500
1501                         dev_kfree_skb(ctxbi->skb);
1502
1503                         cnt += ctxbi->nr_desc;
1504
1505                         if (unlikely(err)) {
1506                                 ++(NET_STAT(jme).tx_carrier_errors);
1507                         } else {
1508                                 ++(NET_STAT(jme).tx_packets);
1509                                 NET_STAT(jme).tx_bytes += ctxbi->len;
1510                         }
1511
1512                         ctxbi->skb = NULL;
1513                         ctxbi->len = 0;
1514                         ctxbi->start_xmit = 0;
1515
1516                 } else {
1517                         break;
1518                 }
1519
1520                 i = (i + ctxbi->nr_desc) & mask;
1521
1522                 ctxbi->nr_desc = 0;
1523         }
1524
1525         tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies);
1526         atomic_set(&txring->next_to_clean, i);
1527         atomic_add(cnt, &txring->nr_free);
1528
1529         jme_wake_queue_if_stopped(jme);
1530
1531 out:
1532         atomic_inc(&jme->tx_cleaning);
1533 }
1534
1535 static void
1536 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1537 {
1538         /*
1539          * Disable interrupt
1540          */
1541         jwrite32f(jme, JME_IENC, INTR_ENABLE);
1542
1543         if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1544                 /*
1545                  * Link change event is critical
1546                  * all other events are ignored
1547                  */
1548                 jwrite32(jme, JME_IEVE, intrstat);
1549                 tasklet_schedule(&jme->linkch_task);
1550                 goto out_reenable;
1551         }
1552
1553         if (intrstat & INTR_TMINTR) {
1554                 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1555                 tasklet_schedule(&jme->pcc_task);
1556         }
1557
1558         if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1559                 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1560                 tasklet_schedule(&jme->txclean_task);
1561         }
1562
1563         if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1564                 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1565                                                      INTR_PCCRX0 |
1566                                                      INTR_RX0EMP)) |
1567                                         INTR_RX0);
1568         }
1569
1570         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1571                 if (intrstat & INTR_RX0EMP)
1572                         atomic_inc(&jme->rx_empty);
1573
1574                 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1575                         if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1576                                 jme_polling_mode(jme);
1577                                 JME_RX_SCHEDULE(jme);
1578                         }
1579                 }
1580         } else {
1581                 if (intrstat & INTR_RX0EMP) {
1582                         atomic_inc(&jme->rx_empty);
1583                         tasklet_hi_schedule(&jme->rxempty_task);
1584                 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1585                         tasklet_hi_schedule(&jme->rxclean_task);
1586                 }
1587         }
1588
1589 out_reenable:
1590         /*
1591          * Re-enable interrupt
1592          */
1593         jwrite32f(jme, JME_IENS, INTR_ENABLE);
1594 }
1595
1596 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1597 static irqreturn_t
1598 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1599 #else
1600 static irqreturn_t
1601 jme_intr(int irq, void *dev_id)
1602 #endif
1603 {
1604         struct net_device *netdev = dev_id;
1605         struct jme_adapter *jme = netdev_priv(netdev);
1606         u32 intrstat;
1607
1608         intrstat = jread32(jme, JME_IEVE);
1609
1610         /*
1611          * Check if it's really an interrupt for us
1612          */
1613         if (unlikely((intrstat & INTR_ENABLE) == 0))
1614                 return IRQ_NONE;
1615
1616         /*
1617          * Check if the device still exist
1618          */
1619         if (unlikely(intrstat == ~((typeof(intrstat))0)))
1620                 return IRQ_NONE;
1621
1622         jme_intr_msi(jme, intrstat);
1623
1624         return IRQ_HANDLED;
1625 }
1626
1627 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1628 static irqreturn_t
1629 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1630 #else
1631 static irqreturn_t
1632 jme_msi(int irq, void *dev_id)
1633 #endif
1634 {
1635         struct net_device *netdev = dev_id;
1636         struct jme_adapter *jme = netdev_priv(netdev);
1637         u32 intrstat;
1638
1639         intrstat = jread32(jme, JME_IEVE);
1640
1641         jme_intr_msi(jme, intrstat);
1642
1643         return IRQ_HANDLED;
1644 }
1645
1646 static void
1647 jme_reset_link(struct jme_adapter *jme)
1648 {
1649         jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1650 }
1651
1652 static void
1653 jme_restart_an(struct jme_adapter *jme)
1654 {
1655         u32 bmcr;
1656
1657         spin_lock_bh(&jme->phy_lock);
1658         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1659         bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1660         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1661         spin_unlock_bh(&jme->phy_lock);
1662 }
1663
1664 static int
1665 jme_request_irq(struct jme_adapter *jme)
1666 {
1667         int rc;
1668         struct net_device *netdev = jme->dev;
1669 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1670         irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1671         int irq_flags = SA_SHIRQ;
1672 #else
1673         irq_handler_t handler = jme_intr;
1674         int irq_flags = IRQF_SHARED;
1675 #endif
1676
1677         if (!pci_enable_msi(jme->pdev)) {
1678                 set_bit(JME_FLAG_MSI, &jme->flags);
1679                 handler = jme_msi;
1680                 irq_flags = 0;
1681         }
1682
1683         rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1684                           netdev);
1685         if (rc) {
1686                 netdev_err(netdev,
1687                            "Unable to request %s interrupt (return: %d)\n",
1688                            test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1689                            rc);
1690
1691                 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1692                         pci_disable_msi(jme->pdev);
1693                         clear_bit(JME_FLAG_MSI, &jme->flags);
1694                 }
1695         } else {
1696                 netdev->irq = jme->pdev->irq;
1697         }
1698
1699         return rc;
1700 }
1701
1702 static void
1703 jme_free_irq(struct jme_adapter *jme)
1704 {
1705         free_irq(jme->pdev->irq, jme->dev);
1706         if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1707                 pci_disable_msi(jme->pdev);
1708                 clear_bit(JME_FLAG_MSI, &jme->flags);
1709                 jme->dev->irq = jme->pdev->irq;
1710         }
1711 }
1712
1713 static inline void
1714 jme_new_phy_on(struct jme_adapter *jme)
1715 {
1716         u32 reg;
1717
1718         reg = jread32(jme, JME_PHY_PWR);
1719         reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1720                  PHY_PWR_DWN2 | PHY_PWR_CLKSEL);
1721         jwrite32(jme, JME_PHY_PWR, reg);
1722
1723         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1724         reg &= ~PE1_GPREG0_PBG;
1725         reg |= PE1_GPREG0_ENBG;
1726         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1727 }
1728
1729 static inline void
1730 jme_new_phy_off(struct jme_adapter *jme)
1731 {
1732         u32 reg;
1733
1734         reg = jread32(jme, JME_PHY_PWR);
1735         reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW |
1736                PHY_PWR_DWN2 | PHY_PWR_CLKSEL;
1737         jwrite32(jme, JME_PHY_PWR, reg);
1738
1739         pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, &reg);
1740         reg &= ~PE1_GPREG0_PBG;
1741         reg |= PE1_GPREG0_PDD3COLD;
1742         pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg);
1743 }
1744
1745 static inline void
1746 jme_phy_on(struct jme_adapter *jme)
1747 {
1748         u32 bmcr;
1749
1750         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1751         bmcr &= ~BMCR_PDOWN;
1752         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1753
1754         if (new_phy_power_ctrl(jme->chip_main_rev))
1755                 jme_new_phy_on(jme);
1756 }
1757
1758 static inline void
1759 jme_phy_off(struct jme_adapter *jme)
1760 {
1761         u32 bmcr;
1762
1763         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1764         bmcr |= BMCR_PDOWN;
1765         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1766
1767         if (new_phy_power_ctrl(jme->chip_main_rev))
1768                 jme_new_phy_off(jme);
1769 }
1770
1771 static int
1772 jme_open(struct net_device *netdev)
1773 {
1774         struct jme_adapter *jme = netdev_priv(netdev);
1775         int rc;
1776
1777         jme_clear_pm(jme);
1778         JME_NAPI_ENABLE(jme);
1779
1780         tasklet_enable(&jme->linkch_task);
1781         tasklet_enable(&jme->txclean_task);
1782         tasklet_hi_enable(&jme->rxclean_task);
1783         tasklet_hi_enable(&jme->rxempty_task);
1784
1785         rc = jme_request_irq(jme);
1786         if (rc)
1787                 goto err_out;
1788
1789         jme_start_irq(jme);
1790
1791         jme_phy_on(jme);
1792         if (test_bit(JME_FLAG_SSET, &jme->flags))
1793                 jme_set_settings(netdev, &jme->old_ecmd);
1794         else
1795                 jme_reset_phy_processor(jme);
1796
1797         jme_reset_link(jme);
1798
1799         return 0;
1800
1801 err_out:
1802         netif_stop_queue(netdev);
1803         netif_carrier_off(netdev);
1804         return rc;
1805 }
1806
1807 static void
1808 jme_set_100m_half(struct jme_adapter *jme)
1809 {
1810         u32 bmcr, tmp;
1811
1812         jme_phy_on(jme);
1813         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1814         tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1815                        BMCR_SPEED1000 | BMCR_FULLDPLX);
1816         tmp |= BMCR_SPEED100;
1817
1818         if (bmcr != tmp)
1819                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1820
1821         if (jme->fpgaver)
1822                 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1823         else
1824                 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1825 }
1826
1827 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1828 static void
1829 jme_wait_link(struct jme_adapter *jme)
1830 {
1831         u32 phylink, to = JME_WAIT_LINK_TIME;
1832
1833         mdelay(1000);
1834         phylink = jme_linkstat_from_phy(jme);
1835         while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1836                 mdelay(10);
1837                 phylink = jme_linkstat_from_phy(jme);
1838         }
1839 }
1840
1841 static void
1842 jme_powersave_phy(struct jme_adapter *jme)
1843 {
1844         if (jme->reg_pmcs) {
1845                 jme_set_100m_half(jme);
1846
1847                 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
1848                         jme_wait_link(jme);
1849
1850                 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
1851         } else {
1852                 jme_phy_off(jme);
1853         }
1854 }
1855
1856 static int
1857 jme_close(struct net_device *netdev)
1858 {
1859         struct jme_adapter *jme = netdev_priv(netdev);
1860
1861         netif_stop_queue(netdev);
1862         netif_carrier_off(netdev);
1863
1864         jme_stop_irq(jme);
1865         jme_free_irq(jme);
1866
1867         JME_NAPI_DISABLE(jme);
1868
1869         tasklet_disable(&jme->linkch_task);
1870         tasklet_disable(&jme->txclean_task);
1871         tasklet_disable(&jme->rxclean_task);
1872         tasklet_disable(&jme->rxempty_task);
1873
1874         jme_disable_rx_engine(jme);
1875         jme_disable_tx_engine(jme);
1876         jme_reset_mac_processor(jme);
1877         jme_free_rx_resources(jme);
1878         jme_free_tx_resources(jme);
1879         jme->phylink = 0;
1880         jme_phy_off(jme);
1881
1882         return 0;
1883 }
1884
1885 static int
1886 jme_alloc_txdesc(struct jme_adapter *jme,
1887                         struct sk_buff *skb)
1888 {
1889         struct jme_ring *txring = &(jme->txring[0]);
1890         int idx, nr_alloc, mask = jme->tx_ring_mask;
1891
1892         idx = txring->next_to_use;
1893         nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1894
1895         if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1896                 return -1;
1897
1898         atomic_sub(nr_alloc, &txring->nr_free);
1899
1900         txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1901
1902         return idx;
1903 }
1904
1905 static void
1906 jme_fill_tx_map(struct pci_dev *pdev,
1907                 struct txdesc *txdesc,
1908                 struct jme_buffer_info *txbi,
1909                 struct page *page,
1910                 u32 page_offset,
1911                 u32 len,
1912                 u8 hidma)
1913 {
1914         dma_addr_t dmaaddr;
1915
1916         dmaaddr = pci_map_page(pdev,
1917                                 page,
1918                                 page_offset,
1919                                 len,
1920                                 PCI_DMA_TODEVICE);
1921
1922         pci_dma_sync_single_for_device(pdev,
1923                                        dmaaddr,
1924                                        len,
1925                                        PCI_DMA_TODEVICE);
1926
1927         txdesc->dw[0] = 0;
1928         txdesc->dw[1] = 0;
1929         txdesc->desc2.flags     = TXFLAG_OWN;
1930         txdesc->desc2.flags     |= (hidma) ? TXFLAG_64BIT : 0;
1931         txdesc->desc2.datalen   = cpu_to_le16(len);
1932         txdesc->desc2.bufaddrh  = cpu_to_le32((__u64)dmaaddr >> 32);
1933         txdesc->desc2.bufaddrl  = cpu_to_le32(
1934                                         (__u64)dmaaddr & 0xFFFFFFFFUL);
1935
1936         txbi->mapping = dmaaddr;
1937         txbi->len = len;
1938 }
1939
1940 static void
1941 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1942 {
1943         struct jme_ring *txring = &(jme->txring[0]);
1944         struct txdesc *txdesc = txring->desc, *ctxdesc;
1945         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1946         u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1947         int i, nr_frags = skb_shinfo(skb)->nr_frags;
1948         int mask = jme->tx_ring_mask;
1949         struct skb_frag_struct *frag;
1950         u32 len;
1951
1952         for (i = 0 ; i < nr_frags ; ++i) {
1953                 frag = &skb_shinfo(skb)->frags[i];
1954                 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1955                 ctxbi = txbi + ((idx + i + 2) & (mask));
1956
1957                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1958                                  frag->page_offset, frag->size, hidma);
1959         }
1960
1961         len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1962         ctxdesc = txdesc + ((idx + 1) & (mask));
1963         ctxbi = txbi + ((idx + 1) & (mask));
1964         jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1965                         offset_in_page(skb->data), len, hidma);
1966
1967 }
1968
1969 static int
1970 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1971 {
1972         if (unlikely(
1973 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1974         skb_shinfo(skb)->tso_size
1975 #else
1976         skb_shinfo(skb)->gso_size
1977 #endif
1978                         && skb_header_cloned(skb) &&
1979                         pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1980                 dev_kfree_skb(skb);
1981                 return -1;
1982         }
1983
1984         return 0;
1985 }
1986
1987 static int
1988 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
1989 {
1990 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1991         *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1992 #else
1993         *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1994 #endif
1995         if (*mss) {
1996                 *flags |= TXFLAG_LSEN;
1997
1998                 if (skb->protocol == htons(ETH_P_IP)) {
1999                         struct iphdr *iph = ip_hdr(skb);
2000
2001                         iph->check = 0;
2002                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2003                                                                 iph->daddr, 0,
2004                                                                 IPPROTO_TCP,
2005                                                                 0);
2006                 } else {
2007                         struct ipv6hdr *ip6h = ipv6_hdr(skb);
2008
2009                         tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
2010                                                                 &ip6h->daddr, 0,
2011                                                                 IPPROTO_TCP,
2012                                                                 0);
2013                 }
2014
2015                 return 0;
2016         }
2017
2018         return 1;
2019 }
2020
2021 static void
2022 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
2023 {
2024 #ifdef CHECKSUM_PARTIAL
2025         if (skb->ip_summed == CHECKSUM_PARTIAL)
2026 #else
2027         if (skb->ip_summed == CHECKSUM_HW)
2028 #endif
2029         {
2030                 u8 ip_proto;
2031
2032 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2033                 if (skb->protocol == htons(ETH_P_IP))
2034                         ip_proto = ip_hdr(skb)->protocol;
2035                 else if (skb->protocol == htons(ETH_P_IPV6))
2036                         ip_proto = ipv6_hdr(skb)->nexthdr;
2037                 else
2038                         ip_proto = 0;
2039 #else
2040                 switch (skb->protocol) {
2041                 case htons(ETH_P_IP):
2042                         ip_proto = ip_hdr(skb)->protocol;
2043                         break;
2044                 case htons(ETH_P_IPV6):
2045                         ip_proto = ipv6_hdr(skb)->nexthdr;
2046                         break;
2047                 default:
2048                         ip_proto = 0;
2049                         break;
2050                 }
2051 #endif
2052
2053                 switch (ip_proto) {
2054                 case IPPROTO_TCP:
2055                         *flags |= TXFLAG_TCPCS;
2056                         break;
2057                 case IPPROTO_UDP:
2058                         *flags |= TXFLAG_UDPCS;
2059                         break;
2060                 default:
2061                         netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n");
2062                         break;
2063                 }
2064         }
2065 }
2066
2067 static inline void
2068 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
2069 {
2070         if (vlan_tx_tag_present(skb)) {
2071                 *flags |= TXFLAG_TAGON;
2072                 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
2073         }
2074 }
2075
2076 static int
2077 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
2078 {
2079         struct jme_ring *txring = &(jme->txring[0]);
2080         struct txdesc *txdesc;
2081         struct jme_buffer_info *txbi;
2082         u8 flags;
2083
2084         txdesc = (struct txdesc *)txring->desc + idx;
2085         txbi = txring->bufinf + idx;
2086
2087         txdesc->dw[0] = 0;
2088         txdesc->dw[1] = 0;
2089         txdesc->dw[2] = 0;
2090         txdesc->dw[3] = 0;
2091         txdesc->desc1.pktsize = cpu_to_le16(skb->len);
2092         /*
2093          * Set OWN bit at final.
2094          * When kernel transmit faster than NIC.
2095          * And NIC trying to send this descriptor before we tell
2096          * it to start sending this TX queue.
2097          * Other fields are already filled correctly.
2098          */
2099         wmb();
2100         flags = TXFLAG_OWN | TXFLAG_INT;
2101         /*
2102          * Set checksum flags while not tso
2103          */
2104         if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
2105                 jme_tx_csum(jme, skb, &flags);
2106         jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
2107         jme_map_tx_skb(jme, skb, idx);
2108         txdesc->desc1.flags = flags;
2109         /*
2110          * Set tx buffer info after telling NIC to send
2111          * For better tx_clean timing
2112          */
2113         wmb();
2114         txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
2115         txbi->skb = skb;
2116         txbi->len = skb->len;
2117         txbi->start_xmit = jiffies;
2118         if (!txbi->start_xmit)
2119                 txbi->start_xmit = (0UL-1);
2120
2121         return 0;
2122 }
2123
2124 static void
2125 jme_stop_queue_if_full(struct jme_adapter *jme)
2126 {
2127         struct jme_ring *txring = &(jme->txring[0]);
2128         struct jme_buffer_info *txbi = txring->bufinf;
2129         int idx = atomic_read(&txring->next_to_clean);
2130
2131         txbi += idx;
2132
2133         smp_wmb();
2134         if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
2135                 netif_stop_queue(jme->dev);
2136                 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n");
2137                 smp_wmb();
2138                 if (atomic_read(&txring->nr_free)
2139                         >= (jme->tx_wake_threshold)) {
2140                         netif_wake_queue(jme->dev);
2141                         netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n");
2142                 }
2143         }
2144
2145         if (unlikely(txbi->start_xmit &&
2146                         (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
2147                         txbi->skb)) {
2148                 netif_stop_queue(jme->dev);
2149                 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu\n", idx, jiffies);
2150         }
2151 }
2152
2153 /*
2154  * This function is already protected by netif_tx_lock()
2155  */
2156
2157 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
2158 static int
2159 #else
2160 static netdev_tx_t
2161 #endif
2162 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2163 {
2164         struct jme_adapter *jme = netdev_priv(netdev);
2165         int idx;
2166
2167         if (unlikely(jme_expand_header(jme, skb))) {
2168                 ++(NET_STAT(jme).tx_dropped);
2169                 return NETDEV_TX_OK;
2170         }
2171
2172         idx = jme_alloc_txdesc(jme, skb);
2173
2174         if (unlikely(idx < 0)) {
2175                 netif_stop_queue(netdev);
2176                 netif_err(jme, tx_err, jme->dev,
2177                           "BUG! Tx ring full when queue awake!\n");
2178
2179                 return NETDEV_TX_BUSY;
2180         }
2181
2182         jme_fill_tx_desc(jme, skb, idx);
2183
2184         jwrite32(jme, JME_TXCS, jme->reg_txcs |
2185                                 TXCS_SELECT_QUEUE0 |
2186                                 TXCS_QUEUE0S |
2187                                 TXCS_ENABLE);
2188 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2189         netdev->trans_start = jiffies;
2190 #endif
2191
2192         tx_dbg(jme, "xmit: %d+%d@%lu\n",
2193                idx, skb_shinfo(skb)->nr_frags + 2, jiffies);
2194         jme_stop_queue_if_full(jme);
2195
2196         return NETDEV_TX_OK;
2197 }
2198
2199 static void
2200 jme_set_unicastaddr(struct net_device *netdev)
2201 {
2202         struct jme_adapter *jme = netdev_priv(netdev);
2203         u32 val;
2204
2205         val = (netdev->dev_addr[3] & 0xff) << 24 |
2206               (netdev->dev_addr[2] & 0xff) << 16 |
2207               (netdev->dev_addr[1] & 0xff) <<  8 |
2208               (netdev->dev_addr[0] & 0xff);
2209         jwrite32(jme, JME_RXUMA_LO, val);
2210         val = (netdev->dev_addr[5] & 0xff) << 8 |
2211               (netdev->dev_addr[4] & 0xff);
2212         jwrite32(jme, JME_RXUMA_HI, val);
2213 }
2214
2215 static int
2216 jme_set_macaddr(struct net_device *netdev, void *p)
2217 {
2218         struct jme_adapter *jme = netdev_priv(netdev);
2219         struct sockaddr *addr = p;
2220
2221         if (netif_running(netdev))
2222                 return -EBUSY;
2223
2224         spin_lock_bh(&jme->macaddr_lock);
2225         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2226         jme_set_unicastaddr(netdev);
2227         spin_unlock_bh(&jme->macaddr_lock);
2228
2229         return 0;
2230 }
2231
2232 static void
2233 jme_set_multi(struct net_device *netdev)
2234 {
2235         struct jme_adapter *jme = netdev_priv(netdev);
2236         u32 mc_hash[2] = {};
2237 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2238         int i;
2239 #endif
2240
2241         spin_lock_bh(&jme->rxmcs_lock);
2242
2243         jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2244
2245         if (netdev->flags & IFF_PROMISC) {
2246                 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2247         } else if (netdev->flags & IFF_ALLMULTI) {
2248                 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2249         } else if (netdev->flags & IFF_MULTICAST) {
2250 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2251                 struct dev_mc_list *mclist;
2252 #else
2253                 struct netdev_hw_addr *ha;
2254 #endif
2255                 int bit_nr;
2256
2257                 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2258 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2259                 for (i = 0, mclist = netdev->mc_list;
2260                         mclist && i < netdev->mc_count;
2261                         ++i, mclist = mclist->next) {
2262 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2263                 netdev_for_each_mc_addr(mclist, netdev) {
2264 #else
2265                 netdev_for_each_mc_addr(ha, netdev) {
2266 #endif
2267 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2268                         bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2269 #else
2270                         bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2271 #endif
2272                         mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2273                 }
2274
2275                 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2276                 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2277         }
2278
2279         wmb();
2280         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2281
2282         spin_unlock_bh(&jme->rxmcs_lock);
2283 }
2284
2285 static int
2286 jme_change_mtu(struct net_device *netdev, int new_mtu)
2287 {
2288         struct jme_adapter *jme = netdev_priv(netdev);
2289
2290         if (new_mtu == jme->old_mtu)
2291                 return 0;
2292
2293         if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2294                 ((new_mtu) < IPV6_MIN_MTU))
2295                 return -EINVAL;
2296
2297         if (new_mtu > 4000) {
2298                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2299                 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2300                 jme_restart_rx_engine(jme);
2301         } else {
2302                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2303                 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2304                 jme_restart_rx_engine(jme);
2305         }
2306
2307         if (new_mtu > 1900) {
2308                 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2309                                 NETIF_F_TSO | NETIF_F_TSO6);
2310         } else {
2311                 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2312                         netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2313                 if (test_bit(JME_FLAG_TSO, &jme->flags))
2314                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2315         }
2316
2317         netdev->mtu = new_mtu;
2318         jme_reset_link(jme);
2319
2320         return 0;
2321 }
2322
2323 static void
2324 jme_tx_timeout(struct net_device *netdev)
2325 {
2326         struct jme_adapter *jme = netdev_priv(netdev);
2327
2328         jme->phylink = 0;
2329         jme_reset_phy_processor(jme);
2330         if (test_bit(JME_FLAG_SSET, &jme->flags))
2331                 jme_set_settings(netdev, &jme->old_ecmd);
2332
2333         /*
2334          * Force to Reset the link again
2335          */
2336         jme_reset_link(jme);
2337 }
2338
2339 static inline void jme_pause_rx(struct jme_adapter *jme)
2340 {
2341         atomic_dec(&jme->link_changing);
2342
2343         jme_set_rx_pcc(jme, PCC_OFF);
2344         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2345                 JME_NAPI_DISABLE(jme);
2346         } else {
2347                 tasklet_disable(&jme->rxclean_task);
2348                 tasklet_disable(&jme->rxempty_task);
2349         }
2350 }
2351
2352 static inline void jme_resume_rx(struct jme_adapter *jme)
2353 {
2354         struct dynpcc_info *dpi = &(jme->dpi);
2355
2356         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2357                 JME_NAPI_ENABLE(jme);
2358         } else {
2359                 tasklet_hi_enable(&jme->rxclean_task);
2360                 tasklet_hi_enable(&jme->rxempty_task);
2361         }
2362         dpi->cur                = PCC_P1;
2363         dpi->attempt            = PCC_P1;
2364         dpi->cnt                = 0;
2365         jme_set_rx_pcc(jme, PCC_P1);
2366
2367         atomic_inc(&jme->link_changing);
2368 }
2369
2370 static void
2371 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2372 {
2373         struct jme_adapter *jme = netdev_priv(netdev);
2374
2375         jme_pause_rx(jme);
2376         jme->vlgrp = grp;
2377         jme_resume_rx(jme);
2378 }
2379
2380 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2381 static void
2382 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2383 {
2384         struct jme_adapter *jme = netdev_priv(netdev);
2385
2386         if(jme->vlgrp) {
2387                 jme_pause_rx(jme);
2388 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2389                 jme->vlgrp->vlan_devices[vid] = NULL;
2390 #else
2391                 vlan_group_set_device(jme->vlgrp, vid, NULL);
2392 #endif
2393                 jme_resume_rx(jme);
2394         }
2395 }
2396 #endif
2397
2398 static void
2399 jme_get_drvinfo(struct net_device *netdev,
2400                      struct ethtool_drvinfo *info)
2401 {
2402         struct jme_adapter *jme = netdev_priv(netdev);
2403
2404         strcpy(info->driver, DRV_NAME);
2405         strcpy(info->version, DRV_VERSION);
2406         strcpy(info->bus_info, pci_name(jme->pdev));
2407 }
2408
2409 static int
2410 jme_get_regs_len(struct net_device *netdev)
2411 {
2412         return JME_REG_LEN;
2413 }
2414
2415 static void
2416 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2417 {
2418         int i;
2419
2420         for (i = 0 ; i < len ; i += 4)
2421                 p[i >> 2] = jread32(jme, reg + i);
2422 }
2423
2424 static void
2425 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2426 {
2427         int i;
2428         u16 *p16 = (u16 *)p;
2429
2430         for (i = 0 ; i < reg_nr ; ++i)
2431                 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2432 }
2433
2434 static void
2435 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2436 {
2437         struct jme_adapter *jme = netdev_priv(netdev);
2438         u32 *p32 = (u32 *)p;
2439
2440         memset(p, 0xFF, JME_REG_LEN);
2441
2442         regs->version = 1;
2443         mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2444
2445         p32 += 0x100 >> 2;
2446         mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2447
2448         p32 += 0x100 >> 2;
2449         mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2450
2451         p32 += 0x100 >> 2;
2452         mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2453
2454         p32 += 0x100 >> 2;
2455         mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2456 }
2457
2458 static int
2459 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2460 {
2461         struct jme_adapter *jme = netdev_priv(netdev);
2462
2463         ecmd->tx_coalesce_usecs = PCC_TX_TO;
2464         ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2465
2466         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2467                 ecmd->use_adaptive_rx_coalesce = false;
2468                 ecmd->rx_coalesce_usecs = 0;
2469                 ecmd->rx_max_coalesced_frames = 0;
2470                 return 0;
2471         }
2472
2473         ecmd->use_adaptive_rx_coalesce = true;
2474
2475         switch (jme->dpi.cur) {
2476         case PCC_P1:
2477                 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2478                 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2479                 break;
2480         case PCC_P2:
2481                 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2482                 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2483                 break;
2484         case PCC_P3:
2485                 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2486                 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2487                 break;
2488         default:
2489                 break;
2490         }
2491
2492         return 0;
2493 }
2494
2495 static int
2496 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2497 {
2498         struct jme_adapter *jme = netdev_priv(netdev);
2499         struct dynpcc_info *dpi = &(jme->dpi);
2500
2501         if (netif_running(netdev))
2502                 return -EBUSY;
2503
2504         if (ecmd->use_adaptive_rx_coalesce &&
2505             test_bit(JME_FLAG_POLL, &jme->flags)) {
2506                 clear_bit(JME_FLAG_POLL, &jme->flags);
2507                 jme->jme_rx = netif_rx;
2508                 jme->jme_vlan_rx = vlan_hwaccel_rx;
2509                 dpi->cur                = PCC_P1;
2510                 dpi->attempt            = PCC_P1;
2511                 dpi->cnt                = 0;
2512                 jme_set_rx_pcc(jme, PCC_P1);
2513                 jme_interrupt_mode(jme);
2514         } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2515                    !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2516                 set_bit(JME_FLAG_POLL, &jme->flags);
2517                 jme->jme_rx = netif_receive_skb;
2518                 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2519                 jme_interrupt_mode(jme);
2520         }
2521
2522         return 0;
2523 }
2524
2525 static void
2526 jme_get_pauseparam(struct net_device *netdev,
2527                         struct ethtool_pauseparam *ecmd)
2528 {
2529         struct jme_adapter *jme = netdev_priv(netdev);
2530         u32 val;
2531
2532         ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2533         ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2534
2535         spin_lock_bh(&jme->phy_lock);
2536         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2537         spin_unlock_bh(&jme->phy_lock);
2538
2539         ecmd->autoneg =
2540                 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2541 }
2542
2543 static int
2544 jme_set_pauseparam(struct net_device *netdev,
2545                         struct ethtool_pauseparam *ecmd)
2546 {
2547         struct jme_adapter *jme = netdev_priv(netdev);
2548         u32 val;
2549
2550         if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2551                 (ecmd->tx_pause != 0)) {
2552
2553                 if (ecmd->tx_pause)
2554                         jme->reg_txpfc |= TXPFC_PF_EN;
2555                 else
2556                         jme->reg_txpfc &= ~TXPFC_PF_EN;
2557
2558                 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2559         }
2560
2561         spin_lock_bh(&jme->rxmcs_lock);
2562         if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2563                 (ecmd->rx_pause != 0)) {
2564
2565                 if (ecmd->rx_pause)
2566                         jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2567                 else
2568                         jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2569
2570                 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2571         }
2572         spin_unlock_bh(&jme->rxmcs_lock);
2573
2574         spin_lock_bh(&jme->phy_lock);
2575         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2576         if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2577                 (ecmd->autoneg != 0)) {
2578
2579                 if (ecmd->autoneg)
2580                         val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2581                 else
2582                         val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2583
2584                 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2585                                 MII_ADVERTISE, val);
2586         }
2587         spin_unlock_bh(&jme->phy_lock);
2588
2589         return 0;
2590 }
2591
2592 static void
2593 jme_get_wol(struct net_device *netdev,
2594                 struct ethtool_wolinfo *wol)
2595 {
2596         struct jme_adapter *jme = netdev_priv(netdev);
2597
2598         wol->supported = WAKE_MAGIC | WAKE_PHY;
2599
2600         wol->wolopts = 0;
2601
2602         if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2603                 wol->wolopts |= WAKE_PHY;
2604
2605         if (jme->reg_pmcs & PMCS_MFEN)
2606                 wol->wolopts |= WAKE_MAGIC;
2607
2608 }
2609
2610 static int
2611 jme_set_wol(struct net_device *netdev,
2612                 struct ethtool_wolinfo *wol)
2613 {
2614         struct jme_adapter *jme = netdev_priv(netdev);
2615
2616         if (wol->wolopts & (WAKE_MAGICSECURE |
2617                                 WAKE_UCAST |
2618                                 WAKE_MCAST |
2619                                 WAKE_BCAST |
2620                                 WAKE_ARP))
2621                 return -EOPNOTSUPP;
2622
2623         jme->reg_pmcs = 0;
2624
2625         if (wol->wolopts & WAKE_PHY)
2626                 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2627
2628         if (wol->wolopts & WAKE_MAGIC)
2629                 jme->reg_pmcs |= PMCS_MFEN;
2630
2631         jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2632
2633         return 0;
2634 }
2635
2636 static int
2637 jme_get_settings(struct net_device *netdev,
2638                      struct ethtool_cmd *ecmd)
2639 {
2640         struct jme_adapter *jme = netdev_priv(netdev);
2641         int rc;
2642
2643         spin_lock_bh(&jme->phy_lock);
2644         rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2645         spin_unlock_bh(&jme->phy_lock);
2646         return rc;
2647 }
2648
2649 static int
2650 jme_set_settings(struct net_device *netdev,
2651                      struct ethtool_cmd *ecmd)
2652 {
2653         struct jme_adapter *jme = netdev_priv(netdev);
2654         int rc, fdc = 0;
2655
2656         if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2657                 return -EINVAL;
2658
2659         /*
2660          * Check If user changed duplex only while force_media.
2661          * Hardware would not generate link change interrupt.
2662          */
2663         if (jme->mii_if.force_media &&
2664         ecmd->autoneg != AUTONEG_ENABLE &&
2665         (jme->mii_if.full_duplex != ecmd->duplex))
2666                 fdc = 1;
2667
2668         spin_lock_bh(&jme->phy_lock);
2669         rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2670         spin_unlock_bh(&jme->phy_lock);
2671
2672         if (!rc) {
2673                 if (fdc)
2674                         jme_reset_link(jme);
2675                 jme->old_ecmd = *ecmd;
2676                 set_bit(JME_FLAG_SSET, &jme->flags);
2677         }
2678
2679         return rc;
2680 }
2681
2682 static int
2683 jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
2684 {
2685         int rc;
2686         struct jme_adapter *jme = netdev_priv(netdev);
2687         struct mii_ioctl_data *mii_data = if_mii(rq);
2688         unsigned int duplex_chg;
2689
2690         if (cmd == SIOCSMIIREG) {
2691                 u16 val = mii_data->val_in;
2692                 if (!(val & (BMCR_RESET|BMCR_ANENABLE)) &&
2693                     (val & BMCR_SPEED1000))
2694                         return -EINVAL;
2695         }
2696
2697         spin_lock_bh(&jme->phy_lock);
2698         rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg);
2699         spin_unlock_bh(&jme->phy_lock);
2700
2701         if (!rc && (cmd == SIOCSMIIREG)) {
2702                 if (duplex_chg)
2703                         jme_reset_link(jme);
2704                 jme_get_settings(netdev, &jme->old_ecmd);
2705                 set_bit(JME_FLAG_SSET, &jme->flags);
2706         }
2707
2708         return rc;
2709 }
2710
2711 static u32
2712 jme_get_link(struct net_device *netdev)
2713 {
2714         struct jme_adapter *jme = netdev_priv(netdev);
2715         return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2716 }
2717
2718 static u32
2719 jme_get_msglevel(struct net_device *netdev)
2720 {
2721         struct jme_adapter *jme = netdev_priv(netdev);
2722         return jme->msg_enable;
2723 }
2724
2725 static void
2726 jme_set_msglevel(struct net_device *netdev, u32 value)
2727 {
2728         struct jme_adapter *jme = netdev_priv(netdev);
2729         jme->msg_enable = value;
2730 }
2731
2732 static u32
2733 jme_get_rx_csum(struct net_device *netdev)
2734 {
2735         struct jme_adapter *jme = netdev_priv(netdev);
2736         return jme->reg_rxmcs & RXMCS_CHECKSUM;
2737 }
2738
2739 static int
2740 jme_set_rx_csum(struct net_device *netdev, u32 on)
2741 {
2742         struct jme_adapter *jme = netdev_priv(netdev);
2743
2744         spin_lock_bh(&jme->rxmcs_lock);
2745         if (on)
2746                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2747         else
2748                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2749         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2750         spin_unlock_bh(&jme->rxmcs_lock);
2751
2752         return 0;
2753 }
2754
2755 static int
2756 jme_set_tx_csum(struct net_device *netdev, u32 on)
2757 {
2758         struct jme_adapter *jme = netdev_priv(netdev);
2759
2760         if (on) {
2761                 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2762                 if (netdev->mtu <= 1900)
2763                         netdev->features |=
2764                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2765         } else {
2766                 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2767                 netdev->features &=
2768                                 ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
2769         }
2770
2771         return 0;
2772 }
2773
2774 static int
2775 jme_set_tso(struct net_device *netdev, u32 on)
2776 {
2777         struct jme_adapter *jme = netdev_priv(netdev);
2778
2779         if (on) {
2780                 set_bit(JME_FLAG_TSO, &jme->flags);
2781                 if (netdev->mtu <= 1900)
2782                         netdev->features |= NETIF_F_TSO | NETIF_F_TSO6;
2783         } else {
2784                 clear_bit(JME_FLAG_TSO, &jme->flags);
2785                 netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
2786         }
2787
2788         return 0;
2789 }
2790
2791 static int
2792 jme_nway_reset(struct net_device *netdev)
2793 {
2794         struct jme_adapter *jme = netdev_priv(netdev);
2795         jme_restart_an(jme);
2796         return 0;
2797 }
2798
2799 static u8
2800 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2801 {
2802         u32 val;
2803         int to;
2804
2805         val = jread32(jme, JME_SMBCSR);
2806         to = JME_SMB_BUSY_TIMEOUT;
2807         while ((val & SMBCSR_BUSY) && --to) {
2808                 msleep(1);
2809                 val = jread32(jme, JME_SMBCSR);
2810         }
2811         if (!to) {
2812                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2813                 return 0xFF;
2814         }
2815
2816         jwrite32(jme, JME_SMBINTF,
2817                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2818                 SMBINTF_HWRWN_READ |
2819                 SMBINTF_HWCMD);
2820
2821         val = jread32(jme, JME_SMBINTF);
2822         to = JME_SMB_BUSY_TIMEOUT;
2823         while ((val & SMBINTF_HWCMD) && --to) {
2824                 msleep(1);
2825                 val = jread32(jme, JME_SMBINTF);
2826         }
2827         if (!to) {
2828                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2829                 return 0xFF;
2830         }
2831
2832         return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2833 }
2834
2835 static void
2836 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2837 {
2838         u32 val;
2839         int to;
2840
2841         val = jread32(jme, JME_SMBCSR);
2842         to = JME_SMB_BUSY_TIMEOUT;
2843         while ((val & SMBCSR_BUSY) && --to) {
2844                 msleep(1);
2845                 val = jread32(jme, JME_SMBCSR);
2846         }
2847         if (!to) {
2848                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2849                 return;
2850         }
2851
2852         jwrite32(jme, JME_SMBINTF,
2853                 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2854                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2855                 SMBINTF_HWRWN_WRITE |
2856                 SMBINTF_HWCMD);
2857
2858         val = jread32(jme, JME_SMBINTF);
2859         to = JME_SMB_BUSY_TIMEOUT;
2860         while ((val & SMBINTF_HWCMD) && --to) {
2861                 msleep(1);
2862                 val = jread32(jme, JME_SMBINTF);
2863         }
2864         if (!to) {
2865                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2866                 return;
2867         }
2868
2869         mdelay(2);
2870 }
2871
2872 static int
2873 jme_get_eeprom_len(struct net_device *netdev)
2874 {
2875         struct jme_adapter *jme = netdev_priv(netdev);
2876         u32 val;
2877         val = jread32(jme, JME_SMBCSR);
2878         return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2879 }
2880
2881 static int
2882 jme_get_eeprom(struct net_device *netdev,
2883                 struct ethtool_eeprom *eeprom, u8 *data)
2884 {
2885         struct jme_adapter *jme = netdev_priv(netdev);
2886         int i, offset = eeprom->offset, len = eeprom->len;
2887
2888         /*
2889          * ethtool will check the boundary for us
2890          */
2891         eeprom->magic = JME_EEPROM_MAGIC;
2892         for (i = 0 ; i < len ; ++i)
2893                 data[i] = jme_smb_read(jme, i + offset);
2894
2895         return 0;
2896 }
2897
2898 static int
2899 jme_set_eeprom(struct net_device *netdev,
2900                 struct ethtool_eeprom *eeprom, u8 *data)
2901 {
2902         struct jme_adapter *jme = netdev_priv(netdev);
2903         int i, offset = eeprom->offset, len = eeprom->len;
2904
2905         if (eeprom->magic != JME_EEPROM_MAGIC)
2906                 return -EINVAL;
2907
2908         /*
2909          * ethtool will check the boundary for us
2910          */
2911         for (i = 0 ; i < len ; ++i)
2912                 jme_smb_write(jme, i + offset, data[i]);
2913
2914         return 0;
2915 }
2916
2917 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2918 static struct ethtool_ops jme_ethtool_ops = {
2919 #else
2920 static const struct ethtool_ops jme_ethtool_ops = {
2921 #endif
2922         .get_drvinfo            = jme_get_drvinfo,
2923         .get_regs_len           = jme_get_regs_len,
2924         .get_regs               = jme_get_regs,
2925         .get_coalesce           = jme_get_coalesce,
2926         .set_coalesce           = jme_set_coalesce,
2927         .get_pauseparam         = jme_get_pauseparam,
2928         .set_pauseparam         = jme_set_pauseparam,
2929         .get_wol                = jme_get_wol,
2930         .set_wol                = jme_set_wol,
2931         .get_settings           = jme_get_settings,
2932         .set_settings           = jme_set_settings,
2933         .get_link               = jme_get_link,
2934         .get_msglevel           = jme_get_msglevel,
2935         .set_msglevel           = jme_set_msglevel,
2936         .get_rx_csum            = jme_get_rx_csum,
2937         .set_rx_csum            = jme_set_rx_csum,
2938         .set_tx_csum            = jme_set_tx_csum,
2939         .set_tso                = jme_set_tso,
2940         .set_sg                 = ethtool_op_set_sg,
2941         .nway_reset             = jme_nway_reset,
2942         .get_eeprom_len         = jme_get_eeprom_len,
2943         .get_eeprom             = jme_get_eeprom,
2944         .set_eeprom             = jme_set_eeprom,
2945 };
2946
2947 static int
2948 jme_pci_dma64(struct pci_dev *pdev)
2949 {
2950         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2951 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2952             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2953 #else
2954             !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2955 #endif
2956            )
2957 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2958                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2959 #else
2960                 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2961 #endif
2962                         return 1;
2963
2964         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2965 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2966             !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2967 #else
2968             !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2969 #endif
2970            )
2971 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2972                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2973 #else
2974                 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2975 #endif
2976                         return 1;
2977
2978 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2979         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2980                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2981 #else
2982         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2983                 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
2984 #endif
2985                         return 0;
2986
2987         return -1;
2988 }
2989
2990 static inline void
2991 jme_phy_init(struct jme_adapter *jme)
2992 {
2993         u16 reg26;
2994
2995         reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2996         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2997 }
2998
2999 static inline void
3000 jme_check_hw_ver(struct jme_adapter *jme)
3001 {
3002         u32 chipmode;
3003
3004         chipmode = jread32(jme, JME_CHIPMODE);
3005
3006         jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
3007         jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
3008         jme->chip_main_rev = jme->chiprev & 0xF;
3009         jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF;
3010 }
3011
3012 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3013 static const struct net_device_ops jme_netdev_ops = {
3014         .ndo_open               = jme_open,
3015         .ndo_stop               = jme_close,
3016         .ndo_validate_addr      = eth_validate_addr,
3017         .ndo_do_ioctl           = jme_ioctl,
3018         .ndo_start_xmit         = jme_start_xmit,
3019         .ndo_set_mac_address    = jme_set_macaddr,
3020         .ndo_set_multicast_list = jme_set_multi,
3021         .ndo_change_mtu         = jme_change_mtu,
3022         .ndo_tx_timeout         = jme_tx_timeout,
3023         .ndo_vlan_rx_register   = jme_vlan_rx_register,
3024 };
3025 #endif
3026
3027 static int __devinit
3028 jme_init_one(struct pci_dev *pdev,
3029              const struct pci_device_id *ent)
3030 {
3031         int rc = 0, using_dac, i;
3032         struct net_device *netdev;
3033         struct jme_adapter *jme;
3034         u16 bmcr, bmsr;
3035         u32 apmc;
3036
3037         /*
3038          * set up PCI device basics
3039          */
3040         rc = pci_enable_device(pdev);
3041         if (rc) {
3042                 pr_err("Cannot enable PCI device\n");
3043                 goto err_out;
3044         }
3045
3046         using_dac = jme_pci_dma64(pdev);
3047         if (using_dac < 0) {
3048                 pr_err("Cannot set PCI DMA Mask\n");
3049                 rc = -EIO;
3050                 goto err_out_disable_pdev;
3051         }
3052
3053         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
3054                 pr_err("No PCI resource region found\n");
3055                 rc = -ENOMEM;
3056                 goto err_out_disable_pdev;
3057         }
3058
3059         rc = pci_request_regions(pdev, DRV_NAME);
3060         if (rc) {
3061                 pr_err("Cannot obtain PCI resource region\n");
3062                 goto err_out_disable_pdev;
3063         }
3064
3065         pci_set_master(pdev);
3066
3067         /*
3068          * alloc and init net device
3069          */
3070         netdev = alloc_etherdev(sizeof(*jme));
3071         if (!netdev) {
3072                 pr_err("Cannot allocate netdev structure\n");
3073                 rc = -ENOMEM;
3074                 goto err_out_release_regions;
3075         }
3076 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
3077         netdev->netdev_ops = &jme_netdev_ops;
3078 #else
3079         netdev->open                    = jme_open;
3080         netdev->stop                    = jme_close;
3081         netdev->do_ioctl                = jme_ioctl;
3082         netdev->hard_start_xmit         = jme_start_xmit;
3083         netdev->set_mac_address         = jme_set_macaddr;
3084         netdev->set_multicast_list      = jme_set_multi;
3085         netdev->change_mtu              = jme_change_mtu;
3086         netdev->tx_timeout              = jme_tx_timeout;
3087         netdev->vlan_rx_register        = jme_vlan_rx_register;
3088 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
3089         netdev->vlan_rx_kill_vid        = jme_vlan_rx_kill_vid;
3090 #endif
3091         NETDEV_GET_STATS(netdev, &jme_get_stats);
3092 #endif
3093         netdev->ethtool_ops             = &jme_ethtool_ops;
3094         netdev->watchdog_timeo          = TX_TIMEOUT;
3095         netdev->features                =       NETIF_F_IP_CSUM |
3096                                                 NETIF_F_IPV6_CSUM |
3097                                                 NETIF_F_SG |
3098                                                 NETIF_F_TSO |
3099                                                 NETIF_F_TSO6 |
3100                                                 NETIF_F_HW_VLAN_TX |
3101                                                 NETIF_F_HW_VLAN_RX;
3102         if (using_dac)
3103                 netdev->features        |=      NETIF_F_HIGHDMA;
3104
3105         SET_NETDEV_DEV(netdev, &pdev->dev);
3106         pci_set_drvdata(pdev, netdev);
3107
3108         /*
3109          * init adapter info
3110          */
3111         jme = netdev_priv(netdev);
3112         jme->pdev = pdev;
3113         jme->dev = netdev;
3114         jme->jme_rx = netif_rx;
3115         jme->jme_vlan_rx = vlan_hwaccel_rx;
3116         jme->old_mtu = netdev->mtu = 1500;
3117         jme->phylink = 0;
3118         jme->tx_ring_size = 1 << 10;
3119         jme->tx_ring_mask = jme->tx_ring_size - 1;
3120         jme->tx_wake_threshold = 1 << 9;
3121         jme->rx_ring_size = 1 << 9;
3122         jme->rx_ring_mask = jme->rx_ring_size - 1;
3123         jme->msg_enable = JME_DEF_MSG_ENABLE;
3124         jme->regs = ioremap(pci_resource_start(pdev, 0),
3125                              pci_resource_len(pdev, 0));
3126         if (!(jme->regs)) {
3127                 pr_err("Mapping PCI resource region error\n");
3128                 rc = -ENOMEM;
3129                 goto err_out_free_netdev;
3130         }
3131
3132         if (no_pseudohp) {
3133                 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
3134                 jwrite32(jme, JME_APMC, apmc);
3135         } else if (force_pseudohp) {
3136                 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
3137                 jwrite32(jme, JME_APMC, apmc);
3138         }
3139
3140         NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
3141
3142         spin_lock_init(&jme->phy_lock);
3143         spin_lock_init(&jme->macaddr_lock);
3144         spin_lock_init(&jme->rxmcs_lock);
3145
3146         atomic_set(&jme->link_changing, 1);
3147         atomic_set(&jme->rx_cleaning, 1);
3148         atomic_set(&jme->tx_cleaning, 1);
3149         atomic_set(&jme->rx_empty, 1);
3150
3151         tasklet_init(&jme->pcc_task,
3152                      jme_pcc_tasklet,
3153                      (unsigned long) jme);
3154         tasklet_init(&jme->linkch_task,
3155                      jme_link_change_tasklet,
3156                      (unsigned long) jme);
3157         tasklet_init(&jme->txclean_task,
3158                      jme_tx_clean_tasklet,
3159                      (unsigned long) jme);
3160         tasklet_init(&jme->rxclean_task,
3161                      jme_rx_clean_tasklet,
3162                      (unsigned long) jme);
3163         tasklet_init(&jme->rxempty_task,
3164                      jme_rx_empty_tasklet,
3165                      (unsigned long) jme);
3166         tasklet_disable_nosync(&jme->linkch_task);
3167         tasklet_disable_nosync(&jme->txclean_task);
3168         tasklet_disable_nosync(&jme->rxclean_task);
3169         tasklet_disable_nosync(&jme->rxempty_task);
3170         jme->dpi.cur = PCC_P1;
3171
3172         jme->reg_ghc = 0;
3173         jme->reg_rxcs = RXCS_DEFAULT;
3174         jme->reg_rxmcs = RXMCS_DEFAULT;
3175         jme->reg_txpfc = 0;
3176         jme->reg_pmcs = PMCS_MFEN;
3177         jme->reg_gpreg1 = GPREG1_DEFAULT;
3178         set_bit(JME_FLAG_TXCSUM, &jme->flags);
3179         set_bit(JME_FLAG_TSO, &jme->flags);
3180
3181         /*
3182          * Get Max Read Req Size from PCI Config Space
3183          */
3184         pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3185         jme->mrrs &= PCI_DCSR_MRRS_MASK;
3186         switch (jme->mrrs) {
3187         case MRRS_128B:
3188                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3189                 break;
3190         case MRRS_256B:
3191                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3192                 break;
3193         default:
3194                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3195                 break;
3196         }
3197
3198         /*
3199          * Must check before reset_mac_processor
3200          */
3201         jme_check_hw_ver(jme);
3202         jme->mii_if.dev = netdev;
3203         if (jme->fpgaver) {
3204                 jme->mii_if.phy_id = 0;
3205                 for (i = 1 ; i < 32 ; ++i) {
3206                         bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3207                         bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3208                         if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3209                                 jme->mii_if.phy_id = i;
3210                                 break;
3211                         }
3212                 }
3213
3214                 if (!jme->mii_if.phy_id) {
3215                         rc = -EIO;
3216                         pr_err("Can not find phy_id\n");
3217                         goto err_out_unmap;
3218                 }
3219
3220                 jme->reg_ghc |= GHC_LINK_POLL;
3221         } else {
3222                 jme->mii_if.phy_id = 1;
3223         }
3224         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3225                 jme->mii_if.supports_gmii = true;
3226         else
3227                 jme->mii_if.supports_gmii = false;
3228         jme->mii_if.phy_id_mask = 0x1F;
3229         jme->mii_if.reg_num_mask = 0x1F;
3230         jme->mii_if.mdio_read = jme_mdio_read;
3231         jme->mii_if.mdio_write = jme_mdio_write;
3232
3233         jme_clear_pm(jme);
3234         jme_set_phyfifo_5level(jme);
3235         pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev);
3236         if (!jme->fpgaver)
3237                 jme_phy_init(jme);
3238         jme_phy_off(jme);
3239
3240         /*
3241          * Reset MAC processor and reload EEPROM for MAC Address
3242          */
3243         jme_reset_mac_processor(jme);
3244         rc = jme_reload_eeprom(jme);
3245         if (rc) {
3246                 pr_err("Reload eeprom for reading MAC Address error\n");
3247                 goto err_out_unmap;
3248         }
3249         jme_load_macaddr(netdev);
3250
3251         /*
3252          * Tell stack that we are not ready to work until open()
3253          */
3254         netif_carrier_off(netdev);
3255
3256         rc = register_netdev(netdev);
3257         if (rc) {
3258                 pr_err("Cannot register net device\n");
3259                 goto err_out_unmap;
3260         }
3261
3262         netif_info(jme, probe, jme->dev, "%s%s chipver:%x pcirev:%x "
3263                    "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3264                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3265                    "JMC250 Gigabit Ethernet" :
3266                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3267                    "JMC260 Fast Ethernet" : "Unknown",
3268                    (jme->fpgaver != 0) ? " (FPGA)" : "",
3269                    (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3270                    jme->pcirev,
3271                    netdev->dev_addr[0],
3272                    netdev->dev_addr[1],
3273                    netdev->dev_addr[2],
3274                    netdev->dev_addr[3],
3275                    netdev->dev_addr[4],
3276                    netdev->dev_addr[5]);
3277
3278         return 0;
3279
3280 err_out_unmap:
3281         iounmap(jme->regs);
3282 err_out_free_netdev:
3283         pci_set_drvdata(pdev, NULL);
3284         free_netdev(netdev);
3285 err_out_release_regions:
3286         pci_release_regions(pdev);
3287 err_out_disable_pdev:
3288         pci_disable_device(pdev);
3289 err_out:
3290         return rc;
3291 }
3292
3293 static void __devexit
3294 jme_remove_one(struct pci_dev *pdev)
3295 {
3296         struct net_device *netdev = pci_get_drvdata(pdev);
3297         struct jme_adapter *jme = netdev_priv(netdev);
3298
3299         unregister_netdev(netdev);
3300         iounmap(jme->regs);
3301         pci_set_drvdata(pdev, NULL);
3302         free_netdev(netdev);
3303         pci_release_regions(pdev);
3304         pci_disable_device(pdev);
3305
3306 }
3307
3308 static void
3309 jme_shutdown(struct pci_dev *pdev)
3310 {
3311         struct net_device *netdev = pci_get_drvdata(pdev);
3312         struct jme_adapter *jme = netdev_priv(netdev);
3313
3314         jme_powersave_phy(jme);
3315 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)
3316         pci_enable_wake(pdev, PCI_D3hot, true);
3317 #else
3318         pci_pme_active(pdev, true);
3319 #endif
3320 }
3321
3322 #ifdef CONFIG_PM
3323 static int
3324 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3325 {
3326         struct net_device *netdev = pci_get_drvdata(pdev);
3327         struct jme_adapter *jme = netdev_priv(netdev);
3328
3329         atomic_dec(&jme->link_changing);
3330
3331         netif_device_detach(netdev);
3332         netif_stop_queue(netdev);
3333         jme_stop_irq(jme);
3334
3335         tasklet_disable(&jme->txclean_task);
3336         tasklet_disable(&jme->rxclean_task);
3337         tasklet_disable(&jme->rxempty_task);
3338
3339         if (netif_carrier_ok(netdev)) {
3340                 if (test_bit(JME_FLAG_POLL, &jme->flags))
3341                         jme_polling_mode(jme);
3342
3343                 jme_stop_pcc_timer(jme);
3344                 jme_disable_rx_engine(jme);
3345                 jme_disable_tx_engine(jme);
3346                 jme_reset_mac_processor(jme);
3347                 jme_free_rx_resources(jme);
3348                 jme_free_tx_resources(jme);
3349                 netif_carrier_off(netdev);
3350                 jme->phylink = 0;
3351         }
3352
3353         tasklet_enable(&jme->txclean_task);
3354         tasklet_hi_enable(&jme->rxclean_task);
3355         tasklet_hi_enable(&jme->rxempty_task);
3356
3357         pci_save_state(pdev);
3358         jme_powersave_phy(jme);
3359 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27)
3360         pci_enable_wake(pdev, PCI_D3hot, true);
3361 #else
3362         pci_pme_active(pdev, true);
3363 #endif
3364         pci_set_power_state(pdev, PCI_D3hot);
3365
3366         return 0;
3367 }
3368
3369 static int
3370 jme_resume(struct pci_dev *pdev)
3371 {
3372         struct net_device *netdev = pci_get_drvdata(pdev);
3373         struct jme_adapter *jme = netdev_priv(netdev);
3374
3375         jme_clear_pm(jme);
3376         pci_restore_state(pdev);
3377
3378         jme_phy_on(jme);
3379         if (test_bit(JME_FLAG_SSET, &jme->flags))
3380                 jme_set_settings(netdev, &jme->old_ecmd);
3381         else
3382                 jme_reset_phy_processor(jme);
3383
3384         jme_start_irq(jme);
3385         netif_device_attach(netdev);
3386
3387         atomic_inc(&jme->link_changing);
3388
3389         jme_reset_link(jme);
3390
3391         return 0;
3392 }
3393 #endif
3394
3395 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3396 static struct pci_device_id jme_pci_tbl[] = {
3397 #else
3398 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3399 #endif
3400         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3401         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3402         { }
3403 };
3404
3405 static struct pci_driver jme_driver = {
3406         .name           = DRV_NAME,
3407         .id_table       = jme_pci_tbl,
3408         .probe          = jme_init_one,
3409         .remove         = __devexit_p(jme_remove_one),
3410 #ifdef CONFIG_PM
3411         .suspend        = jme_suspend,
3412         .resume         = jme_resume,
3413 #endif /* CONFIG_PM */
3414         .shutdown       = jme_shutdown,
3415 };
3416
3417 static int __init
3418 jme_init_module(void)
3419 {
3420         pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION);
3421         return pci_register_driver(&jme_driver);
3422 }
3423
3424 static void __exit
3425 jme_cleanup_module(void)
3426 {
3427         pci_unregister_driver(&jme_driver);
3428 }
3429
3430 module_init(jme_init_module);
3431 module_exit(jme_cleanup_module);
3432
3433 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3434 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3435 MODULE_LICENSE("GPL");
3436 MODULE_VERSION(DRV_VERSION);
3437 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3438