jme: Adding mii-tool support
[jme.git] / jme.c
1 /*
2  * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver
3  *
4  * Copyright 2008 JMicron Technology Corporation
5  * http://www.jmicron.com/
6  *
7  * Author: Guo-Fu Tseng <cooldavid@cooldavid.org>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  *
22  */
23
24 #include <linux/version.h>
25 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
26 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27 #endif
28
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/etherdevice.h>
34 #include <linux/ethtool.h>
35 #include <linux/mii.h>
36 #include <linux/crc32.h>
37 #include <linux/delay.h>
38 #include <linux/spinlock.h>
39 #include <linux/in.h>
40 #include <linux/ip.h>
41 #include <linux/ipv6.h>
42 #include <linux/tcp.h>
43 #include <linux/udp.h>
44 #include <linux/if_vlan.h>
45 #include <linux/slab.h>
46 #include <net/ip6_checksum.h>
47 #include "jme.h"
48
49 static int force_pseudohp = -1;
50 static int no_pseudohp = -1;
51 static int no_extplug = -1;
52 module_param(force_pseudohp, int, 0);
53 MODULE_PARM_DESC(force_pseudohp,
54         "Enable pseudo hot-plug feature manually by driver instead of BIOS.");
55 module_param(no_pseudohp, int, 0);
56 MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature.");
57 module_param(no_extplug, int, 0);
58 MODULE_PARM_DESC(no_extplug,
59         "Do not use external plug signal for pseudo hot-plug.");
60
61 static int
62 jme_mdio_read(struct net_device *netdev, int phy, int reg)
63 {
64         struct jme_adapter *jme = netdev_priv(netdev);
65         int i, val, again = (reg == MII_BMSR) ? 1 : 0;
66
67 read_again:
68         jwrite32(jme, JME_SMI, SMI_OP_REQ |
69                                 smi_phy_addr(phy) |
70                                 smi_reg_addr(reg));
71
72         wmb();
73         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
74                 udelay(20);
75                 val = jread32(jme, JME_SMI);
76                 if ((val & SMI_OP_REQ) == 0)
77                         break;
78         }
79
80         if (i == 0) {
81                 pr_err("phy(%d) read timeout : %d\n", phy, reg);
82                 return 0;
83         }
84
85         if (again--)
86                 goto read_again;
87
88         return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT;
89 }
90
91 static void
92 jme_mdio_write(struct net_device *netdev,
93                                 int phy, int reg, int val)
94 {
95         struct jme_adapter *jme = netdev_priv(netdev);
96         int i;
97
98         jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ |
99                 ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) |
100                 smi_phy_addr(phy) | smi_reg_addr(reg));
101
102         wmb();
103         for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) {
104                 udelay(20);
105                 if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0)
106                         break;
107         }
108
109         if (i == 0)
110                 pr_err("phy(%d) write timeout : %d\n", phy, reg);
111 }
112
113 static inline void
114 jme_reset_phy_processor(struct jme_adapter *jme)
115 {
116         u32 val;
117
118         jme_mdio_write(jme->dev,
119                         jme->mii_if.phy_id,
120                         MII_ADVERTISE, ADVERTISE_ALL |
121                         ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
122
123         if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
124                 jme_mdio_write(jme->dev,
125                                 jme->mii_if.phy_id,
126                                 MII_CTRL1000,
127                                 ADVERTISE_1000FULL | ADVERTISE_1000HALF);
128
129         val = jme_mdio_read(jme->dev,
130                                 jme->mii_if.phy_id,
131                                 MII_BMCR);
132
133         jme_mdio_write(jme->dev,
134                         jme->mii_if.phy_id,
135                         MII_BMCR, val | BMCR_RESET);
136 }
137
138 static void
139 jme_setup_wakeup_frame(struct jme_adapter *jme,
140                 u32 *mask, u32 crc, int fnr)
141 {
142         int i;
143
144         /*
145          * Setup CRC pattern
146          */
147         jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL));
148         wmb();
149         jwrite32(jme, JME_WFODP, crc);
150         wmb();
151
152         /*
153          * Setup Mask
154          */
155         for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) {
156                 jwrite32(jme, JME_WFOI,
157                                 ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) |
158                                 (fnr & WFOI_FRAME_SEL));
159                 wmb();
160                 jwrite32(jme, JME_WFODP, mask[i]);
161                 wmb();
162         }
163 }
164
165 static inline void
166 jme_reset_mac_processor(struct jme_adapter *jme)
167 {
168         u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0};
169         u32 crc = 0xCDCDCDCD;
170         u32 gpreg0;
171         int i;
172
173         jwrite32(jme, JME_GHC, jme->reg_ghc | GHC_SWRST);
174         udelay(2);
175         jwrite32(jme, JME_GHC, jme->reg_ghc);
176
177         jwrite32(jme, JME_RXDBA_LO, 0x00000000);
178         jwrite32(jme, JME_RXDBA_HI, 0x00000000);
179         jwrite32(jme, JME_RXQDC, 0x00000000);
180         jwrite32(jme, JME_RXNDA, 0x00000000);
181         jwrite32(jme, JME_TXDBA_LO, 0x00000000);
182         jwrite32(jme, JME_TXDBA_HI, 0x00000000);
183         jwrite32(jme, JME_TXQDC, 0x00000000);
184         jwrite32(jme, JME_TXNDA, 0x00000000);
185
186         jwrite32(jme, JME_RXMCHT_LO, 0x00000000);
187         jwrite32(jme, JME_RXMCHT_HI, 0x00000000);
188         for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i)
189                 jme_setup_wakeup_frame(jme, mask, crc, i);
190         if (jme->fpgaver)
191                 gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL;
192         else
193                 gpreg0 = GPREG0_DEFAULT;
194         jwrite32(jme, JME_GPREG0, gpreg0);
195         jwrite32(jme, JME_GPREG1, GPREG1_DEFAULT);
196 }
197
198 static inline void
199 jme_reset_ghc_speed(struct jme_adapter *jme)
200 {
201         jme->reg_ghc &= ~(GHC_SPEED_1000M | GHC_DPX);
202         jwrite32(jme, JME_GHC, jme->reg_ghc);
203 }
204
205 static inline void
206 jme_clear_pm(struct jme_adapter *jme)
207 {
208         jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs);
209         pci_set_power_state(jme->pdev, PCI_D0);
210         pci_enable_wake(jme->pdev, PCI_D0, false);
211 }
212
213 static int
214 jme_reload_eeprom(struct jme_adapter *jme)
215 {
216         u32 val;
217         int i;
218
219         val = jread32(jme, JME_SMBCSR);
220
221         if (val & SMBCSR_EEPROMD) {
222                 val |= SMBCSR_CNACK;
223                 jwrite32(jme, JME_SMBCSR, val);
224                 val |= SMBCSR_RELOAD;
225                 jwrite32(jme, JME_SMBCSR, val);
226                 mdelay(12);
227
228                 for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) {
229                         mdelay(1);
230                         if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0)
231                                 break;
232                 }
233
234                 if (i == 0) {
235                         pr_err("eeprom reload timeout\n");
236                         return -EIO;
237                 }
238         }
239
240         return 0;
241 }
242
243 static void
244 jme_load_macaddr(struct net_device *netdev)
245 {
246         struct jme_adapter *jme = netdev_priv(netdev);
247         unsigned char macaddr[6];
248         u32 val;
249
250         spin_lock_bh(&jme->macaddr_lock);
251         val = jread32(jme, JME_RXUMA_LO);
252         macaddr[0] = (val >>  0) & 0xFF;
253         macaddr[1] = (val >>  8) & 0xFF;
254         macaddr[2] = (val >> 16) & 0xFF;
255         macaddr[3] = (val >> 24) & 0xFF;
256         val = jread32(jme, JME_RXUMA_HI);
257         macaddr[4] = (val >>  0) & 0xFF;
258         macaddr[5] = (val >>  8) & 0xFF;
259         memcpy(netdev->dev_addr, macaddr, 6);
260         spin_unlock_bh(&jme->macaddr_lock);
261 }
262
263 static inline void
264 jme_set_rx_pcc(struct jme_adapter *jme, int p)
265 {
266         switch (p) {
267         case PCC_OFF:
268                 jwrite32(jme, JME_PCCRX0,
269                         ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
270                         ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK));
271                 break;
272         case PCC_P1:
273                 jwrite32(jme, JME_PCCRX0,
274                         ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
275                         ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK));
276                 break;
277         case PCC_P2:
278                 jwrite32(jme, JME_PCCRX0,
279                         ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
280                         ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK));
281                 break;
282         case PCC_P3:
283                 jwrite32(jme, JME_PCCRX0,
284                         ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) |
285                         ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK));
286                 break;
287         default:
288                 break;
289         }
290         wmb();
291
292         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
293                 netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p);
294 }
295
296 static void
297 jme_start_irq(struct jme_adapter *jme)
298 {
299         register struct dynpcc_info *dpi = &(jme->dpi);
300
301         jme_set_rx_pcc(jme, PCC_P1);
302         dpi->cur                = PCC_P1;
303         dpi->attempt            = PCC_P1;
304         dpi->cnt                = 0;
305
306         jwrite32(jme, JME_PCCTX,
307                         ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) |
308                         ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) |
309                         PCCTXQ0_EN
310                 );
311
312         /*
313          * Enable Interrupts
314          */
315         jwrite32(jme, JME_IENS, INTR_ENABLE);
316 }
317
318 static inline void
319 jme_stop_irq(struct jme_adapter *jme)
320 {
321         /*
322          * Disable Interrupts
323          */
324         jwrite32f(jme, JME_IENC, INTR_ENABLE);
325 }
326
327 static u32
328 jme_linkstat_from_phy(struct jme_adapter *jme)
329 {
330         u32 phylink, bmsr;
331
332         phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17);
333         bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR);
334         if (bmsr & BMSR_ANCOMP)
335                 phylink |= PHY_LINK_AUTONEG_COMPLETE;
336
337         return phylink;
338 }
339
340 static inline void
341 jme_set_phyfifoa(struct jme_adapter *jme)
342 {
343         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004);
344 }
345
346 static inline void
347 jme_set_phyfifob(struct jme_adapter *jme)
348 {
349         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000);
350 }
351
352 static int
353 jme_check_link(struct net_device *netdev, int testonly)
354 {
355         struct jme_adapter *jme = netdev_priv(netdev);
356         u32 phylink, ghc, cnt = JME_SPDRSV_TIMEOUT, bmcr, gpreg1;
357         char linkmsg[64];
358         int rc = 0;
359
360         linkmsg[0] = '\0';
361
362         if (jme->fpgaver)
363                 phylink = jme_linkstat_from_phy(jme);
364         else
365                 phylink = jread32(jme, JME_PHY_LINK);
366
367         if (phylink & PHY_LINK_UP) {
368                 if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) {
369                         /*
370                          * If we did not enable AN
371                          * Speed/Duplex Info should be obtained from SMI
372                          */
373                         phylink = PHY_LINK_UP;
374
375                         bmcr = jme_mdio_read(jme->dev,
376                                                 jme->mii_if.phy_id,
377                                                 MII_BMCR);
378
379                         phylink |= ((bmcr & BMCR_SPEED1000) &&
380                                         (bmcr & BMCR_SPEED100) == 0) ?
381                                         PHY_LINK_SPEED_1000M :
382                                         (bmcr & BMCR_SPEED100) ?
383                                         PHY_LINK_SPEED_100M :
384                                         PHY_LINK_SPEED_10M;
385
386                         phylink |= (bmcr & BMCR_FULLDPLX) ?
387                                          PHY_LINK_DUPLEX : 0;
388
389                         strcat(linkmsg, "Forced: ");
390                 } else {
391                         /*
392                          * Keep polling for speed/duplex resolve complete
393                          */
394                         while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) &&
395                                 --cnt) {
396
397                                 udelay(1);
398
399                                 if (jme->fpgaver)
400                                         phylink = jme_linkstat_from_phy(jme);
401                                 else
402                                         phylink = jread32(jme, JME_PHY_LINK);
403                         }
404                         if (!cnt)
405                                 pr_err("Waiting speed resolve timeout\n");
406
407                         strcat(linkmsg, "ANed: ");
408                 }
409
410                 if (jme->phylink == phylink) {
411                         rc = 1;
412                         goto out;
413                 }
414                 if (testonly)
415                         goto out;
416
417                 jme->phylink = phylink;
418
419                 ghc = jme->reg_ghc & ~(GHC_SPEED | GHC_DPX |
420                                 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE |
421                                 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY);
422                 switch (phylink & PHY_LINK_SPEED_MASK) {
423                 case PHY_LINK_SPEED_10M:
424                         ghc |= GHC_SPEED_10M |
425                                 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
426                         strcat(linkmsg, "10 Mbps, ");
427                         break;
428                 case PHY_LINK_SPEED_100M:
429                         ghc |= GHC_SPEED_100M |
430                                 GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE;
431                         strcat(linkmsg, "100 Mbps, ");
432                         break;
433                 case PHY_LINK_SPEED_1000M:
434                         ghc |= GHC_SPEED_1000M |
435                                 GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY;
436                         strcat(linkmsg, "1000 Mbps, ");
437                         break;
438                 default:
439                         break;
440                 }
441
442                 if (phylink & PHY_LINK_DUPLEX) {
443                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT);
444                         ghc |= GHC_DPX;
445                 } else {
446                         jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT |
447                                                 TXMCS_BACKOFF |
448                                                 TXMCS_CARRIERSENSE |
449                                                 TXMCS_COLLISION);
450                         jwrite32(jme, JME_TXTRHD, TXTRHD_TXPEN |
451                                 ((0x2000 << TXTRHD_TXP_SHIFT) & TXTRHD_TXP) |
452                                 TXTRHD_TXREN |
453                                 ((8 << TXTRHD_TXRL_SHIFT) & TXTRHD_TXRL));
454                 }
455
456                 gpreg1 = GPREG1_DEFAULT;
457                 if (is_buggy250(jme->pdev->device, jme->chiprev)) {
458                         if (!(phylink & PHY_LINK_DUPLEX))
459                                 gpreg1 |= GPREG1_HALFMODEPATCH;
460                         switch (phylink & PHY_LINK_SPEED_MASK) {
461                         case PHY_LINK_SPEED_10M:
462                                 jme_set_phyfifoa(jme);
463                                 gpreg1 |= GPREG1_RSSPATCH;
464                                 break;
465                         case PHY_LINK_SPEED_100M:
466                                 jme_set_phyfifob(jme);
467                                 gpreg1 |= GPREG1_RSSPATCH;
468                                 break;
469                         case PHY_LINK_SPEED_1000M:
470                                 jme_set_phyfifoa(jme);
471                                 break;
472                         default:
473                                 break;
474                         }
475                 }
476
477                 jwrite32(jme, JME_GPREG1, gpreg1);
478                 jwrite32(jme, JME_GHC, ghc);
479                 jme->reg_ghc = ghc;
480
481                 strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ?
482                                         "Full-Duplex, " :
483                                         "Half-Duplex, ");
484                 strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ?
485                                         "MDI-X" :
486                                         "MDI");
487                 netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg);
488                 netif_carrier_on(netdev);
489         } else {
490                 if (testonly)
491                         goto out;
492
493                 netif_info(jme, link, jme->dev, "Link is down\n");
494                 jme->phylink = 0;
495                 netif_carrier_off(netdev);
496         }
497
498 out:
499         return rc;
500 }
501
502 static int
503 jme_setup_tx_resources(struct jme_adapter *jme)
504 {
505         struct jme_ring *txring = &(jme->txring[0]);
506
507         txring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
508                                    TX_RING_ALLOC_SIZE(jme->tx_ring_size),
509                                    &(txring->dmaalloc),
510                                    GFP_ATOMIC);
511
512         if (!txring->alloc)
513                 goto err_set_null;
514
515         /*
516          * 16 Bytes align
517          */
518         txring->desc            = (void *)ALIGN((unsigned long)(txring->alloc),
519                                                 RING_DESC_ALIGN);
520         txring->dma             = ALIGN(txring->dmaalloc, RING_DESC_ALIGN);
521         txring->next_to_use     = 0;
522         atomic_set(&txring->next_to_clean, 0);
523         atomic_set(&txring->nr_free, jme->tx_ring_size);
524
525         txring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
526                                         jme->tx_ring_size, GFP_ATOMIC);
527         if (unlikely(!(txring->bufinf)))
528                 goto err_free_txring;
529
530         /*
531          * Initialize Transmit Descriptors
532          */
533         memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size));
534         memset(txring->bufinf, 0,
535                 sizeof(struct jme_buffer_info) * jme->tx_ring_size);
536
537         return 0;
538
539 err_free_txring:
540         dma_free_coherent(&(jme->pdev->dev),
541                           TX_RING_ALLOC_SIZE(jme->tx_ring_size),
542                           txring->alloc,
543                           txring->dmaalloc);
544
545 err_set_null:
546         txring->desc = NULL;
547         txring->dmaalloc = 0;
548         txring->dma = 0;
549         txring->bufinf = NULL;
550
551         return -ENOMEM;
552 }
553
554 static void
555 jme_free_tx_resources(struct jme_adapter *jme)
556 {
557         int i;
558         struct jme_ring *txring = &(jme->txring[0]);
559         struct jme_buffer_info *txbi;
560
561         if (txring->alloc) {
562                 if (txring->bufinf) {
563                         for (i = 0 ; i < jme->tx_ring_size ; ++i) {
564                                 txbi = txring->bufinf + i;
565                                 if (txbi->skb) {
566                                         dev_kfree_skb(txbi->skb);
567                                         txbi->skb = NULL;
568                                 }
569                                 txbi->mapping           = 0;
570                                 txbi->len               = 0;
571                                 txbi->nr_desc           = 0;
572                                 txbi->start_xmit        = 0;
573                         }
574                         kfree(txring->bufinf);
575                 }
576
577                 dma_free_coherent(&(jme->pdev->dev),
578                                   TX_RING_ALLOC_SIZE(jme->tx_ring_size),
579                                   txring->alloc,
580                                   txring->dmaalloc);
581
582                 txring->alloc           = NULL;
583                 txring->desc            = NULL;
584                 txring->dmaalloc        = 0;
585                 txring->dma             = 0;
586                 txring->bufinf          = NULL;
587         }
588         txring->next_to_use     = 0;
589         atomic_set(&txring->next_to_clean, 0);
590         atomic_set(&txring->nr_free, 0);
591 }
592
593 static inline void
594 jme_enable_tx_engine(struct jme_adapter *jme)
595 {
596         /*
597          * Select Queue 0
598          */
599         jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0);
600         wmb();
601
602         /*
603          * Setup TX Queue 0 DMA Bass Address
604          */
605         jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
606         jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32);
607         jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL);
608
609         /*
610          * Setup TX Descptor Count
611          */
612         jwrite32(jme, JME_TXQDC, jme->tx_ring_size);
613
614         /*
615          * Enable TX Engine
616          */
617         wmb();
618         jwrite32(jme, JME_TXCS, jme->reg_txcs |
619                                 TXCS_SELECT_QUEUE0 |
620                                 TXCS_ENABLE);
621
622 }
623
624 static inline void
625 jme_restart_tx_engine(struct jme_adapter *jme)
626 {
627         /*
628          * Restart TX Engine
629          */
630         jwrite32(jme, JME_TXCS, jme->reg_txcs |
631                                 TXCS_SELECT_QUEUE0 |
632                                 TXCS_ENABLE);
633 }
634
635 static inline void
636 jme_disable_tx_engine(struct jme_adapter *jme)
637 {
638         int i;
639         u32 val;
640
641         /*
642          * Disable TX Engine
643          */
644         jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0);
645         wmb();
646
647         val = jread32(jme, JME_TXCS);
648         for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) {
649                 mdelay(1);
650                 val = jread32(jme, JME_TXCS);
651                 rmb();
652         }
653
654         if (!i)
655                 pr_err("Disable TX engine timeout\n");
656 }
657
658 static void
659 jme_set_clean_rxdesc(struct jme_adapter *jme, int i)
660 {
661         struct jme_ring *rxring = &(jme->rxring[0]);
662         register struct rxdesc *rxdesc = rxring->desc;
663         struct jme_buffer_info *rxbi = rxring->bufinf;
664         rxdesc += i;
665         rxbi += i;
666
667         rxdesc->dw[0] = 0;
668         rxdesc->dw[1] = 0;
669         rxdesc->desc1.bufaddrh  = cpu_to_le32((__u64)rxbi->mapping >> 32);
670         rxdesc->desc1.bufaddrl  = cpu_to_le32(
671                                         (__u64)rxbi->mapping & 0xFFFFFFFFUL);
672         rxdesc->desc1.datalen   = cpu_to_le16(rxbi->len);
673         if (jme->dev->features & NETIF_F_HIGHDMA)
674                 rxdesc->desc1.flags = RXFLAG_64BIT;
675         wmb();
676         rxdesc->desc1.flags     |= RXFLAG_OWN | RXFLAG_INT;
677 }
678
679 static int
680 jme_make_new_rx_buf(struct jme_adapter *jme, int i)
681 {
682         struct jme_ring *rxring = &(jme->rxring[0]);
683         struct jme_buffer_info *rxbi = rxring->bufinf + i;
684         struct sk_buff *skb;
685
686         skb = netdev_alloc_skb(jme->dev,
687                 jme->dev->mtu + RX_EXTRA_LEN);
688         if (unlikely(!skb))
689                 return -ENOMEM;
690 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
691         skb->dev = jme->dev;
692 #endif
693
694         rxbi->skb = skb;
695         rxbi->len = skb_tailroom(skb);
696         rxbi->mapping = pci_map_page(jme->pdev,
697                                         virt_to_page(skb->data),
698                                         offset_in_page(skb->data),
699                                         rxbi->len,
700                                         PCI_DMA_FROMDEVICE);
701
702         return 0;
703 }
704
705 static void
706 jme_free_rx_buf(struct jme_adapter *jme, int i)
707 {
708         struct jme_ring *rxring = &(jme->rxring[0]);
709         struct jme_buffer_info *rxbi = rxring->bufinf;
710         rxbi += i;
711
712         if (rxbi->skb) {
713                 pci_unmap_page(jme->pdev,
714                                  rxbi->mapping,
715                                  rxbi->len,
716                                  PCI_DMA_FROMDEVICE);
717                 dev_kfree_skb(rxbi->skb);
718                 rxbi->skb = NULL;
719                 rxbi->mapping = 0;
720                 rxbi->len = 0;
721         }
722 }
723
724 static void
725 jme_free_rx_resources(struct jme_adapter *jme)
726 {
727         int i;
728         struct jme_ring *rxring = &(jme->rxring[0]);
729
730         if (rxring->alloc) {
731                 if (rxring->bufinf) {
732                         for (i = 0 ; i < jme->rx_ring_size ; ++i)
733                                 jme_free_rx_buf(jme, i);
734                         kfree(rxring->bufinf);
735                 }
736
737                 dma_free_coherent(&(jme->pdev->dev),
738                                   RX_RING_ALLOC_SIZE(jme->rx_ring_size),
739                                   rxring->alloc,
740                                   rxring->dmaalloc);
741                 rxring->alloc    = NULL;
742                 rxring->desc     = NULL;
743                 rxring->dmaalloc = 0;
744                 rxring->dma      = 0;
745                 rxring->bufinf   = NULL;
746         }
747         rxring->next_to_use   = 0;
748         atomic_set(&rxring->next_to_clean, 0);
749 }
750
751 static int
752 jme_setup_rx_resources(struct jme_adapter *jme)
753 {
754         int i;
755         struct jme_ring *rxring = &(jme->rxring[0]);
756
757         rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev),
758                                    RX_RING_ALLOC_SIZE(jme->rx_ring_size),
759                                    &(rxring->dmaalloc),
760                                    GFP_ATOMIC);
761         if (!rxring->alloc)
762                 goto err_set_null;
763
764         /*
765          * 16 Bytes align
766          */
767         rxring->desc            = (void *)ALIGN((unsigned long)(rxring->alloc),
768                                                 RING_DESC_ALIGN);
769         rxring->dma             = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN);
770         rxring->next_to_use     = 0;
771         atomic_set(&rxring->next_to_clean, 0);
772
773         rxring->bufinf          = kmalloc(sizeof(struct jme_buffer_info) *
774                                         jme->rx_ring_size, GFP_ATOMIC);
775         if (unlikely(!(rxring->bufinf)))
776                 goto err_free_rxring;
777
778         /*
779          * Initiallize Receive Descriptors
780          */
781         memset(rxring->bufinf, 0,
782                 sizeof(struct jme_buffer_info) * jme->rx_ring_size);
783         for (i = 0 ; i < jme->rx_ring_size ; ++i) {
784                 if (unlikely(jme_make_new_rx_buf(jme, i))) {
785                         jme_free_rx_resources(jme);
786                         return -ENOMEM;
787                 }
788
789                 jme_set_clean_rxdesc(jme, i);
790         }
791
792         return 0;
793
794 err_free_rxring:
795         dma_free_coherent(&(jme->pdev->dev),
796                           RX_RING_ALLOC_SIZE(jme->rx_ring_size),
797                           rxring->alloc,
798                           rxring->dmaalloc);
799 err_set_null:
800         rxring->desc = NULL;
801         rxring->dmaalloc = 0;
802         rxring->dma = 0;
803         rxring->bufinf = NULL;
804
805         return -ENOMEM;
806 }
807
808 static inline void
809 jme_enable_rx_engine(struct jme_adapter *jme)
810 {
811         /*
812          * Select Queue 0
813          */
814         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
815                                 RXCS_QUEUESEL_Q0);
816         wmb();
817
818         /*
819          * Setup RX DMA Bass Address
820          */
821         jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
822         jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32);
823         jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL);
824
825         /*
826          * Setup RX Descriptor Count
827          */
828         jwrite32(jme, JME_RXQDC, jme->rx_ring_size);
829
830         /*
831          * Setup Unicast Filter
832          */
833         jme_set_multi(jme->dev);
834
835         /*
836          * Enable RX Engine
837          */
838         wmb();
839         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
840                                 RXCS_QUEUESEL_Q0 |
841                                 RXCS_ENABLE |
842                                 RXCS_QST);
843 }
844
845 static inline void
846 jme_restart_rx_engine(struct jme_adapter *jme)
847 {
848         /*
849          * Start RX Engine
850          */
851         jwrite32(jme, JME_RXCS, jme->reg_rxcs |
852                                 RXCS_QUEUESEL_Q0 |
853                                 RXCS_ENABLE |
854                                 RXCS_QST);
855 }
856
857 static inline void
858 jme_disable_rx_engine(struct jme_adapter *jme)
859 {
860         int i;
861         u32 val;
862
863         /*
864          * Disable RX Engine
865          */
866         jwrite32(jme, JME_RXCS, jme->reg_rxcs);
867         wmb();
868
869         val = jread32(jme, JME_RXCS);
870         for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) {
871                 mdelay(1);
872                 val = jread32(jme, JME_RXCS);
873                 rmb();
874         }
875
876         if (!i)
877                 pr_err("Disable RX engine timeout\n");
878
879 }
880
881 static int
882 jme_rxsum_ok(struct jme_adapter *jme, u16 flags)
883 {
884         if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4)))
885                 return false;
886
887         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS))
888                         == RXWBFLAG_TCPON)) {
889                 if (flags & RXWBFLAG_IPV4)
890                         netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n");
891                 return false;
892         }
893
894         if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS))
895                         == RXWBFLAG_UDPON)) {
896                 if (flags & RXWBFLAG_IPV4)
897                         netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n");
898                 return false;
899         }
900
901         if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS))
902                         == RXWBFLAG_IPV4)) {
903                 netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n");
904                 return false;
905         }
906
907         return true;
908 }
909
910 static void
911 jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx)
912 {
913         struct jme_ring *rxring = &(jme->rxring[0]);
914         struct rxdesc *rxdesc = rxring->desc;
915         struct jme_buffer_info *rxbi = rxring->bufinf;
916         struct sk_buff *skb;
917         int framesize;
918
919         rxdesc += idx;
920         rxbi += idx;
921
922         skb = rxbi->skb;
923         pci_dma_sync_single_for_cpu(jme->pdev,
924                                         rxbi->mapping,
925                                         rxbi->len,
926                                         PCI_DMA_FROMDEVICE);
927
928         if (unlikely(jme_make_new_rx_buf(jme, idx))) {
929                 pci_dma_sync_single_for_device(jme->pdev,
930                                                 rxbi->mapping,
931                                                 rxbi->len,
932                                                 PCI_DMA_FROMDEVICE);
933
934                 ++(NET_STAT(jme).rx_dropped);
935         } else {
936                 framesize = le16_to_cpu(rxdesc->descwb.framesize)
937                                 - RX_PREPAD_SIZE;
938
939                 skb_reserve(skb, RX_PREPAD_SIZE);
940                 skb_put(skb, framesize);
941                 skb->protocol = eth_type_trans(skb, jme->dev);
942
943                 if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags)))
944                         skb->ip_summed = CHECKSUM_UNNECESSARY;
945                 else
946 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,35)
947                         skb->ip_summed = CHECKSUM_NONE;
948 #else
949                         skb_checksum_none_assert(skb);
950 #endif
951
952                 if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) {
953                         if (jme->vlgrp) {
954                                 jme->jme_vlan_rx(skb, jme->vlgrp,
955                                         le16_to_cpu(rxdesc->descwb.vlan));
956                                 NET_STAT(jme).rx_bytes += 4;
957                         } else {
958                                 dev_kfree_skb(skb);
959                         }
960                 } else {
961                         jme->jme_rx(skb);
962                 }
963
964                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) ==
965                     cpu_to_le16(RXWBFLAG_DEST_MUL))
966                         ++(NET_STAT(jme).multicast);
967
968                 NET_STAT(jme).rx_bytes += framesize;
969                 ++(NET_STAT(jme).rx_packets);
970         }
971
972         jme_set_clean_rxdesc(jme, idx);
973
974 }
975
976 static int
977 jme_process_receive(struct jme_adapter *jme, int limit)
978 {
979         struct jme_ring *rxring = &(jme->rxring[0]);
980         struct rxdesc *rxdesc = rxring->desc;
981         int i, j, ccnt, desccnt, mask = jme->rx_ring_mask;
982
983         if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning)))
984                 goto out_inc;
985
986         if (unlikely(atomic_read(&jme->link_changing) != 1))
987                 goto out_inc;
988
989         if (unlikely(!netif_carrier_ok(jme->dev)))
990                 goto out_inc;
991
992         i = atomic_read(&rxring->next_to_clean);
993         while (limit > 0) {
994                 rxdesc = rxring->desc;
995                 rxdesc += i;
996
997                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
998                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
999                         goto out;
1000                 --limit;
1001
1002                 rmb();
1003                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
1004
1005                 if (unlikely(desccnt > 1 ||
1006                 rxdesc->descwb.errstat & RXWBERR_ALLERR)) {
1007
1008                         if (rxdesc->descwb.errstat & RXWBERR_CRCERR)
1009                                 ++(NET_STAT(jme).rx_crc_errors);
1010                         else if (rxdesc->descwb.errstat & RXWBERR_OVERUN)
1011                                 ++(NET_STAT(jme).rx_fifo_errors);
1012                         else
1013                                 ++(NET_STAT(jme).rx_errors);
1014
1015                         if (desccnt > 1)
1016                                 limit -= desccnt - 1;
1017
1018                         for (j = i, ccnt = desccnt ; ccnt-- ; ) {
1019                                 jme_set_clean_rxdesc(jme, j);
1020                                 j = (j + 1) & (mask);
1021                         }
1022
1023                 } else {
1024                         jme_alloc_and_feed_skb(jme, i);
1025                 }
1026
1027                 i = (i + desccnt) & (mask);
1028         }
1029
1030 out:
1031         atomic_set(&rxring->next_to_clean, i);
1032
1033 out_inc:
1034         atomic_inc(&jme->rx_cleaning);
1035
1036         return limit > 0 ? limit : 0;
1037
1038 }
1039
1040 static void
1041 jme_attempt_pcc(struct dynpcc_info *dpi, int atmp)
1042 {
1043         if (likely(atmp == dpi->cur)) {
1044                 dpi->cnt = 0;
1045                 return;
1046         }
1047
1048         if (dpi->attempt == atmp) {
1049                 ++(dpi->cnt);
1050         } else {
1051                 dpi->attempt = atmp;
1052                 dpi->cnt = 0;
1053         }
1054
1055 }
1056
1057 static void
1058 jme_dynamic_pcc(struct jme_adapter *jme)
1059 {
1060         register struct dynpcc_info *dpi = &(jme->dpi);
1061
1062         if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD)
1063                 jme_attempt_pcc(dpi, PCC_P3);
1064         else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD ||
1065                  dpi->intr_cnt > PCC_INTR_THRESHOLD)
1066                 jme_attempt_pcc(dpi, PCC_P2);
1067         else
1068                 jme_attempt_pcc(dpi, PCC_P1);
1069
1070         if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) {
1071                 if (dpi->attempt < dpi->cur)
1072                         tasklet_schedule(&jme->rxclean_task);
1073                 jme_set_rx_pcc(jme, dpi->attempt);
1074                 dpi->cur = dpi->attempt;
1075                 dpi->cnt = 0;
1076         }
1077 }
1078
1079 static void
1080 jme_start_pcc_timer(struct jme_adapter *jme)
1081 {
1082         struct dynpcc_info *dpi = &(jme->dpi);
1083         dpi->last_bytes         = NET_STAT(jme).rx_bytes;
1084         dpi->last_pkts          = NET_STAT(jme).rx_packets;
1085         dpi->intr_cnt           = 0;
1086         jwrite32(jme, JME_TMCSR,
1087                 TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT));
1088 }
1089
1090 static inline void
1091 jme_stop_pcc_timer(struct jme_adapter *jme)
1092 {
1093         jwrite32(jme, JME_TMCSR, 0);
1094 }
1095
1096 static void
1097 jme_shutdown_nic(struct jme_adapter *jme)
1098 {
1099         u32 phylink;
1100
1101         phylink = jme_linkstat_from_phy(jme);
1102
1103         if (!(phylink & PHY_LINK_UP)) {
1104                 /*
1105                  * Disable all interrupt before issue timer
1106                  */
1107                 jme_stop_irq(jme);
1108                 jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE);
1109         }
1110 }
1111
1112 static void
1113 jme_pcc_tasklet(unsigned long arg)
1114 {
1115         struct jme_adapter *jme = (struct jme_adapter *)arg;
1116         struct net_device *netdev = jme->dev;
1117
1118         if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) {
1119                 jme_shutdown_nic(jme);
1120                 return;
1121         }
1122
1123         if (unlikely(!netif_carrier_ok(netdev) ||
1124                 (atomic_read(&jme->link_changing) != 1)
1125         )) {
1126                 jme_stop_pcc_timer(jme);
1127                 return;
1128         }
1129
1130         if (!(test_bit(JME_FLAG_POLL, &jme->flags)))
1131                 jme_dynamic_pcc(jme);
1132
1133         jme_start_pcc_timer(jme);
1134 }
1135
1136 static inline void
1137 jme_polling_mode(struct jme_adapter *jme)
1138 {
1139         jme_set_rx_pcc(jme, PCC_OFF);
1140 }
1141
1142 static inline void
1143 jme_interrupt_mode(struct jme_adapter *jme)
1144 {
1145         jme_set_rx_pcc(jme, PCC_P1);
1146 }
1147
1148 static inline int
1149 jme_pseudo_hotplug_enabled(struct jme_adapter *jme)
1150 {
1151         u32 apmc;
1152         apmc = jread32(jme, JME_APMC);
1153         return apmc & JME_APMC_PSEUDO_HP_EN;
1154 }
1155
1156 static void
1157 jme_start_shutdown_timer(struct jme_adapter *jme)
1158 {
1159         u32 apmc;
1160
1161         apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN;
1162         apmc &= ~JME_APMC_EPIEN_CTRL;
1163         if (!no_extplug) {
1164                 jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN);
1165                 wmb();
1166         }
1167         jwrite32f(jme, JME_APMC, apmc);
1168
1169         jwrite32f(jme, JME_TIMER2, 0);
1170         set_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1171         jwrite32(jme, JME_TMCSR,
1172                 TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT));
1173 }
1174
1175 static void
1176 jme_stop_shutdown_timer(struct jme_adapter *jme)
1177 {
1178         u32 apmc;
1179
1180         jwrite32f(jme, JME_TMCSR, 0);
1181         jwrite32f(jme, JME_TIMER2, 0);
1182         clear_bit(JME_FLAG_SHUTDOWN, &jme->flags);
1183
1184         apmc = jread32(jme, JME_APMC);
1185         apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL);
1186         jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS);
1187         wmb();
1188         jwrite32f(jme, JME_APMC, apmc);
1189 }
1190
1191 static void
1192 jme_link_change_tasklet(unsigned long arg)
1193 {
1194         struct jme_adapter *jme = (struct jme_adapter *)arg;
1195         struct net_device *netdev = jme->dev;
1196         int rc;
1197
1198         while (!atomic_dec_and_test(&jme->link_changing)) {
1199                 atomic_inc(&jme->link_changing);
1200                 netif_info(jme, intr, jme->dev, "Get link change lock failed\n");
1201                 while (atomic_read(&jme->link_changing) != 1)
1202                         netif_info(jme, intr, jme->dev, "Waiting link change lock\n");
1203         }
1204
1205         if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu)
1206                 goto out;
1207
1208         jme->old_mtu = netdev->mtu;
1209         netif_stop_queue(netdev);
1210         if (jme_pseudo_hotplug_enabled(jme))
1211                 jme_stop_shutdown_timer(jme);
1212
1213         jme_stop_pcc_timer(jme);
1214         tasklet_disable(&jme->txclean_task);
1215         tasklet_disable(&jme->rxclean_task);
1216         tasklet_disable(&jme->rxempty_task);
1217
1218         if (netif_carrier_ok(netdev)) {
1219                 jme_reset_ghc_speed(jme);
1220                 jme_disable_rx_engine(jme);
1221                 jme_disable_tx_engine(jme);
1222                 jme_reset_mac_processor(jme);
1223                 jme_free_rx_resources(jme);
1224                 jme_free_tx_resources(jme);
1225
1226                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1227                         jme_polling_mode(jme);
1228
1229                 netif_carrier_off(netdev);
1230         }
1231
1232         jme_check_link(netdev, 0);
1233         if (netif_carrier_ok(netdev)) {
1234                 rc = jme_setup_rx_resources(jme);
1235                 if (rc) {
1236                         pr_err("Allocating resources for RX error, Device STOPPED!\n");
1237                         goto out_enable_tasklet;
1238                 }
1239
1240                 rc = jme_setup_tx_resources(jme);
1241                 if (rc) {
1242                         pr_err("Allocating resources for TX error, Device STOPPED!\n");
1243                         goto err_out_free_rx_resources;
1244                 }
1245
1246                 jme_enable_rx_engine(jme);
1247                 jme_enable_tx_engine(jme);
1248
1249                 netif_start_queue(netdev);
1250
1251                 if (test_bit(JME_FLAG_POLL, &jme->flags))
1252                         jme_interrupt_mode(jme);
1253
1254                 jme_start_pcc_timer(jme);
1255         } else if (jme_pseudo_hotplug_enabled(jme)) {
1256                 jme_start_shutdown_timer(jme);
1257         }
1258
1259         goto out_enable_tasklet;
1260
1261 err_out_free_rx_resources:
1262         jme_free_rx_resources(jme);
1263 out_enable_tasklet:
1264         tasklet_enable(&jme->txclean_task);
1265         tasklet_hi_enable(&jme->rxclean_task);
1266         tasklet_hi_enable(&jme->rxempty_task);
1267 out:
1268         atomic_inc(&jme->link_changing);
1269 }
1270
1271 static void
1272 jme_rx_clean_tasklet(unsigned long arg)
1273 {
1274         struct jme_adapter *jme = (struct jme_adapter *)arg;
1275         struct dynpcc_info *dpi = &(jme->dpi);
1276
1277         jme_process_receive(jme, jme->rx_ring_size);
1278         ++(dpi->intr_cnt);
1279
1280 }
1281
1282 static int
1283 jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget))
1284 {
1285         struct jme_adapter *jme = jme_napi_priv(holder);
1286         DECLARE_NETDEV
1287         int rest;
1288
1289         rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget));
1290
1291         while (atomic_read(&jme->rx_empty) > 0) {
1292                 atomic_dec(&jme->rx_empty);
1293                 ++(NET_STAT(jme).rx_dropped);
1294                 jme_restart_rx_engine(jme);
1295         }
1296         atomic_inc(&jme->rx_empty);
1297
1298         if (rest) {
1299                 JME_RX_COMPLETE(netdev, holder);
1300                 jme_interrupt_mode(jme);
1301         }
1302
1303         JME_NAPI_WEIGHT_SET(budget, rest);
1304         return JME_NAPI_WEIGHT_VAL(budget) - rest;
1305 }
1306
1307 static void
1308 jme_rx_empty_tasklet(unsigned long arg)
1309 {
1310         struct jme_adapter *jme = (struct jme_adapter *)arg;
1311
1312         if (unlikely(atomic_read(&jme->link_changing) != 1))
1313                 return;
1314
1315         if (unlikely(!netif_carrier_ok(jme->dev)))
1316                 return;
1317
1318         netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n");
1319
1320         jme_rx_clean_tasklet(arg);
1321
1322         while (atomic_read(&jme->rx_empty) > 0) {
1323                 atomic_dec(&jme->rx_empty);
1324                 ++(NET_STAT(jme).rx_dropped);
1325                 jme_restart_rx_engine(jme);
1326         }
1327         atomic_inc(&jme->rx_empty);
1328 }
1329
1330 static void
1331 jme_wake_queue_if_stopped(struct jme_adapter *jme)
1332 {
1333         struct jme_ring *txring = &(jme->txring[0]);
1334
1335         smp_wmb();
1336         if (unlikely(netif_queue_stopped(jme->dev) &&
1337         atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) {
1338                 netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n");
1339                 netif_wake_queue(jme->dev);
1340         }
1341
1342 }
1343
1344 static void
1345 jme_tx_clean_tasklet(unsigned long arg)
1346 {
1347         struct jme_adapter *jme = (struct jme_adapter *)arg;
1348         struct jme_ring *txring = &(jme->txring[0]);
1349         struct txdesc *txdesc = txring->desc;
1350         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi;
1351         int i, j, cnt = 0, max, err, mask;
1352
1353         tx_dbg(jme, "Into txclean\n");
1354
1355         if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning)))
1356                 goto out;
1357
1358         if (unlikely(atomic_read(&jme->link_changing) != 1))
1359                 goto out;
1360
1361         if (unlikely(!netif_carrier_ok(jme->dev)))
1362                 goto out;
1363
1364         max = jme->tx_ring_size - atomic_read(&txring->nr_free);
1365         mask = jme->tx_ring_mask;
1366
1367         for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) {
1368
1369                 ctxbi = txbi + i;
1370
1371                 if (likely(ctxbi->skb &&
1372                 !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) {
1373
1374                         tx_dbg(jme, "txclean: %d+%d@%lu\n",
1375                                i, ctxbi->nr_desc, jiffies);
1376
1377                         err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR;
1378
1379                         for (j = 1 ; j < ctxbi->nr_desc ; ++j) {
1380                                 ttxbi = txbi + ((i + j) & (mask));
1381                                 txdesc[(i + j) & (mask)].dw[0] = 0;
1382
1383                                 pci_unmap_page(jme->pdev,
1384                                                  ttxbi->mapping,
1385                                                  ttxbi->len,
1386                                                  PCI_DMA_TODEVICE);
1387
1388                                 ttxbi->mapping = 0;
1389                                 ttxbi->len = 0;
1390                         }
1391
1392                         dev_kfree_skb(ctxbi->skb);
1393
1394                         cnt += ctxbi->nr_desc;
1395
1396                         if (unlikely(err)) {
1397                                 ++(NET_STAT(jme).tx_carrier_errors);
1398                         } else {
1399                                 ++(NET_STAT(jme).tx_packets);
1400                                 NET_STAT(jme).tx_bytes += ctxbi->len;
1401                         }
1402
1403                         ctxbi->skb = NULL;
1404                         ctxbi->len = 0;
1405                         ctxbi->start_xmit = 0;
1406
1407                 } else {
1408                         break;
1409                 }
1410
1411                 i = (i + ctxbi->nr_desc) & mask;
1412
1413                 ctxbi->nr_desc = 0;
1414         }
1415
1416         tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies);
1417         atomic_set(&txring->next_to_clean, i);
1418         atomic_add(cnt, &txring->nr_free);
1419
1420         jme_wake_queue_if_stopped(jme);
1421
1422 out:
1423         atomic_inc(&jme->tx_cleaning);
1424 }
1425
1426 static void
1427 jme_intr_msi(struct jme_adapter *jme, u32 intrstat)
1428 {
1429         /*
1430          * Disable interrupt
1431          */
1432         jwrite32f(jme, JME_IENC, INTR_ENABLE);
1433
1434         if (intrstat & (INTR_LINKCH | INTR_SWINTR)) {
1435                 /*
1436                  * Link change event is critical
1437                  * all other events are ignored
1438                  */
1439                 jwrite32(jme, JME_IEVE, intrstat);
1440                 tasklet_schedule(&jme->linkch_task);
1441                 goto out_reenable;
1442         }
1443
1444         if (intrstat & INTR_TMINTR) {
1445                 jwrite32(jme, JME_IEVE, INTR_TMINTR);
1446                 tasklet_schedule(&jme->pcc_task);
1447         }
1448
1449         if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) {
1450                 jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0);
1451                 tasklet_schedule(&jme->txclean_task);
1452         }
1453
1454         if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1455                 jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO |
1456                                                      INTR_PCCRX0 |
1457                                                      INTR_RX0EMP)) |
1458                                         INTR_RX0);
1459         }
1460
1461         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
1462                 if (intrstat & INTR_RX0EMP)
1463                         atomic_inc(&jme->rx_empty);
1464
1465                 if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) {
1466                         if (likely(JME_RX_SCHEDULE_PREP(jme))) {
1467                                 jme_polling_mode(jme);
1468                                 JME_RX_SCHEDULE(jme);
1469                         }
1470                 }
1471         } else {
1472                 if (intrstat & INTR_RX0EMP) {
1473                         atomic_inc(&jme->rx_empty);
1474                         tasklet_hi_schedule(&jme->rxempty_task);
1475                 } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) {
1476                         tasklet_hi_schedule(&jme->rxclean_task);
1477                 }
1478         }
1479
1480 out_reenable:
1481         /*
1482          * Re-enable interrupt
1483          */
1484         jwrite32f(jme, JME_IENS, INTR_ENABLE);
1485 }
1486
1487 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1488 static irqreturn_t
1489 jme_intr(int irq, void *dev_id, struct pt_regs *regs)
1490 #else
1491 static irqreturn_t
1492 jme_intr(int irq, void *dev_id)
1493 #endif
1494 {
1495         struct net_device *netdev = dev_id;
1496         struct jme_adapter *jme = netdev_priv(netdev);
1497         u32 intrstat;
1498
1499         intrstat = jread32(jme, JME_IEVE);
1500
1501         /*
1502          * Check if it's really an interrupt for us
1503          */
1504         if (unlikely((intrstat & INTR_ENABLE) == 0))
1505                 return IRQ_NONE;
1506
1507         /*
1508          * Check if the device still exist
1509          */
1510         if (unlikely(intrstat == ~((typeof(intrstat))0)))
1511                 return IRQ_NONE;
1512
1513         jme_intr_msi(jme, intrstat);
1514
1515         return IRQ_HANDLED;
1516 }
1517
1518 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1519 static irqreturn_t
1520 jme_msi(int irq, void *dev_id, struct pt_regs *regs)
1521 #else
1522 static irqreturn_t
1523 jme_msi(int irq, void *dev_id)
1524 #endif
1525 {
1526         struct net_device *netdev = dev_id;
1527         struct jme_adapter *jme = netdev_priv(netdev);
1528         u32 intrstat;
1529
1530         intrstat = jread32(jme, JME_IEVE);
1531
1532         jme_intr_msi(jme, intrstat);
1533
1534         return IRQ_HANDLED;
1535 }
1536
1537 static void
1538 jme_reset_link(struct jme_adapter *jme)
1539 {
1540         jwrite32(jme, JME_TMCSR, TMCSR_SWIT);
1541 }
1542
1543 static void
1544 jme_restart_an(struct jme_adapter *jme)
1545 {
1546         u32 bmcr;
1547
1548         spin_lock_bh(&jme->phy_lock);
1549         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1550         bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
1551         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1552         spin_unlock_bh(&jme->phy_lock);
1553 }
1554
1555 static int
1556 jme_request_irq(struct jme_adapter *jme)
1557 {
1558         int rc;
1559         struct net_device *netdev = jme->dev;
1560 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
1561         irqreturn_t (*handler)(int, void *, struct pt_regs *) = jme_intr;
1562         int irq_flags = SA_SHIRQ;
1563 #else
1564         irq_handler_t handler = jme_intr;
1565         int irq_flags = IRQF_SHARED;
1566 #endif
1567
1568         if (!pci_enable_msi(jme->pdev)) {
1569                 set_bit(JME_FLAG_MSI, &jme->flags);
1570                 handler = jme_msi;
1571                 irq_flags = 0;
1572         }
1573
1574         rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name,
1575                           netdev);
1576         if (rc) {
1577                 netdev_err(netdev,
1578                            "Unable to request %s interrupt (return: %d)\n",
1579                            test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx",
1580                            rc);
1581
1582                 if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1583                         pci_disable_msi(jme->pdev);
1584                         clear_bit(JME_FLAG_MSI, &jme->flags);
1585                 }
1586         } else {
1587                 netdev->irq = jme->pdev->irq;
1588         }
1589
1590         return rc;
1591 }
1592
1593 static void
1594 jme_free_irq(struct jme_adapter *jme)
1595 {
1596         free_irq(jme->pdev->irq, jme->dev);
1597         if (test_bit(JME_FLAG_MSI, &jme->flags)) {
1598                 pci_disable_msi(jme->pdev);
1599                 clear_bit(JME_FLAG_MSI, &jme->flags);
1600                 jme->dev->irq = jme->pdev->irq;
1601         }
1602 }
1603
1604 static inline void
1605 jme_phy_on(struct jme_adapter *jme)
1606 {
1607         u32 bmcr;
1608
1609         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1610         bmcr &= ~BMCR_PDOWN;
1611         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr);
1612 }
1613
1614 static int
1615 jme_open(struct net_device *netdev)
1616 {
1617         struct jme_adapter *jme = netdev_priv(netdev);
1618         int rc;
1619
1620         jme_clear_pm(jme);
1621         JME_NAPI_ENABLE(jme);
1622
1623         tasklet_enable(&jme->linkch_task);
1624         tasklet_enable(&jme->txclean_task);
1625         tasklet_hi_enable(&jme->rxclean_task);
1626         tasklet_hi_enable(&jme->rxempty_task);
1627
1628         rc = jme_request_irq(jme);
1629         if (rc)
1630                 goto err_out;
1631
1632         jme_start_irq(jme);
1633
1634         if (test_bit(JME_FLAG_SSET, &jme->flags)) {
1635                 jme_phy_on(jme);
1636                 jme_set_settings(netdev, &jme->old_ecmd);
1637         } else {
1638                 jme_reset_phy_processor(jme);
1639         }
1640
1641         jme_reset_link(jme);
1642
1643         return 0;
1644
1645 err_out:
1646         netif_stop_queue(netdev);
1647         netif_carrier_off(netdev);
1648         return rc;
1649 }
1650
1651 #ifdef CONFIG_PM
1652 static void
1653 jme_set_100m_half(struct jme_adapter *jme)
1654 {
1655         u32 bmcr, tmp;
1656
1657         bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR);
1658         tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 |
1659                        BMCR_SPEED1000 | BMCR_FULLDPLX);
1660         tmp |= BMCR_SPEED100;
1661
1662         if (bmcr != tmp)
1663                 jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp);
1664
1665         if (jme->fpgaver)
1666                 jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL);
1667         else
1668                 jwrite32(jme, JME_GHC, GHC_SPEED_100M);
1669 }
1670
1671 #define JME_WAIT_LINK_TIME 2000 /* 2000ms */
1672 static void
1673 jme_wait_link(struct jme_adapter *jme)
1674 {
1675         u32 phylink, to = JME_WAIT_LINK_TIME;
1676
1677         mdelay(1000);
1678         phylink = jme_linkstat_from_phy(jme);
1679         while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) {
1680                 mdelay(10);
1681                 phylink = jme_linkstat_from_phy(jme);
1682         }
1683 }
1684 #endif
1685
1686 static inline void
1687 jme_phy_off(struct jme_adapter *jme)
1688 {
1689         jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN);
1690 }
1691
1692 static int
1693 jme_close(struct net_device *netdev)
1694 {
1695         struct jme_adapter *jme = netdev_priv(netdev);
1696
1697         netif_stop_queue(netdev);
1698         netif_carrier_off(netdev);
1699
1700         jme_stop_irq(jme);
1701         jme_free_irq(jme);
1702
1703         JME_NAPI_DISABLE(jme);
1704
1705         tasklet_disable(&jme->linkch_task);
1706         tasklet_disable(&jme->txclean_task);
1707         tasklet_disable(&jme->rxclean_task);
1708         tasklet_disable(&jme->rxempty_task);
1709
1710         jme_reset_ghc_speed(jme);
1711         jme_disable_rx_engine(jme);
1712         jme_disable_tx_engine(jme);
1713         jme_reset_mac_processor(jme);
1714         jme_free_rx_resources(jme);
1715         jme_free_tx_resources(jme);
1716         jme->phylink = 0;
1717         jme_phy_off(jme);
1718
1719         return 0;
1720 }
1721
1722 static int
1723 jme_alloc_txdesc(struct jme_adapter *jme,
1724                         struct sk_buff *skb)
1725 {
1726         struct jme_ring *txring = &(jme->txring[0]);
1727         int idx, nr_alloc, mask = jme->tx_ring_mask;
1728
1729         idx = txring->next_to_use;
1730         nr_alloc = skb_shinfo(skb)->nr_frags + 2;
1731
1732         if (unlikely(atomic_read(&txring->nr_free) < nr_alloc))
1733                 return -1;
1734
1735         atomic_sub(nr_alloc, &txring->nr_free);
1736
1737         txring->next_to_use = (txring->next_to_use + nr_alloc) & mask;
1738
1739         return idx;
1740 }
1741
1742 static void
1743 jme_fill_tx_map(struct pci_dev *pdev,
1744                 struct txdesc *txdesc,
1745                 struct jme_buffer_info *txbi,
1746                 struct page *page,
1747                 u32 page_offset,
1748                 u32 len,
1749                 u8 hidma)
1750 {
1751         dma_addr_t dmaaddr;
1752
1753         dmaaddr = pci_map_page(pdev,
1754                                 page,
1755                                 page_offset,
1756                                 len,
1757                                 PCI_DMA_TODEVICE);
1758
1759         pci_dma_sync_single_for_device(pdev,
1760                                        dmaaddr,
1761                                        len,
1762                                        PCI_DMA_TODEVICE);
1763
1764         txdesc->dw[0] = 0;
1765         txdesc->dw[1] = 0;
1766         txdesc->desc2.flags     = TXFLAG_OWN;
1767         txdesc->desc2.flags     |= (hidma) ? TXFLAG_64BIT : 0;
1768         txdesc->desc2.datalen   = cpu_to_le16(len);
1769         txdesc->desc2.bufaddrh  = cpu_to_le32((__u64)dmaaddr >> 32);
1770         txdesc->desc2.bufaddrl  = cpu_to_le32(
1771                                         (__u64)dmaaddr & 0xFFFFFFFFUL);
1772
1773         txbi->mapping = dmaaddr;
1774         txbi->len = len;
1775 }
1776
1777 static void
1778 jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1779 {
1780         struct jme_ring *txring = &(jme->txring[0]);
1781         struct txdesc *txdesc = txring->desc, *ctxdesc;
1782         struct jme_buffer_info *txbi = txring->bufinf, *ctxbi;
1783         u8 hidma = jme->dev->features & NETIF_F_HIGHDMA;
1784         int i, nr_frags = skb_shinfo(skb)->nr_frags;
1785         int mask = jme->tx_ring_mask;
1786         struct skb_frag_struct *frag;
1787         u32 len;
1788
1789         for (i = 0 ; i < nr_frags ; ++i) {
1790                 frag = &skb_shinfo(skb)->frags[i];
1791                 ctxdesc = txdesc + ((idx + i + 2) & (mask));
1792                 ctxbi = txbi + ((idx + i + 2) & (mask));
1793
1794                 jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page,
1795                                  frag->page_offset, frag->size, hidma);
1796         }
1797
1798         len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len;
1799         ctxdesc = txdesc + ((idx + 1) & (mask));
1800         ctxbi = txbi + ((idx + 1) & (mask));
1801         jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data),
1802                         offset_in_page(skb->data), len, hidma);
1803
1804 }
1805
1806 static int
1807 jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb)
1808 {
1809         if (unlikely(
1810 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1811         skb_shinfo(skb)->tso_size
1812 #else
1813         skb_shinfo(skb)->gso_size
1814 #endif
1815                         && skb_header_cloned(skb) &&
1816                         pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) {
1817                 dev_kfree_skb(skb);
1818                 return -1;
1819         }
1820
1821         return 0;
1822 }
1823
1824 static int
1825 jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags)
1826 {
1827 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17)
1828         *mss = cpu_to_le16(skb_shinfo(skb)->tso_size << TXDESC_MSS_SHIFT);
1829 #else
1830         *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT);
1831 #endif
1832         if (*mss) {
1833                 *flags |= TXFLAG_LSEN;
1834
1835                 if (skb->protocol == htons(ETH_P_IP)) {
1836                         struct iphdr *iph = ip_hdr(skb);
1837
1838                         iph->check = 0;
1839                         tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
1840                                                                 iph->daddr, 0,
1841                                                                 IPPROTO_TCP,
1842                                                                 0);
1843                 } else {
1844                         struct ipv6hdr *ip6h = ipv6_hdr(skb);
1845
1846                         tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr,
1847                                                                 &ip6h->daddr, 0,
1848                                                                 IPPROTO_TCP,
1849                                                                 0);
1850                 }
1851
1852                 return 0;
1853         }
1854
1855         return 1;
1856 }
1857
1858 static void
1859 jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags)
1860 {
1861 #ifdef CHECKSUM_PARTIAL
1862         if (skb->ip_summed == CHECKSUM_PARTIAL)
1863 #else
1864         if (skb->ip_summed == CHECKSUM_HW)
1865 #endif
1866         {
1867                 u8 ip_proto;
1868
1869 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
1870                 if (skb->protocol == htons(ETH_P_IP))
1871                         ip_proto = ip_hdr(skb)->protocol;
1872                 else if (skb->protocol == htons(ETH_P_IPV6))
1873                         ip_proto = ipv6_hdr(skb)->nexthdr;
1874                 else
1875                         ip_proto = 0;
1876 #else
1877                 switch (skb->protocol) {
1878                 case htons(ETH_P_IP):
1879                         ip_proto = ip_hdr(skb)->protocol;
1880                         break;
1881                 case htons(ETH_P_IPV6):
1882                         ip_proto = ipv6_hdr(skb)->nexthdr;
1883                         break;
1884                 default:
1885                         ip_proto = 0;
1886                         break;
1887                 }
1888 #endif
1889
1890                 switch (ip_proto) {
1891                 case IPPROTO_TCP:
1892                         *flags |= TXFLAG_TCPCS;
1893                         break;
1894                 case IPPROTO_UDP:
1895                         *flags |= TXFLAG_UDPCS;
1896                         break;
1897                 default:
1898                         netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n");
1899                         break;
1900                 }
1901         }
1902 }
1903
1904 static inline void
1905 jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags)
1906 {
1907         if (vlan_tx_tag_present(skb)) {
1908                 *flags |= TXFLAG_TAGON;
1909                 *vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1910         }
1911 }
1912
1913 static int
1914 jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx)
1915 {
1916         struct jme_ring *txring = &(jme->txring[0]);
1917         struct txdesc *txdesc;
1918         struct jme_buffer_info *txbi;
1919         u8 flags;
1920
1921         txdesc = (struct txdesc *)txring->desc + idx;
1922         txbi = txring->bufinf + idx;
1923
1924         txdesc->dw[0] = 0;
1925         txdesc->dw[1] = 0;
1926         txdesc->dw[2] = 0;
1927         txdesc->dw[3] = 0;
1928         txdesc->desc1.pktsize = cpu_to_le16(skb->len);
1929         /*
1930          * Set OWN bit at final.
1931          * When kernel transmit faster than NIC.
1932          * And NIC trying to send this descriptor before we tell
1933          * it to start sending this TX queue.
1934          * Other fields are already filled correctly.
1935          */
1936         wmb();
1937         flags = TXFLAG_OWN | TXFLAG_INT;
1938         /*
1939          * Set checksum flags while not tso
1940          */
1941         if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags))
1942                 jme_tx_csum(jme, skb, &flags);
1943         jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags);
1944         jme_map_tx_skb(jme, skb, idx);
1945         txdesc->desc1.flags = flags;
1946         /*
1947          * Set tx buffer info after telling NIC to send
1948          * For better tx_clean timing
1949          */
1950         wmb();
1951         txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2;
1952         txbi->skb = skb;
1953         txbi->len = skb->len;
1954         txbi->start_xmit = jiffies;
1955         if (!txbi->start_xmit)
1956                 txbi->start_xmit = (0UL-1);
1957
1958         return 0;
1959 }
1960
1961 static void
1962 jme_stop_queue_if_full(struct jme_adapter *jme)
1963 {
1964         struct jme_ring *txring = &(jme->txring[0]);
1965         struct jme_buffer_info *txbi = txring->bufinf;
1966         int idx = atomic_read(&txring->next_to_clean);
1967
1968         txbi += idx;
1969
1970         smp_wmb();
1971         if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) {
1972                 netif_stop_queue(jme->dev);
1973                 netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n");
1974                 smp_wmb();
1975                 if (atomic_read(&txring->nr_free)
1976                         >= (jme->tx_wake_threshold)) {
1977                         netif_wake_queue(jme->dev);
1978                         netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n");
1979                 }
1980         }
1981
1982         if (unlikely(txbi->start_xmit &&
1983                         (jiffies - txbi->start_xmit) >= TX_TIMEOUT &&
1984                         txbi->skb)) {
1985                 netif_stop_queue(jme->dev);
1986                 netif_info(jme, tx_queued, jme->dev, "TX Queue Stopped %d@%lu\n", idx, jiffies);
1987         }
1988 }
1989
1990 /*
1991  * This function is already protected by netif_tx_lock()
1992  */
1993
1994 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,31)
1995 static int
1996 #else
1997 static netdev_tx_t
1998 #endif
1999 jme_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2000 {
2001         struct jme_adapter *jme = netdev_priv(netdev);
2002         int idx;
2003
2004         if (unlikely(jme_expand_header(jme, skb))) {
2005                 ++(NET_STAT(jme).tx_dropped);
2006                 return NETDEV_TX_OK;
2007         }
2008
2009         idx = jme_alloc_txdesc(jme, skb);
2010
2011         if (unlikely(idx < 0)) {
2012                 netif_stop_queue(netdev);
2013                 netif_err(jme, tx_err, jme->dev,
2014                           "BUG! Tx ring full when queue awake!\n");
2015
2016                 return NETDEV_TX_BUSY;
2017         }
2018
2019         jme_fill_tx_desc(jme, skb, idx);
2020
2021         jwrite32(jme, JME_TXCS, jme->reg_txcs |
2022                                 TXCS_SELECT_QUEUE0 |
2023                                 TXCS_QUEUE0S |
2024                                 TXCS_ENABLE);
2025 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,29)
2026         netdev->trans_start = jiffies;
2027 #endif
2028
2029         tx_dbg(jme, "xmit: %d+%d@%lu\n",
2030                idx, skb_shinfo(skb)->nr_frags + 2, jiffies);
2031         jme_stop_queue_if_full(jme);
2032
2033         return NETDEV_TX_OK;
2034 }
2035
2036 static int
2037 jme_set_macaddr(struct net_device *netdev, void *p)
2038 {
2039         struct jme_adapter *jme = netdev_priv(netdev);
2040         struct sockaddr *addr = p;
2041         u32 val;
2042
2043         if (netif_running(netdev))
2044                 return -EBUSY;
2045
2046         spin_lock_bh(&jme->macaddr_lock);
2047         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2048
2049         val = (addr->sa_data[3] & 0xff) << 24 |
2050               (addr->sa_data[2] & 0xff) << 16 |
2051               (addr->sa_data[1] & 0xff) <<  8 |
2052               (addr->sa_data[0] & 0xff);
2053         jwrite32(jme, JME_RXUMA_LO, val);
2054         val = (addr->sa_data[5] & 0xff) << 8 |
2055               (addr->sa_data[4] & 0xff);
2056         jwrite32(jme, JME_RXUMA_HI, val);
2057         spin_unlock_bh(&jme->macaddr_lock);
2058
2059         return 0;
2060 }
2061
2062 static void
2063 jme_set_multi(struct net_device *netdev)
2064 {
2065         struct jme_adapter *jme = netdev_priv(netdev);
2066         u32 mc_hash[2] = {};
2067 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2068         int i;
2069 #endif
2070
2071         spin_lock_bh(&jme->rxmcs_lock);
2072
2073         jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME;
2074
2075         if (netdev->flags & IFF_PROMISC) {
2076                 jme->reg_rxmcs |= RXMCS_ALLFRAME;
2077         } else if (netdev->flags & IFF_ALLMULTI) {
2078                 jme->reg_rxmcs |= RXMCS_ALLMULFRAME;
2079         } else if (netdev->flags & IFF_MULTICAST) {
2080 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2081                 struct dev_mc_list *mclist;
2082 #else
2083                 struct netdev_hw_addr *ha;
2084 #endif
2085                 int bit_nr;
2086
2087                 jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED;
2088 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,33)
2089                 for (i = 0, mclist = netdev->mc_list;
2090                         mclist && i < netdev->mc_count;
2091                         ++i, mclist = mclist->next) {
2092 #elif LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2093                 netdev_for_each_mc_addr(mclist, netdev) {
2094 #else
2095                 netdev_for_each_mc_addr(ha, netdev) {
2096 #endif
2097 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,34)
2098                         bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) & 0x3F;
2099 #else
2100                         bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F;
2101 #endif
2102                         mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F);
2103                 }
2104
2105                 jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]);
2106                 jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]);
2107         }
2108
2109         wmb();
2110         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2111
2112         spin_unlock_bh(&jme->rxmcs_lock);
2113 }
2114
2115 static int
2116 jme_change_mtu(struct net_device *netdev, int new_mtu)
2117 {
2118         struct jme_adapter *jme = netdev_priv(netdev);
2119
2120         if (new_mtu == jme->old_mtu)
2121                 return 0;
2122
2123         if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) ||
2124                 ((new_mtu) < IPV6_MIN_MTU))
2125                 return -EINVAL;
2126
2127         if (new_mtu > 4000) {
2128                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2129                 jme->reg_rxcs |= RXCS_FIFOTHNP_64QW;
2130                 jme_restart_rx_engine(jme);
2131         } else {
2132                 jme->reg_rxcs &= ~RXCS_FIFOTHNP;
2133                 jme->reg_rxcs |= RXCS_FIFOTHNP_128QW;
2134                 jme_restart_rx_engine(jme);
2135         }
2136
2137         if (new_mtu > 1900) {
2138                 netdev->features &= ~(NETIF_F_HW_CSUM |
2139                                 NETIF_F_TSO
2140 #ifdef NETIF_F_TSO6
2141                                 | NETIF_F_TSO6
2142 #endif
2143                                 );
2144         } else {
2145                 if (test_bit(JME_FLAG_TXCSUM, &jme->flags))
2146                         netdev->features |= NETIF_F_HW_CSUM;
2147                 if (test_bit(JME_FLAG_TSO, &jme->flags))
2148                         netdev->features |= NETIF_F_TSO
2149 #ifdef NETIF_F_TSO6
2150                                 | NETIF_F_TSO6
2151 #endif
2152                                 ;
2153         }
2154
2155         netdev->mtu = new_mtu;
2156         jme_reset_link(jme);
2157
2158         return 0;
2159 }
2160
2161 static void
2162 jme_tx_timeout(struct net_device *netdev)
2163 {
2164         struct jme_adapter *jme = netdev_priv(netdev);
2165
2166         jme->phylink = 0;
2167         jme_reset_phy_processor(jme);
2168         if (test_bit(JME_FLAG_SSET, &jme->flags))
2169                 jme_set_settings(netdev, &jme->old_ecmd);
2170
2171         /*
2172          * Force to Reset the link again
2173          */
2174         jme_reset_link(jme);
2175 }
2176
2177 static inline void jme_pause_rx(struct jme_adapter *jme)
2178 {
2179         atomic_dec(&jme->link_changing);
2180
2181         jme_set_rx_pcc(jme, PCC_OFF);
2182         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2183                 JME_NAPI_DISABLE(jme);
2184         } else {
2185                 tasklet_disable(&jme->rxclean_task);
2186                 tasklet_disable(&jme->rxempty_task);
2187         }
2188 }
2189
2190 static inline void jme_resume_rx(struct jme_adapter *jme)
2191 {
2192         struct dynpcc_info *dpi = &(jme->dpi);
2193
2194         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2195                 JME_NAPI_ENABLE(jme);
2196         } else {
2197                 tasklet_hi_enable(&jme->rxclean_task);
2198                 tasklet_hi_enable(&jme->rxempty_task);
2199         }
2200         dpi->cur                = PCC_P1;
2201         dpi->attempt            = PCC_P1;
2202         dpi->cnt                = 0;
2203         jme_set_rx_pcc(jme, PCC_P1);
2204
2205         atomic_inc(&jme->link_changing);
2206 }
2207
2208 static void
2209 jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2210 {
2211         struct jme_adapter *jme = netdev_priv(netdev);
2212
2213         jme_pause_rx(jme);
2214         jme->vlgrp = grp;
2215         jme_resume_rx(jme);
2216 }
2217
2218 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2219 static void
2220 jme_vlan_rx_kill_vid(struct net_device *netdev, unsigned short vid)
2221 {
2222         struct jme_adapter *jme = netdev_priv(netdev);
2223
2224         if(jme->vlgrp) {
2225                 jme_pause_rx(jme);
2226 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,20)
2227                 jme->vlgrp->vlan_devices[vid] = NULL;
2228 #else
2229                 vlan_group_set_device(jme->vlgrp, vid, NULL);
2230 #endif
2231                 jme_resume_rx(jme);
2232         }
2233 }
2234 #endif
2235
2236 static void
2237 jme_get_drvinfo(struct net_device *netdev,
2238                      struct ethtool_drvinfo *info)
2239 {
2240         struct jme_adapter *jme = netdev_priv(netdev);
2241
2242         strcpy(info->driver, DRV_NAME);
2243         strcpy(info->version, DRV_VERSION);
2244         strcpy(info->bus_info, pci_name(jme->pdev));
2245 }
2246
2247 static int
2248 jme_get_regs_len(struct net_device *netdev)
2249 {
2250         return JME_REG_LEN;
2251 }
2252
2253 static void
2254 mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len)
2255 {
2256         int i;
2257
2258         for (i = 0 ; i < len ; i += 4)
2259                 p[i >> 2] = jread32(jme, reg + i);
2260 }
2261
2262 static void
2263 mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr)
2264 {
2265         int i;
2266         u16 *p16 = (u16 *)p;
2267
2268         for (i = 0 ; i < reg_nr ; ++i)
2269                 p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i);
2270 }
2271
2272 static void
2273 jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
2274 {
2275         struct jme_adapter *jme = netdev_priv(netdev);
2276         u32 *p32 = (u32 *)p;
2277
2278         memset(p, 0xFF, JME_REG_LEN);
2279
2280         regs->version = 1;
2281         mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN);
2282
2283         p32 += 0x100 >> 2;
2284         mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN);
2285
2286         p32 += 0x100 >> 2;
2287         mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN);
2288
2289         p32 += 0x100 >> 2;
2290         mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN);
2291
2292         p32 += 0x100 >> 2;
2293         mdio_memcpy(jme, p32, JME_PHY_REG_NR);
2294 }
2295
2296 static int
2297 jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2298 {
2299         struct jme_adapter *jme = netdev_priv(netdev);
2300
2301         ecmd->tx_coalesce_usecs = PCC_TX_TO;
2302         ecmd->tx_max_coalesced_frames = PCC_TX_CNT;
2303
2304         if (test_bit(JME_FLAG_POLL, &jme->flags)) {
2305                 ecmd->use_adaptive_rx_coalesce = false;
2306                 ecmd->rx_coalesce_usecs = 0;
2307                 ecmd->rx_max_coalesced_frames = 0;
2308                 return 0;
2309         }
2310
2311         ecmd->use_adaptive_rx_coalesce = true;
2312
2313         switch (jme->dpi.cur) {
2314         case PCC_P1:
2315                 ecmd->rx_coalesce_usecs = PCC_P1_TO;
2316                 ecmd->rx_max_coalesced_frames = PCC_P1_CNT;
2317                 break;
2318         case PCC_P2:
2319                 ecmd->rx_coalesce_usecs = PCC_P2_TO;
2320                 ecmd->rx_max_coalesced_frames = PCC_P2_CNT;
2321                 break;
2322         case PCC_P3:
2323                 ecmd->rx_coalesce_usecs = PCC_P3_TO;
2324                 ecmd->rx_max_coalesced_frames = PCC_P3_CNT;
2325                 break;
2326         default:
2327                 break;
2328         }
2329
2330         return 0;
2331 }
2332
2333 static int
2334 jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd)
2335 {
2336         struct jme_adapter *jme = netdev_priv(netdev);
2337         struct dynpcc_info *dpi = &(jme->dpi);
2338
2339         if (netif_running(netdev))
2340                 return -EBUSY;
2341
2342         if (ecmd->use_adaptive_rx_coalesce &&
2343             test_bit(JME_FLAG_POLL, &jme->flags)) {
2344                 clear_bit(JME_FLAG_POLL, &jme->flags);
2345                 jme->jme_rx = netif_rx;
2346                 jme->jme_vlan_rx = vlan_hwaccel_rx;
2347                 dpi->cur                = PCC_P1;
2348                 dpi->attempt            = PCC_P1;
2349                 dpi->cnt                = 0;
2350                 jme_set_rx_pcc(jme, PCC_P1);
2351                 jme_interrupt_mode(jme);
2352         } else if (!(ecmd->use_adaptive_rx_coalesce) &&
2353                    !(test_bit(JME_FLAG_POLL, &jme->flags))) {
2354                 set_bit(JME_FLAG_POLL, &jme->flags);
2355                 jme->jme_rx = netif_receive_skb;
2356                 jme->jme_vlan_rx = vlan_hwaccel_receive_skb;
2357                 jme_interrupt_mode(jme);
2358         }
2359
2360         return 0;
2361 }
2362
2363 static void
2364 jme_get_pauseparam(struct net_device *netdev,
2365                         struct ethtool_pauseparam *ecmd)
2366 {
2367         struct jme_adapter *jme = netdev_priv(netdev);
2368         u32 val;
2369
2370         ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0;
2371         ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0;
2372
2373         spin_lock_bh(&jme->phy_lock);
2374         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2375         spin_unlock_bh(&jme->phy_lock);
2376
2377         ecmd->autoneg =
2378                 (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0;
2379 }
2380
2381 static int
2382 jme_set_pauseparam(struct net_device *netdev,
2383                         struct ethtool_pauseparam *ecmd)
2384 {
2385         struct jme_adapter *jme = netdev_priv(netdev);
2386         u32 val;
2387
2388         if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^
2389                 (ecmd->tx_pause != 0)) {
2390
2391                 if (ecmd->tx_pause)
2392                         jme->reg_txpfc |= TXPFC_PF_EN;
2393                 else
2394                         jme->reg_txpfc &= ~TXPFC_PF_EN;
2395
2396                 jwrite32(jme, JME_TXPFC, jme->reg_txpfc);
2397         }
2398
2399         spin_lock_bh(&jme->rxmcs_lock);
2400         if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^
2401                 (ecmd->rx_pause != 0)) {
2402
2403                 if (ecmd->rx_pause)
2404                         jme->reg_rxmcs |= RXMCS_FLOWCTRL;
2405                 else
2406                         jme->reg_rxmcs &= ~RXMCS_FLOWCTRL;
2407
2408                 jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2409         }
2410         spin_unlock_bh(&jme->rxmcs_lock);
2411
2412         spin_lock_bh(&jme->phy_lock);
2413         val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE);
2414         if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^
2415                 (ecmd->autoneg != 0)) {
2416
2417                 if (ecmd->autoneg)
2418                         val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2419                 else
2420                         val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
2421
2422                 jme_mdio_write(jme->dev, jme->mii_if.phy_id,
2423                                 MII_ADVERTISE, val);
2424         }
2425         spin_unlock_bh(&jme->phy_lock);
2426
2427         return 0;
2428 }
2429
2430 static void
2431 jme_get_wol(struct net_device *netdev,
2432                 struct ethtool_wolinfo *wol)
2433 {
2434         struct jme_adapter *jme = netdev_priv(netdev);
2435
2436         wol->supported = WAKE_MAGIC | WAKE_PHY;
2437
2438         wol->wolopts = 0;
2439
2440         if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
2441                 wol->wolopts |= WAKE_PHY;
2442
2443         if (jme->reg_pmcs & PMCS_MFEN)
2444                 wol->wolopts |= WAKE_MAGIC;
2445
2446 }
2447
2448 static int
2449 jme_set_wol(struct net_device *netdev,
2450                 struct ethtool_wolinfo *wol)
2451 {
2452         struct jme_adapter *jme = netdev_priv(netdev);
2453
2454         if (wol->wolopts & (WAKE_MAGICSECURE |
2455                                 WAKE_UCAST |
2456                                 WAKE_MCAST |
2457                                 WAKE_BCAST |
2458                                 WAKE_ARP))
2459                 return -EOPNOTSUPP;
2460
2461         jme->reg_pmcs = 0;
2462
2463         if (wol->wolopts & WAKE_PHY)
2464                 jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN;
2465
2466         if (wol->wolopts & WAKE_MAGIC)
2467                 jme->reg_pmcs |= PMCS_MFEN;
2468
2469         jwrite32(jme, JME_PMCS, jme->reg_pmcs);
2470
2471         return 0;
2472 }
2473
2474 static int
2475 jme_get_settings(struct net_device *netdev,
2476                      struct ethtool_cmd *ecmd)
2477 {
2478         struct jme_adapter *jme = netdev_priv(netdev);
2479         int rc;
2480
2481         spin_lock_bh(&jme->phy_lock);
2482         rc = mii_ethtool_gset(&(jme->mii_if), ecmd);
2483         spin_unlock_bh(&jme->phy_lock);
2484         return rc;
2485 }
2486
2487 static int
2488 jme_set_settings(struct net_device *netdev,
2489                      struct ethtool_cmd *ecmd)
2490 {
2491         struct jme_adapter *jme = netdev_priv(netdev);
2492         int rc, fdc = 0;
2493
2494         if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE)
2495                 return -EINVAL;
2496
2497         /*
2498          * Check If user changed duplex only while force_media.
2499          * Hardware would not generate link change interrupt.
2500          */
2501         if (jme->mii_if.force_media &&
2502         ecmd->autoneg != AUTONEG_ENABLE &&
2503         (jme->mii_if.full_duplex != ecmd->duplex))
2504                 fdc = 1;
2505
2506         spin_lock_bh(&jme->phy_lock);
2507         rc = mii_ethtool_sset(&(jme->mii_if), ecmd);
2508         spin_unlock_bh(&jme->phy_lock);
2509
2510         if (!rc) {
2511                 if (fdc)
2512                         jme_reset_link(jme);
2513                 jme->old_ecmd = *ecmd;
2514                 set_bit(JME_FLAG_SSET, &jme->flags);
2515         }
2516
2517         return rc;
2518 }
2519
2520 static int
2521 jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
2522 {
2523         int rc;
2524         struct jme_adapter *jme = netdev_priv(netdev);
2525         struct mii_ioctl_data *mii_data = if_mii(rq);
2526         unsigned int duplex_chg;
2527
2528         if (cmd == SIOCSMIIREG) {
2529                 u16 val = mii_data->val_in;
2530                 if (!(val & (BMCR_RESET|BMCR_ANENABLE)) &&
2531                     (val & BMCR_SPEED1000))
2532                         return -EINVAL;
2533         }
2534
2535         spin_lock_bh(&jme->phy_lock);
2536         rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg);
2537         spin_unlock_bh(&jme->phy_lock);
2538
2539         if (!rc && (cmd == SIOCSMIIREG)) {
2540                 if (duplex_chg)
2541                         jme_reset_link(jme);
2542                 jme_get_settings(netdev, &jme->old_ecmd);
2543                 set_bit(JME_FLAG_SSET, &jme->flags);
2544         }
2545
2546         return rc;
2547 }
2548
2549 static u32
2550 jme_get_link(struct net_device *netdev)
2551 {
2552         struct jme_adapter *jme = netdev_priv(netdev);
2553         return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP;
2554 }
2555
2556 static u32
2557 jme_get_msglevel(struct net_device *netdev)
2558 {
2559         struct jme_adapter *jme = netdev_priv(netdev);
2560         return jme->msg_enable;
2561 }
2562
2563 static void
2564 jme_set_msglevel(struct net_device *netdev, u32 value)
2565 {
2566         struct jme_adapter *jme = netdev_priv(netdev);
2567         jme->msg_enable = value;
2568 }
2569
2570 static u32
2571 jme_get_rx_csum(struct net_device *netdev)
2572 {
2573         struct jme_adapter *jme = netdev_priv(netdev);
2574         return jme->reg_rxmcs & RXMCS_CHECKSUM;
2575 }
2576
2577 static int
2578 jme_set_rx_csum(struct net_device *netdev, u32 on)
2579 {
2580         struct jme_adapter *jme = netdev_priv(netdev);
2581
2582         spin_lock_bh(&jme->rxmcs_lock);
2583         if (on)
2584                 jme->reg_rxmcs |= RXMCS_CHECKSUM;
2585         else
2586                 jme->reg_rxmcs &= ~RXMCS_CHECKSUM;
2587         jwrite32(jme, JME_RXMCS, jme->reg_rxmcs);
2588         spin_unlock_bh(&jme->rxmcs_lock);
2589
2590         return 0;
2591 }
2592
2593 static int
2594 jme_set_tx_csum(struct net_device *netdev, u32 on)
2595 {
2596         struct jme_adapter *jme = netdev_priv(netdev);
2597
2598         if (on) {
2599                 set_bit(JME_FLAG_TXCSUM, &jme->flags);
2600                 if (netdev->mtu <= 1900)
2601                         netdev->features |= NETIF_F_HW_CSUM;
2602         } else {
2603                 clear_bit(JME_FLAG_TXCSUM, &jme->flags);
2604                 netdev->features &= ~NETIF_F_HW_CSUM;
2605         }
2606
2607         return 0;
2608 }
2609
2610 static int
2611 jme_set_tso(struct net_device *netdev, u32 on)
2612 {
2613         struct jme_adapter *jme = netdev_priv(netdev);
2614
2615         if (on) {
2616                 set_bit(JME_FLAG_TSO, &jme->flags);
2617                 if (netdev->mtu <= 1900)
2618                         netdev->features |= NETIF_F_TSO
2619 #ifdef NETIF_F_TSO6
2620                                 | NETIF_F_TSO6
2621 #endif
2622                                 ;
2623         } else {
2624                 clear_bit(JME_FLAG_TSO, &jme->flags);
2625                 netdev->features &= ~(NETIF_F_TSO
2626 #ifdef NETIF_F_TSO6
2627                                 | NETIF_F_TSO6
2628 #endif
2629                                 );
2630         }
2631
2632         return 0;
2633 }
2634
2635 static int
2636 jme_nway_reset(struct net_device *netdev)
2637 {
2638         struct jme_adapter *jme = netdev_priv(netdev);
2639         jme_restart_an(jme);
2640         return 0;
2641 }
2642
2643 static u8
2644 jme_smb_read(struct jme_adapter *jme, unsigned int addr)
2645 {
2646         u32 val;
2647         int to;
2648
2649         val = jread32(jme, JME_SMBCSR);
2650         to = JME_SMB_BUSY_TIMEOUT;
2651         while ((val & SMBCSR_BUSY) && --to) {
2652                 msleep(1);
2653                 val = jread32(jme, JME_SMBCSR);
2654         }
2655         if (!to) {
2656                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2657                 return 0xFF;
2658         }
2659
2660         jwrite32(jme, JME_SMBINTF,
2661                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2662                 SMBINTF_HWRWN_READ |
2663                 SMBINTF_HWCMD);
2664
2665         val = jread32(jme, JME_SMBINTF);
2666         to = JME_SMB_BUSY_TIMEOUT;
2667         while ((val & SMBINTF_HWCMD) && --to) {
2668                 msleep(1);
2669                 val = jread32(jme, JME_SMBINTF);
2670         }
2671         if (!to) {
2672                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2673                 return 0xFF;
2674         }
2675
2676         return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT;
2677 }
2678
2679 static void
2680 jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data)
2681 {
2682         u32 val;
2683         int to;
2684
2685         val = jread32(jme, JME_SMBCSR);
2686         to = JME_SMB_BUSY_TIMEOUT;
2687         while ((val & SMBCSR_BUSY) && --to) {
2688                 msleep(1);
2689                 val = jread32(jme, JME_SMBCSR);
2690         }
2691         if (!to) {
2692                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2693                 return;
2694         }
2695
2696         jwrite32(jme, JME_SMBINTF,
2697                 ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) |
2698                 ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) |
2699                 SMBINTF_HWRWN_WRITE |
2700                 SMBINTF_HWCMD);
2701
2702         val = jread32(jme, JME_SMBINTF);
2703         to = JME_SMB_BUSY_TIMEOUT;
2704         while ((val & SMBINTF_HWCMD) && --to) {
2705                 msleep(1);
2706                 val = jread32(jme, JME_SMBINTF);
2707         }
2708         if (!to) {
2709                 netif_err(jme, hw, jme->dev, "SMB Bus Busy\n");
2710                 return;
2711         }
2712
2713         mdelay(2);
2714 }
2715
2716 static int
2717 jme_get_eeprom_len(struct net_device *netdev)
2718 {
2719         struct jme_adapter *jme = netdev_priv(netdev);
2720         u32 val;
2721         val = jread32(jme, JME_SMBCSR);
2722         return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0;
2723 }
2724
2725 static int
2726 jme_get_eeprom(struct net_device *netdev,
2727                 struct ethtool_eeprom *eeprom, u8 *data)
2728 {
2729         struct jme_adapter *jme = netdev_priv(netdev);
2730         int i, offset = eeprom->offset, len = eeprom->len;
2731
2732         /*
2733          * ethtool will check the boundary for us
2734          */
2735         eeprom->magic = JME_EEPROM_MAGIC;
2736         for (i = 0 ; i < len ; ++i)
2737                 data[i] = jme_smb_read(jme, i + offset);
2738
2739         return 0;
2740 }
2741
2742 static int
2743 jme_set_eeprom(struct net_device *netdev,
2744                 struct ethtool_eeprom *eeprom, u8 *data)
2745 {
2746         struct jme_adapter *jme = netdev_priv(netdev);
2747         int i, offset = eeprom->offset, len = eeprom->len;
2748
2749         if (eeprom->magic != JME_EEPROM_MAGIC)
2750                 return -EINVAL;
2751
2752         /*
2753          * ethtool will check the boundary for us
2754          */
2755         for (i = 0 ; i < len ; ++i)
2756                 jme_smb_write(jme, i + offset, data[i]);
2757
2758         return 0;
2759 }
2760
2761 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,18)
2762 static struct ethtool_ops jme_ethtool_ops = {
2763 #else
2764 static const struct ethtool_ops jme_ethtool_ops = {
2765 #endif
2766         .get_drvinfo            = jme_get_drvinfo,
2767         .get_regs_len           = jme_get_regs_len,
2768         .get_regs               = jme_get_regs,
2769         .get_coalesce           = jme_get_coalesce,
2770         .set_coalesce           = jme_set_coalesce,
2771         .get_pauseparam         = jme_get_pauseparam,
2772         .set_pauseparam         = jme_set_pauseparam,
2773         .get_wol                = jme_get_wol,
2774         .set_wol                = jme_set_wol,
2775         .get_settings           = jme_get_settings,
2776         .set_settings           = jme_set_settings,
2777         .get_link               = jme_get_link,
2778         .get_msglevel           = jme_get_msglevel,
2779         .set_msglevel           = jme_set_msglevel,
2780         .get_rx_csum            = jme_get_rx_csum,
2781         .set_rx_csum            = jme_set_rx_csum,
2782         .set_tx_csum            = jme_set_tx_csum,
2783         .set_tso                = jme_set_tso,
2784         .set_sg                 = ethtool_op_set_sg,
2785         .nway_reset             = jme_nway_reset,
2786         .get_eeprom_len         = jme_get_eeprom_len,
2787         .get_eeprom             = jme_get_eeprom,
2788         .set_eeprom             = jme_set_eeprom,
2789 };
2790
2791 static int
2792 jme_pci_dma64(struct pci_dev *pdev)
2793 {
2794         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2795 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2796             !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))
2797 #else
2798             !pci_set_dma_mask(pdev, DMA_64BIT_MASK)
2799 #endif
2800            )
2801 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2802                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)))
2803 #else
2804                 if (!pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
2805 #endif
2806                         return 1;
2807
2808         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 &&
2809 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2810             !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))
2811 #else
2812             !pci_set_dma_mask(pdev, DMA_40BIT_MASK)
2813 #endif
2814            )
2815 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2816                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)))
2817 #else
2818                 if (!pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK))
2819 #endif
2820                         return 1;
2821
2822 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2823         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
2824                 if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
2825 #else
2826         if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK))
2827                 if (!pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))
2828 #endif
2829                         return 0;
2830
2831         return -1;
2832 }
2833
2834 static inline void
2835 jme_phy_init(struct jme_adapter *jme)
2836 {
2837         u16 reg26;
2838
2839         reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26);
2840         jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000);
2841 }
2842
2843 static inline void
2844 jme_check_hw_ver(struct jme_adapter *jme)
2845 {
2846         u32 chipmode;
2847
2848         chipmode = jread32(jme, JME_CHIPMODE);
2849
2850         jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT;
2851         jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT;
2852 }
2853
2854 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2855 static const struct net_device_ops jme_netdev_ops = {
2856         .ndo_open               = jme_open,
2857         .ndo_stop               = jme_close,
2858         .ndo_validate_addr      = eth_validate_addr,
2859         .ndo_do_ioctl           = jme_ioctl,
2860         .ndo_start_xmit         = jme_start_xmit,
2861         .ndo_set_mac_address    = jme_set_macaddr,
2862         .ndo_set_multicast_list = jme_set_multi,
2863         .ndo_change_mtu         = jme_change_mtu,
2864         .ndo_tx_timeout         = jme_tx_timeout,
2865         .ndo_vlan_rx_register   = jme_vlan_rx_register,
2866 };
2867 #endif
2868
2869 static int __devinit
2870 jme_init_one(struct pci_dev *pdev,
2871              const struct pci_device_id *ent)
2872 {
2873         int rc = 0, using_dac, i;
2874         struct net_device *netdev;
2875         struct jme_adapter *jme;
2876         u16 bmcr, bmsr;
2877         u32 apmc;
2878
2879         /*
2880          * set up PCI device basics
2881          */
2882         rc = pci_enable_device(pdev);
2883         if (rc) {
2884                 pr_err("Cannot enable PCI device\n");
2885                 goto err_out;
2886         }
2887
2888         using_dac = jme_pci_dma64(pdev);
2889         if (using_dac < 0) {
2890                 pr_err("Cannot set PCI DMA Mask\n");
2891                 rc = -EIO;
2892                 goto err_out_disable_pdev;
2893         }
2894
2895         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
2896                 pr_err("No PCI resource region found\n");
2897                 rc = -ENOMEM;
2898                 goto err_out_disable_pdev;
2899         }
2900
2901         rc = pci_request_regions(pdev, DRV_NAME);
2902         if (rc) {
2903                 pr_err("Cannot obtain PCI resource region\n");
2904                 goto err_out_disable_pdev;
2905         }
2906
2907         pci_set_master(pdev);
2908
2909         /*
2910          * alloc and init net device
2911          */
2912         netdev = alloc_etherdev(sizeof(*jme));
2913         if (!netdev) {
2914                 pr_err("Cannot allocate netdev structure\n");
2915                 rc = -ENOMEM;
2916                 goto err_out_release_regions;
2917         }
2918 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
2919         netdev->netdev_ops = &jme_netdev_ops;
2920 #else
2921         netdev->open                    = jme_open;
2922         netdev->stop                    = jme_close;
2923         netdev->do_ioctl                = jme_ioctl;
2924         netdev->hard_start_xmit         = jme_start_xmit;
2925         netdev->set_mac_address         = jme_set_macaddr;
2926         netdev->set_multicast_list      = jme_set_multi;
2927         netdev->change_mtu              = jme_change_mtu;
2928         netdev->tx_timeout              = jme_tx_timeout;
2929         netdev->vlan_rx_register        = jme_vlan_rx_register;
2930 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,21)
2931         netdev->vlan_rx_kill_vid        = jme_vlan_rx_kill_vid;
2932 #endif
2933         NETDEV_GET_STATS(netdev, &jme_get_stats);
2934 #endif
2935         netdev->ethtool_ops             = &jme_ethtool_ops;
2936         netdev->watchdog_timeo          = TX_TIMEOUT;
2937         netdev->features                =       NETIF_F_HW_CSUM |
2938                                                 NETIF_F_SG |
2939                                                 NETIF_F_TSO |
2940 #ifdef NETIF_F_TSO6
2941                                                 NETIF_F_TSO6 |
2942 #endif
2943                                                 NETIF_F_HW_VLAN_TX |
2944                                                 NETIF_F_HW_VLAN_RX;
2945         if (using_dac)
2946                 netdev->features        |=      NETIF_F_HIGHDMA;
2947
2948         SET_NETDEV_DEV(netdev, &pdev->dev);
2949         pci_set_drvdata(pdev, netdev);
2950
2951         /*
2952          * init adapter info
2953          */
2954         jme = netdev_priv(netdev);
2955         jme->pdev = pdev;
2956         jme->dev = netdev;
2957         jme->jme_rx = netif_rx;
2958         jme->jme_vlan_rx = vlan_hwaccel_rx;
2959         jme->old_mtu = netdev->mtu = 1500;
2960         jme->phylink = 0;
2961         jme->tx_ring_size = 1 << 10;
2962         jme->tx_ring_mask = jme->tx_ring_size - 1;
2963         jme->tx_wake_threshold = 1 << 9;
2964         jme->rx_ring_size = 1 << 9;
2965         jme->rx_ring_mask = jme->rx_ring_size - 1;
2966         jme->msg_enable = JME_DEF_MSG_ENABLE;
2967         jme->regs = ioremap(pci_resource_start(pdev, 0),
2968                              pci_resource_len(pdev, 0));
2969         if (!(jme->regs)) {
2970                 pr_err("Mapping PCI resource region error\n");
2971                 rc = -ENOMEM;
2972                 goto err_out_free_netdev;
2973         }
2974
2975         if (no_pseudohp) {
2976                 apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN;
2977                 jwrite32(jme, JME_APMC, apmc);
2978         } else if (force_pseudohp) {
2979                 apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN;
2980                 jwrite32(jme, JME_APMC, apmc);
2981         }
2982
2983         NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2)
2984
2985         spin_lock_init(&jme->phy_lock);
2986         spin_lock_init(&jme->macaddr_lock);
2987         spin_lock_init(&jme->rxmcs_lock);
2988
2989         atomic_set(&jme->link_changing, 1);
2990         atomic_set(&jme->rx_cleaning, 1);
2991         atomic_set(&jme->tx_cleaning, 1);
2992         atomic_set(&jme->rx_empty, 1);
2993
2994         tasklet_init(&jme->pcc_task,
2995                      jme_pcc_tasklet,
2996                      (unsigned long) jme);
2997         tasklet_init(&jme->linkch_task,
2998                      jme_link_change_tasklet,
2999                      (unsigned long) jme);
3000         tasklet_init(&jme->txclean_task,
3001                      jme_tx_clean_tasklet,
3002                      (unsigned long) jme);
3003         tasklet_init(&jme->rxclean_task,
3004                      jme_rx_clean_tasklet,
3005                      (unsigned long) jme);
3006         tasklet_init(&jme->rxempty_task,
3007                      jme_rx_empty_tasklet,
3008                      (unsigned long) jme);
3009         tasklet_disable_nosync(&jme->linkch_task);
3010         tasklet_disable_nosync(&jme->txclean_task);
3011         tasklet_disable_nosync(&jme->rxclean_task);
3012         tasklet_disable_nosync(&jme->rxempty_task);
3013         jme->dpi.cur = PCC_P1;
3014
3015         jme->reg_ghc = 0;
3016         jme->reg_rxcs = RXCS_DEFAULT;
3017         jme->reg_rxmcs = RXMCS_DEFAULT;
3018         jme->reg_txpfc = 0;
3019         jme->reg_pmcs = PMCS_MFEN;
3020         set_bit(JME_FLAG_TXCSUM, &jme->flags);
3021         set_bit(JME_FLAG_TSO, &jme->flags);
3022
3023         /*
3024          * Get Max Read Req Size from PCI Config Space
3025          */
3026         pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs);
3027         jme->mrrs &= PCI_DCSR_MRRS_MASK;
3028         switch (jme->mrrs) {
3029         case MRRS_128B:
3030                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B;
3031                 break;
3032         case MRRS_256B:
3033                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B;
3034                 break;
3035         default:
3036                 jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B;
3037                 break;
3038         }
3039
3040         /*
3041          * Must check before reset_mac_processor
3042          */
3043         jme_check_hw_ver(jme);
3044         jme->mii_if.dev = netdev;
3045         if (jme->fpgaver) {
3046                 jme->mii_if.phy_id = 0;
3047                 for (i = 1 ; i < 32 ; ++i) {
3048                         bmcr = jme_mdio_read(netdev, i, MII_BMCR);
3049                         bmsr = jme_mdio_read(netdev, i, MII_BMSR);
3050                         if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) {
3051                                 jme->mii_if.phy_id = i;
3052                                 break;
3053                         }
3054                 }
3055
3056                 if (!jme->mii_if.phy_id) {
3057                         rc = -EIO;
3058                         pr_err("Can not find phy_id\n");
3059                         goto err_out_unmap;
3060                 }
3061
3062                 jme->reg_ghc |= GHC_LINK_POLL;
3063         } else {
3064                 jme->mii_if.phy_id = 1;
3065         }
3066         if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250)
3067                 jme->mii_if.supports_gmii = true;
3068         else
3069                 jme->mii_if.supports_gmii = false;
3070         jme->mii_if.phy_id_mask = 0x1F;
3071         jme->mii_if.reg_num_mask = 0x1F;
3072         jme->mii_if.mdio_read = jme_mdio_read;
3073         jme->mii_if.mdio_write = jme_mdio_write;
3074
3075         jme_clear_pm(jme);
3076         jme_set_phyfifoa(jme);
3077         pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->rev);
3078         if (!jme->fpgaver)
3079                 jme_phy_init(jme);
3080         jme_phy_off(jme);
3081
3082         /*
3083          * Reset MAC processor and reload EEPROM for MAC Address
3084          */
3085         jme_reset_mac_processor(jme);
3086         rc = jme_reload_eeprom(jme);
3087         if (rc) {
3088                 pr_err("Reload eeprom for reading MAC Address error\n");
3089                 goto err_out_unmap;
3090         }
3091         jme_load_macaddr(netdev);
3092
3093         /*
3094          * Tell stack that we are not ready to work until open()
3095          */
3096         netif_carrier_off(netdev);
3097         netif_stop_queue(netdev);
3098
3099         /*
3100          * Register netdev
3101          */
3102         rc = register_netdev(netdev);
3103         if (rc) {
3104                 pr_err("Cannot register net device\n");
3105                 goto err_out_unmap;
3106         }
3107
3108         netif_info(jme, probe, jme->dev, "%s%s ver:%x rev:%x "
3109                    "macaddr: %02x:%02x:%02x:%02x:%02x:%02x\n",
3110                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ?
3111                    "JMC250 Gigabit Ethernet" :
3112                    (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ?
3113                    "JMC260 Fast Ethernet" : "Unknown",
3114                    (jme->fpgaver != 0) ? " (FPGA)" : "",
3115                    (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev,
3116                    jme->rev,
3117                    netdev->dev_addr[0],
3118                    netdev->dev_addr[1],
3119                    netdev->dev_addr[2],
3120                    netdev->dev_addr[3],
3121                    netdev->dev_addr[4],
3122                    netdev->dev_addr[5]);
3123
3124         return 0;
3125
3126 err_out_unmap:
3127         iounmap(jme->regs);
3128 err_out_free_netdev:
3129         pci_set_drvdata(pdev, NULL);
3130         free_netdev(netdev);
3131 err_out_release_regions:
3132         pci_release_regions(pdev);
3133 err_out_disable_pdev:
3134         pci_disable_device(pdev);
3135 err_out:
3136         return rc;
3137 }
3138
3139 static void __devexit
3140 jme_remove_one(struct pci_dev *pdev)
3141 {
3142         struct net_device *netdev = pci_get_drvdata(pdev);
3143         struct jme_adapter *jme = netdev_priv(netdev);
3144
3145         unregister_netdev(netdev);
3146         iounmap(jme->regs);
3147         pci_set_drvdata(pdev, NULL);
3148         free_netdev(netdev);
3149         pci_release_regions(pdev);
3150         pci_disable_device(pdev);
3151
3152 }
3153
3154 #ifdef CONFIG_PM
3155 static int
3156 jme_suspend(struct pci_dev *pdev, pm_message_t state)
3157 {
3158         struct net_device *netdev = pci_get_drvdata(pdev);
3159         struct jme_adapter *jme = netdev_priv(netdev);
3160
3161         atomic_dec(&jme->link_changing);
3162
3163         netif_device_detach(netdev);
3164         netif_stop_queue(netdev);
3165         jme_stop_irq(jme);
3166
3167         tasklet_disable(&jme->txclean_task);
3168         tasklet_disable(&jme->rxclean_task);
3169         tasklet_disable(&jme->rxempty_task);
3170
3171         if (netif_carrier_ok(netdev)) {
3172                 if (test_bit(JME_FLAG_POLL, &jme->flags))
3173                         jme_polling_mode(jme);
3174
3175                 jme_stop_pcc_timer(jme);
3176                 jme_reset_ghc_speed(jme);
3177                 jme_disable_rx_engine(jme);
3178                 jme_disable_tx_engine(jme);
3179                 jme_reset_mac_processor(jme);
3180                 jme_free_rx_resources(jme);
3181                 jme_free_tx_resources(jme);
3182                 netif_carrier_off(netdev);
3183                 jme->phylink = 0;
3184         }
3185
3186         tasklet_enable(&jme->txclean_task);
3187         tasklet_hi_enable(&jme->rxclean_task);
3188         tasklet_hi_enable(&jme->rxempty_task);
3189
3190         pci_save_state(pdev);
3191         if (jme->reg_pmcs) {
3192                 jme_set_100m_half(jme);
3193
3194                 if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN))
3195                         jme_wait_link(jme);
3196
3197                 jwrite32(jme, JME_PMCS, jme->reg_pmcs);
3198
3199                 pci_enable_wake(pdev, PCI_D3cold, true);
3200         } else {
3201                 jme_phy_off(jme);
3202         }
3203         pci_set_power_state(pdev, PCI_D3cold);
3204
3205         return 0;
3206 }
3207
3208 static int
3209 jme_resume(struct pci_dev *pdev)
3210 {
3211         struct net_device *netdev = pci_get_drvdata(pdev);
3212         struct jme_adapter *jme = netdev_priv(netdev);
3213
3214         jme_clear_pm(jme);
3215         pci_restore_state(pdev);
3216
3217         if (test_bit(JME_FLAG_SSET, &jme->flags)) {
3218                 jme_phy_on(jme);
3219                 jme_set_settings(netdev, &jme->old_ecmd);
3220         } else {
3221                 jme_reset_phy_processor(jme);
3222         }
3223
3224         jme_start_irq(jme);
3225         netif_device_attach(netdev);
3226
3227         atomic_inc(&jme->link_changing);
3228
3229         jme_reset_link(jme);
3230
3231         return 0;
3232 }
3233 #endif
3234
3235 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24)
3236 static struct pci_device_id jme_pci_tbl[] = {
3237 #else
3238 static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = {
3239 #endif
3240         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) },
3241         { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) },
3242         { }
3243 };
3244
3245 static struct pci_driver jme_driver = {
3246         .name           = DRV_NAME,
3247         .id_table       = jme_pci_tbl,
3248         .probe          = jme_init_one,
3249         .remove         = __devexit_p(jme_remove_one),
3250 #ifdef CONFIG_PM
3251         .suspend        = jme_suspend,
3252         .resume         = jme_resume,
3253 #endif /* CONFIG_PM */
3254 };
3255
3256 static int __init
3257 jme_init_module(void)
3258 {
3259         pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION);
3260         return pci_register_driver(&jme_driver);
3261 }
3262
3263 static void __exit
3264 jme_cleanup_module(void)
3265 {
3266         pci_unregister_driver(&jme_driver);
3267 }
3268
3269 module_init(jme_init_module);
3270 module_exit(jme_cleanup_module);
3271
3272 MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>");
3273 MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
3274 MODULE_LICENSE("GPL");
3275 MODULE_VERSION(DRV_VERSION);
3276 MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
3277